PMIC CTRに対応 他

中途半端ではあるがいったんバックアップをかねてコミット

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@8 013db118-44a6-b54f-8bf7-843cb86687b1
This commit is contained in:
fujita_ryohei 2009-09-09 12:55:38 +00:00
parent 39946e295a
commit 4ef33818d9
32 changed files with 993 additions and 796 deletions

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@ -61,8 +61,6 @@ u8 hosu_mode = 0;
======================================================== */ ======================================================== */
task_status_immed tsk_cbk_accero(){ // 疑似isrから登録されます task_status_immed tsk_cbk_accero(){ // 疑似isrから登録されます
static u8 sequence;
u8* dest_adrs;
if( system_status.pwr_state == ON ){ if( system_status.pwr_state == ON ){
@ -70,7 +68,9 @@ task_status_immed tsk_cbk_accero(){ //
iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, &vreg_ctr[VREG_C_ACC_XL] ); iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, &vreg_ctr[VREG_C_ACC_XL] );
if(( vreg_ctr[ VREG_C_ACC_CONFIG ] & VREG_BITMASK_ACC_CONF1_ACQ ) == 1 ){ if(( vreg_ctr[ VREG_C_ACC_CONFIG ] & VREG_BITMASK_ACC_CONF1_ACQ ) == 1 ){
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_DAT_RDY; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_DAT_RDY;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_ACC_DAT_RDY ) != 0 ){
IRQ0_ast;
}
} }
} }
@ -96,7 +96,9 @@ task_status_immed acc_read(){
vreg_ctr[ VREG_C_ACC_W_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] ); vreg_ctr[ VREG_C_ACC_W_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
// vreg_ctr[ VREG_C_ACC_R_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] ); // vreg_ctr[ VREG_C_ACC_R_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_ACC_ACK ) != 0 ){
IRQ0_ast;
}
return( ERR_SUCCESS ); return( ERR_SUCCESS );
} }
@ -108,7 +110,9 @@ task_status_immed acc_read(){
task_status_immed acc_write(){ task_status_immed acc_write(){
iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] ); iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] );
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_ACC_ACK ) != 0 ){
IRQ0_ast;
}
return( ERR_SUCCESS ); return( ERR_SUCCESS );
} }
@ -119,9 +123,7 @@ task_status_immed acc_write(){
todo todo
========================================================*/ ========================================================*/
task_status_immed acc_set(){ task_status_immed acc_hosu_set(){
u8 temp;
u8 err;
u8 str_send_buf[4]; u8 str_send_buf[4];
iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI ); iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI );
@ -147,7 +149,7 @@ task_status_immed acc_set(){
str_send_buf[0] = ( ACC_BITS_PM_LP10 << ACC_bP_PM0 | ACC_BITS_ALL_AXIS_ON ); str_send_buf[0] = ( ACC_BITS_PM_LP10 << ACC_bP_PM0 | ACC_BITS_ALL_AXIS_ON );
} }
} }
err = iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | 0x80 ), 4, str_send_buf ); iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | 0x80 ), 4, str_send_buf );
return( ERR_SUCCESS ); return( ERR_SUCCESS );
} }

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@ -6,6 +6,6 @@
task_status_immed tsk_cbk_accero(); task_status_immed tsk_cbk_accero();
task_status_immed acc_set(); task_status_immed acc_hosu_set();
#endif #endif

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@ -9,8 +9,6 @@
#include "led.h" #include "led.h"
#include <assert.h>
bit adc_updated; bit adc_updated;
@ -29,7 +27,7 @@ bit adc_updated;
   
======================================================== */ ======================================================== */
task_interval tsk_adc(){ task_interval tsk_adc(){
static u8 old_3ddepth; static u8 old_tune;
static u8 old_sndvol; static u8 old_sndvol;
static u8 sndvol_codec; static u8 sndvol_codec;
// static u8 bt_temp_old; // static u8 bt_temp_old;
@ -39,54 +37,51 @@ task_interval tsk_adc(){
if( adc_updated ){ if( adc_updated ){
#if 0 #if 0
3D depth Vol tune Vol
// 3D // tune
if( abs( old_3ddepth - vreg_ctr[ VREG_C_3D_DEPTH ] ) >= 4 ){ if( abs( old_tune - vreg_ctr[ VREG_TUNE ] ) >= 4 ){
old_3ddepth = vreg_ctr[ VREG_C_3D_DEPTH ]; old_tune = vreg_ctr[ VREG_TUNE ];
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_3D_CHANGE; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_TUNE_CHANGE;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_VR_TUNE_CHANGE ) != 0 ){
IRQ0_ast;
}
} }
// Volume // Volume
if( abs( old_sndvol - vreg_ctr[ VREG_C_SND_VOL ] ) >= 4 ){ if( abs( old_sndvol - vreg_ctr[ VREG_C_SND_VOL ] ) >= 4 ){
old_sndvol = vreg_ctr[ VREG_C_SND_VOL ]; old_sndvol = vreg_ctr[ VREG_C_SND_VOL ];
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_SNDVOL_CHANGE; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_SNDVOL_CHANGE;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_VR_SNDVOL_CHANGE ) != 0 ){
IRQ0_ast;
}
} }
#endif #endif
// codecに伝える // codecに伝える
if( vreg_ctr[ VREG_C_SND_VOL ] != sndvol_codec ){ if( vreg_ctr[ VREG_C_SND_VOL ] != sndvol_codec ){
sndvol_codec = vreg_ctr[ VREG_C_SND_VOL ]; sndvol_codec = vreg_ctr[ VREG_C_SND_VOL ];
#ifdef _PMIC_TWL_ #ifndef _CODEC_CTR_
{ iic_mcu_write_a_byte( IIC_SLA_DCP, 0, sndvol_codec );
u8 temp;
do{
temp = iic_mcu_write_a_byte( IIC_SLA_DCP, 0x08, 0x80 ); // ACR←0x80 揮発モードへ
temp = iic_mcu_write_a_byte( IIC_SLA_DCP, 0, sndvol_codec );
NOP();
}while( temp != ERR_SUCCESS );
}
#else #else
;
iic_mcu_write_a_byte( IIC_SLA_CODEC, REG_ADRS_CODEC_VOL, sndvol_codec );
#endif #endif
} }
adc_updated = 0; adc_updated = 0;
} }
ADCEN = 1; ADCEN = 1;
ADM = 0b00011011; // セレクトモード、章圧、fCLK/6 ///ここから ADM = 0b00011011; // セレクトモード、章圧、fCLK/6 ///ここから
ADPC = 0x06; // ADCポートのセレクト ADPC = 0x06; // ADCポートのセレクト
ADS = ADC_SEL_3D; ADS = ADC_SEL_TUNE;
// NOP(); // NOP();
ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける
ADIF = 0; ADIF = 0;
ADMK = 0; ADMK = 0;
LED_duty_3D = 0x03FC - ((u16)( vreg_ctr[ VREG_C_3D_DEPTH ] ) << 2); LED_duty_TUNE = 0x03FC - ((u16)( vreg_ctr[ VREG_C_TUNE ] ) << 2);
return( 8 ); return( 8 );
} }
} }
@ -123,17 +118,17 @@ static u8 getmean3( u8* hist ){
     
======================================================== */ ======================================================== */
__interrupt void int_adc(){ __interrupt void int_adc(){
static u8 hist_3d_dep[3]; static u8 hist_tune[3];
static u8 hist_snd_vol[3]; static u8 hist_snd_vol[3];
static u8 hist_bt_temp[3]; static u8 hist_bt_temp[3];
static u8 index; static u8 index;
u8 temp; u8 temp;
EI(); EI();
switch( ADS ){ switch( ADS ){
case( ADC_SEL_3D ): case( ADC_SEL_TUNE ):
hist_3d_dep[ index ] = ADCRH; hist_tune[ index ] = ADCRH;
vreg_ctr[ VREG_C_3D_DEPTH ] = getmean3( hist_3d_dep ); vreg_ctr[ VREG_C_TUNE ] = getmean3( hist_tune );
break; break;
case( ADC_SEL_VOL ): case( ADC_SEL_VOL ):
@ -147,7 +142,7 @@ __interrupt void int_adc(){
case( ADC_SEL_BATT_TEMP ): case( ADC_SEL_BATT_TEMP ):
hist_bt_temp[ index ] = ADCRH; hist_bt_temp[ index ] = ADCRH;
raw_adc_temperature = getmean3( hist_3d_dep ); raw_adc_temperature = getmean3( hist_tune );
renge_task_immed_add( PM_bt_temp_update ); renge_task_immed_add( PM_bt_temp_update );
break; break;
@ -173,8 +168,8 @@ __interrupt void int_adc(){
/* ======================================================== /* ========================================================
tsk_adcと競合することを考慮していません tsk_adcと競合することを考慮していません
======================================================== */ ======================================================== */
u16 get_adc( u8 ch ){ u8 get_adc( u8 ch ){
u16 temp; u8 temp;
ADMK = 1; ADMK = 1;
ADIF = 0; ADIF = 0;

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@ -3,13 +3,13 @@
#include "jhl_defs.h" #include "jhl_defs.h"
#define ADC_SEL_3D 0x06 #define ADC_SEL_TUNE 0x06
#define ADC_SEL_VOL 0x07 #define ADC_SEL_VOL 0x07
#define ADC_SEL_BATT_TEMP 0x08 #define ADC_SEL_BATT_TEMP 0x08
#define ADC_SEL_BATT_DET 0x09 #define ADC_SEL_BATT_DET 0x09
u16 get_adc( u8 ch ); u8 get_adc( u8 ch );
#endif #endif

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@ -4,7 +4,7 @@ MEMORY BCL0:(00000H, 01000H )
;MEMORY BCL1:(01000H, 01000H ) ; バックアップ領域 ;MEMORY BCL1:(01000H, 01000H ) ; バックアップ領域
MEMORY ROM :(02000H, 02800H ) MEMORY ROM :(02000H, 02800H )
;MEMORY ROM_:(04800H, 02800H ) ; バックアップ領域 ;MEMORY ROM_:(04800H, 02800H ) ; バックアップ領域
MEMORY FSL :(07000H, 00C00H ) ;MEMORY FSL :(07000H, 00C00H ) ; 過去の名残。いらない
;MEMORY OCD :(0FC00H, 00400H ) ; OCDが使っているらしい ;MEMORY OCD :(0FC00H, 00400H ) ; OCDが使っているらしい

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@ -10,7 +10,8 @@ enum pwr_state_{
ON_TRIG, ON_TRIG,
ON, ON,
SLEEP_TRIG, SLEEP_TRIG,
SLEEP SLEEP,
// WAKE,
}; };

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@ -4,11 +4,12 @@
#define _debug_ #define _debug_
#define MCU_VER_MAJOR 0; #define MCU_VER_MAJOR 0;
#define MCU_VER_MINOR 2; #define MCU_VER_MINOR 3;
#define _MODEL_TEG2_ #define _MODEL_TEG2_
//#define _MODEL_WM0_ //#define _MODEL_WM0_
//#define _MODEL_TS0_
//#define _MODEL_CTR_ //#define _MODEL_CTR_
@ -25,10 +26,18 @@
#define _MCU_BSR_ #define _MCU_BSR_
#endif #endif
#ifdef _MODEL_TS0_
#define _PMIC_CTR_
#define _MCU_BSR_
#endif
#ifdef _MODEL_CTR_ #ifdef _MODEL_CTR_
#define _PMIC_CTR_ #define _PMIC_CTR_
#define _MCU_BSR_ #define _MCU_BSR_
#define _CODEC_CTR_ #define _CODEC_CTR_
#endif #endif
#endif #endif

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@ -9,8 +9,7 @@
#ifdef _MCU_BSR_ #ifdef _MCU_BSR_
//#ifdef _MODEL_WM0_
#ifdef _MODEL_WM0_
// ワーキングモデルはI2Cが逆 // ワーキングモデルはI2Cが逆
#define ACKD ACKD1 #define ACKD ACKD1
@ -40,7 +39,7 @@
#define WTIM WTIM1 #define WTIM WTIM1
#else //#else
#define ACKD ACKD0 #define ACKD ACKD0
#define ACKE ACKE0 #define ACKE ACKE0
@ -68,7 +67,7 @@
#define WREL WREL0 #define WREL WREL0
#define WTIM WTIM0 #define WTIM WTIM0
#endif //#endif
#endif #endif
@ -170,7 +169,7 @@ __interrupt void int_iic_ctr(){
__interrupt void int_iic_ctr(){ __interrupt void int_iic_ctr(){
static u8 state = 0; static u8 state = 0;
static u8 reg_adrs; static u8 reg_adrs;
static u8 reg_adrs_internal; // static u8 reg_adrs_internal;
static u8 trx_buf; static u8 trx_buf;
// EI(); // EI();

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@ -9,7 +9,7 @@
#pragma nop #pragma nop
#pragma inline // memcpy()をインライン展開する #pragma inline // memcpy()をインライン展開する
#include "incs_loader.h" #include "incs.h"
#include "i2c_mcu.h" #include "i2c_mcu.h"

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@ -10,7 +10,7 @@
extern u8 vreg_twl[]; extern u8 vreg_twl[];
#ifdef _MCU_BSR_ #ifdef _MCU_BSR_
#ifdef _MODEL_WM0_ //#ifdef _MODEL_WM0_
// ワーキングモデルはI2Cが逆 // ワーキングモデルはI2Cが逆
#define ACKD ACKD0 #define ACKD ACKD0
@ -39,7 +39,7 @@ extern u8 vreg_twl[];
#define WREL WREL0 #define WREL WREL0
#define WTIM WTIM0 #define WTIM WTIM0
#else //#else
#define ACKD ACKD1 #define ACKD ACKD1
#define ACKE ACKE1 #define ACKE ACKE1
@ -67,7 +67,7 @@ extern u8 vreg_twl[];
#define WREL WREL1 #define WREL WREL1
#define WTIM WTIM1 #define WTIM WTIM1
#endif //#endif
#endif #endif
#ifndef _MCU_BSR_ #ifndef _MCU_BSR_

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@ -40,13 +40,15 @@
#pragma interrupt INTIICA int_iic_ctr // CTR側 #pragma interrupt INTIICA int_iic_ctr // CTR側
#else #else
#ifdef _MODEL_WM0_ //#ifdef _MODEL_WM0_
#pragma interrupt INTIICA0 int_iic_twl // テレコのWM0仕様 #pragma interrupt INTIICA0 int_iic_twl // テレコのWM0仕様
#pragma interrupt INTIICA1 int_iic_ctr #pragma interrupt INTIICA1 int_iic_ctr
/*
#else #else
#pragma interrupt INTIICA0 int_iic_ctr // CTR側 #pragma interrupt INTIICA0 int_iic_ctr // CTR側
#pragma interrupt INTIICA1 int_iic_twl // TWL側 #pragma interrupt INTIICA1 int_iic_twl // TWL側
#endif #endif
*/
#endif #endif

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@ -203,7 +203,7 @@ static task_interval led_pow_normal(){
======================================================== */ ======================================================== */
static task_interval led_pow_hotaru(){ static task_interval led_pow_hotaru(){
static u8 state; static u8 state;
static u8 delay; // static u8 delay;
static u16 blue_to; static u16 blue_to;
static u16 red_to; static u16 red_to;
u8 dirty; u8 dirty;
@ -282,7 +282,7 @@ void set_LED_cam(){
// LED_Cam TO02 未 // LED_Cam TO02 未
// LED_Charge 5     →PM // LED_Charge 5     →PM
LED_Wifi,2 3, P24 LED_Wifi,2 3, P24
LED_3D 4 LED_TUNE 4
======================================================== */ ======================================================== */
task_interval tsk_led_wifi(){ task_interval tsk_led_wifi(){
// WiFi LED // // WiFi LED //

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@ -8,7 +8,7 @@
#define LED_duty_WiFi TDR03 #define LED_duty_WiFi TDR03
#define LED_duty_CHARGE TDR05 #define LED_duty_CHARGE TDR05
#define LED_duty_CAM TDR02 #define LED_duty_CAM TDR02
#define LED_duty_3D TDR01 #define LED_duty_TUNE TDR01
void LED_init(); void LED_init();
void LED_stop(); void LED_stop();

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@ -191,15 +191,23 @@ void hdwinit(void){ //
PU7 = 0b00011001; PU7 = 0b00011001;
PU12 = 0b00000000; PU12 = 0b00000000;
PU14 = 0b00000000; PU14 = 0b00000000;
#ifndef_MCU_KE3_ #ifndef _MCU_KE3_
PU20 = 0b00000000; PU20 = 0b00000000;
#endif #endif
#ifdef _MCU_KE3_
PM0 = 0b00000000; // 0で出力 PM0 = 0b00000000; // 0で出力
#else
PM0 = 0b00000001; // BSRマイコンでは、reset1は監視のみになる。
#endif
PM1 = 0b00000000; PM1 = 0b00000000;
PM2 = 0b11101001; PM2 = 0b11101001;
PM3 = 0b00000001; // P31,32は簡易I2C PM3 = 0b00000001; // P31,32は簡易I2C
#ifdef _PMIC_CTR_
PM4 = 0b00000111;
#else
PM4 = 0b00001011; PM4 = 0b00001011;
#endif
PM5 = 0b00000011; PM5 = 0b00000011;
PM6 = 0b00000000; // I2CのラインがL出力になってしまうが、システムがOFFなのでかまわない PM6 = 0b00000000; // I2CのラインがL出力になってしまうが、システムがOFFなのでかまわない
PM7 = 0b00011111; PM7 = 0b00011111;

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@ -37,7 +37,7 @@ u16 BT_PANA_TEMPCODN = 3.90*8;
// ======================================================== // ========================================================
u16 raw_adc_temperature; u8 raw_adc_temperature;
u8 starting_rcomp; u8 starting_rcomp;
u16 temp_co_up; u16 temp_co_up;
u16 temp_co_dn; u16 temp_co_dn;
@ -207,7 +207,6 @@ err PM_reset(){
======================================================== */ ======================================================== */
void PM_init(){ void PM_init(){
u8 temp; u8 temp;
u8 result;
u8 BT_GAUGE_UNLOCK_KEY[2] = { 0x4A, 0x57 }; u8 BT_GAUGE_UNLOCK_KEY[2] = { 0x4A, 0x57 };
u8 BT_GAUGE_QUICK_START[2] = { 0x40, 0x00 }; u8 BT_GAUGE_QUICK_START[2] = { 0x40, 0x00 };
@ -229,8 +228,6 @@ void PM_init(){
BT_DET_P = 0; BT_DET_P = 0;
switch( temp ){ switch( temp ){
// case( BT_VENDER_PANA ): // case( BT_VENDER_PANA ):
default: default:
@ -274,12 +271,11 @@ task_status_immed PM_bt_temp_update(){
T[] = 81.48 - 111.97 x ratio T[] = 81.48 - 111.97 x ratio
TDK T = 81.406 - 111.81 x ratio TDK T = 81.406 - 111.81 x ratio
*/ */
vreg_ctr[ VREG_C_BT_TEMP ] = (u8)( (s16)(( 163 - ( 224 * ( raw_adc_temperature )) ) / 2 ) >> 8 ); vreg_ctr[ VREG_C_BT_TEMP ] = (u8)( (s16)(( 163 - ( 224 * raw_adc_temperature ) ) / 2 ) >> 8 );
// 時々/大きく変化があったら書きにゆく // 時々/大きく変化があったら書きにゆく
if(( abs(vreg_ctr[ VREG_C_BT_TEMP ] - temp_old ) > 3 ) if(( abs(vreg_ctr[ VREG_C_BT_TEMP ] - temp_old ) > 3 )
|| ( count == 0 )){ || ( count == 0 )){
count += 1;
if( (s8)vreg_ctr[ VREG_C_BT_TEMP ] > 20 ){ if( (s8)vreg_ctr[ VREG_C_BT_TEMP ] > 20 ){
newrcomp = -(( (s16)vreg_ctr[ VREG_C_BT_TEMP ] - 20 ) * temp_co_up ); newrcomp = -(( (s16)vreg_ctr[ VREG_C_BT_TEMP ] - 20 ) * temp_co_up );
}else{ }else{
@ -295,7 +291,10 @@ Else
NewRCOMP = StartingRCOMP NewRCOMP = StartingRCOMP
End If End If
*/ */
return( iic_mcu_write( IIC_SLA_BT_GAUGE, BT_BT_PARAM_PANA_RCOMP_ADRS, 2, newrcomp ) ); if( iic_mcu_write( IIC_SLA_BT_GAUGE, BT_BT_PARAM_PANA_RCOMP_ADRS, 2, newrcomp ) == ERR_SUCCESS ){
temp_old = vreg_ctr[ VREG_C_BT_TEMP ];
}
count += 1;
} }
return( ERR_SUCCESS ); return( ERR_SUCCESS );
@ -395,6 +394,33 @@ err PM_LCD_off(){
} }
#endif #endif
/* ========================================================
I2Cコマンドでの実行の場合の為の
2
======================================================== */
task_status_immed tski_PM_LCD_on(){
PM_LCD_on();
return( ERR_FINISED );
}
task_status_immed tski_PM_BL_on(){
PM_BL_on();
return( ERR_FINISED );
}
task_status_immed tski_PM_BL_off(){
PM_BL_off();
return( ERR_FINISED );
}
task_status_immed tski_PM_LCD_off(){
PM_LCD_off();
return( ERR_FINISED );
}
@ -415,29 +441,42 @@ err PM_sys_pow_on(){
BT_TEMP_P = 1; BT_TEMP_P = 1;
vreg_ctr[ VREG_C_BT_TEMP ] = get_adc( ADC_SEL_BATT_TEMP ); vreg_ctr[ VREG_C_BT_TEMP ] = get_adc( ADC_SEL_BATT_TEMP );
BT_TEMP_P = 0; BT_TEMP_P = 0;
temp = vreg_ctr[ VREG_C_BT_TEMP ]; PM_bt_temp_update(); // 温度のtemp。 残量ICに行きます
PM_set_batt_temp( temp ); // 温度のtemp。 残量ICに行きます
// 残量チェック // 残量チェック
if( PM_get_batt_left() < 0 ){ vreg_ctr[ VREG_C_BT_REMAIN ] = PM_get_batt_left();
vreg_ctr[ VREG_C_BT_REMAIN ] = 200;
if( vreg_ctr[ VREG_C_BT_REMAIN ] < 0 ){
return( 1 ); return( 1 );
} }
// 電源順次立ち上げ // 電源順次立ち上げ
RESET2_ast;
FCRAM_RST_ast;
PM_LDSW_on(); PM_LDSW_on();
iic_mcu_write_a_byte( IIC_SLA_PMIC, 0x22, 0xCA ); // バグ持ちPMIC対策 OVP解除
iic_mcu_write_a_byte( IIC_SLA_PMIC, 0x05, 0x07 ); // バグ持ちPMIC対策 強制PWM
wait_ms( DELAY_PM_TW_PWUP ); wait_ms( DELAY_PM_TW_PWUP );
PM_VDD_on(); PM_VDD_on();
wait_ms( DELAY_PM_TW_PWUP ); wait_ms( DELAY_PM_TW_PWUP );
PM_VDD50A_on(); PM_VDD50A_on();
wait_ms( DELAY_PM_TW_PWUP ); wait_ms( DELAY_PM_TW_PWUP );
iic_mcu_write_a_byte( IIC_SLA_PMIC, 0x22, 0x4A ); // バグ持ちPMIC対策
if( PM_chk_LDSW() == 0 ){ if( PM_chk_LDSW() == 0 ){
return( ERR_ERR ); return( ERR_ERR );
} }
PM_reset_neg(); PM_reset_neg();
RESET2_ngt; RESET2_neg;
FCRAM_RST_neg;
return( ERR_SUCCESS ); return( ERR_SUCCESS );
#else #else
@ -461,9 +500,9 @@ err PM_sys_pow_on(){
} }
vreg_ctr[ VREG_C_BT_REMAIN ] = temp; vreg_ctr[ VREG_C_BT_REMAIN ] = temp;
RESET1_ngt; RESET1_neg;
RESET2_ngt; RESET2_neg;
FCRAM_RST_ngt; FCRAM_RST_neg;
wait_ms( 100 ); wait_ms( 100 );
if( !RESET1_n ){ if( !RESET1_n ){
// 起動失敗 // 起動失敗
@ -482,19 +521,19 @@ err PM_sys_pow_on(){
OFFシーケンス OFFシーケンス
======================================================== */ ======================================================== */
err PM_sys_pow_off(){ err PM_sys_pow_off(){
#ifdef _PMIC_CTR_ #ifndef _PMIC_TWL_
RSTB PM_BL_off();
TCOM,VCS OFF PM_LCD_off();// TCOM,VCS OFF も消してきます。
(1ms)
(50ms) PM_reset_ast();
->PM LCD系電源OFF RESET2_ast;
PM_LCD_off(); FCRAM_RST_ast;
RST1,2,fcramアサート
->OFF
PM_off(); PM_off();
OFF
PM_LDSW_off(); PM_LDSW_off();
#else #else
wait_ms( 50 ); wait_ms( 50 );
if( RESET1_n ){ // 異常終了から来た場合 if( RESET1_n ){ // 異常終了から来た場合
@ -540,13 +579,12 @@ err to_sleep(){
PM_EXTDCは割り込みメインにするかも PM_EXTDCは割り込みメインにするかも
======================================================== */ ======================================================== */
task_interval tsk_batt(){ task_interval tsk_batt(){
static u8 bt_stat = 0;
static u8 charge_hys = 0; // ヒステリシスで上限下限を拡張するとき1 static u8 charge_hys = 0; // ヒステリシスで上限下限を拡張するとき1
// 電源周りのステータスが変化? // 電源周りのステータスが変化?
set_bit( PM_EXTDC, vreg_ctr[ VREG_C_STATUS ], REG_BIT_POW_SUPPLY ); set_bit( PM_EXTDC, vreg_ctr[ VREG_C_STATUS0 ], REG_BIT_POW_SUPPLY );
set_bit( !BT_CHG_ERR_n, vreg_ctr[ VREG_C_STATUS ], REG_BIT_BATT_CHARGE_ERR ); set_bit( !BT_CHG_ERR_n, vreg_ctr[ VREG_C_STATUS0 ], REG_BIT_BATT_CHARGE_ERR );
set_bit( !BT_CHG_n, vreg_ctr[ VREG_C_STATUS ], REG_BIT_BATT_CHARGE ); set_bit( !BT_CHG_n, vreg_ctr[ VREG_C_STATUS0 ], REG_BIT_BATT_CHARGE );
// →割り込み。miscの中でよろしくやってくれている。 // →割り込み。miscの中でよろしくやってくれている。
// 充電 // 充電
@ -620,27 +658,39 @@ task_status_immed ntr_pmic_comm(){
reg_old = reg_shadow; // BL関係 reg_old = reg_shadow; // BL関係
reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_PMCOMP ); reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_PMCOMP );
DI(); DI();
// offリクエスト
if(( reg_shadow & ( 1 << 6 )) != 0 ){ if(( reg_shadow & ( 1 << 6 )) != 0 ){
// offリクエスト vreg_ctr[ VREG_C_IRQ2 ] |= REG_BIT_TWL_OFF_REQ;
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_TWL_OFF_REQ; if( ( vreg_ctr[ VREG_C_IRQ_MASK2 ] & REG_BIT_TWL_OFF_REQ ) != 0 ){
IRQ0_ast; IRQ0_ast;
}
} }
// リセットリクエスト
if(( reg_shadow & ( 1 << 0 )) != 0 ){ if(( reg_shadow & ( 1 << 0 )) != 0 ){
// リセットリクエスト vreg_ctr[ VREG_C_IRQ2 ] |= REG_BIT_TWL_RESET_REQ;
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_TWL_RESET_REQ; if( ( vreg_ctr[ VREG_C_IRQ_MASK2 ] & REG_BIT_TWL_RESET_REQ ) != 0 ){
IRQ0_ast; IRQ0_ast;
}
} }
// バックライトが...
if( (( reg_old ^ reg_shadow ) & ~( 0x03 << 2 )) != 0 ){ if( (( reg_old ^ reg_shadow ) & ~( 0x03 << 2 )) != 0 ){
if(( reg_shadow & ( 0x03 << 2 )) == 0x00 ){ if(( reg_shadow & ( 0x03 << 2 )) == 0x00 ){
// バックライトが両方消された // 両方消された
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
vreg_ctr[ VREG_C_STATUS ] &= ~0x01; vreg_ctr[ VREG_C_STATUS0 ] &= ~0x01;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_STAT_CHANGE ) != 0 ){
IRQ0_ast;
}
}else if(( reg_shadow & ( 0x03 << 2 )) == ( 0x03 << 2 )){ }else if(( reg_shadow & ( 0x03 << 2 )) == ( 0x03 << 2 )){
// バックライトが両方ついた // 両方ついた
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
vreg_ctr[ VREG_C_STATUS ] |= 0x01; vreg_ctr[ VREG_C_STATUS0 ] |= 0x01;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_STAT_CHANGE ) != 0 ){
IRQ0_ast;
}
} }
} }
EI(); EI();

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@ -50,7 +50,7 @@ enum PMIC_REG_ADRS{
//========================================================= //=========================================================
extern u16 raw_adc_temperature; extern u8 raw_adc_temperature;
@ -65,6 +65,16 @@ err PM_reset();
err PM_LCD_vcom_set(); err PM_LCD_vcom_set();
task_status_immed tski_vcom_set(); task_status_immed tski_vcom_set();
err PM_BL_on();
err PM_BL_off();
task_status_immed tski_PM_BL_on();
task_status_immed tski_PM_BL_off();
task_status_immed tski_PM_LCD_on();
task_status_immed tski_PM_LCD_off();
//  これを呼ぶ前に、現在温度を教えておく必要があります。 //  これを呼ぶ前に、現在温度を教えておく必要があります。
#define PM_get_batt_left() ( iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC ) ) #define PM_get_batt_left() ( iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC ) )

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@ -1,5 +1,5 @@
#pragma section @@CODE ROM_CODE #pragma section @@CODE ROM_CODE
#pragma nop
/****************************************************************************** /******************************************************************************
@ -7,6 +7,7 @@
ctr_mcu_config.rb task_config.hが作成されます ctr_mcu_config.rb task_config.hが作成されます
*****************************************************************************/ *****************************************************************************/
#include "renge_defs.h"
#include "renge_task_intval.h" #include "renge_task_intval.h"
#include "renge_task_immediate.h" #include "renge_task_immediate.h"
@ -59,8 +60,6 @@ void renge_interval(){
/****************************************************************************** /******************************************************************************
*****************************************************************************/ *****************************************************************************/
err renge_task_interval_run(){ err renge_task_interval_run(){
task_info *current_task; task_info *current_task;
@ -68,25 +67,30 @@ err renge_task_interval_run(){
// インターバル起動 // インターバル起動
if( renge_flg_interval == 1 ){ if( renge_flg_interval == 1 ){
renge_flg_interval = 0; renge_flg_interval = 0;
for( current_task = tasks; current_task != &tasks[TSK_LAST]; current_task += 1 ){ for( current_task = tasks;
current_task != &tasks[TSK_LAST];
if( current_task -> dispatch_type == INTERVAL ){ current_task += 1 )
{
// if( current_task -> dispatch_type == INTERVAL ){
if( current_task -> interval == 0 ){ if( current_task -> interval == 0 ){
current_task -> interval = current_task -> task(); current_task -> interval = current_task -> task();
}else{ }else{
current_task -> interval -= 1; current_task -> interval -= 1;
} }
} // }
} }
} }
// ***_TRIG等で強制起動 // ***_TRIG等で強制起動
if( renge_task_interval_run_force ){ if( renge_task_interval_run_force ){
renge_task_interval_run_force = 0; // とりあえず、何が何でもフラグ消しちゃうけど... renge_task_interval_run_force = 0; // とりあえず、何が何でもフラグ消しちゃうけど...
for( current_task = tasks; current_task != &tasks[TSK_LAST]; current_task += 1 ){ for( current_task = tasks;
current_task != &tasks[TSK_LAST];
current_task += 1 )
{
current_task -> interval = current_task -> task(); current_task -> interval = current_task -> task();
} }
} }
return( ERR_SUCCESS ); return( ERR_SUCCESS );
@ -105,7 +109,7 @@ err renge_task_interval_run(){
         
*****************************************************************************/ *****************************************************************************/
#define IMMED_RSV_TASKS_NUM 10 #define IMMED_RSV_TASKS_NUM 15
task_immed tasks_immed[ IMMED_RSV_TASKS_NUM ]; // タスクへのポインタの配列 task_immed tasks_immed[ IMMED_RSV_TASKS_NUM ]; // タスクへのポインタの配列
u8 task_immed_index = 0; u8 task_immed_index = 0;
@ -125,9 +129,13 @@ void renge_task_immed_init(){
err renge_task_immed_add( task_immed new_task ){ err renge_task_immed_add( task_immed new_task ){
u8 temp; u8 temp;
// 最終的にはチェック不要になる
/// 手動でタスクの数を数えなさい、という意味ですが。
if( task_immed_index >= IMMED_RSV_TASKS_NUM ){ if( task_immed_index >= IMMED_RSV_TASKS_NUM ){
// タスクの登録領域が足りなかった // タスクの登録領域が足りなかった
while(1); while(1){
NOP(); // アサートで止めたいのですが。
}
}else{ }else{
#if 1 #if 1
// 同じタスクの多重登録を避ける // 同じタスクの多重登録を避ける
@ -167,7 +175,7 @@ err renge_task_immed_run(){
u8 task_id = 0; u8 task_id = 0;
while( tasks_immed[ task_id ] != 0 ){ while( tasks_immed[ task_id ] != 0 ){
if( tasks_immed[ task_id ]( (u8*)0 ) == ERR_FINISED ){ if( tasks_immed[ task_id ]() == ERR_FINISED ){
renge_task_immed_del( task_id ); // ←が tasks_immed[ id ] を前詰めしてしまうので、 renge_task_immed_del( task_id ); // ←が tasks_immed[ id ] を前詰めしてしまうので、
}else{ // 同じid (=元は、次のid) を起動しなくてはならない }else{ // 同じid (=元は、次のid) を起動しなくてはならない
task_id += 1; task_id += 1;

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@ -42,7 +42,7 @@ typedef task_interval ( *p_task )(); // p_task
typedef struct{ typedef struct{
p_task task; p_task task;
dispatch_type dispatch_type; // dispatch_type dispatch_type;
task_interval interval; task_interval interval;
}task_info; }task_info;
@ -51,7 +51,7 @@ typedef task_interval ( *p_task )(); // p_task
*************************************/ *************************************/
typedef u8 task_status_immed; typedef u8 task_status_immed;
typedef task_status_immed ( * task_immed ) ( void * ); typedef task_status_immed (*task_immed)();
typedef enum{ typedef enum{

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@ -22,17 +22,17 @@ extern task_interval tsk_soft_int();
extern task_interval tsk_sys(); extern task_interval tsk_sys();
task_info tasks[ TSK_LAST ] = { task_info tasks[ TSK_LAST ] = {
{ tsk_sw, INTERVAL, 0 }, { tsk_sw, 0 },
{ tsk_wifi, INTERVAL, 0 }, { tsk_wifi, 0 },
{ tsk_adc, INTERVAL, 0 }, { tsk_adc, 0 },
{ tsk_batt, INTERVAL, 0 }, { tsk_batt, 0 },
{ tsk_led_pow, INTERVAL, 0 }, { tsk_led_pow, 0 },
{ tsk_led_wifi, INTERVAL, 0 }, { tsk_led_wifi, 0 },
{ tsk_misc_stat, INTERVAL, 0 }, { tsk_misc_stat, 0 },
{ tsk_debug, INTERVAL, 0 }, { tsk_debug, 0 },
{ tsk_debug2, INTERVAL, 0 }, { tsk_debug2, 0 },
{ tsk_soft_int, INTERVAL, 0 }, { tsk_soft_int, 0 },
{ tsk_sys, INTERVAL, 0 }, { tsk_sys, 0 }
}; };

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@ -12,7 +12,7 @@
// ======================================================== // ========================================================
u8 rtc_work[7]; u8 rtc_work[7];
bit rtc_lock; bit rtc_lock;
bit rtc_dirty; bit rtc_dirty;
/* ======================================================== /* ========================================================
@ -40,7 +40,7 @@ void RTC_init(void){
RTCE = 1; /* “®<E2809C>ìŠJŽn */ RTCE = 1; /* “®<E2809C>ìŠJŽn */
vreg_ctr[ VREG_C_MCU_STATUS ] = REG_BITS_RTC_BLACKOUT; vreg_ctr[ VREG_C_MCU_STATUS ] = REG_BIT_RTC_BLACKOUT;
} }

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@ -87,7 +87,6 @@ u8 boot_ura; //
/* ======================================================== /* ========================================================
======================================================== */ ======================================================== */
err firm_update(){ err firm_update(){
u8 flg_rcv_end;
u8 buffer_fill; u8 buffer_fill;
u8 target_block; u8 target_block;
u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ]; u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ];
@ -95,8 +94,6 @@ err firm_update(){
fsl_u08 err; fsl_u08 err;
__far u8* p_rom; __far u8* p_rom;
flg_rcv_end = 0;
TOE0 = 0x0000; TOE0 = 0x0000;
TOE0 = 0x0020; TOE0 = 0x0020;
@ -243,7 +240,6 @@ firm_update_end:
======================================================== */ ======================================================== */
err firm_restore(){ err firm_restore(){
u8 flg_rcv_end = 0;
u8 buffer_fill; u8 buffer_fill;
u8 target_block; u8 target_block;
u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ]; u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ];

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@ -4,9 +4,14 @@
#pragma STOP #pragma STOP
#include "incs.h" #include "incs.h"
#include "renge.h"
#include "pm.h"
extern u8 boot_ura; extern u8 boot_ura;
/* ======================================================== /* ========================================================
WiFi WiFi
WL_TX,RX WL_TX,RX
@ -20,34 +25,35 @@ task_interval tsk_wifi(){
/* ======================================================== /* ========================================================
======================================================== */ ======================================================== */
task_interval tsk_misc_stat(){ task_interval tsk_misc_stat(){
static u8 state_old; // ステータス変化検出→割り込み の為 static u8 state_old; // ステータス変化検出→割り込み の為
SHELL_CLOSE_P = 1; SHELL_CLOSE_P = 1;
set_bit( EXT_OPT_DET, vreg_ctr[ VREG_C_STATUS ], REG_BIT_EXT_OPT_LOCK ); set_bit( EXT_OPT_DET, vreg_ctr[ VREG_C_STATUS0 ], REG_BIT_EXT_OPT_LOCK );
set_bit( SHELL_CLOSE, vreg_ctr[ VREG_C_STATUS ], REG_BIT_SHELL_CLOSE ); set_bit( SHELL_CLOSE, vreg_ctr[ VREG_C_STATUS0 ], REG_BIT_SHELL_CLOSE );
SHELL_CLOSE_P = 0; SHELL_CLOSE_P = 0;
// ステータスレジスタ関係 → 割り込み //
if(( vreg_ctr[ VREG_C_STATUS ] ^ state_old ) != 0 ){ if(( vreg_ctr[ VREG_C_STATUS0 ] ^ state_old ) != 0 ){
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE; vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
switch( system_status.pwr_state ){ switch( system_status.pwr_state ){
case ON_TRIG: case ON_TRIG:
case ON:
IRQ0_ast;
break; break;
case ON:
if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_STAT_CHANGE ) != 0 ){
IRQ0_ast;
}
break;
case SLEEP_TRIG: case SLEEP_TRIG:
case SLEEP: case SLEEP:
if( (( state_old & REG_BIT_SHELL_CLOSE ) != 0 ) if( (( state_old & REG_BIT_SHELL_CLOSE ) != 0 )
&& ( !SHELL_CLOSE ) ){ && ( !SHELL_CLOSE ) ){
// 蓋が開いた // 蓋開けた のみ通知
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK1 ] & REG_BIT_STAT_CHANGE ) != 0 ){
}else{ IRQ0_ast;
return( 250 ); }
} }
break; break;
case OFF_TRIG: case OFF_TRIG:
@ -57,7 +63,7 @@ task_interval tsk_misc_stat(){
} }
} }
state_old = vreg_ctr[ VREG_C_STATUS ]; state_old = vreg_ctr[ VREG_C_STATUS0 ];
return( 100 ); return( 100 );
} }
@ -88,14 +94,18 @@ task_interval tsk_debug(){
task_interval tsk_debug2(){ task_interval tsk_debug2(){
if(( system_status.pwr_state != OFF ) if(( system_status.pwr_state != OFF )
&& ( system_status.pwr_state != ON_TRIG )){ && ( system_status.pwr_state != ON_TRIG )){
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_IRQ0 ] ); // iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_IRQ0 ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_IRQ1 ] ); // iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_IRQ1 ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura ); // iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura );
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_SND_VOL ] ); // iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_SND_VOL ] );
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_3D_DEPTH ] ); // iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_TUNE ] );
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_TUNE ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_SND_VOL ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_STATUS0 ] );
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] ); iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
} }
return( 50/2 ); return( 20/2 );
} }
@ -177,7 +187,12 @@ task_status_immed do_command0(){
}else{ }else{
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET1_REQ ){ if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET1_REQ ){
#ifdef _PMIC_TWL_
RESETs_ast; RESETs_ast;
#else
PM_reset_ast();
RESET2_ast;
#endif
FCRAM_RST_ast; FCRAM_RST_ast;
} }
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET2_REQ ){ if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET2_REQ ){
@ -187,9 +202,26 @@ task_status_immed do_command0(){
FCRAM_RST_ast; FCRAM_RST_ast;
} }
wait_ms( 5 ); wait_ms( 5 );
RESETs_ngt; #ifdef _PMIC_TWL_
FCRAM_RST_ngt; RESETs_neg;
#else
PM_reset_neg();
RESET2_neg;
#endif
FCRAM_RST_neg;
} }
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_BL_ON ){
renge_task_immed_add( tski_PM_BL_on );
}else if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_BL_OFF ){
renge_task_immed_add( tski_PM_BL_off );
}
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_LCD_ON ){
renge_task_immed_add( tski_PM_LCD_on );
}else if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_LCD_OFF ){
renge_task_immed_add( tski_PM_LCD_off );
}
vreg_ctr[ VREG_C_COMMAND0 ] = 0; vreg_ctr[ VREG_C_COMMAND0 ] = 0;
return( ERR_FINISED ); return( ERR_FINISED );
} }
@ -201,15 +233,19 @@ task_status_immed do_command0(){
  0   0
======================================================== */ ======================================================== */
task_status_immed do_command1(){ task_status_immed do_command1(){
// 呼ばれません
while(1){
NOP(); // 誤り検出
}
vreg_twl[ REG_TWL_ADRS_IRQ ] = (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_PWSW_DET ) != 0 )? REG_BIT_TWL_IRQ_PWSW_DET: 0x00; //pwsw_det
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_RESET ) != 0 )? REG_BIT_TWL_IRQ_RESET: 0x00; //reset_req
vreg_twl[ REG_TWL_ADRS_IRQ ] = (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x01 ) != 0 )? 0x80: 0x00; //pwsw_det vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_OFF ) != 0 )? REG_BIT_TWL_IRQ_OFF: 0x00; //off_req
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x02 ) != 0 )? 0x01: 0x00; //reset_det
vreg_twl[ REG_TWL_ADRS_IRQ ] = (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x01 ) != 0 )? 0x80: 0x00; //pwsw_det
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x02 ) != 0 )? 0x01: 0x00; //reset_det
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x04 ) != 0 )? 0x02: 0x00; //off_det vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_BT_LOW ) != 0 )? REG_BIT_TWL_IRQ_BT_LOW: 0x00; //batt_low
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x08 ) != 0 )? 0x20: 0x00; //batt_low vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_BT_EMPTY ) != 0 )? REG_BIT_TWL_IRQ_BT_EMPTY: 0x00; //batt_empty
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & 0x10 ) != 0 )? 0x10: 0x00; //batt_empty
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_VOL_CHANGE ) != 0 )? REG_BIT_TWL_IRQ_VOL_CHANGE: 0x00; //vol_changed
return( ERR_FINISED ); return( ERR_FINISED );
} }
@ -219,7 +255,17 @@ task_status_immed do_command1(){
CPUからのスリープ要求 CPUからのスリープ要求
======================================================== */ ======================================================== */
__interrupt void intp0_slp(){ // SLP __interrupt void intp0_slp(){ // SLP
if( SLP_REQ ){
system_status.pwr_state = SLEEP_TRIG;
}else{
system_status.pwr_state = ON_TRIG;
if( PM_BL_on() == 0 ){
renge_task_interval_run_force = 1;
iic_mcu_stop();
system_status.pwr_state = OFF_TRIG;
}
}
renge_task_interval_run_force = 1;
} }

View File

@ -12,8 +12,8 @@
#include "pm.h" #include "pm.h"
#include "rtc.h" #include "rtc.h"
u8 SW_pow_count, SW_home_count, SW_3d_count, SW_wifi_count; u8 SW_pow_count, SW_home_count, SW_tune_count, SW_wifi_count;
bit SW_pow_mask, SW_home_mask, SW_3d_mask, SW_wifi_mask; bit SW_pow_mask, SW_home_mask, SW_tune_mask, SW_wifi_mask;
/* ======================================================== /* ========================================================
@ -46,7 +46,7 @@ task_interval tsk_sys(){
if(( SW_pow_count > 3 ) || if(( SW_pow_count > 3 ) ||
( SW_wifi_count > 3 )){ // 何か他に電源ON要因はあるか ( SW_wifi_count > 3 )){ // 何か他に電源ON要因はあるか
SW_pow_mask = 1; SW_pow_mask = 1;
SW_3d_mask = 1; SW_tune_mask = 1;
SW_wifi_mask = 1; SW_wifi_mask = 1;
// 何か他に電源ON要因はあるか // 何か他に電源ON要因はあるか
@ -86,6 +86,13 @@ task_interval tsk_sys(){
return( 0 ); return( 0 );
} }
if( PM_BL_on() == 0 ){
renge_task_interval_run_force = 1;
iic_mcu_stop();
system_status.pwr_state = OFF;
return( 0 );
}
// ここまで来ると、電源投入確定 // ここまで来ると、電源投入確定
system_status.pwr_state = ON_TRIG; system_status.pwr_state = ON_TRIG;
renge_task_interval_run_force = 1; renge_task_interval_run_force = 1;
@ -127,7 +134,7 @@ task_interval tsk_sys(){
system_status.pwr_state = ON; system_status.pwr_state = ON;
#ifdef _PMIC_TWL_ #ifndef _PMIC_TWL_
{ {
u8 temp; u8 temp;
// do{ // do{
@ -137,31 +144,41 @@ task_interval tsk_sys(){
} }
#endif #endif
vreg_ctr[ VREG_C_ACC_CONFIG_HOSU ] = 0x01; vreg_ctr[ VREG_C_ACC_CONFIG_HOSU ] = 0x01;
renge_task_immed_add( acc_set ); renge_task_immed_add( acc_hosu_set );
P1 &= ~0x20;
break; break;
case ON: //------------------------------------------------------- case ON: //---------------------------------------------
if( !RESET1_n ){
// 電源異常チェック
/// コマンドで、正規にリセットをかけたときには、
/// このチェックに引っかからないので大丈夫
system_status.pwr_state = OFF_TRIG;
renge_task_interval_run_force = 1;
}
break; break;
case SLEEP_TRIG: //------------------------------------------------------- case SLEEP_TRIG: //-------------------------------------
system_status.pwr_state = SLEEP; system_status.pwr_state = SLEEP;
PM_BL_off();
break; break;
case SLEEP: //------------------------------------------------------- case SLEEP: //------------------------------------------
system_status.pwr_state = ON_TRIG; // system_status.pwr_state = ON_TRIG;
if( !RESET1_n ){
system_status.pwr_state = OFF_TRIG;
renge_task_interval_run_force = 1;
}
break; break;
case OFF_TRIG: //------------------------------------------------------- case OFF_TRIG: //---------------------------------------
LED_stop(); LED_stop();
IIC_ctr_Stop(); IIC_ctr_Stop();
IIC_twl_Stop(); IIC_twl_Stop();
vreg_ctr[ VREG_C_IRQ0 ] = 0; vreg_ctr[ VREG_C_IRQ0 ] = 0;
vreg_ctr[ VREG_C_IRQ1 ] = 0; vreg_ctr[ VREG_C_IRQ1 ] = 0;
vreg_ctr[ VREG_C_IRQ1 ] = 0; vreg_ctr[ VREG_C_IRQ2 ] = 0;
BT_TEMP_P = 0; BT_TEMP_P = 0;
// 電源オン条件の割り込みセット // 電源オン条件の割り込みセット
@ -253,16 +270,16 @@ task_interval tsk_sw(){
if(( system_status.pwr_state == ON ) if(( system_status.pwr_state == ON )
|| ( system_status.pwr_state == OFF )){ || ( system_status.pwr_state == OFF )){
count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask ); count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask );
count_sw_n( SW_WIFI_n, SW_wifi_count, SW_3d_mask ); count_sw_n( SW_WIFI_n, SW_wifi_count, SW_tune_mask );
count_sw_n( SW_2D3D_n, SW_3d_count, SW_wifi_mask ); count_sw_n( SW_TUNE_n, SW_tune_count, SW_wifi_mask );
// count_sw_n( SW_HOME_n, SW_home_count, SW_home_mask ); // count_sw_n( SW_HOME_n, SW_home_count, SW_home_mask );
} }
switch( system_status.pwr_state ){ switch( system_status.pwr_state ){
case( OFF_TRIG ): case( OFF_TRIG ):
SW_pow_count = 0; SW_pow_count = 0;
SW_wifi_count = 0; SW_wifi_count = 0;
SW_3d_count = 0; SW_tune_count = 0;
cnt_force_off = 0; cnt_force_off = 0;
break; break;
@ -292,30 +309,45 @@ task_interval tsk_sw(){
// HOME スイッチ…だと? // // HOME スイッチ…だと? //
if( SW_home_count == 6 ){ if( SW_home_count == 6 ){
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_CLICK; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_CLICK;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_SW_HOME_CLICK ) != 0 ){
IRQ0_ast;
}
}else if( SW_pow_count == 66 ){ }else if( SW_pow_count == 66 ){
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_HOLD; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_HOLD;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_SW_HOME_HOLD ) != 0 ){
IRQ0_ast;
}
} }
*/ */
// wifi sw // wifi sw
if( SW_wifi_count == 10 ){ if( SW_wifi_count == 10 ){
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_WIFI_CLICK; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_WIFI_CLICK;
if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_SW_WIFI_CLICK ) != 0 ){
IRQ0_ast;
}
} }
// 3d sw // tune sw
if( SW_3d_count == 10 ){ if( SW_tune_count == 10 ){
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_3D_CLICK; vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_TUNE_CLICK;
if( ( vreg_ctr[ VREG_C_IRQ_MASK0 ] & REG_BIT_SW_TUNE_CLICK ) != 0 ){
IRQ0_ast;
}
} }
break; break;
} }
/*
// まとめて割り込みを立てる
if(( vreg_ctr[ VREG_C_IRQ0 ] if(( vreg_ctr[ VREG_C_IRQ0 ]
& ( REG_BIT_SW_POW_CLICK | REG_BIT_SW_POW_HOLD & ( REG_BIT_SW_POW_CLICK | REG_BIT_SW_POW_HOLD
| REG_BIT_SW_HOME_CLICK | REG_BIT_SW_HOME_HOLD | REG_BIT_SW_HOME_CLICK | REG_BIT_SW_HOME_HOLD
| REG_BIT_SW_WIFI_CLICK | REG_BIT_SW_3D_CLICK ) ) != 0 ){ | REG_BIT_SW_WIFI_CLICK | REG_BIT_SW_TUNE_CLICK ) ) != 0 ){
IRQ0_ast; IRQ0_ast;
} }
*/
return( 8 ); return( 8 );
} }

View File

@ -34,8 +34,6 @@ extern unsigned char temp_teg;
#define PM_TEG_PWSW P7.5 // TEGのみ #define PM_TEG_PWSW P7.5 // TEGのみ
#define PM_TEG_LCD_OFF P7.6 // TEGのみ #define PM_TEG_LCD_OFF P7.6 // TEGのみ
#else #else
#define PM_TEG_PWSW ;
#define PM_TEG_LCD_OFF ;
#endif #endif
@ -46,28 +44,42 @@ extern unsigned char temp_teg;
// PMxは0で出力モード // PMxは0で出力モード
// SoC // SoC
#ifndef _PMIC_CTR_
#define IRQ0_ast { P3.0 = 0; PM3.0 = 0; } #define IRQ0_ast { P3.0 = 0; PM3.0 = 0; }
//#define IRQ0_ngt { PM3.0 = 1; } #else
#define IRQ0_ast { P7.6 = 0; PM7.6 = 0; }
#endif
//#define IRQ0_neg { PM3.0 = 1; }
// ↓誤代入防止 // ↓誤代入防止
#define RESET1_n ( P0.0 & 0x01 ) #define RESET1_n ( P0.0 & 0x01 )
#define RESET1_ast { P0.0 = 0; PM0.0 = 0; } #define RESET1_ast { P0.0 = 0; PM0.0 = 0; }
#define RESET1_ngt { PM0.0 = 1; } #define RESET1_neg { PM0.0 = 1; }
#define RESETs_ast { P0 &= ~0x03; PM0 &= ~0x03; } #define RESETs_ast { P0 &= ~0x03; PM0 &= ~0x03; }
#define RESETs_ngt { PM0.0 = 1; P0.1 = 1; } #define RESETs_neg { PM0.0 = 1; P0.1 = 1; }
#define RESET2_ast { P0.1 = 0; } #define RESET2_ast { P0.1 = 0; }
#define RESET2_ngt { P0.1 = 1; } #define RESET2_neg { P0.1 = 1; }
#define SLP_REQ P12.0 #define SLP_REQ P12.0
// FCRAM // FCRAM
#ifndef _PMIC_CTR_
#define FCRAM_RST P14.0 #define FCRAM_RST P14.0
#define FCRAM_RST_ast { P14.0 = 0; } #define FCRAM_RST_ast { P14.0 = 0; }
#define FCRAM_RST_ngt { P14.0 = 1; } #define FCRAM_RST_neg { P14.0 = 1; }
#else
#define FCRAM_RST P3.0
#define FCRAM_RST_ast { P3.0 = 0; }
#define FCRAM_RST_neg { P3.0 = 1; }
#endif
// CODEC // CODEC
#define PM_IRQ P7.2 // INTP6 #define PM_IRQ P7.2 // INTP6
#ifndef _PMIC_CTR_
#define SND_DEPOP P7.7 #define SND_DEPOP P7.7
#else
#define SLP_O P7.7
#endif
// PM // PM
#define PM_EXTDC P7.0 // INTP7 #define PM_EXTDC P7.0 // INTP7
@ -75,12 +87,21 @@ extern unsigned char temp_teg;
//#define BT_DET P15.1 // ANI9 //#define BT_DET P15.1 // ANI9
#define BT_DET_P P1.6 #define BT_DET_P P1.6
#define BT_TEMP_P P1.7 #define BT_TEMP_P P1.7
#ifndef _PMIC_CTR_
#define BT_CHG_EN P4.2 #define BT_CHG_EN P4.2
#else
#define BT_CHG_EN P4.3
#endif
#define BT_CHG_ERR_n P5.0 #define BT_CHG_ERR_n P5.0
#define BT_CHG_n P5.1 #define BT_CHG_n P5.1
#ifdef _PMIC_TWL_
#define PM_BT_AUTH P12.1 #define PM_BT_AUTH P12.1
#else
#define PM_BT_AUTH P4.2
#endif
#define SW_2D3D_n P2.0 #define SW_TUNE_n P2.0
#define SW_WIFI_n P7.4 // KR4 #define SW_WIFI_n P7.4 // KR4
#define SW_POW_n P7.3 // KR3 #define SW_POW_n P7.3 // KR3
#define SW_HOME_n P20.4 // INTP22 #define SW_HOME_n P20.4 // INTP22
@ -98,7 +119,7 @@ extern unsigned char temp_teg;
//#define LED_CAM P1.0 // TO02 //#define LED_CAM P1.0 // TO02
//#define LED_WIFI P1.1 // TO03 //#define LED_WIFI P1.1 // TO03
//#define LED_3D P5.2 // TO04(SLTO) //#define LED_TUNE P5.2 // TO04(SLTO)
//#define LED_CHARGE P1.3 // TO05 //#define LED_CHARGE P1.3 // TO05
//#define LED_POW2 P1.4 // TO06 ( 青 ) //#define LED_POW2 P1.4 // TO06 ( 青 )
//#define LED_POW1 P1.5 // TO07 ( 赤 ) //#define LED_POW1 P1.5 // TO07 ( 赤 )

View File

@ -17,9 +17,11 @@ u8 vreg_ctr[ VREG_C_ENDMARK_ ];
// ******************************************************** // ********************************************************
#define IRQ0_ngt { PM3.0 = 1; } #ifndef _PMIC_CTR_
#define IRQ0_neg { PM3.0 = 1; }
#else
#define IRQ0_neg { PM7.6 = 1; }
#endif
// ******************************************************** // ********************************************************
// 非ゼロの初期値の指定が必要なアドレス // 非ゼロの初期値の指定が必要なアドレス
@ -46,6 +48,7 @@ void vreg_ctr_write( u8 adrs, u8 data ){
switch( adrs ){ switch( adrs ){
case( VREG_C_IRQ_MASK0 ): case( VREG_C_IRQ_MASK0 ):
case( VREG_C_IRQ_MASK1 ): case( VREG_C_IRQ_MASK1 ):
case( VREG_C_IRQ_MASK2 ):
vreg_ctr[ adrs ] = data; vreg_ctr[ adrs ] = data;
break; break;
@ -59,7 +62,17 @@ void vreg_ctr_write( u8 adrs, u8 data ){
case( VREG_C_COMMAND1 ): case( VREG_C_COMMAND1 ):
vreg_ctr[ adrs ] = data; vreg_ctr[ adrs ] = data;
if( data != 0 ){ if( data != 0 ){
renge_task_immed_add( do_command1 ); // renge_task_immed_add( do_command1 );
// 持ってきました
vreg_twl[ REG_TWL_ADRS_IRQ ] = (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_PWSW_DET ) != 0 )? REG_BIT_TWL_IRQ_PWSW_DET: 0x00; //pwsw_det
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_RESET ) != 0 )? REG_BIT_TWL_IRQ_RESET: 0x00; //reset_req
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_OFF ) != 0 )? REG_BIT_TWL_IRQ_OFF: 0x00; //off_req
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_BT_LOW ) != 0 )? REG_BIT_TWL_IRQ_BT_LOW: 0x00; //batt_low
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_BT_EMPTY ) != 0 )? REG_BIT_TWL_IRQ_BT_EMPTY: 0x00; //batt_empty
vreg_twl[ REG_TWL_ADRS_IRQ ] |= (( vreg_ctr[ VREG_C_COMMAND1 ] & REG_BIT_TWL_CMD_VOL_CHANGE ) != 0 )? REG_BIT_TWL_IRQ_VOL_CHANGE: 0x00; //vol_changed
} }
break; break;
@ -108,7 +121,7 @@ void vreg_ctr_write( u8 adrs, u8 data ){
case( VREG_C_ACC_CONFIG_HOSU ): case( VREG_C_ACC_CONFIG_HOSU ):
case( VREG_C_ACC_CONFIG ): case( VREG_C_ACC_CONFIG ):
vreg_ctr[ adrs ] = data; vreg_ctr[ adrs ] = data;
renge_task_immed_add( acc_set ); renge_task_immed_add( acc_hosu_set );
break; break;
case( VREG_C_ACC_R_ADRS ): case( VREG_C_ACC_R_ADRS ):
@ -195,12 +208,12 @@ void vreg_ctr_after_read( u8 adrs ){
// 読んだらクリア // 読んだらクリア
case( VREG_C_IRQ0 ): vreg_ctr[ VREG_C_IRQ0 ] = 0; break; case( VREG_C_IRQ0 ): vreg_ctr[ VREG_C_IRQ0 ] = 0; break;
case( VREG_C_IRQ1 ): vreg_ctr[ VREG_C_IRQ1 ] = 0; break; case( VREG_C_IRQ1 ): vreg_ctr[ VREG_C_IRQ1 ] = 0; break;
case( VREG_C_MCU_STATUS ): vreg_ctr[ VREG_C_MCU_STATUS ] = 0; break; case( VREG_C_IRQ2 ): vreg_ctr[ VREG_C_IRQ2 ] = 0x02; break; // 暫定
} }
if(( adrs == VREG_C_IRQ0 ) || ( adrs == VREG_C_IRQ1 )){ if(( adrs == VREG_C_IRQ0 ) || ( adrs == VREG_C_IRQ1 ) || ( adrs == VREG_C_IRQ2 )){
if(( vreg_ctr[ VREG_C_IRQ0 ] == 0 ) && ( vreg_ctr[ VREG_C_IRQ1 ] == 0 )){ if(( vreg_ctr[ VREG_C_IRQ0 ] == 0 ) && ( vreg_ctr[ VREG_C_IRQ1 ] == 0 ) && ( vreg_ctr[ VREG_C_IRQ2 ] == 0x02 )){ // 暫定
IRQ0_ngt; IRQ0_neg;
} }
} }
return; return;

View File

@ -2,16 +2,15 @@
#define __vreg_ctr__ #define __vreg_ctr__
#define REG_BITS_RTC_BLACKOUT 0b00000001 #define REG_BIT_RTC_BLACKOUT 0b00000001
#define REG_BIT__SYS_MODE0 0b01000000
#define REG_BIT_MCU_FIRMBROKEN 0b10000000 #define REG_BIT_MCU_FIRMBROKEN 0b10000000
#define REG_BIT_IRQ0_MCUSTATUS 0b01000000
// VREG_C_IRQ0 // VREG_C_IRQ0
#define REG_BIT_VR_SNDVOL_CHANGE ( 1 << 7 ) #define REG_BIT_VR_SNDVOL_CHANGE ( 1 << 7 )
#define REG_BIT_VR_3D_CHANGE ( 1 << 6 ) #define REG_BIT_VR_TUNE_CHANGE ( 1 << 6 )
#define REG_BIT_SW_3D_CLICK ( 1 << 5 ) #define REG_BIT_SW_TUNE_CLICK ( 1 << 5 )
#define REG_BIT_SW_WIFI_CLICK ( 1 << 4 ) #define REG_BIT_SW_WIFI_CLICK ( 1 << 4 )
#define REG_BIT_SW_POW_HOLD ( 1 << 3 ) #define REG_BIT_SW_POW_HOLD ( 1 << 3 )
#define REG_BIT_SW_POW_CLICK ( 1 << 2 ) #define REG_BIT_SW_POW_CLICK ( 1 << 2 )
@ -28,13 +27,14 @@
#define REG_BIT_BT_REMAIN ( 1 << 1 ) #define REG_BIT_BT_REMAIN ( 1 << 1 )
#define REG_BIT_STAT_CHANGE ( 1 << 0 ) #define REG_BIT_STAT_CHANGE ( 1 << 0 )
// VREG_C_STATUS, // VREG_C_STATUS0,
#define REG_BIT_BATT_CHARGE_ERR ( 1 << 5 ) #define REG_BIT_BATT_CHARGE_ERR ( 1 << 5 )
#define REG_BIT_BATT_CHARGE ( 1 << 4 ) #define REG_BIT_BATT_CHARGE ( 1 << 4 )
#define REG_BIT_POW_SUPPLY ( 1 << 3 ) #define REG_BIT_POW_SUPPLY ( 1 << 3 )
#define REG_BIT_EXT_OPT_LOCK ( 1 << 2 ) #define REG_BIT_EXT_OPT_LOCK ( 1 << 2 )
#define REG_BIT_SHELL_CLOSE ( 1 << 1 ) #define REG_BIT_SHELL_CLOSE ( 1 << 1 )
#define REG_BIT_BL ( 1 << 0 ) #define REG_BIT_BL ( 1 << 6 )
#define REG_BIT_LCD_POW ( 1 << 7 )
// VREG_C_COMMAND0 // VREG_C_COMMAND0
@ -42,6 +42,10 @@
#define REG_BIT_RESET2_REQ ( 1 << 2 ) #define REG_BIT_RESET2_REQ ( 1 << 2 )
#define REG_BIT_RESET1_REQ ( 1 << 1 ) #define REG_BIT_RESET1_REQ ( 1 << 1 )
#define REG_BIT_OFF_REQ ( 1 << 0 ) #define REG_BIT_OFF_REQ ( 1 << 0 )
#define REG_BIT_BL_ON ( 1 << 5 )
#define REG_BIT_BL_OFF ( 1 << 4 )
#define REG_BIT_LCD_ON ( 1 << 7 )
#define REG_BIT_LCD_OFF ( 1 << 6 )
// VREG_C_COMMAND1 // VREG_C_COMMAND1
#define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 ) #define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 )
@ -56,6 +60,24 @@
#define REG_BIT_WIFI_ON ( 1 << 0 ) #define REG_BIT_WIFI_ON ( 1 << 0 )
// command2
#define REG_BIT_TWL_CMD_PWSW_DET 0x01
#define REG_BIT_TWL_CMD_RESET 0x02
#define REG_BIT_TWL_CMD_OFF 0x04
#define REG_BIT_TWL_CMD_BT_LOW 0x08
#define REG_BIT_TWL_CMD_BT_EMPTY 0x10
#define REG_BIT_TWL_CMD_VOL_CHANGE 0x20
// <20>ªTWL¤
#define REG_BIT_TWL_IRQ_PWSW_DET 0x80
#define REG_BIT_TWL_IRQ_RESET 0x01
#define REG_BIT_TWL_IRQ_OFF 0x02
#define REG_BIT_TWL_IRQ_BT_LOW 0x20
#define REG_BIT_TWL_IRQ_BT_EMPTY 0x10
#define REG_BIT_TWL_IRQ_VOL_CHANGE 0x40
/* /*
#define REG_BIT_ ( 1 << 7 ) #define REG_BIT_ ( 1 << 7 )
@ -77,16 +99,18 @@ extern u8 vreg_ctr[];
enum VREG_C{ // 未定義アドレスへ書き込んだ際の動作は不定 enum VREG_C{ // 未定義アドレスへ書き込んだ際の動作は不定
VREG_C_IRQ0, VREG_C_IRQ0,
VREG_C_IRQ1, VREG_C_IRQ1,
VREG_C_IRQ2,
VREG_C_STATUS, VREG_C_STATUS0,
VREG_C_STATUS1,
VREG_C_IRQ_MASK0, VREG_C_IRQ_MASK0,
VREG_C_IRQ_MASK1, VREG_C_IRQ_MASK1,
VREG_C_RESERVED0, VREG_C_IRQ_MASK2,
VREG_C_BT_REMAIN, VREG_C_TUNE = 0x08,
VREG_C_SND_VOL, VREG_C_SND_VOL,
VREG_C_3D_DEPTH, VREG_C_BT_REMAIN,
VREG_C_COMMAND0, VREG_C_COMMAND0,
VREG_C_COMMAND1, VREG_C_COMMAND1,
@ -98,31 +122,27 @@ enum VREG_C{ //
VREG_C_CAM_LED, VREG_C_CAM_LED,
VREG_C_MCU_VER_MAJOR, VREG_C_MCU_VER_MAJOR = 0x11,
VREG_C_MCU_VER_MINOR, VREG_C_MCU_VER_MINOR,
VREG_C_MCU_STATUS, VREG_C_MCU_STATUS,
//VREG_C_PM_INFO,
//VREG_C_BT_INFO,
VREG_C_VCOM_T, VREG_C_VCOM_T,
VREG_C_VCOM_B, VREG_C_VCOM_B,
// VREG_C_VCS_T, VREG_C_PM_INFO, // ¢Žg—p
// VREG_C_VCS_B, VREG_C_BT_INFO, // ¢Žg—p
VREG_C_RESERVED3,
VREG_C_RESERVED4,
VREG_C_BT_TEMP, VREG_C_BT_TEMP,
VREG_C_RESERVED1, VREG_C_RESERVED1,
VREG_C_RTC_SEC, VREG_C_RTC_SEC = 0x1A,
VREG_C_RTC_MIN, VREG_C_RTC_MIN,
VREG_C_RTC_HOUR, VREG_C_RTC_HOUR,
VREG_C_RTC_YOBI, VREG_C_RTC_YOBI,
VREG_C_RTC_DAY, VREG_C_RTC_DAY,
VREG_C_RTC_MONTH, VREG_C_RTC_MONTH,
VREG_C_RTC_YEAR, VREG_C_RTC_YEAR,
VREG_C_RESERVED2, VREG_C_RESERVED2, // ¢Žg—p
VREG_C_RTC_ALARM_MIN, VREG_C_RTC_ALARM_MIN,
VREG_C_RTC_ALARM_HOUR, VREG_C_RTC_ALARM_HOUR,
VREG_C_RTC_ALARM_DAY, VREG_C_RTC_ALARM_DAY,
@ -130,17 +150,13 @@ enum VREG_C{ //
VREG_C_RTC_ALARM_YEAR, VREG_C_RTC_ALARM_YEAR,
VREG_C_RTC_COMP, VREG_C_RTC_COMP,
VREG_C_ACC_CONFIG_HOSU, VREG_C_ACC_CONFIG_HOSU = 0x28,
VREG_C_ACC_CONFIG, VREG_C_ACC_CONFIG,
VREG_C_ACC_R_ADRS, VREG_C_ACC_R_ADRS,
VREG_C_RESERVED5, VREG_C_RESERVED5,
VREG_C_ACC_W_ADRS, VREG_C_ACC_W_ADRS,
VREG_C_ACC_W_BUF, VREG_C_ACC_W_BUF,
VREG_C_ACC_HOSU_L,
VREG_C_ACC_HOSU_M,
VREG_C_ACC_HOSU_H,
VREG_C_ACC_XL, VREG_C_ACC_XL,
VREG_C_ACC_XH, VREG_C_ACC_XH,
VREG_C_ACC_YL, VREG_C_ACC_YL,
@ -148,9 +164,14 @@ enum VREG_C{ //
VREG_C_ACC_ZL, VREG_C_ACC_ZL,
VREG_C_ACC_ZH, VREG_C_ACC_ZH,
VREG_C_ACC_HOSU_L = 0x34,
VREG_C_ACC_HOSU_M,
VREG_C_ACC_HOSU_H,
VREG_C_ACC_HOSU_HIST,
VREG_C_DIAG, VREG_C_DIAG,
VREG_C_FREE0, VREG_C_FREE0 = 0x39,
VREG_C_FREE1, VREG_C_FREE1,
VREG_C_FREE2, VREG_C_FREE2,
VREG_C_FREE3, VREG_C_FREE3,

View File

@ -165,7 +165,9 @@ u8 adrs_table_twl_ext2int( u8 img ){
======================================================== */ ======================================================== */
task_status_immed command_from_twl(){ task_status_immed command_from_twl(){
vreg_ctr[ VREG_C_IRQ1 ] |= ( 1 << REG_BIT_TWL_RESET_REQ ); vreg_ctr[ VREG_C_IRQ2 ] |= REG_BIT_TWL_RESET_REQ;
IRQ0_ast; if( ( vreg_ctr[ VREG_C_IRQ_MASK2 ] & REG_BIT_TWL_RESET_REQ ) != 0 ){
IRQ0_ast;
}
return( ERR_FINISED ); return( ERR_FINISED );
} }

View File

@ -83,11 +83,6 @@ enum REG_TWL_ADRS_INT{
}; };
#define REG_BIT_TWL_RESET_REQ 6
/* ========================================================================= */ /* ========================================================================= */

View File

@ -1,13 +1,5 @@
C:\WINDOWS\system32\cmd.exe /c echo touch magic.c C:\WINDOWS\system32\cmd.exe /c echo touch magic.c
touch magic.c touch magic.c
"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\bin\cc78k0r.exe" -cF100964 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -irenge -i"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r" -ms -qcjl1wtg -sainter_asm -zp -w0 -no loader.c
Compilation complete, 0 error(s) and 0 warning(s) found.
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\ra78k0r.exe" -cF100964 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff inter_asm\loader.asm
Assembly complete, 0 error(s) and 0 warning(s) found.
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\lk78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -obsr_k0r.lmf "..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r\s0rml.rel" -go85h,0FC00h,1024 -gi0FFFFFFFFFFFFFFFFFFFFh -pbsr_k0r.map -nkd -kp -gb6EFBFFh -b"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib" -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r" -dbsr_mcu.dr -s -w0 loader.rel pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_twl.rel ini_VECT.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel tasks.rel adc.rel renge.rel tasks_sys.rel accero.rel self_flash.rel
Link complete, 0 error(s) and 0 warning(s) found.
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\oc78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -o.\bsr.hex -nu -ki bsr_k0r.lmf
Object Conversion Complete, 0 error(s) and 0 warning(s) found.
C:\WINDOWS\system32\cmd.exe /c ruby C:\Cygwin\home\fujita_ryohei\ctr\nec_s_2_bsrbin.rb bsr.hex C:\WINDOWS\system32\cmd.exe /c ruby C:\Cygwin\home\fujita_ryohei\ctr\nec_s_2_bsrbin.rb bsr.hex
C:/Cygwin/home/fujita_ryohei/ctr/nec_s_2_bsrbin.rb:2: warning: variable $KCODE is no longer effective; ignored C:/Cygwin/home/fujita_ryohei/ctr/nec_s_2_bsrbin.rb:2: warning: variable $KCODE is no longer effective; ignored

File diff suppressed because it is too large Load Diff

View File

@ -1,24 +1,20 @@
[ProjectManager] [ProjectManager]
FrameMax=1 FrameMax=1
FrameX=184 FrameX=35
FrameY=9 FrameY=0
FrameCX=1375 FrameCX=1375
FrameCY=1183 FrameCY=1183
OpenFile1=vreg_ctr.h,0,88,88,1332,845,19,158,0,0 OpenFile1=adc.c,0,240,258,1484,1015,21,127,19,0
OpenFile2=incs_loader.h,0,198,198,1442,955,4,25,1,0 OpenFile2=ini_VECT.c,0,286,286,1530,1043,0,23,0,0
OpenFile3=WDT.h,0,242,242,1486,999,40,4,40,0 OpenFile3=loader.c,0,308,308,1552,1065,2,179,4,0
OpenFile4=renge\\..\incs.h,0,68,451,1312,1208,0,9,0,0 OpenFile4=config.h,0,508,49,1752,806,19,18,19,0
OpenFile5=magic.c,0,307,203,1275,828,0,15,0,0 OpenFile5=renge\renge_task_immediate.h,0,268,108,1512,865,0,1,0,0
OpenFile6=fsl_user.h,0,330,330,1574,1087,53,63,53,0 OpenFile6=renge\renge_defs.h,0,378,363,1622,1120,0,1,0,0
OpenFile7=renge\renge_task_immediate.h,0,243,127,1487,884,0,1,0,0 OpenFile7=ProjectWindow
OpenFile8=renge\renge.c,0,270,117,1514,874,45,105,45,0 PrjPos=0,6,758,2,252
OpenFile9=i2c_twl.c,0,110,110,1354,867,0,7,27,0 OpenFile8=renge\renge.h,0,280,181,1524,938,0,1,0,0
OpenFile10=loader.c,0,352,69,1596,826,26,77,26,0 OpenFile9=OutputWindow
OpenFile11=OutputWindow OutputPos=0,704,1089,701,1562
OutputPos=0,541,1089,701,1562
OpenFile12=ProjectWindow
PrjPos=0,0,752,0,250
OpenFile13=self_flash.c,0,220,220,1464,977,0,254,0,0
ActivePRJ=yav_mcu_bsr.prj ActivePRJ=yav_mcu_bsr.prj
[ProjectWindow] [ProjectWindow]
ProjectWindowDispType=0 ProjectWindowDispType=0

View File

@ -1,7 +1,7 @@
[SdbInfo] [SdbInfo]
Ver=5 Ver=5
[loader.c] [loader.c]
T=4aa4e4e3 T=4aa7256f
1=incs_loader.h 1=incs_loader.h
2=fsl.h 2=fsl.h
3=fsl_user.h 3=fsl_user.h
@ -10,13 +10,13 @@ T=4aa4e4e3
6=pm.h 6=pm.h
7=rtc.h 7=rtc.h
[pm.c] [pm.c]
T=4a9e6e71 T=4aa7a33d
1=incs_loader.h 1=incs_loader.h
2=adc.h 2=adc.h
3=led.h 3=led.h
4=pm.h 4=pm.h
[i2c_ctr.c] [i2c_ctr.c]
T=4a9e6e71 T=4aa79d0f
1=incs.h 1=incs.h
[main.c] [main.c]
T=4a9e6e71 T=4a9e6e71
@ -31,25 +31,25 @@ T=4aa4d76e
T=4a9e6e71 T=4a9e6e71
1=incs_loader.h 1=incs_loader.h
[i2c_mcu.c] [i2c_mcu.c]
T=4a9e6e71 T=4aa62b41
1=incs_loader.h 1=incs.h
2=i2c_mcu.h 2=i2c_mcu.h
[i2c_twl.c] [i2c_twl.c]
T=4a9e6e71 T=4aa76932
1=incs.h 1=incs.h
2=i2c_twl_defs.h 2=i2c_twl_defs.h
[ini_VECT.c] [ini_VECT.c]
T=4a8a91dd T=4aa7640c
1=config.h 1=config.h
[led.c] [led.c]
T=4a9e6e71 T=4aa79cca
1=incs.h 1=incs.h
2=led.h 2=led.h
[rtc.c] [rtc.c]
T=4a9e6e71 T=4aa5d679
1=incs.h 1=incs.h
[vreg_ctr.c] [vreg_ctr.c]
T=4a9f065a T=4aa79e8f
1=incs.h 1=incs.h
2=vreg_ctr.h 2=vreg_ctr.h
3=rtc.h 3=rtc.h
@ -57,27 +57,29 @@ T=4a9f065a
5=accero.h 5=accero.h
6=pm.h 6=pm.h
[vreg_twl.c] [vreg_twl.c]
T=4a9e6e71 T=4aa79102
1=incs.h 1=incs.h
2=jhl_defs.h 2=jhl_defs.h
3=vreg_twl.h 3=vreg_twl.h
[tasks.c] [tasks.c]
T=4aa0b01d T=4aa7a3d8
1=incs.h 1=incs.h
2=renge\renge.h
3=pm.h
[adc.c] [adc.c]
T=4a9e6e71 T=4aa79102
1=incs_loader.h 1=incs.h
2=adc.h 2=adc.h
3=pm.h 3=pm.h
4=led.h 4=led.h
5=..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\inc78k0r\assert.h
[renge\renge.c] [renge\renge.c]
T=4a7d2b02 T=4aa7959d
1=renge\renge_task_intval.h 1=renge\renge_defs.h
2=renge\renge_task_immediate.h 2=renge\renge_task_intval.h
3=WDT.h 3=renge\renge_task_immediate.h
4=WDT.h
[tasks_sys.c] [tasks_sys.c]
T=4aa4c968 T=4aa79884
1=incs.h 1=incs.h
2=i2c_twl.h 2=i2c_twl.h
3=i2c_ctr.h 3=i2c_ctr.h
@ -86,10 +88,10 @@ T=4aa4c968
6=pm.h 6=pm.h
7=rtc.h 7=rtc.h
[accero.c] [accero.c]
T=4a9e6e71 T=4aa79c1f
1=incs.h 1=incs.h
[self_flash.c] [self_flash.c]
T=4aa4698a T=4aa79d0f
1=incs_loader.h 1=incs_loader.h
2=fsl.h 2=fsl.h
3=fsl_user.h 3=fsl_user.h
@ -107,24 +109,24 @@ T=4a9e6e71
[jhl_defs.h] [jhl_defs.h]
T=4a9e6e71 T=4a9e6e71
[user_define.h] [user_define.h]
T=4a9e6e71 T=4aa74fb6
1=config.h 1=config.h
[config.h] [config.h]
T=4aa0a25c T=4aa768d4
[bsr_system.h] [bsr_system.h]
T=4a023057 T=4aa78748
1=jhl_defs.h 1=jhl_defs.h
[renge\renge.h] [renge\renge.h]
T=4a548ddd T=4a548ddd
1=renge\renge_defs.h 1=renge\renge_defs.h
2=renge\renge_task_immediate.h 2=renge\renge_task_immediate.h
[renge\renge_defs.h] [renge\renge_defs.h]
T=4a5547e1 T=4aa79102
[renge\renge_task_immediate.h] [renge\renge_task_immediate.h]
T=4a8a7575 T=4a8a7575
1=renge\renge_defs.h 1=renge\renge_defs.h
[vreg_ctr.h] [vreg_ctr.h]
T=4a9f09c2 T=4aa7a193
[loader.h] [loader.h]
T=4a7a31d0 T=4a7a31d0
1=jhl_defs.h 1=jhl_defs.h
@ -139,14 +141,14 @@ T=4a7bf458
[i2c_ctr.h] [i2c_ctr.h]
T=4a7c0777 T=4a7c0777
[pm.h] [pm.h]
T=4a9e6e71 T=4aa7a30d
[rtc.h] [rtc.h]
T=4a9e6e71 T=4a9e6e71
[adc.h] [adc.h]
T=4a2e6395 T=4aa74fb6
1=jhl_defs.h 1=jhl_defs.h
[led.h] [led.h]
T=4a8aa5ff T=4aa74fb6
[incs.h] [incs.h]
T=4a9e6e71 T=4a9e6e71
1=jhl_defs.h 1=jhl_defs.h
@ -157,16 +159,14 @@ T=4a9e6e71
6=vreg_twl.h 6=vreg_twl.h
7=i2c_mcu.h 7=i2c_mcu.h
[vreg_twl.h] [vreg_twl.h]
T=4a9e6e71 T=4aa79c31
[accero.h] [accero.h]
T=4a9e6e71 T=4aa7853b
1=jhl_defs.h 1=jhl_defs.h
[i2c_twl_defs.h] [i2c_twl_defs.h]
T=4a7c074e T=4a7c074e
[..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\inc78k0r\assert.h]
T=440fd290
[renge\renge_task_intval.h] [renge\renge_task_intval.h]
T=4a78118b T=4aa787f2
1=renge\renge_defs.h 1=renge\renge_defs.h
[i2c_twl.h] [i2c_twl.h]
T=4a7c0786 T=4a7c0786