mirror of
https://github.com/rvtr/twl_mcu.git
synced 2025-06-18 06:35:40 -04:00
218 lines
9.0 KiB
C
218 lines
9.0 KiB
C
#ifndef _MDSERIAL_
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#define _MDSERIAL_
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/* IIC operation enable (IICE0) */
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#define IIC0_OPERATION 0x80
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#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */
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#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */
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/* Exit from communications (LREL0) */
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#define IIC0_COMMUNICATION 0x40
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#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */
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#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */
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/* Wait cancellation (WREL0) */
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#define IIC0_WAITCANCEL 0x20
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#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */
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#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */
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/* Generation of interrupt when stop condition (SPIE0) */
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#define IIC0_STOPINT 0x10
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#define IIC0_STOPINT_DISABLE 0x00 /* disable */
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#define IIC0_STOPINT_ENABLE 0x10 /* enable */
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/* Wait and interrupt generation (WTIM0) */
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#define IIC0_WAITINT 0x08
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#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */
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#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */
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/* Acknowledgement control (ACKE0) */
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#define IIC0_ACK 0x04
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#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */
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#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */
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/* Start condition trigger (STT0) */
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#define IIC0_STARTCONDITION 0x02
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#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */
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#define IIC0_START_GENERATE 0x02 /* generate start condition */
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/* Stop condition trigger (SPT0) */
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#define IIC0_STOPCONDITION 0x01
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#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */
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#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */
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/*
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IIC Status Register 0 (IICS0)
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*/
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/* Master device status (MSTS0) */
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#define IIC0_MASTERSTATUS 0x80
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#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */
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#define IIC0_STATUS_MASTER 0x80 /* master device communication status */
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/* Detection of arbitration loss (ALD0) */
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#define IIC0_ARBITRATION 0x40
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#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */
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#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */
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/* Detection of extension code reception (EXC0) */
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#define IIC0_EXTENSIONCODE 0x20
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#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */
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#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */
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/* Detection of matching addresses (COI0) */
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#define IIC0_ADDRESSMATCH 0x10
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#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */
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#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */
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/* Detection of transmit/receive status (TRC0) */
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#define IIC0_STATUS 0x08
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#define IIC0_STATUS_RECEIVE 0x00 /* receive status */
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#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */
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/* Detection of acknowledge signal (ACKD0) */
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#define IIC0_ACKDETECTION 0x04
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#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */
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#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */
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/* Detection of start condition (STD0) */
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#define IIC0_STARTDETECTION 0x02
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#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */
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#define IIC0_START_DETECTED 0x02 /* start condition detected */
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/* Detection of stop condition (SPD0) */
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#define IIC0_STOPDETECTION 0x01
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#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */
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#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */
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/*
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IIC Flag Register 0 (IICF0)
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*/
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/* STT0 clear flag (STCF) */
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#define IIC0_STARTFLAG 0x80
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#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */
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#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */
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/* IIC bus status flag (IICBSY) */
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#define IIC0_BUSSTATUS 0x40
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#define IIC0_BUS_RELEASE 0x00 /* bus release status */
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#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */
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/* Initial start enable trigger (STCEN) */
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#define IIC0_STARTWITHSTOP 0x02
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#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */
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#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */
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/* Communication reservation function disable bit (IICRSV) */
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#define IIC0_RESERVATION 0x01
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#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */
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#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */
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/*
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IIC clock selection register 0 (IICCL0)
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*/
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#define IICCL0_INITIALVALUE 0x00
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/* Detection of SCL0 pin level (CLD0) */
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#define IIC0_SCLLEVEL 0x20
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#define IIC0_SCL_LOW 0x00 /* clock line at low level */
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#define IIC0_SCL_HIGH 0x20 /* clock line at high level */
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/* Detection of SDA0 pin level (DAD0) */
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#define IIC0_SDALEVEL 0x10
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#define IIC0_SDA_LOW 0x00 /* data line at low level */
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#define IIC0_SDA_HIGH 0x10 /* data line at high level */
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/* Operation mode switching (SMC0) */
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#define IIC0_OPERATIONMODE 0x08
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#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */
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#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */
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/* Digital filter operation control (DFC0) */
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#define IIC0_DIGITALFILTER 0x04
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#define IIC0_FILTER_OFF 0x00 /* digital filter off */
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#define IIC0_FILTER_ON 0x04 /* digital filter on */
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/* Operation mode switching (CL01, CL00) */
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#define IIC0_CLOCKSELECTION 0x03
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/* Combine of (SMC0, CL01, CL00)*/
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#define IIC0_CLOCK0 0x00
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#define IIC0_CLOCK1 0x01
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#define IIC0_CLOCK2 0x02
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#define IIC0_CLOCK3 0x03
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#define IIC0_CLOCK4 0x08
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#define IIC0_CLOCK5 0x09
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#define IIC0_CLOCK6 0x0a
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#define IIC0_CLOCK7 0x0b
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/*
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IIC function expansion register 0 (IICX0)
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*/
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/* IIC clock expension (CLX0) */
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#define IIC0_CLOCKEXPENSION 0x01
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#define IIC0_EXPENSION0 0x00
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#define IIC0_EXPENSION1 0x01
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/* Operation clock (CLX0, SMC0, CL01, CL00)
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| IIC0_EXPENSION0 | IIC0_EXPENSION1 |
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw)
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| fprs/88 | | transfer clock
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| normal | | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw)
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| fprs/172 | | transfer clock
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| normal | | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw)
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| fprs/344 | | transfer clock
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| normal | | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw)
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| fw/66 | | transfer clock
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| normal | | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw)
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| fprs/48 | fprs/24 | transfer clock
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| high speed | high speed | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw)
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| fprs/48 | fprs/24 | transfer clock
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| high speed | high speed | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw)
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| fprs/96 | fprs/48 | transfer clock
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| high speed | high speed | mode
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------------|-------------------|-------------------|----------------------
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IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw)
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| fw/18 | | transfer clock
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| high speed | | mode
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------------|-------------------|-------------------|----------------------
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*/
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#define ADDRESS_COMPLETE 0x80
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#define IIC0_MASTER_FLAG_CLEAR 0x00
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/******************************************************************************
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* Macro define
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******************************************************************************/
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#define IIC0_SLAVEADDRESS 0x4A
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/******************************************************************************
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* Function define
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******************************************************************************/
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void IIC0_Init( void );
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void IIC0_SlaveSendStart( UCHAR* , UINT );
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void IIC0_SlaveReceiveStart();
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void IIC0_Stop( void );
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static void IIC0_getStCond( void );
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static void IIC0_Contents_Send( void );
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static void IIC0_Contents_Rcv( void );
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static void IIC0_parseContents( void );
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#endif
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