mirror of
https://github.com/rvtr/ctr_mcu.git
synced 2025-10-31 13:51:10 -04:00
V0.1 ソフト開発者の皆さんのTEG2ボードをこれにリセットしました。
既知の不具合 Vol値が突然不正になることがある。ADCの値がおかしい。 git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@3 013db118-44a6-b54f-8bf7-843cb86687b1
This commit is contained in:
parent
938ea96c94
commit
047644344a
8
trunk/WDT.h
Normal file
8
trunk/WDT.h
Normal file
@ -0,0 +1,8 @@
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#ifndef _WDT_
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#define _WDT_
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#define mcu_reset WDTE = 0x5A
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void WDT_Restart(void);
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#endif
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@ -54,20 +54,26 @@ u8 hosu_mode = 0;
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I2Cが使用中だったら?とか考えると私ではそこまでできないのです。
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・自動歩数計とかでも結局
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*****************************************************************************/
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task_status_immed tsk_cbk_accero(){
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task_status_immed tsk_cbk_accero(){ // (疑似)isrから登録されます
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static u8 sequence;
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u8* dest_adrs;
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if( system_status.pwr_state == ON ){
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// if( 自動歩数計? )
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// todo
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/*
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sequence += 1;
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vreg_ctr[VREG_C_ACC_0SEQ + 7 * ( sequence & 0x03 )] = sequence;
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dest_adrs = &vreg_ctr[VREG_C_ACC_0XH] + 7 * ( sequence & 0x03 );
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dest_adrs = &vreg_ctr[VREG_C_ACC_0XH] + 7 * ( sequence & 0x03 ) + 1;
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iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, dest_adrs );
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*/
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iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, &vreg_ctr[VREG_C_ACC_XH] );
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if(( vreg_ctr[ VREG_C_ACC_CONFIG ] & 0x03 ) == 1 ){
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vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_DAT_RDY;
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IRQ0_ast;
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}
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#if 0
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/*
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switch( system_status.pwr_state ){
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case OFF:
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case ON_TRIG:
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@ -78,13 +84,36 @@ task_status_immed tsk_cbk_accero(){
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default:
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break;
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}
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#endif
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*/
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}
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return( ERR_SUCCESS );
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}
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/*=========================================================
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加速度センサ透過アクセス リード
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========================================================*/
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task_status_immed acc_read(){
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vreg_ctr[VREG_C_ACC_R_BUF] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
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vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK;
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IRQ0_ast;
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return( ERR_SUCCESS );
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}
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/*=========================================================
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加速度センサ透過アクセス ライト
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========================================================*/
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task_status_immed acc_write(){
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vreg_ctr[VREG_C_ACC_R_BUF] = iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] );
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vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_ACC_ACK;
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IRQ0_ast;
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return( ERR_SUCCESS );
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}
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/*****************************************************************************
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自動歩数カウントモードにセット
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todo 他のモードだったら止めたり、復帰させたり
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@ -97,9 +126,9 @@ err accero_hosu_start(){
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if( system_status.pwr_state == ON ){
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err = iic_mcu_read( IIC_SLA_ACCEL, ACC_REG_WHOAMI, 1, &temp );
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if( err == ERR_NAK ){
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vreg_ctr[ VREG_C_ACC_STATUS ] |= 0x80;
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temp = iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI );
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if( iic_mcu_bus_status == ERR_NOSLAVE ){
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// vreg_ctr[ VREG_C_ACC_CONFIG_HOSU ] |= 0x01;
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return( ERR_ERR );
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}
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14
trunk/accero.h
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14
trunk/accero.h
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@ -0,0 +1,14 @@
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#ifndef _accero_
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#define _accero_
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#include "jhl_defs.h"
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task_status_immed tsk_cbk_accero();
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err accero_hosu_start();
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err accero_hosu_stop();
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#endif
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119
trunk/adc.c
119
trunk/adc.c
@ -9,6 +9,12 @@
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#include "adc.h"
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#include "pm.h"
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#include "led.h"
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#include <assert.h>
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bit adc_updated;
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/******************************************************************************
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ADC設定と、開始
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@ -21,22 +27,69 @@
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関係ありそうですが別のところで管理しています
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・PM_BT_DET,_P PM_init
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・8tics毎に呼ばれ、3チャンネル分取り込むとADCを停止します。
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タスク起動時、レジスタには前回の取り込み値が入っています。
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******************************************************************************/
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task_status tsk_adc(){
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task_interval tsk_adc(){
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static u8 old_3ddepth;
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static u8 old_sndvol;
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static u8 sndvol_codec;
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// static u8 bt_temp_old;
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if(( system_status.pwr_state == ON )
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|| ( system_status.pwr_state == SLEEP )){
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ADCEN = 1;
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ADM = 0b00011011; // セレクトモード、章圧、fCLK/6 ///ここから
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if( adc_updated ){
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ADPC = 0x07; // ADCポートのセレクト
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ADS = ADC_SEL_3D;
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ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける
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// 3D
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if( abs( old_3ddepth - vreg_ctr[ VREG_C_3D_DEPTH ] ) >= 4 ){
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old_3ddepth = vreg_ctr[ VREG_C_3D_DEPTH ];
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vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_3D_CHANGE;
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IRQ0_ast;
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}
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ADIF = 0;
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ADMK = 0;
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// Volume
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if( abs( old_sndvol - vreg_ctr[ VREG_C_SND_VOL ] ) >= 4 ){
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old_sndvol = vreg_ctr[ VREG_C_SND_VOL ];
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vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_VR_SNDVOL_CHANGE;
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IRQ0_ast;
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}
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return( 8 );
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// codecに伝える
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if( vreg_ctr[ VREG_C_SND_VOL ] != sndvol_codec ){
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sndvol_codec = vreg_ctr[ VREG_C_SND_VOL ];
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#ifdef _PMIC_TWL_
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{
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u8 temp;
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do{
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temp = iic_mcu_write_a_byte( IIC_SLA_DCP, 0, sndvol_codec );
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NOP();
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}while( temp != ERR_SUCCESS );
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}
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#else
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ほげほげ;
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#endif
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}
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adc_updated = 0;
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}
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ADCEN = 1;
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ADM = 0b00011011; // セレクトモード、章圧、fCLK/6 ///ここから
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ADPC = 0x06; // ADCポートのセレクト
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ADS = ADC_SEL_3D;
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NOP();
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NOP();
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NOP();
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NOP();
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NOP();
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ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける
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ADIF = 0;
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ADMK = 0;
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LED_duty_3D = (u16)( vreg_ctr[ VREG_C_3D_DEPTH ] );
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return( 8 );
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}
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}
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@ -47,19 +100,39 @@ task_status tsk_adc(){
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自前で次のチャンネル
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一通り終わったら止める
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*******************************************************************************/
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/*
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static u8 average( u8* dat ){
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static u8 ind;
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hist[i] = ADCRH;
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++i &= 0x03;
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return( (u8)( (u16)( hist[0] + hist[1] + hist[2] + hist[3] ) /4 ));
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}
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*/
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__interrupt void int_adc(){
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static u8 hist_3d_dep[4];
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static u8 hist_snd_vol[4];
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static u8 hist_bt_temp[4];
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u8 temp;
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switch( ADS ){
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case( ADC_SEL_3D ):
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vreg_ctr[ VREG_C_3D_DEPTH ] = ADCRH;
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break;
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case( ADC_SEL_VOL ):
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vreg_ctr[ VREG_C_VOL ] = ADCRH;
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// todo: テーブル引きなど
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temp = ADCRH;
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if( temp > 200 ){
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temp = 200;
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}
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vreg_ctr[ VREG_C_SND_VOL ] = temp;
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break;
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case( ADC_SEL_BATT_TEMP ):
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raw_adc_temperature = ADCR;
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raw_adc_temperature = ADCRH;
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break;
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case( ADC_SEL_BATT_DET ):
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@ -70,10 +143,11 @@ __interrupt void int_adc(){
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// if( ADS == ADC_SEL_BATT_DET ){
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// もっとまともな書き方がありそうだ
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if( ADS == ADC_SEL_BATT_TEMP ){ // 電池判別は電源投入の一回で良いよね
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ADCEN = 0; // いっそのこと、止めてしまう
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}else{
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if( ADS != ADC_SEL_BATT_TEMP ){ // 電池判別は電源投入の一回のみ
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ADS += 1; // 次のチャンネル
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}else{
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ADCEN = 0; // 止めてしまう
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adc_updated = 1;
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}
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}
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@ -89,15 +163,16 @@ u16 get_adc( u8 ch ){
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ADIF = 0;
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ADCEN = 1;
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ADM = 0b00011011; // セレクトモード、章圧、fCLK/6 ///ここから
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ADCS = 0;
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ADM = 0b00100011; // セレクトモード、章圧、fCLK/6 ///ここから
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ADPC = 0x07; // ADCポートのセレクト
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ADS = ch;
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ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける
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ADPC = 0x06; // ADCポートのセレクト
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ADS = ch;
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ADCS = 1; // AD開始。 /// ここまでに、1us以上開ける
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ADMK = 0;
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ADMK = 0;
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while( ADIF == 0 ){;}
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temp = ADCR;
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temp = ADCRH;
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ADCEN = 0;
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return( temp );
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15
trunk/adc.h
Normal file
15
trunk/adc.h
Normal file
@ -0,0 +1,15 @@
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#ifndef __adc__
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#define __adc__
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#include "jhl_defs.h"
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#define ADC_SEL_3D 0x06
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#define ADC_SEL_VOL 0x07
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#define ADC_SEL_BATT_TEMP 0x08
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#define ADC_SEL_BATT_DET 0x09
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u16 get_adc( u8 ch );
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#endif
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49
trunk/bsr_mcu.dr
Normal file
49
trunk/bsr_mcu.dr
Normal file
@ -0,0 +1,49 @@
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;;; 領域の定義
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;32kB = 0x7FFF
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MEMORY BCL0:(00000H, 01000H )
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;MEMORY BCL1:(01000H, 01000H )
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MEMORY ROM :(02000H, 02800H )
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MEMORY ROM_:(04800H, 02800H )
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MEMORY FSL :(07000H, 00C00H )
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;MEMORY OCD :(0FC00H, 00400H ) ; OCDが使っているらしい
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;;; セグメントの割当先設定
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; ブートブロック0に割り当てる
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MERGE @@LCODE: =BCL0 ; スタートアップルーチン
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MERGE LDR_CODE:=BCL0
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MERGE LDR_CODL:=BCL0
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;MERGE LDR_RINT:=BCL0
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;MERGE LDR_CNST:=BCL0
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MERGE LDR_CNSL:=BCL0
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; 通常領域にあてる物達
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MERGE ROM_CODE:=ROM
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;MERGE ROM_CNST:=ROM
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; ちょっと、困るんですが、こうしないと初期値がセットされない
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MERGE @@CNST: =ROM
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MERGE @@R_INIT: =ROM
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; 謹製フラッシュライブラリ
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MERGE FSL_CODE:=FSL
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; マジックナンバー
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;; magic.cの中で指定
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;--- RAM領域 -------------------------------------------------------
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;
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; RAM1,RAM2領域はユーザープログラムで使用しても良いですが、セルフプログラム時は
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; セルフプログラムのライブラリが使用するため、値は破壊されます。
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;
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memory RAM2 : (0FFE20H, 00C0H) ; セルフプログラム時、使用禁止領域
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;memory SLF_RAM : (0FFE00H ,0020H) ; Slef Program予約領域[使用禁止]
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memory RAM : (0FF900H, 0500H) ; ユーザーRAM領域
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;memory SLF_RAM : (0FF900H ,0020H) ; Slef Program予約領域[使用禁止]
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28
trunk/bsr_system.h
Normal file
28
trunk/bsr_system.h
Normal file
@ -0,0 +1,28 @@
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#ifndef __bsr_system__
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#define __bsr_system__
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#include "jhl_defs.h"
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|
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// イベントループのステート
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enum pwr_state_{
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OFF_TRIG = 0,
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OFF,
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ON_TRIG,
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ON,
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SLEEP_TRIG,
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SLEEP
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};
|
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|
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|
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// タスクシステムの状態情報など
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typedef struct{
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enum pwr_state_ pwr_state;
|
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u8 dipsw0 :1;
|
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u8 dipsw1 :1;
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u8 dipsw2 :1;
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}system_status_;
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|
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extern system_status_ system_status;
|
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|
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|
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#endif
|
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32
trunk/config.h
Normal file
32
trunk/config.h
Normal file
@ -0,0 +1,32 @@
|
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#ifndef __config__
|
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#define __config__
|
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|
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#define _debug_
|
||||
|
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#define _MODEL_TEG2_
|
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//#define _MODEL_WM0_
|
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//define _MODEL_CTR_
|
||||
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define _PMIC_TWL_
|
||||
#define _MCU_KE3_
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
#define _PMIC_TWL_
|
||||
#define _MCU_BSR_
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
#define _PMIC_CTR_
|
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#define _MCU_BSR_
|
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#define _CODEC_CTR_
|
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#endif
|
||||
|
||||
|
||||
#define MCU_VER_MAJOR 0;
|
||||
#define MCU_VER_MINOR 1;
|
||||
|
||||
|
||||
#endif
|
||||
358
trunk/fsl.h
Normal file
358
trunk/fsl.h
Normal file
@ -0,0 +1,358 @@
|
||||
/*==============================================================================================*/
|
||||
/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */
|
||||
/* Module = fsl.h */
|
||||
/* Version = V1.01 */
|
||||
/* Date = 28.03.2008 11:45:42 */
|
||||
/*==============================================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*==============================================================================================*/
|
||||
/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */
|
||||
/* a company of the NEC Electronics Corporation */
|
||||
/*==============================================================================================*/
|
||||
/* Purpose: */
|
||||
/* constant, type and function prototype definitions used by the FSL */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */
|
||||
/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */
|
||||
/* including but not limited to those for non-infringement of intellectual property, */
|
||||
/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
|
||||
/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of using the Product(s) */
|
||||
/* and assumes all risks associated with its exercise of rights under this Agreement, */
|
||||
/* including, but not limited to the risks and costs of program errors, compliance with */
|
||||
/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */
|
||||
/* or punitive damage (including but not limited to lost profits) regardless of whether */
|
||||
/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
|
||||
/* failure of essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. NEC shall not be liable for any services or products provided by third party */
|
||||
/* vendors, developers or consultants identified or referred to the User by NEC in connection */
|
||||
/* with the Product(s) and/or the Application. */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* Environment: PM plus (V6.30) */
|
||||
/* RA78K0(V1.20) */
|
||||
/* CC78K0(V2.00) */
|
||||
/*==============================================================================================*/
|
||||
|
||||
#ifndef __FSL_H_INCLUDED
|
||||
#define __FSL_H_INCLUDED
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* FSL type definitions */
|
||||
/*==============================================================================================*/
|
||||
typedef unsigned char fsl_u08;
|
||||
typedef unsigned int fsl_u16;
|
||||
typedef unsigned long int fsl_u32;
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* constant definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
/*status code definitions returned by the FSL functions */
|
||||
#define FSL_OK 0x00
|
||||
#define FSL_ERR_FLMD0 0x01
|
||||
#define FSL_ERR_PARAMETER 0x05
|
||||
#define FSL_ERR_PROTECTION 0x10
|
||||
#define FSL_ERR_ERASE 0x1A
|
||||
#define FSL_ERR_BLANKCHECK 0x1B
|
||||
#define FSL_ERR_IVERIFY 0x1B
|
||||
#define FSL_ERR_WRITE 0x1C
|
||||
#define FSL_ERR_EEP_IVERIFY 0x1D
|
||||
#define FSL_ERR_EEP_BLANKCHECK 0x1E
|
||||
#define FSL_ERR_INTERRUPTION 0x1F
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* global function prototypes */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: initialization of selfprogramming environment */
|
||||
/* After initialization: */
|
||||
/* - the pointer to the data-buffer is stored */
|
||||
/* - all timing data are re-calculated according to the used system clock */
|
||||
/* */
|
||||
/* CAUTION: */
|
||||
/* The FSL_Init(&data_buffer) function is interruptible. Please use the */
|
||||
/* FSL_Init_cont(&data_buffer) to recall it as long return status is 0x1F. */
|
||||
/* */
|
||||
/* Input: data_buffer_pu08 - pointer to a data buffer of N...256 bytes */
|
||||
/* (used for data exchange between firmware and application) */
|
||||
/* Output: - */
|
||||
/* Returned: u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means initialization OK */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), initialization interrupted by user interrupt*/
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Init(fsl_u08* data_buffer_pu08);
|
||||
extern fsl_u08 FSL_Init_cont(fsl_u08* data_buffer_pu08);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: checks the voltage level (high or low) at FLMD0 pin */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means FLMD0=HIGH */
|
||||
/* = 0x01(FSL_ERR_FLMD0), error, FLMD0=LOW */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_ModeCheck(void);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: checks if specified block is blank */
|
||||
/* Input: block_u16 - block number has to be checked */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block is blank" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x1B(FSL_ERR_BLANKCHECK), blank-check error, means "block not blank" */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), blank-check interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_BlankCheck(fsl_u16 block_u16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: erase specified block */
|
||||
/* Input: block_u16 - block number has to be erase */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block erased successfully" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), tried to erase protected area */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error, retry up to max. 255 times */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), erasing interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Erase(fsl_u16 block_u16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: performs internal verify on specified block */
|
||||
/* Input: block_u16 - block number has to be verified */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block is verified" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), verify interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_IVerify(fsl_u16 block_u16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: writes N words from the data buffer into flash */
|
||||
/* Input: s_address_u32 - starting flash address the data has to be written */
|
||||
/* See Condition 2) please. */
|
||||
/* my_wordcount_u08 - number of words (4 bytes) has to be written */
|
||||
/* Output: - */
|
||||
/* Condition: 1) (s_address_u32 MOD 4 == 0) */
|
||||
/* 2) most significant byte (MSB) of s_address_u32 has to be 0x00. */
|
||||
/* Means: 0x00abcdef 24 bit flash address allowed */
|
||||
/* 3) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY LIBRARY !!!!! */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1C(FSL_ERR_WRITE), write error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Write(fsl_u32 s_address_u32, fsl_u08 word_count_u08);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: writes N words from the data buffer into flash */
|
||||
/* Before "writing" a N-word blankcheck is performed. */
|
||||
/* After "writing" a N-Word internal verify is performed. */
|
||||
/* Input: s_address_u32 - starting destination address has to be written */
|
||||
/* my_wordcount_u08 - number of words (4 bytes) has to be written */
|
||||
/* Output: - */
|
||||
/* Condition: 1) (s_address_u32 MOD 4 == 0) */
|
||||
/* 2) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY FIRMWARE !!!!! */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1C(FSL_ERR_WRITE), write error */
|
||||
/* = 0x1D(FSL_ERR_EEP_IVERIFY), verify error */
|
||||
/* = 0x1E(FSL_ERR_EEP_BLANKCHECK), blankcheck error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_EEPROMWrite(fsl_u32 s_address_u32, fsl_u08 word_count_u08);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: reads the security information */
|
||||
/* Input: destination_pu16 - destination address of the security info */
|
||||
/* The format of the security info is: "unsigned short int" */
|
||||
/* */
|
||||
/* Format of the security info: */
|
||||
/* bit_0 = 0 -> chip erase command disabled, otherwise enabled */
|
||||
/* bit_1 = 0 -> block erase command disabled, otherwise enabled */
|
||||
/* bit_2 = 0 -> write command disabled, otherwise enabled */
|
||||
/* bit_4 = 0 -> boot-area re-programming disabled, otherwise enabled */
|
||||
/* bit_8...bit_15 = 03H -> last block of the boot-area */
|
||||
/* other bits = 1 */
|
||||
/* Output: - */
|
||||
/* Changed: content of the data_buffer */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetSecurityFlags(fsl_u16* destination_pu16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: read the boot flag i */
|
||||
/* Input: destination_pu08 - destination address of the bootflag info */
|
||||
/* The format of the boot-flag info is: "unsigned char" */
|
||||
/* The value of the boot info is 0x00 for cluster 0 and 0x01 for cluster 1. */
|
||||
/* Output: - */
|
||||
/* Changed: content of the data_buffer */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetActiveBootCluster(fsl_u08* destination_pu08);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: puts the last address of the specified block into *destination_pu32 */
|
||||
/* Input: *destination_pu32 - destination where the last-block-address */
|
||||
/* should be stored */
|
||||
/* block_u16 - block number of the last address is needed */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetBlockEndAddr(fsl_u32* destination_pu32, fsl_u16 block_u16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: puts the information about the protected flash area into the function parameter */
|
||||
/* Input: *start_block_pu16 - destination where the FSW start block should be stored */
|
||||
/* *end_block_pu16 - destination where the FSW end block should be stored */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetFlashShieldWindow(fsl_u16* start_block_pu16, fsl_u16* end_block_pu16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: defines a new Flash-Shield-Window area inside the flash memory */
|
||||
/* Input: start_block_u16 - starting block of the Flash-Shield-Window (FSW) */
|
||||
/* end_block_u16 - ending block of the flash-Shield-Window (FSW) */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SetFlashShieldWindow(fsl_u16 start_block_u16, fsl_u16 end_block_u16);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Swapping of bootcluster 0 and 1 */
|
||||
/* */
|
||||
/* CAUTION !!!! */
|
||||
/* After this function the boot cluster are immediately swapped */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SwapBootCluster(void);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: sets specified security flag by dedicated command-function. */
|
||||
/* */
|
||||
/* There are following security levels: */
|
||||
/* a) chip-erase protection (cannot be reset by programmer !!!) */
|
||||
/* b) block-erase protection (can be reset by chip-erase on programmer) */
|
||||
/* c) write protection (can be reset by chip-erase on programmer) */
|
||||
/* d) boot-cluster protection (cannot be reset by programmer !!!) */
|
||||
/* */
|
||||
/* CAUTION !!!! */
|
||||
/* Each security flag can be written by the application only once */
|
||||
/* */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SetChipEraseProtectFlag(void);
|
||||
extern fsl_u08 FSL_SetBlockEraseProtectFlag(void);
|
||||
extern fsl_u08 FSL_SetWriteProtectFlag(void);
|
||||
extern fsl_u08 FSL_SetBootClusterProtectFlag(void);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: defines the firmware operation method after interrupt service (ISR) execution. */
|
||||
/* Input: mode_u08 = 0x00, after RETI the firmware is continuing the interrupted command.*/
|
||||
/* = other, after RETI the firmware is interrupted with status 0x1F. */
|
||||
/* Changed: - */
|
||||
/* Returned: - */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern void FSL_SetInterruptMode(fsl_u08 mode_u08);
|
||||
|
||||
#endif
|
||||
108
trunk/fsl_user.h
Normal file
108
trunk/fsl_user.h
Normal file
@ -0,0 +1,108 @@
|
||||
/*==============================================================================================*/
|
||||
/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */
|
||||
/* Module = fsl_user.h */
|
||||
/* Version = V1.01 */
|
||||
/* Date = 28.03.2008 11:45:55 */
|
||||
/*==============================================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*==============================================================================================*/
|
||||
/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */
|
||||
/* a company of the NEC Electronics Corporation */
|
||||
/*==============================================================================================*/
|
||||
/* Purpose: */
|
||||
/* user configurable constant/macros of the selfprogramming library */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */
|
||||
/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */
|
||||
/* including but not limited to those for non-infringement of intellectual property, */
|
||||
/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
|
||||
/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of using the Product(s) */
|
||||
/* and assumes all risks associated with its exercise of rights under this Agreement, */
|
||||
/* including, but not limited to the risks and costs of program errors, compliance with */
|
||||
/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */
|
||||
/* or punitive damage (including but not limited to lost profits) regardless of whether */
|
||||
/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
|
||||
/* failure of essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. NEC shall not be liable for any services or products provided by third party */
|
||||
/* vendors, developers or consultants identified or referred to the User by NEC in connection */
|
||||
/* with the Product(s) and/or the Application. */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* Environment: PM plus (V6.30) */
|
||||
/* RA78K0(V1.20) */
|
||||
/* CC78K0(V2.00) */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
#ifndef __FSL_USER_H_INCLUDED
|
||||
#define __FSL_USER_H_INCLUDED
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* constant definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
/* specify the CPU frequency in [Hz], only 2MHz....20MHz allowed */
|
||||
#define FSL_SYSTEM_FREQUENCY 4000000
|
||||
|
||||
/* define whether low-voltage mode is used or not */
|
||||
/* #define FSL_LOW_VOLTAGE_MODE */
|
||||
|
||||
/* size of the common data buffer expressed in [bytes] */
|
||||
/* the data buffer is used for data-exchange between the firmware and the selflib. */
|
||||
//#define FSL_DATA_BUFFER_SIZE 256
|
||||
#define FSL_DATA_BUFFER_SIZE 0
|
||||
|
||||
|
||||
/* customizable interrupt controller configuration during selfprogramming period */
|
||||
/* Bit --7-------6-------5-------4-------3-------2-------1-------0---------------------- */
|
||||
/* MK0L: PMK5 PMK4 PMK3 PMK2 PMK1 PMK0 LVIMK WDTIMK */
|
||||
/* MK0H: SREMK0 SRMK0* STMK0* DMAMK1 DMAMK0 SREMK3 SRMK3 STMK3 */
|
||||
/* MK1L: TMMK03 TMMK02 TMMK01 TMMK00 IICMK0 SREMK1 SRMK1 STMK1* */
|
||||
/* MK1H: TMMK04 SREMK2 SRMK2 STMK2* KRMK RTCIMK RTCMK ADMK */
|
||||
/* MK2L: PMK10 PMK9 PMK8 PMK7 PMK6 TMMK07 TMMK06 TMMK05 */
|
||||
/* MK2H: 1 1 1 1 1 1 1 PMK11 */
|
||||
/*------------------------------------------------------------------------------------------ */
|
||||
/* */
|
||||
/* Examples: */
|
||||
/* ========= */
|
||||
/*#define FSL_MK0L_MASK 0xF7 -> allow INTP1 interrupt during selfprogramming */
|
||||
/*#define FSL_MK0H_MASK 0xEF -> allow DMA1 interrupt during selfprogramming */
|
||||
/*#define FSL_MK1L_MASK 0xBF -> allow TM02 interrupt during selfprogramming */
|
||||
/*#define FSL_MK1H_MASK 0xFF -> all interrupts disabled during selfprogramming */
|
||||
/*#define FSL_MK2L_MASK 0xF7 -> allow INTP6 interrupt during selfprogramming */
|
||||
/*#define FSL_MK2H_MASK 0xFF -> all interrupts disabled during selfprogramming */
|
||||
/*------------------------------------------------------------------------------------------ */
|
||||
#define FSL_MK0L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK0H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK1L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK1H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK2L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK2H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
|
||||
|
||||
/* FLMD0 control bit */
|
||||
#define FSL_FLMD0_HIGH {BECTL.7 = 1;}
|
||||
#define FSL_FLMD0_LOW {BECTL.7 = 0;}
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* switch interrupt backu functionality ON/OFF using #define/#undef */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* #define FSL_INT_BACKUP */
|
||||
#undef FSL_INT_BACKUP
|
||||
|
||||
|
||||
#endif
|
||||
4163
trunk/hex/bsr_V0R1_090819.hex
Normal file
4163
trunk/hex/bsr_V0R1_090819.hex
Normal file
File diff suppressed because it is too large
Load Diff
128
trunk/i2c_ctr.c
128
trunk/i2c_ctr.c
@ -5,13 +5,72 @@
|
||||
*******************************************************************************/
|
||||
#include "incs_loader.h"
|
||||
|
||||
u8 vreg_adrs;
|
||||
u8 pre_dat;
|
||||
|
||||
u16 tot;
|
||||
// u16 tot;
|
||||
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
|
||||
// ワーキングモデルはI2Cが逆
|
||||
#define ACKD ACKD1
|
||||
#define ACKE ACKE1
|
||||
#define COI COI1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICAPR0 IICAPR10
|
||||
#define IICRSV IICRSV1
|
||||
#define IICA IICA1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICAIF IICAIF1
|
||||
#define IICAMK IICAMK1
|
||||
#define IICAPR1 IICAPR11
|
||||
#define IICCTL0 IICCTL10
|
||||
#define IICE IICE1
|
||||
#define IICF IICF1
|
||||
#define IICS IICS1
|
||||
#define IICWH IICWH1
|
||||
#define IICWL IICWL1
|
||||
#define LREL LREL1
|
||||
#define SPD SPD1
|
||||
#define SPIE SPIE1
|
||||
#define STCEN STCEN1
|
||||
#define STD STD1
|
||||
#define SVA SVA1
|
||||
#define WREL WREL1
|
||||
#define WTIM WTIM1
|
||||
|
||||
|
||||
#else
|
||||
|
||||
#define ACKD ACKD0
|
||||
#define ACKE ACKE0
|
||||
#define COI COI0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAPR0 IICAPR00
|
||||
#define IICRSV IICRSV0
|
||||
#define IICA IICA0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAIF IICAIF0
|
||||
#define IICAMK IICAMK0
|
||||
#define IICAPR1 IICAPR10
|
||||
#define IICCTL0 IICCTL00
|
||||
#define IICE IICE0
|
||||
#define IICF IICF0
|
||||
#define IICS IICS0
|
||||
#define IICWH IICWH0
|
||||
#define IICWL IICWL0
|
||||
#define LREL LREL0
|
||||
#define SPD SPD0
|
||||
#define SPIE SPIE0
|
||||
#define STCEN STCEN0
|
||||
#define STD STD0
|
||||
#define SVA SVA0
|
||||
#define WREL WREL0
|
||||
#define WTIM WTIM0
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
*****************************************************************************/
|
||||
@ -24,9 +83,9 @@ enum{
|
||||
};
|
||||
|
||||
|
||||
#if 0
|
||||
/*
|
||||
// 1バイト送受の度に割り込みが発生するバージョン
|
||||
__interrupt void int_iica(){
|
||||
__interrupt void int_iic_ctr(){
|
||||
static u8 state = 0;
|
||||
static u8 reg_adrs;
|
||||
static u8 reg_adrs_internal;
|
||||
@ -101,35 +160,29 @@ __interrupt void int_iica(){
|
||||
DBG_P_n = 0;
|
||||
|
||||
}
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
||||
//#if 0
|
||||
//一度通信が始まったら終わるまで戻らないバージョン
|
||||
__interrupt void int_iica(){
|
||||
__interrupt void int_iic_ctr(){
|
||||
static u8 state = 0;
|
||||
static u8 reg_adrs;
|
||||
static u8 reg_adrs_internal;
|
||||
static u8 trx_buf;
|
||||
|
||||
|
||||
DBG_P_n = 1;
|
||||
|
||||
// 自局呼び出しに応答。
|
||||
// 初期化など
|
||||
WREL = 1; // ウェイト解除
|
||||
|
||||
DBG_P_n = 0;
|
||||
while( !IICAIF ){;}
|
||||
IICAIF = 0;
|
||||
DBG_P_n = 1;
|
||||
|
||||
// レジスタアドレス受信
|
||||
reg_adrs = IICA;
|
||||
WREL = 1;
|
||||
trx_buf = vreg_ctr_read( reg_adrs ); // データの準備をしておく
|
||||
// レジスタアドレス受信
|
||||
reg_adrs = IICA;
|
||||
WREL = 1;
|
||||
trx_buf = vreg_ctr_read( reg_adrs ); // データの準備をしておく
|
||||
|
||||
DBG_P_n = 0;
|
||||
while( !IICAIF ){;}
|
||||
IICAIF = 0;
|
||||
|
||||
@ -137,8 +190,8 @@ __interrupt void int_iica(){
|
||||
// リードされる
|
||||
if( !COI ){
|
||||
// リスタートで違うデバイスが呼ばれた!
|
||||
WREL = 1; // ウェイト解除?
|
||||
state = IIC_IDLE; // 終了処理
|
||||
WREL = 1; // ウェイト解除?
|
||||
state = IIC_IDLE; // 終了処理
|
||||
SPIE = 0;
|
||||
return;
|
||||
}else{
|
||||
@ -148,29 +201,26 @@ __interrupt void int_iica(){
|
||||
state = IIC_RX;
|
||||
}
|
||||
|
||||
DBG_P_n = 0;
|
||||
|
||||
if( state == IIC_TX ){ // 送信 //
|
||||
if( state == IIC_TX ){
|
||||
// 送信 //
|
||||
do{
|
||||
DBG_P_n = 1;
|
||||
IICA = trx_buf;
|
||||
vreg_ctr_after_read( reg_adrs ); // 読んだらクリアなどの処理
|
||||
reg_adrs += 1;
|
||||
trx_buf = vreg_ctr_read( reg_adrs );
|
||||
DBG_P_n = 0;
|
||||
while( !IICAIF ){;}
|
||||
IICAIF = 0;
|
||||
}while( ACKD );
|
||||
LREL = 1;
|
||||
|
||||
}else{ // 受信 //
|
||||
}else{
|
||||
// 受信 //
|
||||
SPIE = 1;
|
||||
do{
|
||||
DBG_P_n = 1;
|
||||
trx_buf = IICA;
|
||||
WREL = 1;
|
||||
vreg_ctr_write( reg_adrs, trx_buf );
|
||||
reg_adrs += 1;
|
||||
DBG_P_n = 0;
|
||||
while( !IICAIF ){;}
|
||||
IICAIF = 0;
|
||||
}while( !SPD );
|
||||
@ -181,14 +231,14 @@ __interrupt void int_iica(){
|
||||
}
|
||||
//#endif
|
||||
|
||||
/*****************************************************************************
|
||||
基本API
|
||||
*****************************************************************************/
|
||||
void IICA_Init( void ){
|
||||
|
||||
|
||||
/*****************************************************/
|
||||
void IIC_ctr_Init( void ){
|
||||
|
||||
IICAEN = 1;
|
||||
|
||||
IICE = 0; /* IICA disable */
|
||||
IICE = 0; /* IICA disable */
|
||||
|
||||
IICAMK = 1; /* INTIICA disable */
|
||||
IICAIF = 0; /* clear INTIICA interrupt flag */
|
||||
@ -196,13 +246,13 @@ void IICA_Init( void ){
|
||||
IICAPR0 = 0; /* set INTIICA high priority */
|
||||
IICAPR1 = 0; /* set INTIICA high priority */
|
||||
|
||||
P6 &= ~0x3;
|
||||
P6 &= ~0x3;
|
||||
|
||||
SVA = IIC_C_SLAVEADDRESS;
|
||||
IICF = 0x01;
|
||||
SVA = IIC_C_SLAVEADDRESS;
|
||||
IICF = 0x01;
|
||||
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
|
||||
SPIE = 0; // ストップコンディションでの割り込みを禁止
|
||||
WTIM = 1; // 自動でACKを返した後clkをLに固定する
|
||||
@ -219,7 +269,7 @@ void IICA_Init( void ){
|
||||
|
||||
|
||||
//****************************************************************************
|
||||
void IICA_Stop( void ){
|
||||
void IIC_ctr_Stop( void ){
|
||||
IICE = 0; /* IICA disable */
|
||||
IICAEN = 0;
|
||||
}
|
||||
|
||||
210
trunk/i2c_ctr.h
Normal file
210
trunk/i2c_ctr.h
Normal file
@ -0,0 +1,210 @@
|
||||
#ifndef _MDSERIAL_A_
|
||||
#define _MDSERIAL_A_
|
||||
|
||||
|
||||
/* IIC operation enable (IICE0) */
|
||||
#define IIC0_OPERATION 0x80
|
||||
#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */
|
||||
#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */
|
||||
|
||||
/* Exit from communications (LREL0) */
|
||||
#define IIC0_COMMUNICATION 0x40
|
||||
#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */
|
||||
#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */
|
||||
|
||||
/* Wait cancellation (WREL0) */
|
||||
#define IIC0_WAITCANCEL 0x20
|
||||
#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */
|
||||
#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */
|
||||
|
||||
/* Generation of interrupt when stop condition (SPIE0) */
|
||||
#define IIC0_STOPINT 0x10
|
||||
#define IIC0_STOPINT_DISABLE 0x00 /* disable */
|
||||
#define IIC0_STOPINT_ENABLE 0x10 /* enable */
|
||||
|
||||
/* Wait and interrupt generation (WTIM0) */
|
||||
#define IIC0_WAITINT 0x08
|
||||
#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */
|
||||
#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */
|
||||
|
||||
/* Acknowledgement control (ACKE0) */
|
||||
#define IIC0_ACK 0x04
|
||||
#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */
|
||||
#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */
|
||||
|
||||
/* Start condition trigger (STT0) */
|
||||
#define IIC0_STARTCONDITION 0x02
|
||||
#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */
|
||||
#define IIC0_START_GENERATE 0x02 /* generate start condition */
|
||||
|
||||
/* Stop condition trigger (SPT0) */
|
||||
#define IIC0_STOPCONDITION 0x01
|
||||
#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */
|
||||
#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */
|
||||
|
||||
/*
|
||||
IIC Status Register 0 (IICS0)
|
||||
*/
|
||||
/* Master device status (MSTS0) */
|
||||
#define IIC0_MASTERSTATUS 0x80
|
||||
#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */
|
||||
#define IIC0_STATUS_MASTER 0x80 /* master device communication status */
|
||||
|
||||
/* Detection of arbitration loss (ALD0) */
|
||||
#define IIC0_ARBITRATION 0x40
|
||||
#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */
|
||||
#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */
|
||||
|
||||
/* Detection of extension code reception (EXC0) */
|
||||
#define IIC0_EXTENSIONCODE 0x20
|
||||
#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */
|
||||
#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */
|
||||
|
||||
/* Detection of matching addresses (COI0) */
|
||||
#define IIC0_ADDRESSMATCH 0x10
|
||||
#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */
|
||||
#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */
|
||||
|
||||
/* Detection of transmit/receive status (TRC0) */
|
||||
#define IIC0_STATUS 0x08
|
||||
#define IIC0_STATUS_RECEIVE 0x00 /* receive status */
|
||||
#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */
|
||||
|
||||
/* Detection of acknowledge signal (ACKD0) */
|
||||
#define IIC0_ACKDETECTION 0x04
|
||||
#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */
|
||||
#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */
|
||||
|
||||
/* Detection of start condition (STD0) */
|
||||
#define IIC0_STARTDETECTION 0x02
|
||||
#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */
|
||||
#define IIC0_START_DETECTED 0x02 /* start condition detected */
|
||||
|
||||
/* Detection of stop condition (SPD0) */
|
||||
#define IIC0_STOPDETECTION 0x01
|
||||
#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */
|
||||
#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */
|
||||
|
||||
/*
|
||||
IIC Flag Register 0 (IICF0)
|
||||
*/
|
||||
/* STT0 clear flag (STCF) */
|
||||
#define IIC0_STARTFLAG 0x80
|
||||
#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */
|
||||
#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */
|
||||
|
||||
/* IIC bus status flag (IICBSY) */
|
||||
#define IIC0_BUSSTATUS 0x40
|
||||
#define IIC0_BUS_RELEASE 0x00 /* bus release status */
|
||||
#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */
|
||||
|
||||
/* Initial start enable trigger (STCEN) */
|
||||
#define IIC0_STARTWITHSTOP 0x02
|
||||
#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */
|
||||
#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */
|
||||
|
||||
/* Communication reservation function disable bit (IICRSV) */
|
||||
#define IIC0_RESERVATION 0x01
|
||||
#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */
|
||||
#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */
|
||||
|
||||
/*
|
||||
IIC clock selection register 0 (IICCL0)
|
||||
*/
|
||||
#define IICCL0_INITIALVALUE 0x00
|
||||
/* Detection of SCL0 pin level (CLD0) */
|
||||
#define IIC0_SCLLEVEL 0x20
|
||||
#define IIC0_SCL_LOW 0x00 /* clock line at low level */
|
||||
#define IIC0_SCL_HIGH 0x20 /* clock line at high level */
|
||||
|
||||
/* Detection of SDA0 pin level (DAD0) */
|
||||
#define IIC0_SDALEVEL 0x10
|
||||
#define IIC0_SDA_LOW 0x00 /* data line at low level */
|
||||
#define IIC0_SDA_HIGH 0x10 /* data line at high level */
|
||||
|
||||
/* Operation mode switching (SMC0) */
|
||||
#define IIC0_OPERATIONMODE 0x08
|
||||
#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */
|
||||
#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */
|
||||
|
||||
/* Digital filter operation control (DFC0) */
|
||||
#define IIC0_DIGITALFILTER 0x04
|
||||
#define IIC0_FILTER_OFF 0x00 /* digital filter off */
|
||||
#define IIC0_FILTER_ON 0x04 /* digital filter on */
|
||||
|
||||
/* Operation mode switching (CL01, CL00) */
|
||||
#define IIC0_CLOCKSELECTION 0x03
|
||||
|
||||
/* Combine of (SMC0, CL01, CL00)*/
|
||||
#define IIC0_CLOCK0 0x00
|
||||
#define IIC0_CLOCK1 0x01
|
||||
#define IIC0_CLOCK2 0x02
|
||||
#define IIC0_CLOCK3 0x03
|
||||
#define IIC0_CLOCK4 0x08
|
||||
#define IIC0_CLOCK5 0x09
|
||||
#define IIC0_CLOCK6 0x0a
|
||||
#define IIC0_CLOCK7 0x0b
|
||||
|
||||
/*
|
||||
IIC function expansion register 0 (IICX0)
|
||||
*/
|
||||
/* IIC clock expension (CLX0) */
|
||||
#define IIC0_CLOCKEXPENSION 0x01
|
||||
#define IIC0_EXPENSION0 0x00
|
||||
#define IIC0_EXPENSION1 0x01
|
||||
|
||||
/* Operation clock (CLX0, SMC0, CL01, CL00)
|
||||
| IIC0_EXPENSION0 | IIC0_EXPENSION1 |
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/88 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/172 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/344 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/66 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw)
|
||||
| fprs/96 | fprs/48 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/18 | | transfer clock
|
||||
| high speed | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
*/
|
||||
|
||||
#define ADDRESS_COMPLETE 0x80
|
||||
#define IIC_MASTER_FLAG_CLEAR 0x00
|
||||
|
||||
/******************************************************************************
|
||||
* Macro define
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function define
|
||||
******************************************************************************/
|
||||
|
||||
void IIC_ctr_Init( void );
|
||||
void IIC_ctr_Stop( void );
|
||||
|
||||
|
||||
#endif
|
||||
167
trunk/i2c_mcu.c
167
trunk/i2c_mcu.c
@ -11,14 +11,12 @@
|
||||
|
||||
#include "incs_loader.h"
|
||||
#include "i2c_mcu.h"
|
||||
//#include <string.h>
|
||||
|
||||
|
||||
bit iic_mcu_wo_dma;
|
||||
volatile bit iic_mcu_busy;
|
||||
volatile bit iic_mcu_initialized;
|
||||
|
||||
|
||||
/*************************************/
|
||||
// SSR0n
|
||||
#define bit_TSF0 6
|
||||
// SIR0n
|
||||
@ -36,35 +34,76 @@ volatile bit iic_mcu_initialized;
|
||||
|
||||
#define TAUS_MASK 0b0000101100001011;
|
||||
|
||||
|
||||
/*************************************/
|
||||
static void iic_mcu_send_st();
|
||||
static void iic_mcu_send_re_st();
|
||||
static void iic_mcu_send_sp();
|
||||
static err iic_mcu_send_a_byte( u8 );
|
||||
static err iic_mcu_call_slave( u8 slave );
|
||||
|
||||
|
||||
/*************************************/
|
||||
u8 iic_send_work[4];
|
||||
u8* p_iic_send_wo_dma_dat;
|
||||
u8 iic_send_wo_dma_len;
|
||||
|
||||
volatile u8 interrupted;
|
||||
u8 iic_mcu_bus_status; // 一文字リードの時はデータを返す。
|
||||
// ステータスが必要ならこっちを呼んで
|
||||
|
||||
|
||||
u8 dma_state;
|
||||
|
||||
|
||||
/*****
|
||||
/**************************************
|
||||
スレーブからの 『1文字』 リード
|
||||
返値がデータそのものです。
|
||||
エラー判定ができません。
|
||||
******************************************************************************/
|
||||
*************************************/
|
||||
u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs ){
|
||||
u8 dat;
|
||||
|
||||
iic_mcu_read( SLA, adrs, 1, &dat );
|
||||
return( dat );
|
||||
#ifdef _debug_
|
||||
iic_mcu_start();
|
||||
#else
|
||||
while(1){};
|
||||
#endif
|
||||
|
||||
while( iic_mcu_busy ){
|
||||
NOP();
|
||||
}
|
||||
|
||||
iic_mcu_bus_status = ERR_OK;
|
||||
// スタートコンディションとスレーブの呼び出し、レジスタアドレスの送信
|
||||
if( iic_mcu_call_slave( SLA ) != 0 ){
|
||||
iic_mcu_bus_status = ERR_NOSLAVE;
|
||||
return( 0 );
|
||||
}
|
||||
|
||||
// レジスタアドレスの送信
|
||||
iic_mcu_send_a_byte( adrs ); // 終わるまで帰ってこない
|
||||
// if( err != ERR_SUCCESS )~
|
||||
|
||||
// データ受信 //
|
||||
iic_mcu_send_re_st(); // リスタートコンディション
|
||||
iic_mcu_send_a_byte( SLA | 0x01 ); // 送信完了まで戻ってきません。
|
||||
|
||||
ST0 = 0x0004; // 受信モードに設定を変えるのでロジック停止
|
||||
SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02; // 受信設定
|
||||
SS0 = 0x0004; // 通信待機
|
||||
|
||||
SOE0 = 0x0000; // 1バイト送信なので、最後のNAKを送る
|
||||
IICIF10 = 0;
|
||||
SIO10 = 0xFF; // ダミーデータを書くと受信開始
|
||||
|
||||
while( IICIF10 == 0 ){ // 受信完了待ち
|
||||
;}
|
||||
|
||||
iic_mcu_send_sp();
|
||||
IICIF10 = 0; // 後を濁さないこと
|
||||
|
||||
return( SIO10 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
スレーブからのリード
|
||||
0 正常終了
|
||||
@ -81,16 +120,14 @@ err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8* dest ){
|
||||
// 使用中なら待つ
|
||||
if( iic_mcu_initialized == 0 ){
|
||||
#ifdef _debug_
|
||||
iic_mcu_start();
|
||||
iic_mcu_start();
|
||||
#else
|
||||
while(1){};
|
||||
#endif
|
||||
}
|
||||
while( iic_mcu_busy ){
|
||||
DBG_M_n = 1;
|
||||
NOP();
|
||||
}
|
||||
DBG_M_n = 0;
|
||||
/*/
|
||||
// 使用中なら帰る
|
||||
if( iic_mcu_initialized == 0 ){
|
||||
@ -119,17 +156,18 @@ err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8* dest ){
|
||||
SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02; // 受信設定
|
||||
SS0 = 0x0004; // 通信待機
|
||||
|
||||
while( len != 0 ){
|
||||
do{
|
||||
if( len == 1 ){
|
||||
SOE0 &= ~0x0004;
|
||||
SOE0 = 0x0000; // 最後のNAK
|
||||
}
|
||||
IICIF10 = 0;
|
||||
SIO10 = 0xFF; // ダミーデータを書くと受信開始
|
||||
while( IICIF10 == 0 ){;}
|
||||
SIO10 = 0xFF; // ダミーデータを書くと受信開始
|
||||
while( IICIF10 == 0 ){ // 受信完了待ち
|
||||
;}
|
||||
*dest = SIO10;
|
||||
dest++;
|
||||
len--;
|
||||
}
|
||||
}while( len != 0 );
|
||||
|
||||
iic_mcu_send_sp();
|
||||
|
||||
@ -151,23 +189,30 @@ err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8* dest ){
|
||||
ポインタをとっておかないと破壊されてしまう…気がする
|
||||
******************************************************************************/
|
||||
err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat ){
|
||||
volatile static u8 temp;
|
||||
|
||||
while( iic_mcu_busy ){
|
||||
DBG_M_n = 1;
|
||||
NOP();
|
||||
while( iic_mcu_busy ){
|
||||
NOP();
|
||||
}
|
||||
#if 0
|
||||
temp = dat;
|
||||
return( iic_mcu_write( SLA, adrs, 1, &temp ) );
|
||||
}
|
||||
#else
|
||||
// スタートコンディションとスレーブの呼び出し...
|
||||
IICMK10 = 1;
|
||||
if( iic_mcu_call_slave( SLA ) != 0 ){
|
||||
return( ERR_NAK );
|
||||
}
|
||||
DBG_M_n = 0;
|
||||
|
||||
temp = dat;
|
||||
return( iic_mcu_write( SLA, adrs, 1, &temp ) );
|
||||
iic_mcu_send_a_byte( adrs );
|
||||
iic_mcu_send_a_byte( dat );
|
||||
iic_mcu_send_sp();
|
||||
return( ERR_SUCCESS );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
u8* p_src_work; // DMA送信バッファ
|
||||
u8 len_work;
|
||||
|
||||
/******************************************************************************
|
||||
スレーブへライト
|
||||
レジスタ adrs を先頭に、
|
||||
@ -194,10 +239,8 @@ err iic_mcu_write( u8 slave, u8 adrs, u8 len, u8* src ){
|
||||
#endif
|
||||
}
|
||||
while( iic_mcu_busy ){
|
||||
DBG_M_n = 1;
|
||||
NOP();
|
||||
}
|
||||
DBG_M_n = 0;
|
||||
/*/
|
||||
// 使用中なら帰る
|
||||
if( iic_mcu_initialized == 0 ){
|
||||
@ -216,13 +259,10 @@ err iic_mcu_write( u8 slave, u8 adrs, u8 len, u8* src ){
|
||||
|
||||
iic_mcu_busy = 1;
|
||||
|
||||
dma_state = 0;
|
||||
|
||||
|
||||
if( !iic_mcu_wo_dma ){
|
||||
// DMAを使用する(通常)
|
||||
|
||||
// レジスタアドレスの送信
|
||||
// レジスタアドレスを送り、データの準備
|
||||
memcpy( iic_send_work, src, 4 ); //バッファとして4バイトしか用意して無いため。
|
||||
// DMAセット
|
||||
while( DST1 ){;};
|
||||
@ -237,9 +277,8 @@ dma_state = 0;
|
||||
DMAMK1 = 0;
|
||||
DST1 = 1;
|
||||
|
||||
IICIF10 = 0;
|
||||
SIO10 = adrs; // 書きっぱなし! 割り込みが発生してDMAスタート
|
||||
|
||||
// 残りは割り込みルーチン内で
|
||||
}else{
|
||||
// DMAを使用しない //
|
||||
|
||||
@ -252,8 +291,7 @@ dma_state = 0;
|
||||
p_iic_send_wo_dma_dat = src;
|
||||
// 残りは割り込みルーチン内で
|
||||
}
|
||||
dma_state = 1;
|
||||
return( ERR_SUCCESS );
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
@ -265,21 +303,19 @@ dma_state = 1;
|
||||
注:DMA転送が終わっただけで、I2Cの転送は終わってません
|
||||
******************************************************************************/
|
||||
__interrupt void int_dma1(){
|
||||
dma_state = 2;
|
||||
DMAMK1 = 1;
|
||||
DEN1 = 0;
|
||||
IICMK10 = 0;
|
||||
while( SSR02 & ( 1 << TSF0 )){;}
|
||||
// 最後のバイト転送後、I2C割り込みが発生する
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
/***************************************
|
||||
IIC MCUのバイト送出完了割り込み
|
||||
******************************************************************************/
|
||||
**************************************/
|
||||
__interrupt void int_iic10(){
|
||||
dma_state = 3;
|
||||
|
||||
if( iic_mcu_wo_dma ){
|
||||
// DMA使用せず、転送途中
|
||||
if( iic_send_wo_dma_len != 0 ){
|
||||
@ -291,7 +327,23 @@ dma_state = 3;
|
||||
}
|
||||
// 共通(最終バイト送信完了)
|
||||
IICMK10 = 1;
|
||||
iic_mcu_send_sp();
|
||||
// ISR中で外の関数を呼ぶのは都合が悪いので展開
|
||||
// iic_mcu_send_sp();
|
||||
{
|
||||
ST0 = 0x0004;
|
||||
SOE0 = 0; // 受信の時はもっと前に「も」設定してる。(NACK出力)
|
||||
SO0 = 0x0000 | TAUS_MASK; // SCL
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
SO0 = 0x0400 | TAUS_MASK; // SCL
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
SO0 = 0x0404 | TAUS_MASK;
|
||||
}
|
||||
iic_mcu_wo_dma = 0;
|
||||
iic_mcu_busy = 0;
|
||||
}
|
||||
@ -305,27 +357,14 @@ dma_state = 3;
|
||||
NACK → ストップコンディションを出す。 返:1
|
||||
******************************************************************************/
|
||||
static err iic_mcu_call_slave( u8 slave ){
|
||||
// スレーブの呼び出し //
|
||||
iic_mcu_send_st();
|
||||
|
||||
// SIR02 = SSR02; // NAKエラーのフラグクリア
|
||||
#if 0
|
||||
if( iic_mcu_send_a_byte( slave ) != 0 ){
|
||||
iic_mcu_send_sp();
|
||||
return( 1 ); // 指定のスレーブがいない / busy
|
||||
return( ERR_NAK ); // 指定のスレーブがいない / busy
|
||||
}
|
||||
#else
|
||||
IICIF10 = 0;
|
||||
SIO10 = slave;
|
||||
while( IICIF10 == 0 ){
|
||||
NOP();
|
||||
} // 通信中
|
||||
if( SSR02 != 0 ){
|
||||
SIR02 = SSR02;
|
||||
iic_mcu_send_sp();
|
||||
return( ERR_NAK );
|
||||
}
|
||||
#endif
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
@ -345,9 +384,9 @@ static err iic_mcu_send_a_byte( u8 dat ){
|
||||
} // 通信中
|
||||
if( SSR02 != 0 ){
|
||||
SIR02 = SSR02;
|
||||
return( 1 ); // NAK
|
||||
return( ERR_NAK );
|
||||
}
|
||||
return( 0 );
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
@ -396,7 +435,7 @@ static void iic_mcu_send_re_st(){
|
||||
この前に最後のバイトの送受信の時に前準備が必要です。
|
||||
*******************************************************************************/
|
||||
static void iic_mcu_send_sp(){
|
||||
ST0 |= 0x0004;
|
||||
ST0 = 0x0004;
|
||||
SOE0 = 0; // 受信の時はもっと前に「も」設定してる。(NACK出力)
|
||||
SO0 = 0x0000 | TAUS_MASK; // SCL
|
||||
NOP();
|
||||
@ -418,8 +457,8 @@ static void iic_mcu_send_sp(){
|
||||
(ストップコンディションが出せそうだったらすかさず出す。
|
||||
******************************************************************************/
|
||||
void iic2m_bus_reset(){
|
||||
u8 count;
|
||||
/*
|
||||
u8 count;
|
||||
for( count = 19; count != 0; count-- ){
|
||||
iics_sda_H;
|
||||
iics_scl_H;
|
||||
|
||||
31
trunk/i2c_mcu.h
Normal file
31
trunk/i2c_mcu.h
Normal file
@ -0,0 +1,31 @@
|
||||
#ifndef __ic2_mcu__
|
||||
#define __ic2_mcu__
|
||||
|
||||
|
||||
//*************************************
|
||||
#define ERR_OK 0
|
||||
#define ERR_NAK 1
|
||||
#define ERR_NOSLAVE 2
|
||||
|
||||
//*************************************
|
||||
extern volatile bit iic_mcu_busy;
|
||||
extern bit iic_mcu_wo_dma;
|
||||
|
||||
extern u8 iic_mcu_bus_status;
|
||||
|
||||
//*************************************
|
||||
err iic_mcu_read( u8 SLA, u8 adrs, u8 len, u8* dest );
|
||||
u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs );
|
||||
|
||||
err iic_mcu_write( u8 SLA, u8 adrs, u8 len, u8* src );
|
||||
err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat );
|
||||
|
||||
|
||||
#define iic_mcu_set_wo_dma() { while( iic_mcu_busy ){;} iic_mcu_wo_dma = 1; }
|
||||
|
||||
void iic2m_bus_reset();
|
||||
|
||||
void iic_mcu_start();
|
||||
void iic_mcu_stop();
|
||||
|
||||
#endif
|
||||
167
trunk/i2c_twl.c
167
trunk/i2c_twl.c
@ -1,47 +1,116 @@
|
||||
#pragma sfr /* 特殊機能レジスタ使用 */
|
||||
|
||||
#ifndef _TEG_
|
||||
// KE3Lの間はプレースホルダ
|
||||
void IICB_Init( void ){}
|
||||
void IICB_Stop( void ){}
|
||||
void IICB_SlaveReceiveStart(){}
|
||||
|
||||
|
||||
#else
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
#include "incs.h"
|
||||
#include "i2c_twl_defs.h"
|
||||
|
||||
|
||||
extern u8 vreg_twl[];
|
||||
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
|
||||
// ワーキングモデルはI2Cが逆
|
||||
#define ACKD ACKD0
|
||||
#define ACKE ACKE0
|
||||
#define COI COI0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAPR0 IICAPR00
|
||||
#define IICRSV IICRSV0
|
||||
#define IICA IICA0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAIF IICAIF0
|
||||
#define IICAMK IICAMK0
|
||||
#define IICAPR1 IICAPR10
|
||||
#define IICCTL0 IICCTL00
|
||||
#define IICE IICE0
|
||||
#define IICF IICF0
|
||||
#define IICS IICS0
|
||||
#define IICWH IICWH0
|
||||
#define IICWL IICWL0
|
||||
#define LREL LREL0
|
||||
#define SPD SPD0
|
||||
#define SPIE SPIE0
|
||||
#define STCEN STCEN0
|
||||
#define STD STD0
|
||||
#define SVA SVA0
|
||||
#define WREL WREL0
|
||||
#define WTIM WTIM0
|
||||
|
||||
#else
|
||||
|
||||
#define ACKD ACKD1
|
||||
#define ACKE ACKE1
|
||||
#define COI COI1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICAPR0 IICAPR10
|
||||
#define IICRSV IICRSV1
|
||||
#define IICA IICA1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICAIF IICAIF1
|
||||
#define IICAMK IICAMK1
|
||||
#define IICAPR1 IICAPR11
|
||||
#define IICCTL0 IICCTL10
|
||||
#define IICE IICE1
|
||||
#define IICF IICF1
|
||||
#define IICS IICS1
|
||||
#define IICWH IICWH1
|
||||
#define IICWL IICWL1
|
||||
#define LREL LREL1
|
||||
#define SPD SPD1
|
||||
#define SPIE SPIE1
|
||||
#define STCEN STCEN1
|
||||
#define STD STD1
|
||||
#define SVA SVA1
|
||||
#define WREL WREL1
|
||||
#define WTIM WTIM1
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifndef _MCU_BSR_
|
||||
|
||||
// ke3の時はダミー関数
|
||||
void IIC_twl_Stop( void ){}
|
||||
// __interrupt void int_iic_twl(){}
|
||||
void IIC_twl_Init( void ){}
|
||||
void IIC_twl_SlaveReceiveStart(){}
|
||||
|
||||
|
||||
#else
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
u8 vreg_adrs;
|
||||
u8 pre_dat;
|
||||
|
||||
|
||||
u16 tot;
|
||||
|
||||
|
||||
// 注! ↓はマクロなので、returnはメインループに戻ります。
|
||||
#define wait_next { \
|
||||
tot = 0; \
|
||||
while( IICAIF != 1 ){ \
|
||||
if( SPD ){ \
|
||||
LREL = 1; \
|
||||
if( SPD ){ \
|
||||
LREL = 1; \
|
||||
return; \
|
||||
} \
|
||||
tot++; \
|
||||
if( tot == 0 ){ \
|
||||
LREL = 1; \
|
||||
LREL = 1; \
|
||||
return; \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
__interrupt void int_iic_twl(){
|
||||
|
||||
__interrupt void int_iicb(){
|
||||
WREL = 1; // ウェイト解除して次のバイトを待つ
|
||||
// WDT_Restart();
|
||||
// フラグ1回目 スレーブアドレス,R/W
|
||||
@ -57,21 +126,21 @@ __interrupt void int_iicb(){
|
||||
|
||||
// 2回目 R/W レジスタアドレス
|
||||
WREL = 1;
|
||||
IICBIF = 0;
|
||||
vreg_adrs = adrs_table_twl_ext2int( IICB );
|
||||
IICAIF = 0;
|
||||
vreg_adrs = adrs_table_twl_ext2int( IICA );
|
||||
|
||||
// 3回目
|
||||
// スタートコンディションか、データ受信完了フラグ待ち
|
||||
|
||||
while( 1 ){
|
||||
if( IICBIF == 1 ){
|
||||
if( IICAIF == 1 ){
|
||||
// 受信 //
|
||||
IICBIF = 0;
|
||||
IICAIF = 0;
|
||||
WREL = 1;
|
||||
|
||||
|
||||
// 通常アクセス(ライト) //
|
||||
LREL = 1;
|
||||
vreg_twl_write( vreg_adrs, IICB );
|
||||
vreg_twl_write( vreg_adrs, IICA );
|
||||
return; // 受信おしまい //
|
||||
|
||||
}else if( STD ){
|
||||
@ -80,16 +149,16 @@ __interrupt void int_iicb(){
|
||||
|
||||
// 自局をRで呼ばれるのを待つ
|
||||
wait_next;
|
||||
IICBIF = 0;
|
||||
IICAIF = 0;
|
||||
if( COI != 1 ){ // 被呼び出し?
|
||||
LREL = 1; // 呼ばれたのは他のID(あれ?)
|
||||
return;
|
||||
}
|
||||
IICB = pre_dat; // データを送る
|
||||
|
||||
IICA = pre_dat; // データを送る
|
||||
|
||||
wait_next;
|
||||
// 4回目。(送信データ後の、ACK/NACK後) どうしても発生してしまう。
|
||||
IICBIF = 0; // おしまい
|
||||
IICAIF = 0; // おしまい
|
||||
LREL = 1;
|
||||
return;
|
||||
}else if( SPD ){ // 強制終了
|
||||
@ -101,57 +170,55 @@ __interrupt void int_iicb(){
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
基本API
|
||||
*****************************************************************************/
|
||||
void IICB_Init( void )
|
||||
{
|
||||
|
||||
IICBEN = 1;
|
||||
/*****************************************************/
|
||||
void IIC_twl_Init( void ){
|
||||
|
||||
IICE = 0; /* IICB disable */
|
||||
IICAEN = 1;
|
||||
|
||||
IICBMK = 1; /* INTIICB disable */
|
||||
IICBIF = 0; /* clear INTIICB interrupt flag */
|
||||
IICE = 0; /* IICA disable */
|
||||
|
||||
IICBPR0 = 0; /* set INTIICB high priority */
|
||||
IICBPR1 = 0; /* set INTIICB high priority */
|
||||
IICAMK = 1; /* INTIICA disable */
|
||||
IICAIF = 0; /* clear INTIICA interrupt flag */
|
||||
|
||||
PM6 &= ~0x3; /* set clock pin for IICB */
|
||||
P6 &= ~0x3;
|
||||
IICAPR0 = 0; /* set INTIICA high priority */
|
||||
IICAPR1 = 0; /* set INTIICA high priority */
|
||||
|
||||
P20 &= ~0x3;
|
||||
|
||||
SVA = IIC_T_SLAVEADDRESS;
|
||||
IICF = 0x01;
|
||||
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
|
||||
SPIE = 0; // ストップコンディションでの割り込みを禁止
|
||||
WTIM = 1; // 自動でACKを返した後clkをLに固定する
|
||||
ACKE = 1; // ダメCPUは無視して次の通信をはじめるかもしれないんで早くclkを開放しないといけない
|
||||
IICBMK = 0; // 割り込みを許可
|
||||
SPIE = 0; // ストップコンディションでの割り込みを禁止
|
||||
WTIM = 1; // 自動でACKを返した後clkをLに固定する
|
||||
ACKE = 1; // ダメCPUは無視して次の通信をはじめるかもしれないんで早くclkを開放しないといけない
|
||||
|
||||
IICWL = 6; // L期間の長さ(?)
|
||||
IICWH = 5;
|
||||
|
||||
IICAMK = 0; // 割り込みを許可
|
||||
|
||||
IICE = 1;
|
||||
// spie のセット
|
||||
// 使用時に再初期化
|
||||
// IICE0を1にしていいのはscl,sdaがHHの時だけ
|
||||
|
||||
PM20 &= ~0x3; /* set clock pin for IICA */
|
||||
}
|
||||
|
||||
|
||||
//****************************************************************************
|
||||
void IICB_Stop( void ){
|
||||
IICE = 0; /* IICB disable */
|
||||
void IIC_twl_Stop( void ){
|
||||
IICE = 0; /* IICA disable */
|
||||
IICAEN = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void IICB_SlaveReceiveStart(){
|
||||
|
||||
void IIC_twl_SlaveReceiveStart(){
|
||||
IICE = 1;
|
||||
LREL = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
7
trunk/i2c_twl.h
Normal file
7
trunk/i2c_twl.h
Normal file
@ -0,0 +1,7 @@
|
||||
#ifndef _iic_twl_
|
||||
#define _iic_twl_
|
||||
|
||||
void IIC_twl_Init( void );
|
||||
void IIC_twl_Stop( void );
|
||||
|
||||
#endif
|
||||
196
trunk/i2c_twl_defs.h
Normal file
196
trunk/i2c_twl_defs.h
Normal file
@ -0,0 +1,196 @@
|
||||
#ifndef _MDSERIAL_
|
||||
#define _MDSERIAL_
|
||||
|
||||
|
||||
/* IIC operation enable (IICE0) */
|
||||
#define IIC0_OPERATION 0x80
|
||||
#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */
|
||||
#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */
|
||||
|
||||
/* Exit from communications (LREL0) */
|
||||
#define IIC0_COMMUNICATION 0x40
|
||||
#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */
|
||||
#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */
|
||||
|
||||
/* Wait cancellation (WREL0) */
|
||||
#define IIC0_WAITCANCEL 0x20
|
||||
#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */
|
||||
#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */
|
||||
|
||||
/* Generation of interrupt when stop condition (SPIE0) */
|
||||
#define IIC0_STOPINT 0x10
|
||||
#define IIC0_STOPINT_DISABLE 0x00 /* disable */
|
||||
#define IIC0_STOPINT_ENABLE 0x10 /* enable */
|
||||
|
||||
/* Wait and interrupt generation (WTIM0) */
|
||||
#define IIC0_WAITINT 0x08
|
||||
#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */
|
||||
#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */
|
||||
|
||||
/* Acknowledgement control (ACKE0) */
|
||||
#define IIC0_ACK 0x04
|
||||
#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */
|
||||
#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */
|
||||
|
||||
/* Start condition trigger (STT0) */
|
||||
#define IIC0_STARTCONDITION 0x02
|
||||
#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */
|
||||
#define IIC0_START_GENERATE 0x02 /* generate start condition */
|
||||
|
||||
/* Stop condition trigger (SPT0) */
|
||||
#define IIC0_STOPCONDITION 0x01
|
||||
#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */
|
||||
#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */
|
||||
|
||||
/*
|
||||
IIC Status Register 0 (IICS0)
|
||||
*/
|
||||
/* Master device status (MSTS0) */
|
||||
#define IIC0_MASTERSTATUS 0x80
|
||||
#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */
|
||||
#define IIC0_STATUS_MASTER 0x80 /* master device communication status */
|
||||
|
||||
/* Detection of arbitration loss (ALD0) */
|
||||
#define IIC0_ARBITRATION 0x40
|
||||
#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */
|
||||
#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */
|
||||
|
||||
/* Detection of extension code reception (EXC0) */
|
||||
#define IIC0_EXTENSIONCODE 0x20
|
||||
#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */
|
||||
#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */
|
||||
|
||||
/* Detection of matching addresses (COI0) */
|
||||
#define IIC0_ADDRESSMATCH 0x10
|
||||
#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */
|
||||
#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */
|
||||
|
||||
/* Detection of transmit/receive status (TRC0) */
|
||||
#define IIC0_STATUS 0x08
|
||||
#define IIC0_STATUS_RECEIVE 0x00 /* receive status */
|
||||
#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */
|
||||
|
||||
/* Detection of acknowledge signal (ACKD0) */
|
||||
#define IIC0_ACKDETECTION 0x04
|
||||
#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */
|
||||
#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */
|
||||
|
||||
/* Detection of start condition (STD0) */
|
||||
#define IIC0_STARTDETECTION 0x02
|
||||
#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */
|
||||
#define IIC0_START_DETECTED 0x02 /* start condition detected */
|
||||
|
||||
/* Detection of stop condition (SPD0) */
|
||||
#define IIC0_STOPDETECTION 0x01
|
||||
#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */
|
||||
#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */
|
||||
|
||||
/*
|
||||
IIC Flag Register 0 (IICF0)
|
||||
*/
|
||||
/* STT0 clear flag (STCF) */
|
||||
#define IIC0_STARTFLAG 0x80
|
||||
#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */
|
||||
#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */
|
||||
|
||||
/* IIC bus status flag (IICBSY) */
|
||||
#define IIC0_BUSSTATUS 0x40
|
||||
#define IIC0_BUS_RELEASE 0x00 /* bus release status */
|
||||
#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */
|
||||
|
||||
/* Initial start enable trigger (STCEN) */
|
||||
#define IIC0_STARTWITHSTOP 0x02
|
||||
#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */
|
||||
#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */
|
||||
|
||||
/* Communication reservation function disable bit (IICRSV) */
|
||||
#define IIC0_RESERVATION 0x01
|
||||
#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */
|
||||
#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */
|
||||
|
||||
/*
|
||||
IIC clock selection register 0 (IICCL0)
|
||||
*/
|
||||
#define IICCL0_INITIALVALUE 0x00
|
||||
/* Detection of SCL0 pin level (CLD0) */
|
||||
#define IIC0_SCLLEVEL 0x20
|
||||
#define IIC0_SCL_LOW 0x00 /* clock line at low level */
|
||||
#define IIC0_SCL_HIGH 0x20 /* clock line at high level */
|
||||
|
||||
/* Detection of SDA0 pin level (DAD0) */
|
||||
#define IIC0_SDALEVEL 0x10
|
||||
#define IIC0_SDA_LOW 0x00 /* data line at low level */
|
||||
#define IIC0_SDA_HIGH 0x10 /* data line at high level */
|
||||
|
||||
/* Operation mode switching (SMC0) */
|
||||
#define IIC0_OPERATIONMODE 0x08
|
||||
#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */
|
||||
#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */
|
||||
|
||||
/* Digital filter operation control (DFC0) */
|
||||
#define IIC0_DIGITALFILTER 0x04
|
||||
#define IIC0_FILTER_OFF 0x00 /* digital filter off */
|
||||
#define IIC0_FILTER_ON 0x04 /* digital filter on */
|
||||
|
||||
/* Operation mode switching (CL01, CL00) */
|
||||
#define IIC0_CLOCKSELECTION 0x03
|
||||
|
||||
/* Combine of (SMC0, CL01, CL00)*/
|
||||
#define IIC0_CLOCK0 0x00
|
||||
#define IIC0_CLOCK1 0x01
|
||||
#define IIC0_CLOCK2 0x02
|
||||
#define IIC0_CLOCK3 0x03
|
||||
#define IIC0_CLOCK4 0x08
|
||||
#define IIC0_CLOCK5 0x09
|
||||
#define IIC0_CLOCK6 0x0a
|
||||
#define IIC0_CLOCK7 0x0b
|
||||
|
||||
/*
|
||||
IIC function expansion register 0 (IICX0)
|
||||
*/
|
||||
/* IIC clock expension (CLX0) */
|
||||
#define IIC0_CLOCKEXPENSION 0x01
|
||||
#define IIC0_EXPENSION0 0x00
|
||||
#define IIC0_EXPENSION1 0x01
|
||||
|
||||
/* Operation clock (CLX0, SMC0, CL01, CL00)
|
||||
| IIC0_EXPENSION0 | IIC0_EXPENSION1 |
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/88 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/172 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/344 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/66 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw)
|
||||
| fprs/96 | fprs/48 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/18 | | transfer clock
|
||||
| high speed | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
*/
|
||||
|
||||
#define ADDRESS_COMPLETE 0x80
|
||||
#define IIC_MASTER_FLAG_CLEAR 0x00
|
||||
|
||||
#endif
|
||||
29
trunk/incs.h
Normal file
29
trunk/incs.h
Normal file
@ -0,0 +1,29 @@
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
|
||||
|
||||
#pragma section @@CODE ROM_CODE
|
||||
//#pragma section @@CNST ROM_CNST
|
||||
|
||||
#ifndef _incs_h_
|
||||
#define _incs_h_
|
||||
|
||||
|
||||
#include "jhl_defs.h"
|
||||
#include "user_define.h"
|
||||
|
||||
#include "bsr_system.h"
|
||||
#include "renge.h"
|
||||
|
||||
#include "vreg_ctr.h"
|
||||
#include "vreg_twl.h"
|
||||
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
err firm_update();
|
||||
|
||||
#endif
|
||||
31
trunk/incs_loader.h
Normal file
31
trunk/incs_loader.h
Normal file
@ -0,0 +1,31 @@
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
|
||||
|
||||
#pragma section @@CODE LDR_CODE
|
||||
#pragma section @@CODEL LDR_CODL
|
||||
|
||||
//#pragma section @@R_INIT FSL_RINT // これやるとスタートアップルーチンが初期値を
|
||||
//#pragma section @@CNST FSL_CNST // セットしてくれない
|
||||
#pragma section @@CNSTL LDR_CNSL
|
||||
|
||||
#include "jhl_defs.h"
|
||||
#include "user_define.h"
|
||||
|
||||
#include "bsr_system.h"
|
||||
#include "renge.h"
|
||||
|
||||
#include "vreg_ctr.h"
|
||||
#include "loader.h"
|
||||
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
#include "WDT.h"
|
||||
|
||||
err firm_update();
|
||||
err firm_restore();
|
||||
|
||||
@ -3,12 +3,20 @@
|
||||
//#pragma interrupt INTWDTI fn_intwdti // 未使用
|
||||
//#pragma interrupt INTLVI fn_intlvi // 未使用
|
||||
|
||||
#pragma interrupt INTP0 intp0 // SLP
|
||||
#pragma interrupt INTP0 intp0_slp // SLP (CPUより、要求)
|
||||
//#pragma interrupt INTP1 fn_intp1 // (I2C)
|
||||
//#pragma interrupt INTP2 fn_intp2 // (I2C)
|
||||
//#pragma interrupt INTP3 fn_intp3 // 未搭載
|
||||
#pragma interrupt INTP4 intp4 // EXTDC
|
||||
#pragma interrupt INTP5 intp5 // SHELL_CLOSE
|
||||
#pragma interrupt INTP4 intp4_extdc // EXTDC, ただし電源offから起こすのみ。通常はポーリング
|
||||
#pragma interrupt INTP5 intp5_shell // SHELL_CLOSE, ただし電源offから起こすのみ。通常はポーリング
|
||||
#pragma interrupt INTP6 intp6_PM_irq // CODEC経由で旧PMICへのコマンド書き込み
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
#pragma interrupt INTP21 intp21_RFTx // 電波送信パルス
|
||||
#else
|
||||
#pragma interrupt INTP7 intp21_RFTx
|
||||
#endif
|
||||
|
||||
|
||||
//#pragma interrupt INTCMP0 fn_intcmp0
|
||||
//#pragma interrupt INTCMP1 fn_intcmp1
|
||||
@ -27,10 +35,21 @@
|
||||
//#pragma interrupt INTSR1 fn_intsr1
|
||||
//#pragma interrupt INTSRE1 fn_intsre1
|
||||
|
||||
#pragma interrupt INTIICA int_iica // CTR‘¤
|
||||
#ifndef _TEG_
|
||||
#pragma interrupt INTIICB int_iicb // TWL‘¤
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
#pragma interrupt INTIICA int_iic_ctr // CTR側
|
||||
#else
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
#pragma interrupt INTIICA0 int_iic_twl // テレコのWM0仕様
|
||||
#pragma interrupt INTIICA1 int_iic_ctr
|
||||
#else
|
||||
#pragma interrupt INTIICA0 int_iic_ctr // CTR側
|
||||
#pragma interrupt INTIICA1 int_iic_twl // TWL側
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
//#pragma interrupt INTTM00 fn_inttm00
|
||||
//#pragma interrupt INTTM01 fn_inttm01
|
||||
//#pragma interrupt INTTM02 fn_inttm02
|
||||
@ -46,20 +65,22 @@
|
||||
//#pragma interrupt INTTM05 fn_inttm05
|
||||
//#pragma interrupt INTTM06 fn_inttm06
|
||||
//#pragma interrupt INTTM07 fn_inttm07
|
||||
#pragma interrupt INTP6 fn_intp6
|
||||
#pragma interrupt INTP7 fn_intp7
|
||||
|
||||
|
||||
/****************************************************/
|
||||
/* 未使用時のダミー関数定義 */
|
||||
/****************************************************/
|
||||
__interrupt void fn_intwdti(){ while(1){}; }
|
||||
__interrupt void fn_intlvi(){ while(1){}; }
|
||||
//__interrupt void fn_intp0(){}
|
||||
__interrupt void fn_intp1(){ while(1){}; } //
|
||||
//__interrupt void fn_intp0(){} // tasks.c
|
||||
__interrupt void fn_intp1(){ while(1){}; } //
|
||||
__interrupt void fn_intp2(){ while(1){}; }
|
||||
__interrupt void fn_intp3(){ while(1){}; }
|
||||
__interrupt void fn_intp4(){ while(1){}; }
|
||||
__interrupt void fn_intp5(){ while(1){}; }
|
||||
//__interrupt void fn_intp4(){ while(1){}; } // pm.c
|
||||
//__interrupt void fn_intp5(){ while(1){}; } // pm.c
|
||||
//__interrupt void fn_intp6(){ while(1){}; } // pm.c
|
||||
//__interrupt void fn_intp7(){ while(1){}; } // led.c
|
||||
//__interrupt void fn_intp21(){ while(1){}; } // led.c
|
||||
|
||||
__interrupt void fn_intcmp0(){ while(1){}; }
|
||||
__interrupt void fn_intcmp1(){ while(1){}; }
|
||||
@ -94,5 +115,3 @@ __interrupt void fn_inttm04(){ while(1){}; }
|
||||
__interrupt void fn_inttm05(){ while(1){}; }
|
||||
__interrupt void fn_inttm06(){ while(1){}; }
|
||||
__interrupt void fn_inttm07(){ while(1){}; }
|
||||
__interrupt void fn_intp6(){ while(1){}; }
|
||||
__interrupt void fn_intp7(){ while(1){}; }
|
||||
|
||||
23
trunk/jhl_defs.h
Normal file
23
trunk/jhl_defs.h
Normal file
@ -0,0 +1,23 @@
|
||||
#ifndef __jhl_defs_h__
|
||||
#define __jhl_defs_h__
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef short s16;
|
||||
|
||||
typedef unsigned char err;
|
||||
|
||||
|
||||
|
||||
#define set_bit( cond, reg, pos ) \
|
||||
{ \
|
||||
if( cond ){ \
|
||||
reg |= pos; \
|
||||
}else{ \
|
||||
reg &= ~pos; \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
297
trunk/led.c
297
trunk/led.c
@ -5,6 +5,7 @@
|
||||
#include "led.h"
|
||||
|
||||
|
||||
// ****************************************************************************
|
||||
// TPS0
|
||||
#define BIT_PRS01 4
|
||||
#define BIT_PRS00 0
|
||||
@ -20,8 +21,17 @@
|
||||
|
||||
|
||||
|
||||
// ****************************************************************************
|
||||
static task_interval led_pow_normal();
|
||||
static task_interval led_pow_hotaru();
|
||||
|
||||
|
||||
|
||||
// ****************************************************************************
|
||||
u8 wifi_TX;
|
||||
|
||||
|
||||
// ****************************************************************************
|
||||
void LED_init(){
|
||||
/**
|
||||
PWMのセット、とりあえず全部消灯
|
||||
@ -65,55 +75,268 @@ void LED_stop(){
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
LED
|
||||
LED_Cam TO02
|
||||
LED_Charge 5
|
||||
// 電源LED
|
||||
LED_POW_B,R 6,7
|
||||
LED_Wifi,2 3, P24
|
||||
LED_3D 4
|
||||
|
||||
基本的にそれぞれの関係するタスクが管理するが、余ってしまったのはここで管理
|
||||
|
||||
TDR00 周期(0x03FF。TPS0で250kHzでカウントアップ。10bitなら250Hz位になる)
|
||||
TDR0x Duty 0で消灯、TDR00(より大 =0x03FF以上)で点灯です。
|
||||
|
||||
enum pwr_state_{
|
||||
OFF_TRIG = 0,
|
||||
OFF,
|
||||
ON_TRIG,
|
||||
ON,
|
||||
SLEEP_TRIG,
|
||||
SLEEP
|
||||
};
|
||||
|
||||
enum LED_ILUM_MODE{
|
||||
LED_POW_ILM_AUTO,
|
||||
LED_POW_ILM_ON,
|
||||
LED_POW_ILM_HOTARU,
|
||||
LED_POW_ILM_CEOFF
|
||||
};
|
||||
*******************************************************************************/
|
||||
task_status tsk_led(){
|
||||
switch( system_status.pwr_state ){
|
||||
case OFF:
|
||||
break;
|
||||
task_interval tsk_led_pow(){
|
||||
|
||||
case ON_TRIG:
|
||||
LED_duty_pow_H = 0x01FF;
|
||||
LED_duty_pow_L = 0x0100;
|
||||
LED_duty_WiFi = 0x03FF;
|
||||
LED_duty_CAM = 0x0040;
|
||||
LED_duty_3D = 0x0001;
|
||||
break;
|
||||
switch( vreg_ctr[ VREG_C_LED_POW_ILUMI ] ){
|
||||
case( LED_POW_ILM_AUTO ):
|
||||
switch( system_status.pwr_state ){
|
||||
case( SLEEP ):
|
||||
return( led_pow_hotaru() );
|
||||
break;
|
||||
|
||||
case ON:
|
||||
LED_duty_WiFi = vreg_ctr[ VREG_C_3D_DEPTH ];
|
||||
LED_duty_CAM = vreg_ctr[ VREG_C_VOL ];
|
||||
LED_duty_3D = vreg_ctr[ VREG_C_BT_TEMP ];
|
||||
break;
|
||||
case( ON ):
|
||||
default:
|
||||
return( led_pow_normal() );
|
||||
break;
|
||||
|
||||
case SLEEP_TRIG:
|
||||
LED_duty_pow_H = 0x0010;
|
||||
LED_duty_pow_L = 0x0400;
|
||||
LED_duty_WiFi = 0x0020;
|
||||
LED_duty_CAM = 0x0080;
|
||||
LED_duty_3D = 0x0100;
|
||||
break;
|
||||
case( ON_TRIG ):
|
||||
case( SLEEP_TRIG ):
|
||||
case( OFF_TRIG ):
|
||||
case( OFF ):
|
||||
return( 250 );
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case SLEEP:
|
||||
break;
|
||||
case( LED_POW_ILM_OFF ):
|
||||
LED_duty_pow_H -= ( LED_duty_pow_H == 0x0000 )? 0: 1;
|
||||
LED_duty_pow_L -= ( LED_duty_pow_L == 0x0000 )? 0: 1;
|
||||
return( 0 );
|
||||
break;
|
||||
|
||||
case OFF_TRIG:
|
||||
LED_duty_pow_L = 0x03FE;
|
||||
break;
|
||||
case( LED_POW_ILM_HOTARU ):
|
||||
return( led_pow_hotaru() );
|
||||
break;
|
||||
|
||||
case( LED_POW_ILM_ON ):
|
||||
default:
|
||||
break;
|
||||
return( led_pow_normal() );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
電池残量で、 青→赤→赤点滅
|
||||
!! タスクシステムから直接呼ばれるわけではないです!!
|
||||
*******************************************************************************/
|
||||
static task_interval led_pow_normal(){
|
||||
static u8 state;
|
||||
u8 dirty;
|
||||
|
||||
dirty = 0;
|
||||
if( vreg_ctr[ VREG_C_BT_REMAIN ] < ( 255 * 0.05 ) ){
|
||||
// 赤点滅
|
||||
if( state == 0 ){
|
||||
LED_duty_pow_H = 0x0000;
|
||||
LED_duty_pow_L = 0x0000;
|
||||
state = 1;
|
||||
}else{
|
||||
LED_duty_pow_L = vreg_ctr[ VREG_C_LED_BRIGHT ];
|
||||
state = 0;
|
||||
}
|
||||
return( 250 );
|
||||
|
||||
}else if( vreg_ctr[ VREG_C_BT_REMAIN ] < ( 255 * 0.2 ) ){
|
||||
// 赤点灯
|
||||
if( LED_duty_pow_H != 0x0000 ){
|
||||
LED_duty_pow_H -= 1;
|
||||
dirty = 1;
|
||||
}
|
||||
if( LED_duty_pow_L != vreg_ctr[ VREG_C_LED_BRIGHT ] ){
|
||||
dirty = 1;
|
||||
LED_duty_pow_L += ( LED_duty_pow_L < vreg_ctr[ VREG_C_LED_BRIGHT ] )? 1 : -1;
|
||||
}
|
||||
|
||||
}else{
|
||||
// 青点灯
|
||||
if( LED_duty_pow_H != vreg_ctr[ VREG_C_LED_BRIGHT ] ){
|
||||
dirty = 1;
|
||||
LED_duty_pow_H += ( LED_duty_pow_H < vreg_ctr[ VREG_C_LED_BRIGHT ] )? 1 : -1;
|
||||
}
|
||||
if( LED_duty_pow_L != 0x0000 ){
|
||||
LED_duty_pow_L -= 1;
|
||||
dirty = 1;
|
||||
}
|
||||
}
|
||||
|
||||
return( 10 );
|
||||
if( dirty == 0 ){
|
||||
return( 250 );
|
||||
}else{
|
||||
return( 0 );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
ホタルパターン
|
||||
!! タスクシステムから直接呼ばれるわけではないです!!
|
||||
*******************************************************************************/
|
||||
static task_interval led_pow_hotaru(){
|
||||
static u8 state;
|
||||
static u8 delay;
|
||||
static u16 blue_to;
|
||||
static u16 red_to;
|
||||
u8 dirty;
|
||||
|
||||
|
||||
// LED 調光?
|
||||
dirty = 0;
|
||||
if( LED_duty_pow_H != blue_to ){
|
||||
dirty = 1;
|
||||
if( LED_duty_pow_H > blue_to ){
|
||||
LED_duty_pow_H -= 1;
|
||||
}else{
|
||||
LED_duty_pow_H += 2;
|
||||
}
|
||||
}
|
||||
|
||||
if( LED_duty_pow_L != red_to ){
|
||||
dirty = 1;
|
||||
if( LED_duty_pow_L > red_to ){
|
||||
LED_duty_pow_L -= 1;
|
||||
}else{
|
||||
LED_duty_pow_L += 2;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if( dirty == 0 ){
|
||||
switch( state ){
|
||||
// フェードイン
|
||||
case( 0 ):
|
||||
case( 2 ):
|
||||
case( 4 ):
|
||||
if( vreg_ctr[ VREG_C_BT_REMAIN ] < ( 255 * 0.2 ) ){
|
||||
red_to = 0x03FF / 8;
|
||||
blue_to = 0;
|
||||
}else{
|
||||
red_to = 0;
|
||||
blue_to = 0x03FF / 8;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
// フェードアウト
|
||||
red_to = 0;
|
||||
blue_to = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
state += 1;
|
||||
|
||||
}
|
||||
return( 5 );
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*******************************************************************************/
|
||||
void set_LED_cam(){
|
||||
if(( vreg_ctr[ VREG_C_CAM_LED ] & 0x01 ) != 0 ){
|
||||
LED_duty_CAM = vreg_ctr[ VREG_C_LED_BRIGHT ];
|
||||
}else{
|
||||
LED_duty_CAM = 0;
|
||||
}
|
||||
if(( vreg_ctr[ VREG_C_CAM_LED ] & 0x02 ) != 0 ){
|
||||
EGP0 |= 0x80;
|
||||
}else{
|
||||
EGP0 &= ~0x80;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
// LED_Cam TO02 未
|
||||
// LED_Charge 5 →PM
|
||||
LED_Wifi,2 3, P24
|
||||
LED_3D 4
|
||||
*******************************************************************************/
|
||||
task_interval tsk_led_wifi(){
|
||||
// WiFi LED //
|
||||
static u8 remain_wifi_tx;
|
||||
static u8 state_wifi_tx;
|
||||
|
||||
// フライトモードではNTRパルスが出ても電波でない→
|
||||
// フライトレジスタ見なくてはならない
|
||||
if(( vreg_ctr[ VREG_C_WIFI_LED ] & REG_BIT_WIFI_ON ) == 0 ){
|
||||
return( 250 );
|
||||
}
|
||||
|
||||
/*
|
||||
// スリープ時
|
||||
if( PM_SLP == 1 ){
|
||||
// タスクで回すことはない trig_to_sleep_wifiLed() で減光状態にしてる
|
||||
return;
|
||||
}
|
||||
*/
|
||||
|
||||
// 短いパルスを捕まえるために、割り込みフラグを見る
|
||||
if( wifi_TX != 0 ){
|
||||
wifi_TX = 0;
|
||||
if(( vreg_ctr[ VREG_C_WIFI_LED ] & REG_BIT_WIFI_BLINK_ENA ) != 0 ){
|
||||
remain_wifi_tx = 2;
|
||||
}else{
|
||||
remain_wifi_tx = 0;
|
||||
}
|
||||
return( 250 );
|
||||
}
|
||||
|
||||
// 点滅パターン
|
||||
if( remain_wifi_tx != 0 ){ // TX active
|
||||
switch( state_wifi_tx ){
|
||||
case( 1 ):
|
||||
case( 3 ):
|
||||
case( 5 ):
|
||||
LED_duty_WiFi = 0;
|
||||
break;
|
||||
default:
|
||||
LED_duty_WiFi = vreg_ctr[ VREG_C_LED_BRIGHT ];
|
||||
}
|
||||
state_wifi_tx++;
|
||||
if( state_wifi_tx == 32 ){
|
||||
state_wifi_tx = 0;
|
||||
remain_wifi_tx--;
|
||||
}
|
||||
}else{
|
||||
set_led_wifi;
|
||||
}
|
||||
return( 28 );
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
wifi_TXピン割り込み
|
||||
LED点滅のフラグ操作のみ
|
||||
******************************************************************************/
|
||||
__interrupt void intp21_RFTx(){
|
||||
wifi_TX = 1;
|
||||
}
|
||||
|
||||
37
trunk/led.h
Normal file
37
trunk/led.h
Normal file
@ -0,0 +1,37 @@
|
||||
#ifndef __led__
|
||||
#define __led__
|
||||
|
||||
|
||||
// LED_DUTY
|
||||
#define LED_duty_pow_L TDR07
|
||||
#define LED_duty_pow_H TDR06
|
||||
#define LED_duty_WiFi TDR03
|
||||
#define LED_duty_CHARGE TDR05
|
||||
#define LED_duty_CAM TDR02
|
||||
#define LED_duty_3D TDR01
|
||||
|
||||
void LED_init();
|
||||
void LED_stop();
|
||||
void set_LED_cam();
|
||||
|
||||
#define set_led_wifi \
|
||||
if(( vreg_ctr[ VREG_C_WIFI_LED ] & 0x01 ) == 0 ){ \
|
||||
LED_duty_WiFi = 0; \
|
||||
MK2L |= 0x10; \
|
||||
}else{ \
|
||||
LED_duty_WiFi = vreg_ctr[ VREG_C_LED_BRIGHT ]; \
|
||||
EGP0 |= 0x80; \
|
||||
MK2L &= ~0x10; \
|
||||
}
|
||||
|
||||
|
||||
|
||||
enum LED_ILUM_MODE{
|
||||
LED_POW_ILM_AUTO = 0,
|
||||
LED_POW_ILM_ON,
|
||||
LED_POW_ILM_HOTARU,
|
||||
LED_POW_ILM_OFF
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
181
trunk/loader.c
181
trunk/loader.c
@ -13,6 +13,7 @@
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
#pragma opc
|
||||
|
||||
#include "incs_loader.h"
|
||||
|
||||
@ -23,10 +24,10 @@
|
||||
#include "i2c_mcu.h"
|
||||
#include "pm.h"
|
||||
#include "rtc.h"
|
||||
#include "magic.h"
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
#define VER_HEADER 0x2100
|
||||
#define VER_FOOTER 0x7000
|
||||
|
||||
|
||||
|
||||
@ -47,64 +48,57 @@
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
// magic.c の記述と違わないように注意!
|
||||
#define MGC_LOAD 0x0FF6
|
||||
#define MGC_HEAD 0x2100
|
||||
#define MGC_FOOT 0x47F6
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
void FSL_Open(void);
|
||||
void FSL_Close(void);
|
||||
void hdwinit(void);
|
||||
static void emergency_boot();
|
||||
void FSL_Open(void);
|
||||
void FSL_Close(void);
|
||||
void hdwinit(void);
|
||||
void power_save();
|
||||
|
||||
extern void main_loop();
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
void main(){
|
||||
u16 i = 0;
|
||||
|
||||
do{ // 電池接続時、16ms待ってみる
|
||||
i+=1;
|
||||
}while( i != 0 );
|
||||
|
||||
|
||||
while(1){
|
||||
// 電池投入 //
|
||||
// hdwinit(); 自動実行
|
||||
|
||||
// 電池投入時のみ初期化
|
||||
/// ファーム更新に最低限必要な物
|
||||
//
|
||||
// 電池投入時のみ初期化 //
|
||||
|
||||
u8 temp;
|
||||
|
||||
FSL_GetActiveBootCluster( &temp );
|
||||
|
||||
// ファームの整合性チェック
|
||||
// とは言っても、領域の先頭と最後のマジックナンバーを見るだけ
|
||||
// ファームの整合性チェック //
|
||||
{
|
||||
u8 i;
|
||||
u8 comp = 0;
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ ){
|
||||
comp |= ( *((u8*)( VER_HEADER + i )) ^ *((u8*)( VER_FOOTER + i )) );
|
||||
|
||||
// ローダーと本体は同じバージョンか?
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ ){ // sizeof( __TIME__ ) = 8 らし
|
||||
comp += ( *(u8*)( MGC_HEAD + i ) == *(__far u8*)( MGC_LOAD + i ) )? 0: 1;
|
||||
}
|
||||
|
||||
// 本体は壊れていないか?
|
||||
comp += ( *(u8*)( MGC_HEAD ) == 0xFF ) ? 1: 0;
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ ){
|
||||
comp += ( *(u8*)( MGC_HEAD + i ) == *(u8*)( MGC_FOOT + i ) )? 0: 1;
|
||||
}
|
||||
|
||||
if( comp != 0 ){
|
||||
while(1){
|
||||
emergency_boot();
|
||||
|
||||
P1.4 = 0;
|
||||
IICA_Stop();
|
||||
iic_mcu_stop();
|
||||
BT_TEMP_P = 0;
|
||||
|
||||
KRM = KR_SW_POW;
|
||||
EGP0 = 0b00000000; // 0で検出しない
|
||||
EGN0 = 0b00000000; // SHELL, EXTDC
|
||||
// intp20系は後ほど
|
||||
MK0 = 0b1111111111111111; // SHELL, EXTDC
|
||||
MK1 = 0b1111011111111111; // KR
|
||||
// MK1 = 0b1111010111111111; // KR, RTC(Alarm)
|
||||
MK2L= 0b11111111;
|
||||
|
||||
// pullup_off();
|
||||
{
|
||||
PU5 = 0b00000000;
|
||||
PU7 = 0b00010000;
|
||||
}
|
||||
|
||||
STOP();
|
||||
}
|
||||
// ファームリストアを試みる
|
||||
firm_restore();
|
||||
// 帰ってこない。リセットをかける。
|
||||
}
|
||||
}
|
||||
|
||||
@ -116,62 +110,8 @@ void main(){
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
ファームが壊れた場合、
|
||||
(必要なら)勝手に電源投入を試みて、ファーム異常割り込みを掛けます。
|
||||
電池切れ等だったら、電源ボタンが押されるのを待つ
|
||||
メインループを回せないのです。
|
||||
省電力モードへ移行
|
||||
******************************************************************************/
|
||||
void emergency_boot(){
|
||||
// 電源を入れる
|
||||
iic_mcu_start();
|
||||
PM_init();
|
||||
// PM_bt_auth(ほげ)
|
||||
|
||||
if( iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS ) != 0 ){
|
||||
if( PM_sys_pow_on() != ERR_SUCCESS ){ // 電源起動不可エラー
|
||||
return;
|
||||
}
|
||||
}
|
||||
//*
|
||||
if( PM_LCD_on() == 0 ){
|
||||
return;
|
||||
}
|
||||
//*/
|
||||
// LEDの強制点灯
|
||||
P1.4 = 1;
|
||||
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DIR, 0x00 );
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 0x80 );
|
||||
|
||||
RTC_32k_on();
|
||||
|
||||
vreg_ctr[ VREG_C_MCU_STATUS ] |= REG_BIT_MCU_FIRMBROKEN;
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_IRQ0_MCUSTATUS;
|
||||
|
||||
IICA_Init();
|
||||
IRQ_0_ast; // レジスタリードのところで ngtする
|
||||
|
||||
while(1){ // ファームが送られてくるのを待つ
|
||||
u16 pwsw_count = 0;
|
||||
|
||||
if( renge_flg_interval ){
|
||||
renge_flg_interval = 0;
|
||||
if( !SW_POW_n ){ // 電源長押しされたら強制電源OFF
|
||||
pwsw_count += 1;
|
||||
if( pwsw_count > 400 ){
|
||||
return;
|
||||
}
|
||||
}else{
|
||||
pwsw_count = 0;
|
||||
}
|
||||
}
|
||||
HALT();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
void power_save(){
|
||||
if( !renge_task_interval_run_force ){
|
||||
HALT();
|
||||
@ -180,20 +120,17 @@ void power_save(){
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
キーリターン割り込み
|
||||
一度にいくつものビットを使わないつもりなんだが
|
||||
******************************************************************************/
|
||||
__interrupt void int_kr(){
|
||||
if( system_status.pwr_state == OFF ){
|
||||
// 電源onのカウント。特にすることはない
|
||||
// 電源onのカウント。特にすることはない
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
ext dc
|
||||
******************************************************************************/
|
||||
@ -210,7 +147,6 @@ __interrupt void intp5(){
|
||||
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
void hdwinit(void){ // スタートアップルーチンが勝手に呼びます
|
||||
DI(); /* マスタ割り込み禁止 */
|
||||
@ -238,19 +174,25 @@ void hdwinit(void){ //
|
||||
P7 = 0b01000000;
|
||||
P12 = 0b00000000;
|
||||
P14 = 0b00000000;
|
||||
/// P20 = 0b00000000;
|
||||
#ifdef _MCU_KE3_
|
||||
P8 = 0b00000000;
|
||||
#else
|
||||
P20 = 0b00000000;
|
||||
#endif
|
||||
P15 = 0b00000000;
|
||||
|
||||
// プルアップ
|
||||
PU0 = 0b00000000; // バッテリ認証後にそれぞれセット
|
||||
PU1 = 0b00000000;
|
||||
PU3 = 0b00000000;
|
||||
PU3 = 0b00000000; // 外部でプルアップしないと具合が悪い。CPUがプルアップする
|
||||
PU4 = 0b00000000;
|
||||
PU5 = 0b00000011;
|
||||
PU7 = 0b00011001;
|
||||
PU12 = 0b00000000;
|
||||
PU14 = 0b00000000;
|
||||
/// PU20 = 0b00000000;
|
||||
#ifndef_MCU_KE3_
|
||||
PU20 = 0b00000000;
|
||||
#endif
|
||||
|
||||
PM0 = 0b00000000; // 0で出力
|
||||
PM1 = 0b00000000;
|
||||
@ -263,7 +205,11 @@ void hdwinit(void){ //
|
||||
PM12 = 0b00011111; // 32kHzクロックのピン設定はどっちでもよい
|
||||
PM14 = 0b00000001; // debugger[1] とりあえず出力
|
||||
PM15 = 0b00000111;
|
||||
/// PM20 = 0b00111100;
|
||||
#ifdef _MCU_KE3_
|
||||
PM8 = 0b11111111;
|
||||
#else
|
||||
PM20 = 0b00111100;
|
||||
#endif
|
||||
|
||||
// ポート入力モード・レジスタ設定
|
||||
// [0:通常入力バッファ 1:TTL入力バッファ]
|
||||
@ -316,11 +262,13 @@ void hdwinit(void){ //
|
||||
// RTCC0 = 0b00000000; /* カウンタ動作停止 */
|
||||
// 別途初期化関数
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
/*--- コンパレータ/プログラマブル・ゲイン・アップの動作停止 ---*/
|
||||
OACMPEN = 0; /* クロック供給停止 */
|
||||
OAM = 0x00; /* プログラマブル・ゲイン・アップの動作停止 */
|
||||
C0CTL = 0x00; /* コンパレータ0動作停止 */
|
||||
OAM = 0x00; /* プログラマブル・ゲイン・アップの動作停止 */
|
||||
C0CTL = 0x00; /* コンパレータ0動作停止 */
|
||||
C1CTL = 0x00; /* コンパレータ1動作停止 */
|
||||
#endif
|
||||
|
||||
/*--- クロック出力/ブザー出力停止 ---*/
|
||||
CKS0 = 0b0000000;
|
||||
@ -337,15 +285,18 @@ void hdwinit(void){ //
|
||||
SCR02 = 0x0087;
|
||||
SCR03 = 0x0087;
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
/*--- IICAの動作停止 ---*/
|
||||
IICAEN = 0; /* IICAへのクロック供給停止 */
|
||||
IICCTL0 = 0x00; /* IICA動作停止 */
|
||||
|
||||
/*
|
||||
// IICBの動作停止
|
||||
IICAEN = 0; // IICAへのクロック供給停止
|
||||
IICCTL0 = 0x00; // IICA動作停止
|
||||
*/
|
||||
#else
|
||||
// IICの動作停止
|
||||
IICA0EN = 0; /* IICA0(CTR)へのクロック供給停止 */
|
||||
IICCTL00 = 0x00; /* IICA1動作停止 */
|
||||
IICA1EN = 0; // IICA1(TWL)へのクロック供給停止
|
||||
IICCTL01 = 0x00; // IICA1動作停止
|
||||
#endif
|
||||
|
||||
/*--- DMAの動作停止 ---*/
|
||||
DRC0 = 0b00000000; /* DMAチャネル0の動作禁止 */
|
||||
@ -353,5 +304,3 @@ void hdwinit(void){ //
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
5
trunk/loader.h
Normal file
5
trunk/loader.h
Normal file
@ -0,0 +1,5 @@
|
||||
#include "jhl_defs.h"
|
||||
|
||||
|
||||
err firm_update();
|
||||
|
||||
@ -3,10 +3,13 @@
|
||||
ビルドの度に更新されるようにする必要がありますよ。
|
||||
(touchしてね)
|
||||
****************************************************************************/
|
||||
#pragma section @@CNST MGC_HEAD AT 0x02100
|
||||
static const unsigned char VER_HEADER[] = __TIME__;
|
||||
#pragma section @@CNSTL MGC_LOAD AT 0x0FF6
|
||||
__far static const unsigned char MGC_LOAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_TAIL AT 0x07000
|
||||
static const unsigned char VER_FOOTER[] = __TIME__;
|
||||
#pragma section @@CNST MGC_MIMI AT 0x2100
|
||||
static const unsigned char MGC_HEAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_TAIL AT 0x47F6
|
||||
static const unsigned char MGC_TAIL[] = __TIME__;
|
||||
|
||||
|
||||
|
||||
35
trunk/main.c
35
trunk/main.c
@ -30,7 +30,7 @@ todo:
|
||||
>
|
||||
> (NITROのスリープで苦労した時間計測もMCUがあれば楽々解決ですね!)
|
||||
|
||||
|
||||
|
||||
■・電源OFFシーケンス中にモデルゲージ(加速度センサ)への通信は止めてください。
|
||||
>電源が遅く切り替わると内部回路の最低動作電圧で内部の制御回路が不安定になるの
|
||||
>でバスをLOWに引っ張ることはないことを保証できないため
|
||||
@ -40,23 +40,10 @@ todo:
|
||||
/*
|
||||
管理担当がついてない
|
||||
pm_irq
|
||||
snd_depop
|
||||
/fcram_reset
|
||||
/mcu_irq
|
||||
/reset1
|
||||
/reset2
|
||||
slp
|
||||
/wl_reset
|
||||
wl_rx
|
||||
wl_tx
|
||||
extopt_det
|
||||
accel_valid
|
||||
accel_int
|
||||
dbg
|
||||
shell_close,_p
|
||||
|
||||
|
||||
|
||||
*/
|
||||
//*****************************************************************************
|
||||
#include "incs.h"
|
||||
@ -99,28 +86,34 @@ void main_loop( void ){
|
||||
|
||||
// 電池投入時の1回のみ
|
||||
vreg_ctr_init();
|
||||
if(( RESF & REG_BIT_WDT_DET ) != 0 ){
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_WDT_DET;
|
||||
iic_mcu_start();
|
||||
}else{
|
||||
PM_reset();
|
||||
}
|
||||
|
||||
RTC_init(); // 電池初投入ビットも立てます
|
||||
PM_reset();
|
||||
vreg_twl_init();
|
||||
|
||||
read_dipsw();
|
||||
// 特定スイッチで何かするか?
|
||||
|
||||
|
||||
renge_init();
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
|
||||
if(( vreg_ctr[ VREG_C_IRQ1 ] & REG_BIT_WDT_DET ) != 0 ){
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
}else{
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
}
|
||||
renge_task_interval_run_force = 1;
|
||||
|
||||
EI();
|
||||
// メインループ //
|
||||
while(1){ // システムtick、または割り込みで廻ります。
|
||||
WDT_Restart();
|
||||
DBG_P_n = 1;
|
||||
renge_task_interval_run(); // 内部で、システムtickまたは強制起動します
|
||||
DBG_P_n = 0;
|
||||
DBG_P_n = 1;
|
||||
renge_task_immed_run(); // ここのループが廻る度に実行されます
|
||||
DBG_P_n = 0;
|
||||
power_save();
|
||||
}
|
||||
}
|
||||
|
||||
198
trunk/pm.c
198
trunk/pm.c
@ -8,7 +8,6 @@
|
||||
#pragma nop
|
||||
|
||||
#include "incs_loader.h"
|
||||
#include "i2c_mcu.h"
|
||||
#include "adc.h"
|
||||
#include "led.h"
|
||||
#include "pm.h"
|
||||
@ -201,8 +200,8 @@ void PM_init(){
|
||||
|
||||
|
||||
// PMIC バージョン読み出し
|
||||
result = iic_mcu_read( IIC_SLA_PMIC, PM_REG_ADRS_VER, 1, &temp );
|
||||
vreg_ctr[ VREG_C_PM_INFO ] = temp;
|
||||
temp = iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VER );
|
||||
// vreg_ctr[ VREG_C_PM_INFO ] = temp;
|
||||
|
||||
|
||||
/*
|
||||
@ -255,7 +254,7 @@ End If
|
||||
/*****************************************************************************
|
||||
バックライト周り
|
||||
*****************************************************************************/
|
||||
#ifdef _TEG_
|
||||
#ifdef _PMIC_TWL_
|
||||
err PM_LCD_on(){
|
||||
PM_TEG_LCD_OFF = 0;
|
||||
return( PM_chk_LDSW() );
|
||||
@ -320,23 +319,21 @@ err PM_LCD_off(){
|
||||
|
||||
*****************************************************************************/
|
||||
err PM_sys_pow_on(){
|
||||
#ifndef _TEG_
|
||||
#ifndef _PMIC_TWL_
|
||||
u8 temp;
|
||||
|
||||
// 電池温度測定
|
||||
while( ADCEN != 0 ){;}
|
||||
BT_TEMP_P = 1;
|
||||
vreg_ctr[ VREG_C_DBG_BATT_TEMP ] = get_adc( ADC_SEL_BATT_TEMP );
|
||||
vreg_ctr[ VREG_C_BT_TEMP ] = get_adc( ADC_SEL_BATT_TEMP );
|
||||
BT_TEMP_P = 0;
|
||||
temp = vreg_ctr[ VREG_C_DBG_BATT_TEMP ];
|
||||
temp = vreg_ctr[ VREG_C_BT_TEMP ];
|
||||
PM_set_batt_temp( temp ); // 温度のtemp。 残量ICに行きます
|
||||
|
||||
// 残量チェック
|
||||
PM_get_batt_left();
|
||||
if( temp < 0 ){
|
||||
if( PM_get_batt_left() < 0 ){
|
||||
return( 1 );
|
||||
}
|
||||
vreg_ctr[ VREG_C_BATT_INFO ] = temp;
|
||||
|
||||
// 電源順次立ち上げ
|
||||
PM_LDSW_on();
|
||||
@ -352,7 +349,7 @@ err PM_sys_pow_on(){
|
||||
return( ERR_ERR );
|
||||
}
|
||||
PM_reset_neg();
|
||||
RESET2_n = 1;
|
||||
RESET2_ngt;
|
||||
return( ERR_SUCCESS );
|
||||
|
||||
#else
|
||||
@ -363,50 +360,76 @@ err PM_sys_pow_on(){
|
||||
RESETs_ast;
|
||||
FCRAM_RST_ast;
|
||||
|
||||
PM_TEG_PWSW = 1;
|
||||
PM_TEG_PWSW = 1;
|
||||
wait_ms( 160 );
|
||||
PM_TEG_PWSW = 0;
|
||||
|
||||
|
||||
// 残量確認
|
||||
PM_get_batt_left();
|
||||
if( temp < 0 ){
|
||||
return( 1 );
|
||||
}
|
||||
vreg_ctr[ VREG_C_BT_LEFT ] = temp;
|
||||
|
||||
|
||||
|
||||
RESET1_ngt;
|
||||
wait_ms( 1 );
|
||||
if( !RESET1_n ){
|
||||
// ‹N“®Ž¸”s
|
||||
RESET2_ast;
|
||||
FCRAM_RST_ast;
|
||||
temp = PM_get_batt_left();
|
||||
temp = 200;
|
||||
if( temp < ( 255 * 0.03 ) ){
|
||||
return( ERR_ERR );
|
||||
}
|
||||
vreg_ctr[ VREG_C_BT_REMAIN ] = temp;
|
||||
|
||||
RESET1_ngt;
|
||||
RESET2_ngt;
|
||||
FCRAM_RST_ngt;
|
||||
|
||||
|
||||
|
||||
wait_ms( 100 );
|
||||
if( !RESET1_n ){
|
||||
// 起動失敗
|
||||
RESETs_ast;
|
||||
FCRAM_RST_ast;
|
||||
return( ERR_ERR );
|
||||
}
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
err to_sleep(){
|
||||
PM_LCD_off();
|
||||
return 0;
|
||||
|
||||
/*****************************************************************************
|
||||
電源OFFシーケンス
|
||||
*****************************************************************************/
|
||||
err PM_sys_pow_off(){
|
||||
#ifdef _PMIC_CTR_
|
||||
RSTB ネゲート
|
||||
TCOM,VCS OFF
|
||||
(1ms)
|
||||
(50ms)
|
||||
->PM LCD系電源OFF
|
||||
PM_LCD_off();
|
||||
RST1,2,fcramアサート
|
||||
->システム電源OFF
|
||||
PM_off();
|
||||
ロードスイッチOFF
|
||||
PM_LDSW_off();
|
||||
#else
|
||||
wait_ms( 50 );
|
||||
|
||||
if( RESET1_n ){ // 異常終了から来た場合
|
||||
PM_TEG_PWSW = 1;
|
||||
wait_ms( 250 );
|
||||
wait_ms( 250 );
|
||||
wait_ms( 250 );
|
||||
PM_TEG_PWSW = 0;
|
||||
}
|
||||
RESETs_ast;
|
||||
FCRAM_RST_ast;
|
||||
#endif
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
err to_off(){
|
||||
|
||||
/*****************************************************************************
|
||||
スリープシーケンス
|
||||
*****************************************************************************/
|
||||
err to_sleep(){
|
||||
PM_LCD_off();
|
||||
RESETs_ast;
|
||||
PM_off();
|
||||
PM_LDSW_off();
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -430,30 +453,18 @@ err to_off(){
|
||||
|
||||
|
||||
*****************************************************************************/
|
||||
#define set_bit( cond, reg, pos ) \
|
||||
{ \
|
||||
if( cond ){ \
|
||||
reg |= pos; \
|
||||
}else{ \
|
||||
reg &= ~pos; \
|
||||
} \
|
||||
}
|
||||
|
||||
task_status tsk_batt(){
|
||||
task_interval tsk_batt(){
|
||||
static u8 bt_stat = 0;
|
||||
static u8 charge_hys = 0; // ヒステリシスで上限下限を拡張するとき1
|
||||
|
||||
// 電源周りのステータスが変化?
|
||||
set_bit( PM_EXTDC, vreg_ctr[ VREG_C_STATUS0 ], 0x80 );
|
||||
set_bit( BT_CHG_EN, vreg_ctr[ VREG_C_STATUS0 ], 0x40 );
|
||||
set_bit( !BT_CHG_ERR_n, vreg_ctr[ VREG_C_STATUS0 ], 0x20 );
|
||||
|
||||
if( ( ( vreg_ctr[ VREG_C_STATUS0 ] ^ bt_stat ) & 0xE0 ) != 0 ){
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= 0x80;
|
||||
}
|
||||
bt_stat = vreg_ctr[ VREG_C_STATUS0 ];
|
||||
set_bit( PM_EXTDC, vreg_ctr[ VREG_C_STATUS ], REG_BIT_POW_SUPPLY );
|
||||
set_bit( !BT_CHG_ERR_n, vreg_ctr[ VREG_C_STATUS ], REG_BIT_BATT_CHARGE_ERR );
|
||||
set_bit( !BT_CHG_n, vreg_ctr[ VREG_C_STATUS ], REG_BIT_BATT_CHARGE );
|
||||
// →割り込み。miscの中でよろしくやってくれている。
|
||||
|
||||
// 充電
|
||||
// 温度付きヒステリシス
|
||||
if( (( 345 / 4 ) < vreg_ctr[ VREG_C_BT_TEMP ] ) && ( vreg_ctr[ VREG_C_BT_TEMP ] < ( 739 / 4 )) ){
|
||||
charge_hys = 1;
|
||||
}
|
||||
@ -475,11 +486,80 @@ task_status tsk_batt(){
|
||||
}
|
||||
|
||||
// 充電LED
|
||||
if( PM_EXTDC && BT_CHG_EN && BT_CHG_ERR_n ){
|
||||
LED_duty_CHARGE = vreg_ctr[ VREG_C_LED_BRIGHT ];
|
||||
}else{
|
||||
LED_duty_CHARGE = 0;
|
||||
}
|
||||
LED_duty_CHARGE = !BT_CHG_n ? vreg_ctr[ VREG_C_LED_BRIGHT ]: 0;
|
||||
|
||||
return( 50 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*=========================================================
|
||||
extDC割り込み
|
||||
電源OFFから起こす(充電の温度監視のため)のみ
|
||||
普段はポーリング(pm)
|
||||
=========================================================*/
|
||||
__interrupt void intp4_extdc(){
|
||||
;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*=========================================================
|
||||
フタ開け閉め割り込み
|
||||
電源OFFから起こす(充電の温度監視のため)のみ
|
||||
普段はポーング(misc)
|
||||
=========================================================*/
|
||||
__interrupt void intp5_shell(){
|
||||
;
|
||||
}
|
||||
|
||||
|
||||
/*=========================================================
|
||||
旧PMICへのコマンド書き込み
|
||||
=========================================================*/
|
||||
__interrupt void intp6_PM_irq(){
|
||||
renge_task_immed_add( ntr_pmic_comm );
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
PMICからの割り込みを受けて、NTRPMIC互換レジスタからリード
|
||||
*****************************************************************************/
|
||||
task_status_immed ntr_pmic_comm(){
|
||||
#ifdef _CODEC_CTR_
|
||||
static u8 reg_shadow;
|
||||
u8 reg_old;
|
||||
|
||||
reg_old = reg_shadow; // BL関係
|
||||
reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_PMCOMP );
|
||||
DI();
|
||||
if(( reg_shadow & ( 1 << 6 )) != 0 ){
|
||||
// offリクエスト
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_TWL_OFF_REQ;
|
||||
IRQ0_ast;
|
||||
}
|
||||
if(( reg_shadow & ( 1 << 0 )) != 0 ){
|
||||
// リセットリクエスト
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_TWL_RESET_REQ;
|
||||
IRQ0_ast;
|
||||
}
|
||||
if( (( reg_old ^ reg_shadow ) & ~( 0x03 << 2 )) != 0 ){
|
||||
if(( reg_shadow & ( 0x03 << 2 )) == 0x00 ){
|
||||
// バックライトが両方消された
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
|
||||
vreg_ctr[ VREG_C_STATUS ] &= ~0x01;
|
||||
IRQ0_ast;
|
||||
}else if(( reg_shadow & ( 0x03 << 2 )) == ( 0x03 << 2 )){
|
||||
// バックライトが両方ついた
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
|
||||
vreg_ctr[ VREG_C_STATUS ] |= 0x01;
|
||||
IRQ0_ast;
|
||||
}
|
||||
}
|
||||
EI();
|
||||
reg_shadow &= ~( 0x03 << 3 ); // BLだけマスクして、クリアの準備
|
||||
iic_mcu_write_a_byte( IIC_SLA_CODEC, CODEC_REG_PMCOMP, reg_shadow );
|
||||
#endif
|
||||
return( ERR_FINISED );
|
||||
}
|
||||
|
||||
109
trunk/pm.h
Normal file
109
trunk/pm.h
Normal file
@ -0,0 +1,109 @@
|
||||
#ifndef __PM__
|
||||
#define __PM__
|
||||
|
||||
|
||||
#define IIC_SLA_PMIC 0x84
|
||||
#define IIC_SLA_BT_GAUGE 0x6C
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
enum BT_GAUGE_REG_ADRS{
|
||||
BT_GAUGE_REG_VCELL = 0x02, // それぞれ16ビットです
|
||||
BT_GAUGE_REG_SOC = 0x04,
|
||||
BT_GAUGE_REG_MODE = 0x06,
|
||||
BT_GAUGE_REG_VERSION = 0x08,
|
||||
BT_GAUGE_REG_RCOMP = 0xC0,
|
||||
BT_GAUGE_REG_COMMAND = 0xFE
|
||||
};
|
||||
|
||||
enum PMIC_REG_ADRS{
|
||||
PM_REG_ADRS_VER = 0x00, // verinfo など
|
||||
PM_REG_ADRS_VDD_SYS, // システムが使用する電源
|
||||
PM_REG_ADRS_VDD_LCD, // 液晶電源
|
||||
PM_REG_ADRS_CONT, // /RESET1, LoadSwitch
|
||||
PM_REG_ADRS_BL, // バックライト on/off
|
||||
PM_REG_ADRS_POW_SAVE, // 省電力設定
|
||||
PM_REG_ADRS_POW_DAC1,
|
||||
PM_REG_ADRS_POW_DAC2
|
||||
};
|
||||
|
||||
// CODEC上のPMIC互換レジスタ
|
||||
#define CODEC_REG_PMCOMP 0x10
|
||||
|
||||
/*****************************************************************************/
|
||||
extern u16 raw_adc_temperature;
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
#define PM_REG_BIT_LDSW ( 1 << 0 )
|
||||
#define PM_REG_BIT_nRST1 ( 1 << 1 )
|
||||
#define PM_REG_BIT_VDD 0x0F
|
||||
#define PM_REG_BIT_VDD50A ( 1 << 4 )
|
||||
|
||||
#define PM_REG_BIT_VDDLCD 0x07
|
||||
#define PM_REG_BIT_LCD_ANALOG ( 0x03 << 3 )
|
||||
|
||||
|
||||
#define DELAY_PM_TW_PWUP 16
|
||||
#define DELAY_PM_TSS_50B 5
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
err PM_sys_pow_on();
|
||||
err PM_sys_pow_off();
|
||||
err PM_LCD_on();
|
||||
err PM_bt_auth();
|
||||
err PM_bt_temp_update();
|
||||
void PM_init();
|
||||
err PM_reset();
|
||||
|
||||
|
||||
// これを呼ぶ前に、現在温度を教えておく必要があります。
|
||||
#define PM_get_batt_left() ( iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC ) )
|
||||
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
// 元栓 //
|
||||
#define PM_LDSW_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, PM_REG_BIT_LDSW ))
|
||||
#define PM_LDSW_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, 0 ))
|
||||
|
||||
|
||||
// システム電源 //
|
||||
#define PM_VDD_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, PM_REG_BIT_VDD ))
|
||||
#define PM_VDD50A_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, ( PM_REG_BIT_VDD | PM_REG_BIT_VDD50A )))
|
||||
#define PM_VDD_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, 0 ))
|
||||
#define PM_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, 0 ))
|
||||
|
||||
|
||||
// ほか //
|
||||
#ifdef _PMIC_TWL_
|
||||
#define PM_reset_neg() { PM0.0 = 1; PU0.0 = 1; }
|
||||
#define PM_reset_ast() { P0.0 = 0; PM0.0 = 0; }
|
||||
#define PM_chk_LDSW() ( 1 )
|
||||
#else
|
||||
|
||||
#define PM_reset_neg() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW | PM_REG_BIT_nRST1 )))
|
||||
#define PM_reset_ast() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW )))
|
||||
#define PM_chk_LDSW() ( iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT ) & PM_REG_BIT_LDSW )
|
||||
#endif
|
||||
|
||||
|
||||
// 液晶系電源 //
|
||||
#define PM_VDDLCD_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, PM_REG_BIT_VDDLCD ))
|
||||
#define PM_TCOM_VCS_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, ( PM_REG_BIT_VDDLCD | PM_REG_BIT_LCD_ANALOG )))
|
||||
#define PM_TCOM_VCS_off() PM_VDDLCD_on()
|
||||
#define PM_VDDLCD_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, 0 ) )
|
||||
|
||||
#define PM_set_BL( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL, dat ) )
|
||||
#define PM_set_pow_save( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, dat ) )
|
||||
#define PM_set_adc1( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DAC1, dat ) )
|
||||
#define PM_set_adc2( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DAC2, dat ) )
|
||||
|
||||
|
||||
#endif // __PM__
|
||||
202
trunk/renge/renge.c
Normal file
202
trunk/renge/renge.c
Normal file
@ -0,0 +1,202 @@
|
||||
|
||||
#pragma section @@CODE ROM_CODE
|
||||
|
||||
/******************************************************************************
|
||||
タスクシステム?
|
||||
なるほど、iTRONにはコンフィギュレータがあるはずだ。
|
||||
→作りました
|
||||
ctr_mcu_config.rb 参照。 task_config.hが作成されます。
|
||||
*****************************************************************************/
|
||||
#include "renge_task_intval.h"
|
||||
#include "renge_task_immediate.h"
|
||||
|
||||
|
||||
#include "..\WDT.h"
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
bit renge_flg_interval;
|
||||
bit renge_task_interval_run_force;
|
||||
|
||||
extern task_info tasks[];
|
||||
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
static void renge_task_immed_init();
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
初期化。
|
||||
・タスクシステムの動的部分の初期化
|
||||
・インターバルタイマ
|
||||
*****************************************************************************/
|
||||
void renge_init(){
|
||||
renge_task_immed_init();
|
||||
/*
|
||||
イベントタイマのセットなど
|
||||
今回はRTCを流用しているのでコメントアウト
|
||||
#define renge_tick 19xxxxxxx [ms]
|
||||
renge_interval_init(); → RTC_init();
|
||||
*/
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
システムチックを進める
|
||||
*****************************************************************************/
|
||||
/*
|
||||
void renge_interval(){
|
||||
// RTCがやってくれる
|
||||
→__interrupt void int_rtc_int();
|
||||
}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
コンパイル時に決まっている、インターバル起動のタスク
|
||||
そのうち、逐次起動と混ぜるかもしれない。
|
||||
|
||||
強制起動のフラグの件。後で整理
|
||||
*****************************************************************************/
|
||||
err renge_task_interval_run(){
|
||||
task_info *current_task;
|
||||
|
||||
// インターバル起動
|
||||
if( renge_flg_interval == 1 ){
|
||||
renge_flg_interval = 0;
|
||||
for( current_task = tasks; current_task != &tasks[TSK_LAST]; current_task += 1 ){
|
||||
|
||||
if( current_task -> dispatch_type == INTERVAL ){
|
||||
if( current_task -> interval == 0 ){
|
||||
current_task -> interval = current_task -> task();
|
||||
}else{
|
||||
current_task -> interval -= 1;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
// ***_TRIG等で強制起動
|
||||
if( renge_task_interval_run_force ){
|
||||
renge_task_interval_run_force = 0; // とりあえず、何が何でもフラグ消しちゃうけど...
|
||||
for( current_task = tasks; current_task != &tasks[TSK_LAST]; current_task += 1 ){
|
||||
current_task -> interval = current_task -> task();
|
||||
}
|
||||
}
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
■逐一起動タスク■
|
||||
|
||||
●task_immed を返す関数。
|
||||
●システムtick、何らかの割り込み(I2C通信完了など)で
|
||||
スリープから復帰したタイミングで実行されます。
|
||||
|
||||
■返値 ERR_FINISED タスクを削除
|
||||
それ以外 次のタイミングでまた実行
|
||||
|
||||
*****************************************************************************/
|
||||
#define IMMED_RSV_TASKS_NUM 10
|
||||
task_immed tasks_immed[ IMMED_RSV_TASKS_NUM ]; // タスクへのポインタの配列
|
||||
u8 task_immed_index = 0;
|
||||
|
||||
|
||||
|
||||
/**************************************
|
||||
**************************************/
|
||||
void renge_task_immed_init(){
|
||||
// tasks_immed[ 0 ] = (void *)0;
|
||||
task_immed_index = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************
|
||||
**************************************/
|
||||
err renge_task_immed_add( task_immed new_task ){
|
||||
u8 temp;
|
||||
|
||||
if( task_immed_index >= IMMED_RSV_TASKS_NUM ){
|
||||
// タスクの登録領域が足りなかった
|
||||
while(1);
|
||||
}else{
|
||||
#if 1
|
||||
// 同じタスクの多重登録を避ける
|
||||
for( temp = 0; temp < task_immed_index; temp += 1 ){
|
||||
if( tasks_immed[ temp ] == new_task ){
|
||||
return( ERR_ERR );
|
||||
}
|
||||
}
|
||||
#endif
|
||||
tasks_immed[ task_immed_index ] = new_task;
|
||||
tasks_immed[ task_immed_index+1 ] = 0; // 大丈夫?
|
||||
task_immed_index += 1;
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************
|
||||
**************************************/
|
||||
err renge_task_immed_del( u8 task_id ){
|
||||
u8 i;
|
||||
|
||||
for( i = task_id; i < IMMED_RSV_TASKS_NUM; i += 1 ){
|
||||
tasks_immed[ i ] = tasks_immed[ i+1 ];
|
||||
}
|
||||
|
||||
task_immed_index -= 1;
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************
|
||||
**************************************/
|
||||
err renge_task_immed_run(){
|
||||
u8 task_id = 0;
|
||||
|
||||
while( tasks_immed[ task_id ] != 0 ){
|
||||
if( tasks_immed[ task_id ]( (u8*)0 ) == ERR_FINISED ){
|
||||
renge_task_immed_del( task_id ); // ←が tasks_immed[ id ] を前詰めしてしまうので、
|
||||
}else{ // 同じid (=元は、次のid) を起動しなくてはならない
|
||||
task_id += 1;
|
||||
}
|
||||
}
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
単位は ms
|
||||
NOPを回すだけ、指定時間CPUを占有します。
|
||||
割り込みとか入るとその分遅れます。
|
||||
少し誤差あります。
|
||||
*****************************************************************************/
|
||||
void wait_ms( u8 ms ){
|
||||
u16 fine;
|
||||
|
||||
WDT_Restart();
|
||||
// まだ適当です!
|
||||
while( ms != 0 ){
|
||||
ms--;
|
||||
fine = 430;
|
||||
while( fine != 0 ){
|
||||
fine -= 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
32
trunk/renge/renge.h
Normal file
32
trunk/renge/renge.h
Normal file
@ -0,0 +1,32 @@
|
||||
#ifndef __renge__
|
||||
#define __renge__
|
||||
|
||||
//******************************************************************************
|
||||
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
#include "renge_defs.h"
|
||||
#include "renge_task_immediate.h"
|
||||
// #include "renge_task_interval_run.h" // ŠO‚©‚ç‹<E280B9>§‹N“®‹ÖŽ~<7E>I
|
||||
|
||||
|
||||
void renge_init();
|
||||
|
||||
|
||||
err renge_task_interval_run();
|
||||
extern bit renge_task_interval_run_force;
|
||||
extern bit renge_flg_interval;
|
||||
|
||||
|
||||
void renge_task_immed_init();
|
||||
err renge_task_immed_run();
|
||||
err renge_task_immed_add( task_immed );
|
||||
err renge_task_immed_del( u8 );
|
||||
|
||||
|
||||
void wait_ms( u8 );
|
||||
|
||||
u8 renge_set_jump( u8 tsk_id );
|
||||
|
||||
#endif
|
||||
68
trunk/renge/renge_defs.h
Normal file
68
trunk/renge/renge_defs.h
Normal file
@ -0,0 +1,68 @@
|
||||
#ifndef __renge_defs__
|
||||
#define __renge_defs__
|
||||
/******************************************************************************
|
||||
Renge Ver.0 (2009/04/09)
|
||||
2009- 7k4jhl R.Fujita @ RED.nintendo
|
||||
|
||||
OSにはほど遠い、簡易的なタスクシステム。
|
||||
Range の Typo ではないです。レンゲです。
|
||||
|
||||
必要に応じてがんがん変えて使います。
|
||||
|
||||
なんと レンゲ は俗称で日本名は ゲンゲ
|
||||
小さいけど役に立つ役草です。
|
||||
大きく育ってね!
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
#include "jhl_defs.h"
|
||||
/*/
|
||||
typedef unsigned char u8;
|
||||
typedef char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef short s16;
|
||||
|
||||
typedef unsigned char err;
|
||||
//*/
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
|
||||
typedef u8 task_rv;
|
||||
typedef task_rv renge_task; // 気分の問題
|
||||
|
||||
typedef u8 task_interval;
|
||||
typedef task_interval ( *p_task )(); // p_taskという、task_interval型の関数へのポインタ
|
||||
|
||||
typedef enum{
|
||||
INTERVAL,
|
||||
I2CM_END,
|
||||
I2C_M_FREE
|
||||
}dispatch_type;
|
||||
|
||||
typedef struct{
|
||||
p_task task;
|
||||
dispatch_type dispatch_type;
|
||||
task_interval interval;
|
||||
}task_info;
|
||||
|
||||
/**************************************
|
||||
逐一起動のタスクリスト
|
||||
廃止になるかもしれないが
|
||||
*************************************/
|
||||
typedef u8 task_status_immed;
|
||||
typedef task_status_immed ( * task_immed ) ( void * );
|
||||
|
||||
|
||||
typedef enum{
|
||||
ERR_SUCCESS = 0,
|
||||
ERR_ERR
|
||||
}ERR;
|
||||
|
||||
|
||||
typedef enum{
|
||||
ERR_FINISED = 0,
|
||||
ERR_CONTINUE
|
||||
}IMMED_TASK_ERR;
|
||||
|
||||
#endif
|
||||
60
trunk/renge/renge_task_config.rb
Normal file
60
trunk/renge/renge_task_config.rb
Normal file
@ -0,0 +1,60 @@
|
||||
#!/usr/bin/ruby -Ks
|
||||
|
||||
tasklist = Array.new
|
||||
|
||||
|
||||
if( ARGV[0] == nil )
|
||||
printf( "既定ファイル renge_tasks.txt を使用します" )
|
||||
datfile = "renge_tasks.txt"
|
||||
else
|
||||
datfile = ARGV[0]
|
||||
end
|
||||
|
||||
if( !File.exist?( datfile ) )
|
||||
printf("設定ファイルが見つかりません。")
|
||||
exit( 1 )
|
||||
end
|
||||
|
||||
|
||||
setting = File.open( datfile )
|
||||
|
||||
setting.each{|dat|
|
||||
dat.chomp!
|
||||
if( dat != nil )
|
||||
tasklist << dat
|
||||
end
|
||||
}
|
||||
|
||||
tasklist.each{|dat|
|
||||
printf( "\n%s" , dat )
|
||||
}
|
||||
printf( "\n----------\nタスク数 %d \n", tasklist.size )
|
||||
|
||||
|
||||
#----- 静的タスクの列挙 -------------------------------------------------------
|
||||
conf = File.new( "renge_task_intval.h", "w+" )
|
||||
|
||||
conf << "/*スクリプトによる自動生成です。手動で書き換えない方がよいです*/\n\n"
|
||||
conf << "#ifndef __renge_task__\n#define __renge_task__\n\n"
|
||||
conf << "#include \"renge_defs.h\"\n\n"
|
||||
|
||||
conf << "enum {\n "
|
||||
tasklist.each{|dat|
|
||||
conf << "TSK_" << dat.upcase << ", "
|
||||
}
|
||||
conf << "TSK_LAST \n };\n\n"
|
||||
|
||||
|
||||
tasklist.each{|dat|
|
||||
conf << "extern task_interval tsk_" << dat << "();\n"
|
||||
}
|
||||
conf << "\n"
|
||||
|
||||
conf << "task_info tasks[ TSK_LAST ] = {\n "
|
||||
tasklist.each{|dat|
|
||||
conf << "{ tsk_" << dat << ",\t\tINTERVAL, 0 },\n "
|
||||
}
|
||||
conf << " \n};\n"
|
||||
|
||||
|
||||
conf << "\n\n#endif\n"
|
||||
21
trunk/renge/renge_task_immediate.h
Normal file
21
trunk/renge/renge_task_immediate.h
Normal file
@ -0,0 +1,21 @@
|
||||
#ifndef __tasks__
|
||||
#define __tasks__
|
||||
|
||||
|
||||
#include "renge_defs.h"
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
逐一起動タスク
|
||||
手動で追記
|
||||
*****************************************************************************/
|
||||
extern task_status_immed ntr_pmic_comm();
|
||||
extern task_status_immed tsk_cbk_accero();
|
||||
extern task_status_immed do_command0();
|
||||
extern task_status_immed do_command1();
|
||||
|
||||
extern task_status_immed acc_read();
|
||||
extern task_status_immed acc_write();
|
||||
|
||||
#endif
|
||||
40
trunk/renge/renge_task_intval.h
Normal file
40
trunk/renge/renge_task_intval.h
Normal file
@ -0,0 +1,40 @@
|
||||
/*スクリプトによる自動生成です。手動で書き換えない方がよいです*/
|
||||
|
||||
#ifndef __renge_task__
|
||||
#define __renge_task__
|
||||
|
||||
#include "renge_defs.h"
|
||||
|
||||
enum {
|
||||
TSK_SW, TSK_WIFI, TSK_ADC, TSK_BATT, TSK_LED_POW, TSK_LED_WIFI, TSK_MISC_STAT, TSK_DEBUG, TSK_DEBUG2, TSK_SOFT_INT, TSK_SYS, TSK_LAST
|
||||
};
|
||||
|
||||
extern task_interval tsk_sw();
|
||||
extern task_interval tsk_wifi();
|
||||
extern task_interval tsk_adc();
|
||||
extern task_interval tsk_batt();
|
||||
extern task_interval tsk_led_pow();
|
||||
extern task_interval tsk_led_wifi();
|
||||
extern task_interval tsk_misc_stat();
|
||||
extern task_interval tsk_debug();
|
||||
extern task_interval tsk_debug2();
|
||||
extern task_interval tsk_soft_int();
|
||||
extern task_interval tsk_sys();
|
||||
|
||||
task_info tasks[ TSK_LAST ] = {
|
||||
{ tsk_sw, INTERVAL, 0 },
|
||||
{ tsk_wifi, INTERVAL, 0 },
|
||||
{ tsk_adc, INTERVAL, 0 },
|
||||
{ tsk_batt, INTERVAL, 0 },
|
||||
{ tsk_led_pow, INTERVAL, 0 },
|
||||
{ tsk_led_wifi, INTERVAL, 0 },
|
||||
{ tsk_misc_stat, INTERVAL, 0 },
|
||||
{ tsk_debug, INTERVAL, 0 },
|
||||
{ tsk_debug2, INTERVAL, 0 },
|
||||
{ tsk_soft_int, INTERVAL, 0 },
|
||||
{ tsk_sys, INTERVAL, 0 },
|
||||
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
11
trunk/renge/renge_tasks.txt
Normal file
11
trunk/renge/renge_tasks.txt
Normal file
@ -0,0 +1,11 @@
|
||||
sw
|
||||
wifi
|
||||
adc
|
||||
batt
|
||||
led_pow
|
||||
led_wifi
|
||||
misc_stat
|
||||
debug
|
||||
debug2
|
||||
soft_int
|
||||
sys
|
||||
69
trunk/rtc.c
69
trunk/rtc.c
@ -4,19 +4,15 @@
|
||||
#pragma sfr
|
||||
#pragma inline
|
||||
|
||||
/*--- Include -------------------*/
|
||||
|
||||
|
||||
/*------------------------------------*/
|
||||
#include "incs.h"
|
||||
|
||||
|
||||
/*--- Extern --------------------*/
|
||||
|
||||
|
||||
|
||||
/*--- Prototype -----------------*/
|
||||
|
||||
|
||||
|
||||
/*--- Global Value --------------*/
|
||||
u8 rtc_work[7];
|
||||
bit rtc_lock;
|
||||
bit rtc_dirty;
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
@ -61,33 +57,52 @@ __interrupt void int_rtc_int(){
|
||||
|
||||
/******************************************************************************
|
||||
RTC ‚̃Š<EFBFBD>[ƒh
|
||||
レジスタは、sec,min,hour,week,day,month,year の順
|
||||
*******************************************************************************/
|
||||
void get_rtc(){
|
||||
|
||||
if( rtc_lock == 0 ){
|
||||
rtc_lock = 1;
|
||||
RWAIT = 1;
|
||||
while( !RWST ){;}
|
||||
/*
|
||||
memcpy( &vreg_ctr[ VREG_C_RTC_SEC ], &SEC, 4 );
|
||||
/*/
|
||||
vreg_ctr[ VREG_C_RTC_SEC ] = SEC; // ‚±‚Ì•û‚ª‘<C2AA>‚¢
|
||||
vreg_ctr[ VREG_C_RTC_MIN ] = MIN;
|
||||
vreg_ctr[ VREG_C_RTC_HOUR ] = HOUR;
|
||||
vreg_ctr[ VREG_C_RTC_DAY ] = DAY;
|
||||
vreg_ctr[ VREG_C_RTC_WEEK ] = WEEK;
|
||||
vreg_ctr[ VREG_C_RTC_MONTH ] = MONTH;
|
||||
vreg_ctr[ VREG_C_RTC_YEAR ] = YEAR;
|
||||
//*/
|
||||
RWAIT = 0;
|
||||
|
||||
memcpy( &vreg_ctr[ VREG_C_RTC_SEC ], &SEC, 7 );
|
||||
RWAIT = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
RTC ‚̃Š<EFBFBD>[ƒh
|
||||
RTC のライト
|
||||
set_rtc_close と対で使って下さい。
|
||||
こいつはバッファにコピーするだけで、
|
||||
実際にRTCにセットするのはset_rtc_close()です。
|
||||
*******************************************************************************/
|
||||
void set_rtc(){
|
||||
|
||||
|
||||
void set_rtc( u8 adrs, u8 data ){
|
||||
if( rtc_dirty == 0 ){
|
||||
rtc_dirty = 1;
|
||||
memcpy( rtc_work, &SEC, 7 );
|
||||
}
|
||||
rtc_work[ adrs ] = data;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************************
|
||||
必要ならば、RTCレジスタの更新
|
||||
**************************************/
|
||||
void rtc_close_iic(){
|
||||
rtc_lock = 0;
|
||||
if( rtc_dirty ){
|
||||
rtc_dirty = 0;
|
||||
RWAIT = 1;
|
||||
while( !RWST ){;}
|
||||
memcpy( &SEC, rtc_work, 7 );
|
||||
RWAIT = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
20
trunk/rtc.h
Normal file
20
trunk/rtc.h
Normal file
@ -0,0 +1,20 @@
|
||||
#ifndef __rtc_h__
|
||||
#define __rtc_h__
|
||||
|
||||
|
||||
/*-------------------------------*/
|
||||
void RTC_init(void);
|
||||
__interrupt void int_rtc_int();
|
||||
void get_rtc();
|
||||
void set_rtc();
|
||||
|
||||
void rtc_close_iic();
|
||||
|
||||
|
||||
/*-------------------------------*/
|
||||
#define RTC_32k_on() { RCLOE0 = 1; }
|
||||
|
||||
|
||||
|
||||
/*-------------------------------*/
|
||||
#endif
|
||||
@ -21,141 +21,289 @@
|
||||
const u8 fsl_fx_MHz_u08 = 4;
|
||||
const u8 fsl_low_voltage_u08 = 0;
|
||||
|
||||
|
||||
// 自己フラッシュパラメータ
|
||||
#define SAM_BLOCK_SIZE 1024
|
||||
#define SELF_UPDATE_BUFF_SIZE 256
|
||||
#define SELF_UPDATE_SPLIT_WRITE_NUM ( SAM_BLOCK_SIZE / SELF_UPDATE_BUFF_SIZE )
|
||||
#define SAM_WORD_SIZE 4
|
||||
#define UPDATEABLE_BLOCK_LAST 7
|
||||
|
||||
#define INACTIVE_BOOTSECT_TOP 4
|
||||
#define UPDATE_BLOCK_LAST 17
|
||||
#define FIRM_TOP 8
|
||||
#define FIRM_SIZE 10
|
||||
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
|
||||
|
||||
#define ACKD ACKD0
|
||||
#define ACKE ACKE0
|
||||
#define COI COI0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAPR0 IICAPR00
|
||||
#define IICRSV IICRSV0
|
||||
#define IICA IICA0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICAIF IICAIF0
|
||||
#define IICAMK IICAMK0
|
||||
#define IICAPR1 IICAPR10
|
||||
#define IICCTL0 IICCTL00
|
||||
#define IICE IICE0
|
||||
#define IICF IICF0
|
||||
#define IICS IICS0
|
||||
#define IICWH IICWH0
|
||||
#define IICWL IICWL0
|
||||
#define LREL LREL0
|
||||
#define SPD SPD0
|
||||
#define SPIE SPIE0
|
||||
#define STCEN STCEN0
|
||||
#define STD STD0
|
||||
#define SVA SVA0
|
||||
#define WREL WREL0
|
||||
#define WTIM WTIM0
|
||||
#endif
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
static void FSL_Open(void);
|
||||
static void FSL_Close(void);
|
||||
err firm_restore();
|
||||
|
||||
|
||||
|
||||
// magic.c の記述と違わないように注意!
|
||||
#define N_MGC_L 0x1FF6
|
||||
#define N_MGC_T 0x6FF6
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*****************************************************************************/
|
||||
void firm_update(){
|
||||
u8 flg_rcv_end = 0;
|
||||
err firm_update(){
|
||||
u8 flg_rcv_end;
|
||||
u8 buffer_fill;
|
||||
u8 target_block;
|
||||
u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ];
|
||||
u8 *p_data_buffer;
|
||||
u8 split_write_count; // ブロックへちまちま書き込むカウンタ
|
||||
fsl_u08 err;
|
||||
__far u8* p_rom;
|
||||
|
||||
// debug
|
||||
__far u8* p_rom = (u8*)0x0000;
|
||||
flg_rcv_end = 0;
|
||||
|
||||
// 書き替え前準備 //
|
||||
FSL_Open(); // 割り込み禁止など
|
||||
DI();
|
||||
|
||||
err = FSL_Init( data_buffer ); // ライブラリ初期化。割り込み中断考慮せず
|
||||
err += FSL_ModeCheck(); // ライトプロテクトチェック。失敗することを考慮せず
|
||||
err += FSL_ModeCheck(); // ライトプロテクトチェック。失敗することを考慮せず
|
||||
|
||||
// 書き替え //
|
||||
|
||||
// ファームのバックアップ //
|
||||
/*
|
||||
●アクティブでない方のブートクラスタ (0x1000 =ブロック3) から、ストップコンディションが来るまで
|
||||
消しては書き、消しては書きする。
|
||||
●各ブロック、内部ベリファイをして、だめだったら1回リトライする。
|
||||
それでもだなら、LEDちかちかとかさせて、サービス送りにしてもらう
|
||||
●ベリファイがOKだったところで、それがブロック7だったら、スワップを行う。
|
||||
後はひたすら終わるまで続けるか、
|
||||
書き替えては行けない領域に行きそうなら止める(無いと思うが)
|
||||
●終わったら、リセットベクタに飛ばす。
|
||||
0x2000 - 0x47FF (ブロック 8 - 17) を
|
||||
0x4800 - 0x7FFF (ブロック 18 - 27) にコピー
|
||||
*/
|
||||
|
||||
|
||||
// ブロック分繰り返す
|
||||
for( target_block = 4;
|
||||
target_block <= UPDATEABLE_BLOCK_LAST ;
|
||||
p_rom = (u8*)0x2000;
|
||||
// 書き込み先ブロックの数だけ繰り返す
|
||||
for( target_block = ( FIRM_TOP + FIRM_SIZE );
|
||||
target_block < ( FIRM_TOP + FIRM_SIZE + FIRM_SIZE );
|
||||
target_block += 1 ){
|
||||
|
||||
WDT_Restart();
|
||||
// ブロック消去
|
||||
while( FSL_BlankCheck( target_block ) != FSL_OK ){
|
||||
err = FSL_Erase( target_block );
|
||||
}
|
||||
|
||||
// 分割書き込み分繰り返す
|
||||
for( split_write_count = 0;
|
||||
split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM;
|
||||
split_write_count += 1 ){
|
||||
|
||||
// 初めて見るブロックなら消去
|
||||
if( split_write_count == 0 ){
|
||||
while( FSL_BlankCheck( target_block ) != FSL_OK ){
|
||||
err = FSL_Erase( target_block );
|
||||
}
|
||||
}
|
||||
|
||||
// 書き込みデータをバッファにためる
|
||||
p_data_buffer = data_buffer;
|
||||
|
||||
|
||||
/* I2Cから受信
|
||||
for( buffer_fill = 0;
|
||||
buffer_fill != SELF_UPDATE_BUFF_SIZE - 1;
|
||||
buffer_fill++ ){
|
||||
while( !IICAIF ){;}
|
||||
IICAIF = 0;
|
||||
if( SPD ){
|
||||
flg_rcv_end = 1;
|
||||
break;
|
||||
}else{
|
||||
*p_data_buffer = IICA;
|
||||
WREL = 1;
|
||||
p_data_buffer += 1;
|
||||
}
|
||||
}
|
||||
|
||||
/*/
|
||||
// 動作確認 自分をコピー
|
||||
buffer_fill = 0;
|
||||
do{
|
||||
*p_data_buffer = *p_rom;
|
||||
p_data_buffer += 1;
|
||||
data_buffer[ buffer_fill ] = *p_rom;
|
||||
p_rom += 1;
|
||||
buffer_fill++;
|
||||
}while( buffer_fill != ( SELF_UPDATE_BUFF_SIZE & 0xFF ));
|
||||
//*/
|
||||
}while( buffer_fill != (u8)SELF_UPDATE_BUFF_SIZE );
|
||||
|
||||
// 書き込み
|
||||
// 最後だと、ゴミをパディングするが別にかまわない
|
||||
err = FSL_Write( (fsl_u32)( target_block * SAM_BLOCK_SIZE + split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
err = FSL_Write( (fsl_u32)( target_block * SAM_BLOCK_SIZE
|
||||
+ split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
(fsl_u08)( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) );
|
||||
|
||||
if( err != FSL_OK ){
|
||||
FSL_Close();
|
||||
while(1){
|
||||
NOP();
|
||||
}
|
||||
}
|
||||
|
||||
// 1ブロック書き込み完了だったら内部ベリファイを行う
|
||||
if(( split_write_count == SELF_UPDATE_SPLIT_WRITE_NUM - 1 ) ||
|
||||
flg_rcv_end ){
|
||||
while( FSL_IVerify( target_block ) != FSL_OK ){;}
|
||||
|
||||
// ブートクラスタの書き込み完了か?
|
||||
if( target_block == 7 ){
|
||||
err = FSL_InvertBootFlag();
|
||||
}
|
||||
}
|
||||
|
||||
if( flg_rcv_end ){
|
||||
goto UPDATE_END;
|
||||
NOP();
|
||||
return( ERR_ERR );
|
||||
}
|
||||
}
|
||||
}
|
||||
UPDATE_END:
|
||||
|
||||
// todo ちゃんと終わらせる
|
||||
// 1ブロック書き込み完了。内部電圧チェックを行う
|
||||
while( FSL_IVerify( target_block ) != FSL_OK ){ ; }
|
||||
}
|
||||
|
||||
|
||||
// 書き替え //
|
||||
/*
|
||||
●書き込み中の電源断を判定するため、最初に全クラスタ消去する(フッタを消したい)
|
||||
●ストップコンディションが来るまで続ける(結局、0x1000 - 0x47FF まですべて書き替えることにはなる)
|
||||
●終わったら、リセットする。WDTリセットなので自分でわかる。
|
||||
*/
|
||||
|
||||
// 全ブロック消去
|
||||
for( target_block = INACTIVE_BOOTSECT_TOP;
|
||||
target_block <= UPDATE_BLOCK_LAST ;
|
||||
target_block += 1 ){
|
||||
err = FSL_Erase( target_block );
|
||||
}
|
||||
|
||||
// ブロックの数だけ繰り返し
|
||||
for( target_block = INACTIVE_BOOTSECT_TOP;
|
||||
target_block <= UPDATE_BLOCK_LAST;
|
||||
target_block += 1 ){
|
||||
|
||||
// 分割書き込み
|
||||
for( split_write_count = 0;
|
||||
(( split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM ) && ( !SPD ));
|
||||
split_write_count += 1 ){
|
||||
|
||||
WDT_Restart();
|
||||
// I2Cから書き込みデータをバッファにためる
|
||||
do{
|
||||
while( !IICAIF && !SPD ){;}
|
||||
IICAIF = 0;
|
||||
data_buffer[ buffer_fill ] = IICA;
|
||||
WREL = 1;
|
||||
buffer_fill += 1;
|
||||
}while(( buffer_fill != (u8)SELF_UPDATE_BUFF_SIZE ) && !SPD );
|
||||
|
||||
// 書き込み
|
||||
// 最後だと、ゴミをパディングするが別にかまわない
|
||||
err = FSL_Write( (fsl_u32)( target_block * SAM_BLOCK_SIZE
|
||||
+ split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
(fsl_u08)( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) );
|
||||
|
||||
if( err != FSL_OK ){
|
||||
FSL_Close();
|
||||
return( ERR_ERR );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
// 1ブロック書き込み完了。内部ベリファイを行う
|
||||
while( FSL_IVerify( target_block ) != FSL_OK ){;}
|
||||
|
||||
if( SPD ){
|
||||
goto firm_update_end;
|
||||
}
|
||||
}
|
||||
|
||||
firm_update_end:
|
||||
WREL = 1;
|
||||
|
||||
FSL_SwapBootCluster();
|
||||
|
||||
|
||||
|
||||
// 書き込んだファームのチェック //
|
||||
{
|
||||
u8 i;
|
||||
u8 comp = 0;
|
||||
|
||||
// 少なくとも、ローダーのマジックと、本文の末尾のマジックは同じか確認
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ ){
|
||||
comp += ( *(u8*)( N_MGC_L + i ) == *(u8*)( N_MGC_T + i ) )? 0: 1;
|
||||
}
|
||||
|
||||
if( comp == 0 ){
|
||||
FSL_InvertBootFlag();
|
||||
FSL_SwapBootCluster();
|
||||
}else{
|
||||
FSL_ForceReset();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ***************************************************************************
|
||||
■ファームをバックアップ領域からリストアします。
|
||||
0x4800 - 0x7FFF (ブロック 18 - 27)を 0x2000 - 0x47FF (同、8 - 17) にコピーして
|
||||
ブートスワップ、リブートを行います。
|
||||
************************************************************************** */
|
||||
err firm_restore(){
|
||||
u8 flg_rcv_end = 0;
|
||||
u8 buffer_fill;
|
||||
u8 target_block;
|
||||
u8 data_buffer[ SELF_UPDATE_BUFF_SIZE ];
|
||||
u8 split_write_count; // ブロックへちまちま書き込むカウンタ
|
||||
fsl_u08 err;
|
||||
__far u8* p_rom;
|
||||
|
||||
// 書き替え前準備 //
|
||||
FSL_Open(); // 割り込み禁止など
|
||||
DI();
|
||||
|
||||
err = FSL_Init( data_buffer ); // ライブラリ初期化。割り込み中断考慮せず
|
||||
err += FSL_ModeCheck(); // ライトプロテクトチェック。失敗することを考慮せず
|
||||
|
||||
|
||||
// ファームのリストア
|
||||
/*
|
||||
0x4800 - 0x7FFF (ブロック 18 - 27) から
|
||||
0x2000 - 0x47FF (ブロック 8 - 17) へコピー
|
||||
*/
|
||||
|
||||
p_rom = (u8*)0x4800;
|
||||
// 転送先ブロックの数だけ繰り返す
|
||||
for( target_block = FIRM_TOP;
|
||||
target_block <= UPDATE_BLOCK_LAST;
|
||||
target_block += 1 ){
|
||||
|
||||
WDT_Restart();
|
||||
// 壊れたファームを消し
|
||||
err = FSL_Erase( target_block );
|
||||
|
||||
// 分割書き込み分繰り返す
|
||||
for( split_write_count = 0;
|
||||
split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM;
|
||||
split_write_count += 1 ){
|
||||
|
||||
// 書き込みデータをバッファにためる
|
||||
buffer_fill = 0;
|
||||
do{
|
||||
data_buffer[ buffer_fill ] = *p_rom;
|
||||
p_rom += 1;
|
||||
buffer_fill++;
|
||||
}while( buffer_fill != (u8)SELF_UPDATE_BUFF_SIZE );
|
||||
|
||||
// 書き込み
|
||||
err = FSL_Write( (fsl_u32)( target_block * SAM_BLOCK_SIZE
|
||||
+ split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
(fsl_u08)( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) );
|
||||
|
||||
if( err != FSL_OK ){
|
||||
FSL_Close();
|
||||
return( ERR_ERR );
|
||||
}
|
||||
}
|
||||
|
||||
// 1ブロック書き込み完了したので内部ベリファイを行う
|
||||
while( FSL_IVerify( target_block ) != FSL_OK ){ ; }
|
||||
}
|
||||
// todo
|
||||
// それでもだなら、LEDちかちかとかさせて、サービス送りにしてもらう
|
||||
|
||||
// リブート
|
||||
|
||||
FSL_ForceReset();
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//****************************************************************************
|
||||
static void FSL_Open(void)
|
||||
@ -203,7 +351,3 @@ static void FSL_Close(void)
|
||||
MK2H = fsl_MK2H_bak_u08; /* } */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
151
trunk/tasks.c
151
trunk/tasks.c
@ -8,41 +8,96 @@
|
||||
|
||||
/*****************************************************************************
|
||||
WiFi 関係
|
||||
・/rst_wifi
|
||||
・WL_TX,RX
|
||||
・LED_wifi
|
||||
・32kHz
|
||||
*****************************************************************************/
|
||||
task_status tsk_wifi(){
|
||||
task_interval tsk_wifi(){
|
||||
return 10;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
ステータスレジスタ関係
|
||||
他のところでケアされていない部分
|
||||
*****************************************************************************/
|
||||
task_interval tsk_misc_stat(){
|
||||
static u8 state_old; // ステータス変化検出→割り込み の為
|
||||
|
||||
SHELL_CLOSE_P = 1;
|
||||
set_bit( EXT_OPT_DET, vreg_ctr[ VREG_C_STATUS ], REG_BIT_EXT_OPT_LOCK );
|
||||
set_bit( SHELL_CLOSE, vreg_ctr[ VREG_C_STATUS ], REG_BIT_SHELL_CLOSE );
|
||||
SHELL_CLOSE_P = 0;
|
||||
|
||||
|
||||
if(( vreg_ctr[ VREG_C_STATUS ] ^ state_old ) != 0 ){
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_STAT_CHANGE;
|
||||
switch( system_status.pwr_state ){
|
||||
case ON_TRIG:
|
||||
case ON:
|
||||
IRQ0_ast;
|
||||
break;
|
||||
|
||||
case SLEEP_TRIG:
|
||||
case SLEEP:
|
||||
if( (( state_old & REG_BIT_SHELL_CLOSE ) != 0 )
|
||||
&& ( !SHELL_CLOSE ) ){
|
||||
// 蓋が開いた
|
||||
IRQ0_ast;
|
||||
}else{
|
||||
return( 250 );
|
||||
}
|
||||
break;
|
||||
case OFF_TRIG:
|
||||
case OFF:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
state_old = vreg_ctr[ VREG_C_STATUS ];
|
||||
return( 100 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*****************************************************************************/
|
||||
task_status tsk_debug(){
|
||||
task_interval tsk_debug(){
|
||||
u8 temp;
|
||||
static u8 count = 0;
|
||||
|
||||
LED_WIFI_2 ^= 1;
|
||||
if( count == 0 ){
|
||||
// LED_WIFI_2 ^= 1;
|
||||
}
|
||||
|
||||
// renge_task_immed_add( ntr_pmic_comm );
|
||||
iic_mcu_read( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 1, &temp );
|
||||
temp = iic_mcu_read_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO );
|
||||
|
||||
count += 1;
|
||||
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, count );
|
||||
|
||||
return 4;
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, count );
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
task_status tsk_debug2(){
|
||||
task_interval tsk_debug2(){
|
||||
volatile static u8 i;
|
||||
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_BT_TEMP ] );
|
||||
i ++;
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, i );
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, i + 0x08 );
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, i + 0x20 );
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, i + 0x80 );
|
||||
/*
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_0ZH ] );
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_VOL ] );
|
||||
|
||||
return 5;
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_3D_DEPTH ] );
|
||||
*/
|
||||
return 255;
|
||||
}
|
||||
|
||||
|
||||
@ -50,7 +105,7 @@ task_status tsk_debug2(){
|
||||
/*****************************************************************************
|
||||
タスクひな形
|
||||
*****************************************************************************/
|
||||
task_status tsk_hina(){
|
||||
task_interval tsk_hina(){
|
||||
switch( system_status.pwr_state ){
|
||||
case OFF:
|
||||
case ON_TRIG:
|
||||
@ -61,30 +116,47 @@ task_status tsk_hina(){
|
||||
default:
|
||||
}
|
||||
|
||||
return 1; // 毎 tic 呼ばれることになります
|
||||
return( 次の起動までのシステムtick数 ); // 毎 tic 呼ばれることになります
|
||||
}
|
||||
|
||||
|
||||
// ポインタで何かもらうのは危険な気がしてきた
|
||||
/* このように使う
|
||||
renge_task_immed_add( タスク関数へのポインタ );
|
||||
*/
|
||||
task_status_immed tsk_imm_hina( u8* arg ){
|
||||
|
||||
return( ERR_FINISED );
|
||||
// ERR_FINISED タスクを削除
|
||||
// ERR_CONTINUE 次になんか割り込みなり、ユーザー操作なり、システムチックが
|
||||
// 来たときに再度実行
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef _TEG_
|
||||
/**************************************
|
||||
加速度センサ割り込みピンがオリジナルマイコンには無いので
|
||||
ポーリングする
|
||||
*************************************/
|
||||
task_status tsk_soft_int(){
|
||||
task_interval tsk_soft_int(){
|
||||
#ifdef _MCU_KE3_
|
||||
static u8 pin;
|
||||
|
||||
// Hエッジ検出
|
||||
pin = ( pin << 1 ) + ( ACC_VALID? 1: 0 );
|
||||
if( ( pin & 0x03 ) == 0x01 ){
|
||||
// pin = ( pin << 1 ) + ( ACC_VALID? 1: 0 );
|
||||
// if( ( pin & 0x03 ) == 0x01 ){
|
||||
if( ACC_VALID ){
|
||||
renge_task_immed_add( tsk_cbk_accero );
|
||||
}
|
||||
return( 0 );
|
||||
}
|
||||
|
||||
|
||||
#else
|
||||
// 本物のマイコンなら、割り込みでタスクを登録します
|
||||
return( 248 );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -95,24 +167,53 @@ task_status tsk_soft_int(){
|
||||
/*****************************************************************************
|
||||
逐一起動タスク
|
||||
*****************************************************************************/
|
||||
/*****************************************************************************
|
||||
PMICからの割り込みを受けて、NTRPMIC互換レジスタからリード
|
||||
*****************************************************************************/
|
||||
task_status_immed ntr_pmic_comm( u8* arg ){
|
||||
|
||||
/*****************************************************************************
|
||||
COMMANDレジスタへの書き込み
|
||||
*****************************************************************************/
|
||||
task_status_immed do_command0(){
|
||||
|
||||
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_OFF_REQ ){
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
|
||||
}else{
|
||||
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET1_REQ ){
|
||||
RESETs_ast;
|
||||
FCRAM_RST_ast;
|
||||
}
|
||||
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_RESET2_REQ ){
|
||||
RESET2_ast;
|
||||
}
|
||||
if( vreg_ctr[ VREG_C_COMMAND0 ] & REG_BIT_FCRAM_RESET_REQ ){
|
||||
FCRAM_RST_ast;
|
||||
}
|
||||
wait_ms( 5 );
|
||||
RESETs_ngt;
|
||||
FCRAM_RST_ngt;
|
||||
}
|
||||
vreg_ctr[ VREG_C_COMMAND0 ] = 0;
|
||||
return( ERR_FINISED );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
TEG2では無し。後で実装
|
||||
*****************************************************************************/
|
||||
task_status_immed do_command1(){
|
||||
static u8 state = 0;
|
||||
return( ERR_FINISED );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
CPUからのスリープ要求
|
||||
*****************************************************************************/
|
||||
__interrupt void intp0(){ // SLP
|
||||
__interrupt void intp0_slp(){ // SLP
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@ -12,8 +12,8 @@
|
||||
#include "pm.h"
|
||||
#include "rtc.h"
|
||||
|
||||
u8 SW_pow_count, SW_3d_count, SW_wifi_count;
|
||||
bit SW_pow_mask, SW_3d_mask, SW_wifi_mask;
|
||||
u8 SW_pow_count, SW_home_count, SW_3d_count, SW_wifi_count;
|
||||
bit SW_pow_mask, SW_home_mask, SW_3d_mask, SW_wifi_mask;
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
@ -22,7 +22,7 @@ bit SW_pow_mask, SW_3d_mask, SW_wifi_mask;
|
||||
system_status.pwr_state == OFF_TRIG で、このタスクが呼ばれると、
|
||||
省電力モードに入ります
|
||||
*****************************************************************************/
|
||||
task_status tsk_sys(){
|
||||
task_interval tsk_sys(){
|
||||
static u8 timeout = 0;
|
||||
|
||||
switch( system_status.pwr_state ){
|
||||
@ -43,8 +43,11 @@ task_status tsk_sys(){
|
||||
renge_task_interval_run_force = 1;
|
||||
return( 0 );
|
||||
}
|
||||
if(( SW_pow_count > 25 ) ||
|
||||
( SW_wifi_count > 25 )){ // 何か他に電源ON要因はあるか?
|
||||
if(( SW_pow_count > 3 ) ||
|
||||
( SW_wifi_count > 3 )){ // 何か他に電源ON要因はあるか?
|
||||
SW_pow_mask = 1;
|
||||
SW_3d_mask = 1;
|
||||
SW_wifi_mask = 1;
|
||||
|
||||
// 何か他に電源ON要因はあるか?
|
||||
// 蓋開け
|
||||
@ -56,7 +59,7 @@ task_status tsk_sys(){
|
||||
|
||||
PM_init();
|
||||
|
||||
// todo bt_auth
|
||||
// todo bt_auth
|
||||
if( PM_bt_auth() != ERR_SUCCESS ){
|
||||
// どうするの?
|
||||
renge_task_interval_run_force = 1;
|
||||
@ -67,41 +70,20 @@ task_status tsk_sys(){
|
||||
// return( 0 );
|
||||
}
|
||||
|
||||
if( PM_sys_pow_on() != 0 ){ // 電源起動不可エラー
|
||||
if( PM_sys_pow_on() != ERR_SUCCESS ){ // 電源起動不可エラー
|
||||
renge_task_interval_run_force = 1;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
iic_mcu_stop();
|
||||
system_status.pwr_state = OFF;
|
||||
return( 0 );
|
||||
}
|
||||
if( PM_LCD_on() == 0 ){
|
||||
renge_task_interval_run_force = 1;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
iic_mcu_stop();
|
||||
system_status.pwr_state = OFF;
|
||||
return( 0 );
|
||||
}
|
||||
|
||||
// ここまで来ると、電源投入確定 //
|
||||
LED_init();
|
||||
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DIR, 0x00 );
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 0x00 );
|
||||
|
||||
{
|
||||
PU7 = 0b00011101; // 4:SW_WIFI 3:SW_PWSW 2:PM_IRQ 0:PM_EXTDC
|
||||
}
|
||||
// ほか、必要ペリフェラルの初期化
|
||||
IICA_Init(); // とりあえずはここで初期化
|
||||
IICB_Init();
|
||||
RTC_32k_on();
|
||||
|
||||
// アクティブ中に使用するピン変化割り込み
|
||||
// I2CやDMAは個別にセットしてください
|
||||
// KRM = 0b00000000;
|
||||
EGP0 = 0b01110001;
|
||||
EGN0 = 0b00110001;
|
||||
// intp20系は後ほど
|
||||
MK0 = INT_MSK0_RSV;
|
||||
MK1 = INT_MSK1_RSV;
|
||||
MK2L= INT_MSK2L_RSV;
|
||||
|
||||
// ここまで来ると、電源投入確定
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
@ -110,61 +92,118 @@ task_status tsk_sys(){
|
||||
break;
|
||||
|
||||
case ON_TRIG: //-------------------------------------------------------
|
||||
system_status.pwr_state = ON;
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 0x00 );
|
||||
accero_hosu_start();
|
||||
|
||||
LED_init();
|
||||
// パワースイッチでのonの時は、LEDを点灯させる
|
||||
if( SW_pow_count > 3 ){
|
||||
vreg_ctr[ VREG_C_LED_POW_ILUMI ] = LED_POW_ILM_AUTO;
|
||||
}else{
|
||||
vreg_ctr[ VREG_C_LED_POW_ILUMI ] = LED_POW_ILM_OFF;
|
||||
}
|
||||
|
||||
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DIR, 0x00 );
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 0x00 );
|
||||
|
||||
{
|
||||
PU7 = 0b00011101; // 4:SW_WIFI 3:SW_PWSW 2:PM_IRQ 0:PM_EXTDC
|
||||
}
|
||||
// ほか、必要ペリフェラルの初期化
|
||||
IIC_ctr_Init(); // とりあえずはここで初期化
|
||||
IIC_twl_Init();
|
||||
RTC_32k_on();
|
||||
|
||||
// アクティブ中に使用するピン変化割り込み
|
||||
// I2CやDMAは個別にセットしてください
|
||||
// KRM = 0b00000000;
|
||||
EGP0 = 0b00110001;
|
||||
EGN0 = 0b01110001;
|
||||
// intp20系は後ほど
|
||||
MK0 = INT_MSK0_RSV;
|
||||
MK1 = INT_MSK1_RSV;
|
||||
MK2L= INT_MSK2L_RSV;
|
||||
|
||||
system_status.pwr_state = ON;
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, 0x00 );
|
||||
#ifdef _PMIC_TWL_
|
||||
{
|
||||
u8 temp;
|
||||
do{
|
||||
temp = iic_mcu_write_a_byte( IIC_SLA_DCP, 0x08, 0x80 ); // ACR←0x80 揮発モードへ
|
||||
NOP();
|
||||
}while( temp != ERR_SUCCESS );
|
||||
}
|
||||
#endif
|
||||
accero_hosu_start();
|
||||
|
||||
break;
|
||||
|
||||
case ON: //-------------------------------------------------------
|
||||
break;
|
||||
|
||||
|
||||
case SLEEP_TRIG: //-------------------------------------------------------
|
||||
system_status.pwr_state = SLEEP;
|
||||
break;
|
||||
|
||||
|
||||
case SLEEP: //-------------------------------------------------------
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
break;
|
||||
|
||||
case OFF_TRIG: //-------------------------------------------------------
|
||||
LED_stop();
|
||||
IICA_Stop();
|
||||
iic_mcu_stop();
|
||||
IIC_ctr_Stop();
|
||||
IIC_twl_Stop();
|
||||
vreg_ctr[ VREG_C_IRQ0 ] = 0;
|
||||
vreg_ctr[ VREG_C_IRQ1 ] = 0;
|
||||
vreg_ctr[ VREG_C_IRQ1 ] = 0;
|
||||
BT_TEMP_P = 0;
|
||||
|
||||
// 電源オン条件の割り込みセット
|
||||
// PWSW KR3 押すとL
|
||||
// BG24 KR4
|
||||
// ふた開け INTP5 閉じるとL
|
||||
// ACアダプタ INTP4 アダプタありでL
|
||||
// RTC
|
||||
|
||||
// pullup_off();
|
||||
{
|
||||
// PU5 = 0b00000011; // PM_CHG,PM_CHGERR
|
||||
// PU7 = 0b00011001; // SW_WiFi,PWSWI,PM_EXTTDC
|
||||
PU5 = 0b00000000;
|
||||
PU7 = 0b00001001; // PWSWI,PM_EXTDC
|
||||
}
|
||||
|
||||
// KRM = ( KR_SW_POW | KR_SW_WIFI ); // Mask ではなく、Modeなのだそうだ。紛らわしい
|
||||
KRM = ( KR_SW_POW ); // Mask ではなく、Modeなのだそうだ。紛らわしい
|
||||
// EGP0 = 0b00100000; // SHELL, 0で検出しない
|
||||
EGP0 = 0b00000000; // SHELL, 0で検出しない
|
||||
EGN0 = 0b00010000; // EXTDC
|
||||
|
||||
// intp20系は後ほど
|
||||
MK0 = 0b1111111110111111; // INT(EXTDC)
|
||||
// MK0 = 0b1111111100111111; // INT(SHELL), INT(EXTDC)
|
||||
MK1 = 0b1111011111111111; // KR(SW_PW,SW_WiFi,...)
|
||||
// MK1 = 0b1111010111111111; // KR, RTC(Alarm)
|
||||
MK2L= 0b11111111;
|
||||
|
||||
PM_sys_pow_off();
|
||||
iic_mcu_stop();
|
||||
|
||||
IF0 = 0;
|
||||
IF1 = 0;
|
||||
IF2 = 0;
|
||||
|
||||
/*
|
||||
電源オン条件の割り込みセット
|
||||
// PWSW KR3 押すとL
|
||||
// BG24 KR4
|
||||
// ふた開け INTP5 閉じるとL
|
||||
// ACアダプタ INTP4 アダプタありでL
|
||||
// RTC
|
||||
*/
|
||||
KRM = ( KR_SW_POW | KR_SW_WIFI ); // Mask ではなく、Modeなのだそうだ。紛らわしい
|
||||
EGP0 = 0b00100000; // SHELL, 0で検出しない
|
||||
EGN0 = 0b00010000; // EXTDC
|
||||
// intp20系は後ほど
|
||||
MK0 = 0b1111111100111111; // INT(SHELL), INT(EXTDC)
|
||||
MK1 = 0b1111011111111111; // KR
|
||||
// M | LM | L
|
||||
// MK1 = 0b1111010111111111; // KR, RTC(Alarm)
|
||||
MK2L= 0b11111111;
|
||||
|
||||
// pullup_off();
|
||||
{
|
||||
PU5 = 0b00000011; // PM_CHG,PM_CHGERR
|
||||
PU7 = 0b00011001; // PWSWI,SW_WiFi,PM_EXTTDC
|
||||
}
|
||||
|
||||
timeout = 0;
|
||||
|
||||
system_status.pwr_state = OFF;
|
||||
STOP();
|
||||
DI();
|
||||
STOP(); // 割り込み待ちで寝る
|
||||
EI();
|
||||
#ifdef _PMIC_TWL_
|
||||
MK2L = 0b01111111; // wifi_TX 割り込み
|
||||
EGP0 |= 0x80;
|
||||
#else
|
||||
// todo
|
||||
#endif
|
||||
renge_task_interval_run_force = 1;
|
||||
break;
|
||||
|
||||
@ -202,43 +241,75 @@ task_status tsk_sys(){
|
||||
} \
|
||||
}
|
||||
|
||||
task_status tsk_sw(){
|
||||
task_interval tsk_sw(){
|
||||
static u8 cnt_force_off = 0;
|
||||
|
||||
count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask );
|
||||
count_sw_n( SW_WIFI_n, SW_wifi_count, SW_3d_mask );
|
||||
count_sw_n( SW_2D3D_n, SW_3d_count, SW_wifi_mask );
|
||||
if(( system_status.pwr_state == ON )
|
||||
|| ( system_status.pwr_state == OFF )){
|
||||
count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask );
|
||||
count_sw_n( SW_WIFI_n, SW_wifi_count, SW_3d_mask );
|
||||
count_sw_n( SW_2D3D_n, SW_3d_count, SW_wifi_mask );
|
||||
// count_sw_n( SW_HOME_n, SW_home_count, SW_home_mask );
|
||||
}
|
||||
|
||||
switch( system_status.pwr_state ){
|
||||
case( OFF_TRIG ):
|
||||
SW_pow_count = 0;
|
||||
SW_wifi_count = 0;
|
||||
SW_3d_count = 0;
|
||||
cnt_force_off = 0;
|
||||
break;
|
||||
|
||||
case( ON ):
|
||||
if( SW_pow_count > 4 ){
|
||||
// todo 割り込み
|
||||
case( SLEEP ):
|
||||
// 電源スイッチの監視 //
|
||||
if( SW_pow_count == 6 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_POW_CLICK;
|
||||
}else if( SW_pow_count == 66 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_POW_HOLD;
|
||||
}
|
||||
if( SW_wifi_count > 4 ){
|
||||
// todo 割り込み
|
||||
// 電源OFF割り込みを入れたが…
|
||||
if(( vreg_ctr[ VREG_C_IRQ0 ] & REG_BIT_SW_POW_HOLD ) != 0 ){
|
||||
cnt_force_off += 1;
|
||||
if( cnt_force_off >= 13 ){ // …返事がない。強制的に切る。
|
||||
vreg_ctr[ VREG_C_LED_POW_ILUMI ] = LED_POW_ILM_OFF;
|
||||
if(( LED_duty_pow_H == 0 ) && ( LED_duty_pow_L == 0 )){
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
}
|
||||
}else{
|
||||
cnt_force_off = 0;
|
||||
}
|
||||
if( SW_3d_count > 4 ){
|
||||
// todo 割り込み
|
||||
|
||||
/* todo
|
||||
// HOME スイッチ…だと? //
|
||||
if( SW_home_count == 6 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_CLICK;
|
||||
IRQ0_ast;
|
||||
}else if( SW_pow_count == 66 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_HOME_HOLD;
|
||||
IRQ0_ast;
|
||||
}
|
||||
*/
|
||||
|
||||
// wifi sw
|
||||
if( SW_wifi_count == 10 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_WIFI_CLICK;
|
||||
}
|
||||
|
||||
// 3d sw
|
||||
if( SW_3d_count == 10 ){
|
||||
vreg_ctr[ VREG_C_IRQ0 ] |= REG_BIT_SW_3D_CLICK;
|
||||
}
|
||||
break;
|
||||
|
||||
case( SLEEP ):
|
||||
if( SW_pow_count > 4 ){
|
||||
// todo 割り込み
|
||||
}
|
||||
if( SW_wifi_count > 4 ){
|
||||
// todo 割り込み
|
||||
}
|
||||
}
|
||||
if(( vreg_ctr[ VREG_C_IRQ0 ]
|
||||
& ( REG_BIT_SW_POW_CLICK | REG_BIT_SW_POW_HOLD
|
||||
| REG_BIT_SW_HOME_CLICK | REG_BIT_SW_HOME_HOLD
|
||||
| REG_BIT_SW_WIFI_CLICK | REG_BIT_SW_3D_CLICK ) ) != 0 ){
|
||||
IRQ0_ast;
|
||||
}
|
||||
|
||||
return( 8 );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
164
trunk/user_define.h
Normal file
164
trunk/user_define.h
Normal file
@ -0,0 +1,164 @@
|
||||
#ifndef _USER_DEF_
|
||||
#define _USER_DEF_
|
||||
|
||||
#include "config.h"
|
||||
|
||||
|
||||
#define IIC_SLV_ADDR_MONITOR 0x6E
|
||||
#define IIC_T_SLAVEADDRESS 0x4A
|
||||
#define IIC_C_SLAVEADDRESS 0x4A
|
||||
|
||||
#define IIC_SLA_DCP 0x50
|
||||
|
||||
#define _debug_
|
||||
#ifdef _debug_
|
||||
|
||||
#define IIC_SLA_8LEDS 0x42
|
||||
#define IIC_8LEDS_REG_DO 1
|
||||
#define IIC_8LEDS_REG_DI 2
|
||||
#define IIC_8LEDS_REG_DIR 3
|
||||
|
||||
#define IIC_SLA_DBG_MONITOR 0x44
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
extern unsigned char temp_teg;
|
||||
#define P20 temp_teg
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _PMIC_TWL_
|
||||
#define PM_TEG_PWSW P7.5 // TEGのみ
|
||||
#define PM_TEG_LCD_OFF P7.6 // TEGのみ
|
||||
#else
|
||||
#define PM_TEG_PWSW ;
|
||||
#define PM_TEG_LCD_OFF ;
|
||||
#endif
|
||||
|
||||
|
||||
#define IIC_SLA_CODEC 0xA4
|
||||
#define IIC_SLA_ACCEL 0x30 // ST LIS331DLH
|
||||
|
||||
|
||||
// PMxは0で出力モード
|
||||
|
||||
// SoC
|
||||
#define IRQ0_ast { P3.0 = 0; PM3.0 = 0; }
|
||||
//#define IRQ0_ngt { PM3.0 = 1; }
|
||||
// ↓誤代入防止
|
||||
#define RESET1_n ( P0.0 & 0x01 )
|
||||
#define RESET1_ast { P0.0 = 0; PM0.0 = 0; }
|
||||
#define RESET1_ngt { PM0.0 = 1; }
|
||||
#define RESETs_ast { P0 &= ~0x03; PM0 &= ~0x03; }
|
||||
#define RESETs_ngt { PM0.0 = 1; P0.1 = 1; }
|
||||
#define RESET2_ast { P0.1 = 0; }
|
||||
#define RESET2_ngt { P0.1 = 1; }
|
||||
|
||||
#define SLP_REQ P12.0
|
||||
// FCRAM
|
||||
#define FCRAM_RST P14.0
|
||||
#define FCRAM_RST_ast { P14.0 = 0; }
|
||||
#define FCRAM_RST_ngt { P14.0 = 1; }
|
||||
|
||||
|
||||
|
||||
// CODEC
|
||||
#define PM_IRQ P7.2 // INTP6
|
||||
#define SND_DEPOP P7.7
|
||||
|
||||
// PM
|
||||
#define PM_EXTDC P7.0 // INTP7
|
||||
//#define BT_TEMP P15.0 // ANI8
|
||||
//#define BT_DET P15.1 // ANI9
|
||||
#define BT_DET_P P1.6
|
||||
#define BT_TEMP_P P1.7
|
||||
#define BT_CHG_EN P4.2
|
||||
#define BT_CHG_ERR_n P5.0
|
||||
#define BT_CHG_n P5.1
|
||||
#define PM_BT_AUTH P12.1
|
||||
|
||||
#define SW_2D3D_n P2.0
|
||||
#define SW_WIFI_n P7.4 // KR4
|
||||
#define SW_POW_n P7.3 // KR3
|
||||
#define SW_HOME_n P20.4 // INTP22
|
||||
#define SW_SEL_n P2.3
|
||||
//#define VOL P2.7 // ANI7
|
||||
|
||||
// WiFi
|
||||
#ifndef _TEG_
|
||||
#define WL_TX P20.3 // INTP21
|
||||
#define WL_RX P20.2 // INTP20
|
||||
#else
|
||||
#define WL_TX P20.3 // INTP21
|
||||
#define WL_RX P20.2 // INTP20
|
||||
#endif
|
||||
|
||||
//#define LED_CAM P1.0 // TO02
|
||||
//#define LED_WIFI P1.1 // TO03
|
||||
//#define LED_3D P5.2 // TO04(SLTO)
|
||||
//#define LED_CHARGE P1.3 // TO05
|
||||
//#define LED_POW2 P1.4 // TO06 ( 青 )
|
||||
//#define LED_POW1 P1.5 // TO07 ( 赤 )
|
||||
#define LED_WIFI_2 P2.4
|
||||
|
||||
#define I2C_PU P5.3
|
||||
//#define I2C_M_SDA P3.1 // SDA10
|
||||
//#define I2C_M_SCL P3.2 // SCL10
|
||||
|
||||
//#define I2C_0_SCL P6.0 // IIC_TWL SCL0
|
||||
//#define I2C_0_SDA P6.1 // SDA0
|
||||
|
||||
//#define I2C_1_SCL P20.0 // IIC CTR SCL1
|
||||
//#define I2C_1_SDA P20.1 // SDA1
|
||||
|
||||
//#define 32kHz_O P1.2 // RTCCL
|
||||
//#define 32k_I1 P12.3 // XT1
|
||||
//#define 32k_I2 P12.4 // XT2
|
||||
|
||||
#define DIPSW_0 P4.0 // mini cube ソフトウェアディップスイッチ
|
||||
#define DIPSW_1 P4.1 // mini cube ソフトウェアディップスイッチ
|
||||
|
||||
#define SHELL_CLOSE P7.1 // INTP5 ふた開閉 (閉じると?)
|
||||
#define SHELL_CLOSE_P P3.3
|
||||
|
||||
//#define DBG_VR P2.6 // ANI6
|
||||
|
||||
#define DBG P14.1
|
||||
|
||||
#define EXT_OPT_DET P12.2
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
#define ACC_VALID P15.2
|
||||
#else
|
||||
#define ACC_VALID P20.5 // ACC_INT0
|
||||
#endif
|
||||
#define ACCEL_INT1 P2.5
|
||||
|
||||
/*
|
||||
#define DBG_M_n P2.1
|
||||
#define DBG_P_n P2.2
|
||||
*/
|
||||
|
||||
#define KR_SW_POW ( 1 << 3 )
|
||||
#define KR_SW_WIFI ( 1 << 4 )
|
||||
|
||||
|
||||
#define INT_MSK0_IIC_M_DMA ( 0b0001000000000000 )
|
||||
#define INT_MSK0_SHELL ( 0b0000000010000000 )
|
||||
#define INT_MSK0_EXTDC ( 0b0000000001000000 )
|
||||
#define INT_MSK0_SLP ( 0b0000000000000100 )
|
||||
#define INT_MSK0_RSV ( 0b1110111100111011 )
|
||||
|
||||
#define INT_MSK1_KR ( 0b0000100000000000 )
|
||||
#define INT_MSK1_RTCINTVAL ( 0b0000010000000000 )
|
||||
#define INT_MSK1_RTCALARM ( 0b0000001000000000 )
|
||||
#define INT_MSK1_ADC ( 0b0000000100000000 )
|
||||
#define INT_MSK1_IIC_CTR ( 0b0000000000001000 )
|
||||
#define INT_MSK1_IIC_YAV ( 0b0000000000000001 )
|
||||
#define INT_MSK1_RSV ( 0b1111000011110110 )
|
||||
|
||||
#define INT_MSK2L_RSV ( 0b11111111 )
|
||||
|
||||
|
||||
#endif
|
||||
239
trunk/vreg_ctr.c
239
trunk/vreg_ctr.c
@ -7,21 +7,24 @@ CTR MCU I2C
|
||||
#include "incs_loader.h"
|
||||
#include "vreg_ctr.h"
|
||||
#include "rtc.h"
|
||||
#include "led.h"
|
||||
|
||||
|
||||
|
||||
u8 vreg_ctr[ VREG_C_ENDMARK_ ];
|
||||
bit rtc_lock;
|
||||
|
||||
|
||||
#define IRQ_0_ngt { PM3.0 = 1; }
|
||||
|
||||
#define IRQ0_ngt { PM3.0 = 1; }
|
||||
|
||||
|
||||
|
||||
//*******************************************************************************
|
||||
// 非ゼロの固定値の指定が必要なアドレス
|
||||
void vreg_ctr_init(){
|
||||
|
||||
vreg_ctr[ VREG_C_LED_BRIGHT ] = 0xFF;
|
||||
vreg_ctr[ VREG_C_MCU_VER_MAJOR ] = MCU_VER_MAJOR;
|
||||
vreg_ctr[ VREG_C_MCU_VER_MINOR ] = MCU_VER_MINOR;
|
||||
}
|
||||
|
||||
|
||||
@ -34,72 +37,110 @@ void vreg_ctr_init(){
|
||||
void vreg_ctr_write( u8 adrs, u8 data ){
|
||||
|
||||
switch( adrs ){
|
||||
case( VREG_C_COMMAND ):
|
||||
case( VREG_C_COMMAND_TWL ):
|
||||
case( VREG_C_LED_BRIGHT ):
|
||||
case( VREG_C_LED_ILUMI ):
|
||||
case( VREG_C_WIFI ):
|
||||
case( VREG_C_WIFI_LED ):
|
||||
case( VREG_C_CAM_LED ):
|
||||
case( VREG_C_COMMAND0 ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
renge_task_immed_add( do_command0 );
|
||||
break;
|
||||
|
||||
case( VREG_C_RTC_CONF ):
|
||||
case( VREG_C_RTC_TUNE ):
|
||||
case( VREG_C_COMMAND1 ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
renge_task_immed_add( do_command1 );
|
||||
break;
|
||||
|
||||
case( VREG_C_LED_BRIGHT ):
|
||||
set_LED_cam();
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_RTC_YEAR ):
|
||||
case( VREG_C_RTC_MONTH ):
|
||||
case( VREG_C_RTC_DAY ):
|
||||
case( VREG_C_RTC_HOUR ):
|
||||
case( VREG_C_RTC_MIN ):
|
||||
case( VREG_C_RTC_SEC ):
|
||||
case( VREG_C_RTC_WEEK ):
|
||||
set_rtc();
|
||||
case( VREG_C_LED_POW_ILUMI ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_RTC_ALARM0 ):
|
||||
case( VREG_C_RTC_ALARM1 ):
|
||||
case( VREG_C_RTC_ALARM2 ):
|
||||
case( VREG_C_RTC_ALARM3 ):
|
||||
case( VREG_C_WIFI_LED ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
set_led_wifi;
|
||||
break;
|
||||
|
||||
case( VREG_C_CAM_LED ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
set_LED_cam();
|
||||
break;
|
||||
|
||||
case( VREG_C_RTC_CONFIG ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
case( VREG_C_RTC_COMP ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
SUBCUD = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_RTC_SEC ):
|
||||
case( VREG_C_RTC_MIN ):
|
||||
case( VREG_C_RTC_HOUR ):
|
||||
case( VREG_C_RTC_YOBI ):
|
||||
case( VREG_C_RTC_DAY ):
|
||||
case( VREG_C_RTC_MONTH ):
|
||||
case( VREG_C_RTC_YEAR ):
|
||||
// ここでは書かない。セットするだけでstopで書く
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data );
|
||||
break;
|
||||
|
||||
case( VREG_C_ACC_CONFIG_HOSU ):
|
||||
case( VREG_C_ACC_CONFIG ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_ACC_R_ADRS ):
|
||||
case( VREG_C_ACC_R_SIZE ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
renge_task_immed_add( acc_read );
|
||||
|
||||
|
||||
case( VREG_C_ACC_W_ADRS ):
|
||||
case( VREG_C_ACC_W_SIZE ):
|
||||
|
||||
case( VREG_C_ACC_BUF0 ):
|
||||
case( VREG_C_ACC_BUF1 ):
|
||||
case( VREG_C_ACC_BUF2 ):
|
||||
case( VREG_C_ACC_BUF3 ):
|
||||
case( VREG_C_ACC_BUF4 ):
|
||||
case( VREG_C_ACC_BUF5 ):
|
||||
case( VREG_C_ACC_BUF6 ):
|
||||
case( VREG_C_ACC_BUF7 ):
|
||||
|
||||
case( VREG_C_ACC_W_BUF ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
renge_task_immed_add( acc_write );
|
||||
break;
|
||||
|
||||
case( VREG_C_ACC_HOSU_L ):
|
||||
case( VREG_C_ACC_HOSU_M ):
|
||||
case( VREG_C_ACC_HOSU_H ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_DIAG ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
// 書くだけでよい
|
||||
|
||||
case( VREG_C_RTC_ALARM_MIN ):
|
||||
case( VREG_C_RTC_ALARM_HOUR ):
|
||||
case( VREG_C_RTC_ALARM_DAY ):
|
||||
case( VREG_C_RTC_ALARM_MONTH ):
|
||||
case( VREG_C_RTC_ALARM_YEAR ):
|
||||
|
||||
case( VREG_C_FREE0 ):
|
||||
case( VREG_C_FREE1 ):
|
||||
case( VREG_C_FREE2 ):
|
||||
case( VREG_C_FREE3 ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_DBG0 ):
|
||||
case( VREG_C_DBG1 ):
|
||||
case( VREG_C_DBG2 ):
|
||||
case( VREG_C_DBG3 ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
break;
|
||||
}
|
||||
|
||||
if(( adrs == VREG_C_DBG3 )
|
||||
&& ( vreg_ctr[ VREG_C_DBG1 ] == 'j' )
|
||||
&& ( vreg_ctr[ VREG_C_DBG2 ] == 'h' )
|
||||
&& ( vreg_ctr[ VREG_C_DBG3 ] == 'l' )){
|
||||
firm_update();
|
||||
}
|
||||
|
||||
case( VREG_C_DBG3 ):
|
||||
vreg_ctr[ adrs ] = data;
|
||||
if(( vreg_ctr[ VREG_C_DBG1 ] == 'j' )
|
||||
&& ( vreg_ctr[ VREG_C_DBG2 ] == 'h' )
|
||||
&& ( data == 'l' )){
|
||||
firm_update(); // 戻ってこない
|
||||
}
|
||||
break;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
@ -111,105 +152,41 @@ void vreg_ctr_write( u8 adrs, u8 data ){
|
||||
// 戻り xx データ
|
||||
// 存在しないアドレスにアクセスした場合、戻り値は0x5A
|
||||
u8 vreg_ctr_read( u8 adrs ){
|
||||
u8 dat;
|
||||
|
||||
if(( VREG_C_RTC_SEC <= adrs )
|
||||
&& ( adrs <= VREG_C_RTC_YEAR )){
|
||||
get_rtc();
|
||||
}
|
||||
|
||||
dat = vreg_ctr[ adrs ];
|
||||
|
||||
// リードがトリガで何かをする↓
|
||||
switch( adrs ){
|
||||
case( VREG_C_IRQ0 ):
|
||||
vreg_ctr[ VREG_C_IRQ0 ] = 0;
|
||||
if( vreg_ctr[ VREG_C_IRQ1 ] == 0 ){
|
||||
IRQ_0_ngt;
|
||||
}
|
||||
break;
|
||||
|
||||
case( VREG_C_IRQ1 ):
|
||||
vreg_ctr[ VREG_C_IRQ1 ] = 0;
|
||||
if( vreg_ctr[ VREG_C_IRQ0 ] == 0 ){
|
||||
IRQ_0_ngt;
|
||||
}
|
||||
break;
|
||||
|
||||
case( VREG_C_MCU_STATUS ):
|
||||
vreg_ctr[ VREG_C_MCU_STATUS ] &= ~0x01;
|
||||
break;
|
||||
}
|
||||
|
||||
return( dat );
|
||||
return( vreg_ctr[ adrs ] );
|
||||
}
|
||||
|
||||
|
||||
|
||||
//*******************************************************************************
|
||||
// 外部から見える虫食いアドレスを、内部の連続アドレスに読み替える
|
||||
// 0xFFは存在しないアドレス。
|
||||
u8 adrs_table_ctr_ext2int( u8 img ){
|
||||
u8 adrsH, adrsL;
|
||||
// I2C仮想レジスタから読まれて何かするレジスタ
|
||||
//*******************************************************************************
|
||||
void vreg_ctr_after_read( u8 adrs ){
|
||||
|
||||
|
||||
#if 0
|
||||
adrsH = ( img & 0xF0 );
|
||||
adrsL = ( img & 0x0F );
|
||||
if( adrsH > 0x80 ){
|
||||
return( 0xFF );
|
||||
}
|
||||
if( adrsH == 0x50 ){
|
||||
return( 0xFF );
|
||||
// リードがトリガで何かをする↓
|
||||
switch( adrs ){
|
||||
// 読んだらクリア
|
||||
case( VREG_C_IRQ0 ): vreg_ctr[ VREG_C_IRQ0 ] = 0; break;
|
||||
case( VREG_C_IRQ1 ): vreg_ctr[ VREG_C_IRQ1 ] = 0; break;
|
||||
case( VREG_C_MCU_STATUS ): vreg_ctr[ VREG_C_MCU_STATUS ] = 0; break;
|
||||
}
|
||||
|
||||
if( adrsH <= 0x30 ){ // 0x00 - 0x3F
|
||||
if( adrsH <= 0x10 ){ // 0x00 - 0x1F
|
||||
if( adrsH == 0x10 ){ // 0x1*
|
||||
if( adrsL <= ( VREG_C_MODE & 0x0F ) ){
|
||||
return( VREG_C_IRQ + adrsL );
|
||||
}
|
||||
}else{ // 0x0*
|
||||
if( adrsL <= ( VREG_C_BATT_INFO & 0x0F ) ){
|
||||
return( VREG_C_VER_INFO + adrsL );
|
||||
}
|
||||
}
|
||||
}else{ // 0x20 - 0x3F
|
||||
if( adrsH == 0x20 ){ // 0x2?
|
||||
if( adrsL <= ( VREG_C_POWER_SAVE & 0x0F ) ){
|
||||
return( VREG_C_POWER_INFO + adrsL );
|
||||
}
|
||||
}else{ // 0x3*
|
||||
if( adrsL <= ( VREG_C_CAM & 0x0F ) ){
|
||||
return( VREG_C_WIFI + adrsL );
|
||||
}
|
||||
}
|
||||
}
|
||||
}else{
|
||||
if( adrsH <= 0x60 ){
|
||||
if( adrsH == 0x60 ){
|
||||
if( adrsL <= ( VREG_C_POWER_LED & 0x0F ) ){
|
||||
return( VREG_C_ADC_CALIB + adrsL );
|
||||
}
|
||||
}else{ // 40台
|
||||
if( adrsL <= ( VREG_C_BL & 0x0F ) ){
|
||||
return( VREG_C_VOL + adrsL );
|
||||
}
|
||||
}
|
||||
}else{
|
||||
if( adrsH == 0x70 ){
|
||||
if( adrsL <= ( VREG_C_TEMP7 & 0x0F ) ){
|
||||
return( VREG_C_TEMP0 + adrsL );
|
||||
}
|
||||
}else{ // 80台
|
||||
if( adrsL <= ( VREG_C_TIME_PWSW_THRESHOLD & 0x0F ) ){
|
||||
return( VREG_C_TIME_PWSW_DELAY + adrsL );
|
||||
}
|
||||
}
|
||||
if(( adrs == VREG_C_IRQ0 ) || ( adrs == VREG_C_IRQ1 )){
|
||||
if(( vreg_ctr[ VREG_C_IRQ0 ] == 0 ) && ( vreg_ctr[ VREG_C_IRQ1 ] == 0 )){
|
||||
IRQ0_ngt;
|
||||
}
|
||||
}
|
||||
return( 0xFF );
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------*/
|
||||
// I2Cでロックされた物の解除
|
||||
void vreg_c_iic_release(){
|
||||
// クリティカルセクションとして扱わないといけないかもしれない
|
||||
rtc_close_iic();
|
||||
}
|
||||
|
||||
|
||||
|
||||
171
trunk/vreg_ctr.h
Normal file
171
trunk/vreg_ctr.h
Normal file
@ -0,0 +1,171 @@
|
||||
#ifndef __vreg_ctr__
|
||||
#define __vreg_ctr__
|
||||
|
||||
|
||||
#define REG_BITS_RTC_BLACKOUT 0b00000001
|
||||
#define REG_BIT_MCU_FIRMBROKEN 0b10000000
|
||||
|
||||
#define REG_BIT_IRQ0_MCUSTATUS 0b01000000
|
||||
|
||||
|
||||
// VREG_C_IRQ0
|
||||
#define REG_BIT_VR_SNDVOL_CHANGE ( 1 << 7 )
|
||||
#define REG_BIT_VR_3D_CHANGE ( 1 << 6 )
|
||||
#define REG_BIT_SW_3D_CLICK ( 1 << 5 )
|
||||
#define REG_BIT_SW_WIFI_CLICK ( 1 << 4 )
|
||||
#define REG_BIT_SW_POW_HOLD ( 1 << 3 )
|
||||
#define REG_BIT_SW_POW_CLICK ( 1 << 2 )
|
||||
#define REG_BIT_SW_HOME_HOLD ( 1 << 1 )
|
||||
#define REG_BIT_SW_HOME_CLICK ( 1 << 0 )
|
||||
|
||||
// VREG_C_IRQ1
|
||||
#define REG_BIT_TWL_OFF_REQ ( 1 << 7 )
|
||||
#define REG_BIT_TWL_RESET_REQ ( 1 << 6 )
|
||||
#define REG_BIT_WDT_DET ( 1 << 5 )
|
||||
#define REG_BIT_ACC_DAT_RDY ( 1 << 4 )
|
||||
#define REG_BIT_ACC_ACK ( 1 << 3 )
|
||||
#define REG_BIT_RTC_ALARM ( 1 << 2 )
|
||||
#define REG_BIT_BT_REMAIN ( 1 << 1 )
|
||||
#define REG_BIT_STAT_CHANGE ( 1 << 0 )
|
||||
|
||||
// VREG_C_STATUS,
|
||||
#define REG_BIT_BATT_CHARGE_ERR ( 1 << 5 )
|
||||
#define REG_BIT_BATT_CHARGE ( 1 << 4 )
|
||||
#define REG_BIT_POW_SUPPLY ( 1 << 3 )
|
||||
#define REG_BIT_EXT_OPT_LOCK ( 1 << 2 )
|
||||
#define REG_BIT_SHELL_CLOSE ( 1 << 1 )
|
||||
#define REG_BIT_BL ( 1 << 0 )
|
||||
|
||||
|
||||
// VREG_C_COMMAND0
|
||||
#define REG_BIT_FCRAM_RESET_REQ ( 1 << 3 )
|
||||
#define REG_BIT_RESET2_REQ ( 1 << 2 )
|
||||
#define REG_BIT_RESET1_REQ ( 1 << 1 )
|
||||
#define REG_BIT_OFF_REQ ( 1 << 0 )
|
||||
|
||||
// VREG_C_COMMAND1
|
||||
#define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 )
|
||||
#define REG_BIT_SEND_TWL_BATT_LOW ( 1 << 3 )
|
||||
#define REG_BIT_SEND_TWL_OFF_REQ ( 1 << 2 )
|
||||
#define REG_BIT_SEND_TWL_RESET_REQ ( 1 << 1 )
|
||||
#define REG_BIT_SEND_TWL_PWSW_DET ( 1 << 0 )
|
||||
|
||||
|
||||
// VREG_C_WIFI_LED
|
||||
#define REG_BIT_WIFI_BLINK_ENA ( 1 << 1 )
|
||||
#define REG_BIT_WIFI_ON ( 1 << 0 )
|
||||
|
||||
|
||||
/*
|
||||
テンプレ
|
||||
#define REG_BIT_ ( 1 << 7 )
|
||||
#define REG_BIT_ ( 1 << 6 )
|
||||
#define REG_BIT_ ( 1 << 5 )
|
||||
#define REG_BIT_ ( 1 << 4 )
|
||||
#define REG_BIT_ ( 1 << 3 )
|
||||
#define REG_BIT_ ( 1 << 2 )
|
||||
#define REG_BIT_ ( 1 << 1 )
|
||||
#define REG_BIT_ ( 1 << 0 )
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
extern u8 vreg_ctr[];
|
||||
|
||||
/*============================================================================*/
|
||||
enum VREG_C{ // 未定義アドレスへ書き込んだ際の動作は不定
|
||||
VREG_C_IRQ0,
|
||||
VREG_C_IRQ1,
|
||||
|
||||
VREG_C_STATUS,
|
||||
|
||||
VREG_C_RESERVE0,
|
||||
VREG_C_RESERVE1,
|
||||
VREG_C_RESERVE2,
|
||||
|
||||
VREG_C_BT_REMAIN,
|
||||
VREG_C_SND_VOL,
|
||||
VREG_C_3D_DEPTH,
|
||||
|
||||
VREG_C_COMMAND0,
|
||||
VREG_C_COMMAND1,
|
||||
|
||||
VREG_C_LED_BRIGHT,
|
||||
VREG_C_LED_POW_ILUMI,
|
||||
|
||||
VREG_C_WIFI_LED,
|
||||
|
||||
VREG_C_CAM_LED,
|
||||
|
||||
VREG_C_MCU_VER_MAJOR,
|
||||
VREG_C_MCU_VER_MINOR,
|
||||
VREG_C_MCU_STATUS,
|
||||
|
||||
//VREG_C_PM_INFO,
|
||||
//VREG_C_BT_INFO,
|
||||
VREG_C_VCOM_T,
|
||||
VREG_C_VCOM_B,
|
||||
VREG_C_VCS_T,
|
||||
VREG_C_VCS_B,
|
||||
|
||||
VREG_C_BT_TEMP,
|
||||
VREG_C_BL,
|
||||
|
||||
VREG_C_RTC_SEC,
|
||||
VREG_C_RTC_MIN,
|
||||
VREG_C_RTC_HOUR,
|
||||
VREG_C_RTC_YOBI,
|
||||
VREG_C_RTC_DAY,
|
||||
VREG_C_RTC_MONTH,
|
||||
VREG_C_RTC_YEAR,
|
||||
VREG_C_RTC_CONFIG,
|
||||
VREG_C_RTC_ALARM_MIN,
|
||||
VREG_C_RTC_ALARM_HOUR,
|
||||
VREG_C_RTC_ALARM_DAY,
|
||||
VREG_C_RTC_ALARM_MONTH,
|
||||
VREG_C_RTC_ALARM_YEAR,
|
||||
VREG_C_RTC_COMP,
|
||||
|
||||
VREG_C_ACC_CONFIG_HOSU,
|
||||
VREG_C_ACC_CONFIG,
|
||||
VREG_C_ACC_R_ADRS,
|
||||
VREG_C_ACC_R_BUF,
|
||||
VREG_C_ACC_W_ADRS,
|
||||
VREG_C_ACC_W_BUF,
|
||||
|
||||
VREG_C_ACC_HOSU_L,
|
||||
VREG_C_ACC_HOSU_M,
|
||||
VREG_C_ACC_HOSU_H,
|
||||
|
||||
VREG_C_ACC_XH,
|
||||
VREG_C_ACC_XL,
|
||||
VREG_C_ACC_YH,
|
||||
VREG_C_ACC_YL,
|
||||
VREG_C_ACC_ZH,
|
||||
VREG_C_ACC_ZL,
|
||||
|
||||
VREG_C_DIAG,
|
||||
VREG_C_FREE0,
|
||||
VREG_C_FREE1,
|
||||
VREG_C_FREE2,
|
||||
VREG_C_FREE3,
|
||||
VREG_C_DBG0,
|
||||
VREG_C_DBG1,
|
||||
VREG_C_DBG2,
|
||||
VREG_C_DBG3,
|
||||
|
||||
VREG_C_ENDMARK_
|
||||
};
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
void vreg_ctr_init();
|
||||
void vreg_ctr_write( u8 adrs, u8 data );
|
||||
u8 vreg_ctr_read( u8 phy_adrs );
|
||||
void vreg_ctr_after_read( u8 adrs );
|
||||
|
||||
void vreg_c_iic_release();
|
||||
|
||||
|
||||
#endif
|
||||
@ -16,42 +16,15 @@ u8 vreg_twl[ REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD +1 ];
|
||||
仮想レジスタの初期化
|
||||
=========================================================================== */
|
||||
void vreg_twl_init(){
|
||||
|
||||
#if 0
|
||||
REG_TWL_INT_ADRS_VER_INFO = 0x00,
|
||||
REG_TWL_INT_ADRS_PMIC_INFO,
|
||||
REG_TWL_INT_ADRS_BATT_INFO,
|
||||
REG_TWL_INT_ADRS_IRQ, // 0x10,
|
||||
REG_TWL_INT_ADRS_COMMAND,
|
||||
REG_TWL_INT_ADRS_MODE,
|
||||
REG_TWL_INT_ADRS_POWER_INFO, // 0x20,
|
||||
REG_TWL_INT_ADRS_POWER_SAVE,
|
||||
REG_TWL_INT_ADRS_WIFI, // 0x30,
|
||||
REG_TWL_INT_ADRS_CAM,
|
||||
REG_TWL_INT_ADRS_VOL, // 0x40,
|
||||
REG_TWL_INT_ADRS_BL,
|
||||
REG_TWL_INT_ADRS_CODEC_MIC_GAIN, // 0x50,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB, // 0x60,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB_STATUS,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB_VALUE,
|
||||
REG_TWL_INT_ADRS_POWER_LED,
|
||||
REG_TWL_INT_ADRS_TEMP0, // 0x70 - 0x77
|
||||
REG_TWL_INT_ADRS_TEMP1,
|
||||
REG_TWL_INT_ADRS_TEMP2,
|
||||
REG_TWL_INT_ADRS_TEMP3,
|
||||
REG_TWL_INT_ADRS_TEMP4,
|
||||
REG_TWL_INT_ADRS_TEMP5,
|
||||
REG_TWL_INT_ADRS_TEMP6,
|
||||
REG_TWL_INT_ADRS_TEMP7,
|
||||
REG_TWL_INT_ADRS_TIME_PWSW_DELAY,
|
||||
REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD
|
||||
|
||||
#endif
|
||||
vreg_twl[ REG_TWL_INT_ADRS_VER_INFO ] = 0x35;
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_SAVE ] = 0x07;
|
||||
// vreg_twl[ REG_TWL_INT_ADRS_BL ] = 0x03;
|
||||
vreg_twl[ REG_TWL_INT_ADRS_CODEC_MIC_GAIN ] = 0x01;
|
||||
vreg_twl[ REG_TWL_INT_ADRS_ADC_CALIB_STATUS ] = 0x01;
|
||||
vreg_twl[ REG_TWL_INT_ADRS_ADC_CALIB_VALUE ] = 0x60;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
//*******************************************************************************
|
||||
// I2C仮想レジスタに書きます。
|
||||
// 引数 adrs は内部アドレス
|
||||
@ -61,6 +34,17 @@ void vreg_twl_write( u8 adrs, u8 data ){
|
||||
if( REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD >= adrs ){ // アドレス範囲外
|
||||
vreg_twl[ adrs ] = data;
|
||||
}
|
||||
|
||||
// TWLレジスタに書かれて何かアクションする
|
||||
switch( adrs ){
|
||||
case( REG_TWL_INT_ADRS_COMMAND ):
|
||||
if(( data & 0x01 ) != 0 ){
|
||||
vreg_ctr[ VREG_C_IRQ1 ] |= REG_BIT_TWL_RESET_REQ;
|
||||
IRQ0_ast;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
101
trunk/vreg_twl.h
Normal file
101
trunk/vreg_twl.h
Normal file
@ -0,0 +1,101 @@
|
||||
#ifndef __vreg_twl__
|
||||
#define __vreg_twl__
|
||||
|
||||
/*
|
||||
* 外から見たときの、マイコンレジスタアドレス。
|
||||
* 拡張性などを考えて、飛び飛び
|
||||
*/
|
||||
/*
|
||||
* 割り込み要因フラグは
|
||||
* MSB:外部電源供給有り/なし変化 (未実装)
|
||||
* 6:Volキー操作(変更に限らず。MAX時に+でも。)
|
||||
* 5:電池電圧 少 検出
|
||||
* 4: 僅
|
||||
* 3:電源スイッチ 押され検出
|
||||
* 2:(未設定)
|
||||
* 1:電源スイッチ OFF 時間押され検出
|
||||
* LSB: リセット
|
||||
*/
|
||||
enum REG_TWL_ADRS{ // 未定義アドレスへ書き込んだ際の動作は不定
|
||||
REG_TWL_ADRS_VER_INFO = 0x00,
|
||||
REG_TWL_ADRS_PMIC_INFO,
|
||||
REG_TWL_ADRS_BATT_INFO,
|
||||
REG_TWL_ADRS_IRQ = 0x10,
|
||||
REG_TWL_ADRS_COMMAND,
|
||||
REG_TWL_ADRS_MODE,
|
||||
REG_TWL_ADRS_POWER_INFO = 0x20,
|
||||
REG_TWL_ADRS_POWER_SAVE,
|
||||
REG_TWL_ADRS_WIFI = 0x30,
|
||||
REG_TWL_ADRS_CAM,
|
||||
REG_TWL_ADRS_VOL = 0x40,
|
||||
REG_TWL_ADRS_BL,
|
||||
REG_TWL_ADRS_CODEC_MIC_GAIN = 0x50,
|
||||
REG_TWL_ADRS_ADC_CALIB = 0x60,
|
||||
REG_TWL_ADRS_ADC_CALIB_STATUS,
|
||||
REG_TWL_ADRS_ADC_CALIB_VALUE,
|
||||
REG_TWL_ADRS_POWER_LED,
|
||||
REG_TWL_ADRS_TEMP0 = 0x70, // ~0x77 まで。
|
||||
REG_TWL_ADRS_TEMP1,
|
||||
REG_TWL_ADRS_TEMP2,
|
||||
REG_TWL_ADRS_TEMP3,
|
||||
REG_TWL_ADRS_TEMP4,
|
||||
REG_TWL_ADRS_TEMP5,
|
||||
REG_TWL_ADRS_TEMP6,
|
||||
REG_TWL_ADRS_TEMP7,
|
||||
REG_TWL_ADRS_TIME_PWSW_DELAY = 0x80,
|
||||
REG_TWL_ADRS_TIME_PWSW_THRESHOLD
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* マイコン内部でのレジスタの実装
|
||||
* もちろん効率を考えて、つめてある
|
||||
*/
|
||||
enum REG_TWL_ADRS_INT{
|
||||
REG_TWL_INT_ADRS_VER_INFO = 0x00,
|
||||
REG_TWL_INT_ADRS_PMIC_INFO,
|
||||
REG_TWL_INT_ADRS_BATT_INFO,
|
||||
REG_TWL_INT_ADRS_IRQ, // 0x10,
|
||||
REG_TWL_INT_ADRS_COMMAND,
|
||||
REG_TWL_INT_ADRS_MODE,
|
||||
REG_TWL_INT_ADRS_POWER_INFO, // 0x20,
|
||||
REG_TWL_INT_ADRS_POWER_SAVE,
|
||||
REG_TWL_INT_ADRS_WIFI, // 0x30,
|
||||
REG_TWL_INT_ADRS_CAM,
|
||||
REG_TWL_INT_ADRS_VOL, // 0x40,
|
||||
REG_TWL_INT_ADRS_BL,
|
||||
REG_TWL_INT_ADRS_CODEC_MIC_GAIN, // 0x50,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB, // 0x60,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB_STATUS,
|
||||
REG_TWL_INT_ADRS_ADC_CALIB_VALUE,
|
||||
REG_TWL_INT_ADRS_POWER_LED,
|
||||
REG_TWL_INT_ADRS_TEMP0, // 0x70 - 0x77
|
||||
REG_TWL_INT_ADRS_TEMP1,
|
||||
REG_TWL_INT_ADRS_TEMP2,
|
||||
REG_TWL_INT_ADRS_TEMP3,
|
||||
REG_TWL_INT_ADRS_TEMP4,
|
||||
REG_TWL_INT_ADRS_TEMP5,
|
||||
REG_TWL_INT_ADRS_TEMP6,
|
||||
REG_TWL_INT_ADRS_TEMP7,
|
||||
REG_TWL_INT_ADRS_TIME_PWSW_DELAY,
|
||||
REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD
|
||||
};
|
||||
|
||||
extern u8 vreg_twl[ REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD +1 ];
|
||||
|
||||
#define is_TWL ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x01 )
|
||||
#define with_NAND ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x02 )
|
||||
#define volSteps32 ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x80 )
|
||||
|
||||
#define reg_wifi_led ( vregs[ REG_TWL_INT_ADRS_WIFI ] & 0x01 )
|
||||
#define reg_wifi_led_blink ( vregs[ REG_TWL_INT_ADRS_WIFI ] & 0x02 )
|
||||
|
||||
|
||||
|
||||
/* ========================================================================= */
|
||||
void vreg_twl_init();
|
||||
void vreg_twl_write( u8 adrs, u8 data );
|
||||
u8 adrs_table_twl_ext2int( u8 img );
|
||||
u8 vreg_twl_read( u8 phy_adrs );
|
||||
|
||||
#endif
|
||||
11
trunk/yav_mcu_bsr.plg
Normal file
11
trunk/yav_mcu_bsr.plg
Normal file
@ -0,0 +1,11 @@
|
||||
C:\WINDOWS\system32\cmd.exe /c touch magic.c
|
||||
"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\bin\cc78k0r.exe" -cF100964 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -irenge -i"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r" -ms -qcjl1wtg -sainter_asm -zp -w0 -no magic.c
|
||||
Compilation complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\ra78k0r.exe" -cF100964 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff inter_asm\magic.asm
|
||||
Assembly complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\lk78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -obsr_k0r.lmf "..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r\s0rml.rel" -go85h,0FC00h,1024 -gi0FFFFFFFFFFFFFFFFFFFFh -pbsr_k0r.map -nkd -kp -gb6EFBFFh -b"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib" -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r" -dbsr_mcu.dr -s -w0 loader.rel pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_twl.rel ini_VECT.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel tasks.rel adc.rel renge.rel tasks_sys.rel accero.rel self_flash.rel
|
||||
Link complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\oc78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -o.\bsr.hex bsr_k0r.lmf
|
||||
Object Conversion Complete, 0 error(s) and 0 warning(s) found.
|
||||
|
||||
Build Total error(s) : 0 Total warning(s) : 0
|
||||
1030
trunk/yav_mcu_bsr.pri
Normal file
1030
trunk/yav_mcu_bsr.pri
Normal file
File diff suppressed because it is too large
Load Diff
1034
trunk/yav_mcu_bsr.prj
Normal file
1034
trunk/yav_mcu_bsr.prj
Normal file
File diff suppressed because it is too large
Load Diff
32
trunk/yav_mcu_bsr.prk
Normal file
32
trunk/yav_mcu_bsr.prk
Normal file
@ -0,0 +1,32 @@
|
||||
[ProjectManager]
|
||||
FrameMax=1
|
||||
FrameX=184
|
||||
FrameY=9
|
||||
FrameCX=1375
|
||||
FrameCY=1183
|
||||
OpenFile1=vreg_ctr.h,0,88,88,1332,845,19,158,0,0
|
||||
OpenFile2=vreg_ctr.c,0,110,110,1354,867,0,158,0,0
|
||||
OpenFile3=incs_loader.h,0,198,198,1442,955,4,25,1,0
|
||||
OpenFile4=WDT.h,0,242,242,1486,999,40,4,40,0
|
||||
OpenFile5=renge\\..\incs.h,0,68,451,1312,1208,0,9,0,0
|
||||
OpenFile6=magic.c,0,307,203,1275,828,0,16,0,0
|
||||
OpenFile7=fsl_user.h,0,330,330,1574,1087,53,63,53,0
|
||||
OpenFile8=renge\renge_task_immediate.h,0,243,127,1487,884,0,1,0,0
|
||||
OpenFile9=renge\renge_defs.h,0,270,17,1514,774,0,13,0,0
|
||||
OpenFile10=vreg_twl.c,0,44,44,1288,801,34,30,34,0
|
||||
OpenFile11=renge\renge.c,0,270,117,1514,874,45,105,45,0
|
||||
OpenFile12=i2c_twl.c,0,110,110,1354,867,0,7,27,0
|
||||
OpenFile13=ProjectWindow
|
||||
PrjPos=0,0,752,0,250
|
||||
OpenFile14=adc.c,0,591,180,1474,977,48,79,0,0
|
||||
OpenFile15=pm.c,0,213,107,1119,634,0,530,2,0
|
||||
OpenFile16=tasks.c,0,154,154,1398,911,22,44,17,0
|
||||
OpenFile17=tasks_sys.c,0,360,104,1068,950,63,126,63,0
|
||||
OpenFile18=led.c,0,22,22,1266,779,5,250,5,0
|
||||
OpenFile19=adc.c,0,220,220,1464,977,15,63,15,0
|
||||
OpenFile20=renge\renge.h,0,352,352,1596,1109,0,7,0,0
|
||||
OpenFile21=OutputWindow
|
||||
OutputPos=0,508,1056,612,1473
|
||||
ActivePRJ=yav_mcu_bsr.prj
|
||||
[ProjectWindow]
|
||||
ProjectWindowDispType=0
|
||||
8
trunk/yav_mcu_bsr.prw
Normal file
8
trunk/yav_mcu_bsr.prw
Normal file
@ -0,0 +1,8 @@
|
||||
[System]
|
||||
System1=default
|
||||
[default]
|
||||
Project1=yav_mcu_bsr.prj
|
||||
[BATCH_BUILD]
|
||||
Build1=yav_mcu_bsr.prj,Debug Build,1
|
||||
Build2=yav_mcu_bsr.prj,Release Build,0
|
||||
Build3=yav_mcu_bsr.prj,BSR_WM0,0
|
||||
170
trunk/yav_mcu_bsr.sdb
Normal file
170
trunk/yav_mcu_bsr.sdb
Normal file
@ -0,0 +1,170 @@
|
||||
[SdbInfo]
|
||||
Ver=5
|
||||
[loader.c]
|
||||
T=4a8a882b
|
||||
1=incs_loader.h
|
||||
2=fsl.h
|
||||
3=fsl_user.h
|
||||
4=i2c_ctr.h
|
||||
5=i2c_mcu.h
|
||||
6=pm.h
|
||||
7=rtc.h
|
||||
8=magic.h
|
||||
[pm.c]
|
||||
T=4a8a8a2a
|
||||
1=incs_loader.h
|
||||
2=adc.h
|
||||
3=led.h
|
||||
4=pm.h
|
||||
[i2c_ctr.c]
|
||||
T=4a890e15
|
||||
1=incs_loader.h
|
||||
[main.c]
|
||||
T=4a8a882b
|
||||
1=incs.h
|
||||
2=WDT.h
|
||||
3=rtc.h
|
||||
4=pm.h
|
||||
5=accero.h
|
||||
[magic.c]
|
||||
T=4a8aa5e4
|
||||
[WDT.c]
|
||||
T=4a30a4d7
|
||||
1=incs_loader.h
|
||||
[i2c_mcu.c]
|
||||
T=4a890e4a
|
||||
1=incs_loader.h
|
||||
2=i2c_mcu.h
|
||||
[i2c_twl.c]
|
||||
T=4a7d2831
|
||||
1=incs.h
|
||||
2=i2c_twl_defs.h
|
||||
[ini_VECT.c]
|
||||
T=4a8a91dd
|
||||
1=config.h
|
||||
[led.c]
|
||||
T=4a8aa519
|
||||
1=incs.h
|
||||
2=led.h
|
||||
[rtc.c]
|
||||
T=4a545e28
|
||||
1=incs.h
|
||||
[vreg_ctr.c]
|
||||
T=4a8aa5e1
|
||||
1=incs_loader.h
|
||||
2=vreg_ctr.h
|
||||
3=rtc.h
|
||||
4=led.h
|
||||
[vreg_twl.c]
|
||||
T=4a8a8348
|
||||
1=incs.h
|
||||
2=jhl_defs.h
|
||||
3=vreg_twl.h
|
||||
[tasks.c]
|
||||
T=4a8a8a42
|
||||
1=incs.h
|
||||
[adc.c]
|
||||
T=4a8a658a
|
||||
1=incs_loader.h
|
||||
2=adc.h
|
||||
3=pm.h
|
||||
4=led.h
|
||||
[renge\renge.c]
|
||||
T=4a7d2b02
|
||||
1=renge\renge_task_intval.h
|
||||
2=renge\renge_task_immediate.h
|
||||
3=WDT.h
|
||||
[tasks_sys.c]
|
||||
T=4a8a8a58
|
||||
1=incs.h
|
||||
2=i2c_twl.h
|
||||
3=i2c_ctr.h
|
||||
4=led.h
|
||||
5=accero.h
|
||||
6=pm.h
|
||||
7=rtc.h
|
||||
[accero.c]
|
||||
T=4a8a744b
|
||||
1=incs.h
|
||||
[self_flash.c]
|
||||
T=4a892bc1
|
||||
1=incs_loader.h
|
||||
2=fsl.h
|
||||
3=fsl_user.h
|
||||
4=i2c_ctr.h
|
||||
[incs_loader.h]
|
||||
T=4a7b6de3
|
||||
1=jhl_defs.h
|
||||
2=user_define.h
|
||||
3=bsr_system.h
|
||||
4=renge\renge.h
|
||||
5=vreg_ctr.h
|
||||
6=loader.h
|
||||
7=i2c_mcu.h
|
||||
8=WDT.h
|
||||
[jhl_defs.h]
|
||||
T=4a7d2831
|
||||
[user_define.h]
|
||||
T=4a890dae
|
||||
1=config.h
|
||||
[config.h]
|
||||
T=4a8a794e
|
||||
[bsr_system.h]
|
||||
T=4a023057
|
||||
1=jhl_defs.h
|
||||
[renge\renge.h]
|
||||
T=4a548ddd
|
||||
1=renge\renge_defs.h
|
||||
2=renge\renge_task_immediate.h
|
||||
[renge\renge_defs.h]
|
||||
T=4a5547e1
|
||||
[renge\renge_task_immediate.h]
|
||||
T=4a8a7575
|
||||
1=renge\renge_defs.h
|
||||
[vreg_ctr.h]
|
||||
T=4a793427
|
||||
[loader.h]
|
||||
T=4a7a31d0
|
||||
1=jhl_defs.h
|
||||
[i2c_mcu.h]
|
||||
T=4a7b93e4
|
||||
[WDT.h]
|
||||
T=499ba30b
|
||||
[fsl.h]
|
||||
T=47ec5c12
|
||||
[fsl_user.h]
|
||||
T=4a7bf458
|
||||
[i2c_ctr.h]
|
||||
T=4a7c0777
|
||||
[pm.h]
|
||||
T=4a8a81a5
|
||||
[rtc.h]
|
||||
T=4a545899
|
||||
[magic.h]
|
||||
T=4a7a2fee
|
||||
[adc.h]
|
||||
T=4a2e6395
|
||||
1=jhl_defs.h
|
||||
[led.h]
|
||||
T=4a8aa5ff
|
||||
[incs.h]
|
||||
T=4a797971
|
||||
1=jhl_defs.h
|
||||
2=user_define.h
|
||||
3=bsr_system.h
|
||||
4=renge\renge.h
|
||||
5=vreg_ctr.h
|
||||
6=vreg_twl.h
|
||||
7=i2c_mcu.h
|
||||
[vreg_twl.h]
|
||||
T=49d2cf40
|
||||
[accero.h]
|
||||
T=4a4b15e2
|
||||
1=jhl_defs.h
|
||||
[i2c_twl_defs.h]
|
||||
T=4a7c074e
|
||||
[renge\renge_task_intval.h]
|
||||
T=4a78118b
|
||||
1=renge\renge_defs.h
|
||||
[i2c_twl.h]
|
||||
T=4a7c0786
|
||||
Loading…
Reference in New Issue
Block a user