ctr_firmware/trunk/bootrom/build/libraries/swi/common/swi_table.c
nakasima c3b7cb9bf7 small fix.
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@56 b871894f-2f95-9b40-918c-086798483c85
2008-12-01 11:00:19 +00:00

164 lines
6.5 KiB
C

/*---------------------------------------------------------------------------*
Project: TwlBrom - SWI
File: swi_table.c
Copyright 2007 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Date:: $
$Rev$
$Author$
*---------------------------------------------------------------------------*/
// TWL
#ifndef BROMDEV_DISABLE_SECURE_SVC
INASM_EXTERN( ACSign_HeapInit )
INASM_EXTERN( ACSign_DecryptoCore )
INASM_EXTERN( ACSign_Decrypto )
INASM_EXTERN( ACSign_DecryptoDER )
INASM_EXTERN( ACSign_DigestUnit )
INASM_EXTERN( ACSign_CompareUnit )
INASM_EXTERN( ACSign_GetKey )
INASM_EXTERN( SHA1_Init )
INASM_EXTERN( SHA1_Update )
INASM_EXTERN( SHA1_Final )
#endif // BROMDEV_DISABLE_SECURE_SVC
INASM_EXTERN( SWI_UnCompLZ77Stream )
INASM_EXTERN( SWIi_Terminate )
// DS compatible
INASM_EXTERN( SWI_WaitByLoop )
INASM_EXTERN( SWI_WaitIntr )
INASM_EXTERN( SWI_WaitVBlankIntr )
INASM_EXTERN( SWI_Halt )
#ifdef SDK_ARM7
INASM_EXTERN( SWI_Sleep )
INASM_EXTERN( SWI_ChangeSoundBias )
#endif // SDK_ARM7
INASM_EXTERN( SWI_DivS32 )
INASM_EXTERN( SWI_SqrtU32 )
INASM_EXTERN( SWI_GetCRC16 )
INASM_EXTERN( SWI_CpuSet )
INASM_EXTERN( SWI_CpuSetFast )
INASM_EXTERN( SWI_UnPackBits32 )
INASM_EXTERN( SWI_UnCompLZ77Byte )
INASM_EXTERN( SWI_UnCompLZ77Short )
INASM_EXTERN( SWI_UnCompHuffman )
INASM_EXTERN( SWI_UnCompRLByte )
INASM_EXTERN( SWI_UnCompRLShort )
INASM_EXTERN( SWI_GetSinTable )
INASM_EXTERN( SWI_GetPitchTable )
INASM_EXTERN( SWI_GetVolumeTable )
#ifdef SDK_ARM9
INASM_EXTERN( SWI_UnDiffByte2Byte )
INASM_EXTERN( SWI_UnDiffShort2Short )
INASM_EXTERN( SWI_SetPauseReg )
#else // SDK_ARM7
INASM_EXTERN( SWI_GetFuncp4IPL2 )
INASM_EXTERN( SWI_SetPauseHi )
#endif // SDK_ARM7
EXPORT SWI_Table
EXPORT SWI_TableEnd
SWI_Table
DCW SWIi_Terminate // 0
DCW SWI_UnCompLZ77Stream // 1
DCW SWI_UnCompLZ77Short+1 // 2
DCW SWI_WaitByLoop // 3
DCW SWI_WaitIntr // 4
DCW SWI_WaitVBlankIntr // 5
DCW SWI_Halt // 6
DCW SWIi_Terminate // 7
DCW SWIi_Terminate // 8
DCW SWI_DivS32 // 9
DCW SWIi_Terminate // 10
DCW SWI_CpuSet+1 // 11
DCW SWI_CpuSetFast // 12
DCW SWI_SqrtU32 // 13
DCW SWI_GetCRC16+1 // 14
DCW SWIi_Terminate // 15
DCW SWI_UnPackBits32 // 16
DCW SWI_UnCompLZ77Byte // 17
DCW SWI_UnCompLZ77Short+1 // 18 overlap semihosting ((0x123456>>16) & 0x3f == 0x12)
DCW SWI_UnCompHuffman+1 // 19
DCW SWI_UnCompRLByte+1 // 20
DCW SWI_UnCompRLShort+1 // 21
#ifdef SDK_ARM9
DCW SWI_UnDiffByte2Byte+1 // 22
DCW SWIi_Terminate // 23
DCW SWI_UnDiffShort2Short+1 // 24
DCW SWI_UnCompLZ77Short+1 // 25
DCW SWIi_Terminate // 26
DCW SWIi_Terminate // 27
DCW SWIi_Terminate // 28
DCW SWIi_Terminate // 29
DCW SWIi_Terminate // 30
DCW SWI_SetPauseReg // 31
#else // SDK_ARM7
DCW SWIi_Terminate // 22
DCW SWIi_Terminate // 23
DCW SWIi_Terminate // 24
DCW SWI_UnCompLZ77Short+1 // 25
DCW SWI_GetSinTable+1 // 26
DCW SWI_GetPitchTable+1 // 27
DCW SWI_GetVolumeTable+1 // 28
DCW SWI_GetFuncp4IPL2 // 29
DCW SWIi_Terminate // 30
DCW SWI_SetPauseHi // 31
#endif // SDK_ARM7
#ifndef BROMDEV_DISABLE_SECURE_SVC
DCW ACSign_HeapInit+1 // 32
DCW ACSign_DecryptoCore+1 // 33
DCW ACSign_Decrypto+1 // 34
DCW ACSign_DecryptoDER+1 // 35
DCW SHA1_Init+1 // 36
DCW SHA1_Update+1 // 37
DCW SHA1_Final+1 // 38
DCW ACSign_DigestUnit+1 // 39
DCW ACSign_CompareUnit+1 // 40
DCW ACSign_GetKey+1 // 41
#else // BROMDEV_DISABLE_SECURE_SVC
DCW SWIi_Terminate // 32
DCW SWIi_Terminate // 33
DCW SWIi_Terminate // 34
DCW SWIi_Terminate // 35
DCW SWIi_Terminate // 36
DCW SWIi_Terminate // 37
DCW SWIi_Terminate // 38
DCW SWIi_Terminate // 39
DCW SWIi_Terminate // 40
DCW SWIi_Terminate // 41
#endif // BROMDEV_DISABLE_SECURE_SVC
DCW SWIi_Terminate // 42
DCW SWIi_Terminate // 43 overlap semihosting (0xab & 0x3f == 0x2b)
DCW SWIi_Terminate // 44
DCW SWIi_Terminate // 45
DCW SWIi_Terminate // 46
DCW SWIi_Terminate // 47
DCW SWIi_Terminate // 48
DCW SWIi_Terminate // 49
DCW SWIi_Terminate // 50
DCW SWIi_Terminate // 51
DCW SWIi_Terminate // 52
DCW SWIi_Terminate // 53
DCW SWIi_Terminate // 54
DCW SWIi_Terminate // 55
DCW SWIi_Terminate // 56
DCW SWIi_Terminate // 57
DCW SWIi_Terminate // 58
DCW SWIi_Terminate // 59
DCW SWIi_Terminate // 60
DCW SWIi_Terminate // 61
DCW SWIi_Terminate // 62
DCW SWIi_Terminate // 63
SWI_TableEnd