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ab1aeaa4e5
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@182 b871894f-2f95-9b40-918c-086798483c85
483 lines
15 KiB
C
483 lines
15 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrBrom - OS
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File: os_mmu.c
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Copyright 2009 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <brom/os.h>
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#include <brom/code32.h>
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//======================================================================
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// MMU
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//======================================================================
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/*---------------------------------------------------------------------------*
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Name: osEnableMMU
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Description: enable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osEnableMMU( void )
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{
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, #HW_C1_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osDisableMMU
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Description: disable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osDisableMMU( void )
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{
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #HW_C1_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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}
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//===========================================================================
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// VA TO PA
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osGetPhysicalAddr
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Description: Get physical address
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Arguments: Virtual address
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Returns: Physical address
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*---------------------------------------------------------------------------*/
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asm void* osGetPhysicalAddr( void* vaddr )
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{
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PRESERVE8
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ldr r3, =HW_C7_VA_SRC_MASK
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and r2, r0, r3
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bic r1, r0, r3
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mcr p15, 0, r2, c7, c8, 1
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mrc p15, 0, r0, c7, c4, 0
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tst r0, #HW_C7_PA_ABORT
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LSYM(1) bne BSYM(1) // Error
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ldr r3, =HW_C7_PA_DEST_MASK
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and r0, r0, r3
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orr r0, r0, r1
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osGetMemRegionType
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Description: Get memory region type
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Arguments: Virtual address
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Returns: Region type
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*---------------------------------------------------------------------------*/
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asm u8 osGetMemRegionType( void* vaddr )
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{
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ldr r3, =HW_C7_VA_SRC_MASK
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and r2, r0, r3
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mcr p15, 0, r2, c7, c8, 1
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mrc p15, 0, r0, c7, c4, 0
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tst r0, #HW_C7_PA_ABORT
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LSYM(1) bne BSYM(1) // Error
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and r0, r0, #HW_C7_PA_RGT_MASK
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mov r0, r0, lsr #HW_C7_PA_RGT_TYPE_SFT
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osGetMemRegionCacheAttr
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Description: Get memory region cache attribute
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Arguments: Virtual address
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Returns: Region cache attribute
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*---------------------------------------------------------------------------*/
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asm u8 osGetMemRegionCacheAttr( void* vaddr )
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{
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ldr r3, =HW_C7_VA_SRC_MASK
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and r2, r0, r3
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mcr p15, 0, r2, c7, c8, 1
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mrc p15, 0, r0, c7, c4, 0
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tst r0, #HW_C7_PA_ABORT
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LSYM(1) bne BSYM(1) // Error
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and r0, r0, #HW_C7_PA_L1C_CA_MASK
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mov r0, r0, lsr #HW_C7_PA_L1C_CA_SFT
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osIsMemRegionShareable
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Description: Whether memory region is shareable or not
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Arguments: Virtual address
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Returns: Whether region is shareable or not
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*---------------------------------------------------------------------------*/
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asm BOOL osIsMemRegionShareable( void* vaddr )
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{
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ldr r3, =HW_C7_VA_SRC_MASK
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and r2, r0, r3
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mcr p15, 0, r2, c7, c8, 1
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mrc p15, 0, r0, c7, c4, 0
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tst r0, #HW_C7_PA_ABORT
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LSYM(1) bne BSYM(1) // Error
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and r0, r0, #HW_C7_PA_SHAREABLE
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mov r0, r0, lsr #HW_C7_PA_SHAREABLE_SFT
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osIsMemRegionAbort
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Description: Whether memory region is abort or not
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Arguments: Virtual address
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Returns: Whether region is shareable or not
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*---------------------------------------------------------------------------*/
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asm BOOL osIsMemRegionAbort( void* vaddr )
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{
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ldr r3, =HW_C7_VA_SRC_MASK
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and r2, r0, r3
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mcr p15, 0, r2, c7, c8, 1
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mrc p15, 0, r0, c7, c4, 0
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and r0, r0, #HW_C7_PA_ABORT
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bx lr
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}
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//===========================================================================
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// INVALIDATE ALL TLB
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osInvalidateTLBAll
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Description: Invalidate all main/instruction/data TLBs
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateTLBAll( void )
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{
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mov r0, #0
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mcr p15, 0, r0, c8, c7, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateITLBAll
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Description: Invalidate all instruction TLB
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateITLBAll( void )
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{
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mov r0, #0
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mcr p15, 0, r0, c8, c5, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateDTLBAll
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Description: Invalidate all data TLB
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateDTLBAll( void )
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{
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mov r0, #0
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mcr p15, 0, r0, c8, c6, 0
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bx lr
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}
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//===========================================================================
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// INVALIDATE RANGE OF TLB
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osInvalidateTLBRange
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Description: Invalidate main/instruction/data TLBs in specified range
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Arguments: startAddr start address
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nBytes size (in byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateTLBRange( void* startAddr, u32 nBytes )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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LSYM(1)
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mcr p15, 0, r0, c8, c7, 3
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateITLBRange
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Description: Invalidate instruction TLB in specified range
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Arguments: startAddr start address
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nBytes size (in byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateITLBRange( void* startAddr, u32 nBytes )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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LSYM(1)
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mcr p15, 0, r0, c8, c5, 3
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateDTLBRange
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Description: Invalidate TLBs in specified range
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Arguments: startAddr start address
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nBytes size (in byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateDTLBRange( void* startAddr, u32 nBytes )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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LSYM(1)
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mcr p15, 0, r0, c8, c6, 3
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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//===========================================================================
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// INVALIDATE ALL TLB With ASID
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osInvalidateTLBAllWithASID
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Description: Invalidate all main/instruction/data TLBs with ASID
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Arguments: Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateTLBAllWithASID( u32 asID )
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{
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and r0, r0, #HW_C8_TLB_ASID_MASK
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mcr p15, 0, r0, c8, c7, 2
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateITLBAllWithASID
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Description: Invalidate all instruction TLB with ASID
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Arguments: Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateITLBAllWithASID( u32 asID )
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{
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and r0, r0, #HW_C8_TLB_ASID_MASK
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mcr p15, 0, r0, c8, c5, 2
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateDTLBAllWithASID
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Description: Invalidate all data TLB with ASID
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Arguments: Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateDTLBAllWithASID( u32 asID )
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{
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and r0, r0, #HW_C8_TLB_ASID_MASK
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mcr p15, 0, r0, c8, c6, 2
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bx lr
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}
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//===========================================================================
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// INVALIDATE RANGE OF TLB WITH ASID
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osInvalidateTLBRangeWithASID
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Description: Invalidate TLBs in specified rang with ASIDe
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Arguments: startAddr start address
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nBytes size (in byte)
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asID Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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and r2, r2, #HW_C8_TLB_ASID_MASK
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orr r0, r0, r2
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LSYM(1)
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mcr p15, 0, r0, c8, c5, 1
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mcr p15, 0, r0, c8, c6, 1
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mcr p15, 0, r0, c8, c7, 1
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateITLBRangeWithASID
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Description: Invalidate instruction TLB in specified range with ASID
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Arguments: startAddr start address
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nBytes size (in byte)
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asID Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateITLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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and r2, r2, #HW_C8_TLB_ASID_MASK
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orr r0, r0, r2
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LSYM(1)
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mcr p15, 0, r0, c8, c5, 1
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osInvalidateDTLBRangeWithASID
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Description: Invalidate TLBs in specified range with ASID
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Arguments: startAddr start address
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nBytes size (in byte)
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asID Application Space ID
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osInvalidateDTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID )
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{
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add r1, r1, r0
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ldr r3, =HW_MMU6_T2_SP_BASE_MASK
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and r0, r0, r3
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and r2, r2, #HW_C8_TLB_ASID_MASK
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orr r0, r0, r2
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LSYM(1)
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mcr p15, 0, r0, c8, c6, 1
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add r0, r0, #HW_MMU6_T2_SP_SIZE
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cmp r0, r1
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blt BSYM(1)
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bx lr
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}
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//===========================================================================
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// LOCKDOWN TLB
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osStartTLBLockDown
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Description: Start TLB Lockdown
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Arguments: TLB ID (0-7)
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osStartTLBLockDown( u32 tlbID )
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{
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mov r0, r0, lsl #HW_C10_TLBL_VICTIM_SFT
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and r0, r0, #HW_C10_TLBL_VICTIM_MASK
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and r0, r0, #HW_C10_TLBL_PRESERVE
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mcr p15, 0, r0, c10, c0, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osEndTLBLockDown
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Description: End TLB Lockdown
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osEndTLBLockDown( void )
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{
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mov r0, #0
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mcr p15, 0, r0, c10, c0, 0
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bx lr
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}
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