ブランチターゲットキャッシュの無効処理。

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@182 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2009-01-19 08:23:10 +00:00
parent c087e62b84
commit ab1aeaa4e5
8 changed files with 186 additions and 5 deletions

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@ -18,8 +18,12 @@
void BromMain( void )
{
#ifndef BROM_DEV_EARLY_RELEASE
osInitException();
osInitBROM();
#endif // BROM_DEV_EARLY_RELEASE
i_osFinalize();
while (1)
{
}
}

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@ -18,8 +18,13 @@
void BromSpMain( void )
{
#ifndef BROM_DEV_EARLY_RELEASE
osInitException();
osInitBROM();
#endif // BROM_DEV_EARLY_RELEASE
i_osFinalize();
reg_SCFG_JTAG = REG_SCFG_JTAG_A11JE_MASK | REG_SCFG_JTAG_A9JE_MASK | REG_SCFG_JTAG_DSPJE_MASK;
while (1)
{
}
}

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@ -17,6 +17,43 @@
#include <brom/os.h>
#include <brom/code32.h>
//======================================================================
// MMU
//======================================================================
/*---------------------------------------------------------------------------*
Name: osEnableMMU
Description: enable mmu
Arguments: None
Returns: None
*---------------------------------------------------------------------------*/
asm void osEnableMMU( void )
{
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #HW_C1_MMU_ENABLE
mcr p15, 0, r0, c1, c0, 0
bx lr
}
/*---------------------------------------------------------------------------*
Name: osDisableMMU
Description: disable mmu
Arguments: None
Returns: None
*---------------------------------------------------------------------------*/
asm void osDisableMMU( void )
{
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #HW_C1_MMU_ENABLE
mcr p15, 0, r0, c1, c0, 0
bx lr
}
//===========================================================================
// VA TO PA
//===========================================================================

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@ -38,8 +38,15 @@ void i_osFinalize(void)
osDisableICache();
osInvalidateICacheAll();
#ifdef SDK_ARM11
{
OSIntrMask mask = {HW_IDR_WORD_MASK, HW_IDR_WORD_MASK, HW_IDR_WORD_MASK, HW_IDR_WORD_MASK};
osDisableInterruptMask( mask );
osClearInterruptPendingMask( mask );
}
osDisableBCache();
osInvalidateInstPrefetchBuffer();
osInvalidateBCacheAll();
osDisableMMU();
#else // SDK_ARM9
reg_OS_IE = 0;
reg_OS_IF = 0xffffffff;

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@ -771,6 +771,71 @@ void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes )
osInvalidateBCacheRange( startAddr, nBytes );
}
//===========================================================================
// BRANCH TARGET ADDRESS CACHE CONTROL
//===========================================================================
/*---------------------------------------------------------------------------*
Name: osEnableBCache
Description: enable branch target address cache
Arguments: None
Returns: previous state
*---------------------------------------------------------------------------*/
asm u32 osEnableBCache( void )
{
PRESERVE8
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
orr r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
mcr p15, 0, r1, c1, c0, 0
bx lr
}
/*---------------------------------------------------------------------------*
Name: osDisableBCache
Description: disable branch target address cache
Arguments: None
Returns: previous stats
*---------------------------------------------------------------------------*/
asm u32 osDisableBCache( void )
{
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
bic r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
mcr p15, 0, r1, c1, c0, 0
bx lr
}
/*---------------------------------------------------------------------------*
Name: osRestoreBCache
Description: set state of branch target address cache
Arguments: branch target address cache state to be set
Returns: previous state
*---------------------------------------------------------------------------*/
asm u32 osRestoreBCache( u32 state )
{
//---- ˆø<CB86><EFBFBD>ˆ<CB86>
cmp r0, #0
moveq r2, #0
movne r2, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
bic r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
orr r1, r1, r2
mcr p15, 0, r1, c1, c0, 0
bx lr
}
//===========================================================================
// BRANCH TARGET ADDRESS CACHE
//===========================================================================

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@ -44,7 +44,9 @@ extern "C" {
#include <brom/os/common/spinLock.h>
#include <brom/os/common/boot.h>
#ifdef SDK_ARM9
#ifdef SDK_ARM11
#include <brom/os/ARM11/mmu.h>
#else // SDK_ARM9
#include <brom/os/ARM9/protectionUnit.h>
#endif // SDK_ARM9

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@ -24,6 +24,31 @@ extern "C" {
#endif
//======================================================================
// MMU
//======================================================================
/*---------------------------------------------------------------------------*
Name: osEnableMMU
Description: enable mmu
Arguments: None
Returns: None
*---------------------------------------------------------------------------*/
void osEnableMMU( void );
/*---------------------------------------------------------------------------*
Name: osDisableMMU
Description: disable mmu
Arguments: None
Returns: None
*---------------------------------------------------------------------------*/
void osDisableMMU( void );
//===========================================================================
// VA TO PA
//===========================================================================

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@ -511,6 +511,42 @@ void osDoInstMemoryBarrierAll( void );
void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes );
//===========================================================================
// BRANCH TARGET ADDRESS CACHE CONTROL
//===========================================================================
/*---------------------------------------------------------------------------*
Name: osEnableBCache
Description: enable branch target address cache
Arguments: None
Returns: previous state
*---------------------------------------------------------------------------*/
u32 osEnableBCache( void );
/*---------------------------------------------------------------------------*
Name: osDisableBCache
Description: disable branch target address cache
Arguments: None
Returns: previous stats
*---------------------------------------------------------------------------*/
u32 osDisableBCache( void );
/*---------------------------------------------------------------------------*
Name: osRestoreBCache
Description: set state of branch target address cache
Arguments: branch target address cache state to be set
Returns: previous state
*---------------------------------------------------------------------------*/
u32 osRestoreBCache( u32 state );
//===========================================================================
// BRANCH TARGET ADDRESS CACHE
//===========================================================================