mirror of
https://github.com/rvtr/ctr_firmware.git
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ブランチターゲットキャッシュの無効処理。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@182 b871894f-2f95-9b40-918c-086798483c85
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c087e62b84
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@ -18,8 +18,12 @@
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void BromMain( void )
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{
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#ifndef BROM_DEV_EARLY_RELEASE
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osInitException();
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osInitBROM();
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#endif // BROM_DEV_EARLY_RELEASE
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i_osFinalize();
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while (1)
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{
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}
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}
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@ -18,8 +18,13 @@
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void BromSpMain( void )
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{
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#ifndef BROM_DEV_EARLY_RELEASE
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osInitException();
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osInitBROM();
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#endif // BROM_DEV_EARLY_RELEASE
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i_osFinalize();
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reg_SCFG_JTAG = REG_SCFG_JTAG_A11JE_MASK | REG_SCFG_JTAG_A9JE_MASK | REG_SCFG_JTAG_DSPJE_MASK;
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while (1)
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{
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}
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}
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@ -17,6 +17,43 @@
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#include <brom/os.h>
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#include <brom/code32.h>
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//======================================================================
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// MMU
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//======================================================================
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/*---------------------------------------------------------------------------*
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Name: osEnableMMU
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Description: enable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osEnableMMU( void )
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{
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, #HW_C1_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osDisableMMU
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Description: disable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osDisableMMU( void )
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{
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #HW_C1_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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bx lr
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}
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//===========================================================================
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// VA TO PA
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//===========================================================================
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@ -38,8 +38,15 @@ void i_osFinalize(void)
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osDisableICache();
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osInvalidateICacheAll();
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#ifdef SDK_ARM11
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{
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OSIntrMask mask = {HW_IDR_WORD_MASK, HW_IDR_WORD_MASK, HW_IDR_WORD_MASK, HW_IDR_WORD_MASK};
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osDisableInterruptMask( mask );
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osClearInterruptPendingMask( mask );
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}
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osDisableBCache();
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osInvalidateInstPrefetchBuffer();
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osInvalidateBCacheAll();
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osDisableMMU();
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#else // SDK_ARM9
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reg_OS_IE = 0;
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reg_OS_IF = 0xffffffff;
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@ -771,6 +771,71 @@ void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes )
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osInvalidateBCacheRange( startAddr, nBytes );
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}
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//===========================================================================
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// BRANCH TARGET ADDRESS CACHE CONTROL
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osEnableBCache
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Description: enable branch target address cache
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Arguments: None
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Returns: previous state
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*---------------------------------------------------------------------------*/
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asm u32 osEnableBCache( void )
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{
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PRESERVE8
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mrc p15, 0, r1, c1, c0, 0
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and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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orr r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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mcr p15, 0, r1, c1, c0, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osDisableBCache
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Description: disable branch target address cache
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Arguments: None
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Returns: previous stats
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*---------------------------------------------------------------------------*/
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asm u32 osDisableBCache( void )
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{
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mrc p15, 0, r1, c1, c0, 0
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and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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bic r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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mcr p15, 0, r1, c1, c0, 0
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: osRestoreBCache
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Description: set state of branch target address cache
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Arguments: branch target address cache state to be set
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Returns: previous state
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*---------------------------------------------------------------------------*/
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asm u32 osRestoreBCache( u32 state )
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{
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//---- ˆø<CB86>”<EFBFBD>ˆ—<CB86>
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cmp r0, #0
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moveq r2, #0
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movne r2, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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mrc p15, 0, r1, c1, c0, 0
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and r0, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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bic r1, r1, #HW_C1_BR_FOLDING_ENABLE | HW_C1_SBR_PREDICT_ENABLE | HW_C1_DBR_PREDICT_ENABLE | HW_C1_RETURN_STACK_ENABLE
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orr r1, r1, r2
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mcr p15, 0, r1, c1, c0, 0
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bx lr
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}
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//===========================================================================
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// BRANCH TARGET ADDRESS CACHE
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//===========================================================================
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@ -44,7 +44,9 @@ extern "C" {
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#include <brom/os/common/spinLock.h>
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#include <brom/os/common/boot.h>
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#ifdef SDK_ARM9
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#ifdef SDK_ARM11
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#include <brom/os/ARM11/mmu.h>
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#else // SDK_ARM9
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#include <brom/os/ARM9/protectionUnit.h>
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#endif // SDK_ARM9
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@ -24,6 +24,31 @@ extern "C" {
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#endif
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//======================================================================
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// MMU
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//======================================================================
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/*---------------------------------------------------------------------------*
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Name: osEnableMMU
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Description: enable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void osEnableMMU( void );
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/*---------------------------------------------------------------------------*
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Name: osDisableMMU
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Description: disable mmu
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void osDisableMMU( void );
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//===========================================================================
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// VA TO PA
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//===========================================================================
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@ -511,6 +511,42 @@ void osDoInstMemoryBarrierAll( void );
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void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes );
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//===========================================================================
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// BRANCH TARGET ADDRESS CACHE CONTROL
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//===========================================================================
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/*---------------------------------------------------------------------------*
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Name: osEnableBCache
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Description: enable branch target address cache
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Arguments: None
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Returns: previous state
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*---------------------------------------------------------------------------*/
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u32 osEnableBCache( void );
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/*---------------------------------------------------------------------------*
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Name: osDisableBCache
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Description: disable branch target address cache
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Arguments: None
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Returns: previous stats
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*---------------------------------------------------------------------------*/
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u32 osDisableBCache( void );
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/*---------------------------------------------------------------------------*
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Name: osRestoreBCache
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Description: set state of branch target address cache
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Arguments: branch target address cache state to be set
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Returns: previous state
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*---------------------------------------------------------------------------*/
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u32 osRestoreBCache( u32 state );
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//===========================================================================
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// BRANCH TARGET ADDRESS CACHE
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//===========================================================================
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