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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@37 b871894f-2f95-9b40-918c-086798483c85
75 lines
2.7 KiB
C
75 lines
2.7 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrFirm - include - ctr - HW - common
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File: arm_reg_common.h
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: 2008-11-27#$
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$Rev: 37 $
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$Author: nakasima $
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*---------------------------------------------------------------------------*/
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#ifndef CTR_HW_ARM_REG_COMMON_H_
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#define CTR_HW_ARM_REG_COMMON_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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//----------------------------------------------------------------------
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// Program Status Register
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//----------------------------------------------------------------------
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#define HW_PSR_CPU_MODE_MASK 0x1f // CPU mode
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#define HW_PSR_USR_MODE 0x10 // User mode
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#define HW_PSR_FIQ_MODE 0x11 // FIQ mode
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#define HW_PSR_IRQ_MODE 0x12 // IRQ mode
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#define HW_PSR_SVC_MODE 0x13 // Supervisor mode
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#define HW_PSR_ABORT_MODE 0x17 // Abort mode (prefetch/Data)
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#define HW_PSR_UNDEF_MODE 0x1b // Undefined instruction mode
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#define HW_PSR_SYS_MODE 0x1f // System mode
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#define HW_PSR_ARM_STATE 0x0 // ARM state
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#define HW_PSR_THUMB_STATE 0x20 // Thumb state
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#define HW_PSR_FIQ_DISABLE 0x40 // FIQ Disable
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#define HW_PSR_IRQ_DISABLE 0x80 // IRQ Disable
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#define HW_PSR_IRQ_FIQ_DISABLE 0xc0 // IRQ & FIQ Disable
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#ifdef SDK_ARM9
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#else // SDK_ARM11
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#define HW_PSR_IMPRECISE_ABORT 0x00000100 // Imprecise Abort
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#define HW_PSR_DATA_LITTLE_ENDIAN 0x00000000 // Data Little Endian
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#define HW_PSR_DATA_BIG_ENDIAN 0x00000200 // Data Big Endian
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#define HW_PSR_SIMD_GE0 0x00010000 // SIMD greater-than-or-equal
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#define HW_PSR_SIMD_GE1 0x00020000
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#define HW_PSR_SIMD_GE2 0x00040000
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#define HW_PSR_SIMD_GE3 0x00080000
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#define HW_PSR_JAVA_STATE 0x01000000 // JAVA state
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#endif // SDK_ARM11
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#define HW_PSR_Q_FLAG 0x08000000 // Sticky Overflow (Q) flag
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#define HW_PSR_V_FLAG 0x10000000 // Overflow flag
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#define HW_PSR_C_FLAG 0x20000000 // Carry/Borrow/Extend flag
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#define HW_PSR_Z_FLAG 0x40000000 // Zero flag
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#define HW_PSR_N_FLAG 0x80000000 // Negative/Less than flag
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#ifdef __cplusplus
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} // extern "C"
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#endif
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// CTR_HW_ARM_REG_COMMON_H_
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#endif
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