ctr_firmware/trunk/include/ctr/hw/ARM9/mmap_global.h
nakasima 55cb7d8f4f MPCoreレジスタ定義ヘッダファイル追加。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@37 b871894f-2f95-9b40-918c-086798483c85
2008-11-27 01:24:13 +00:00

83 lines
3.2 KiB
C

/*---------------------------------------------------------------------------*
Project: CtrFirm - include - ctr - HW - ARM9
File: mmap_global.h
Copyright 2008 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Date:: #$
$Rev: $
$Author: $
*---------------------------------------------------------------------------*/
#ifndef CTR_HW_ARM9_MMAP_GLOBAL_H_
#define CTR_HW_ARM9_MMAP_GLOBAL_H_
#ifdef __cplusplus
extern "C" {
#endif
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*
GLOBAL MEMORY MAP
*---------------------------------------------------------------------------*/
//----------------------------- MAIN
#define HW_MAIN_MEM 0x20000000
#define HW_MAIN_MEM_SIZE 0x04000000
#define HW_MAIN_MEM_EX_SIZE 0x08000000
#define HW_MAIN_MEM_EX HW_MAIN_MEM_END
#define HW_MAIN_MEM_END (HW_MAIN_MEM + HW_MAIN_MEM_SIZE)
#define HW_MAIN_MEM_EX_END (HW_MAIN_MEM + HW_MAIN_MEM_EX_SIZE)
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x1ff80000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
#define HW_AXI_WRAM_SIZE 0x80000
//----------------------------- DSP-WRAM (only DMAC2)
#define HW_DSP_WRAM 0x1ff00000
#define HW_DSP_WRAM_END (HW_DSP_WRAM + HW_DSP_WRAM_SIZE)
#define HW_DSP_WRAM_SIZE 0x80000
//----------------------------- VRAM
#define HW_VRAM 0x18000000
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000
//----------------------------- Private WRAM
#define HW_PRV_WRAM 0x08000000
#define HW_PRV_WRAM_END (HW_PRV_WRAM + HW_PRV_WRAM_SIZE)
#define HW_PRV_WRAM_SIZE 0x100000
//----------------------------- IOs
#define HW_IOREG 0x10000000
#define HW_IOREG_END 0x18000000
#define HW_REG_BASE HW_IOREG // alias
#define HW_PRV_REG (HW_IOREG + 0)
#define HW_AHBP_REG (HW_IOREG + 0x00100000)
#define HW_PRV_REG_END (HW_PRV_REG + HW_PRV_REG_SIZE)
#define HW_AHBP_REG_END (HW_AHBP_REG + HW_AHBP_REG_SIZE)
#define HW_PRV_REG_SIZE 0x20000
#define HW_AHBP_REG_SIZE 0x80000
//----------------------------- System ROM
#define HW_BIOS 0xffff0000
#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
#define HW_BIOS_EX HW_BIOS_END
#define HW_BIOS_EX_END (HW_BIOS_EX + HW_BIOS_EX_SIZE)
#define HW_BIOS_SIZE 0x00008000
#define HW_BIOS_EX_SIZE 0x00008000
#define HW_RESET_VECTOR HW_BIOS
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* CTR_HW_ARM9_MMAP_GLOBAL_H_ */