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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@37 b871894f-2f95-9b40-918c-086798483c85
105 lines
4.5 KiB
C
105 lines
4.5 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrFirm - include - ctr - HW - ARM11
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File: vfp.h
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: 2008-11-27#$
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$Rev: 37 $
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$Author: nakasima $
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*---------------------------------------------------------------------------*/
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#ifndef CTR_HW_ARM11_VFP_H_
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#define CTR_HW_ARM11_VFP_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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//----------------------------------------------------------------------
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// VFP Control Registers
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//----------------------------------------------------------------------
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// Floating-Point Exception Register
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#define HW_FPEXC_EXCEPTION_STATE 0x80000000 // in exception state
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#define HW_FPEXC_VFP_ENABLE 0x40000000 // VFP enable
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#define HW_FPEXC_FPINST2_VALID 0x10000000 // FPINST2 instruction valid flag
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#define HW_FPEXC_VEC_ITR_MASK 0x00000700 // Vector iteration count
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#define HW_FPEXC_INPUT_EXCEPTION 0x00000080 // Input exception flag
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#define HW_FPEXC_POTENT_UNDERFLOW 0x00000008 // Potential underflow flag
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#define HW_FPEXC_POTENT_OVERFLOW 0x00000004 // Potential overflow flag
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#define HW_FPEXC_POTENT_INVALID 0x00000001 // Potential invalid operation flag
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#define HW_FPEXC_VEC_ITR_SFT 8
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// Floating-Point Status and Control Register
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#define HW_FPSCR_N_FLAG 0x80000000 // Negative/Less than flag
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#define HW_FPSCR_Z_FLAG 0x40000000 // Zero flag
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#define HW_FPSCR_C_FLAG 0x20000000 // Carry/Borrow/Extend flag
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#define HW_FPSCR_V_FLAG 0x10000000 // Overflow flag
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#define HW_FPSCR_DEFAULT_NAN_MODE 0x02000000 // Default NaN mode (for std mode & fast mode)
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#define HW_FPSCR_FLASH_TO_ZERO_MODE 0x01000000 // Flush-to-zero mode (for std mode & fast mode)
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#define HW_FPSCR_ROUND_MODE_MASK 0x00c00000 // Rounding mode
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#define HW_FPSCR_VEC_STRIDE_MASK 0x00300000 // Vector stride
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#define HW_FPSCR_VEC_LENGTH_MASK 0x00070000 // Vector length
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#define HW_FPSCR_IDE_ENABLE 0x00008000 // Input Subnormal exception enable
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#define HW_FPSCR_IXE_ENABLE 0x00001000 // Inexact exception enable
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#define HW_FPSCR_UFE_ENABLE 0x00000800 // Underflow exception enable
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#define HW_FPSCR_OFE_ENABLE 0x00000400 // Overflow exception enable
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#define HW_FPSCR_DZE_ENABLE 0x00000200 // Division by Zero exception enable
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#define HW_FPSCR_IOE_ENABLE 0x00000100 // Invalid Operation exception enable
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#define HW_FPSCR_IDC 0x00000080 // Input Subnormal cumulative flag
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#define HW_FPSCR_IXC 0x00000010 // Inexact cumulative flag
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#define HW_FPSCR_UFC 0x00000008 // Underflow cumulative flag
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#define HW_FPSCR_OFC 0x00000004 // Overflow cumulative flag
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#define HW_FPSCR_DZC 0x00000002 // Division by Zero cumulative flag
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#define HW_FPSCR_IOC 0x00000001 // Invalid Operation cumulative flag
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#define HW_FPSCR_ROUND_MODE_SFT 22
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#define HW_FPSCR_VEC_STRIDE_SFT 20
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#define HW_FPSCR_VEC_LENGTH_SFT 16
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#define HW_FPSCR_ROUND_NEAR_MODE 0 // Round to nearest mode
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#define HW_FPSCR_ROUND_PLUS_MODE 1 // Round towards plus infinity mode
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#define HW_FPSCR_ROUND_MINUS_MODE 2 // Round towards minus infinity mode
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#define HW_FPSCR_ROUND_ZERO_MODE 3 // Round towards zero mode
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#define HW_FPSCR_VEC_STRIDE_1 0 // Vector stride 1
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#define HW_FPSCR_VEC_STRIDE_2 3 // Vector stride 2
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#define HW_FPSCR_VEC_LENGTH_1 0 // Vector length 1
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#define HW_FPSCR_VEC_LENGTH_2 1 // Vector length 2
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#define HW_FPSCR_VEC_LENGTH_3 2 // Vector length 3
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#define HW_FPSCR_VEC_LENGTH_4 3 // Vector length 4
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#define HW_FPSCR_VEC_LENGTH_5 4 // Vector length 5
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#define HW_FPSCR_VEC_LENGTH_6 5 // Vector length 6
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#define HW_FPSCR_VEC_LENGTH_7 6 // Vector length 7
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#define HW_FPSCR_VEC_LENGTH_8 7 // Vector length 8
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// Floating-Point Instruction Register
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// Floating-Point Instruction Register 2
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#ifdef __cplusplus
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} // extern "C"
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#endif
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// CTR_HW_ARM11_VFP_H_
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#endif
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