mirror of
https://github.com/rvtr/ctr_firmware.git
synced 2025-10-31 07:51:08 -04:00
ARM9開発用ブートROMのアセンブラ版を追加。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@235 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima
parent
39a4aa691b
commit
aff8998612
@ -3,7 +3,7 @@
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# Project: CtrBrom - bootrom - teg-dev
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# File: Makefile
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#
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# Copyright 2008 Nintendo. All rights reserved.
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# Copyright 2008-2009 Nintendo. All rights reserved.
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#
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# These coded instructions, statements, and computer programs contain
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# proprietary information of Nintendo of America Inc. and/or Nintendo
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@ -33,16 +33,12 @@ SRCS = \
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crt0_secure.c \
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crt0_excp.c \
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#SRCS = \
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# main.c \
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#SRCDIR = # using default
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#LCFILE = # using default
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include $(CTRBROM_ROOT)/build/buildtools/commondefs
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SRCDIR = . \
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$(ROOT)/bootrom/build/libraries/init/ARM11 \
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SRCDIR += $(ROOT)/bootrom/build/libraries/init/ARM11 \
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$(ROOT)/bootrom/build/libraries/init/common \
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INSTALL_DIR = ..
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@ -28,14 +28,21 @@ SUBDIRS =
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TARGET_BIN = teg_dev9.padbin
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CRT0_O =
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SRCS = \
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main.c \
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crt0.c \
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crt0_secure_sp.c \
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crt0_excp.c \
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#SRCDIR = # using default
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#LCFILE = # using default
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include $(CTRBROM_ROOT)/build/buildtools/commondefs
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SRCDIR += $(ROOT)/bootrom/build/libraries/init/ARM9 \
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$(ROOT)/bootrom/build/libraries/init/common \
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INSTALL_DIR = ..
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INSTALL_TARGETS = $(BINDIR)/$(TARGET_BIN_BASENAME).axf
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106
trunk/bootrom/build/bootrom/teg-dev/ARM9/crt0_secure_sp.c
Normal file
106
trunk/bootrom/build/bootrom/teg-dev/ARM9/crt0_secure_sp.c
Normal file
@ -0,0 +1,106 @@
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/*---------------------------------------------------------------------------*
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Project: CtrBrom - library - init
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File: crt0_secure_sp.c
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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#define BROM_ENABLE_BOOTROM_WRITE
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#define STUPi_HW_DTCM |Image$$DTCM$$Base|
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/*---------------------------------------------------------------------------*
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Name: i_stupStartHandler
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Description: start handler
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Arguments: None
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Returns: None.
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*---------------------------------------------------------------------------*/
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asm void i_stupStartHandler( void )
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{
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PRESERVE8
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INASM_EXTERN( STUPi_HW_DTCM )
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INASM_EXTERN( stupInitExceptions )
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INASM_EXTERN( i_osFinalize )
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#ifndef BROM_ENABLE_BOOTROM_WRITE
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ldr r3, =REG_ROM_ADDR
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ldrb r1, [r3]
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bic r1, #REG_SCFG_ROM_WE_MASK
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strb r1, [r3]
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#endif // BROM_ENABLE_BOOTROM_WRITE
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//---- initialize stack pointer
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// SVC mode
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mov r0, #HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr sp, =HW_BROM_SVC_STACK_END
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// IRQ mode
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mov r0, #HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_IRQ_STACK_END
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mov sp, r0
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// System mode
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mov r0, #HW_PSR_SYS_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_SYS_STACK_END
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mov sp, r0
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//---- initialize cp15
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bl i_stupEnableTCM
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//---- initialize exceptions
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bl stupInitExceptions
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//---- clear wram
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// DTCM (16KB)
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mov r0, #0
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ldr r1, =STUPi_HW_DTCM
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mov r2, #HW_DTCM_SIZE
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bl i_stupCpuClear32
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// 64B
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mov r0, #0
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ldr r1, =HW_PRV_WRAM_SYSRV
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ldr r2, =HW_EXCP_VENEER_BUF
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sub r2, r2, r1
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bl i_stupCpuClear32
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ldr r1, =HW_EXCP_VENEER_BUF_END
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ldr r2, =HW_PRV_WRAM_SYSRV_END
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sub r2, r2, r1
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bl i_stupCpuClear32
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// os finalize
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bl i_osFinalize
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// enable JTAG
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ldr r3, =REG_JTAG_ADDR
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ldr r0, =REG_SCFG_JTAG_A11JE_MASK | REG_SCFG_JTAG_A9JE_MASK | REG_SCFG_JTAG_DSPJE_MASK
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str r0, [r3]
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terminate
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b terminate
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}
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#include <./../../../../libraries/init/ARM9/crt0_pu.c>
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#include <./../../../../libraries/init/ARM9/crt0_misc_sp.c>
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@ -78,7 +78,7 @@ extern "C" {
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#endif // SDK_MG20EMU
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#ifndef SDK_MG20EMU
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#if !defined(SDK_MG20EMU) && !defined(SDK_NE1EMU)
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//----------------------------- Private WRAM
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#define HW_PRV_WRAM 0x08000000
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#define HW_PRV_WRAM_END (HW_PRV_WRAM + HW_PRV_WRAM_SIZE)
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@ -89,7 +89,7 @@ extern "C" {
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#define HW_IOREG_END 0x18000000
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#define HW_REG_BASE HW_IOREG // alias
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#else // SDK_MG20EMU
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#else // SDK_MG20EMU || SDK_NE1EMU
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//----------------------------- Private WRAM
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#define HW_PRV_WRAM 0x10000000
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#define HW_PRV_WRAM_END (HW_PRV_WRAM + HW_PRV_WRAM_SIZE)
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@ -100,11 +100,13 @@ extern "C" {
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#define HW_IOREG_END 0x10000000
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#define HW_REG_BASE HW_IOREG // alias
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#ifdef SDK_MG20EMU
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#define HW_MG20IOP_REG 0x40000000
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#define HW_MG20IOP_REG_END 0x40100000
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#endif // SDK_MG20EMU
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#endif // SDK_MG20EMU || SDK_NE1EMU
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#define HW_PRV_REG (HW_IOREG + 0)
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#define HW_AHBP_REG (HW_IOREG + 0x00100000)
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#define HW_PRV_REG_END (HW_PRV_REG + HW_PRV_REG_SIZE)
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