add AESi_AddCounter created from FATFSi_AddCounter

arrange for new format_rom.h

git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@34 b08762b0-b915-fc4b-9d8c-17b2551a87ff
This commit is contained in:
yutaka 2007-09-28 10:42:29 +00:00
parent 639fa13e41
commit 6b971d2023
8 changed files with 109 additions and 153 deletions

View File

@ -32,6 +32,7 @@ SRCDIR = .
SRCS = \
aes_init.c \
aes_util.c \
TARGET_LIB = libaes_sp$(FIRM_LIBSUFFIX).a

View File

@ -32,19 +32,6 @@ extern u32 NAND_FAT_PARTITION_COUNT;
/*
DMA関数
*/
#define MIi_SRC_INC (MI_NDMA_SRC_INC | MI_NDMA_SRC_RELOAD_DISABLE)
#define MIi_SRC_DEC (MI_NDMA_SRC_DEC | MI_NDMA_SRC_RELOAD_DISABLE)
#define MIi_SRC_FIX (MI_NDMA_SRC_FIX | MI_NDMA_SRC_RELOAD_DISABLE)
#define MIi_SRC_FILLDATA (MI_NDMA_SRC_FILLDATA | MI_NDMA_SRC_RELOAD_DISABLE)
#define MIi_DEST_INC (MI_NDMA_DEST_INC | MI_NDMA_DEST_RELOAD_DISABLE)
#define MIi_DEST_DEC (MI_NDMA_DEST_DEC | MI_NDMA_DEST_RELOAD_DISABLE)
#define MIi_DEST_FIX (MI_NDMA_DEST_FIX | MI_NDMA_DEST_RELOAD_DISABLE)
#define MIi_DEST_INC_RELOAD (MI_NDMA_SRC_INC | MI_NDMA_DEST_RELOAD_ENABLE)
#define MIi_IMM (MI_NDMA_IMM_MODE_ON)
#define MIi_CONT (MI_NDMA_CONTINUOUS_ON)
//---------------- register setting
static inline void MIi_SetSrc( u32 ndmaNo, u32 src )
{
@ -70,23 +57,10 @@ static inline void MIi_SetInterval( u32 ndmaNo, u32 intervalTimer, u32 prescaler
#endif
MI_NDMA_REG( ndmaNo, MI_NDMA_REG_BCNT_WOFFSET ) = intervalTimer | prescaler;
}
static inline void MIi_SetFillData( u32 ndmaNo, u32 data )
{
MI_NDMA_REG( ndmaNo, MI_NDMA_REG_FDATA_WOFFSET ) = data;
}
static inline void MIi_SetControl( u32 ndmaNo, u32 contData )
{
MI_NDMA_REG( ndmaNo, MI_NDMA_REG_CNT_WOFFSET ) = contData;
}
static inline void MIi_NDmaRecv(u32 ndmaNo, const void *src, void *dest, u32 size)
{
MIi_SetSrc( ndmaNo, (u32)src );
MIi_SetDest( ndmaNo, (u32)dest );
MIi_SetInterval( ndmaNo, MI_NDMA_NO_INTERVAL, MI_NDMA_INTERVAL_PS_1 );
MIi_SetTotalWordCount( ndmaNo, size/4 );
MIi_SetWordCount( ndmaNo, size/4 );
MIi_SetControl( ndmaNo, MI_NDMA_BWORD_16 | MI_NDMA_SRC_FIX | MIi_DEST_INC | MIi_IMM | MI_NDMA_ENABLE );
}
static inline void MIi_Sd1_NDmaRecv(u32 ndmaNo, void *dest, u32 size)
{
MIi_SetSrc( ndmaNo, (u32)SDIF_FI );
@ -94,7 +68,7 @@ static inline void MIi_Sd1_NDmaRecv(u32 ndmaNo, void *dest, u32 size)
MIi_SetInterval( ndmaNo, MI_NDMA_NO_INTERVAL, MI_NDMA_INTERVAL_PS_1 );
MIi_SetTotalWordCount( ndmaNo, size/4 );
MIi_SetWordCount( ndmaNo, SECTOR_SIZE/4 );
MIi_SetControl( ndmaNo, MI_NDMA_BWORD_128 | MI_NDMA_SRC_FIX | MIi_DEST_INC | MI_NDMA_TIMING_SD_1 | MI_NDMA_ENABLE );
MIi_SetControl( ndmaNo, MI_NDMA_BWORD_128 | MI_NDMA_SRC_FIX | MI_NDMA_DEST_INC | MI_NDMA_TIMING_SD_1 | MI_NDMA_ENABLE );
}
static inline void MIi_NDmaPipeSetup(u32 ndmaNo, const void *src, void *dest, u32 size)
@ -104,7 +78,7 @@ static inline void MIi_NDmaPipeSetup(u32 ndmaNo, const void *src, void *dest, u3
MIi_SetInterval( ndmaNo, MI_NDMA_NO_INTERVAL, MI_NDMA_INTERVAL_PS_1 );
MIi_SetTotalWordCount( ndmaNo, size/4 );
MIi_SetWordCount( ndmaNo, size/4 );
MIi_SetControl( ndmaNo, MI_NDMA_BWORD_16 | MI_NDMA_SRC_FIX | MIi_DEST_FIX | MIi_IMM );
MIi_SetControl( ndmaNo, MI_NDMA_BWORD_8 | MI_NDMA_SRC_FIX | MI_NDMA_DEST_FIX | MI_NDMA_IMM_MODE_ON ); // AESi_Run is required BWORD_8
}
static inline void MIi_NDmaRestart(u32 ndmaNo)
@ -114,7 +88,7 @@ static inline void MIi_NDmaRestart(u32 ndmaNo)
}
/*
<EFBFBD>êpNANDŠÖ<EFBFBD>
SD関数
*/
extern volatile SDMC_ERR_CODE SDCARD_ErrStatus;
extern s16 SDCARD_SDHCFlag; /* SDHCカードフラグ */
@ -163,27 +137,30 @@ static void StopToRead( void )
CC_EXT_MODE = CC_EXT_MODE_PIO; /* PIOモード(DMAモードOFF) */
}
/*
FATFS-SDMCの間にAESを組み込む
FATFSを迂回して設定することになる
*/
#define AES_GET_CNT_BITS(regValue, name) \
((regValue) & (REG_AES_AES_CNT_##name##_MASK))
static BOOL useAES = FALSE;
static AESCounter aesCounter;
/*---------------------------------------------------------------------------*
Name: FATFS_EnableAES
Description: enable AES data path
Arguments: slot aes key slot number
counter initial counter value
Arguments: counter initial counter value
Returns: None
*---------------------------------------------------------------------------*/
void FATFS_EnableAES( AESKeySlot slot, const AESCounter* pCounter )
void FATFS_EnableAES( const AESCounter* pCounter )
{
useAES = TRUE;
AESi_WaitKey();
AESi_LoadKey( slot );
AESi_SetCounter( pCounter );
aesCounter = *pCounter;
}
/*---------------------------------------------------------------------------*
@ -249,17 +226,19 @@ static u16 ReadAES(u32 block, void *dest, u16 count)
AESi_Reset();
AESi_Reset();
AESi_DmaRecv( DMA_RECV, dest, (u32)(count * SECTOR_SIZE), NULL, NULL );
// AESi_SetCounter( &aesCounter ); // remain???
// FATFSi_AddCounter( count * SECTOR_SIZE ); // update for next read
AESi_SetCounter( &aesCounter );
AESi_Run( AES_MODE_CTR, 0, (u32)(count * SECTOR_SIZE / AES_BLOCK_SIZE), NULL, NULL );
// update for next read
AESi_AddCounter( &aesCounter, (u32)(count * SECTOR_SIZE / AES_BLOCK_SIZE) );
StartToRead( block, count );
if ( SDCARD_ErrStatus != SDMC_NORMAL )
{
goto err;
}
while ( block * SECTOR_SIZE > offset )
while ( count * SECTOR_SIZE > offset )
{
while ( AES_GET_CNT_BITS( reg_AES_AES_CNT, IFIFO_CNT ) )
{

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@ -188,29 +188,21 @@ BOOL FATFS_LoadHeader( void )
return TRUE;
}
static void FATFSi_AddCounter(AESCounter* pCounter, u32 nums)
{
u32 data = 0;
int i;
for (i = 15; i >= 0; i--)
{
data += pCounter->bytes[i] + (nums & 0xFF);
pCounter->bytes[i] = (u8)(data & 0xFF);
data >>= 8;
nums >>= 8;
if ( !data && !nums )
{
break;
}
}
}
/*---------------------------------------------------------------------------*
Name: FATFSi_GetCounter
Description: get counter
Arguments: offset offset from head of ROM_Header
Returns: counter
*---------------------------------------------------------------------------*/
static AESCounter* FATFSi_GetCounter( u32 offset )
{
static AESCounter counter;
MI_CpuCopy8(rh->s.main_static_digest, &counter, 12);
counter.words[3] = 0;
FATFSi_AddCounter(&counter, offset - SECURE_AREA_START);
AESi_AddCounter(&counter, offset - offsetof(ROM_Header, s.main_ltd_rom_offset));
return &counter;
}
@ -271,60 +263,64 @@ BOOL FATFS_LoadMenu( void )
#endif
}
// load ARM9 extended static region with AES
if ( rh->s.main_ex_size > 0 )
if ( rh->s.main_ltd_size > 0 )
{
#ifndef SDK_FINALROM
// 70: before PXI
pf_cnt = 70;
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_LOAD_ARM9_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC; // checkpoint
#endif
PXI_NotifyID( FIRM_PXI_ID_LOAD_ARM9_STATIC_EX );
PXI_NotifyID( FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC );
if ( !rh->s.enable_aes )
{
FATFS_DisableAES();
}
else
{
FATFS_EnableAES( AES_KEY_SLOT_A, FATFSi_GetCounter( rh->s.main_ex_rom_offset ) );
AESi_WaitKey();
AESi_LoadKey( AES_KEY_SLOT_A );
FATFS_EnableAES( FATFSi_GetCounter( rh->s.main_ltd_rom_offset ) );
}
if ( !FATFS_LoadBuffer( rh->s.main_ex_rom_offset, rh->s.main_ex_size ) ||
PXI_RecvID() != FIRM_PXI_ID_AUTH_ARM9_STATIC_EX )
if ( !FATFS_LoadBuffer( rh->s.main_ltd_rom_offset, rh->s.main_ltd_size ) ||
PXI_RecvID() != FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC )
{
return FALSE;
}
#ifndef SDK_FINALROM
// 7x: after PXI
profile[pf_cnt++] = (u32)PROFILE_PXI_RECV | FIRM_PXI_ID_AUTH_ARM9_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_RECV | FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC; // checkpoint
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
#endif
}
// load ARM7 extended static region with AES
if ( rh->s.sub_ex_size > 0 )
if ( rh->s.sub_ltd_size > 0 )
{
#ifndef SDK_FINALROM
// 90: before PXI
pf_cnt = 90;
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_LOAD_ARM7_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC; // checkpoint
#endif
PXI_NotifyID( FIRM_PXI_ID_LOAD_ARM7_STATIC_EX );
PXI_NotifyID( FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC );
if ( !rh->s.enable_aes )
{
FATFS_DisableAES();
}
else
{
FATFS_EnableAES( AES_KEY_SLOT_A, FATFSi_GetCounter( rh->s.sub_ex_rom_offset ) );
AESi_WaitKey();
AESi_LoadKey( AES_KEY_SLOT_A );
FATFS_EnableAES( FATFSi_GetCounter( rh->s.sub_ltd_rom_offset ) );
}
if ( !FATFS_LoadBuffer( rh->s.sub_ex_rom_offset, rh->s.sub_ex_size ) ||
PXI_RecvID() != FIRM_PXI_ID_AUTH_ARM7_STATIC_EX )
if ( !FATFS_LoadBuffer( rh->s.sub_ltd_rom_offset, rh->s.sub_ltd_size ) ||
PXI_RecvID() != FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC )
{
return FALSE;
}
#ifndef SDK_FINALROM
// 9x: after PXI
profile[pf_cnt++] = (u32)PROFILE_PXI_RECV | FIRM_PXI_ID_AUTH_ARM7_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_RECV | FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC; // checkpoint
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
#endif
}

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@ -454,52 +454,52 @@ BOOL MI_LoadMenu( void )
}
// load ARM9 extended static region
if ( rh->s.main_ex_size > 0 )
if ( rh->s.main_ltd_size > 0 )
{
#ifndef SDK_FINALROM
// 70: before PXI
pf_cnt = 70;
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
#endif
if ( PXI_RecvID() != FIRM_PXI_ID_LOAD_ARM9_STATIC_EX ||
if ( PXI_RecvID() != FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC ||
#ifndef SDK_FINALROM
// 71: after PXI
((profile[pf_cnt++] = PROFILE_PXI_RECV | FIRM_PXI_ID_LOAD_ARM9_STATIC_EX), FALSE) ||
((profile[pf_cnt++] = PROFILE_PXI_RECV | FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC), FALSE) ||
((profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick())), FALSE) ||
#endif
!MI_LoadModule( rh->s.main_ex_ram_address, rh->s.main_ex_size, rh->s.main_static_ex_digest ) )
!MI_LoadModule( rh->s.main_ltd_ram_address, rh->s.main_ltd_size, rh->s.main_ltd_static_digest ) )
{
return FALSE;
}
#ifndef SDK_FINALROM
// 7x: after PXI
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_AUTH_ARM9_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC; // checkpoint
#endif
PXI_NotifyID( FIRM_PXI_ID_AUTH_ARM9_STATIC_EX );
PXI_NotifyID( FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC );
}
// load ARM7 extended static region
if ( rh->s.sub_ex_size > 0 )
if ( rh->s.sub_ltd_size > 0 )
{
#ifndef SDK_FINALROM
// 90: before PXI
pf_cnt = 90;
profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick());
#endif
if ( PXI_RecvID() != FIRM_PXI_ID_LOAD_ARM7_STATIC_EX ||
if ( PXI_RecvID() != FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC ||
#ifndef SDK_FINALROM
// 91: after PXI
((profile[pf_cnt++] = PROFILE_PXI_RECV | FIRM_PXI_ID_LOAD_ARM7_STATIC_EX), FALSE) ||
((profile[pf_cnt++] = PROFILE_PXI_RECV | FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC), FALSE) ||
((profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick())), FALSE) ||
#endif
!MI_LoadModule( rh->s.sub_ex_ram_address, rh->s.sub_ex_size, rh->s.sub_static_ex_digest ) )
!MI_LoadModule( rh->s.sub_ltd_ram_address, rh->s.sub_ltd_size, rh->s.sub_ltd_static_digest ) )
{
return FALSE;
}
#ifndef SDK_FINALROM
// 9x: before PXI
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_AUTH_ARM7_STATIC_EX; // checkpoint
profile[pf_cnt++] = (u32)PROFILE_PXI_SEND | FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC; // checkpoint
#endif
PXI_NotifyID( FIRM_PXI_ID_AUTH_ARM7_STATIC_EX );
PXI_NotifyID( FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC );
}
return TRUE;
}

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@ -20,6 +20,7 @@
#ifdef SDK_ARM7
#include <twl/aes/common/type.h>
#include <firm/aes/ARM7/aes_init.h>
#include <firm/aes/ARM7/aes_util.h>
#include <firm/aes/ARM7/aes_ids.h>
#endif // SDK_ARM7

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@ -31,12 +31,11 @@ extern "C" {
Description: enable AES data path
Arguments: slot aes key slot number
counter initial counter value
Arguments: counter initial counter value
Returns: None
*---------------------------------------------------------------------------*/
void FATFS_EnableAES( AESKeySlot slot, const AESCounter* pCounter );
void FATFS_EnableAES( const AESCounter* pCounter );
/*---------------------------------------------------------------------------*
Name: FATFS_DisableAES

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@ -25,9 +25,13 @@
#include <twl/aes.h>
#include <firm/format/format_rom_certificate.h>
#define ENABLE_OVERLAY_DIGEST_ANNEX // この定義が有効なら、OverlayのダイジェストをcompstaticのMB用のものとは別途持つようになる。
//#define ENABLE_OVERLAY_DIGEST_ANNEX // この定義が有効なら、OverlayのダイジェストをcompstaticのMB用のものとは別途持つようになる。
#define ROM_KEYTABLE2_SIZE 0x3000 // TWL-ROMのTWL専用領域先頭にあるキーテーブルサイズ。TWL専用領域のセキュア領域は、この後ろから開始。
#define ROM_TWL_LTD_ALIGN 0x80000 // TWL-ROMのTWL専用領域の設定単位 ※仕様書上は512KB
#define ROM_TWL_LTD_ALIGN_SHIFT 19 // 上記の単位をビットシフトに換算
#define ROM_TWL_ALL_NORMAL_AREA_FLAG 0x8000
#define DIGEST_SIZE_SHA1 20
@ -54,6 +58,7 @@
#define DEFAULT_ROMFILE_SUFFIX ".srl"
#define DEFAULT_LISTFILE_SUFFIX ".nlf"
#define DEFAULT_LISTFILE_SUFFIX_TWL ".tlf"
#define ROM_SIZE_MIN 0x20000
@ -62,9 +67,7 @@
#define SECURE_AREA_START 0x00004000
#define SECURE_AREA_END 0x00008000
#define SECURE_AREA_MAX (SECURE_AREA_END - SECURE_AREA_START)
#define SECURE_EX_AREA_START 0x00050000 //※とりあえず適当。最終的にはrsfで指定した値をROMヘッダに入れて使う
#define SECURE_EX_AREA_END ( SECURE_EX_AREA_START + SECURE_AREA_MAX )
#define SECURE_AREA_SIZE (SECURE_AREA_END - SECURE_AREA_START)
#define CARD_LATENCY_MASK 0x083f1fff
#define CARD_MROM_GAME_LATENCY 0x00010017
@ -103,13 +106,18 @@ typedef struct ROM_Header_Short
// 0x000 System Reserved
//
char title_name[TITLE_NAME_MAX]; // Soft title name
char game_code[GAME_CODE_MAX]; // Game code
char game_code[GAME_CODE_MAX]; // Game code
char maker_code[MAKER_CODE_MAX]; // Maker code
char platform_code; // Platform code bit0: not support NTR, bit1: support TWL ( NTR_only=0x00, NTR/TWL=0x03, TWL_only=0x02 )
u8 rom_type; // Rom type
u8 rom_size; // Rom size (2Ìrom_size<7A>æ Mbit: ex. 128MbitÌÆ«rom_size = 7)
u8 reserved_A[8]; // System Reserved A ( Set ALL 0 )
u8 reserved_A[7]; // System Reserved A ( Set ALL 0 )
u8 enable_signature:1; // enable ROM Header signature
u8 enable_aes:1; // enable AES encryption
u8 developer_encrypt:1; // 開発用セキュリティがかかっている場合に"1"。製品版では"0"
u8: 5;
u8: 6;
u8 for_korea:1; // For Korea
@ -121,8 +129,8 @@ typedef struct ROM_Header_Short
u8 comp_arm7_boot_area:1; // Compress arm7 boot area
u8 inspect_card:1; // Show inspect card
u8 disable_clear_memory_pad:1; // for Debugger
u8 enable_aes:1; // enable AES encryption
u8 enable_signature:1; // enable RSA signature
u8 enable_twl_rom_cache_read:1; // Enable TWL ROM cacheRead command
u8: 1;
u8 warning_no_spec_rom_speed:1;// Warning not to specify rom speed
u8 disable_detect_pull_out:1; //
@ -216,7 +224,7 @@ typedef struct ROM_Header_Short
u32 sub_wram_config_data[4]; // developing...
// 0x1B0 - reserved.
u8 reserved_EX_A[ 15 ];
u8 reserved_ltd_A[ 15 ];
// 0x1BF - TWL expansion flags
u8 codec_mode:1; // 0:NTR mode, 1:TWL mode // undeveloped
@ -229,75 +237,51 @@ typedef struct ROM_Header_Short
// 0x1C0 for EX Static modules
//
// ARM9
u32 main_ex_rom_offset; // ROM offset // undeveloped
u8 reserved_EX_B[ 4 ];
void *main_ex_ram_address; // RAM address // undeveloped
u32 main_ex_size; // Module size // undeveloped
u32 main_ltd_rom_offset; // ROM offset // undeveloped
u8 reserved_ltd_B[ 4 ];
void *main_ltd_ram_address; // RAM address // undeveloped
u32 main_ltd_size; // Module size // undeveloped
// ARM7
u32 sub_ex_rom_offset; // ROM offset // undeveloped
u8 reserved_EX_C[ 4 ];
void *sub_ex_ram_address; // RAM address // undeveloped
u32 sub_ex_size; // Module size // undeveloped
u32 sub_ltd_rom_offset; // ROM offset // undeveloped
u8 reserved_ltd_C[ 4 ];
void *sub_ltd_ram_address; // RAM address // undeveloped
u32 sub_ltd_size; // Module size // undeveloped
//
// 0x1E0 for File Name Table EX [FNT_ex]
//
struct ROM_FNT *fnt_ex_offset; // ROM offset // undeveloped
u32 fnt_ex_size; // Table size // undeveloped
// 0x01E0 - 0x01E8 for NITRO digest area offset & size
u32 nitro_digest_area_rom_offset;
u32 nitro_digest_area_size;
//
// 0x1E8 for File Allocation Table EX [FAT_ex]
//
struct ROM_FAT *fat_ex_offset; // ROM offset // undeveloped
u32 fat_ex_size; // Table size // undeveloped
// 0x01E8 - 0x01F0 for TWL digest area offset & size
u32 twl_digest_area_rom_offset;
u32 twl_digest_area_size;
//
// 0x1F0 for Overlay Tables EX [OVT_ex]
//
// ARM9
struct ROM_OVT *main_ovt_ex_offset; // ROM offset // undeveloped
u32 main_ovt_ex_size; // Table size // undeveloped
// ARM7
struct ROM_OVT *sub_ovt_ex_offset; // ROM offset // undeveloped
u32 sub_ovt_ex_size; // Table size // undeveloped
// 0x01F0 - 0x01F8 for FS digest table1 offset & size
u32 digest1_table_offset;
u32 digest1_table_size;
// 0x01F8 - 0x0200 for FS digest table1 offset
u32 digest2_table_offset;
u32 digest2_table_size;
// 0x0200 - 0x0208 for FS digest config parameters
u32 fs_digest1_block_size;
u32 fs_digest2_covered_digest1_num;
u32 digest1_block_size;
u32 digest2_covered_digest1_num;
// 0x0208 - 0x0210 for Banner for TWL
u32 banner_twl_offset;
u32 banner_twl_size;
// 0x0210 - 0x0220 for FS digest
u32 fs_digest1_table_offset;
u32 fs_digest1_table_size;
u32 fs_digest2_table_offset;
u8 reserved_EX_D[ 4 ]; // digest2_table_sizeは他パラメータから算出可能なので不要。( fs_digest1_table_size / fs_digest2_covered_digest1_num )でOK.
// 0x0210 - 0x0220 for AES key/seed
u8 aes_key[ 16 ];
// 0x0220 - 0x0230 for FS EX digest
u32 fs_ex_digest1_table_offset;
u32 fs_ex_digest1_table_size;
u32 fs_ex_digest2_table_offset;
u8 reserved_EX_E[ 4 ];
// 0x230 - 0x310 Rom Segment Digest
// 0x220 - 0x298 Rom Segment Digest
u8 main_static_digest[ DIGEST_SIZE_SHA1 ];
u8 sub_static_digest[ DIGEST_SIZE_SHA1 ];
u8 fnt_digest[ DIGEST_SIZE_SHA1 ];
u8 fat_digest[ DIGEST_SIZE_SHA1 ];
u8 fs_digest2_table_digest[ DIGEST_SIZE_SHA1 ];
u8 digest2_table_digest[ DIGEST_SIZE_SHA1 ];
u8 banner_twl_digest[ DIGEST_SIZE_SHA1 ];
u8 main_static_ex_digest[ DIGEST_SIZE_SHA1 ];
u8 sub_static_ex_digest[ DIGEST_SIZE_SHA1 ];
u8 fnt_ex_digest[ DIGEST_SIZE_SHA1 ];
u8 fat_ex_digest[ DIGEST_SIZE_SHA1 ];
u8 fs_digest2_table_ex_digest[ DIGEST_SIZE_SHA1 ];
u8 main_ltd_static_digest[ DIGEST_SIZE_SHA1 ];
u8 sub_ltd_static_digest[ DIGEST_SIZE_SHA1 ];
#ifdef ENABLE_OVERLAY_DIGEST_ANNEX
@ -310,10 +294,6 @@ typedef struct ROM_Header_Short
u8 main_overlay_digesttable_digest[ DIGEST_SIZE_SHA1 ];
u8 sub_overlay_digesttable_digest[ DIGEST_SIZE_SHA1 ];
u32 main_ex_overlay_digest_table_offset;
u32 sub_ex_overlay_digest_table_offset;
u8 main_ex_overlay_digesttable_digest[ DIGEST_SIZE_SHA1 ];
u8 sub_ex_overlay_digesttable_digest[ DIGEST_SIZE_SHA1 ];
#endif // ENABLE_OVERLAY_DIGEST_ANNEX
}
ROM_Header_Short;

View File

@ -32,8 +32,8 @@ typedef enum
FIRM_PXI_ID_LOAD_HEADER = 8,
FIRM_PXI_ID_LOAD_ARM9_STATIC = 5,
FIRM_PXI_ID_LOAD_ARM7_STATIC = 6,
FIRM_PXI_ID_LOAD_ARM9_STATIC_EX = 9,
FIRM_PXI_ID_LOAD_ARM7_STATIC_EX = 10,
FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC = 9,
FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC = 10,
FIRM_PXI_ID_LOAD_PIRIOD = 11,
// from ARM9
@ -41,8 +41,8 @@ typedef enum
FIRM_PXI_ID_AUTH_HEADER = 8,
FIRM_PXI_ID_AUTH_ARM9_STATIC = 5,
FIRM_PXI_ID_AUTH_ARM7_STATIC = 6,
FIRM_PXI_ID_AUTH_ARM9_STATIC_EX = 9,
FIRM_PXI_ID_AUTH_ARM7_STATIC_EX = 10,
FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC = 9,
FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC = 10,
FIRM_PXI_ID_DONE_WRAM_SETTING = 11,
// from both of ARM9 and ARM7