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Author SHA1 Message Date
Eli Friedman
768de0a0f8 Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 . 
llvm-svn: 131156
 2011-05-10 21:50:58 +00:00
Eric Christopher
4480428474 Look through struct wrapped types for inline asm statments. 
Patch by Evan Cheng.

llvm-svn: 131093
 2011-05-09 20:04:43 +00:00
Evan Cheng
d26fc5e013 80 col violations. 
llvm-svn: 131015
 2011-05-06 20:52:23 +00:00
Eli Friedman
441a01a2b8 Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 . 
llvm-svn: 130928
 2011-05-05 16:53:34 +00:00
Devang Patel
734f2218ac A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction. 
llvm-svn: 130129
 2011-04-25 16:33:52 +00:00
Chris Lattner
0ab5e2cded Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!

llvm-svn: 129558
 2011-04-15 05:18:47 +00:00
Chris Lattner
cfe5aa65d2 Avoid excess precision issues that lead to generating host-compiler-specific code. 
Switch lowering probably shouldn't be using FP for this.  This resolves PR9581.

llvm-svn: 129199
 2011-04-09 06:57:13 +00:00
Evan Cheng
74d92c1924 Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time. 
llvm-svn: 129152
 2011-04-08 21:37:21 +00:00
Bill Wendling
dd4dcd549b Revamp the SjLj "dispatch setup" intrinsic. 
It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>

llvm-svn: 128873
 2011-04-05 01:37:43 +00:00
Evan Cheng
8b1bca1998 Add comments. 
llvm-svn: 128730
 2011-04-01 19:57:01 +00:00
Evan Cheng
8d68ebd42a Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118 
llvm-svn: 128728
 2011-04-01 19:42:22 +00:00
Benjamin Kramer
355ce07425 Turn SelectionDAGBuilder::GetRegistersForValue into a local function. 
It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.

llvm-svn: 128342
 2011-03-26 16:35:10 +00:00
Cameron Zwarich
2ef0c69df1 Move more logic into getTypeForExtArgOrReturn. 
llvm-svn: 127809
 2011-03-17 14:53:37 +00:00
Cameron Zwarich
34e7b3f77e Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn(). 
llvm-svn: 127807
 2011-03-17 14:21:56 +00:00
Cameron Zwarich
ac106273d4 The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte 
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.

This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.

llvm-svn: 127766
 2011-03-16 22:20:18 +00:00
Cameron Zwarich
d1ad9bc277 Don't recompute something that we already have in a local variable. 
llvm-svn: 127764
 2011-03-16 22:20:07 +00:00
Andrew Trick
710d5da306 Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text. 
llvm-svn: 127468
 2011-03-11 17:46:59 +00:00
Owen Anderson
b2c80da4ae Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. 
llvm-svn: 126518
 2011-02-25 21:41:48 +00:00
Jim Grosbach
14a07365cb Fix formatting of debug helper string. 
llvm-svn: 126471
 2011-02-25 03:59:03 +00:00
Cameron Zwarich
6470647383 Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo 
and make the actual map private.

llvm-svn: 126376
 2011-02-24 10:00:08 +00:00
Cameron Zwarich
f8b22b3483 Roll out r126169 and r126170 in an attempt to fix the selfhost bot. 
llvm-svn: 126185
 2011-02-22 03:24:52 +00:00
Cameron Zwarich
800f85baf9 Merge information about the number of zero, one, and sign bits of live-out registers 
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126170
 2011-02-22 00:46:27 +00:00
Devang Patel
b7ae3ccb84 Do not lose debug info of an inlined function argument even if the argument is only used through GEPs. 
This time with a fix that avoids using invalidated DenseMap iterator.

llvm-svn: 125984
 2011-02-18 22:43:42 +00:00
Cameron Zwarich
0a1a36dc46 Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure. 
llvm-svn: 125830
 2011-02-18 04:58:10 +00:00
Devang Patel
f922a431ee Do not lose debug info of an inlined function argument even if the argument is only used through GEPs. 
llvm-svn: 125794
 2011-02-17 23:33:27 +00:00
Chris Lattner
69229316aa convert ConstantVector::get to use ArrayRef. 
llvm-svn: 125537
 2011-02-15 00:14:00 +00:00
Chris Lattner
34442e6ebf revert my ConstantVector patch, it seems to have made the llvm-gcc 
builders unhappy.

llvm-svn: 125504
 2011-02-14 18:15:46 +00:00
Chris Lattner
d9f5b88548 Switch ConstantVector::get to use ArrayRef instead of a pointer+size 
idiom.  Change various clients to simplify their code.

llvm-svn: 125487
 2011-02-14 07:55:32 +00:00
Chris Lattner
e95d195014 Revisit my fix for PR9028: the issue is that DAGCombine was 
generating i8 shift amounts for things like i1024 types.  Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h

llvm-svn: 125465
 2011-02-13 19:09:16 +00:00
Chris Lattner
d5f0b1148a when legalizing extremely wide shifts, make sure that 
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.

This fixes PR9028.

llvm-svn: 125458
 2011-02-13 09:10:56 +00:00
Chris Lattner
2a720d933a fix visitShift to properly zero extend the shift amount if the provided operand 
is narrower than the shift register.  Doing an anyext provides undefined bits in
the top part of the register.

llvm-svn: 125457
 2011-02-13 09:02:52 +00:00
Nick Lewycky
0af77fd45b Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger! 
llvm-svn: 124472
 2011-01-28 04:00:15 +00:00
Devang Patel
70f8e5962a Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. 
llvm-svn: 124203
 2011-01-25 18:09:58 +00:00
Devang Patel
533479544b Speculatively revert r124138. 
llvm-svn: 124142
 2011-01-24 20:04:37 +00:00
Devang Patel
8cc5355c90 Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. 
llvm-svn: 124138
 2011-01-24 19:24:37 +00:00
Anton Korobeynikov
2f93128109 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 
llvm-svn: 123170
 2011-01-10 12:39:04 +00:00
Jakob Stoklund Olesen
2fb5b31578 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. 
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155
 2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
793d7b7626 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister. 
llvm-svn: 123096
 2011-01-08 23:10:50 +00:00
Evan Cheng
6eb516dbea Do not model all INLINEASM instructions as having unmodelled side effects. 
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044
 2011-01-07 23:50:32 +00:00
Bob Wilson
8265d56638 Add ARM patterns to match EXTRACT_SUBVECTOR nodes. 
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.

The test changes are needed to keep those spill-q tests from testing aligned
spills and restores.  If the only aligned stack objects are spill slots, we
no longer realign the stack frame.  Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.

llvm-svn: 122995
 2011-01-07 04:59:04 +00:00
Evan Cheng
ac730dd2d1 Avoid zero extend bit test operands to pointer type if all the masks fit in 
the original type of the switch statement key.
rdar://8781238

llvm-svn: 122935
 2011-01-06 01:02:44 +00:00
Chris Lattner
3e5fbd74ed rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for 
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310
 2010-12-21 02:38:05 +00:00
Chris Lattner
cb404360ca reduce indentation by using continue, no functionality change. 
llvm-svn: 121662
 2010-12-13 01:11:17 +00:00
Jay Foad
583abbc4df PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and 
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

llvm-svn: 121120
 2010-12-07 08:25:19 +00:00
Devang Patel
c24048a718 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 
llvm-svn: 121059
 2010-12-06 22:39:26 +00:00
Chris Lattner
ea41dfe385 add TLI support indicating that jumps are more expensive than logical operations 
and use this to disable a specific optimization.  Patch by Micah Villmow!

llvm-svn: 120435
 2010-11-30 18:12:52 +00:00
Wesley Peck
527da1b6e2 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
llvm-svn: 119990
 2010-11-23 03:31:01 +00:00
Benjamin Kramer
24656c9583 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. 
This currently only catches the most basic case, a two-case switch, but can be
extended later.

llvm-svn: 119964
 2010-11-22 09:45:38 +00:00
Andrew Trick
cf7fefb25c Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test. 
llvm-svn: 119898
 2010-11-20 07:26:51 +00:00
John Thompson
ddc7ce548c Bug 8621 fix - pointer cast stripped from inline asm constraint argument. 
llvm-svn: 119590
 2010-11-17 23:58:47 +00:00
Andrew Trick
6cbf6c1db5 typo (4th checkin for one fix) 
llvm-svn: 118913
 2010-11-12 18:36:03 +00:00
Andrew Trick
116efac780 Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents 
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.

llvm-svn: 118904
 2010-11-12 17:50:46 +00:00
Chris Lattner
64634c36dd tidy up. 
llvm-svn: 118896
 2010-11-12 17:24:29 +00:00
Dan Gohman
6cf9bb45ad Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this. 
llvm-svn: 118789
 2010-11-11 16:24:49 +00:00
Duncan Sands
f5dda01f33 Inside the calling convention logic LocVT is always a simple 
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167
 2010-11-03 11:35:31 +00:00
Devang Patel
bc741405a7 If value map does not have register for an argument then try to find frame index before giving up. 
llvm-svn: 118022
 2010-11-02 17:19:03 +00:00
Devang Patel
94f2a2578c Use frameindex, if available, as a last resort to emit debug info for a parameter. 
llvm-svn: 118020
 2010-11-02 17:01:30 +00:00
John Thompson
e8360b7182 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. 
llvm-svn: 117667
 2010-10-29 17:29:13 +00:00
Dale Johannesen
e660f4d072 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
 2010-10-26 23:11:10 +00:00
Devang Patel
05561e8b7b Assign source ordering to nodes created for StoreInst. 
llvm-svn: 117404
 2010-10-26 22:14:52 +00:00
Michael J. Spencer
0e36e0340a X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan! 
This is needed for indirect calls.

llvm-svn: 117061
 2010-10-21 20:49:23 +00:00
Michael J. Spencer
83ce5f181f CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args. 
This should be the minimum set of functions that could possibly need it.

llvm-svn: 116978
 2010-10-21 00:08:21 +00:00
Dan Gohman
a94cc6dfe8 Make CodeGen TBAA-aware. 
llvm-svn: 116890
 2010-10-20 00:31:05 +00:00
Jim Grosbach
bbdc5d2ef9 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any 
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

llvm-svn: 116879
 2010-10-19 23:27:08 +00:00
Michael J. Spencer
5e683250ee X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 
if any floating point arguments are passed to an external function.

llvm-svn: 116665
 2010-10-16 08:25:41 +00:00
Michael J. Spencer
d3ea25e66e Whitespace! 
llvm-svn: 116664
 2010-10-16 08:25:21 +00:00
Dan Gohman
aadc5596f1 ComputeLinearIndex doesn't need its TLI argument. 
llvm-svn: 115792
 2010-10-06 16:18:29 +00:00
Devang Patel
d3fe5fa5d1 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case. 
llvm-svn: 115323
 2010-10-01 19:00:44 +00:00
Gabor Greif
47a3b8c30b typo 
llvm-svn: 115310
 2010-10-01 10:32:19 +00:00
Chris Lattner
f08bfdc29f fix typo 
llvm-svn: 115300
 2010-10-01 06:54:02 +00:00
Dale Johannesen
dd224d2333 Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
 2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen
665aa6efcc When isel is emitting instructions for an x86 target without CMOV, the CFG is 
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

llvm-svn: 115191
 2010-09-30 19:44:31 +00:00
John Thompson
8118ef8d3d Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash. 
llvm-svn: 114767
 2010-09-24 22:24:05 +00:00
Michael J. Spencer
ded5f66813 Get rid of pop_macro warnings on MSVC. 
llvm-svn: 114750
 2010-09-24 19:48:47 +00:00
Evan Cheng
6b8b2b7312 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere. 
llvm-svn: 114681
 2010-09-23 18:32:19 +00:00
Evan Cheng
b6d175a39d Follow up to r114630. Do not optimize away unconditional branch following a conditional one. 
llvm-svn: 114634
 2010-09-23 07:18:35 +00:00
Evan Cheng
79687dda9a SDISel should not optimize a unconditional branch following a conditional branch 
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.

llvm-svn: 114630
 2010-09-23 06:51:55 +00:00
Chris Lattner
a4f199720d finish pushing MachinePointerInfo through selectiondags. At this point, 
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

llvm-svn: 114464
 2010-09-21 18:58:22 +00:00
Bob Wilson
5549d496dd Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load 
and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454
 2010-09-21 17:56:22 +00:00
Chris Lattner
1ffcf527c7 continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.

llvm-svn: 114443
 2010-09-21 16:36:31 +00:00
Chris Lattner
2510de2bea reimplement memcpy/memmove/memset lowering to use MachinePointerInfo 
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401
 2010-09-21 05:40:29 +00:00
Chris Lattner
d2d58ada70 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo 
llvm-svn: 114397
 2010-09-21 04:57:15 +00:00
Chris Lattner
15d84c460a chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo, 
eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396
 2010-09-21 04:53:42 +00:00
Devang Patel
46b96c4ba0 Check bb to ensure that alloca is in separate basic block. 
This fixes funcargs.exp regression reported by gdb testsuite.

llvm-svn: 113992
 2010-09-15 18:13:55 +00:00
Devang Patel
da25de8096 If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. 
llvm-svn: 113967
 2010-09-15 14:48:53 +00:00
John Thompson
1094c80281 Added skeleton for inline asm multiple alternative constraint support. 
llvm-svn: 113766
 2010-09-13 18:15:37 +00:00
Devang Patel
3bffd52d78 Detect undef value early and save unnecessary NodeMap query. 
llvm-svn: 112864
 2010-09-02 21:29:42 +00:00
Devang Patel
98d3edfe2a Tidy up. 
llvm-svn: 112858
 2010-09-02 21:02:27 +00:00
Devang Patel
86ec8b3a3f Reapply r112623. Included additional check for unused byval argument. 
llvm-svn: 112659
 2010-08-31 22:22:42 +00:00
Devang Patel
529f248eb4 Revert r112623. It is causing self host build failures. 
llvm-svn: 112631
 2010-08-31 19:41:03 +00:00
Devang Patel
8559932d36 Remember byval argument's frame index during argument lowering and use this info to emit debug info. 
Fixes Radar 8367011.

llvm-svn: 112623
 2010-08-31 18:50:09 +00:00
Devang Patel
417d72823a Offset is not always unsigned number. 
llvm-svn: 112584
 2010-08-31 06:12:08 +00:00
Chris Lattner
13ee795c42 remove unions from LLVM IR. They are severely buggy and not 
being actively maintained, improved, or extended.

llvm-svn: 112356
 2010-08-28 04:09:24 +00:00
Dan Gohman
e06905d1f0 Completely disable tail calls when fast-isel is enabled, as fast-isel 
doesn't currently support dealing with this.

llvm-svn: 112341
 2010-08-28 00:51:03 +00:00
Devang Patel
f2855b147f Simplify. 
llvm-svn: 112305
 2010-08-27 22:25:51 +00:00
Devang Patel
b12ff5999e Revert r112213. It is not needed. 
llvm-svn: 112242
 2010-08-26 23:35:15 +00:00
Devang Patel
ea134f56b1 If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter. 
llvm-svn: 112238
 2010-08-26 22:53:27 +00:00
Devang Patel
42b4ac7ed3 Speculatively revert r112207. 
llvm-svn: 112216
 2010-08-26 20:33:42 +00:00
Devang Patel
977057f481 80 col. 
llvm-svn: 112215
 2010-08-26 20:32:32 +00:00
Devang Patel
384fa91deb Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also. 
llvm-svn: 112213
 2010-08-26 20:06:46 +00:00