Commit Graph

5 Commits

Author SHA1 Message Date
Gericom
3da44a85b7 Many bug fixes and improvements
Fixed invalid mpy instruction being generated
Fixed byte order of 32 bit values when emitted to the elf file
Support for addv/subv to modify 16 bit registers directly
Support for move 8bit immediate
Support for tst0 instruction
Support for directly adding p0 to an ab register after mpy
Support for 8 bit immediate multiply
Support for modr instruction
Support for post increase/decrement for loads and stores
Use copy instruction for a to a register moves
2020-07-28 16:42:11 +02:00
Gericom
b14953d75a Added support for 32 bit writes, fixed load/store merge optimizations 2020-04-13 15:11:45 +02:00
Gericom
0ebd722eea Fixed signedness issue with 32 bit immediates, added support for relative branches 2020-03-29 23:36:59 +02:00
Gericom
cf55551a43 Fixes for 16 bit operations, added more opcodes, support for conditional instructions, more memory ops and short immediates 2020-03-21 22:10:21 +01:00
Gericom
08122b6717 Initial commit for Teak target 2020-03-04 10:30:50 +01:00