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f0683ca5ed
タッチパネルサンプリング周波数としてCODEC内部クロックを使っていたのをMCLKを使うように修正。 git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@316 4ee2a332-4b2b-5046-8439-1ba90f034370
876 lines
28 KiB
C
876 lines
28 KiB
C
/*---------------------------------------------------------------------------*
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Project: TwlSDK - libraties - CDC_
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File: CDC__api.c
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Copyright 2006 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Log: $
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$NoKeywords: $
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*---------------------------------------------------------------------------*/
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/*
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CODECのレジスタアクセスにはページ切り替えが存在します。
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Page0,1,3,4,8,9,252,255 が存在し、各ページに異なる機能の
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レジスタが列挙されています。
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"現在のページ"が、割り込みハンドラや別スレッドによって処理の
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途中で変更されてしまうと困ったことになります。
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【問題となる例】
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スレッドＡ
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（優先度低）
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┏━━━━━━┓ スレッドB
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┃ページ０へ ┃ （優先度高）
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┃ ┃→→→→┏━━━━━━┓
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┃ ┃←← ┃ページ１へ ┃
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┃Access ┃ ↑ ┃ ┃
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┃Page 0 ┃ ↑ ┃Access ┃
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┃Registers ┃ ↑ ┃Page 1 ┃
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┗━━━━━━┛ ↑ ┃Registers ┃
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←←┗━━━━━━┛
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そこで、Codecへのアクセスに関してMutexによる排他制御を行います。
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（短期間であれば割り込み禁止でもいいかも）
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【Mutexによる排他制御】
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スレッドＡ
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（優先度低）
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┏━━━━━━┓
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┃Mutex Lock ┃
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┃ ┃ スレッドB
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┃ページ０へ ┃ （優先度高）
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┃ ┃→→→→┏━━━━━━┓
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┃Access ┃←←←←┃Mutex Lock ┃
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┃Page 0 ┃ →→┃ ┃
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┃Registers ┃ ↑ ┃ページ１へ ┃
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┃ ┃ ↑ ┃ ┃
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┃Mutex Unlock┃→→ ┃Access ┃
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┗━━━━━━┛ ┃Page 1 ┃
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┃Registers ┃
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┗━━━━━━┛
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CodecへのアクセスにはSPI通信もしくはI2C通信を使用
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しますが、これらの関数においてもMutexによる排他制御
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が行われています。そのため、スレッドＡがCODEC用の
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Mutexを取得し、スレッドＢがSPI用のMutexを取得した
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場合に、いわゆるデッドロック状態となる場合があります。
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デッドロックを回避するセオリーは1つのスレッドにおいて
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複数のMutexを取得しないことですが、CODECに関してはそれが
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難しいため、Mutexを取得する順番を統一することでデッド
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ロックを回避します。
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【方針】
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① CODECへのアクセスに関してMutexによる排他制御を行う。
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I2C/SPI通信を行う場合、それらの関数内部でもMutexが使用
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されていることに注意する。デッドロックを回避するため、
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Mutexの取得順はCODECが先、I2C/SPIが後とする。
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② 割り込みハンドラ内では原則CODECアクセスは行わない。
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（割り込みハンドラ内ではMutex取得待ちの際にスレッド切り替え
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が発生しないためMutexを永久に取得できない可能性がある）
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割り込みハンドラではスレッドを作成もしくは起床させ、
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そのスレッドにおいてCODECアクセスを行う。
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*/
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#include <twl.h>
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#include <twl/cdc.h>
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#include <pm_pmic.h>
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u8 isADCOn = FALSE;
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u8 isDACOn = FALSE;
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u8 cdcIsTwlMode = TRUE;
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#define CDC_PLL_STABLE_WAIT_TIME 20 // 約20msのウェイトが必要
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#define CDC_SCAN_MODE_TIMER_CLOCK_DIVIDER_VALUE 24
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static void CDCi_PowerUpPLL( void );
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static void CDCi_PowerDownPLL( void );
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//================================================================================
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// INIT APIs
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//================================================================================
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/*---------------------------------------------------------------------------*
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Name: CDC_Init
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Description: initialize codec
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_Init( void )
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{
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reg_CFG_CLK |= REG_CFG_CLK_SND_MASK;
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CDC_InitMutex();
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CDC_Reset();
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CDC_SetPLL( CDC_PLL_PARAMETER_FOR_SAMPLING_RATE_47610 );
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CDC_SetScanModeTimerClockDivider( CDC_SCAN_MODE_TIMER_CLOCK_DIVIDER_VALUE );
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CDCi_PowerUpPLL();
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CDC_InitSound();
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_Reset
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Description: codec SW reset
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_Reset( void )
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{
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_RST_ADDR, CDC0_RST_E );
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OS_Sleep(1);
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CDC_SetInputPinControl( TRUE, TRUE, TRUE ); // enable VCNT5,SP#HP,PMOFF pin
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_InitSound
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Description: initialize output sound(speaker/headphone) logic
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_InitSound( void )
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{
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#if 1
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// Enable I2S
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reg_SND_I2SCNT |= REG_SND_I2SCNT_E_MASK;
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#endif
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// setup High Pass Filter of 9.26Hz cutoff freq.
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CDC_Init1stOrderFilter( cdc1stCoef_HPF_9_26Hz,
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CDC_FILTER_1ST_IIR_LDAC | CDC_FILTER_1ST_IIR_RDAC );
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// default, DACs are muted.
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// CDC_MuteDAC();
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// Setup DAC, Speaker Driver, Headphone Driver
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CDC_PowerUpDAC();
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/*
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CDC_SetupDAC( CDC_HP_DRV_PWON_TM_DEFAULT,
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CDC_HP_DRV_RAMPUP_TM_DEFAULT,
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CDC_HPSP_DRV_RAMPDWN_TM_DEFAULT );
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*/
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CDC_SetupDAC( CDC_HP_DRV_PWON_TM_DEFAULT,
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CDC_HP_DRV_RAMPUP_TM_DEFAULT,
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CDC_HPSP_DRV_RAMPDWN_TM_DEFAULT );
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CDC_EnableHeadphoneDriver(); // enable headphone driver
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CDC_EnableSpeakerDriver(); // enable speaker driver
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CDC_UnmuteDAC();
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_InitMic
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Description: initialize microphone logic
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_InitMic( void )
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{
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// setup Mic Bias
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CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_AVDD );
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#if 1 // このコードは本来、cdcInitSound呼び出しルーチンが記述すべきコード。
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// Enable I2S
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reg_SND_I2SCNT |= REG_SND_I2SCNT_E_MASK;
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#endif
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// setup High Pass Filter of 9.26Hz cutoff freq.
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CDC_Init1stOrderFilter( cdc1stCoef_HPF_9_26Hz, CDC_FILTER_1ST_IIR_ADC );
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// Setup ADC
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CDC_PowerUpADC();
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CDC_UnmuteADC();
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// AGC(Automatic Gain Control)で取得値を調整されると
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// ライブラリの正常動作を確認しにくいため暫定的にdisableにしています。
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// 最終的にAGCとPGAのどちらをデフォルトにするかは未定です。
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// ゲイン設定
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// CDC_EnableAGC( CDC0_AGC_CTL1_DEFAULT_GAIN );
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CDC_DisableAGC();
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CDC_SetPGAB( 40 );
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}
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//================================================================================
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// Query APIs
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//================================================================================
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/*---------------------------------------------------------------------------*
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Name: CDC_IsTwlMode
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Description: check CTR-mode (True) or DS-mode (False)
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Arguments: None
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Returns: TRUE : CTR-mode, FALSE : DS-mode
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*---------------------------------------------------------------------------*/
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BOOL CDC_IsTwlMode( void )
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{
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return cdcIsTwlMode;
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_GetVendorId
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Description: get Vendor ID
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Arguments: None
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Returns: u8 Vendor ID
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*---------------------------------------------------------------------------*/
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u8 CDC_GetVendorId( void )
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{
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return CDC_ReadSpiRegisterEx( 0, REG_CDC0_VEND_ID_ADDR );
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_GetRevisionId
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Description: get Revision ID
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Arguments: None
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Returns: u8 Revision ID (3-bit value)
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*---------------------------------------------------------------------------*/
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u8 CDC_GetRevisionId( void )
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{
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return (u8)(( CDC_ReadSpiRegisterEx( 0, REG_CDC0_REV_ID_ADDR ) & CDC0_REV_ID_MASK ) >> CDC0_REV_ID_SHIFT);
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}
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//================================================================================
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// State Transition APIs
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//================================================================================
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/*---------------------------------------------------------------------------*
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Name: CDC_GoDsMode
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Description: transit from CTR-mode to DS-mode
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(never come back to CTR-mode without HW Reset)
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_GoDsMode( void )
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{
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#ifdef CDC_REVISION_A
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// CODEC-IC bug workaround
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CDC_PowerUpADC();
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CDC_UnmuteADC();
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#endif // CDC_REVISION_A
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// デジタルボリューム設定 +7dB（従来の2.5倍音圧相当）
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_DIG_VOL_L_ADDR, 14 );
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_DIG_VOL_R_ADDR, 14 );
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// マイクバイアスを設定しておく必要がある。
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// DSモードに入ってからはこの設定を行う手段がない。
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CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_AVDD );
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// PGAインピーダンス 設定も同様（18.8k 設定でDSと同等のゲインが得られる）
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CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_PGA_P_ADDR, 1 << CDC1_MIC_PGA_P_I_SHIFT);
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CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_PGA_M_ADDR, 1 << CDC1_MIC_PGA_M_I_SHIFT);
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// PLL 設定を DS 用に変更
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_PLL_J_ADDR, 21 );
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_NDAC_DIV_ADDR, CDC0_NDAC_DIV_PWR | 7 );
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_NADC_DIV_ADDR, CDC0_NADC_DIV_PWR | 7 );
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// READREADY 端子属性を TSC2046-PENINTERRUPT に変更
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CDC_WriteSpiRegisterEx( 3, REG_CDC3_TP_CONV_MODE_ADDR, 0 );
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// enable DS-Mode (via reg5 : current page=255)
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//
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// DS-mode default
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// Master Sound Power OFF, MicBias OFF, MicPGA x40 times
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CDC_WriteSpiRegisterEx( 255, REG_CDC255_BKCMPT_MODE_ADDR, CDC255_BKCMPT_MODE_DS );
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//-------------------------------------------------------------------------
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// !! from now on, I2C cannot be used. Only DS-type PCSN,TCSN SPI can work.
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//-------------------------------------------------------------------------
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// enable Master Sound Power (via reg0 : current page=255)
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CDC_DsmodeSetSpiFlags( REG_CDC255_AUD_CTL_ADDR, CDC255_AUD_CTL_PWR );
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// MicBias powered up
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// In Rev-A, MicBias must be powered up before enabling Master Sound Power
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// CDC_DsmodeSetSpiFlags( REG_CDC255_DS_MIC_CTL_ADDR, CDC255_DS_MIC_CTL_BIAS_PWR );
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// change CODEC status variable
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cdcIsTwlMode = FALSE;
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_SetInputPinControl
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Description: set if input pin control enabled or not.
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Usually, PMOFF should not be disabled.
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Arguments: BOOL enable_vcnt5 : set TRUE to enable VCNT5(LCD backlight) pin
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BOOL enable_sphp : set TRUE to enable SP#HP switching pin
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BOOL enable_pmoff : set TRUE to enable PMOFF pin
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_SetInputPinControl( BOOL enable_vcnt5, BOOL enable_sphp, BOOL enable_pmoff )
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{
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u8 work = 0;
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if (enable_vcnt5) work = CDC0_PIN_CTL1_VCNT5_E;
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if (enable_sphp) work |= CDC0_PIN_CTL1_SPHP_E;
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_PIN_CTL1_ADDR, work );
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work = 0;
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if (enable_pmoff) work = CDC0_PIN_CTL2_PMOFF_E;
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_PIN_CTL2_ADDR, work );
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_GetInputPinControl
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Description: get if input pin control enabled or not.
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Arguments: BOOL *enable_vcnt5 : get TRUE if VCNT5(LCD backlight) pin is enabled
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BOOL *enable_sphp : get TRUE if SP#HP switching pin is enabled
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BOOL *enable_pmoff : get TRUE if PMOFF pin is enabled
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_GetInputPinControl( BOOL *enable_vcnt5, BOOL *enable_sphp, BOOL *enable_pmoff )
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{
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u8 work;
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*enable_vcnt5 = FALSE;
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*enable_sphp = FALSE;
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*enable_pmoff = FALSE;
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work = CDC_ReadSpiRegisterEx( 0, REG_CDC0_PIN_CTL1_ADDR );
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if ((work & CDC0_PIN_CTL1_VCNT5_MASK) == CDC0_PIN_CTL1_VCNT5_E)
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*enable_vcnt5 = TRUE;
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if ((work & CDC0_PIN_CTL1_SPHP_MASK) == CDC0_PIN_CTL1_SPHP_E)
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*enable_sphp = TRUE;
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work = CDC_ReadSpiRegisterEx( 0, REG_CDC0_PIN_CTL2_ADDR );
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if ((work & CDC0_PIN_CTL2_PMOFF_MASK) == CDC0_PIN_CTL2_PMOFF_E)
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*enable_pmoff = TRUE;
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}
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/*---------------------------------------------------------------------------*
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Name: CDCi_PowerUpPLL
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Description: power up Internal PLL of the CODEC
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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static void CDCi_PowerUpPLL( void )
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{
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// page 0, reg 5 で P=2,R=1,PLL on 設定
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CDC_WriteSpiRegisterEx( 0,
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REG_CDC0_PLL_P_R_ADDR,
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CDC0_PLL_P_R_PWR |
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(2 << CDC0_PLL_P_R_DIV_SHIFT) |
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(1 << CDC0_PLL_P_R_MUL_SHIFT) );
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}
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/*---------------------------------------------------------------------------*
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Name: CDCi_PowerDownPLL
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Description: power down Internal PLL of the CODEC
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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static void CDCi_PowerDownPLL( void )
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{
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// page 0, reg 5 で PLL off 設定
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CDC_WriteSpiRegisterEx( 0, REG_CDC0_PLL_P_R_ADDR, 0 );
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_SetPLL
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Description: setup PLL parameter of the CODEC
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Note: PLLを安全に変更するためにはAD/DAを停止させなければならない。
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Arguments: is48kHz : set 48 kHz if TRUE. set 32kHz if FALSE.
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Returns: None
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*---------------------------------------------------------------------------*/
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void
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CDC_SetPLL( CDCPllParameter param )
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{
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CDC_Lock();
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SPI_Lock(123);
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CDCi_ChangePage( 0 );
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switch ( param )
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{
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case CDC_PLL_PARAMETER_FOR_SAMPLING_RATE_32730:
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CDCi_WriteSpiRegister( REG_CDC0_PLL_J_ADDR, 21 );
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CDCi_WriteSpiRegister( REG_CDC0_NDAC_DIV_ADDR, CDC0_NDAC_DIV_PWR | 7 );
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CDCi_WriteSpiRegister( REG_CDC0_NADC_DIV_ADDR, CDC0_NADC_DIV_PWR | 7 );
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break;
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case CDC_PLL_PARAMETER_FOR_SAMPLING_RATE_47610:
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CDCi_WriteSpiRegister( REG_CDC0_PLL_J_ADDR, 15 );
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CDCi_WriteSpiRegister( REG_CDC0_NDAC_DIV_ADDR, CDC0_NDAC_DIV_PWR | 5 );
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CDCi_WriteSpiRegister( REG_CDC0_NADC_DIV_ADDR, CDC0_NADC_DIV_PWR | 5 );
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break;
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}
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SPI_Unlock(123);
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CDC_Unlock();
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}
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/*---------------------------------------------------------------------------*
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Name: CDC_PowerUpDAC
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Description: power up (both Left,Right channel of the) DAC of the CODEC
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void CDC_PowerUpDAC( void )
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{
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// page 0, reg 63 で Left/Right DAC On, datapath is straght-forward setting.
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CDC_WriteSpiRegisterEx( 0,
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REG_CDC0_DIG_PATH_ADDR,
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CDC0_DIG_PATH_CH_PWR_L | (1 << CDC0_DIG_PATH_L_SHIFT) |
|
||
CDC0_DIG_PATH_CH_PWR_R | (1 << CDC0_DIG_PATH_R_SHIFT) );
|
||
|
||
// PLL は ADC, DAC が起動したときに動き出すらしいので、ここに PLL 安定のためのウェイトが必要
|
||
if ((!isADCOn) && (!isDACOn))
|
||
OS_Sleep( CDC_PLL_STABLE_WAIT_TIME );
|
||
|
||
isDACOn = TRUE;
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_PowerDownDAC
|
||
|
||
Description: power down (both Left,Right channel of the) DAC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_PowerDownDAC( void )
|
||
{
|
||
// page 0, reg 63 で Left/Right DAC Off
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_DIG_PATH_ADDR, 0 );
|
||
isDACOn = FALSE;
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_SetupDAC
|
||
|
||
Description: setup DAC depop value of the CODEC
|
||
|
||
Arguments: int hp_pwon_tm : Headphone Power-on time
|
||
int hp_rmpup_tm : Headphone Ramp-up step time
|
||
int sphp_rmpdn_tm : Speaker/Headphonw Ramp-down step time
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_SetupDAC( int hp_pwon_tm, int hp_rmpup_tm, int sphp_rmpdn_tm )
|
||
{
|
||
CDC_Lock();
|
||
SPI_Lock(123);
|
||
|
||
// page 1, reg 33--35
|
||
CDCi_ChangePage( 1 );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_DRV_TM_ADDR, (u8)(hp_pwon_tm | hp_rmpup_tm) );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HPSP_RAMPDWN_ADDR, (u8)sphp_rmpdn_tm );
|
||
CDCi_WriteSpiRegister( REG_CDC1_DAC_OUTPUT_ADDR, CDC1_DAC_OUTPUT_E_R | CDC1_DAC_OUTPUT_E_L );
|
||
|
||
SPI_Unlock(123);
|
||
CDC_Unlock();
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_EnableHeadphoneDriver
|
||
|
||
Description: enable Headphone Driver (HP Driver On)
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_EnableHeadphoneDriver( void )
|
||
{
|
||
CDC_Lock();
|
||
SPI_Lock(123);
|
||
|
||
// page 1, reg 36--41
|
||
CDCi_ChangePage( 1 );
|
||
|
||
// Mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
|
||
// Power Up Headphone Driver, with short-circuit protection
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_DRV_ADDR, CDC1_HP_DRV_PWR_L | CDC1_HP_DRV_PWR_R |
|
||
CDC1_HP_CMN_MODE_VOL_1_65V | CDC1_HP_DRV_SHTC_PROTECT_E );
|
||
|
||
// Un-mute Headphone
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_DRV_L_ADDR, CDC1_HP_DRV_PDN_TRISTATE | CDC1_HP_DRV_MUTEN );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_DRV_R_ADDR, CDC1_HP_DRV_PDN_TRISTATE | CDC1_HP_DRV_MUTEN );
|
||
|
||
// Un-mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MAX );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MAX );
|
||
|
||
SPI_Unlock(123);
|
||
CDC_Unlock();
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_DisableHeadphoneDriver
|
||
|
||
Description: disable Headphone Driver (HP Driver Off)
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_DisableHeadphoneDriver( void )
|
||
{
|
||
CDC_Lock();
|
||
SPI_Lock(123);
|
||
|
||
// page 1, reg 36--37,31
|
||
CDCi_ChangePage( 1 );
|
||
|
||
// Mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
|
||
// Power Down Headphone Driver, with short-circuit protection
|
||
CDCi_WriteSpiRegister( REG_CDC1_HP_DRV_ADDR, CDC1_HP_DRV_SHTC_PROTECT_E );
|
||
|
||
SPI_Unlock(123);
|
||
CDC_Unlock();
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_EnableSpeakerDriver
|
||
|
||
Description: enable Speaker Driver (SP Driver On)
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_EnableSpeakerDriver( void )
|
||
{
|
||
CDC_Lock();
|
||
SPI_Lock(123);
|
||
|
||
// page 1, reg 38-39,32,42-43
|
||
CDCi_ChangePage( 1 );
|
||
|
||
// Mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
|
||
// Power Up Speaker Driver, with short-circuit protection
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_DRV_ADDR, CDC1_SP_DRV_PWR_L | CDC1_SP_DRV_PWR_R |
|
||
CDC1_SP_DRV_SHTC_PROTECT_E );
|
||
|
||
// Un-mute Speaker
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_DRV_L_ADDR, CDC1_SP_DRV_MUTEN | CDC1_SP_DRV_GAIN_0DB );
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_DRV_R_ADDR, CDC1_SP_DRV_MUTEN | CDC1_SP_DRV_GAIN_0DB );
|
||
|
||
// Un-mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MAX );
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MAX );
|
||
|
||
SPI_Unlock(123);
|
||
CDC_Unlock();
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_DisableSpeakerDriver
|
||
|
||
Description: disable Speaker Driver (SP Driver Off)
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_DisableSpeakerDriver( void )
|
||
{
|
||
CDC_Lock();
|
||
SPI_Lock(123);
|
||
|
||
// page 1, reg 38-39,32
|
||
CDCi_ChangePage( 1 );
|
||
|
||
// Mute Analog Volume
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_L_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_ANGVOL_R_ADDR, CDC1_ANGVOL_E | CDC1_ANGVOL_GAIN_MUTE );
|
||
|
||
// Power Down Speaker Driver, with short-circuit protection
|
||
CDCi_WriteSpiRegister( REG_CDC1_SP_DRV_ADDR, CDC1_SP_DRV_SHTC_PROTECT_E );
|
||
|
||
SPI_Unlock(123);
|
||
CDC_Unlock();
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_UnmuteDAC
|
||
|
||
Description: Un-mute DAC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_UnmuteDAC( void )
|
||
{
|
||
// page 0, reg 64 で Un-mute
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_DIG_VOL_M_ADDR, 0 );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_MuteDAC
|
||
|
||
Description: Mute DAC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_MuteDAC( void )
|
||
{
|
||
// page 0, reg 64 で Mute
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_DIG_VOL_M_ADDR, CDC0_DIG_VOL_M_MUTE_L | CDC0_DIG_VOL_M_MUTE_R );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_PowerUpADC
|
||
|
||
Description: power up ADC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_PowerUpADC( void )
|
||
{
|
||
// page 0, reg 81 で Power Up
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_ADC_PWR_STEP_ADDR, CDC0_ADC_PWR_STEP_PWRUP );
|
||
|
||
// PLL は ADC, DAC が起動したときに動き出すらしいので、ここに PLL 安定のためのウェイトが必要
|
||
if ((!isADCOn) && (!isDACOn))
|
||
OS_Sleep( CDC_PLL_STABLE_WAIT_TIME );
|
||
|
||
isADCOn = TRUE;
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_PowerDownADC
|
||
|
||
Description: power down ADC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_PowerDownADC( void )
|
||
{
|
||
// page 0, reg 81 で Power Down
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_ADC_PWR_STEP_ADDR, CDC0_ADC_PWR_STEP_PWRDN );
|
||
isADCOn = FALSE;
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_UnmuteADC
|
||
|
||
Description: Un-mute ADC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_UnmuteADC( void )
|
||
{
|
||
// page 0, reg 82 で Un-mute
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_ADC_MUTE_ADDR, CDC0_ADC_MUTE_D );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_MuteADC
|
||
|
||
Description: Mute ADC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_MuteADC( void )
|
||
{
|
||
// page 0, reg 82 で Mute
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_ADC_MUTE_ADDR, CDC0_ADC_MUTE_E );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_EnableAGC
|
||
|
||
Description: Enable AGC of the CODEC
|
||
|
||
Arguments: int target_gain : AGC Target Gain
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_EnableAGC( int target_gain )
|
||
{
|
||
// page 0, reg 86 で Enable
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_AGC_CTL1_ADDR, (u8)(CDC0_AGC_CTL1_E | target_gain) );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_DisableAGC
|
||
|
||
Description: Disable AGC of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_DisableAGC( void )
|
||
{
|
||
// page 0, reg 86 で Disable
|
||
CDC_WriteSpiRegisterEx( 0, REG_CDC0_AGC_CTL1_ADDR, CDC0_AGC_CTL1_D );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_SetPGAB
|
||
|
||
Description: Setup PGAB of the CODEC
|
||
PGAB is enabled when AGC is disabled.
|
||
|
||
Arguments: int target_gain : 0 ～ 119 (0dB ～ 59.5dB)
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_SetPGAB( u8 target_gain )
|
||
{
|
||
CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_ADC_PGA_ADDR, target_gain );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_GetPGAB
|
||
|
||
Description: Get PGA of the CODEC
|
||
|
||
Arguments: None
|
||
|
||
Returns: Gain
|
||
*---------------------------------------------------------------------------*/
|
||
u8 CDC_GetPGAB( void )
|
||
{
|
||
return CDC_ReadSpiRegisterEx( 1, REG_CDC1_MIC_ADC_PGA_ADDR );
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_Init1stOrderFilter
|
||
|
||
Description: initialize 1st order filter coeffient
|
||
|
||
Arguments: u8 *coef : 1st order coefficient (6 bytes)
|
||
int filter_target : target filter to be setup
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_Init1stOrderFilter( u8 *coef, int filter_target )
|
||
{
|
||
if (filter_target & CDC_FILTER_1ST_IIR_ADC)
|
||
{
|
||
CDC_WriteSpiRegistersEx( 4, REG_CDC4_ADC_C4_MSB_ADDR, coef, 6 );
|
||
}
|
||
if (filter_target & CDC_FILTER_1ST_IIR_LDAC)
|
||
{
|
||
CDC_WriteSpiRegistersEx( 9, REG_CDC9_DAC_C65_MSB_ADDR, coef, 6 );
|
||
}
|
||
if (filter_target & CDC_FILTER_1ST_IIR_RDAC)
|
||
{
|
||
CDC_WriteSpiRegistersEx( 9, REG_CDC9_DAC_C68_MSB_ADDR, coef, 6 );
|
||
}
|
||
}
|
||
|
||
/*---------------------------------------------------------------------------*
|
||
Name: CDC_SetScanModeTimerClockDivider
|
||
|
||
Description: スキャンモードのクロックディバイダーを設定します。
|
||
ARM7から供給されるMCLK（12.19MHz）はディバイダーの値に
|
||
よって分周されます。
|
||
|
||
結果として、ディバイダーの値に比例して
|
||
・インターバルタイマー
|
||
・デバウンスタイマー
|
||
の時間がスケールされます。
|
||
|
||
基本的には 24 固定とします。
|
||
|
||
MCLK = 12.19MHz
|
||
divider = 24
|
||
interval time = 16ms 2ms 4ms 6ms 8ms 10ms 12ms 14ms
|
||
de-bounce time = 0us 16us 32us 64us 128us 256us 512us 1024us
|
||
|
||
Arguments: value :
|
||
|
||
Returns: None
|
||
*---------------------------------------------------------------------------*/
|
||
void CDC_SetScanModeTimerClockDivider( u8 value )
|
||
{
|
||
SDK_ASSERT( value < 128);
|
||
CDC_SetSpiParamsEx( 3, REG_CDC3_TP_DELAY_CLK_ADDR, value, CDC3_TP_DELAY_CLK_DIV_MASK );
|
||
}
|
||
|