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606 lines
25 KiB
C
606 lines
25 KiB
C
/*---------------------------------------------------------------------------*
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Project: TwlSDK - MI - include
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File: exDma.h
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Copyright 2007 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Log: $
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$NoKeywords: $
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*---------------------------------------------------------------------------*/
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#ifndef TWL_MI_EXDMA_H_
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#define TWL_MI_EXDMA_H_
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#include <twl/misc.h>
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#include <twl/types.h>
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#include <twl/memorymap.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//----------------------------------------------------------------------
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//---- timing
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typedef enum
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{
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MI_EXDMA_TIMING_IMM = (0x10UL << REG_MI_DMA4CNT_TIMING_SHIFT), // start immediately
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MI_EXDMA_TIMING_TM0 = (0x0UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 0
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MI_EXDMA_TIMING_TM1 = (0x1UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 1
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MI_EXDMA_TIMING_TM2 = (0x2UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 2
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MI_EXDMA_TIMING_TM3 = (0x3UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 3
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MI_EXDMA_TIMING_CARD_A = (0x4UL << REG_MI_DMA4CNT_TIMING_SHIFT), // card A
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MI_EXDMA_TIMING_CARD_B = (0x5UL << REG_MI_DMA4CNT_TIMING_SHIFT), // card B
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MI_EXDMA_TIMING_V_BLANK = (0x6UL << REG_MI_DMA4CNT_TIMING_SHIFT), // VBlank
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#ifdef SDK_ARM9
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MI_EXDMA_TIMING_H_BLANK = (0x7UL << REG_MI_DMA4CNT_TIMING_SHIFT), // HBlank
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MI_EXDMA_TIMING_DISP = (0x8UL << REG_MI_DMA4CNT_TIMING_SHIFT), // display HSync
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MI_EXDMA_TIMING_DISP_MMEM = (0x9UL << REG_MI_DMA4CNT_TIMING_SHIFT), // main memory display sync
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MI_EXDMA_TIMING_GXFIFO = (0xAUL << REG_MI_DMA4CNT_TIMING_SHIFT), // geometry FIFO
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MI_EXDMA_TIMING_CAMERA = (0xBUL << REG_MI_DMA4CNT_TIMING_SHIFT) // camera
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#else // SDK_ARM7
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MI_EXDMA_TIMING_WIRELESS = (0x7UL << REG_MI_DMA4CNT_TIMING_SHIFT), // wireless DREQ
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MI_EXDMA_TIMING_SD = (0x8UL << REG_MI_DMA4CNT_TIMING_SHIFT), // Memory SD
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MI_EXDMA_TIMING_WSD = (0x9UL << REG_MI_DMA4CNT_TIMING_SHIFT), // New wireless SD
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MI_EXDMA_TIMING_AES_IN = (0xAUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES input
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MI_EXDMA_TIMING_AES_OUT = (0xBUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES output
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MI_EXDMA_TIMING_MIC = (0xCUL << REG_MI_DMA4CNT_TIMING_SHIFT) // MIC
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#endif // SDK_ARM7
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}
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MIExDmaTiming;
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//---- block size
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typedef enum
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{
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MI_EXDMA_BLOCK_4B = (0x0UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_8B = (0x1UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_16B = (0x2UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_32B = (0x3UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_64B = (0x4UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_128B = (0x5UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_256B = (0x6UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_512B = (0x7UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_1KB = (0x8UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_2KB = (0x9UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_4KB = (0xAUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_8KB = (0xBUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_16KB = (0xCUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_32KB = (0xDUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_64KB = (0xEUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
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MI_EXDMA_BLOCK_128KB = (0xFUL << REG_MI_DMA4CNT_BSIZE_SHIFT)
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}
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MIExDmaBlockSize;
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//---- pre-scaler
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typedef enum
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{
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MI_EXDMA_PRESCALER_1 = (0UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 1
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MI_EXDMA_PRESCALER_4 = (1UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 4
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MI_EXDMA_PRESCALER_16 = (2UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 16
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MI_EXDMA_PRESCALER_64 = (3UL << REG_MI_DMA4BCNT_PS_SHIFT) // x 64
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}
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MIExDmaPrescaler;
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//---- yield cycle
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typedef enum
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{
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MI_EXDMAGBL_YLD_CYCLE_0 = (0x0UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_1 = (0x1UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_2 = (0x2UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_4 = (0x3UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_8 = (0x4UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_16 = (0x5UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_32 = (0x6UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_64 = (0x7UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_128 = (0x8UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_256 = (0x9UL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_512 = (0xAUL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_1K = (0xBUL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_2K = (0xCUL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_4K = (0xDUL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_8K = (0xEUL << REG_MI_DMAGBL_YLD_SHIFT),
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MI_EXDMAGBL_YLD_CYCLE_16K = (0xFUL << REG_MI_DMAGBL_YLD_SHIFT),
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#ifdef SDK_ARM9
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// the cache line read from the main memory is 20 cycles and the DSP access is added.
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MI_EXDMAGBL_YLD_CYCLE_DEFAULT = MI_EXDMAGBL_YLD_CYCLE_32
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#else // SDK_ARM7
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MI_EXDMAGBL_YLD_CYCLE_DEFAULT = MI_EXDMAGBL_YLD_CYCLE_16
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#endif // SDK_ARM7
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}
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MIExDmaYieldCycles;
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//---- arbotration
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typedef u32 MIExDmaArbitration;
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#define MI_EXDMAGBL_ARB_PRIORITY (0UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by priority
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#define MI_EXDMAGBL_ARB_ROUND_ROBIN (1UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by round robin
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//---- registers
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typedef struct
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{
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const void * src;
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void * dest;
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u32 totalCount;
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u32 wordCount;
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u32 blockInterval;
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u32 fillData;
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u32 ctrl;
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}
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t_MIExDmaChanRegs;
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typedef volatile t_MIExDmaChanRegs MIExDmaChanRegs;
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//================================================================================
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// DMA control definition
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//================================================================================
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//---- DMA channel No.
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#define MI_EXDMA_CH_MIN 4
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#define MI_EXDMA_CH_MAX 7
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#define MI_EXDMA_CH_NUM 4
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//---- enable
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#define MI_EXDMA_ENABLE (1UL << REG_MI_DMA4CNT_E_SHIFT) // DMA enable
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#define MI_EXDMA_IF_ENABLE (1UL << REG_MI_DMA4CNT_I_SHIFT) // interrupt enable
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//---- continuous mode
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#define MI_EXDMA_CONTINUOUS_OFF (0UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode off
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#define MI_EXDMA_CONTINUOUS_ON (1UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode on
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//---- DMA timing
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#if 0
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# define MI_EXDMA_TIMING_MASK (REG_MI_DMA4CNT_TIMING_MASK) // mask of start field
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# define MI_EXDMA_TIMING_SHIFT (REG_MI_DMA4CNT_TIMING_SHIFT) // shift of start field
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# define MI_EXDMA_TIMING_IMM (0UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start immediately
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# define MI_EXDMA_TIMING_V_BLANK (1UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start by VBlank
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# define MI_EXDMA_TIMING_CARD (2UL << REG_MI_DMA4CNT_TIMING_SHIFT) // card
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# define MI_EXDMA_TIMING_WIRELESS (3UL << REG_MI_DMA4CNT_TIMING_SHIFT) // DMA4,2:wireless interrupt
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# define MI_EXDMA_TIMING_CARTRIDGE MI_DMA_TIMING_WIRELESS // DMA1,3:cartridge warning
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#endif
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//---- block size
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#define MI_EXDMA_BLOCK_SIZE_MASK (REG_MI_DMA4CNT_BSIZE_MASK) // mask of block size
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#define MI_EXDMA_BLOCK_SIZE_SHIFT (REG_MI_DMA4CNT_BSIZE_SHIFT) // shift of block size
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//---- direction of src/destination address
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#define MI_EXDMA_SRC_INC (0UL << REG_MI_DMA4CNT_SAR_SHIFT) // increment source address
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#define MI_EXDMA_SRC_DEC (1UL << REG_MI_DMA4CNT_SAR_SHIFT) // decrement source address
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#define MI_EXDMA_SRC_FIX (2UL << REG_MI_DMA4CNT_SAR_SHIFT) // fix source address
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#define MI_EXDMA_SRC_FILLREG (3UL << REG_MI_DMA4CNT_SAR_SHIFT) // source is fill data register
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#define MI_EXDMA_DEST_INC (0UL << REG_MI_DMA4CNT_DAR_SHIFT) // imcrement destination address
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#define MI_EXDMA_DEST_DEC (1UL << REG_MI_DMA4CNT_DAR_SHIFT) // decrement destination address
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#define MI_EXDMA_DEST_FIX (2UL << REG_MI_DMA4CNT_DAR_SHIFT) // fix destination address
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//---- reload of src/destination address
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#define MI_EXDMA_SRC_RLD_OFF (0UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload off
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#define MI_EXDMA_SRC_RLD_ON (1UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload on
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#define MI_EXDMA_DEST_RLD_OFF (0UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload off
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#define MI_EXDMA_DEST_RLD_ON (1UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload on
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//================================================================================
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// DMA block interval control definition
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//================================================================================
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//---- block interval
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#define MI_EXDMABCNT_INTERVAL_MASK (REG_MI_DMA4BCNT_BI_MASK) // mask of block interval
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#define MI_EXDMABCNT_INTERVAL_SHIFT (REG_MI_DMA4BCNT_BI_SHIFT) // shift of block interval
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//---- block interval pre-scaler
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#define MI_EXDMABCNT_PRESCALER_MASK (REG_MI_DMA4BCNT_PS_MASK) // mask of pre-scaler
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#define MI_EXDMABCNT_PRESCALER_SHIFT (REG_MI_DMA4BCNT_PS_SHIFT) // shift of pre-scaler
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//================================================================================
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// DMA WAIT
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//================================================================================
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/*---------------------------------------------------------------------------*
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Name: MIi_IsExDmaBusy
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Description: check whether extended DMA is busy or not
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Arguments: dmaNo : DMA channel No.
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Returns: TRUE if extended DMA is busy, FALSE if not
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*---------------------------------------------------------------------------*/
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BOOL MIi_IsExDmaBusy( u32 dmaNo );
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/*---------------------------------------------------------------------------*
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Name: MIi_WaitExDma
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Description: wait while extended DMA is busy
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Arguments: dmaNo : DMA channel No.
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_WaitExDma( u32 dmaNo );
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/*---------------------------------------------------------------------------*
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Name: MIi_StopExDma
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Description: stop extended DMA
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Arguments: dmaNo : DMA channel No.
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_StopExDma( u32 dmaNo );
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/*---------------------------------------------------------------------------*
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Name: MIi_StopDmaAsync
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Description: stop extended DMA
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async version
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Arguments: dmaNo : DMA channel No.
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_StopExDmaAsync( u32 dmaNo );
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//================================================================================
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// memory operation using DMA
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//================================================================================
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaFill
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Description: fill memory with specified data.
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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data : fill data
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaFill( u32 dmaNo, void *dest, u32 data, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaCopy
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Description: copy memory with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaCopy( u32 dmaNo, const void *src, void *dest, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaSend
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Description: send data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaSend( u32 dmaNo, const void *src, void *dest, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaRecv
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Description: receive data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaRecv( u32 dmaNo, const void *src, void *dest, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaFillAsync
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Description: fill memory with specified data.
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async version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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data : fill data
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaFillAsync( u32 dmaNo, void *dest, u32 data, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaCopyAsync
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Description: copy memory with DMA
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async version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaCopyAsync( u32 dmaNo, const void *src, void *dest, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaSendAsync
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Description: send data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaSendAsync( u32 dmaNo, const void *src, void *dest, u32 size );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaRecvAsync
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Description: receive data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaRecvAsync( u32 dmaNo, const void *src, void *dest, u32 size );
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//----------------- internel functions -------------------
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaFillCore
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Description: fill memory with specified data.
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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blockSize : block size
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaFillCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
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MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
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u32 continuous, u32 srcRld, u32 destRld,
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MIExDmaTiming timing );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaCopyCore
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Description: copy memory with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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blockSize : block size
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaCopyCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
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MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
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u32 continuous, u32 srcRld, u32 destRld,
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MIExDmaTiming timing );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaSendCore
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Description: send data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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blockSize : block size
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaSendCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
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MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
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u32 continuous, u32 srcRld, u32 destRld,
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MIExDmaTiming timing );
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaRecvCore
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Description: receive data with DMA
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sync version
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Arguments: dmaNo : DMA channel No.
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dest : destination address
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src : source address
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size : size (byte)
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blockSize : block size
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_ExDmaRecvCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
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MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
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u32 continuous, u32 srcRld, u32 destRld,
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MIExDmaTiming timing );
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|
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/*---------------------------------------------------------------------------*
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Name: MIi_ExDmaFillAsyncCore
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Description: fill memory with specified data.
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|
async version
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|
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Arguments: dmaNo : DMA channel No.
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|
dest : destination address
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src : source address
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size : size (byte)
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blockSize : block size
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|
Returns: None
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|
*---------------------------------------------------------------------------*/
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void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
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MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
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|
u32 continuous, u32 srcRld, u32 destRld,
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|
MIExDmaTiming timing );
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|
|
|
/*---------------------------------------------------------------------------*
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|
Name: MIi_ExDmaCopyAsyncCore
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|
|
|
Description: copy memory with DMA
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|
async version
|
|
|
|
Arguments: dmaNo : DMA channel No.
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|
dest : destination address
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|
src : source address
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|
size : size (byte)
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|
blockSize : block size
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
|
|
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
|
|
u32 continuous, u32 srcRld, u32 destRld,
|
|
MIExDmaTiming timing );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_ExDmaSendAsyncCore
|
|
|
|
Description: send data with DMA
|
|
async version
|
|
|
|
Arguments: dmaNo : DMA channel No.
|
|
dest : destination address
|
|
src : source address
|
|
size : size (byte)
|
|
blockSize : block size
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
|
|
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
|
|
u32 continuous, u32 srcRld, u32 destRld,
|
|
MIExDmaTiming timing );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_ExDmaRecvAsyncCore
|
|
|
|
Description: receive data with DMA
|
|
async version
|
|
|
|
Arguments: dmaNo : DMA channel No.
|
|
dest : destination address
|
|
src : source address
|
|
size : size (byte)
|
|
blockSize : block size
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
|
|
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
|
|
u32 continuous, u32 srcRld, u32 destRld,
|
|
MIExDmaTiming timing );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_ExDmaPipeAsyncCore
|
|
|
|
Description: pipe register to register with DMA
|
|
async version
|
|
|
|
Arguments: dmaNo : DMA channel No.
|
|
dest : destination address
|
|
src : source address
|
|
size : size (byte)
|
|
blockSize : block size
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_ExDmaPipeAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
|
|
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
|
|
u32 continuous, u32 srcRld, u32 destRld,
|
|
MIExDmaTiming timing );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_SetExDmaParams
|
|
|
|
Description: set DMA
|
|
|
|
Arguments: dmaNo : DMA channel No.
|
|
dest : destination address
|
|
src : source address
|
|
size : size (byte)
|
|
blockSize : block size
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
|
|
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
|
|
u32 continuous, u32 srcRld, u32 destRld,
|
|
MIExDmaTiming timing,
|
|
u32 fillData, u32 srcDir, u32 destDir);
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_SetExDmaInterval
|
|
|
|
Description: set DMA interval
|
|
|
|
Arguments: dmaNo : DMA channel No.
|
|
count : count
|
|
prescale : prescale
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_SetExDmaInterval( u32 dmaNo, u16 count, MIExDmaPrescaler prescale );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_SetExDmaArbitration
|
|
|
|
Description: set DMA arbitration
|
|
|
|
Arguments: arb : arbitration algorism
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_SetExDmaArbitration( MIExDmaArbitration arb );
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
Name: MIi_SetExDmaYieldCycles
|
|
|
|
Description: set DMA yield cycles
|
|
|
|
Arguments: yld : yield cycles for round robin
|
|
|
|
Returns: None
|
|
*---------------------------------------------------------------------------*/
|
|
void MIi_SetExDmaYieldCycles( MIExDmaYieldCycles yld );
|
|
|
|
|
|
#ifdef __cplusplus
|
|
} /* extern "C" */
|
|
|
|
#endif
|
|
|
|
/* TWL_MI_EXDMA_H_ */
|
|
#endif
|