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CODEC関連コードを更新。 git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@287 4ee2a332-4b2b-5046-8439-1ba90f034370
292 lines
9.3 KiB
C
292 lines
9.3 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrSDK - TP - include - tp
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File: cdc_reg.h
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Copyright 2006 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Log: $
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$NoKeywords: $
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*---------------------------------------------------------------------------*/
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#ifndef CTR_TP_TP_REG_H_
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#define CTR_TP_TP_REG_H_
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//#include <ctr/misc.h>
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//#include <ctr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//================================================================================
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// CODEC Page Register
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//================================================================================
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#define REG_TP_PAGE_CTL_ADDR 0
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#define REG_TP255_PAGE_CTL_ADDR 127
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//================================================================================
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// CODEC Version ..etc
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//================================================================================
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#define REG_TP0_VENDOR_ID_ADDR 2
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#define REG_TP0_REV_ID_ADDR 3
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#define TP0_REV_ID_MASK 0x70
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#define TP0_REV_ID_SHIFT 4
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//================================================================================
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// Resolution / ADC Power
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//================================================================================
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#define REG_TP_RESOLUTION 2
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typedef enum
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{
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TP_RESOLUTION_12 = 0x10,
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TP_RESOLUTION_8 = 0x48,
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TP_RESOLUTION_10 = 0x20
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} TpResolution_t;
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#define TP_RESOLUTION_MASK 0x78
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#define TP_ADC_PWR_MASK 0x80
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#define TP_ADC_PWRUP 0x00
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#define TP_ADC_PWRDN 0x80
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//================================================================================
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// Sampling Conversion Mode
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//================================================================================
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#define REG_TP_CONVERSION_MODE 3
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#define TP_CONVERSION_CONTROL_MASK 0x80
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#define TP_CONVERSION_MODE_MASK 0x3c
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#define TP_CONVERSION_PIN_MASK 0x03
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typedef enum
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{
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TP_CONVERSION_CONTROL_HOST = 0x00,
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TP_CONVERSION_CONTROL_SELF = 0x80
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} TpCnversionControl_t;
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typedef enum
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{
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TP_CONVERSION_MODE_NONE = 0x00,
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TP_CONVERSION_MODE_XY = 0x04, // Self, /READREADY = ReadReady
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TP_CONVERSION_MODE_XYZ = 0x08,
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TP_CONVERSION_MODE_X = 0x0c,
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TP_CONVERSION_MODE_Y = 0x10,
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TP_CONVERSION_MODE_Z = 0x14,
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TP_CONVERSION_MODE_AUX3 = 0x18,
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TP_CONVERSION_MODE_AUX2 = 0x1c,
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TP_CONVERSION_MODE_AUX1 = 0x20,
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TP_CONVERSION_MODE_AUTO_AUX = 0x24,
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TP_CONVERSION_MODE_AUX123 = 0x2c,
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TP_CONVERSION_MODE_XP_XM = 0x34,
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TP_CONVERSION_MODE_YP_YM = 0x38,
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TP_CONVERSION_MODE_YP_XM = 0x3c
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} TpConversionMode_t;
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typedef enum
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{
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TP_CONVERSION_PIN_INTERRUPT = 0x00,
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TP_CONVERSION_PIN_DATA_AVAILABLE = 0x01,
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TP_CONVERSION_PIN_INTERRUPT_DATA_AVAILABLE = 0x02,
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TP_CONVERSION_PIN_NBM = 0x03
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} TpCnversionPin_t;
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//================================================================================
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// Precharge / Sense / Stability time
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//================================================================================
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#define REG_TP_PRECHARGE 4
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typedef enum
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{
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TP_SETUP_TIME_0_1US = 0,
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TP_SETUP_TIME_1US,
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TP_SETUP_TIME_3US,
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TP_SETUP_TIME_10US,
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TP_SETUP_TIME_30US,
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TP_SETUP_TIME_100US,
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TP_SETUP_TIME_300US,
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TP_SETUP_TIME_1MS
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} TpSetupTime_t;
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#define TP_PRECHARGE_SHIFT 4
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#define TP_PRECHARGE_MASK 0x70
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#define REG_TP_SENSE_TIME 4
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#define TP_SENSE_TIME_SHIFT 0
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#define TP_SENSE_TIME_MASK 0x07
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#define REG_TP_STABILIZATION_TIME 5
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#define TP_STABILIZATION_TIME_SHIFT 0
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#define TP_STABILIZATION_TIME_MASK 0x07
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//================================================================================
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// IC Status
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//================================================================================
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/*
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#define REG_TP_STATUS1 9
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#define REG_TP_STATUS2 10
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#define REG_TP_STATUS3 14
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#define REG_TP_STATUS3_MASK 0x03
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typedef enum
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{
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// reg 9
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TP_CONVERTER_STATUS_TOUCH_DETECTED = 0x8000,
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TP_CONVERTER_STATUS_ADC_NOT_BUSY = 0x4000,
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TP_CONVERTER_STATUS_DATA_AVAILABLE = 0x2000,
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TP_CONVERTER_STATUS_X_AVAILABLE = 0x0800,
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TP_CONVERTER_STATUS_Y_AVAILABLE = 0x0400,
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// reg 10
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TP_CONVERTER_STATUS_AUX1_AVAILABLE = 0x0080,
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TP_CONVERTER_STATUS_AUX2_AVAILABLE = 0x0040,
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TP_CONVERTER_STATUS_AUX3_AVAILABLE = 0x0020,
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// reg14
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TP_CONVERTER_STATUS_TP_DATA_NOT_READY = 0x0002,
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TP_CONVERTER_STATUS_FIFO_FLUSH_DONE = 0x0001
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} tpConverterStatus_t;
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*/
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//================================================================================
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// New Buffer Mode
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//================================================================================
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#define REG_TP_NEW_BUFFER_MODE 14
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#define TP_NEW_BUFFER_MODE_E 0x80
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#define TP_NEW_BUFFER_MODE_D 0x00
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#define TP_NEW_BUFFER_MODE_MASK 0x80
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#define TP_NEW_BUFFER_CONVERSION_MODE_CONTINUOUS 0x00
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#define TP_NEW_BUFFER_CONVERSION_MODE_SINGLESHOT 0x40
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#define TP_NEW_BUFFER_CONVERSION_MODE_MASK 0x40
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#define TP_HOLDOFF_ENABLE 0x04
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#define TP_HOLDOFF_DISABLE 0x00
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#define TP_HOLDOFF_MASK 0x04
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#define REG_TP_DATA_DEPTH 14
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#define TP_DATA_DEPTH_SHIFT 3
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#define TP_DATA_DEPTH_MASK 0x38
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//================================================================================
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// Interval
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//================================================================================
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#define REG_TP_INTERVAL 15
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typedef enum
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{
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TP_INTERVAL_NONE = 0,
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TP_AUX_INTERVAL_1_12M = 0x08,
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TP_AUX_INTERVAL_3_36M,
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TP_AUX_INTERVAL_5_59M,
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TP_AUX_INTERVAL_7_83M,
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TP_AUX_INTERVAL_10_01M,
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TP_AUX_INTERVAL_12_30M,
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TP_AUX_INTERVAL_14_54M,
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TP_AUX_INTERVAL_16_78M,
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TP_INTERVAL_8MS = 0x80,
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TP_INTERVAL_1MS = 0x90,
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TP_INTERVAL_2MS = 0xa0,
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TP_INTERVAL_3MS = 0xb0,
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TP_INTERVAL_4MS = 0xc0,
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TP_INTERVAL_5MS = 0xd0,
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TP_INTERVAL_6MS = 0xe0,
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TP_INTERVAL_7MS = 0xf0
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} tpInterval_t;
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//================================================================================
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// Clock Source
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//================================================================================
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#define REG_TP_INTERVAL_TIMER_SOURCE 16
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#define TP_INTERVAL_TIMER_SOURCE_EXTERNAL 0x81
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#define TP_INTERVAL_TIMER_SOURCE_INTERNAL 0x00
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#define REG_TP_ADC_TIMER_SOURCE 17
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#define TP_ADC_TIMER_SOURCE_EXTERNAL 0x81
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#define TP_ADC_TIMER_SOURCE_INTERNAL 0x00
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//================================================================================
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// Debounce
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//================================================================================
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#define REG_TP_DEBOUNCE_TIME 18
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#define TP_DEBOUNCE_TIME_SHIFT 0
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#define TP_DEBOUNCE_TIME_MASK 0x07
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typedef enum
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{
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TP_DEBOUNCE_0US = 0,
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TP_DEBOUNCE_16US, // ADC Timer Source <20><> External <20>Ȃ<EFBFBD><C882>A8/12.19<EFBFBD>{<7B>̊<EFBFBD><CC8A>ԂɂȂ<C982>
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TP_DEBOUNCE_32US,
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TP_DEBOUNCE_64US,
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TP_DEBOUNCE_128US,
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TP_DEBOUNCE_256US,
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TP_DEBOUNCE_512US,
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TP_DEBOUNCE_1024US
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} tpDebounce_t;
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//================================================================================
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// AUX Channel
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//================================================================================
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#define REG_TP_ENABLED_AUX_CHANNEL 19
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#define TP_ENABLED_AUX_CHANNEL_SHIFT 5
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#define TP_ENABLED_AUX_CHANNEL_MASK 0xe0
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typedef enum
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{
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TP_ENABLED_AUX_CHANNEL_NONE = 0,
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TP_ENABLED_AUX_CHANNEL_IN3,
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TP_ENABLED_AUX_CHANNEL_IN2,
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TP_ENABLED_AUX_CHANNEL_IN2_IN3,
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TP_ENABLED_AUX_CHANNEL_IN1,
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TP_ENABLED_AUX_CHANNEL_IN1_IN3,
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TP_ENABLED_AUX_CHANNEL_IN1_IN2,
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TP_ENABLED_AUX_CHANNEL_IN1_IN2_IN3
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} tpEnabledAuxChannel_t;
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//================================================================================
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// Sampling Data Read
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//================================================================================
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#define REG_TP_SAMPLING_DATA_X 42
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#define REG_TP_SAMPLING_DATA_Y 44
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#define REG_TP_SAMPLING_DATA_IN1 54
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#define REG_TP_SAMPLING_DATA_IN2 56
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#define REG_TP_SAMPLING_DATA_IN3 58
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typedef enum
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{
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TP_SAMPLING_DATA_X = 42,
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TP_SAMPLING_DATA_Y = 44,
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TP_SAMPLING_DATA_IN1 = 54,
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TP_SAMPLING_DATA_IN2 = 56,
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TP_SAMPLING_DATA_IN3 = 58
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} tpSamplingDataChannel_t;
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#define REG_TP_BUFFER 1
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#define TP_READ_BUFFER_TIMEOUT 16
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//================================================================================
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// Sampling Data Format
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//================================================================================
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#define TP_NOT_TOUCH_MASK 0xf000
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* CTR_TP_TP_REG_H_ */
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#endif
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