;************************************************************************************** ; Copyright 2006 Micron Technology, Inc. All rights reserved. ; ; ; No permission to use, copy, modify, or distribute this software and/or ; its documentation for any purpose has been granted by Micron Technology, Inc. ; If any such permission has been granted ( by separate agreement ), it ; is required that the above copyright notice appear in all copies and ; that both that copyright notice and this permission notice appear in ; supporting documentation, and that the name of Micron Technology, Inc. or any ; of its trademarks may not be used in advertising or publicity pertaining ; to distribution of the software without specific, written prior permission. ; ; ; This software and any associated documentation are provided "AS IS" and ; without warranty of any kind. MICRON TECHNOLOGY, INC. EXPRESSLY DISCLAIMS ; ALL WARRANTIES EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO, NONINFRINGEMENT ; OF THIRD PARTY RIGHTS, AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS ; FOR A PARTICULAR PURPOSE. MICRON DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED ; IN THIS SOFTWARE WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS SOFTWARE ; WILL BE UNINTERRUPTED OR ERROR-FREE. FURTHERMORE, MICRON DOES NOT WARRANT OR ; MAKE ANY REPRESENTATIONS REGARDING THE USE OR THE RESULTS OF THE USE OF ANY ; ACCOMPANYING DOCUMENTATION IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY, ; OR OTHERWISE. ;**************************************************************************************/ ; ; Default INI file for the MI-0380-REV1 ; <<< MT9V113-MTM11.ini for MI-0380-REV2>>> ; $Revision: 1.3 $ ; $Date: 2007/04/22 07:13:21 $ ; ; This file holds groups of register presets (sections) specific for this sensor. The ; presets allow you to overwrite the power-on default settings with optimized register ; settings. ; The [Default Registers] section contains all optimized register settings for running ; the sensor in the demo environment. Other sections include settings optimized for a ; variety of situations like: Running at different master clock speeds, running under ; different lighting situations, running with different lenses, etc. ; Most of the demonstration software (DevWare, SensorDemo, ...) make use of this file ; to load and store the user presets. ; ; Keyname description: ; REG = assign a new register value ; BITFIELD = do a READ-MODIFY-WRITE to part of a register. The part is defined as a mask. ; LOAD = load an alternate section from this section ; STATE = set non-register state ; DELAY = delay a certain amount of milliseconds before continuing ; ; Keyname format: ; REG = [,]
, // ; BITFIELD = [,]
, , ; Some examples: ; BITFIELD=2, 0x05, 0x0020, 1 //for register 5 on page 2, set the 6th bit to 1 ; BITFIELD=0x06, 0x000F, 0 //for register 6, clear the first 4 bits ; LOAD =
; STATE = , ; DELAY = ; ; Optional address space for this register. Some sensors (mostly SOC's) ; have multiple register pages (see the sensor spec or developer's guide) ;
the register address ; the new value to assign to the register ; is the part of a register value that needs to be updated with a new value ;
the name of another section to load ; non-register program state names [do not modify] ; wait for this ammount of milliseconds before continuing ; Some form of C-style comments are supported in this .ini file ; ;*************************************************************************************/ [Default Registers] LOAD=Initialize Camera LOAD=Image Setting ExtClk=6.75MHz Op_Pix=27.5MHz 15fps //LOAD=Image Setting ExtClk=16.76MHz Op_Pix=27.5MHz 15fps //LOAD=Image Setting ExtClk=16.76MHz Op_Pix=8.38MHz LOAD=Lens Correction V2-95% LOAD=Auto Exposure LOAD=Auto White Balance LOAD=Gamma Correction LOAD= Mode : Landscape [Initialize Camera] REG = 0x001A, 0x0003// Activate Soft Reset & MIPI Reset DELAY = 1 // Wait 1ms for internal reset cycle (6000 EXTCLK cycles) using a 6.75Mhz clock this will be approx 0.88ms REG = 0x001A, 0x0000 // Deactivate both soft reset, MIPI reset DELAY = 1 REG = 0x0018, 0x4028 // Enable STANDBY mode, Bit(3) REG = 0x001A, 0x0200 // Enable parallel port:bit(9) & Output enable: Bit(8) REG = 0x001E, 0x0777 // Program to slowest SLEW rate REG = 0x0016, 0x42DF // Invert PIXCLK output to interface with Micron DEMO2 board // Enable EXTCLK bit9 [Start] REG=0x001A, 0x0200 // RESET_AND_MISC_CONTROL [Stop] REG=0x001A, 0x0000 // RESET_AND_MISC_CONTROL [ Mode : Landscape] LOAD=Digital Gain : Normal LOAD=AE target : 0 LOAD=Gamma Table : Normal Contrast LOAD=CCM : Normal LOAD= Sharpness : 0 LOAD=Refresh [ Mode : Landscape (Vivid)] LOAD=Digital Gain : Normal LOAD=AE target : 0 LOAD=Gamma Table : Normal Contrast LOAD=CCM : Vivid LOAD= Sharpness : 0 LOAD=Refresh [ Mode : Portrait] LOAD=Digital Gain : Normal LOAD=AE target : +2 LOAD=Gamma Table : Low Contrast LOAD=CCM : Skin LOAD= Sharpness : -2 LOAD=Refresh [ Mode : Night View] LOAD=Digital Gain : Max LOAD=AE target : 0 LOAD=Gamma Table : Normal Contrast LOAD=CCM : Normal LOAD= Sharpness : -1 LOAD=Refresh [ Mode : Letter] LOAD=Digital Gain : Normal LOAD=AE target : 0 LOAD=Gamma Table : High Contrast LOAD=CCM : Normal LOAD= Sharpness : +2 LOAD=Refresh [ Effect : Off] REG = 0x098C, 0x2759 //MODE_SPEC_EFFECTS_A REG = 0x0990, 0x6440 REG = 0x098C, 0x275B //MODE_SPEC_EFFECTS_B REG = 0x0990, 0x6440 LOAD= Mode : Landscape [ Effect : Mono] REG = 0x098C, 0x2759 //MODE_SPEC_EFFECTS_A REG = 0x0990, 0x6441 REG = 0x098C, 0x275B //MODE_SPEC_EFFECTS_B REG = 0x0990, 0x6441 LOAD=Refresh [ Effect : Sepia] LOAD = Gamma Table : Low Contrast LOAD = Sharpness : -1 REG = 0x098C, 0x2759 //MODE_SPEC_EFFECTS_A REG = 0x0990, 0x6442 REG = 0x098C, 0x275B //MODE_SPEC_EFFECTS_B REG = 0x0990, 0x6442 REG = 0x098C, 0x2763 //MODE_COMMONMODESETTINGS_FX_SEPIA_SETTINGS REG = 0x0990, 0xB01C LOAD=Refresh [ Image Size : VGA] REG = 0x098C, 0x2703 //MODE_OUTPUT_WIDTH_A REG = 0x0990, 0x0280 REG = 0x098C, 0x2705 //MODE_OUTPUT_HEIGHT_A REG = 0x0990, 0x01E0 LOAD=Refresh [ Image Size : QVGA] REG = 0x098C, 0x2703 //MODE_OUTPUT_WIDTH_A REG = 0x0990, 0x0140 REG = 0x098C, 0x2705 //MODE_OUTPUT_HEIGHT_A REG = 0x0990, 0x00F0 LOAD=Refresh [ Image Size : CIF] REG = 0x098C, 0x2703 //MODE_OUTPUT_WIDTH_A REG = 0x0990, 0x0160 REG = 0x098C, 0x2705 //MODE_OUTPUT_HEIGHT_A REG = 0x0990, 0x0120 LOAD=Refresh [ Image Size : QCIF] REG = 0x098C, 0x2703 //MODE_OUTPUT_WIDTH_A REG = 0x0990, 0x00B0 REG = 0x098C, 0x2705 //MODE_OUTPUT_HEIGHT_A REG = 0x0990, 0x0090 LOAD=Refresh [ Manual WB -> Auto WB] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0F [ Manual White Balance : P1] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x00 [ Manual White Balance : P2] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x0B [ Manual White Balance : P3] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x16 [ Manual White Balance : P4] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x21 [ Manual White Balance : P5] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x2C [ Manual White Balance : P6] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x37 [ Manual White Balance : P7] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x42 [ Manual White Balance : P8] REG = 0x098C, 0xA102 //SEQ_MODE REG = 0x0990, 0x0B REG = 0x098C, 0xA353 //AWB_CCM_POSITION REG = 0x0990, 0x4D [ Sharpness : +2] REG=0x326C, 0x2100 //APERTURE_PARAMETERS [ Sharpness : +1] REG=0x326C, 0x1900 //APERTURE_PARAMETERS [ Sharpness : 0] REG=0x326C, 0x1100 //APERTURE_PARAMETERS [ Sharpness : -1] REG=0x326C, 0x0900 //APERTURE_PARAMETERS [ Sharpness : -2] REG=0x326C, 0x0100 //APERTURE_PARAMETERS //////////////////////////////////////////////////////////////////////////////// ; This file was generated by: MT9V113 (SOC0380) Register Wizard ; Version: 2.8.0.53 Build Date: 06/06/2007 ; ; [PLL PARAMETERS] ; ; Bypass PLL: Unchecked ; Input Frequency: 6.750 ; Use Min Freq.: Unchecked ; Target System Frequency: 27.844 ; Target VCO Frequency: Unspecified ; "M" Value: Unspecified ; "N" Value: Unspecified ; ; Target PLL Frequency: 27.500 MHz ; MT9V113 Input Clock Frequency: 6.750 MHz ; MT9V113 Internal Clock Frequency: 27.844 MHz ; MT9V113 SOC Clock Frequency: 27.844 MHz ; M = 33 ; N = 0 ; Fpdf = 6.750 MHz ; Fvco = 445.500 MHz ; ; [CONTEXT A PARAMETERS] ; ; Requested Frames Per Second: 14.645 ; Output Columns: 640 ; Output Rows: 480 ; Allow Skipping: Unchecked ; Use Context B Line Time: Unchecked ; Low Power: Unchecked ; Blanking Computation: HB Min then VB ; ; Max Frame Time: 68.2827 msec ; Max Frame Clocks: 950623.0 clocks (13.922 MHz) ; Pixel Clock: divided by 1 ; Skip Mode: 1x cols, 1x rows, Bin Mode: No ; Horiz clks: 648 active + 194 blank = 842 total ; Vert rows: 488 active + 641 blank = 1129 total ; Extra Delay: 5 clocks ; ; Actual Frame Clocks: 950623 clocks ; Row Time: 60.480 usec / 842 clocks ; Frame time: 68.282685 msec ; Frames per Sec: 14.645 fps ; ; 50Hz Flicker Period: 165.34 lines ; 60Hz Flicker Period: 137.79 lines ; ; [CONTEXT B PARAMETERS] ; ; Requested Frames Per Second: 14.645 ; Output Columns: 640 ; Output Rows: 480 ; Allow Skipping: Unchecked ; Use Context A Line Time: Unchecked ; Low Power: Unchecked ; Blanking Computation: HB Min then VB ; ; Max Frame Time: 68.2827 msec ; Max Frame Clocks: 950623.0 clocks (13.922 MHz) ; Pixel Clock: divided by 1 ; Skip Mode: 1x cols, 1x rows, Bin Mode: No ; Horiz clks: 648 active + 194 blank = 842 total ; Vert rows: 488 active + 641 blank = 1129 total ; Extra Delay: 5 clocks ; ; Actual Frame Clocks: 950623 clocks ; Row Time: 60.480 usec / 842 clocks ; Frame time: 68.282685 msec ; Frames per Sec: 14.645 fps ; ; 50Hz Flicker Period: 165.34 lines ; 60Hz Flicker Period: 137.79 lines ; ; [Image Setting ExtClk=6.75MHz Op_Pix=27.5MHz 15fps] BITFIELD= 0x14, 1, 1 // Bypass PLL BITFIELD= 0X14, 2, 0 // Power-down PLL REG = 0x0010, 0x0021 //PLL Dividers = 0x21 REG = 0x0012, 0x0000 //PLL P Dividers = 0x0 REG = 0x0014, 0x244B //PLL control: TEST_BYPASS on = 0x244B DELAY = 1 // Allow PLL to lock REG = 0x0014, 0x304B //PLL control: PLL_ENABLE on = 0x304B POLL_REG=0x0014, 0x8000, ==0, DELAY=50, TIMEOUT=20 // Verify PLL lock BITFIELD= 0x14, 1, 0 //PLL_BYPASS_OFF REG = 0x98C, 0x2703 //Output Width (A) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2705 //Output Height (A) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x2707 //Output Width (B) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2709 //Output Height (B) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x270D //Row Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x270F //Column Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2711 //Row End (A) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2713 //Column End (A) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x2715 //Row Speed (A) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x2717 //Read Mode (A) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x2719 //sensor_fine_correction (A) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x271B //sensor_fine_IT_min (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271D //sensor_fine_IT_max_margin (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271F //Frame Lines (A) REG = 0x990, 0x0469 // = 1129 REG = 0x98C, 0x2721 //Line Length (A) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2723 //Row Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2725 //Column Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2727 //Row End (B) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2729 //Column End (B) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x272B //Row Speed (B) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x272D //Read Mode (B) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x272F //sensor_fine_correction (B) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x2731 //sensor_fine_IT_min (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2733 //sensor_fine_IT_max_margin (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2735 //Frame Lines (B) REG = 0x990, 0x0469 // = 1129 REG = 0x98C, 0x2737 //Line Length (B) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2739 //Crop_X0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273B //Crop_X1 (A) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x273D //Crop_Y0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273F //Crop_Y1 (A) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x2747 //Crop_X0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x2749 //Crop_X1 (B) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x274B //Crop_Y0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x274D //Crop_Y1 (B) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x222D //R9 Step REG = 0x990, 0x008A // = 138 REG = 0x98C, 0xA408 //search_f1_50 REG = 0x990, 0x19 // = 25 REG = 0x98C, 0xA409 //search_f2_50 REG = 0x990, 0x1C // = 28 REG = 0x98C, 0xA40A //search_f1_60 REG = 0x990, 0x1F // = 31 REG = 0x98C, 0xA40B //search_f2_60 REG = 0x990, 0x22 // = 34 REG = 0x98C, 0x2411 //R9_Step_60_A REG = 0x990, 0x008A // = 138 REG = 0x98C, 0x2413 //R9_Step_50_A REG = 0x990, 0x00A5 // = 165 REG = 0x98C, 0x2415 //R9_Step_60_B REG = 0x990, 0x008A // = 138 REG = 0x98C, 0x2417 //R9_Step_50_B REG = 0x990, 0x00A5 // = 165 REG = 0x98C, 0xA40D //Stat_min REG = 0x990, 0x02 // = 2 REG = 0x98C, 0xA410 //Min_amplitude REG = 0x990, 0x01 // = 1 //////////////////////////////////////////////////////////////////////////////// ; This file was generated by: MT9V113 (SOC0380) Register Wizard ; Version: 2.9.0.2 Build Date: 06/29/2007 ; ; [PLL PARAMETERS] ; ; Bypass PLL: Unchecked ; Input Frequency: 16.760 ; Use Min Freq.: Unchecked ; Target System Frequency: 27.759 ; Target VCO Frequency: Unspecified ; "M" Value: Unspecified ; "N" Value: Unspecified ; ; Target PLL Frequency: 27.500 MHz ; MT9V113 Input Clock Frequency: 16.760 MHz ; MT9V113 Internal Clock Frequency: 27.759 MHz ; MT9V113 SOC Clock Frequency: 27.759 MHz ; M = 53 ; N = 3 ; Fpdf = 4.190 MHz ; Fvco = 444.140 MHz ; ; [CONTEXT A PARAMETERS] ; ; Requested Frames Per Second: 15.000 ; Output Columns: 640 ; Output Rows: 480 ; Allow Skipping: Unchecked ; Use Context B Line Time: Unchecked ; Low Power: Unchecked ; Blanking Computation: HB Min then VB ; ; Max Frame Time: 66.6667 msec ; Max Frame Clocks: 925291.6 clocks (13.879 MHz) ; Pixel Clock: divided by 1 ; Skip Mode: 1x cols, 1x rows, Bin Mode: No ; Horiz clks: 648 active + 194 blank = 842 total ; Vert rows: 488 active + 610 blank = 1098 total ; Extra Delay: 775 clocks ; ; Actual Frame Clocks: 925291 clocks ; Row Time: 60.666 usec / 842 clocks ; Frame time: 66.666619 msec ; Frames per Sec: 15 fps ; ; 50Hz Flicker Period: 164.84 lines ; 60Hz Flicker Period: 137.37 lines ; ; [CONTEXT B PARAMETERS] ; ; Requested Frames Per Second: 15.000 ; Output Columns: 640 ; Output Rows: 480 ; Allow Skipping: Unchecked ; Use Context A Line Time: Unchecked ; Low Power: Unchecked ; Blanking Computation: HB Min then VB ; ; Max Frame Time: 66.6667 msec ; Max Frame Clocks: 925291.6 clocks (13.879 MHz) ; Pixel Clock: divided by 1 ; Skip Mode: 1x cols, 1x rows, Bin Mode: No ; Horiz clks: 648 active + 194 blank = 842 total ; Vert rows: 488 active + 610 blank = 1098 total ; Extra Delay: 775 clocks ; ; Actual Frame Clocks: 925291 clocks ; Row Time: 60.666 usec / 842 clocks ; Frame time: 66.666619 msec ; Frames per Sec: 15 fps ; ; 50Hz Flicker Period: 164.84 lines ; 60Hz Flicker Period: 137.37 lines ; ; [Image Setting ExtClk=16.76MHz Op_Pix=27.5MHz 15fps] BITFIELD= 0x14, 1, 1 // Bypass PLL BITFIELD= 0X14, 2, 0 // Power-down PLL REG = 0x0010, 0x0335 //PLL Dividers = 0x335 REG = 0x0012, 0x0000 //PLL P Dividers = 0x0 REG = 0x0014, 0x244B //PLL control: TEST_BYPASS on = 0x244B DELAY = 1 // Allow PLL to lock REG = 0x0014, 0x304B //PLL control: PLL_ENABLE on = 0x304B POLL_REG=0x0014, 0x8000, ==0, DELAY=50, TIMEOUT=20 // Verify PLL lock BITFIELD= 0x14, 1, 0 //PLL_BYPASS_OFF REG = 0x98C, 0x2703 //Output Width (A) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2705 //Output Height (A) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x2707 //Output Width (B) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2709 //Output Height (B) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x270D //Row Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x270F //Column Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2711 //Row End (A) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2713 //Column End (A) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x2715 //Row Speed (A) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x2717 //Read Mode (A) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x2719 //sensor_fine_correction (A) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x271B //sensor_fine_IT_min (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271D //sensor_fine_IT_max_margin (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271F //Frame Lines (A) REG = 0x990, 0x044A // = 1098 REG = 0x98C, 0x2721 //Line Length (A) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2723 //Row Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2725 //Column Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2727 //Row End (B) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2729 //Column End (B) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x272B //Row Speed (B) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x272D //Read Mode (B) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x272F //sensor_fine_correction (B) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x2731 //sensor_fine_IT_min (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2733 //sensor_fine_IT_max_margin (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2735 //Frame Lines (B) REG = 0x990, 0x044A // = 1098 REG = 0x98C, 0x2737 //Line Length (B) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2739 //Crop_X0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273B //Crop_X1 (A) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x273D //Crop_Y0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273F //Crop_Y1 (A) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x2747 //Crop_X0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x2749 //Crop_X1 (B) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x274B //Crop_Y0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x274D //Crop_Y1 (B) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x222D //R9 Step REG = 0x990, 0x0089 // = 137 REG = 0x98C, 0xA408 //search_f1_50 REG = 0x990, 0x19 // = 25 REG = 0x98C, 0xA409 //search_f2_50 REG = 0x990, 0x1C // = 28 REG = 0x98C, 0xA40A //search_f1_60 REG = 0x990, 0x1F // = 31 REG = 0x98C, 0xA40B //search_f2_60 REG = 0x990, 0x22 // = 34 REG = 0x98C, 0x2411 //R9_Step_60_A REG = 0x990, 0x0089 // = 137 REG = 0x98C, 0x2413 //R9_Step_50_A REG = 0x990, 0x00A5 // = 165 REG = 0x98C, 0x2415 //R9_Step_60_B REG = 0x990, 0x0089 // = 137 REG = 0x98C, 0x2417 //R9_Step_50_B REG = 0x990, 0x00A5 // = 165 REG = 0x98C, 0xA40D //Stat_min REG = 0x990, 0x02 // = 2 REG = 0x98C, 0xA410 //Min_amplitude REG = 0x990, 0x01 // = 1 //////////////////////////////////////////////////////////////////////////////// [Image Setting ExtClk=16.76MHz Op_Pix=8.38MHz] BITFIELD= 0x14, 1, 1 // Bypass PLL BITFIELD= 0X14, 2, 0 // Power-down PLL REG = 0x0010, 0x0518 // PLL DIVIDERS (N=5, M=24) REG = 0x0012, 0x0000 // PLL P3 DIVIDERS REG = 0x0014, 0x2147 // Enable PLL and start initialization [1] DELAY = 10 // Wait for 10us to get PLL lock REG = 0x0014, 0x2047 // Reset the PLL internal counter [8] DELAY = 10 // Wait for 10us REG = 0x0014, 0x2046 // Turn off PLL initialization process [0] DELAY = 10 // Wait for 10us REG = 0x0016, 0x42DF // Invert Pixclk output to interface with DEMO2 board [14] BITFIELD= 0x14, 1, 0 //PLL_BYPASS_OFF REG = 0x98C, 0x2703 //Output Width (A) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2705 //Output Height (A) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x2707 //Output Width (B) REG = 0x990, 0x0280 // = 640 REG = 0x98C, 0x2709 //Output Height (B) REG = 0x990, 0x01E0 // = 480 REG = 0x98C, 0x270D //Row Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x270F //Column Start (A) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2711 //Row End (A) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2713 //Column End (A) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x2715 //Row Speed (A) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x2717 //Read Mode (A) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x2719 //sensor_fine_correction (A) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x271B //sensor_fine_IT_min (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271D //sensor_fine_IT_max_margin (A) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x271F //Frame Lines (A) REG = 0x990, 0x02D2 // = 722 REG = 0x98C, 0x2721 //Line Length (A) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2723 //Row Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2725 //Column Start (B) REG = 0x990, 0x004 // = 4 REG = 0x98C, 0x2727 //Row End (B) REG = 0x990, 0x1EB // = 491 REG = 0x98C, 0x2729 //Column End (B) REG = 0x990, 0x28B // = 651 REG = 0x98C, 0x272B //Row Speed (B) REG = 0x990, 0x0001 // = 1 REG = 0x98C, 0x272D //Read Mode (B) REG = 0x990, 0x0026 // = 38 REG = 0x98C, 0x272F //sensor_fine_correction (B) REG = 0x990, 0x001A // = 26 REG = 0x98C, 0x2731 //sensor_fine_IT_min (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2733 //sensor_fine_IT_max_margin (B) REG = 0x990, 0x006B // = 107 REG = 0x98C, 0x2735 //Frame Lines (B) REG = 0x990, 0x02D2 // = 722 REG = 0x98C, 0x2737 //Line Length (B) REG = 0x990, 0x034A // = 842 REG = 0x98C, 0x2739 //Crop_X0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273B //Crop_X1 (A) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x273D //Crop_Y0 (A) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x273F //Crop_Y1 (A) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x2747 //Crop_X0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x2749 //Crop_X1 (B) REG = 0x990, 0x027F // = 639 REG = 0x98C, 0x274B //Crop_Y0 (B) REG = 0x990, 0x0000 // = 0 REG = 0x98C, 0x274D //Crop_Y1 (B) REG = 0x990, 0x01DF // = 479 REG = 0x98C, 0x222D //R9 Step REG = 0x990, 0x0058 // = 88 REG = 0x98C, 0xA408 //search_f1_50 REG = 0x990, 0x0F // = 15 REG = 0x98C, 0xA409 //search_f2_50 REG = 0x990, 0x12 // = 18 REG = 0x98C, 0xA40A //search_f1_60 REG = 0x990, 0x13 // = 19 REG = 0x98C, 0xA40B //search_f2_60 REG = 0x990, 0x16 // = 22 REG = 0x98C, 0x2411 //R9_Step_60_A REG = 0x990, 0x0058 // = 88 REG = 0x98C, 0x2413 //R9_Step_50_A REG = 0x990, 0x006A // = 106 REG = 0x98C, 0x2415 //R9_Step_60_B REG = 0x990, 0x0058 // = 88 REG = 0x98C, 0x2417 //R9_Step_50_B REG = 0x990, 0x006A // = 106 REG = 0x98C, 0xA40D //Stat_min REG = 0x990, 0x02 // = 2 REG = 0x98C, 0xA410 //Min_amplitude REG = 0x990, 0x01 // = 1 [Viewfinder ON] FIELD_WR = SEQ_CAP_MODE, VIDEO, 0 //capture parameters, VIDEO Off REG = 0x98C, 0xA103 //Go to Preview Mode REG = 0x990, 0x01 // = 1 [Viewfinder OFF] FIELD_WR = SEQ_CAP_MODE, VIDEO, 1 //capture parameters, VIDEO On REG = 0x98C, 0xA103 //Go to Capture Mode REG = 0x990, 0x02 // = 2 [Video Capture ON] FIELD_WR = SEQ_CAP_MODE, VIDEO, 1 //capture parameters, VIDEO On REG = 0x98C, 0xA103 //Go to Capture Mode REG = 0x990, 0x02 // = 2 [Video Capture OFF] REG = 0x98C, 0xA103 //Go to Preview Mode REG = 0x990, 0x01 // = 1 [Lens Calibration Setup] REG=0x3330, 0x0140 //(2) OUTPUT_FORMAT_TEST BITFIELD=0x3040, 0x002, 0 [Lens Calibration Exit] BITFIELD=0x3040, 0x002, 1 REG=0x3330, 0x0000 //(4) OUTPUT_FORMAT_TEST BITFIELD=0x3210, 0x08, 1 [Color Correction Setup] // All the delay is in ms and the time has not been verified. User can either reduce and omit // the delay depends on the system implementation. REG = 0x098C, 0xA115 // Set capture parameter mode REG = 0x0990, 0x02 REG = 0x098C, 0x272D // Vertical flip enabled REG = 0x0990, 0x0026 REG = 0x098C, 0xA103 // Refresh REG = 0x0990, 0x06 DELAY = 10 REG = 0x098C, 0xA103 // Capture mode REG = 0x0990, 0x02 REG = 0x098C, 0xA103 // Refresh REG = 0x0990, 0x05 DELAY = 10 REG = 0x098C, 0xAB04 // Turn off histogram stretch REG = 0x0990, 0x00 REG = 0x098C, 0xA355 // AWB mode: lock the gain to unity REG = 0x0990, 0x21 DELAY = 10 REG = 0x098C, 0xA102 // Turn off AWB REG = 0x0990, 0x00 DELAY = 10 BITFIELD = 0x3210, 0x00A0, 0 // Turn off gamma correction and color correction REG = 0x3028, 0x0008 // ANALOG_GAIN_CODE_GLOBAL [Fixed 15fps] REG = 0x098C, 0xA20C //(1) AE_MAX_INDEX REG = 0x0990, 0x08 REG = 0x098C, 0x271F //(1) MODE_SENSOR_FRAME_LENGTH_A REG = 0x0990, 0x076C [Refresh] REG = 0x98C, 0xA103 //Refresh Sequencer Mode REG = 0x990, 0x06 // = 6 POLL_FIELD=SEQ_CMD, !=0, DELAY=10, TIMEOUT=50 REG = 0x98C, 0xA103 //Refresh Sequencer REG = 0x990, 0x05 // = 5 POLL_FIELD=SEQ_CMD, !=0, DELAY=10, TIMEOUT=50 [Auto Exposure] REG = 0x098C, 0xA207 //(2) AE_GATE REG = 0x0990, 0x1A REG = 0x098C, 0xA24C //(1) AE_TARGETBUFFERSPEED REG = 0x0990, 0x10 REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x50 VAR8=1, 0x09, 0x1E //(2) SEQ_AE_FASTBUFF VAR8=1, 0x0A, 0x02 //(2) SEQ_AE_FASTSTEP [AE target : +2] REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x78 [AE target : +1] REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x69 [AE target : 0] REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x5A [AE target : -1] REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x4B [AE target : -2] REG = 0x098C, 0xA24F //(5) AE_BASETARGET REG = 0x0990, 0x3C [Auto White Balance] //VAR8=3, 0x4A, 0x70 //(1) AWB_GAIN_MIN //VAR8=3, 0x4B, 0x90 //(1) AWB_GAIN_MAX //VAR8=3, 0x4C, 0x70 //(1) AWB_GAINMIN_B //VAR8=3, 0x4D, 0x90 //(1) AWB_GAINMAX_B REG = 0x098C, 0xA35D //(1) AWB_STEADY_BGAIN_OUT_MIN REG = 0x0990, 0x73 REG = 0x098C, 0xA35E //(1) AWB_STEADY_BGAIN_OUT_MAX REG = 0x0990, 0x8D [CCM : Normal] VAR=3, 0x06, 0x0195 //AWB_CCM_L_0 VAR=3, 0x08, 0xFF46 //AWB_CCM_L_1 VAR=3, 0x0A, 0x001C //AWB_CCM_L_2 VAR=3, 0x0C, 0xFF06 //AWB_CCM_L_3 VAR=3, 0x0E, 0x031E //AWB_CCM_L_4 VAR=3, 0x10, 0xFF18 //AWB_CCM_L_5 VAR=3, 0x12, 0xFF29 //AWB_CCM_L_6 VAR=3, 0x14, 0xFD66 //AWB_CCM_L_7 VAR=3, 0x16, 0x03D8 //AWB_CCM_L_8 VAR=3, 0x18, 0x0026 //AWB_CCM_L_9 VAR=3, 0x1A, 0x0046 //AWB_CCM_L_10 VAR=3, 0x1C, 0x0049 //AWB_CCM_RL_0 VAR=3, 0x1E, 0x0055 //AWB_CCM_RL_1 VAR=3, 0x20, 0xFFA9 //AWB_CCM_RL_2 VAR=3, 0x22, 0x0046 //AWB_CCM_RL_3 VAR=3, 0x24, 0xFE83 //AWB_CCM_RL_4 VAR=3, 0x26, 0x0056 //AWB_CCM_RL_5 VAR=3, 0x28, 0x0061 //AWB_CCM_RL_6 VAR=3, 0x2A, 0x0150 //AWB_CCM_RL_7 VAR=3, 0x2C, 0xFEBF //AWB_CCM_RL_8 VAR=3, 0x2E, 0x000D //AWB_CCM_RL_9 VAR=3, 0x30, 0xFFE0 //AWB_CCM_RL_10 VAR8=11, 0x20, 0x43 //(1) HG_LL_SAT1 [CCM : Skin] VAR=3, 0x06, 0x0191 //AWB_CCM_L_0 VAR=3, 0x08, 0xFF67 //AWB_CCM_L_1 VAR=3, 0x0A, 0xFFE9 //AWB_CCM_L_2 VAR=3, 0x0C, 0xFF25 //AWB_CCM_L_3 VAR=3, 0x0E, 0x02FC //AWB_CCM_L_4 VAR=3, 0x10, 0xFF26 //AWB_CCM_L_5 VAR=3, 0x12, 0xFF44 //AWB_CCM_L_6 VAR=3, 0x14, 0xFD91 //AWB_CCM_L_7 VAR=3, 0x16, 0x03A6 //AWB_CCM_L_8 VAR=3, 0x18, 0x0026 //AWB_CCM_L_9 VAR=3, 0x1A, 0x0046 //AWB_CCM_L_10 VAR=3, 0x1C, 0x0038 //AWB_CCM_RL_0 VAR=3, 0x1E, 0x0041 //AWB_CCM_RL_1 VAR=3, 0x20, 0xFFE1 //AWB_CCM_RL_2 VAR=3, 0x22, 0x0035 //AWB_CCM_RL_3 VAR=3, 0x24, 0xFE97 //AWB_CCM_RL_4 VAR=3, 0x26, 0x0051 //AWB_CCM_RL_5 VAR=3, 0x28, 0x0050 //AWB_CCM_RL_6 VAR=3, 0x2A, 0x013E //AWB_CCM_RL_7 VAR=3, 0x2C, 0xFED0 //AWB_CCM_RL_8 VAR=3, 0x2E, 0x000D //AWB_CCM_RL_9 VAR=3, 0x30, 0xFFE0 //AWB_CCM_RL_10 VAR8=11, 0x20, 0x43 //(1) HG_LL_SAT1 [CCM : Vivid] VAR=3, 0x06, 0x01DE //AWB_CCM_L_0 VAR=3, 0x08, 0xFEFC //AWB_CCM_L_1 VAR=3, 0x0A, 0x001C //AWB_CCM_L_2 VAR=3, 0x0C, 0xFEBE //AWB_CCM_L_3 VAR=3, 0x0E, 0x03AE //AWB_CCM_L_4 VAR=3, 0x10, 0xFEDE //AWB_CCM_L_5 VAR=3, 0x12, 0xFEE8 //AWB_CCM_L_6 VAR=3, 0x14, 0xFCB1 //AWB_CCM_L_7 VAR=3, 0x16, 0x04AB //AWB_CCM_L_8 VAR=3, 0x18, 0x0026 //AWB_CCM_L_9 VAR=3, 0x1A, 0x0046 //AWB_CCM_L_10 VAR=3, 0x1C, 0x0029 //AWB_CCM_RL_0 VAR=3, 0x1E, 0x0086 //AWB_CCM_RL_1 VAR=3, 0x20, 0xFFA0 //AWB_CCM_RL_2 VAR=3, 0x22, 0x007A //AWB_CCM_RL_3 VAR=3, 0x24, 0xFDF5 //AWB_CCM_RL_4 VAR=3, 0x26, 0x0084 //AWB_CCM_RL_5 VAR=3, 0x28, 0x008D //AWB_CCM_RL_6 VAR=3, 0x2A, 0x01D3 //AWB_CCM_RL_7 VAR=3, 0x2C, 0xFE2D //AWB_CCM_RL_8 VAR=3, 0x2E, 0x000D //AWB_CCM_RL_9 VAR=3, 0x30, 0xFFE0 //AWB_CCM_RL_10 VAR8=11, 0x20, 0x52 //(1) HG_LL_SAT1 [Gamma Correction] REG = 0x098C, 0xAB04 //(1) HG_MAX_DLEVEL REG = 0x0990, 0x80 REG = 0x098C, 0xAB37 //(1) HG_GAMMA_MORPH_CTRL REG = 0x0990, 0x03 VAR=11, 0x28, 0x3606 //(1) HG_LL_BRIGHTNESSSTART VAR=11, 0x2A, 0xAC20 //(1) HG_LL_BRIGHTNESSSTOP VAR=11, 0x38, 0x10F4 //(1) HG_GAMMASTARTMORPH VAR=11, 0x3A, 0x20CC //(1) HG_GAMMASTOPMORPH [Gamma Table : Normal Contrast] VAR8=11, 0x3C, 0x00 //(4) HG_GAMMA_TABLE_A_0 VAR8=11, 0x3D, 0x02 //(4) HG_GAMMA_TABLE_A_1 VAR8=11, 0x3E, 0x08 //(4) HG_GAMMA_TABLE_A_2 VAR8=11, 0x3F, 0x1B //(4) HG_GAMMA_TABLE_A_3 VAR8=11, 0x40, 0x46 //(4) HG_GAMMA_TABLE_A_4 VAR8=11, 0x41, 0x64 //(4) HG_GAMMA_TABLE_A_5 VAR8=11, 0x42, 0x7C //(4) HG_GAMMA_TABLE_A_6 VAR8=11, 0x43, 0x90 //(4) HG_GAMMA_TABLE_A_7 VAR8=11, 0x44, 0xA1 //(4) HG_GAMMA_TABLE_A_8 VAR8=11, 0x45, 0xB0 //(4) HG_GAMMA_TABLE_A_9 VAR8=11, 0x46, 0xBC //(4) HG_GAMMA_TABLE_A_10 VAR8=11, 0x47, 0xC8 //(4) HG_GAMMA_TABLE_A_11 VAR8=11, 0x48, 0xD2 //(4) HG_GAMMA_TABLE_A_12 VAR8=11, 0x49, 0xDB //(4) HG_GAMMA_TABLE_A_13 VAR8=11, 0x4A, 0xE3 //(4) HG_GAMMA_TABLE_A_14 VAR8=11, 0x4B, 0xEB //(4) HG_GAMMA_TABLE_A_15 VAR8=11, 0x4C, 0xF2 //(4) HG_GAMMA_TABLE_A_16 VAR8=11, 0x4D, 0xF9 //(4) HG_GAMMA_TABLE_A_17 VAR8=11, 0x4E, 0xFF //(4) HG_GAMMA_TABLE_A_18 VAR8=11, 0x4F, 0x00 //(4) HG_GAMMA_TABLE_B_0 VAR8=11, 0x50, 0x06 //(4) HG_GAMMA_TABLE_B_1 VAR8=11, 0x51, 0x14 //(4) HG_GAMMA_TABLE_B_2 VAR8=11, 0x52, 0x3C //(4) HG_GAMMA_TABLE_B_3 VAR8=11, 0x53, 0x6A //(4) HG_GAMMA_TABLE_B_4 VAR8=11, 0x54, 0x86 //(4) HG_GAMMA_TABLE_B_5 VAR8=11, 0x55, 0x9A //(4) HG_GAMMA_TABLE_B_6 VAR8=11, 0x56, 0xAA //(4) HG_GAMMA_TABLE_B_7 VAR8=11, 0x57, 0xB7 //(4) HG_GAMMA_TABLE_B_8 VAR8=11, 0x58, 0xC3 //(4) HG_GAMMA_TABLE_B_9 VAR8=11, 0x59, 0xCC //(4) HG_GAMMA_TABLE_B_10 VAR8=11, 0x5A, 0xD5 //(4) HG_GAMMA_TABLE_B_11 VAR8=11, 0x5B, 0xDC //(4) HG_GAMMA_TABLE_B_12 VAR8=11, 0x5C, 0xE3 //(4) HG_GAMMA_TABLE_B_13 VAR8=11, 0x5D, 0xEA //(4) HG_GAMMA_TABLE_B_14 VAR8=11, 0x5E, 0xF0 //(4) HG_GAMMA_TABLE_B_15 VAR8=11, 0x5F, 0xF5 //(4) HG_GAMMA_TABLE_B_16 VAR8=11, 0x60, 0xFA //(4) HG_GAMMA_TABLE_B_17 VAR8=11, 0x61, 0xFF //(4) HG_GAMMA_TABLE_B_18 [Gamma Table : High Contrast] VAR8=11, 0x3C, 0x00 //(9) HG_GAMMA_TABLE_A_0 VAR8=11, 0x3D, 0x02 //(9) HG_GAMMA_TABLE_A_1 VAR8=11, 0x3E, 0x07 //(9) HG_GAMMA_TABLE_A_2 VAR8=11, 0x3F, 0x17 //(9) HG_GAMMA_TABLE_A_3 VAR8=11, 0x40, 0x40 //(9) HG_GAMMA_TABLE_A_4 VAR8=11, 0x41, 0x5F //(9) HG_GAMMA_TABLE_A_5 VAR8=11, 0x42, 0x7B //(9) HG_GAMMA_TABLE_A_6 VAR8=11, 0x43, 0x93 //(9) HG_GAMMA_TABLE_A_7 VAR8=11, 0x44, 0xA6 //(9) HG_GAMMA_TABLE_A_8 VAR8=11, 0x45, 0xB6 //(9) HG_GAMMA_TABLE_A_9 VAR8=11, 0x46, 0xC3 //(9) HG_GAMMA_TABLE_A_10 VAR8=11, 0x47, 0xCE //(9) HG_GAMMA_TABLE_A_11 VAR8=11, 0x48, 0xD7 //(9) HG_GAMMA_TABLE_A_12 VAR8=11, 0x49, 0xE0 //(9) HG_GAMMA_TABLE_A_13 VAR8=11, 0x4A, 0xE7 //(9) HG_GAMMA_TABLE_A_14 VAR8=11, 0x4B, 0xEE //(9) HG_GAMMA_TABLE_A_15 VAR8=11, 0x4C, 0xF4 //(9) HG_GAMMA_TABLE_A_16 VAR8=11, 0x4D, 0xFA //(9) HG_GAMMA_TABLE_A_17 VAR8=11, 0x4E, 0xFF //(9) HG_GAMMA_TABLE_A_18 VAR8=11, 0x4F, 0x00 //(39) HG_GAMMA_TABLE_B_0 VAR8=11, 0x50, 0x05 //(39) HG_GAMMA_TABLE_B_1 VAR8=11, 0x51, 0x11 //(39) HG_GAMMA_TABLE_B_2 VAR8=11, 0x52, 0x36 //(39) HG_GAMMA_TABLE_B_3 VAR8=11, 0x53, 0x66 //(39) HG_GAMMA_TABLE_B_4 VAR8=11, 0x54, 0x87 //(39) HG_GAMMA_TABLE_B_5 VAR8=11, 0x55, 0x9F //(39) HG_GAMMA_TABLE_B_6 VAR8=11, 0x56, 0xB0 //(39) HG_GAMMA_TABLE_B_7 VAR8=11, 0x57, 0xBE //(39) HG_GAMMA_TABLE_B_8 VAR8=11, 0x58, 0xC9 //(39) HG_GAMMA_TABLE_B_9 VAR8=11, 0x59, 0xD2 //(39) HG_GAMMA_TABLE_B_10 VAR8=11, 0x5A, 0xDA //(39) HG_GAMMA_TABLE_B_11 VAR8=11, 0x5B, 0xE1 //(39) HG_GAMMA_TABLE_B_12 VAR8=11, 0x5C, 0xE7 //(39) HG_GAMMA_TABLE_B_13 VAR8=11, 0x5D, 0xED //(39) HG_GAMMA_TABLE_B_14 VAR8=11, 0x5E, 0xF2 //(39) HG_GAMMA_TABLE_B_15 VAR8=11, 0x5F, 0xF7 //(39) HG_GAMMA_TABLE_B_16 VAR8=11, 0x60, 0xFB //(39) HG_GAMMA_TABLE_B_17 VAR8=11, 0x61, 0xFF //(39) HG_GAMMA_TABLE_B_18 [Gamma Table : Low Contrast] VAR8=11, 0x3C, 0x00 //(4) HG_GAMMA_TABLE_A_0 VAR8=11, 0x3D, 0x03 //(4) HG_GAMMA_TABLE_A_1 VAR8=11, 0x3E, 0x09 //(4) HG_GAMMA_TABLE_A_2 VAR8=11, 0x3F, 0x1E //(4) HG_GAMMA_TABLE_A_3 VAR8=11, 0x40, 0x4A //(4) HG_GAMMA_TABLE_A_4 VAR8=11, 0x41, 0x66 //(4) HG_GAMMA_TABLE_A_5 VAR8=11, 0x42, 0x7C //(4) HG_GAMMA_TABLE_A_6 VAR8=11, 0x43, 0x8F //(4) HG_GAMMA_TABLE_A_7 VAR8=11, 0x44, 0x9E //(4) HG_GAMMA_TABLE_A_8 VAR8=11, 0x45, 0xAC //(4) HG_GAMMA_TABLE_A_9 VAR8=11, 0x46, 0xB8 //(4) HG_GAMMA_TABLE_A_10 VAR8=11, 0x47, 0xC4 //(4) HG_GAMMA_TABLE_A_11 VAR8=11, 0x48, 0xCE //(4) HG_GAMMA_TABLE_A_12 VAR8=11, 0x49, 0xD7 //(4) HG_GAMMA_TABLE_A_13 VAR8=11, 0x4A, 0xE0 //(4) HG_GAMMA_TABLE_A_14 VAR8=11, 0x4B, 0xE9 //(4) HG_GAMMA_TABLE_A_15 VAR8=11, 0x4C, 0xF0 //(4) HG_GAMMA_TABLE_A_16 VAR8=11, 0x4D, 0xF8 //(4) HG_GAMMA_TABLE_A_17 VAR8=11, 0x4E, 0xFF //(4) HG_GAMMA_TABLE_A_18 VAR8=11, 0x4F, 0x00 //(3) HG_GAMMA_TABLE_B_0 VAR8=11, 0x50, 0x07 //(3) HG_GAMMA_TABLE_B_1 VAR8=11, 0x51, 0x17 //(3) HG_GAMMA_TABLE_B_2 VAR8=11, 0x52, 0x40 //(3) HG_GAMMA_TABLE_B_3 VAR8=11, 0x53, 0x6C //(3) HG_GAMMA_TABLE_B_4 VAR8=11, 0x54, 0x85 //(3) HG_GAMMA_TABLE_B_5 VAR8=11, 0x55, 0x98 //(3) HG_GAMMA_TABLE_B_6 VAR8=11, 0x56, 0xA7 //(3) HG_GAMMA_TABLE_B_7 VAR8=11, 0x57, 0xB3 //(3) HG_GAMMA_TABLE_B_8 VAR8=11, 0x58, 0xBE //(3) HG_GAMMA_TABLE_B_9 VAR8=11, 0x59, 0xC8 //(3) HG_GAMMA_TABLE_B_10 VAR8=11, 0x5A, 0xD1 //(3) HG_GAMMA_TABLE_B_11 VAR8=11, 0x5B, 0xD9 //(3) HG_GAMMA_TABLE_B_12 VAR8=11, 0x5C, 0xE0 //(3) HG_GAMMA_TABLE_B_13 VAR8=11, 0x5D, 0xE7 //(3) HG_GAMMA_TABLE_B_14 VAR8=11, 0x5E, 0xEE //(3) HG_GAMMA_TABLE_B_15 VAR8=11, 0x5F, 0xF4 //(3) HG_GAMMA_TABLE_B_16 VAR8=11, 0x60, 0xFA //(3) HG_GAMMA_TABLE_B_17 VAR8=11, 0x61, 0xFF //(3) HG_GAMMA_TABLE_B_18 [Lens Correction V2-95%] REG=0x3658, 0x00D0 //P_RD_P0Q0 REG=0x365A, 0x0A2D //P_RD_P0Q1 REG=0x365C, 0x0E13 //P_RD_P0Q2 REG=0x365E, 0x1152 //P_RD_P0Q3 REG=0x3660, 0x4F54 //P_RD_P0Q4 REG=0x3680, 0xD46D //P_RD_P1Q0 REG=0x3682, 0xF6CD //P_RD_P1Q1 REG=0x3684, 0x8651 //P_RD_P1Q2 REG=0x3686, 0x7E6B //P_RD_P1Q3 REG=0x3688, 0xB054 //P_RD_P1Q4 REG=0x36A8, 0x41F3 //P_RD_P2Q0 REG=0x36AA, 0x1A0E //P_RD_P2Q1 REG=0x36AC, 0x1856 //P_RD_P2Q2 REG=0x36AE, 0x04B6 //P_RD_P2Q3 REG=0x36B0, 0xB057 //P_RD_P2Q4 REG=0x36D0, 0xBB73 //P_RD_P3Q0 REG=0x36D2, 0x9813 //P_RD_P3Q1 REG=0x36D4, 0xCFB7 //P_RD_P3Q2 REG=0x36D6, 0x0157 //P_RD_P3Q3 REG=0x36D8, 0x3FBB //P_RD_P3Q4 REG=0x36F8, 0x2CD6 //P_RD_P4Q0 REG=0x36FA, 0x9194 //P_RD_P4Q1 REG=0x36FC, 0xBD1A //P_RD_P4Q2 REG=0x36FE, 0x765A //P_RD_P4Q3 REG=0x3700, 0x231E //P_RD_P4Q4 REG=0x364E, 0x0090 //P_GR_P0Q0 REG=0x3650, 0x374D //P_GR_P0Q1 REG=0x3652, 0x7FD2 //P_GR_P0Q2 REG=0x3654, 0x41B1 //P_GR_P0Q3 REG=0x3656, 0x26B3 //P_GR_P0Q4 REG=0x3676, 0xBE8E //P_GR_P1Q0 REG=0x3678, 0xCCEE //P_GR_P1Q1 REG=0x367A, 0xDBF1 //P_GR_P1Q2 REG=0x367C, 0x21B0 //P_GR_P1Q3 REG=0x367E, 0xF814 //P_GR_P1Q4 REG=0x369E, 0x3153 //P_GR_P2Q0 REG=0x36A0, 0x936F //P_GR_P2Q1 REG=0x36A2, 0x57F5 //P_GR_P2Q2 REG=0x36A4, 0x3CB6 //P_GR_P2Q3 REG=0x36A6, 0x9D58 //P_GR_P2Q4 REG=0x36C6, 0xC0D3 //P_GR_P3Q0 REG=0x36C8, 0xF0F1 //P_GR_P3Q1 REG=0x36CA, 0xC417 //P_GR_P3Q2 REG=0x36CC, 0x6F94 //P_GR_P3Q3 REG=0x36CE, 0x4C5B //P_GR_P3Q4 REG=0x36EE, 0x5F35 //P_GR_P4Q0 REG=0x36F0, 0x0D95 //P_GR_P4Q1 REG=0x36F2, 0xAA3A //P_GR_P4Q2 REG=0x36F4, 0x0E39 //P_GR_P4Q3 REG=0x36F6, 0x175E //P_GR_P4Q4 REG=0x3662, 0x0030 //P_BL_P0Q0 REG=0x3664, 0x5DED //P_BL_P0Q1 REG=0x3666, 0x7D72 //P_BL_P0Q2 REG=0x3668, 0x2FF1 //P_BL_P0Q3 REG=0x366A, 0x5A32 //P_BL_P0Q4 REG=0x368A, 0xAB6E //P_BL_P1Q0 REG=0x368C, 0xB66D //P_BL_P1Q1 REG=0x368E, 0x9332 //P_BL_P1Q2 REG=0x3690, 0x5CEE //P_BL_P1Q3 REG=0x3692, 0xF453 //P_BL_P1Q4 REG=0x36B2, 0x1153 //P_BL_P2Q0 REG=0x36B4, 0x2C0F //P_BL_P2Q1 REG=0x36B6, 0x0F55 //P_BL_P2Q2 REG=0x36B8, 0x3035 //P_BL_P2Q3 REG=0x36BA, 0x8EB8 //P_BL_P2Q4 REG=0x36DA, 0xD712 //P_BL_P3Q0 REG=0x36DC, 0xCC92 //P_BL_P3Q1 REG=0x36DE, 0xF8B6 //P_BL_P3Q2 REG=0x36E0, 0x14D7 //P_BL_P3Q3 REG=0x36E2, 0x1EBB //P_BL_P3Q4 REG=0x3702, 0x7C95 //P_BL_P4Q0 REG=0x3704, 0x89F4 //P_BL_P4Q1 REG=0x3706, 0xAD7A //P_BL_P4Q2 REG=0x3708, 0x35BA //P_BL_P4Q3 REG=0x370A, 0x1F9E //P_BL_P4Q4 REG=0x366C, 0x00F0 //P_GB_P0Q0 REG=0x366E, 0x0ECD //P_GB_P0Q1 REG=0x3670, 0x0293 //P_GB_P0Q2 REG=0x3672, 0x45B1 //P_GB_P0Q3 REG=0x3674, 0x1AD3 //P_GB_P0Q4 REG=0x3694, 0xA50E //P_GB_P1Q0 REG=0x3696, 0xC46E //P_GB_P1Q1 REG=0x3698, 0xD5D1 //P_GB_P1Q2 REG=0x369A, 0x7BAD //P_GB_P1Q3 REG=0x369C, 0xE5F4 //P_GB_P1Q4 REG=0x36BC, 0x2953 //P_GB_P2Q0 REG=0x36BE, 0x0DAF //P_GB_P2Q1 REG=0x36C0, 0x4F35 //P_GB_P2Q2 REG=0x36C2, 0x7155 //P_GB_P2Q3 REG=0x36C4, 0x9D38 //P_GB_P2Q4 REG=0x36E4, 0xB753 //P_GB_P3Q0 REG=0x36E6, 0xC332 //P_GB_P3Q1 REG=0x36E8, 0xB277 //P_GB_P3Q2 REG=0x36EA, 0x46F6 //P_GB_P3Q3 REG=0x36EC, 0x40BB //P_GB_P3Q4 REG=0x370C, 0x6C15 //P_GB_P4Q0 REG=0x370E, 0xABB3 //P_GB_P4Q1 REG=0x3710, 0xB1FA //P_GB_P4Q2 REG=0x3712, 0x2C3A //P_GB_P4Q3 REG=0x3714, 0x1F5E //P_GB_P4Q4 REG=0x3644, 0x0124 //POLY_ORIGIN_C REG=0x3642, 0x00FC //POLY_ORIGIN_R STATE=Lens Correction Falloff, 95 STATE=Lens Correction Center X, 292 STATE=Lens Correction Center Y, 252 BITFIELD=0x3210, 0x0008, 1 //PGA_ENABLE [Digital Gain : Normal] REG=0x3032, 0x0100 //(1) DIGITAL_GAIN_GREENR REG=0x3034, 0x0100 //(1) DIGITAL_GAIN_RED REG=0x3036, 0x0100 //(1) DIGITAL_GAIN_BLUE REG=0x3038, 0x0100 //(1) DIGITAL_GAIN_GREENB [Digital Gain : Max] REG=0x3032, 0x0400 //(1) DIGITAL_GAIN_GREENR REG=0x3034, 0x0400 //(1) DIGITAL_GAIN_RED REG=0x3036, 0x0400 //(1) DIGITAL_GAIN_BLUE REG=0x3038, 0x0400 //(1) DIGITAL_GAIN_GREENB