From e5c5313bd11db1ac4c21cda84e0d88af7cf1d5e0 Mon Sep 17 00:00:00 2001
From: kamikawa <kamikawa@4ee2a332-4b2b-5046-8439-1ba90f034370>
Date: Thu, 25 Oct 2007 02:07:29 +0000
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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@310 4ee2a332-4b2b-5046-8439-1ba90f034370
---
 build/libraries/cdc/ARM7/src/cdc_api.c | 6 +++---
 include/twl/cdc/ARM7/cdc_reg.h         | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/build/libraries/cdc/ARM7/src/cdc_api.c b/build/libraries/cdc/ARM7/src/cdc_api.c
index 8818d2c..765a1e5 100644
--- a/build/libraries/cdc/ARM7/src/cdc_api.c
+++ b/build/libraries/cdc/ARM7/src/cdc_api.c
@@ -181,7 +181,7 @@ void CDC_InitSound( void )
 */
 
     CDC_SetupDAC( CDC_HP_DRV_PWON_TM_DEFAULT,
-                 CDC_HP_DRV_RAMPUP_TM_0MS,
+                 CDC_HP_DRV_RAMPUP_TM_DEFAULT,
                  CDC_HPSP_DRV_RAMPDWN_TM_DEFAULT );
 
 
@@ -204,7 +204,7 @@ void CDC_InitSound( void )
 void CDC_InitMic( void )
 {
     // setup Mic Bias
-    CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_2_5V );
+    CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_AVDD );
 
 #if 1 // このコードは本来、cdcInitSound呼び出しルーチンが記述すべきコード。
     // Enable I2S
@@ -303,7 +303,7 @@ void CDC_GoDsMode( void )
 
     // マイクバイアスを設定しておく必要がある。
 	// DSモードに入ってからはこの設定を行う手段がない。
-    CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_2_5V );
+    CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_BIAS_ADDR, CDC1_MIC_BIAS_AVDD );
 
 	// PGAインピーダンス 設定も同様（18.8k 設定でDSと同等のゲインが得られる）
     CDC_WriteSpiRegisterEx( 1, REG_CDC1_MIC_PGA_P_ADDR,  1 << CDC1_MIC_PGA_P_I_SHIFT);
diff --git a/include/twl/cdc/ARM7/cdc_reg.h b/include/twl/cdc/ARM7/cdc_reg.h
index 6e5a280..8168008 100644
--- a/include/twl/cdc/ARM7/cdc_reg.h
+++ b/include/twl/cdc/ARM7/cdc_reg.h
@@ -649,14 +649,14 @@ CDCBackCompatibleMode;
 #define CDC_HP_DRV_PWON_TM_800MS    ( 9<<CDC1_HP_DRV_TM_PWON_SHIFT)
 #define CDC_HP_DRV_PWON_TM_2S       (10<<CDC1_HP_DRV_TM_PWON_SHIFT)
 #define CDC_HP_DRV_PWON_TM_4S       (11<<CDC1_HP_DRV_TM_PWON_SHIFT)
-#define CDC_HP_DRV_PWON_TM_DEFAULT  CDC_HP_DRV_PWON_TM_200MS
+#define CDC_HP_DRV_PWON_TM_DEFAULT  CDC_HP_DRV_PWON_TM_0US
 
 // ramp-up step time
 #define CDC_HP_DRV_RAMPUP_TM_0MS        ( 0<<CDC1_HP_DRV_TM_RAMPUP_SHIFT)
 #define CDC_HP_DRV_RAMPUP_TM_1MS        ( 1<<CDC1_HP_DRV_TM_RAMPUP_SHIFT)
 #define CDC_HP_DRV_RAMPUP_TM_2MS        ( 2<<CDC1_HP_DRV_TM_RAMPUP_SHIFT)
 #define CDC_HP_DRV_RAMPUP_TM_4MS        ( 3<<CDC1_HP_DRV_TM_RAMPUP_SHIFT)
-#define CDC_HP_DRV_RAMPUP_TM_DEFAULT    CDC_HP_DRV_RAMPUP_TM_4MS
+#define CDC_HP_DRV_RAMPUP_TM_DEFAULT    CDC_HP_DRV_RAMPUP_TM_0MS
 
 //---- CDC1_HPSP_RAMPDWN (reg34)
 #define CDC1_HPSP_RAMPDWN_TM_SHIFT  0