support real TWL-BB tentatively.

git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@33 4ee2a332-4b2b-5046-8439-1ba90f034370

build/buildsetup/ioreg_sp/io_register_list.csv

@@ -4,8 +4,8 @@
 0x4001,,A7ROM,8,rw,CFG,volatile,NTR,1,1,SEC,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
 0x4002,,DEVROM,8,rw,CFG,volatile,WE,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
 0x4004,,CLK,16,rw,CFG,volatile,SND,8,1,WRAM,7,1,AES,2,1,WSD,1,0,SD,0,1,,,,,,,,,,,,,,,,,,,,,,,,
-0x4006,,DSP_JTAG,8,rw,CFG,volatile,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
-0x4007,,CPU_JTAG,8,rw,CFG,volatile,E,1,1,A7,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
+0x4006,,CPU_JTAG,8,rw,CFG,volatile,E,1,1,A7,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
+0x4007,,DSP_JTAG,8,rw,CFG,volatile,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
 0x4008,,DS_MDFY,8,rw,CFG,volatile,MC,7,1,SND,2,1,SDMA,1,1,DMA,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,
 0x4009,,DS_EX,8,rw,CFG,volatile,MAIM_MEM,6,2,VRAM,5,1,LCDC,4,1,SIO,3,1,SDMA2,2,1,SPI,1,1,INTC,0,1,,,,,,,,,,,,,,,,,,
 0x400a,,TWL_EX,16,rw,CFG,volatile,CFG_E,15,1,WSD_PU,13,1,SD_PU,12,1,WRAM,9,0,MC_B,8,1,GPIO,7,1,I2C,6,1,I2S,5,1,MIC,4,1,WSD,3,1,SD,2,1,AES,1,1,DMA4,0,1

build/buildtools/modulerules.add-ins.twl

@@ -20,6 +20,7 @@ ifndef TWLSDK_MODULERULES_
 .PHONY: 	twllib
 
 twllib:
+	@$(MAKE) -C $(TWLSDK_ROOT)/build/buildsetup
 	@$(MAKE) -C $(TWLSDK_ROOT)/build/libraries
 
 # .axf

include/nitro/hw/ARM7/mmap_global.h

@@ -123,38 +123,10 @@ extern "C" {
 #define HW_REG_BASE             HW_IOREG        // alias
 
 //----------------------------- VRAMs
-#define HW_BG_PLTT              0x05000000
-#define HW_BG_PLTT_END          0x05000200
-#define HW_BG_PLTT_SIZE         (HW_BG_PLTT_END-HW_BG_PLTT)
-
-#define HW_OBJ_PLTT             0x05000200
-#define HW_OBJ_PLTT_END         0x05000400
-#define HW_OBJ_PLTT_SIZE        (HW_OBJ_PLTT_END-HW_OBJ_PLTT)
-
-#define HW_PLTT                 HW_BG_PLTT
-#define HW_PLTT_END             HW_OBJ_PLTT_END
-#define HW_PLTT_SIZE            (HW_PLTT_END-HW_PLTT)
-
 #define HW_EXT_WRAM             0x06000000
 #define HW_EXT_WRAM_END         0x06040000
 #define HW_EXT_WRAM_SIZE        (HW_EXT_WRAM_END-HW_EXT_WRAM)
 
-#define HW_BG_VRAM              0x06000000
-#define HW_BG_VRAM_END          0x06080000
-#define HW_BG_VRAM_SIZE         (HW_BG_VRAM_END-HW_BG_VRAM)
-
-#define HW_OBJ_VRAM             0x06400000
-#define HW_OBJ_VRAM_END         0x06440000
-#define HW_OBJ_VRAM_SIZE        (HW_OBJ_VRAM_END-HW_OBJ_VRAM)
-
-#define HW_LCDC_VRAM            0x06800000
-#define HW_LCDC_VRAM_END        0x06898000
-#define HW_LCDC_VRAM_SIZE       (HW_LCDC_VRAM_END-HW_LCDC_VRAM)
-
-#define HW_OAM                  0x07000000
-#define HW_OAM_END              0x07000400
-#define HW_OAM_SIZE             (HW_OAM_END-HW_OAM)
-
 //----------------------------- Cartridge Bus
 #define HW_CTRDG_ROM            0x08000000
 #define HW_CTRDG_ROM_END        0x0a000000
@@ -162,10 +134,10 @@ extern "C" {
 #define HW_CTRDG_RAM_END        0x0a010000
 
 //----------------------------- System ROM
-#define HW_BIOS                 0xffff0000
-#define HW_BIOS_END             0xffff8000
+#define HW_BIOS                 0x00000000
+#define HW_BIOS_END             0x00004000
 
-#define HW_RESET_VECTOR         0xffff0000
+#define HW_RESET_VECTOR         0x00000000
 
 #ifdef __cplusplus
 } /* extern "C" */

include/nitro/hw/ARM7/mmap_wram.h

@@ -81,12 +81,12 @@ extern "C" {
 #define HW_PRV_WRAM_SVC_STACK           (HW_PRV_WRAM_SVC_STACK_END - HW_SVC_STACK_SIZE)
 #define HW_PRV_WRAM_SVC_STACK_END       (HW_PRV_WRAM_SYSRV)
 
-//---- RED reserved
-#define HW_PRV_WRAM_RED_RESERVED        (HW_PRV_WRAM + 0xfc00)  // 64byte
-#define HW_PRV_WRAM_RED_RESERVED_END    (HW_PRV_WRAM + 0xfc40)
+//---- RED reserved for DS-IPL
+//#define HW_PRV_WRAM_RED_RESERVED        (HW_PRV_WRAM + 0xfc00)  // 64byte
+//#define HW_PRV_WRAM_RED_RESERVED_END    (HW_PRV_WRAM + 0xfc40)
 
-//---- offset in system reserved area
-#define HW_PRV_WRAM_SYSRV               (HW_PRV_WRAM + HW_PRV_WRAM_SIZE - HW_PRV_WRAM_SYSRV_SIZE)
+//---- offset in system reserved area (tentatively)
+#define HW_PRV_WRAM_SYSRV               (HW_WRAM_AREA_END - HW_PRV_WRAM_SYSRV_SIZE) // (HW_PRV_WRAM + HW_PRV_WRAM_SIZE - HW_PRV_WRAM_SYSRV_SIZE)
 #define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK2    0x00
 #define HW_PRV_WRAM_SYSRV_OFS_EXCP_STACK     0x10
 #define HW_PRV_WRAM_SYSRV_OFS_EXCP_STACK_END 0x1c

include/twl/mi/wram_abc.h

@@ -151,6 +151,25 @@ MIImageWramC;
 #define MI_WRAM_B_BLOCK_SIZE_MAX  (MI_WRAM_B_BLOCK_SIZE * MI_WRAM_B_BLOCK_NUM)
 #define MI_WRAM_C_BLOCK_SIZE_MAX  (MI_WRAM_C_BLOCK_SIZE * MI_WRAM_C_BLOCK_NUM)
 
+#define REG_WRAM_A_MAP_PACK( start, end, img_size )  REG_WRAM_MAP_PACK( A, (start), (end), (img_size) )
+#define REG_WRAM_B_MAP_PACK( start, end, img_size )  REG_WRAM_MAP_PACK( B, (start), (end), (img_size) )
+#define REG_WRAM_C_MAP_PACK( start, end, img_size )  REG_WRAM_MAP_PACK( C, (start), (end), (img_size) )
+#define REG_WRAM_MAP_PACK( abc, start, end, img_size ) \
+( \
+    (((((start) - HW_WRAM_AREA) / MI_WRAM_##abc##_BLOCK_SIZE) << REG_MI_WRAM_##abc##_MAP_START_SHIFT) & REG_MI_WRAM_##abc##_MAP_START_MASK) \
+  | (((((end)   - HW_WRAM_AREA) / MI_WRAM_##abc##_BLOCK_SIZE) << REG_MI_WRAM_##abc##_MAP_END_SHIFT)   & REG_MI_WRAM_##abc##_MAP_END_MASK) \
+  | (img_size) \
+)
+
+#define REG_WRAM_A_MAP_OFS_PACK( start_ofs, end_ofs )  REG_WRAM_MAP_OFS_PACK( A, (start_ofs), (end_ofs) )
+#define REG_WRAM_B_MAP_OFS_PACK( start_ofs, end_ofs )  REG_WRAM_MAP_OFS_PACK( B, (start_ofs), (end_ofs) )
+#define REG_WRAM_C_MAP_OFS_PACK( start_ofs, end_ofs )  REG_WRAM_MAP_OFS_PACK( C, (start_ofs), (end_ofs) )
+#define REG_WRAM_MAP_OFS_PACK( abc, start_ofs, end_ofs ) \
+( \
+    ((((start_ofs) / MI_WRAM_##abc##_BLOCK_SIZE) << REG_MI_WRAM_##abc##_MAP_START_SHIFT) & REG_MI_WRAM_##abc##_MAP_START_MASK) \
+  | ((((end_ofs)   / MI_WRAM_##abc##_BLOCK_SIZE) << REG_MI_WRAM_##abc##_MAP_END_SHIFT)   & REG_MI_WRAM_##abc##_MAP_END_MASK) \
+)
+
 
 #ifdef __cplusplus
 } /* extern "C" */

include/twl/specfiles/ARM7-BB.lcf.template

@@ -19,7 +19,7 @@ MEMORY
 	<FOREACH.AUTOLOADS>
 	<AUTOLOAD.NAME>         (RWX) : ORIGIN = <AUTOLOAD.ADDRESS>, LENGTH = 0x0 # >> <STATIC.NAME><PROPERTY.SUFFIX>
 	<END.AUTOLOADS>
-	binary.AUTOLOAD_INFO		(RWX) : ORIGIN = 0, LENGTH = 0x0 # >> <STATIC.NAME><PROPERTY.SUFFIX>
+	binary.AUTOLOAD_INFO		(RWX) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.SUFFIX>
 	
 	<PROPERTY.OVERLAYDEFS>	(RW)  : ORIGIN = AFTER(<STATIC.NAME>), LENGTH = 0x0 > <PROPERTY.OVERLAYDEFS><PROPERTY.SUFFIX>
 	<PROPERTY.OVERLAYTABLE>	(RW)  : ORIGIN = AFTER(<STATIC.NAME>), LENGTH = 0x0 > <PROPERTY.OVERLAYTABLE><PROPERTY.SUFFIX>

include/twl/specfiles/ARM9-BB.lcf.template

@@ -19,8 +19,8 @@ MEMORY
 	<FOREACH.AUTOLOADS>
 	<AUTOLOAD.NAME>		(RWX) : ORIGIN = <AUTOLOAD.ADDRESS>, LENGTH = 0x0 # >> <STATIC.NAME><PROPERTY.SUFFIX>
 	<END.AUTOLOADS>
-	binary.AUTOLOAD_INFO		(RWX) : ORIGIN = 0, LENGTH = 0x0 # >> <STATIC.NAME><PROPERTY.SUFFIX>
-	binary.STATIC_FOOTER		(RWX) : ORIGIN = 0, LENGTH = 0x0 # >> <STATIC.NAME><PROPERTY.SUFFIX>
+	binary.AUTOLOAD_INFO		(RWX) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.SUFFIX>
+	binary.STATIC_FOOTER		(RWX) : ORIGIN = 0, LENGTH = 0x0 >> <STATIC.NAME><PROPERTY.SUFFIX>
 	
 	<PROPERTY.OVERLAYDEFS>	(RW)  : ORIGIN = AFTER(<STATIC.NAME>), LENGTH = 0x0 > <PROPERTY.OVERLAYDEFS><PROPERTY.SUFFIX>
 	<PROPERTY.OVERLAYTABLE>	(RW)  : ORIGIN = AFTER(<STATIC.NAME>), LENGTH = 0x0 > <PROPERTY.OVERLAYTABLE><PROPERTY.SUFFIX>

tools/prom/readme.txt

@@ -0,0 +1,8 @@
+exoファイル書き込み手順
+1) Xilinx Platform Cable USB をブレッドボードのPROMコネクタへ接続。
+2) ブレッドボードの電源を入れ、ケーブルの LED が緑へ変化したのを確認。
+3) Xilinx iMPACT 起動。
+4) create a new project->Finish でプロジェクトファイル作成。
+5) PROMファイル選択、Select PROM->xc18v01_pc20 アサイン。
+6) Output->Cable Setup->TCK Speed を 1.5MHz 以下に設定。
+7) Program選択、PROM Specific Properties->Load FPGA チェッククリア、OK。