mirror of
https://github.com/rvtr/twl_wrapsdk.git
synced 2025-10-31 06:11:10 -04:00
update about dma.
git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@78 4ee2a332-4b2b-5046-8439-1ba90f034370
This commit is contained in:
nakasima
parent
d81a08a99b
commit
af7ab065d2
@ -9,11 +9,12 @@
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#twl p39,,,,,,,,,,,,,,,,,,,,,,,,
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0x4010,,MC_DET,8,rw,MI,volatile,MODE2,6,2,DET2,4,1,MODE1,2,2,DET1,0,1,,,,,,
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0x4011,,MC_SWP,8,rw,MI,volatile,SWP,7,1,,,,,,,,,,,,,,,
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0x4012,,MC_CHT,16,rw,MI,volatile,,,,,,,,,,,,,,,,,,
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0x4040,,WRAM_A0,8,rw,MI,volatile,E,7,1,OFS,2,2,MST,0,1,,,,,,,,,
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0x4041,,WRAM_A1,8,rw,MI,volatile,E,7,1,OFS,2,2,MST,0,1,,,,,,,,,
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0x4042,,WRAM_A2,8,rw,MI,volatile,E,7,1,OFS,2,2,MST,0,1,,,,,,,,,
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0x4043,,WRAM_A3,8,rw,MI,volatile,E,7,1,OFS,2,2,MST,0,1,,,,,,,,,
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0x4044,,WRAM_B0,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2,,,,,,,,,
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0x4044,,WRAM_B0,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4045,,WRAM_B1,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4046,,WRAM_B2,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4047,,WRAM_B3,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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@ -29,7 +30,7 @@
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0x4051,,WRAM_C5,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4052,,WRAM_C6,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4053,,WRAM_C7,8,rw,MI,volatile,E,7,1,OFS,2,3,MST,0,2
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0x4054,,WRAM_A_MAP,32,rw,MI,volatile,END,20,9,IMG,12,2,START,4,8
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0x4054,,WRAM_A_MAP,32,rw,MI,volatile,END,20,9,IMG,12,2,START,4,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x4058,,WRAM_B_MAP,32,rw,MI,volatile,END,19,10,IMG,12,2,START,3,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x405c,,WRAM_C_MAP,32,rw,MI,volatile,END,19,10,IMG,12,2,START,3,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x4060,,WRAM_A_LOCK,8,rw,MI,volatile,A3,3,1,A2,2,1,A1,1,1,A0,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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@ -45,7 +46,7 @@
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0x00a,,BG1CNT,16,rw,G2,volatile,SCREENSIZE,14,2,BGPLTTSLOT,13,1,SCREENBASE,8,5,COLORMODE,7,1,MOSAIC,6,1,CHARBASE,2,4,PRIORITY,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x00c,,BG2CNT,16,rw,G2,volatile,SCREENSIZE,14,2,AREAOVER,13,1,SCREENBASE,8,5,COLORMODE,7,1,MOSAIC,6,1,CHARBASE,2,4,PRIORITY,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x00e,,BG3CNT,16,rw,G2,volatile,SCREENSIZE,14,2,AREAOVER,13,1,SCREENBASE,8,5,COLORMODE,7,1,MOSAIC,6,1,CHARBASE,2,4,PRIORITY,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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# BGデータ参照開始点設定、参照方向設定 nitro p69～。 BG0OFSはp 175 でも登場,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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# BGデータ参照開始点設定、参照方向設定 nitro p69～。 BG0OFSはp 175 でも登場,,,,,,,,,,,,,,,
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0x010,,BG0OFS,32,w,G2,volatile,VOFFSET,16,9,HOFFSET,0,9,,,
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0x010,,BG0HOFS,16,w,G2,volatile,OFFSET,0,9,,,,,,
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0x012,,BG0VOFS,16,w,G2,volatile,OFFSET,0,9,,,,,,
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@ -77,7 +78,7 @@
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0x046,,WIN1V,16,w,G2,volatile,UPY,8,8,DOWNY,0,8,,,
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0x048,,WININ,16,rw,G2,volatile,WIN1IN,8,6,WIN0IN,0,6,,,
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0x04a,,WINOUT,16,rw,G2,volatile,OBJWININ,8,6,WINOUT,0,6,,,
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#モザイク nitro p99,,,,,,,,,,,,,,,
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#モザイク nitro p99,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x04c,,MOSAIC,16,w,G2,volatile,OBJVSIZE,12,4,OBJHSIZE,8,4,BGVSIZE,4,4,BGHSIZE,0,4,,,,,,,,,,,,,,,,,,,,,,,,
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#カラー特殊効果 nitro p97、 p177～p178,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x050,,BLDCNT,16,rw,G2,volatile,PLANE2,8,6,EFFECT,6,2,PLANE1,0,6,,,,,,,,,,,,,,,,,,,,,,,,,,,
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@ -93,7 +94,7 @@
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0x06a,,DISP_MMEM_FIFO_H,16,rw,GX,volatile,RED,0,5,GREEN,5,5,BLUE,10,5,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#マスター輝度 nitro p50,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x06c,,MASTER_BRIGHT,16,rw,GX,volatile,E_MOD,14,2,E_VALUE,0,5,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#ビデオ出力 nitro p51,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#ビデオ出力 nitro p51,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x070,,TVOUTCNT,16,w,GX,volatile,COMMAND3,8,4,COMMAND2,4,4,COMMAND,0,4,,,,,,,,,,,,,,,
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#DMA nitro p179,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0b0,,DMA0SAD,32,rw,MI,volatile,DMASRC,0,28,,,,,,,,,,,,,,,,,,,,,
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@ -109,7 +110,7 @@
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0x0d8,,DMA3DAD,32,rw,MI,volatile,DMADEST,0,28,,,,,,,,,,,,,,,,,,,,,
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0x0dc,,DMA3CNT,32,rw,MI,volatile,E,31,1,I,30,1,MODE,27,3,SB,26,1,CM,25,1,SAR,23,2,DAR,21,2,WORDCNT,0,21
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0x0e0,,DMA0_CLR_DATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,
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0x0e4,,DMA1_CLR_DATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,
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0x0e4,,DMA1_CLR_DATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0e8,,DMA2_CLR_DATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0ec,,DMA3_CLR_DATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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# twl p53 ～ p67,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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@ -141,39 +142,39 @@
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0x4164,,DMA7WCNT,32,rw,MI,volatile,W,0,24,,,,,,,,,,,,,,,,,,,,,,,,
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0x4168,,DMA7BCNT,32,rw,MI,volatile,PS,16,2,BI,0,16,,,,,,,,,,,,,,,,,,,,,
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0x416c,,DMA7FDATA,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x4170,,DMA7CNT,32,rw,MI,volatile,E,31,1,I,30,1,CM,29,1,TIMING,24,5,BSIZE,16,4,SRLD,15,1,SAR,13,2,DRLD,12,1,DAR,10,2
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#タイマ nitro p181,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x100,,TM0CNT_L,16,rw,OS,volatile,TIMER0CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x102,,TM0CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x104,,TM1CNT_L,16,rw,OS,volatile,TIMER1CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x106,,TM1CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,
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0x108,,TM2CNT_L,16,rw,OS,volatile,TIMER2CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x10a,,TM2CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,
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0x10c,,TM3CNT_L,16,rw,OS,volatile,TIMER2CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x10e,,TM3CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,
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#SIO nitro p14-1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x120,,SIODATA32,32,rw,EXI,volatile,H,16,16,L,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x128,,SIOCNT,16,rw,EXI,volatile,TSEND,3,1,TRECV,2,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x12c,,SIOSEL,16,rw,EXI,volatile,SEL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#キー nitro p182,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x130,,KEYINPUT,16,r,PAD,volatile,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1,,,,,,
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0x4170,,DMA7CNT,32,rw,MI,volatile,E,31,1,I,30,1,CM,29,1,TIMING,24,5,BSIZE,16,4,SRLD,15,1,SAR,13,2,DRLD,12,1,DAR,10,2,,,
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#タイマ nitro p181,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x100,,TM0CNT_L,16,rw,OS,volatile,TIMER0CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x102,,TM0CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,
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0x104,,TM1CNT_L,16,rw,OS,volatile,TIMER1CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x106,,TM1CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,
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0x108,,TM2CNT_L,16,rw,OS,volatile,TIMER2CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x10a,,TM2CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,
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0x10c,,TM3CNT_L,16,rw,OS,volatile,TIMER2CNT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x10e,,TM3CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,
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#SIO nitro p14-1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x120,,SIODATA32,32,rw,EXI,volatile,H,16,16,L,0,16,,,,,,,,,,,,,,,,,,,,,,,,
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0x128,,SIOCNT,16,rw,EXI,volatile,TSEND,3,1,TRECV,2,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x12c,,SIOSEL,16,rw,EXI,volatile,SEL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#キー nitro p182,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x130,,KEYINPUT,16,r,PAD,volatile,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1
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0x132,,KEYCNT,16,rw,PAD,volatile,LOGIC,15,1,INTR,14,1,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1
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#ARM7とのインタフェース nitro p187,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x180,,SUBPINTF,16,rw,PXI,volatile,I,14,1,IREQ,13,1,A9STATUS,8,4,A7STATUS,0,4,,,,,,,,,,,,,,,
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0x184,,SUBP_FIFO_CNT,16,rw,PXI,volatile,E,15,1,ERR,14,1,RECV_RI,10,1,RECV_FULL,9,1,RECV_EMP,8,1,SEND_CL,3,1,SEND_TI,2,1,SEND_FULL,1,1,SEND_EMP,0,1
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0x188,,SEND_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x100000,,RECV_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#メモリカード,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x1a0,,MCCNT0,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,
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0x1a2,,MCD0,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,
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0x100010,,MCD1,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x1a4,,MCCNT1,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,L2,16,6,L1,0,13
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0x1a8,,MCCMD0,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,
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0x1ac,,MCCMD1,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,
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#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x21a0,,MCCNT0_B,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,
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0x21a2,,MCD0_B,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,
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0x102010,,MCD1_B,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#ARM7とのインタフェース nitro p187,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x180,,SUBPINTF,16,rw,PXI,volatile,I,14,1,IREQ,13,1,A9STATUS,8,4,A7STATUS,0,4,,,,,,,,,,,,,,,,,,,,,,,,
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0x184,,SUBP_FIFO_CNT,16,rw,PXI,volatile,E,15,1,ERR,14,1,RECV_RI,10,1,RECV_FULL,9,1,RECV_EMP,8,1,SEND_CL,3,1,SEND_TI,2,1,SEND_FULL,1,1,SEND_EMP,0,1,,,,,,,,,
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0x188,,SEND_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x100000,,RECV_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#メモリカード,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x1a0,,MCCNT0,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,
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0x1a2,,MCD0,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x100010,,MCD1,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x1a4,,MCCNT1,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,L2,16,6,L1,0,13,,,,,,,,,
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0x1a8,,MCCMD0,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,,,,,,,,,,
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0x1ac,,MCCMD1,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,,,,,,,,,,
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#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x21a0,,MCCNT0_B,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,
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0x21a2,,MCD0_B,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x102010,,MCD1_B,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x21a4,,MCCNT1_B,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,L2,16,6,L1,0,13,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x21a8,,MCCMD0_B,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x21ac,,MCCMD1_B,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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@ -189,7 +190,7 @@
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0x241,,VRAMCNT_B,8,w,GX,volatile,E,7,1,OFS,3,2,MST,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x242,,VRAMCNT_C,8,w,GX,volatile,E,7,1,OFS,3,2,MST,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x243,,VRAMCNT_D,8,w,GX,volatile,E,7,1,OFS,3,2,MST,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x244,,WVRAMCNT,32,w,GX,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x244,,WVRAMCNT,32,w,GX,volatile,,,,,,,,,
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0x244,,VRAMCNT_E,8,w,GX,volatile,E,7,1,MST,0,3,,,
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0x245,,VRAMCNT_F,8,w,GX,volatile,E,7,1,OFS,3,2,MST,0,3
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0x246,,VRAMCNT_G,8,w,GX,volatile,E,7,1,OFS,3,2,MST,0,3
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@ -205,38 +206,38 @@
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0x294,,DIV_NUMER_H,32,rw,CP,volatile,,,,,,,,,
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0x298,,DIV_DENOM,64,rw,CP,volatile,,,,,,,,,
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0x298,,DIV_DENOM_L,32,rw,CP,volatile,,,,,,,,,
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0x29c,,DIV_DENOM_H,32,rw,CP,volatile,,,,,,,,,
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0x2a0,,DIV_RESULT,64,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2a0,,DIV_RESULT_L,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2a4,,DIV_RESULT_H,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2a8,,DIVREM_RESULT,64,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2a8,,DIVREM_RESULT_L,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2ac,,DIVREM_RESULT_H,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
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0x2b0,,SQRTCNT,16,rw,CP,volatile,BUSY,15,1,MODE,0,1,,,,,,,,,,,,,,,
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0x2b4,,SQRT_RESULT,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
|
||||
#以下のSQRT_PARAM は、64ビットアクセスのほかに _H と _L を作りました。,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x2b8,,SQRT_PARAM,64,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
|
||||
0x2b8,,SQRT_PARAM_L,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
|
||||
0x2bc,,SQRT_PARAM_H,32,rw,CP,volatile,,,,,,,,,,,,,,,,,,,,,
|
||||
#PAUSE page 19-43,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x300,,PAUSE,16,rw,OS,volatile,MOD,14,2,CHK,0,1,,,,,,,,,,,,,,,
|
||||
#パワーコントロール nitro p35,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x29c,,DIV_DENOM_H,32,rw,CP,volatile,,,,,,
|
||||
0x2a0,,DIV_RESULT,64,rw,CP,volatile,,,,,,
|
||||
0x2a0,,DIV_RESULT_L,32,rw,CP,volatile,,,,,,
|
||||
0x2a4,,DIV_RESULT_H,32,rw,CP,volatile,,,,,,
|
||||
0x2a8,,DIVREM_RESULT,64,rw,CP,volatile,,,,,,
|
||||
0x2a8,,DIVREM_RESULT_L,32,rw,CP,volatile,,,,,,
|
||||
0x2ac,,DIVREM_RESULT_H,32,rw,CP,volatile,,,,,,
|
||||
0x2b0,,SQRTCNT,16,rw,CP,volatile,BUSY,15,1,MODE,0,1
|
||||
0x2b4,,SQRT_RESULT,32,rw,CP,volatile,,,,,,
|
||||
#以下のSQRT_PARAM は、64ビットアクセスのほかに _H と _L を作りました。,,,,,,,,,,,,
|
||||
0x2b8,,SQRT_PARAM,64,rw,CP,volatile,,,,,,
|
||||
0x2b8,,SQRT_PARAM_L,32,rw,CP,volatile,,,,,,
|
||||
0x2bc,,SQRT_PARAM_H,32,rw,CP,volatile,,,,,,
|
||||
#PAUSE page 19-43,,,,,,,,,,,,
|
||||
0x300,,PAUSE,16,rw,OS,volatile,MOD,14,2,CHK,0,1
|
||||
#パワーコントロール nitro p35,,,,,,,,,,,,
|
||||
0x304,,POWCNT,16,rw,GX,volatile,GE,3,1,RE,2,1,E2DG,1,1,LCD,0,1,LCDB,8,1,E2DGB,9,1,DSEL,15,1
|
||||
#レンダリング済みライン数カウントレジスタ p174,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x320,,RDLINES_COUNT,16,r,G3X,volatile,RENDERED_LINES_MIN,0,6,,,,,,,,,,,,,,,
|
||||
#エッジカラーレジスタ nitro p170 (このフィールド名称考慮すべき),,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#重複定義ありです。,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x330,,EDGE_COLOR_0,32,w,G3X,volatile,BLUE1,26,5,GREEN1,21,5,RED1,16,5,BLUE0,10,5,GREEN0,5,5,RED0,0,5
|
||||
0x330,,EDGE_COLOR_0_L,16,w,G3X,volatile,BLUE0,10,5,GREEN0,5,5,RED0,0,5,,,,,,,,,
|
||||
0x332,,EDGE_COLOR_0_H,16,w,G3X,volatile,BLUE1,10,5,GREEN1,5,5,RED1,0,5,,,,,,,,,
|
||||
0x334,,EDGE_COLOR_1,32,w,G3X,volatile,BLUE3,26,5,GREEN3,21,5,RED3,16,5,BLUE2,10,5,GREEN2,5,5,RED2,0,5
|
||||
0x334,,EDGE_COLOR_1_L,16,w,G3X,volatile,BLUE2,10,5,GREEN2,5,5,RED2,0,5,,,,,,,,,
|
||||
0x336,,EDGE_COLOR_1_H,16,w,G3X,volatile,BLUE3,10,5,GREEN3,5,5,RED3,0,5,,,,,,,,,
|
||||
0x338,,EDGE_COLOR_2,32,w,G3X,volatile,BLUE5,26,5,GREEN5,21,5,RED5,16,5,BLUE4,10,5,GREEN4,5,5,RED4,0,5
|
||||
0x338,,EDGE_COLOR_2_L,16,w,G3X,volatile,BLUE4,10,5,GREEN4,5,5,RED4,0,5,,,,,,,,,
|
||||
0x33a,,EDGE_COLOR_2_H,16,w,G3X,volatile,BLUE5,10,5,GREEN5,5,5,RED5,0,5,,,,,,,,,
|
||||
0x33c,,EDGE_COLOR_3,32,w,G3X,volatile,BLUE7,26,5,GREEN7,21,5,RED7,16,5,BLUE6,10,5,GREEN6,5,5,RED6,0,5
|
||||
0x33c,,EDGE_COLOR_3_L,16,w,G3X,volatile,BLUE6,10,5,GREEN6,5,5,RED6,0,5,,,,,,,,,
|
||||
#レンダリング済みライン数カウントレジスタ p174,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x320,,RDLINES_COUNT,16,r,G3X,volatile,RENDERED_LINES_MIN,0,6,,,,,,,,,,,,,,,,,,
|
||||
#エッジカラーレジスタ nitro p170 (このフィールド名称考慮すべき),,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#重複定義ありです。,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x330,,EDGE_COLOR_0,32,w,G3X,volatile,BLUE1,26,5,GREEN1,21,5,RED1,16,5,BLUE0,10,5,GREEN0,5,5,RED0,0,5,,,
|
||||
0x330,,EDGE_COLOR_0_L,16,w,G3X,volatile,BLUE0,10,5,GREEN0,5,5,RED0,0,5,,,,,,,,,,,,
|
||||
0x332,,EDGE_COLOR_0_H,16,w,G3X,volatile,BLUE1,10,5,GREEN1,5,5,RED1,0,5,,,,,,,,,,,,
|
||||
0x334,,EDGE_COLOR_1,32,w,G3X,volatile,BLUE3,26,5,GREEN3,21,5,RED3,16,5,BLUE2,10,5,GREEN2,5,5,RED2,0,5,,,
|
||||
0x334,,EDGE_COLOR_1_L,16,w,G3X,volatile,BLUE2,10,5,GREEN2,5,5,RED2,0,5,,,,,,,,,,,,
|
||||
0x336,,EDGE_COLOR_1_H,16,w,G3X,volatile,BLUE3,10,5,GREEN3,5,5,RED3,0,5,,,,,,,,,,,,
|
||||
0x338,,EDGE_COLOR_2,32,w,G3X,volatile,BLUE5,26,5,GREEN5,21,5,RED5,16,5,BLUE4,10,5,GREEN4,5,5,RED4,0,5,,,
|
||||
0x338,,EDGE_COLOR_2_L,16,w,G3X,volatile,BLUE4,10,5,GREEN4,5,5,RED4,0,5,,,,,,,,,,,,
|
||||
0x33a,,EDGE_COLOR_2_H,16,w,G3X,volatile,BLUE5,10,5,GREEN5,5,5,RED5,0,5,,,,,,,,,,,,
|
||||
0x33c,,EDGE_COLOR_3,32,w,G3X,volatile,BLUE7,26,5,GREEN7,21,5,RED7,16,5,BLUE6,10,5,GREEN6,5,5,RED6,0,5,,,
|
||||
0x33c,,EDGE_COLOR_3_L,16,w,G3X,volatile,BLUE6,10,5,GREEN6,5,5,RED6,0,5,,,,,,,,,,,,
|
||||
0x33e,,EDGE_COLOR_3_H,16,w,G3X,volatile,BLUE7,10,5,GREEN7,5,5,RED7,0,5,,,,,,,,,
|
||||
#アルファテスト nitro p169,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x340,,ALPHA_TEST_REF,16,w,G3X,volatile,ALPHA_REFERENCE,0,5,,,,,,,,,,,,,,,
|
||||
@ -253,7 +254,7 @@
|
||||
0x360,,FOG_TABLE_0,32,w,G3X,volatile,DENSITY3,24,7,DENSITY2,16,7,DENSITY1,8,7,DENSITY0,0,7,,,,,,
|
||||
0x360,,FOG_TABLE_0_L,16,w,G3X,volatile,DENSITY1,8,7,DENSITY0,0,7,,,,,,,,,,,,
|
||||
0x362,,FOG_TABLE_0_H,16,w,G3X,volatile,DENSITY3,8,7,DENSITY2,0,7,,,,,,,,,,,,
|
||||
0x364,,FOG_TABLE_1,32,w,G3X,volatile,DENSITY7,24,7,DENSITY6,16,7,DENSITY5,8,7,DENSITY4,0,7,,,,,,
|
||||
0x364,,FOG_TABLE_1,32,w,G3X,volatile,DENSITY7,24,7,DENSITY6,16,7,DENSITY5,8,7,DENSITY4,0,7
|
||||
0x364,,FOG_TABLE_1_L,16,w,G3X,volatile,DENSITY5,8,7,DENSITY4,0,7,,,,,,
|
||||
0x366,,FOG_TABLE_1_H,16,w,G3X,volatile,DENSITY7,8,7,DENSITY6,0,7,,,,,,
|
||||
0x368,,FOG_TABLE_2,32,w,G3X,volatile,DENSITY11,24,7,DENSITY10,16,7,DENSITY9,8,7,DENSITY8,0,7
|
||||
@ -269,7 +270,7 @@
|
||||
0x374,,FOG_TABLE_5_L,16,w,G3X,volatile,DENSITY21,8,7,DENSITY20,0,7,,,,,,
|
||||
0x376,,FOG_TABLE_5_H,16,w,G3X,volatile,DENSITY23,8,7,DENSITY22,0,7,,,,,,
|
||||
0x378,,FOG_TABLE_6,32,w,G3X,volatile,DENSITY27,24,7,DENSITY26,16,7,DENSITY25,8,7,DENSITY24,0,7
|
||||
0x378,,FOG_TABLE_6_L,16,w,G3X,volatile,DENSITY25,8,7,DENSITY24,0,7,,,,,,
|
||||
0x378,,FOG_TABLE_6_L,16,w,G3X,volatile,DENSITY25,8,7,DENSITY24,0,7,,,,,,,,,,,,
|
||||
0x37a,,FOG_TABLE_6_H,16,w,G3X,volatile,DENSITY27,8,7,DENSITY26,0,7,,,,,,,,,,,,
|
||||
0x37c,,FOG_TABLE_7,32,w,G3X,volatile,DENSITY31,24,7,DENSITY30,16,7,DENSITY29,8,7,DENSITY28,0,7,,,,,,
|
||||
0x37c,,FOG_TABLE_7_L,16,w,G3X,volatile,DENSITY29,8,7,DENSITY28,0,7,,,,,,,,,,,,
|
||||
@ -333,7 +334,7 @@
|
||||
0x44c,,MTX_STORE,32,w,G3,volatile,INDEX,0,5,,,,,,,,,,,,,,,
|
||||
0x450,,MTX_RESTORE,32,w,G3,volatile,INDEX,0,5,,,,,,,,,,,,,,,
|
||||
0x454,,MTX_IDENTITY,32,w,G3,volatile,,,,,,,,,,,,,,,,,,
|
||||
0x458,,MTX_LOAD_4x4,32,w,G3,volatile,S,31,1,INTEGER_M44,12,19,DECIMAL_M44,0,12,,,,,,,,,
|
||||
0x458,,MTX_LOAD_4x4,32,w,G3,volatile,S,31,1,INTEGER_M44,12,19,DECIMAL_M44,0,12,,,,,,,,,,,,,,,,,,
|
||||
0x45c,,MTX_LOAD_4x3,32,w,G3,volatile,S,31,1,INTEGER_M43,12,19,DECIMAL_M43,0,12,,,,,,,,,,,,,,,,,,
|
||||
0x460,,MTX_MULT_4x4,32,w,G3,volatile,S,31,1,INTEGER_M44,12,19,DECIMAL_M44,0,12,,,,,,,,,,,,,,,,,,
|
||||
0x464,,MTX_MULT_4x3,32,w,G3,volatile,S,31,1,INTEGER_M43,12,19,DECIMAL_M43,0,12,,,,,,,,,,,,,,,,,,
|
||||
@ -349,7 +350,7 @@
|
||||
0x48c,,VTX_16,32,w,G3,volatile,SY,31,1,INT_Y,28,3,DECIMAL_Y,16,12,SX,15,1,INT_X,12,3,DECIMAL_X,0,12,,,,,,,,,
|
||||
0x490,,VTX_10,32,w,G3,volatile,SZ,29,1,INT_Z,26,3,DECIMAL_Z,20,6,SY,19,1,INT_Y,16,3,DECIMAL_Y,10,6,SX,9,1,INT_X,6,3,DECIMAL_X,0,6
|
||||
0x494,,VTX_XY,32,w,G3,volatile,SY,31,1,INT_Y,28,3,DECIMAL_Y,16,12,SX,15,1,INT_X,12,3,DECIMAL_X,0,12,,,,,,,,,
|
||||
0x498,,VTX_XZ,32,w,G3,volatile,SZ,31,1,INT_Z,28,3,DECIMAL_Z,16,12,SX,15,1,INT_X,12,3,DECIMAL_X,0,12,,,,,,,,,
|
||||
0x498,,VTX_XZ,32,w,G3,volatile,SZ,31,1,INT_Z,28,3,DECIMAL_Z,16,12,SX,15,1,INT_X,12,3,DECIMAL_X,0,12,,,,,,,,,,,,,,,
|
||||
0x49c,,VTX_YZ,32,w,G3,volatile,SZ,31,1,INT_Z,28,3,DECIMAL_Z,16,12,SY,15,1,INT_Y,12,3,DECIMAL_Y,0,12,,,,,,,,,,,,,,,
|
||||
0x4a0,,VTX_DIFF,32,w,G3,volatile,SZ,29,1,DECIMAL_Z,20,9,SY,19,1,DECIMAL_Y,10,9,SX,9,1,DECIMAL_X,0,9,,,,,,,,,,,,,,,
|
||||
#ポリゴン属性 nitro p130,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -365,7 +366,7 @@
|
||||
0x4d0,,SHININESS,32,w,G3,volatile,SHININESS3,24,8,SHININESS2,16,8,SHININESS1,8,8,SHININESS0,0,8,,,,,,,,,,,,,,,,,,,,,
|
||||
#ポリゴン 頂点リストの開始と終了宣言 nitro p133,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x500,,BEGIN_VTXS,32,w,G3,volatile,TYPE,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x504,,END_VTXS,32,w,G3,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x504,,END_VTXS,32,w,G3,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#レンダリングエンジン参照データスワップ nitro p115,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x540,,SWAP_BUFFERS,32,w,G3,volatile,DP,1,1,XS,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#ビューポート nitro p116,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -381,7 +382,7 @@
|
||||
#頂点RAMカウントレジスタ nitro p148,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x606,,VTXRAM_COUNT,16,r,G3X,volatile,VTXCNT,0,13,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#1ドットポリゴン表示境界デプス値レジスタ nitro p132,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x610,,DISP_1DOT_DEPTH,16,w,G3X,volatile,INTEGER_W,3,12,DECIMAL_W,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x610,,DISP_1DOT_DEPTH,16,w,G3X,volatile,INTEGER_W,3,12,DECIMAL_W,0,3,,,
|
||||
#計算結果取得 nitro p145,,,,,,,,,,,,,,,
|
||||
0x620,,POS_RESULT_X,32,r,G3X,volatile,SX,31,1,INTEGER_X,12,19,DECIMAL_X,0,12
|
||||
0x624,,POS_RESULT_Y,32,r,G3X,volatile,SY,31,1,INTEGER_Y,12,19,DECIMAL_Y,0,12
|
||||
@ -413,7 +414,7 @@
|
||||
0x68c,,VECMTX_RESULT_3,32,r,G3X,volatile,S,31,1,INTEGER_m3,12,19,DECIMAL_m3,0,12
|
||||
0x690,,VECMTX_RESULT_4,32,r,G3X,volatile,S,31,1,INTEGER_m4,12,19,DECIMAL_m4,0,12
|
||||
0x694,,VECMTX_RESULT_5,32,r,G3X,volatile,S,31,1,INTEGER_m5,12,19,DECIMAL_m5,0,12
|
||||
0x698,,VECMTX_RESULT_6,32,r,G3X,volatile,S,31,1,INTEGER_m6,12,19,DECIMAL_m6,0,12
|
||||
0x698,,VECMTX_RESULT_6,32,r,G3X,volatile,S,31,1,INTEGER_m6,12,19,DECIMAL_m6,0,12,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x69c,,VECMTX_RESULT_7,32,r,G3X,volatile,S,31,1,INTEGER_m7,12,19,DECIMAL_m7,0,12,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x6a0,,VECMTX_RESULT_8,32,r,G3X,volatile,S,31,1,INTEGER_m8,12,19,DECIMAL_m8,0,12,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#２画面目関係レジスタ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -429,7 +430,7 @@
|
||||
0x1014,,DB_BG1OFS,32,w,G2S,volatile,VOFFSET,16,9,HOFFSET,0,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1014,,DB_BG1HOFS,16,w,G2S,volatile,OFFSET,0,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1016,,DB_BG1VOFS,16,w,G2S,volatile,OFFSET,0,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1018,,DB_BG2OFS,32,w,G2S,volatile,VOFFSET,16,9,HOFFSET,0,9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1018,,DB_BG2OFS,32,w,G2S,volatile,VOFFSET,16,9,HOFFSET,0,9,,,
|
||||
0x1018,,DB_BG2HOFS,16,w,G2S,volatile,OFFSET,0,9,,,,,,
|
||||
0x101a,,DB_BG2VOFS,16,w,G2S,volatile,OFFSET,0,9,,,,,,
|
||||
0x101c,,DB_BG3OFS,32,w,G2S,volatile,VOFFSET,16,9,HOFFSET,0,9,,,
|
||||
@ -445,7 +446,7 @@
|
||||
0x1032,,DB_BG3PB,16,w,G2S,volatile,S,15,1,INTEGER_DMX,8,7,DECIMAL_DMX,0,8
|
||||
0x1034,,DB_BG3PC,16,w,G2S,volatile,S,15,1,INTEGER_DY,8,7,DECIMAL_DY,0,8
|
||||
0x1036,,DB_BG3PD,16,w,G2S,volatile,S,15,1,INTEGER_DMY,8,7,DECIMAL_DMY,0,8
|
||||
0x1038,,DB_BG3X,32,w,G2S,volatile,S,27,1,INTEGER_SX,8,19,DECIMAL_SX,0,8
|
||||
0x1038,,DB_BG3X,32,w,G2S,volatile,S,27,1,INTEGER_SX,8,19,DECIMAL_SX,0,8,,,
|
||||
0x103c,,DB_BG3Y,32,w,G2S,volatile,S,27,1,INTEGER_SY,8,19,DECIMAL_SY,0,8,,,
|
||||
0x1040,,DB_WIN0H,16,w,G2S,volatile,LEFTX,8,8,RIGHTX,0,8,,,,,,
|
||||
0x1042,,DB_WIN1H,16,w,G2S,volatile,LEFTX,8,8,RIGHTX,0,8,,,,,,
|
||||
|
||||
|
Can't render this file because it has a wrong number of fields in line 17.
|
@ -158,30 +158,38 @@
|
||||
0x138,,RCNT1,16,rw,EXI,volatile,DIR_RF,15,1,DIR_RE,14,1,DIR_RD,13,1,DIR_RC,12,1,DATA_RF,11,1,DATA_RE,10,1,DATA_RD,9,1,DATA_RC,8,1,DIR_RB,7,1,DIR_RA,6,1,DIR_R9,5,1,DIR_R8,4,1,DATA_RB,3,1,DATA_RA,2,1,DATA_R9,1,1,DATA_R8,0,1
|
||||
#JOY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x140,,JOYCNT,16,rw,EXI,volatile,MOD,7,1,I,6,1,SEND,2,1,RECV,1,1,RESET,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x150,,JOY_RECV,32,rw,EXI,volatile,RECVDATA,0,32,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x154,,JOY_TRANS,32,rw,EXI,volatile,SENDDATA,0,32,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x158,,JOY_STAT,16,rw,EXI,volatile,GEN,4,2,SSTATUS,3,1,RSTATUS,1,1,,,,,,,,,,,,,,,,,,
|
||||
# ARM9 とのインターフェイス nitro p191～ p192,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x180,,MAINPINTF,16,rw,PXI,volatile,I,14,1,IREQ,13,1,A7STATUS,8,4,A9STATUS,0,4,,,,,,,,,,,,,,,
|
||||
0x184,,MAINP_FIFO_CNT,16,rw,PXI,volatile,E,15,1,ERR,14,1,RECV_RI,10,1,RECV_FULL,9,1,RECV_EMP,8,1,SEND_CL,3,1,SEND_TI,2,1,SEND_FULL,1,1,SEND_EMP,0,1
|
||||
0x188,,SEND_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x100000,,RECV_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#メモリカード,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1a0,,MCCNT0,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,
|
||||
0x1a2,,MCD0,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x100010,,MCD1,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1a4,,MCCNT1,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,L2,16,6,L1,0,13
|
||||
0x1a8,,MCCMD0,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,
|
||||
0x1ac,,MCCMD1,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a0,,MCCNT0_B,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a2,,MCD0_B,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x102010,,MCD1_B,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a4,,MCCNT1_B,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,L2,16,6,L1,0,13,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a8,,MCCMD0_B,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21ac,,MCCMD1_B,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# twl p220 ～ p221,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1c0,,SPICNT,16,rw,SPI,volatile,E,15,1,I,14,1,MODE,11,1,CLKMODE,10,1,SEL,8,2,BUSY,7,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x150,,JOY_RECV,32,rw,EXI,volatile,RECVDATA,0,32,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x154,,JOY_TRANS,32,rw,EXI,volatile,SENDDATA,0,32,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x158,,JOY_STAT,16,rw,EXI,volatile,GEN,4,2,SSTATUS,3,1,RSTATUS,1,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# ARM9 とのインターフェイス nitro p191～ p192,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x180,,MAINPINTF,16,rw,PXI,volatile,I,14,1,IREQ,13,1,A7STATUS,8,4,A9STATUS,0,4,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x184,,MAINP_FIFO_CNT,16,rw,PXI,volatile,E,15,1,ERR,14,1,RECV_RI,10,1,RECV_FULL,9,1,RECV_EMP,8,1,SEND_CL,3,1,SEND_TI,2,1,SEND_FULL,1,1,SEND_EMP,0,1,,,,,,,,,,,,
|
||||
0x188,,SEND_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x100000,,RECV_FIFO,32,rw,PXI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#メモリカード,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1a0,,MCCNT0,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1a2,,MCD0,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x100010,,MCD1,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1a4,,MCCNT1,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,CSC,22,1,L2,16,6,SCR,15,1,SE,14,1,DSC,13,1,L1,0,13
|
||||
0x1a8,,MCCMD0,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1ac,,MCCMD1,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1b0,,MCSCRA_L,32,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1b4,,MCSCRB_L,32,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1b8,,MCSCRA_H,8,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1ba,,MCSCRB_H,8,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a0,,MCCNT0_B,16,rw,MI,volatile,E,15,1,I,14,1,SEL,13,1,BUSY,7,1,MODE,6,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a2,,MCD0_B,16,rw,MI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x102010,,MCD1_B,32,rw,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21a4,,MCCNT1_B,32,rw,MI,volatile,START,31,1,WR,30,1,RESB,29,1,TRM,28,1,CT,27,1,PC,24,3,RDY,23,1,CSC,22,1,L2,16,6,SCR,15,1,SE,14,1,DSC,13,1,L1,0,13
|
||||
0x21a8,,MCCMD0_B,32,w,MI,volatile,CMD3,24,8,CMD2,16,8,CMD1,8,8,CMD0,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21ac,,MCCMD1_B,32,w,MI,volatile,CMD7,24,8,CMD6,16,8,CMD5,8,8,CMD4,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21b0,,MCSCRA_L_B,32,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21b4,,MCSCRB_L_B,32,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21b8,,MCSCRA_H_B,8,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21ba,,MCSCRB_H_B,8,w,MI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# twl p220 ～ p221,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x1c0,,SPICNT,16,rw,SPI,volatile,E,15,1,I,14,1,MODE,11,1,CLKMODE,10,1,SEL,8,2,BUSY,7,1,BAUDRATE,0,2,,,,,,,,,,,,,,,,,,
|
||||
0x1c2,,SPID,16,rw,SPI,volatile,DATA,0,8,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#ŠO•”<E280A2><E2809D><EFBFBD>‚<EFBFBD>Š nitro p19-26 / twl p223,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x204,,EXMEMCNT_L,16,rw,MI,volatile,EP,15,1,MP,11,1,MP_B,10,1,CP,7,1,PHI,5,2,ROM2nd,4,1,ROM1st,2,2,RAM,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -190,30 +198,30 @@
|
||||
0x208,,IME,16,rw,OS,volatile,IME,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x210,,IE,32,rw,OS,volatile,D7,31,1,D6,30,1,D5,29,1,D4,28,1,MI_B,27,1,MC_B,26,1,J_TX,25,1,WL,24,1,SPI,23,1,PM,22,1,J_RX,21,1,MI,20,1,MC,19,1,IFN,18,1,IFE,17,1,A7,16,1,MC_B_DET,15,1,MC_DET,14,1,I_D,13,1,K,12,1,D3,11,1,D2,10,1,D1,9,1,D0,8,1,T3,6,1,T2,5,1,T1,4,1,T0,3,1,VE,2,1,HB,1,1,VB,0,1
|
||||
0x214,,IF,32,rw,OS,volatile,D7,31,1,D6,30,1,D5,29,1,D4,28,1,MI_B,27,1,MC_B,26,1,J_TX,25,1,SPI,23,1,PM,22,1,MI,20,1,J_RX,21,1,MC,19,1,IFN,18,1,IFE,17,1,A7,16,1,MC_B_DET,15,1,MC_DET,14,1,I_D,13,1,K,12,1,D3,11,1,D2,10,1,D1,9,1,D0,8,1,T3,6,1,T2,5,1,T1,4,1,T0,3,1,VE,2,1,HB,1,1,VB,0,1,,,
|
||||
0x218,,IE2,32,rw,OS,volatile,MIC,14,1,I2C,13,1,AES,12,1,WSDIO,11,1,WSD,10,1,SDIO,9,1,SD,8,1,IO33_3,7,1,IO33_2,6,1,IO33_1,5,1,IO33_0,4,1,IO18_2,2,1,IO18_1,1,1,IO18_0,0,1
|
||||
0x21c,,IF2,32,rw,OS,volatile,MIC,14,1,I2C,13,1,AES,12,1,WSDIO,11,1,WSD,10,1,SDIO,9,1,SD,8,1,IO33_3,7,1,IO33_2,6,1,IO33_1,5,1,IO33_0,4,1,IO18_2,2,1,IO18_1,1,1,IO18_0,0,1
|
||||
#本体内メモリ nitro p194,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x240,,WVRAMSTAT,16,rw,MI,volatile,WRAM_1,9,1,WRAM_0,8,1,VRAM_D,1,1,VRAM_C,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#PAUSE page 19-43,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x300,,PAUSE,16,rw,OS,volatile,MOD,14,2,CHK,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#パワーコントロール nitro p200,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x304,,POWCNT,16,rw,SND,volatile,EWL,1,1,SPE,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x308,,PROT,16,rw,CFG,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#サウンド,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x400,,SOUND0CNT,32,rw,SND,volatile,E,31,1,FORMAT,29,2,REPEAT,27,2,DUTY,24,3,PAN,16,7,HOLD,15,1,SHIFT,8,2,VOLUME,0,7,,,,,,,,,,,,,,,,,,
|
||||
0x400,,SOUND0CNT_VOL_16,16,rw,SND,volatile,HOLD,15,1,SHIFT,8,2,VOLUME,0,7,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x400,,SOUND0CNT_VOL,8,rw,SND,volatile,VOLUME,0,7,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x402,,SOUND0CNT_PAN,8,rw,SND,volatile,PAN,0,7,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x403,,SOUND0CNT_8,8,rw,SND,volatile,E,7,1,FORMAT,5,2,REPEAT,3,2,DUTY,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x404,,SOUND0SAD,32,w,SND,volatile,SRC,0,27,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x408,,SOUND0TMR,16,w,SND,volatile,TIMER,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x40a,,SOUND0RPT_PT,16,w,SND,volatile,POINT,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x40c,,SOUND0RPT_LEN,32,w,SND,volatile,LEN,0,22,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#サウンドマスターコントロール nitro p201,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x500,,SOUNDCNT,16,rw,SND,volatile,E,15,1,MIX_CH3,13,1,MIX_CH1,12,1,ROUT,10,2,LOUT,8,2,VOLUME,0,7,,,,,,,,,,,,
|
||||
0x501,,SOUNDCNT_8,8,rw,SND,volatile,E,7,1,MIX_CH3,5,1,MIX_CH1,4,1,ROUT,2,2,LOUT,0,2,,,,,,,,,,,,,,,
|
||||
0x500,,SOUNDCNT_VOL,8,rw,SND,volatile,VOLUME,0,7,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x504,,PWMBIAS,16,rw,SND,volatile,BIAS,0,10,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x218,,IE2,32,rw,OS,volatile,MIC,14,1,I2C,13,1,AES,12,1,WSDIO,11,1,WSD,10,1,SDIO,9,1,SD,8,1,IO33_3,7,1,IO33_2,6,1,IO33_1,5,1,IO33_0,4,1,IO18_2,2,1,IO18_1,1,1,IO18_0,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x21c,,IF2,32,rw,OS,volatile,MIC,14,1,I2C,13,1,AES,12,1,WSDIO,11,1,WSD,10,1,SDIO,9,1,SD,8,1,IO33_3,7,1,IO33_2,6,1,IO33_1,5,1,IO33_0,4,1,IO18_2,2,1,IO18_1,1,1,IO18_0,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#本体内メモリ nitro p194,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x240,,WVRAMSTAT,16,rw,MI,volatile,WRAM_1,9,1,WRAM_0,8,1,VRAM_D,1,1,VRAM_C,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#PAUSE page 19-43,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x300,,PAUSE,16,rw,OS,volatile,MOD,14,2,CHK,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#パワーコントロール nitro p200,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x304,,POWCNT,16,rw,SND,volatile,EWL,1,1,SPE,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x308,,PROT,16,rw,CFG,volatile,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#サウンド,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x400,,SOUND0CNT,32,rw,SND,volatile,E,31,1,FORMAT,29,2,REPEAT,27,2,DUTY,24,3,PAN,16,7,HOLD,15,1,SHIFT,8,2,VOLUME,0,7
|
||||
0x400,,SOUND0CNT_VOL_16,16,rw,SND,volatile,HOLD,15,1,SHIFT,8,2,VOLUME,0,7,,,,,,,,,,,,,,,
|
||||
0x400,,SOUND0CNT_VOL,8,rw,SND,volatile,VOLUME,0,7,,,,,,,,,,,,,,,,,,,,,
|
||||
0x402,,SOUND0CNT_PAN,8,rw,SND,volatile,PAN,0,7,,,,,,,,,,,,,,,,,,,,,
|
||||
0x403,,SOUND0CNT_8,8,rw,SND,volatile,E,7,1,FORMAT,5,2,REPEAT,3,2,DUTY,0,3,,,,,,,,,,,,
|
||||
0x404,,SOUND0SAD,32,w,SND,volatile,SRC,0,27,,,,,,,,,,,,,,,,,,,,,
|
||||
0x408,,SOUND0TMR,16,w,SND,volatile,TIMER,0,16,,,,,,,,,,,,,,,,,,,,,
|
||||
0x40a,,SOUND0RPT_PT,16,w,SND,volatile,POINT,0,16,,,,,,,,,,,,,,,,,,,,,
|
||||
0x40c,,SOUND0RPT_LEN,32,w,SND,volatile,LEN,0,22,,,,,,,,,,,,,,,,,,,,,
|
||||
#サウンドマスターコントロール nitro p201,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x500,,SOUNDCNT,16,rw,SND,volatile,E,15,1,MIX_CH3,13,1,MIX_CH1,12,1,ROUT,10,2,LOUT,8,2,VOLUME,0,7,,,,,,
|
||||
0x501,,SOUNDCNT_8,8,rw,SND,volatile,E,7,1,MIX_CH3,5,1,MIX_CH1,4,1,ROUT,2,2,LOUT,0,2,,,,,,,,,
|
||||
0x500,,SOUNDCNT_VOL,8,rw,SND,volatile,VOLUME,0,7,,,,,,,,,,,,,,,,,,,,,
|
||||
0x504,,PWMBIAS,16,rw,SND,volatile,BIAS,0,10,,,,,,,,,,,,,,,,,,,,,
|
||||
#<23>L<EFBFBD><4C><EFBFBD>v<EFBFBD>`<60><> nitro p206,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
0x508,,SNDCAPCNT,16,rw,SND,volatile,CAP1_E,15,1,CAP1_FORMAT,11,1,CAP1_REPEAT,10,1,CAP1_IN,9,1,CAP1_OUT,8,1,CAP0_E,7,1,CAP0_FORMAT,3,1,CAP0_REPEAT,2,1,CAP0_IN,1,1,CAP0_OUT,0,1
|
||||
0x508,,SNDCAP0CNT,8,rw,SND,volatile,E,7,1,FORMAT,3,1,REPEAT,2,1,IN,1,1,OUT,0,1,,,,,,,,,,,,,,,
|
||||
|
||||
|
Can't render this file because it has a wrong number of fields in line 17.
|
@ -16,33 +16,80 @@
|
||||
|
||||
#include <twl/mi.h>
|
||||
|
||||
static u32 intervalTable[] =
|
||||
static u16 intervalTable[] =
|
||||
{
|
||||
1, 1, 1, 1,
|
||||
};
|
||||
|
||||
static MIExDmaPrescaler prescaleTable[] =
|
||||
{
|
||||
MI_EXDMA_PRESCALER_1,
|
||||
MI_EXDMA_PRESCALER_1,
|
||||
MI_EXDMA_PRESCALER_1,
|
||||
MI_EXDMA_PRESCALER_1,
|
||||
};
|
||||
|
||||
//================================================================================
|
||||
// memory oparation using DMA (sync)
|
||||
//================================================================================
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaArbiter
|
||||
Name: MIi_SetExDmaArbitration
|
||||
|
||||
Description: set DMA arbitration
|
||||
|
||||
Arguments: arb : arbitration algorism
|
||||
yld : yield cycles for round robin
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaArbiter( MIExDmaArbitration arb, MIExDmaYieldCycles yld )
|
||||
void MIi_SetExDmaArbitration( MIExDmaArbitration arb )
|
||||
{
|
||||
OSIntrMode enabled = OS_DisableInterrupts();
|
||||
|
||||
reg_MI_DMAGBL = (u32)(arb | yld);
|
||||
reg_MI_DMAGBL = (u32)arb | (reg_MI_DMAGBL & ~REG_MI_DMAGBL_ARB_MASK);
|
||||
|
||||
(void)OS_RestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaYieldCycles
|
||||
|
||||
Description: set DMA yield cycles
|
||||
|
||||
Arguments: yld : yield cycles for round robin
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaYieldCycles( MIExDmaYieldCycles yld )
|
||||
{
|
||||
OSIntrMode enabled = OS_DisableInterrupts();
|
||||
|
||||
reg_MI_DMAGBL = (u32)yld | (reg_MI_DMAGBL & ~REG_MI_DMAGBL_YLD_MASK);
|
||||
|
||||
(void)OS_RestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaInterval
|
||||
|
||||
Description: set DMA interval
|
||||
|
||||
Arguments: dmaNo : DMA channel No.
|
||||
count : count
|
||||
prescale : prescale
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaInterval( u32 dmaNo, u16 count, MIExDmaPrescaler prescale )
|
||||
{
|
||||
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
|
||||
|
||||
if ( idx < MI_EXDMA_CH_NUM )
|
||||
{
|
||||
intervalTable[idx] = count;
|
||||
prescaleTable[idx] = prescale;
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_ExDmaFill
|
||||
|
||||
@ -63,7 +110,7 @@ void MIi_ExDmaFill( u32 dmaNo, void *dest, u32 data, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaFillCore( dmaNo, dest, data, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -92,7 +139,7 @@ void MIi_ExDmaCopy( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaCopyCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -121,7 +168,7 @@ void MIi_ExDmaSend( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaSendCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -150,7 +197,7 @@ void MIi_ExDmaRecv( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaRecvCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -179,7 +226,7 @@ void MIi_ExDmaFillAsync( u32 dmaNo, void *dest, u32 data, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaFillAsyncCore( dmaNo, dest, data, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -208,7 +255,7 @@ void MIi_ExDmaCopyAsync( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaCopyAsyncCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -237,7 +284,7 @@ void MIi_ExDmaSendAsync( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaSendAsyncCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -266,7 +313,7 @@ void MIi_ExDmaRecvAsync( u32 dmaNo, const void *src, void *dest, u32 size )
|
||||
{
|
||||
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
|
||||
u32 interval = intervalTable[idx];
|
||||
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
|
||||
MIExDmaPrescaler prescale = prescaleTable[idx];
|
||||
|
||||
MIi_ExDmaRecvAsyncCore( dmaNo, src, dest, size, size,
|
||||
blockSize, interval, prescale,
|
||||
@ -588,11 +635,14 @@ BOOL MIi_IsExDmaBusy( u32 dmaNo )
|
||||
{
|
||||
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
|
||||
|
||||
if ( idx < MI_EXDMA_CH_NUM )
|
||||
{
|
||||
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
|
||||
|
||||
return (BOOL)((reg->ctrl & REG_MI_DMA4CNT_E_MASK) >> REG_MI_DMA4CNT_E_SHIFT);
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
@ -608,6 +658,7 @@ void MIi_WaitExDma( u32 dmaNo )
|
||||
{
|
||||
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
|
||||
|
||||
if ( idx < MI_EXDMA_CH_NUM )
|
||||
{
|
||||
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
|
||||
|
||||
|
||||
@ -37,6 +37,9 @@
|
||||
void MI_Init(void)
|
||||
{
|
||||
#ifdef SDK_ARM9
|
||||
//---- Init Main Memory Priority
|
||||
MI_SetMainMemoryPriority(MI_PROCESSOR_ARM7);
|
||||
|
||||
//---- Init Work RAM (allocate both wram (block0/1) to ARM7)
|
||||
MI_SetWramBank(MI_WRAM_ARM7_ALL);
|
||||
#endif
|
||||
@ -47,5 +50,6 @@ void MI_Init(void)
|
||||
//---- add for TWL
|
||||
|
||||
//---- DMA arbitration
|
||||
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_ROUND_ROBIN, MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_ROUND_ROBIN );
|
||||
MIi_SetExDmaYieldCycles( MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
}
|
||||
|
||||
@ -25,6 +25,7 @@ SUBDIRS = \
|
||||
ifneq ($(TWL_PLATFORM),DSTEG)
|
||||
SUBDIRS += \
|
||||
exDma-1 \
|
||||
allDma-1 \
|
||||
|
||||
endif
|
||||
|
||||
|
||||
44
build/tests/mi/allDma-1/ARM7/Makefile
Normal file
44
build/tests/mi/allDma-1/ARM7/Makefile
Normal file
@ -0,0 +1,44 @@
|
||||
#! make -f
|
||||
#----------------------------------------------------------------------------
|
||||
# Project: TwlSDK - OS - demos - allDma-1
|
||||
# File: Makefile
|
||||
#
|
||||
# Copyright 2007 Nintendo. All rights reserved.
|
||||
#
|
||||
# These coded instructions, statements, and computer programs contain
|
||||
# proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
# Company Ltd., and are protected by Federal copyright law. They may
|
||||
# not be disclosed to third parties or copied or duplicated in any form,
|
||||
# in whole or in part, without the prior written consent of Nintendo.
|
||||
#
|
||||
# $Log: $
|
||||
# $NoKeywords: $
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
SUBDIRS =
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
#TWL_CODEGEN = THUMB
|
||||
TWL_PROC = ARM7
|
||||
|
||||
TARGET_BIN = allDma7_1.axf
|
||||
|
||||
SRCS = main.c
|
||||
|
||||
#SRCDIR = # using default
|
||||
#LCFILE = # using default
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/commondefs
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
do-build: $(TARGETS)
|
||||
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/modulerules
|
||||
|
||||
|
||||
#===== End of Makefile =====
|
||||
694
build/tests/mi/allDma-1/ARM7/src/main.c
Normal file
694
build/tests/mi/allDma-1/ARM7/src/main.c
Normal file
@ -0,0 +1,694 @@
|
||||
/*---------------------------------------------------------------------------*
|
||||
Project: TwlSDK - MI - demos - allDma-1
|
||||
File: main.c
|
||||
|
||||
Copyright 2007 Nintendo. All rights reserved.
|
||||
|
||||
These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
Company Ltd., and are protected by Federal copyright law. They may
|
||||
not be disclosed to third parties or copied or duplicated in any form,
|
||||
in whole or in part, without the prior written consent of Nintendo.
|
||||
|
||||
$Log: $
|
||||
$NoKeywords: $
|
||||
*---------------------------------------------------------------------------*/
|
||||
#include <twl.h>
|
||||
#include <../build/libraries/mi/common/include/mi_dma.h>
|
||||
|
||||
|
||||
#define MY_DMA_MMEM ((t_TestBuf *)HW_MAIN_MEM_SUB)
|
||||
#define MY_TEST_LOOPS (sizeof(copyfillArg)/sizeof(t_CommonArg))
|
||||
#define ONE_BUF_SIZE 0x1004
|
||||
|
||||
#define MY_DMA_CH_START 1
|
||||
#define MY_DMA_CH_END 7
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u32 prePad __attribute__ ((aligned (32)));
|
||||
u16 src[8][ONE_BUF_SIZE/2] __attribute__ ((aligned (32)));
|
||||
u16 dest[8][ONE_BUF_SIZE/2] __attribute__ ((aligned (32)));
|
||||
u32 PostPad __attribute__ ((aligned (32)));
|
||||
}
|
||||
t_TestBuf;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2];
|
||||
u16 (*dest)[ONE_BUF_SIZE/2];
|
||||
char *copyStr;
|
||||
char *fillStr;
|
||||
}
|
||||
t_CommonArg;
|
||||
|
||||
|
||||
t_TestBuf testBuf __attribute__ ((aligned (32)));
|
||||
|
||||
t_CommonArg copyfillArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "DmaCopy success on WRAM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, testBuf.dest, "DmaCopy success on MAIN_MEM -> WRAM.\n", "DmaFill success on WRAM.\n", },
|
||||
{ testBuf.src, MY_DMA_MMEM->dest, "DmaCopy success on WRAM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", "DmaFill success on MAIN_MEM.\n", },
|
||||
};
|
||||
|
||||
t_CommonArg stopArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success on WRAM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, testBuf.dest, "Stopping DmaCopy success on MAIN_MEM -> WRAM.\n", "Stopping DmaFill success on WRAM.\n", },
|
||||
{ testBuf.src, MY_DMA_MMEM->dest, "Stopping DmaCopy success on WRAM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "Stopping DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", "Stopping DmaFill success on MAIN_MEM.\n", },
|
||||
};
|
||||
|
||||
t_CommonArg copyfillAsyncArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "DmaCopyAsync success on WRAM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, testBuf.dest, "DmaCopyAsync success on MAIN_MEM -> WRAM.\n", "DmaFillAsync success on WRAM.\n", },
|
||||
{ testBuf.src, MY_DMA_MMEM->dest, "DmaCopyAsync success on WRAM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "DmaCopyAsync success on MAIN_MEM -> MAIN_MEM.\n", "DmaFillAsync success on MAIN_MEM.\n", },
|
||||
};
|
||||
|
||||
u32 exDmaIntrCount[MI_EXDMA_CH_NUM];
|
||||
|
||||
void InitExDmaIntr(void);
|
||||
void ClearIntrCount(void);
|
||||
void PrintIntrCount(void);
|
||||
void ExDma4Intr(void);
|
||||
void ExDma5Intr(void);
|
||||
void ExDma6Intr(void);
|
||||
void ExDma7Intr(void);
|
||||
|
||||
static BOOL CheckDmaCopy( u32 dmaNo, void *src, void *dest, const char *str )
|
||||
{
|
||||
BOOL ercd = TRUE;
|
||||
u8 *s = src;
|
||||
u8 *d = dest;
|
||||
int i;
|
||||
|
||||
for (i=0; i<ONE_BUF_SIZE; i++)
|
||||
{
|
||||
if ( s[i] != d[i] )
|
||||
{
|
||||
OS_TPrintf( "error: DmaCopy failed address = 0x%x count = 0x%x dmaNo = %d.\n", &d[i], i/2, dmaNo );
|
||||
OS_TPrintf( " src = 0x%02x dest = 0x%02x.\n", s[i], d[i] );
|
||||
ercd = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (str)
|
||||
{
|
||||
OS_TPrintf( str );
|
||||
}
|
||||
|
||||
return ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaFill( u32 dmaNo, void *dest, u32 data, char *str )
|
||||
{
|
||||
BOOL ercd = TRUE;
|
||||
u32 *d = dest;
|
||||
int i;
|
||||
|
||||
for (i=0; i<ONE_BUF_SIZE/4; i++)
|
||||
{
|
||||
if ( data != d[i] )
|
||||
{
|
||||
OS_TPrintf( "error: DmaFill failed address = 0x%x count = 0x%x dmaNo = %d.\n", &d[i], i/2, dmaNo );
|
||||
OS_TPrintf( " data = 0x%08x dest = 0x%08x.\n", data, d[i] );
|
||||
ercd = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (str)
|
||||
{
|
||||
OS_TPrintf( str );
|
||||
}
|
||||
|
||||
return ercd;
|
||||
}
|
||||
|
||||
|
||||
static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i, ii;
|
||||
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
for (ii=0; ii<ONE_BUF_SIZE/2; ii++)
|
||||
{
|
||||
src[i][ii] = (u16)(ii+i-data);
|
||||
}
|
||||
}
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopy( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_DmaCopy32( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = copyStr;
|
||||
}
|
||||
c_ercd |= CheckDmaCopy( ch, s, d, str );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFill( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_DmaFill32( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = fillStr;
|
||||
}
|
||||
f_ercd |= CheckDmaFill( ch, d, data+i, str );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i, ii;
|
||||
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
for (ii=0; ii<ONE_BUF_SIZE/2; ii++)
|
||||
{
|
||||
src[i][ii] = (u16)(ii+i-data);
|
||||
}
|
||||
}
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 189 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopyAsync( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams(ch, (u32)s, (u32)d, MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaCopyAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_WaitExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_WaitDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = copyStr;
|
||||
}
|
||||
c_ercd |= CheckDmaCopy( ch, s, d, str );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 191 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFillAsync( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams_src32(ch, data+i, (u32)d, (MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON) | MI_DMA_SRC_FIX);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaFillAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_WaitExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_WaitDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = fillStr;
|
||||
}
|
||||
f_ercd |= CheckDmaFill( ch, d, data+i, str );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaStop( t_CommonArg *arg )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i;
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 189 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopyAsync( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams(ch, (u32)s, (u32)d, MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaCopyAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_StopExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_StopDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == TRUE )
|
||||
{
|
||||
OS_TPrintf( "error: Stopping DmaCopy failed dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
if ( c_ercd == TRUE && copyStr )
|
||||
{
|
||||
OS_TPrintf( copyStr );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 188 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 189 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFillAsync( ch, d, i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams_src32(ch, i, (u32)d, (MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON) | MI_DMA_SRC_FIX);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaFillAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_StopExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_StopDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == TRUE )
|
||||
{
|
||||
OS_TPrintf( "error: Stopping DmaFill failed dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
if ( f_ercd == TRUE && fillStr )
|
||||
{
|
||||
OS_TPrintf( fillStr );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static void TestDmaFuncs( void )
|
||||
{
|
||||
u32 i;
|
||||
|
||||
ClearIntrCount();
|
||||
|
||||
// sync copy and fill test
|
||||
OS_TPrintf( "\nChecking DmaCopy and DmaFill ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaCopyAndFill( ©fillArg[i], i );
|
||||
}
|
||||
|
||||
// async copy and fill test
|
||||
OS_TPrintf( "\nChecking DmaCopyAsync and DmaFillAsync ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaCopyAndFillAsync( ©fillAsyncArg[i], i );
|
||||
}
|
||||
|
||||
// stop test
|
||||
OS_TPrintf( "\nChecking DmaStop ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaStop( &stopArg[i] );
|
||||
}
|
||||
|
||||
PrintIntrCount();
|
||||
}
|
||||
|
||||
//================================================================================
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: TwlMain
|
||||
|
||||
Description: main
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void TwlMain()
|
||||
{
|
||||
OS_Init();
|
||||
|
||||
InitExDmaIntr();
|
||||
|
||||
OS_TPrintf("\nARM7 starts.\n");
|
||||
|
||||
// priority dma test
|
||||
OS_TPrintf( "\nTurn into Priority Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_PRIORITY );
|
||||
MIi_SetExDmaInterval( 4, 595, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 580, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 565, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 550, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
// round robin dma test
|
||||
OS_TPrintf( "\nTurn into Round Robin Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_ROUND_ROBIN );
|
||||
MIi_SetExDmaYieldCycles( MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaInterval( 4, 107, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 105, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 103, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 101, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
OS_TPrintf("\nARM7 ends.\n");
|
||||
OS_Terminate();
|
||||
}
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: InitExDmaIntr
|
||||
|
||||
Description: initialize extended dma interrupt handler
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void InitExDmaIntr(void)
|
||||
{
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA4, ExDma4Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA5, ExDma5Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA6, ExDma6Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA7, ExDma7Intr );
|
||||
(void)OS_EnableIrqMask( OS_IE_DMA4 | OS_IE_DMA5 | OS_IE_DMA6 | OS_IE_DMA7 );
|
||||
(void)OS_EnableIrq();
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: ClearIntrCount
|
||||
|
||||
Description: clear interrupt counter
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void ClearIntrCount(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
OS_ResetRequestIrqMask( OS_IE_DMA4 | OS_IE_DMA5 | OS_IE_DMA6 | OS_IE_DMA7 );
|
||||
|
||||
for (i=0; i<MI_EXDMA_CH_NUM; i++)
|
||||
{
|
||||
exDmaIntrCount[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: PrintIntrCount
|
||||
|
||||
Description: print interrupt counter
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void PrintIntrCount(void)
|
||||
{
|
||||
OS_TPrintf( "\ninterrupt count: dma4 = %d, dma5 = %d, dma6 = %d, dma7 = %d.\n",
|
||||
exDmaIntrCount[0], exDmaIntrCount[1], exDmaIntrCount[2], exDmaIntrCount[3]);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: ExDmaIntr
|
||||
|
||||
Description: extended dma interrupt handler
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void ExDma4Intr(void)
|
||||
{
|
||||
u32 ofs = 4 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA4 );
|
||||
}
|
||||
|
||||
void ExDma5Intr(void)
|
||||
{
|
||||
u32 ofs = 5 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA5 );
|
||||
}
|
||||
|
||||
void ExDma6Intr(void)
|
||||
{
|
||||
u32 ofs = 6 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA6 );
|
||||
}
|
||||
|
||||
void ExDma7Intr(void)
|
||||
{
|
||||
u32 ofs = 7 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA7 );
|
||||
}
|
||||
|
||||
/*====== End of main.c ======*/
|
||||
42
build/tests/mi/allDma-1/ARM9/Makefile
Normal file
42
build/tests/mi/allDma-1/ARM9/Makefile
Normal file
@ -0,0 +1,42 @@
|
||||
#! make -f
|
||||
#----------------------------------------------------------------------------
|
||||
# Project: TwlSDK - OS - demos - allDma-1
|
||||
# File: Makefile
|
||||
#
|
||||
# Copyright 2007 Nintendo. All rights reserved.
|
||||
#
|
||||
# These coded instructions, statements, and computer programs contain
|
||||
# proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
# Company Ltd., and are protected by Federal copyright law. They may
|
||||
# not be disclosed to third parties or copied or duplicated in any form,
|
||||
# in whole or in part, without the prior written consent of Nintendo.
|
||||
#
|
||||
# $Log: $
|
||||
# $NoKeywords: $
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
|
||||
SUBDIRS =
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
TARGET_BIN = allDma9_1.axf
|
||||
|
||||
SRCS = main.c
|
||||
|
||||
#SRCDIR = # using default
|
||||
#LCFILE = # using default
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/commondefs
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
do-build: $(TARGETS)
|
||||
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/modulerules
|
||||
|
||||
|
||||
#===== End of Makefile =====
|
||||
703
build/tests/mi/allDma-1/ARM9/src/main.c
Normal file
703
build/tests/mi/allDma-1/ARM9/src/main.c
Normal file
@ -0,0 +1,703 @@
|
||||
/*---------------------------------------------------------------------------*
|
||||
Project: TwlSDK - MI - demos - allDma-1
|
||||
File: main.c
|
||||
|
||||
Copyright 2007 Nintendo. All rights reserved.
|
||||
|
||||
These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
Company Ltd., and are protected by Federal copyright law. They may
|
||||
not be disclosed to third parties or copied or duplicated in any form,
|
||||
in whole or in part, without the prior written consent of Nintendo.
|
||||
|
||||
$Log: $
|
||||
$NoKeywords: $
|
||||
*---------------------------------------------------------------------------*/
|
||||
#include <twl.h>
|
||||
#include <../build/libraries/mi/common/include/mi_dma.h>
|
||||
|
||||
|
||||
#define MY_DMA_WRAM ((t_TestBuf *)HW_WRAM_1_END)
|
||||
#define MY_TEST_LOOPS (sizeof(copyfillArg)/sizeof(t_CommonArg))
|
||||
#define ONE_BUF_SIZE 0x2004
|
||||
|
||||
#define MY_DMA_CH_START 1
|
||||
#define MY_DMA_CH_END 7
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u32 prePad __attribute__ ((aligned (32)));
|
||||
u16 src[8][ONE_BUF_SIZE/2] __attribute__ ((aligned (32)));
|
||||
u16 dest[8][ONE_BUF_SIZE/2] __attribute__ ((aligned (32)));
|
||||
u32 PostPad __attribute__ ((aligned (32)));
|
||||
}
|
||||
t_TestBuf;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2];
|
||||
u16 (*dest)[ONE_BUF_SIZE/2];
|
||||
char *copyStr;
|
||||
char *fillStr;
|
||||
}
|
||||
t_CommonArg;
|
||||
|
||||
|
||||
t_TestBuf testBuf __attribute__ ((aligned (32)));
|
||||
|
||||
t_CommonArg copyfillArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, testBuf.dest, "DmaCopy success on WRAM -> MAIN_MEM.\n", "DmaFill success on MAIN_MEM.\n", },
|
||||
{ testBuf.src, MY_DMA_WRAM->dest, "DmaCopy success on MAIN_MEM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopy success on WRAM -> WRAM.\n", "DmaFill success on WRAM.\n", },
|
||||
};
|
||||
|
||||
t_CommonArg stopArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, testBuf.dest, "Stopping DmaCopy success on WRAM -> MAIN_MEM.\n", "Stopping DmaFill success on MAIN_MEM.\n", },
|
||||
{ testBuf.src, MY_DMA_WRAM->dest, "Stopping DmaCopy success on MAIN_MEM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "Stopping DmaCopy success on WRAM -> WRAM.\n", "Stopping DmaFill success on WRAM.\n", },
|
||||
};
|
||||
|
||||
t_CommonArg copyfillAsyncArg[] =
|
||||
{
|
||||
{ testBuf.src, testBuf.dest, "DmaCopyAsync success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, testBuf.dest, "DmaCopyAsync success on WRAM -> MAIN_MEM.\n", "DmaFillAsync success on MAIN_MEM.\n", },
|
||||
{ testBuf.src, MY_DMA_WRAM->dest, "DmaCopyAsync success on MAIN_MEM -> WRAM.\n", NULL, },
|
||||
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopyAsync success on WRAM -> WRAM.\n", "DmaFillAsync success on WRAM.\n", },
|
||||
};
|
||||
|
||||
u32 exDmaIntrCount[MI_EXDMA_CH_NUM];
|
||||
|
||||
void InitExDmaIntr(void);
|
||||
void ClearIntrCount(void);
|
||||
void PrintIntrCount(void);
|
||||
void ExDma4Intr(void);
|
||||
void ExDma5Intr(void);
|
||||
void ExDma6Intr(void);
|
||||
void ExDma7Intr(void);
|
||||
|
||||
static BOOL CheckDmaCopy( u32 dmaNo, void *src, void *dest, const char *str )
|
||||
{
|
||||
BOOL ercd = TRUE;
|
||||
u8 *s = src;
|
||||
u8 *d = dest;
|
||||
int i;
|
||||
|
||||
for (i=0; i<ONE_BUF_SIZE; i++)
|
||||
{
|
||||
if ( s[i] != d[i] )
|
||||
{
|
||||
OS_TPrintf( "error: DmaCopy failed address = 0x%x count = 0x%x dmaNo = %d.\n", &d[i], i/2, dmaNo );
|
||||
OS_TPrintf( " src = 0x%02x dest = 0x%02x.\n", s[i], d[i] );
|
||||
ercd = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (str)
|
||||
{
|
||||
OS_TPrintf( str );
|
||||
}
|
||||
|
||||
return ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaFill( u32 dmaNo, void *dest, u32 data, char *str )
|
||||
{
|
||||
BOOL ercd = TRUE;
|
||||
u32 *d = dest;
|
||||
int i;
|
||||
|
||||
for (i=0; i<ONE_BUF_SIZE/4; i++)
|
||||
{
|
||||
if ( data != d[i] )
|
||||
{
|
||||
OS_TPrintf( "error: DmaFill failed address = 0x%x count = 0x%x dmaNo = %d.\n", &d[i], i/2, dmaNo );
|
||||
OS_TPrintf( " data = 0x%08x dest = 0x%08x.\n", data, d[i] );
|
||||
ercd = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (str)
|
||||
{
|
||||
OS_TPrintf( str );
|
||||
}
|
||||
|
||||
return ercd;
|
||||
}
|
||||
|
||||
|
||||
static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i, ii;
|
||||
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
for (ii=0; ii<ONE_BUF_SIZE/2; ii++)
|
||||
{
|
||||
src[i][ii] = (u16)(ii+i-data);
|
||||
}
|
||||
}
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
DC_FlushAll();
|
||||
IC_InvalidateAll();
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopy( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_DmaCopy32( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = copyStr;
|
||||
}
|
||||
c_ercd |= CheckDmaCopy( ch, s, d, str );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
DC_FlushAll();
|
||||
IC_InvalidateAll();
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFill( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_DmaFill32( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = fillStr;
|
||||
}
|
||||
f_ercd |= CheckDmaFill( ch, d, data+i, str );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i, ii;
|
||||
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
for (ii=0; ii<ONE_BUF_SIZE/2; ii++)
|
||||
{
|
||||
src[i][ii] = (u16)(ii+i-data);
|
||||
}
|
||||
}
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
DC_FlushAll();
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 191 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopyAsync( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams(ch, (u32)s, (u32)d, MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaCopyAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_WaitExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_WaitDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = copyStr;
|
||||
}
|
||||
c_ercd |= CheckDmaCopy( ch, s, d, str );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
DC_FlushAll();
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 191 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFillAsync( ch, d, data+i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams_src32(ch, data+i, (u32)d, (MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON) | MI_DMA_SRC_FIX);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaFillAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_WaitExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_WaitDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
char *str = NULL;
|
||||
|
||||
if ( i == MY_DMA_CH_START )
|
||||
{
|
||||
str = fillStr;
|
||||
}
|
||||
f_ercd |= CheckDmaFill( ch, d, data+i, str );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static BOOL CheckDmaStop( t_CommonArg *arg )
|
||||
{
|
||||
u16 (*src)[ONE_BUF_SIZE/2] = arg->src;
|
||||
u16 (*dest)[ONE_BUF_SIZE/2] = arg->dest;
|
||||
char *copyStr = arg->copyStr;
|
||||
char *fillStr = arg->fillStr;
|
||||
BOOL c_ercd = TRUE, f_ercd = TRUE;
|
||||
u32 i;
|
||||
|
||||
if ( copyStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 189 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *s = src[i];
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaCopyAsync( ch, s, d, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams(ch, (u32)s, (u32)d, MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaCopyAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_StopExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_StopDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == TRUE )
|
||||
{
|
||||
OS_TPrintf( "error: Stopping DmaCopy failed dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
if ( c_ercd == TRUE && copyStr )
|
||||
{
|
||||
OS_TPrintf( copyStr );
|
||||
}
|
||||
}
|
||||
|
||||
if ( fillStr )
|
||||
{
|
||||
while ( GX_GetVCount() != 189 )
|
||||
{
|
||||
}
|
||||
while ( GX_GetVCount() != 190 )
|
||||
{
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
u16 *d = dest[i];
|
||||
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_ExDmaFillAsync( ch, d, i, ONE_BUF_SIZE );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MIi_DmaSetParams_src32(ch, i, (u32)d, (MI_CNT_VBCOPY32(ONE_BUF_SIZE) & ~MI_DMA_CONTINUOUS_ON) | MI_DMA_SRC_FIX);
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == FALSE )
|
||||
{
|
||||
OS_TPrintf( "warning: DmaFillAsync isn't busy dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
MIi_StopExDma( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
MI_StopDma( ch );
|
||||
}
|
||||
}
|
||||
for (i=MY_DMA_CH_END; i>=MY_DMA_CH_START; i--)
|
||||
{
|
||||
u32 ch = i;
|
||||
BOOL bool = FALSE;
|
||||
if (MI_EXDMA_CH_MIN <= ch && ch <= MI_EXDMA_CH_MAX)
|
||||
{
|
||||
bool = MIi_IsExDmaBusy( ch );
|
||||
}
|
||||
else if (ch < MI_EXDMA_CH_MIN)
|
||||
{
|
||||
bool = MI_IsDmaBusy( ch );
|
||||
}
|
||||
if ( bool == TRUE )
|
||||
{
|
||||
OS_TPrintf( "error: Stopping DmaFill failed dmaNo = %d.\n", ch );
|
||||
}
|
||||
}
|
||||
if ( f_ercd == TRUE && fillStr )
|
||||
{
|
||||
OS_TPrintf( fillStr );
|
||||
}
|
||||
}
|
||||
|
||||
return c_ercd | f_ercd;
|
||||
}
|
||||
|
||||
static void TestDmaFuncs( void )
|
||||
{
|
||||
u32 i;
|
||||
|
||||
ClearIntrCount();
|
||||
|
||||
// sync copy and fill test
|
||||
OS_TPrintf( "\nChecking DmaCopy and DmaFill ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaCopyAndFill( ©fillArg[i], i );
|
||||
}
|
||||
|
||||
// async copy and fill test
|
||||
OS_TPrintf( "\nChecking DmaCopyAsync and DmaFillAsync ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaCopyAndFillAsync( ©fillAsyncArg[i], i );
|
||||
}
|
||||
|
||||
// stop test
|
||||
OS_TPrintf( "\nChecking DmaStop ....\n" );
|
||||
for (i=0; i<MY_TEST_LOOPS; i++)
|
||||
{
|
||||
(void)CheckDmaStop( &stopArg[i] );
|
||||
}
|
||||
|
||||
PrintIntrCount();
|
||||
}
|
||||
|
||||
|
||||
//================================================================================
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: TwlMain
|
||||
|
||||
Description: main
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void TwlMain()
|
||||
{
|
||||
OS_Init();
|
||||
|
||||
InitExDmaIntr();
|
||||
|
||||
OS_TPrintf("\nARM9 starts.\n");
|
||||
|
||||
// OS_DisableProtectionUnit();
|
||||
|
||||
// priority dma test
|
||||
OS_TPrintf( "\nTurn into Priority Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_PRIORITY );
|
||||
MIi_SetExDmaInterval( 4, 595, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 580, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 565, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 550, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
// round robin dma test
|
||||
OS_TPrintf( "\nTurn into Round Robin Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_ROUND_ROBIN );
|
||||
MIi_SetExDmaYieldCycles( MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaInterval( 4, 115, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 111, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 107, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 104, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
OS_TPrintf("\nARM9 ends.\n");
|
||||
OS_Terminate();
|
||||
}
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: InitExDmaIntr
|
||||
|
||||
Description: initialize extended dma interrupt handler
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void InitExDmaIntr(void)
|
||||
{
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA4, ExDma4Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA5, ExDma5Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA6, ExDma6Intr );
|
||||
(void)OS_SetIrqFunction( OS_IE_DMA7, ExDma7Intr );
|
||||
(void)OS_EnableIrqMask( OS_IE_DMA4 | OS_IE_DMA5 | OS_IE_DMA6 | OS_IE_DMA7 );
|
||||
(void)OS_EnableIrq();
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: ClearIntrCount
|
||||
|
||||
Description: clear interrupt counter
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void ClearIntrCount(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
OS_ResetRequestIrqMask( OS_IE_DMA4 | OS_IE_DMA5 | OS_IE_DMA6 | OS_IE_DMA7 );
|
||||
|
||||
for (i=0; i<MI_EXDMA_CH_NUM; i++)
|
||||
{
|
||||
exDmaIntrCount[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: PrintIntrCount
|
||||
|
||||
Description: print interrupt counter
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void PrintIntrCount(void)
|
||||
{
|
||||
OS_TPrintf( "\ninterrupt count: dma4 = %d, dma5 = %d, dma6 = %d, dma7 = %d.\n",
|
||||
exDmaIntrCount[0], exDmaIntrCount[1], exDmaIntrCount[2], exDmaIntrCount[3]);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: ExDmaIntr
|
||||
|
||||
Description: extended dma interrupt handler
|
||||
|
||||
Arguments: None
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void ExDma4Intr(void)
|
||||
{
|
||||
u32 ofs = 4 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA4 );
|
||||
}
|
||||
|
||||
void ExDma5Intr(void)
|
||||
{
|
||||
u32 ofs = 5 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA5 );
|
||||
}
|
||||
|
||||
void ExDma6Intr(void)
|
||||
{
|
||||
u32 ofs = 6 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA6 );
|
||||
}
|
||||
|
||||
void ExDma7Intr(void)
|
||||
{
|
||||
u32 ofs = 7 - MI_EXDMA_CH_MIN;
|
||||
|
||||
exDmaIntrCount[ofs]++;
|
||||
|
||||
//---- check interrupt flag
|
||||
OS_SetIrqCheckFlag( OS_IE_DMA7 );
|
||||
}
|
||||
|
||||
/*====== End of main.c ======*/
|
||||
32
build/tests/mi/allDma-1/Makefile
Normal file
32
build/tests/mi/allDma-1/Makefile
Normal file
@ -0,0 +1,32 @@
|
||||
#! make -f
|
||||
#----------------------------------------------------------------------------
|
||||
# Project: TwlSDK - build
|
||||
# File: Makefile
|
||||
#
|
||||
# Copyright 2007 Nintendo. All rights reserved.
|
||||
#
|
||||
# These coded instructions, statements, and computer programs contain
|
||||
# proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
# Company Ltd., and are protected by Federal copyright law. They may
|
||||
# not be disclosed to third parties or copied or duplicated in any form,
|
||||
# in whole or in part, without the prior written consent of Nintendo.
|
||||
#
|
||||
# $Log: $
|
||||
# $NoKeywords: $
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/commondefs
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
SUBDIRS = \
|
||||
ARM7 \
|
||||
ARM9 \
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
include $(TWLSDK_ROOT)/build/buildtools/modulerules
|
||||
|
||||
|
||||
#===== End of Makefile =====
|
||||
@ -1,6 +1,6 @@
|
||||
#! make -f
|
||||
#----------------------------------------------------------------------------
|
||||
# Project: TwlSDK - OS - demos - _ARM7-exDma-1
|
||||
# Project: TwlSDK - OS - demos - exDma-1
|
||||
# File: Makefile
|
||||
#
|
||||
# Copyright 2007 Nintendo. All rights reserved.
|
||||
@ -23,7 +23,7 @@ SUBDIRS =
|
||||
#TWL_CODEGEN = THUMB
|
||||
TWL_PROC = ARM7
|
||||
|
||||
TARGET_BIN = main.axf
|
||||
TARGET_BIN = exDma7_1.axf
|
||||
|
||||
SRCS = main.c
|
||||
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
Project: TwlSDK - MI - demos - exDma-1
|
||||
File: main.c
|
||||
|
||||
Copyright 2003-2006 Nintendo. All rights reserved.
|
||||
Copyright 2007 Nintendo. All rights reserved.
|
||||
|
||||
These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
@ -392,14 +392,23 @@ void TwlMain()
|
||||
// priority dma test
|
||||
OS_TPrintf( "\nTurn into Priority Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_PRIORITY, MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_PRIORITY );
|
||||
MIi_SetExDmaInterval( 4, 495, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 480, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 465, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 450, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
// round robin dma test
|
||||
OS_TPrintf( "\nTurn into Round Robin Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_ROUND_ROBIN, MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_ROUND_ROBIN );
|
||||
MIi_SetExDmaYieldCycles( MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaInterval( 4, 7, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 5, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 3, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 1, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
|
||||
@ -21,7 +21,7 @@ SUBDIRS =
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
TARGET_BIN = exDma.axf
|
||||
TARGET_BIN = exDma9_1.axf
|
||||
|
||||
SRCS = main.c
|
||||
|
||||
|
||||
@ -401,14 +401,23 @@ void TwlMain()
|
||||
// priority dma test
|
||||
OS_TPrintf( "\nTurn into Priority Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_PRIORITY, MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_PRIORITY );
|
||||
MIi_SetExDmaInterval( 4, 595, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 580, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 565, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 550, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
// round robin dma test
|
||||
OS_TPrintf( "\nTurn into Round Robin Mode.\n" );
|
||||
|
||||
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_ROUND_ROBIN, MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaArbitration( MI_EXDMAGBL_ARB_ROUND_ROBIN );
|
||||
MIi_SetExDmaYieldCycles( MI_EXDMAGBL_YLD_CYCLE_DEFAULT );
|
||||
MIi_SetExDmaInterval( 4, 15, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 5, 11, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 6, 7, MI_EXDMA_PRESCALER_1 );
|
||||
MIi_SetExDmaInterval( 7, 4, MI_EXDMA_PRESCALER_1 );
|
||||
|
||||
TestDmaFuncs();
|
||||
|
||||
|
||||
@ -551,16 +551,39 @@ void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 o
|
||||
u32 fillData, u32 srcDir, u32 destDir);
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaArbiter
|
||||
Name: MIi_SetExDmaInterval
|
||||
|
||||
Description: set DMA interval
|
||||
|
||||
Arguments: dmaNo : DMA channel No.
|
||||
count : count
|
||||
prescale : prescale
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaInterval( u32 dmaNo, u16 count, MIExDmaPrescaler prescale );
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaArbitration
|
||||
|
||||
Description: set DMA arbitration
|
||||
|
||||
Arguments: arb : arbitration algorism
|
||||
yld : yield cycles for round robin
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaArbiter( MIExDmaArbitration arb, MIExDmaYieldCycles yld );
|
||||
void MIi_SetExDmaArbitration( MIExDmaArbitration arb );
|
||||
|
||||
/*---------------------------------------------------------------------------*
|
||||
Name: MIi_SetExDmaYieldCycles
|
||||
|
||||
Description: set DMA yield cycles
|
||||
|
||||
Arguments: yld : yield cycles for round robin
|
||||
|
||||
Returns: None
|
||||
*---------------------------------------------------------------------------*/
|
||||
void MIi_SetExDmaYieldCycles( MIExDmaYieldCycles yld );
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
Loading…
Reference in New Issue
Block a user