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move HW_PRV_WRAM_SYSRV.

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add interrupt test into aes test.

git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@54 4ee2a332-4b2b-5046-8439-1ba90f034370
This commit is contained in:
nakasima 2007-04-28 05:52:28 +00:00
parent 5fd3c4e533
commit ab4936531a
2 changed files with 77 additions and 1 deletions
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76
build/tests/aes/_ARM7-aes-1/src/main.c
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@ -15,6 +15,8 @@
*---------------------------------------------------------------------------*/
#include <twl.h>
#define ENABLE_INTERRUPT_TEST
#define PRIORITY 5
#define INPUT_DMA 4
@ -197,6 +199,72 @@ static void test2(void)
OS_TPrintf("Result: %s\n", AES_IsValid() ? "Success" : "Failed");
}
static u32 intrCounter[3];
static u8 aesID;
static u8 inputDmaID;
static u8 outputDmaID;
static void AesIntr(void)
{
intrCounter[aesID]++;
//---- check interrupt flag
OS_SetIrqCheckFlag( OS_IE_AES );
}
static void InputDmaIntr(void)
{
u32 ofs = INPUT_DMA - MI_EXDMA_CH_MIN;
OSIrqMask mask = OS_IE_DMA4 << ofs;
intrCounter[inputDmaID]++;
//---- check interrupt flag
OS_SetIrqCheckFlag( mask );
}
static void OutputDmaIntr(void)
{
u32 ofs = OUTPUT_DMA - MI_EXDMA_CH_MIN;
OSIrqMask mask = OS_IE_DMA4 << ofs;
intrCounter[outputDmaID]++;
//---- check interrupt flag
OS_SetIrqCheckFlag( mask );
}
static void InitAesDmaIntr(void)
{
u32 i_ofs = INPUT_DMA - MI_EXDMA_CH_MIN;
u32 o_ofs = OUTPUT_DMA - MI_EXDMA_CH_MIN;
OSIrqMask i_mask = OS_IE_DMA4 << i_ofs;
OSIrqMask o_mask = OS_IE_DMA4 << o_ofs;
u8 id_alloc = 0;
BOOL ime = OS_DisableIrq();
aesID = id_alloc++;
inputDmaID = id_alloc++;
outputDmaID = id_alloc++;
(void)OS_DisableIrqMask( OS_IE_AES | i_mask | o_mask );
(void)OS_ResetRequestIrqMask( OS_IE_AES | i_mask | o_mask );
(void)OS_SetIrqFunction( OS_IE_AES, AesIntr );
(void)OS_SetIrqFunction( i_mask, InputDmaIntr );
(void)OS_SetIrqFunction( o_mask, OutputDmaIntr );
(void)OS_EnableIrqMask( OS_IE_AES | i_mask | o_mask );
(void)OS_RestoreIrq( ime );
}
static void PrintIntrCount(void)
{
OS_TPrintf( "\ninterrupt count: aes = %d, input_dma = %d, output_dma = %d.\n",
intrCounter[aesID], intrCounter[inputDmaID], intrCounter[outputDmaID]);
}
/*---------------------------------------------------------------------------*
Name: TwlMain
@ -215,6 +283,10 @@ void TwlMain()
OS_InitTick();
#ifdef ENABLE_INTERRUPT_TEST
InitAesDmaIntr();
#endif
OS_TPrintf("Debug Info:\n");
OS_TPrintf("\tdataA = 0x%08X\n", dataA);
OS_TPrintf("\tdataB = 0x%08X\n", dataB);
@ -233,6 +305,10 @@ void TwlMain()
AES_Unlock(); // ARM9側からも利用するときのみ必要
#ifdef ENABLE_INTERRUPT_TEST
PrintIntrCount();
#endif
// done
OS_TPrintf("\nARM7 ends.\n");
OS_Terminate();

2
include/nitro/hw/ARM7/mmap_wram.h
View File

@ -86,7 +86,7 @@ extern "C" {
//#define HW_PRV_WRAM_RED_RESERVED_END (HW_PRV_WRAM + 0xfc40)
//---- offset in system reserved area (tentatively)
#define HW_PRV_WRAM_SYSRV (HW_PRV_WRAM + HW_PRV_WRAM_SIZE - HW_PRV_WRAM_SYSRV_SIZE) // (HW_WRAM_AREA_END - HW_PRV_WRAM_SYSRV_SIZE)
#define HW_PRV_WRAM_SYSRV (HW_WRAM_AREA_END - HW_PRV_WRAM_SYSRV_SIZE) // (HW_PRV_WRAM + HW_PRV_WRAM_SIZE - HW_PRV_WRAM_SYSRV_SIZE)
#define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK2 0x00
#define HW_PRV_WRAM_SYSRV_OFS_EXCP_STACK 0x10
#define HW_PRV_WRAM_SYSRV_OFS_EXCP_STACK_END 0x1c