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add OSi_IsRunOnDebuggerTWL. change EDMA into EXDMA.

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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@39 4ee2a332-4b2b-5046-8439-1ba90f034370
This commit is contained in:
nakasima 2007-04-24 04:08:29 +00:00
parent 7565327240
commit 78b596d0ce
9 changed files with 330 additions and 192 deletions
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160
build/libraries/mi/common/mi_exDma.c
View File

@ -36,7 +36,7 @@ static u32 intervalTable[] =
Returns: None
*---------------------------------------------------------------------------*/
void MIi_SetExDmaArbiter( MIEDmaArbitration arb, MIEDmaYieldCycles yld )
void MIi_SetExDmaArbiter( MIExDmaArbitration arb, MIExDmaYieldCycles yld )
{
OSIntrMode enabled = OS_DisableInterrupts();
@ -62,17 +62,17 @@ void MIi_SetExDmaArbiter( MIEDmaArbitration arb, MIEDmaYieldCycles yld )
*---------------------------------------------------------------------------*/
void MIi_ExDmaFill( u32 dmaNo, void *dest, u32 data, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaFillCore( dmaNo, dest, data, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -91,17 +91,17 @@ void MIi_ExDmaFill( u32 dmaNo, void *dest, u32 data, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopy( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaCopyCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -120,17 +120,17 @@ void MIi_ExDmaCopy( u32 dmaNo, const void *src, void *dest, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaSend( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaSendCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -149,17 +149,17 @@ void MIi_ExDmaSend( u32 dmaNo, const void *src, void *dest, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecv( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaRecvCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -178,17 +178,17 @@ void MIi_ExDmaRecv( u32 dmaNo, const void *src, void *dest, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaFillAsync( u32 dmaNo, void *dest, u32 data, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaFillAsyncCore( dmaNo, dest, data, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -207,17 +207,17 @@ void MIi_ExDmaFillAsync( u32 dmaNo, void *dest, u32 data, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopyAsync( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaCopyAsyncCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM);
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM);
}
}
@ -236,17 +236,17 @@ void MIi_ExDmaCopyAsync( u32 dmaNo, const void *src, void *dest, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaSendAsync( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaSendAsyncCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -265,17 +265,17 @@ void MIi_ExDmaSendAsync( u32 dmaNo, const void *src, void *dest, u32 size )
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecvAsync( u32 dmaNo, const void *src, void *dest, u32 size )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaBlockSize blockSize = MI_EDMA_BLOCK_32B;
MIExDmaBlockSize blockSize = MI_EXDMA_BLOCK_32B;
u32 interval = intervalTable[idx];
MIEDmaPrescaler prescale = MI_EDMA_PRESCALER_1;
MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1;
MIi_ExDmaRecvAsyncCore( dmaNo, src, dest, size, size,
blockSize, interval, prescale,
MI_EDMA_CONTINUOUS_OFF, MI_EDMA_SRC_RLD_OFF, MI_EDMA_DEST_RLD_OFF,
MI_EDMA_TIMING_IMM );
MI_EXDMA_CONTINUOUS_OFF, MI_EXDMA_SRC_RLD_OFF, MI_EXDMA_DEST_RLD_OFF,
MI_EXDMA_TIMING_IMM );
}
}
@ -296,9 +296,9 @@ void MIi_ExDmaRecvAsync( u32 dmaNo, const void *src, void *dest, u32 size )
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaFillCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_ExDmaFillAsyncCore( dmaNo, dest, data, size, oneShotSize,
blockSize, interval, prescale,
@ -323,9 +323,9 @@ void MIi_ExDmaFillCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSi
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopyCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_ExDmaCopyAsyncCore( dmaNo, src, dest, size, oneShotSize,
blockSize, interval, prescale,
@ -350,9 +350,9 @@ void MIi_ExDmaCopyCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaSendCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_ExDmaSendAsyncCore( dmaNo, src, dest, size, oneShotSize,
blockSize, interval, prescale,
@ -377,9 +377,9 @@ void MIi_ExDmaSendCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecvCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_ExDmaRecvAsyncCore( dmaNo, src, dest, size, oneShotSize,
blockSize, interval, prescale,
@ -404,12 +404,12 @@ void MIi_ExDmaRecvCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
const void *src = NULL;
u32 srcDir = MI_EDMA_SRC_FILLREG;
u32 srcDir = MI_EXDMA_SRC_FILLREG;
MIi_WaitExDma( dmaNo );
@ -417,7 +417,7 @@ void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneS
blockSize, interval, prescale,
continuous, srcRld, destRld,
timing,
data, srcDir, MI_EDMA_DEST_INC );
data, srcDir, MI_EXDMA_DEST_INC );
}
/*---------------------------------------------------------------------------*
@ -435,9 +435,9 @@ void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneS
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_WaitExDma( dmaNo );
@ -445,7 +445,7 @@ void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
blockSize, interval, prescale,
continuous, srcRld, destRld,
timing,
0, MI_EDMA_SRC_INC, MI_EDMA_DEST_INC );
0, MI_EXDMA_SRC_INC, MI_EXDMA_DEST_INC );
}
/*---------------------------------------------------------------------------*
@ -463,9 +463,9 @@ void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_WaitExDma( dmaNo );
@ -473,7 +473,7 @@ void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
blockSize, interval, prescale,
continuous, srcRld, destRld,
timing,
0, MI_EDMA_SRC_INC, MI_EDMA_DEST_FIX );
0, MI_EXDMA_SRC_INC, MI_EXDMA_DEST_FIX );
}
/*---------------------------------------------------------------------------*
@ -491,9 +491,9 @@ void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_WaitExDma( dmaNo );
@ -501,7 +501,7 @@ void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
blockSize, interval, prescale,
continuous, srcRld, destRld,
timing,
0, MI_EDMA_SRC_FIX, MI_EDMA_DEST_INC );
0, MI_EXDMA_SRC_FIX, MI_EXDMA_DEST_INC );
}
/*---------------------------------------------------------------------------*
@ -519,9 +519,9 @@ void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaBypassAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing )
MIExDmaTiming timing )
{
MIi_WaitExDma( dmaNo );
@ -529,7 +529,7 @@ void MIi_ExDmaBypassAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size,
blockSize, interval, prescale,
continuous, srcRld, destRld,
timing,
0, MI_EDMA_SRC_FIX, MI_EDMA_DEST_FIX );
0, MI_EXDMA_SRC_FIX, MI_EXDMA_DEST_FIX );
}
/*---------------------------------------------------------------------------*
@ -547,31 +547,31 @@ void MIi_ExDmaBypassAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size,
Returns: None
*---------------------------------------------------------------------------*/
void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing,
MIExDmaTiming timing,
u32 fillData, u32 srcDir, u32 destDir )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
if ( idx < MI_EDMA_CH_NUM )
if ( idx < MI_EXDMA_CH_NUM )
{
OSIntrMode enabled = OS_DisableInterrupts();
MIEDmaChanRegs *reg = &((MIEDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
reg->src = src;
reg->dest = dest;
reg->fillData = fillData;
reg->totalCount = size / 4;
reg->wordCount = oneShotSize / 4;
reg->blockInterval = (interval << MI_EDMABCNT_INTERVAL_SHIFT) | prescale;
reg->blockInterval = (interval << MI_EXDMABCNT_INTERVAL_SHIFT) | prescale;
reg->ctrl = blockSize
| srcDir | destDir
| srcRld | destRld
| continuous
| timing
| MI_EDMA_ENABLE | MI_EDMA_IF_ENABLE;
| MI_EXDMA_ENABLE | MI_EXDMA_IF_ENABLE;
(void)OS_RestoreInterrupts(enabled);
}
@ -591,10 +591,10 @@ void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 o
*---------------------------------------------------------------------------*/
BOOL MIi_IsExDmaBusy( u32 dmaNo )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaChanRegs *reg = &((MIEDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
return (BOOL)((reg->ctrl & REG_MI_DMA4CNT_E_MASK) >> REG_MI_DMA4CNT_E_SHIFT);
}
@ -611,10 +611,10 @@ BOOL MIi_IsExDmaBusy( u32 dmaNo )
*---------------------------------------------------------------------------*/
void MIi_WaitExDma( u32 dmaNo )
{
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
{
MIEDmaChanRegs *reg = &((MIEDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
while (reg->ctrl & REG_MI_DMA4CNT_E_MASK)
{
@ -635,13 +635,13 @@ void MIi_StopExDma( u32 dmaNo )
{
OSIntrMode enabled = OS_DisableInterrupts();
u32 idx = dmaNo - MI_EDMA_CH_MIN;
u32 idx = dmaNo - MI_EXDMA_CH_MIN;
if ( idx < MI_EDMA_CH_NUM )
if ( idx < MI_EXDMA_CH_NUM )
{
MIEDmaChanRegs *reg = &((MIEDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
MIExDmaChanRegs *reg = &((MIExDmaChanRegs*)REG_DMA4SAD_ADDR)[idx];
reg->ctrl &= ~MI_EDMA_ENABLE;
reg->ctrl &= ~MI_EXDMA_ENABLE;
}
(void)OS_RestoreInterrupts(enabled);

3
build/libraries/mi/common/mi_init.c
View File

@ -47,5 +47,6 @@ void MI_Init(void)
//---- add for TWL
//---- DMA arbitration
MIi_SetExDmaArbiter( MI_EDMAGBL_ARB_ROUND_ROBIN, MI_EDMAGBL_YLD_CYCLE_16 );
// this value depends on that the cache line read from the main memory is 20 cycles.
MIi_SetExDmaArbiter( MI_EXDMAGBL_ARB_ROUND_ROBIN, MI_EXDMAGBL_YLD_CYCLE_32 );
}

30
build/libraries/os/common/os_emulator.c
View File

@ -83,7 +83,7 @@
$NoKeywords: $
*---------------------------------------------------------------------------*/
#include <nitro.h>
#include <twl.h>
//---- current processor lock flag
#ifdef SDK_ARM9
@ -271,3 +271,31 @@ BOOL OSi_IsRunOnDebugger(void)
return (*checkAddress == 1) ? TRUE : FALSE;
}
/*---------------------------------------------------------------------------*
Name: OSi_IsRunOnDebuggerTWL
Description: Detect TWL-Debugger
(subroutine of OS_GetConsoleType)
Arguments: None
Returns: TRUE : debugger
FALSE : not debugger
*---------------------------------------------------------------------------*/
#ifdef SDK_ARM7
BOOL OSi_IsRunOnDebuggerTWL(void)
{
// デバッガの対応により、JTAG-DEBUG通信割り込みによる検出の可能性もある（NANDファームにてJTAGイネーブル）。
// DEBUGボタンによる検出などはセキュリティ上の問題がある（デバッガへのなりすましが容易）。
OSChipType type = (OSChipType)(reg_CFG_BONDING & REG_CFG_BONDING_CHIP_TYPE_MASK);
BOOL retval = FALSE;
// if ( type == OS_CHIPTYPE_DEBUGGER || type == OS_CHIPTYPE_EVALUATE )
{
retval = TRUE;
}
return retval;
}
#endif // SDK_ARM7

1
include/twl.h
View File

@ -18,6 +18,7 @@
#include <nitro.h>
#include <twl/os.h>
#include <twl/mi.h>
#include <twl/vlink.h>

218
include/twl/mi/exDma.h
View File

@ -28,80 +28,80 @@ extern "C" {
//---- timing
typedef enum
{
MI_EDMA_TIMING_IMM = (0x10UL << REG_MI_DMA4CNT_TIMING_SHIFT), // start immediately
MI_EDMA_TIMING_TM0 = (0x0UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 0
MI_EDMA_TIMING_TM1 = (0x1UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 1
MI_EDMA_TIMING_TM2 = (0x2UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 2
MI_EDMA_TIMING_TM3 = (0x3UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 3
MI_EDMA_TIMING_V_BLANK = (0x4UL << REG_MI_DMA4CNT_TIMING_SHIFT), // VBlank
MI_EDMA_TIMING_GCD = (0x7UL << REG_MI_DMA4CNT_TIMING_SHIFT), // card
MI_EDMA_TIMING_SD = (0x8UL << REG_MI_DMA4CNT_TIMING_SHIFT), // SD
MI_EDMA_TIMING_CAMERA = (0x9UL << REG_MI_DMA4CNT_TIMING_SHIFT), // camera
MI_EDMA_TIMING_AES_IN = (0xAUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES input
MI_EDMA_TIMING_AES_OUT = (0xBUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES output
MI_EDMA_TIMING_MIC = (0xCUL << REG_MI_DMA4CNT_TIMING_SHIFT) // MIC
MI_EXDMA_TIMING_IMM = (0x10UL << REG_MI_DMA4CNT_TIMING_SHIFT), // start immediately
MI_EXDMA_TIMING_TM0 = (0x0UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 0
MI_EXDMA_TIMING_TM1 = (0x1UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 1
MI_EXDMA_TIMING_TM2 = (0x2UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 2
MI_EXDMA_TIMING_TM3 = (0x3UL << REG_MI_DMA4CNT_TIMING_SHIFT), // timer 3
MI_EXDMA_TIMING_V_BLANK = (0x4UL << REG_MI_DMA4CNT_TIMING_SHIFT), // VBlank
MI_EXDMA_TIMING_GCD = (0x7UL << REG_MI_DMA4CNT_TIMING_SHIFT), // card
MI_EXDMA_TIMING_SD = (0x8UL << REG_MI_DMA4CNT_TIMING_SHIFT), // SD
MI_EXDMA_TIMING_CAMERA = (0x9UL << REG_MI_DMA4CNT_TIMING_SHIFT), // camera
MI_EXDMA_TIMING_AES_IN = (0xAUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES input
MI_EXDMA_TIMING_AES_OUT = (0xBUL << REG_MI_DMA4CNT_TIMING_SHIFT), // AES output
MI_EXDMA_TIMING_MIC = (0xCUL << REG_MI_DMA4CNT_TIMING_SHIFT) // MIC
}
MIEDmaTiming;
MIExDmaTiming;
//---- block size
typedef enum
{
MI_EDMA_BLOCK_4B = (0x0UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_8B = (0x1UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_16B = (0x2UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_32B = (0x3UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_64B = (0x4UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_128B = (0x5UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_256B = (0x6UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_512B = (0x7UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_1KB = (0x8UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_2KB = (0x9UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_4KB = (0xAUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_8KB = (0xBUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_16KB = (0xCUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_32KB = (0xDUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_64KB = (0xEUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EDMA_BLOCK_128KB = (0xFUL << REG_MI_DMA4CNT_BSIZE_SHIFT)
MI_EXDMA_BLOCK_4B = (0x0UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_8B = (0x1UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_16B = (0x2UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_32B = (0x3UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_64B = (0x4UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_128B = (0x5UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_256B = (0x6UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_512B = (0x7UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_1KB = (0x8UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_2KB = (0x9UL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_4KB = (0xAUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_8KB = (0xBUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_16KB = (0xCUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_32KB = (0xDUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_64KB = (0xEUL << REG_MI_DMA4CNT_BSIZE_SHIFT),
MI_EXDMA_BLOCK_128KB = (0xFUL << REG_MI_DMA4CNT_BSIZE_SHIFT)
}
MIEDmaBlockSize;
MIExDmaBlockSize;
//---- pre-scaler
typedef enum
{
MI_EDMA_PRESCALER_1 = (0UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 1
MI_EDMA_PRESCALER_4 = (1UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 4
MI_EDMA_PRESCALER_16 = (2UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 16
MI_EDMA_PRESCALER_64 = (3UL << REG_MI_DMA4BCNT_PS_SHIFT) // x 64
MI_EXDMA_PRESCALER_1 = (0UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 1
MI_EXDMA_PRESCALER_4 = (1UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 4
MI_EXDMA_PRESCALER_16 = (2UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 16
MI_EXDMA_PRESCALER_64 = (3UL << REG_MI_DMA4BCNT_PS_SHIFT) // x 64
}
MIEDmaPrescaler;
MIExDmaPrescaler;
//---- yield cycle
typedef enum
{
MI_EDMAGBL_YLD_CYCLE_0 = (0x0UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_1 = (0x1UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_2 = (0x2UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_4 = (0x3UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_8 = (0x4UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_16 = (0x5UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_32 = (0x6UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_64 = (0x7UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_128 = (0x8UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_256 = (0x9UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_512 = (0xAUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_1K = (0xBUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_2K = (0xCUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_4K = (0xDUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_8K = (0xEUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EDMAGBL_YLD_CYCLE_16K = (0xFUL << REG_MI_DMAGBL_YLD_SHIFT)
MI_EXDMAGBL_YLD_CYCLE_0 = (0x0UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_1 = (0x1UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_2 = (0x2UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_4 = (0x3UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_8 = (0x4UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_16 = (0x5UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_32 = (0x6UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_64 = (0x7UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_128 = (0x8UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_256 = (0x9UL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_512 = (0xAUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_1K = (0xBUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_2K = (0xCUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_4K = (0xDUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_8K = (0xEUL << REG_MI_DMAGBL_YLD_SHIFT),
MI_EXDMAGBL_YLD_CYCLE_16K = (0xFUL << REG_MI_DMAGBL_YLD_SHIFT)
}
MIEDmaYieldCycles;
MIExDmaYieldCycles;
//---- arbotration
typedef u32 MIEDmaArbitration;
typedef u32 MIExDmaArbitration;
#define MI_EDMAGBL_ARB_PRIORITY (0UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by priority
#define MI_EDMAGBL_ARB_ROUND_ROBIN (1UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by round robin
#define MI_EXDMAGBL_ARB_PRIORITY (0UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by priority
#define MI_EXDMAGBL_ARB_ROUND_ROBIN (1UL << REG_MI_DMAGBL_ARB_SHIFT) // arbotration by round robin
//---- registers
@ -115,69 +115,69 @@ typedef struct
u32 fillData;
u32 ctrl;
}
t_MIEDmaChanRegs;
t_MIExDmaChanRegs;
typedef volatile t_MIEDmaChanRegs MIEDmaChanRegs;
typedef volatile t_MIExDmaChanRegs MIExDmaChanRegs;
//================================================================================
// DMA control definition
//================================================================================
//---- DMA channel No.
#define MI_EDMA_CH_MIN 4
#define MI_EDMA_CH_MAX 7
#define MI_EXDMA_CH_MIN 4
#define MI_EXDMA_CH_MAX 7
#define MI_EDMA_CH_NUM 4
#define MI_EXDMA_CH_NUM 4
//---- enable
#define MI_EDMA_ENABLE (1UL << REG_MI_DMA4CNT_E_SHIFT) // DMA enable
#define MI_EDMA_IF_ENABLE (1UL << REG_MI_DMA4CNT_I_SHIFT) // interrupt enable
#define MI_EXDMA_ENABLE (1UL << REG_MI_DMA4CNT_E_SHIFT) // DMA enable
#define MI_EXDMA_IF_ENABLE (1UL << REG_MI_DMA4CNT_I_SHIFT) // interrupt enable
//---- continuous mode
#define MI_EDMA_CONTINUOUS_OFF (0UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode off
#define MI_EDMA_CONTINUOUS_ON (1UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode on
#define MI_EXDMA_CONTINUOUS_OFF (0UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode off
#define MI_EXDMA_CONTINUOUS_ON (1UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode on
//---- DMA timing
#if 0
# define MI_EDMA_TIMING_MASK (REG_MI_DMA4CNT_TIMING_MASK) // mask of start field
# define MI_EDMA_TIMING_SHIFT (REG_MI_DMA4CNT_TIMING_SHIFT) // shift of start field
# define MI_EDMA_TIMING_IMM (0UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start immediately
# define MI_EDMA_TIMING_V_BLANK (1UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start by VBlank
# define MI_EDMA_TIMING_CARD (2UL << REG_MI_DMA4CNT_TIMING_SHIFT) // card
# define MI_EDMA_TIMING_WIRELESS (3UL << REG_MI_DMA4CNT_TIMING_SHIFT) // DMA4,2:wireless interrupt
# define MI_EDMA_TIMING_CARTRIDGE MI_DMA_TIMING_WIRELESS // DMA1,3:cartridge warning
# define MI_EXDMA_TIMING_MASK (REG_MI_DMA4CNT_TIMING_MASK) // mask of start field
# define MI_EXDMA_TIMING_SHIFT (REG_MI_DMA4CNT_TIMING_SHIFT) // shift of start field
# define MI_EXDMA_TIMING_IMM (0UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start immediately
# define MI_EXDMA_TIMING_V_BLANK (1UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start by VBlank
# define MI_EXDMA_TIMING_CARD (2UL << REG_MI_DMA4CNT_TIMING_SHIFT) // card
# define MI_EXDMA_TIMING_WIRELESS (3UL << REG_MI_DMA4CNT_TIMING_SHIFT) // DMA4,2:wireless interrupt
# define MI_EXDMA_TIMING_CARTRIDGE MI_DMA_TIMING_WIRELESS // DMA1,3:cartridge warning
#endif
//---- block size
#define MI_EDMA_BLOCK_SIZE_MASK (REG_MI_DMA4CNT_BSIZE_MASK) // mask of block size
#define MI_EDMA_BLOCK_SIZE_SHIFT (REG_MI_DMA4CNT_BSIZE_SHIFT) // shift of block size
#define MI_EXDMA_BLOCK_SIZE_MASK (REG_MI_DMA4CNT_BSIZE_MASK) // mask of block size
#define MI_EXDMA_BLOCK_SIZE_SHIFT (REG_MI_DMA4CNT_BSIZE_SHIFT) // shift of block size
//---- direction of src/destination address
#define MI_EDMA_SRC_INC (0UL << REG_MI_DMA4CNT_SAR_SHIFT) // increment source address
#define MI_EDMA_SRC_DEC (1UL << REG_MI_DMA4CNT_SAR_SHIFT) // decrement source address
#define MI_EDMA_SRC_FIX (2UL << REG_MI_DMA4CNT_SAR_SHIFT) // fix source address
#define MI_EDMA_SRC_FILLREG (3UL << REG_MI_DMA4CNT_SAR_SHIFT) // source is fill data register
#define MI_EDMA_DEST_INC (0UL << REG_MI_DMA4CNT_DAR_SHIFT) // imcrement destination address
#define MI_EDMA_DEST_DEC (1UL << REG_MI_DMA4CNT_DAR_SHIFT) // decrement destination address
#define MI_EDMA_DEST_FIX (2UL << REG_MI_DMA4CNT_DAR_SHIFT) // fix destination address
#define MI_EXDMA_SRC_INC (0UL << REG_MI_DMA4CNT_SAR_SHIFT) // increment source address
#define MI_EXDMA_SRC_DEC (1UL << REG_MI_DMA4CNT_SAR_SHIFT) // decrement source address
#define MI_EXDMA_SRC_FIX (2UL << REG_MI_DMA4CNT_SAR_SHIFT) // fix source address
#define MI_EXDMA_SRC_FILLREG (3UL << REG_MI_DMA4CNT_SAR_SHIFT) // source is fill data register
#define MI_EXDMA_DEST_INC (0UL << REG_MI_DMA4CNT_DAR_SHIFT) // imcrement destination address
#define MI_EXDMA_DEST_DEC (1UL << REG_MI_DMA4CNT_DAR_SHIFT) // decrement destination address
#define MI_EXDMA_DEST_FIX (2UL << REG_MI_DMA4CNT_DAR_SHIFT) // fix destination address
//---- reload of src/destination address
#define MI_EDMA_SRC_RLD_OFF (0UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload off
#define MI_EDMA_SRC_RLD_ON (1UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload on
#define MI_EDMA_DEST_RLD_OFF (0UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload off
#define MI_EDMA_DEST_RLD_ON (1UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload on
#define MI_EXDMA_SRC_RLD_OFF (0UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload off
#define MI_EXDMA_SRC_RLD_ON (1UL << REG_MI_DMA4CNT_SRLD_SHIFT) // source address reload on
#define MI_EXDMA_DEST_RLD_OFF (0UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload off
#define MI_EXDMA_DEST_RLD_ON (1UL << REG_MI_DMA4CNT_DRLD_SHIFT) // destination address reload on
//================================================================================
// DMA block interval control definition
//================================================================================
//---- block interval
#define MI_EDMABCNT_INTERVAL_MASK (REG_MI_DMA4BCNT_BI_MASK) // mask of block interval
#define MI_EDMABCNT_INTERVAL_SHIFT (REG_MI_DMA4BCNT_BI_SHIFT) // shift of block interval
#define MI_EXDMABCNT_INTERVAL_MASK (REG_MI_DMA4BCNT_BI_MASK) // mask of block interval
#define MI_EXDMABCNT_INTERVAL_SHIFT (REG_MI_DMA4BCNT_BI_SHIFT) // shift of block interval
//---- block interval pre-scaler
#define MI_EDMABCNT_PRESCALER_MASK (REG_MI_DMA4BCNT_PS_MASK) // mask of pre-scaler
#define MI_EDMABCNT_PRESCALER_SHIFT (REG_MI_DMA4BCNT_PS_SHIFT) // shift of pre-scaler
#define MI_EXDMABCNT_PRESCALER_MASK (REG_MI_DMA4BCNT_PS_MASK) // mask of pre-scaler
#define MI_EXDMABCNT_PRESCALER_SHIFT (REG_MI_DMA4BCNT_PS_SHIFT) // shift of pre-scaler
//================================================================================
@ -356,9 +356,9 @@ void MIi_ExDmaRecvAsync( u32 dmaNo, const void *src, void *dest, u32 size );
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaFillCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaCopyCore
@ -375,9 +375,9 @@ void MIi_ExDmaFillCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSi
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopyCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaSendCore
@ -394,9 +394,9 @@ void MIi_ExDmaCopyCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaSendCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaRecvCore
@ -413,9 +413,9 @@ void MIi_ExDmaSendCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecvCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaFillAsyncCore
@ -432,9 +432,9 @@ void MIi_ExDmaRecvCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 on
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaCopyAsyncCore
@ -451,9 +451,9 @@ void MIi_ExDmaFillAsyncCore( u32 dmaNo, void *dest, u32 data, u32 size, u32 oneS
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaSendAsyncCore
@ -470,9 +470,9 @@ void MIi_ExDmaCopyAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaRecvAsyncCore
@ -489,9 +489,9 @@ void MIi_ExDmaSendAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_ExDmaBypassAsyncCore
@ -508,9 +508,9 @@ void MIi_ExDmaRecvAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u
Returns: None
*---------------------------------------------------------------------------*/
void MIi_ExDmaBypassAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing );
MIExDmaTiming timing );
/*---------------------------------------------------------------------------*
Name: MIi_SetExDmaParams
@ -527,9 +527,9 @@ void MIi_ExDmaBypassAsyncCore( u32 dmaNo, const void *src, void *dest, u32 size,
Returns: None
*---------------------------------------------------------------------------*/
void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 oneShotSize,
MIEDmaBlockSize blockSize, u32 interval, MIEDmaPrescaler prescale,
MIExDmaBlockSize blockSize, u32 interval, MIExDmaPrescaler prescale,
u32 continuous, u32 srcRld, u32 destRld,
MIEDmaTiming timing,
MIExDmaTiming timing,
u32 fillData, u32 srcDir, u32 destDir);
/*---------------------------------------------------------------------------*
@ -542,7 +542,7 @@ void MIi_SetExDmaParams( u32 dmaNo, const void *src, void *dest, u32 size, u32 o
Returns: None
*---------------------------------------------------------------------------*/
void MIi_SetExDmaArbiter( MIEDmaArbitration arb, MIEDmaYieldCycles yld );
void MIi_SetExDmaArbiter( MIExDmaArbitration arb, MIExDmaYieldCycles yld );
#ifdef __cplusplus

24
include/twl/misc.h Normal file
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@ -0,0 +1,24 @@
/*---------------------------------------------------------------------------*
Project: TwlSDK - - misc
File: misc.h
Copyright 2007 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Log: $
$NoKeywords: $
*---------------------------------------------------------------------------*/
#ifndef TWL_MISC_H_
#define TWL_MISC_H_
#include <twl/types.h>
#include <nitro/misc.h>
/* TWL_MISC_H_ */
#endif

34
include/twl/os.h Normal file
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@ -0,0 +1,34 @@
/*---------------------------------------------------------------------------*
Project: TwlSDK - include - OS
File: os.h
Copyright 2007 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Log: $
$NoKeywords: $
*---------------------------------------------------------------------------*/
#ifndef TWL_OS_H_
#define TWL_OS_H_
#include <nitro/os.h>
#include <twl/os/common/system.h>
#include <twl/os/common/emulator.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
/* TWL_OS_H_ */
#endif

47
include/twl/os/common/emulator.h Normal file
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@ -0,0 +1,47 @@
/*---------------------------------------------------------------------------*
Project: TwlSDK - OS - include
File: emulator.h
Copyright 2007 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Log: $
$NoKeywords: $
*---------------------------------------------------------------------------*/
#ifndef TWL_OS_EMULATOR_H_
#define TWL_OS_EMULATOR_H_
#include <twl/misc.h>
#include <twl/types.h>
#include <nitro/os/common/emulator.h>
#ifdef __cplusplus
extern "C" {
#endif
/*---------------------------------------------------------------------------*
Name: OSi_IsRunOnDebuggerTWL
Description: Detect Debugger
(subroutine of OS_GetConsoleType)
Arguments: None
Returns: TRUE : debugger
FALSE : not debugger
*---------------------------------------------------------------------------*/
BOOL OSi_IsRunOnDebuggerTWL(void);
#ifdef __cplusplus
} /* extern "C" */
#endif
/* TWL_OS_EMULATOR_H_ */
#endif

5
include/twl/os/common/system.h
View File

@ -16,7 +16,10 @@
#ifndef TWL_OS_SYSTEM_H_
#define TWL_OS_SYSTEM_H_
#include <nitro/os/common/system.h>
#include <twl/misc.h>
#include <twl/types.h>
#include <nitro/os/common/system.h>
#ifdef __cplusplus
extern "C" {