diff --git a/build/buildsetup/ioreg/io_register_list.csv b/build/buildsetup/ioreg/io_register_list.csv index f8f8e65..d19650f 100644 --- a/build/buildsetup/ioreg/io_register_list.csv +++ b/build/buildsetup/ioreg/io_register_list.csv @@ -467,17 +467,17 @@ 0x4214,,EOFS_H,16,rw,CAM,volatile,OFFSET,0,10,,,,,,,,,,,,,,,,,,,,,,,,,,, 0x4216,,EOFS_V,16,rw,CAM,volatile,OFFSET,0,9,,,,,,,,,,,,,,,,,,,,,,,,,,, #twl p109〜114,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4300,,DSP_FIFO_DATA,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4304,,DSP_FIFO_ADDR,16,w,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4308,,DSP_CONFIG,16,rw,DSP,volatile,FIFO_MEMSEL,12,4,RECV_DATA_IE,9,3,FIFO_IE,5,4,FIFO_RECV_E,4,1,FIFO_RECV_LEN,2,2,FIFO_INC_MODE,1,1,RESET,0,1,,,,,,,,, -0x430c,,DSP_STATUS,16,r,DSP,volatile,SEND_DATA_FULL,13,3,RECV_DATA_EMP,10,3,SEM_RECV_IF,9,1,FIFO_SEND_FULL,8,1,FIFO_SEND_EMP,7,1,FIFO_RECV_NEMP,6,1,FIFO_RECV_FULL,5,1,RESET_BUSY,2,1,FIFO_SEND_BUSY,1,1,FIFO_RECV_BUSY,0,1 -0x4310,,DSP_SEM_SEND_DATA,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4314,,DSP_SEM_RECV_MASK,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4318,,DSP_SEM_RECV_CLEAR,16,w,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x431c,,DSP_SEM_RECV_DATA,16,r,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4320,,DSP_SEND_DATA_0,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4324,,DSP_RECV_DATA_0,16,r,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4328,,DSP_SEND_DATA_1,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x432c,,DSP_RECV_DATA_1,16,r,DSP,volatile -0x4330,,DSP_SEND_DATA_2,16,rw,DSP,volatile -0x4330,,DSP_RECV_DATA_2,16,r,DSP,volatile +0x4300,,PDATA,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4304,,PADR,16,w,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4308,,PCFG,16,rw,DSP,volatile,MEMSEL,12,4,RRIE,9,3,WFEIE,8,1,WFFIE,7,1,RFNEIE,6,1,RFFIE,5,1,RS,4,1,DRS,2,2,AIM,1,1,DSPR,0,1 +0x430c,,PSTS,16,r,DSP,volatile,RCOMIM,13,3,RRI,10,3,PSEMI,9,1,WFEI,8,1,WFFI,7,1,RFNEI,6,1,RFFI,5,1,PRST,2,1,WTIP,1,1,RTIP,0,1 +0x4310,,PSEM,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4314,,PMASK,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4318,,PCLEAR,16,w,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x431c,,APBP_SEM,16,r,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4320,,APBP_COM0,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4324,,APBP_REP0,16,r,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x4328,,APBP_COM1,16,rw,DSP,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +0x432c,,APBP_REP1,16,r,DSP,volatile +0x4330,,APBP_COM2,16,rw,DSP,volatile +0x4330,,APBP_REP2,16,r,DSP,volatile diff --git a/build/libraries/dsp/ARM9/dsp_if.c b/build/libraries/dsp/ARM9/dsp_if.c index ddf57c9..d115a02 100644 --- a/build/libraries/dsp/ARM9/dsp_if.c +++ b/build/libraries/dsp/ARM9/dsp_if.c @@ -35,7 +35,7 @@ DSPData; /*---------------------------------------------------------------------------* 静的変数定義 *---------------------------------------------------------------------------*/ -static volatile DSPData *const dspData = (DSPData*)REG_DSP_SEND_DATA_0_ADDR; +static volatile DSPData *const dspData = (DSPData*)REG_APBP_COM0_ADDR; /*---------------------------------------------------------------------------* 内部関数定義 @@ -44,7 +44,7 @@ static volatile DSPData *const dspData = (DSPData*)REG_DSP_SEND_DATA_0_ADDR; /*---------------------------------------------------------------------------* Name: DSP_PowerOn - Description: power DSP block on but reset yet. + Description: power DSP block on but DSPR yet. you should call DSP_ResetOff() to boot DSP. Arguments: None. @@ -77,7 +77,7 @@ void DSP_PowerOff(void) /*---------------------------------------------------------------------------* Name: DSP_ResetOn - Description: reset DSP. + Description: Reset DSP. Arguments: None. @@ -85,15 +85,15 @@ void DSP_PowerOff(void) *---------------------------------------------------------------------------*/ void DSP_ResetOn(void) { - reg_DSP_DSP_CONFIG |= REG_DSP_DSP_CONFIG_RESET_MASK; - while ( reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_RESET_BUSY_MASK ) + reg_DSP_PCFG |= REG_DSP_PCFG_DSPR_MASK; + while ( reg_DSP_PSTS & REG_DSP_PSTS_PRST_MASK ) { } } /*---------------------------------------------------------------------------* Name: DSP_ResetOff - Description: boot DSP if in reset state. + Description: boot DSP if in Reset state. Arguments: None. @@ -101,17 +101,17 @@ void DSP_ResetOn(void) *---------------------------------------------------------------------------*/ void DSP_ResetOff(void) { - while ( reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_RESET_BUSY_MASK ) + while ( reg_DSP_PSTS & REG_DSP_PSTS_PRST_MASK ) { } - reg_DSP_DSP_CONFIG &= ~REG_DSP_DSP_CONFIG_RESET_MASK; + reg_DSP_PCFG &= ~REG_DSP_PCFG_DSPR_MASK; } /*---------------------------------------------------------------------------* Name: DSP_ResetInterface - Description: reset interface registers. - it should be called while reset state. + Description: Reset interface registers. + it should be called while Reset state. Arguments: None. @@ -120,9 +120,9 @@ void DSP_ResetOff(void) void DSP_ResetInterface(void) { u16 dummy; - reg_DSP_DSP_CONFIG &= ~REG_DSP_DSP_CONFIG_RECV_DATA_IE_MASK; - reg_DSP_DSP_SEM_SEND_DATA = 0; - reg_DSP_DSP_SEM_RECV_CLEAR = 0xFFFF; + reg_DSP_PCFG &= ~REG_DSP_PCFG_RRIE_MASK; + reg_DSP_PSEM = 0; + reg_DSP_PCLEAR = 0xFFFF; dummy = dspData[0].recv; dummy = dspData[1].recv; dummy = dspData[2].recv; @@ -140,7 +140,7 @@ void DSP_ResetInterface(void) void DSP_EnableRecvDataInterrupt(u32 dataNo) { SDK_ASSERT(dataNo >= 0 && dataNo <= 2); - reg_DSP_DSP_CONFIG |= (1 << dataNo) << REG_DSP_DSP_CONFIG_RECV_DATA_IE_SHIFT; + reg_DSP_PCFG |= (1 << dataNo) << REG_DSP_PCFG_RRIE_SHIFT; } /*---------------------------------------------------------------------------* @@ -155,7 +155,7 @@ void DSP_EnableRecvDataInterrupt(u32 dataNo) void DSP_DisableRecvDataInterrupt(u32 dataNo) { SDK_ASSERT(dataNo >= 0 && dataNo <= 2); - reg_DSP_DSP_CONFIG &= ~((1 << dataNo) << REG_DSP_DSP_CONFIG_RECV_DATA_IE_SHIFT); + reg_DSP_PCFG &= ~((1 << dataNo) << REG_DSP_PCFG_RRIE_SHIFT); } /*---------------------------------------------------------------------------* @@ -170,7 +170,7 @@ void DSP_DisableRecvDataInterrupt(u32 dataNo) BOOL DSP_SendDataIsEmpty(u32 dataNo) { SDK_ASSERT(dataNo >= 0 && dataNo <= 2); - return (reg_DSP_DSP_STATUS & ((1 << dataNo) << REG_DSP_DSP_STATUS_SEND_DATA_FULL_SHIFT)) ? FALSE : TRUE; + return (reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RCOMIM_SHIFT)) ? FALSE : TRUE; } /*---------------------------------------------------------------------------* @@ -185,7 +185,7 @@ BOOL DSP_SendDataIsEmpty(u32 dataNo) BOOL DSP_RecvDataIsReady(u32 dataNo) { SDK_ASSERT(dataNo >= 0 && dataNo <= 2); - return (reg_DSP_DSP_STATUS & ((1 << dataNo) << REG_DSP_DSP_STATUS_RECV_DATA_EMP_SHIFT)) ? FALSE : TRUE; + return (reg_DSP_PSTS & ((1 << dataNo) << REG_DSP_PSTS_RRI_SHIFT)) ? FALSE : TRUE; } /*---------------------------------------------------------------------------* @@ -236,7 +236,7 @@ u16 DSP_RecvData(u32 dataNo) *---------------------------------------------------------------------------*/ void DSP_EnableFifoInterrupt(DSPFifoIntr type) { - reg_DSP_DSP_CONFIG |= type; + reg_DSP_PCFG |= type; } /*---------------------------------------------------------------------------* @@ -250,7 +250,7 @@ void DSP_EnableFifoInterrupt(DSPFifoIntr type) *---------------------------------------------------------------------------*/ void DSP_DisableFifoInterrupt(DSPFifoIntr type) { - reg_DSP_DSP_CONFIG &= ~type; + reg_DSP_PCFG &= ~type; } /*---------------------------------------------------------------------------* @@ -270,30 +270,30 @@ void DSP_DisableFifoInterrupt(DSPFifoIntr type) *---------------------------------------------------------------------------*/ void DSP_SendFifo(DSPFifoMemSel memsel, u16 dest, const u16 *src, int size, u16 flags) { - u16 incmode = (u16)((flags & DSP_FIFO_FLAG_SRC_FIX) ? 0 : REG_DSP_DSP_CONFIG_FIFO_INC_MODE_MASK); + u16 incmode = (u16)((flags & DSP_FIFO_FLAG_SRC_FIX) ? 0 : REG_DSP_PCFG_AIM_MASK); - reg_DSP_DSP_FIFO_ADDR = dest; - reg_DSP_DSP_CONFIG = (u16)((reg_DSP_DSP_CONFIG & ~(REG_DSP_DSP_CONFIG_FIFO_MEMSEL_MASK|REG_DSP_DSP_CONFIG_FIFO_INC_MODE_MASK)) + reg_DSP_PADR = dest; + reg_DSP_PCFG = (u16)((reg_DSP_PCFG & ~(REG_DSP_PCFG_MEMSEL_MASK|REG_DSP_PCFG_AIM_MASK)) | memsel | incmode); if (flags & DSP_FIFO_FLAG_SRC_FIX) { while (size-- > 0) { - while (reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_FIFO_SEND_FULL_MASK) + while (reg_DSP_PSTS & REG_DSP_PSTS_WFEI_MASK) { } - reg_DSP_DSP_FIFO_DATA = *src; + reg_DSP_PDATA = *src; } } else { while (size-- > 0) { - while (reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_FIFO_SEND_FULL_MASK) + while (reg_DSP_PSTS & REG_DSP_PSTS_WFEI_MASK) { } - reg_DSP_DSP_FIFO_DATA = *src++; + reg_DSP_PDATA = *src++; } } } @@ -317,54 +317,54 @@ void DSP_SendFifo(DSPFifoMemSel memsel, u16 dest, const u16 *src, int size, u16 void DSP_RecvFifo(DSPFifoMemSel memsel, u16 addr, u16 *bufp, int size, u16 flags) { DSPFifoRecvLength len; - u16 incmode = (u16)((flags & DSP_FIFO_FLAG_SRC_FIX) ? 0 : REG_DSP_DSP_CONFIG_FIFO_INC_MODE_MASK); + u16 incmode = (u16)((flags & DSP_FIFO_FLAG_SRC_FIX) ? 0 : REG_DSP_PCFG_AIM_MASK); - SDK_ASSERT(memsel != DSP_FIFO_MEMSEL_PROGRAM); + SDK_ASSERT(memsel != DSP_MEMSEL_PROGRAM); switch (flags & DSP_FIFO_FLAG_RECV_MASK) { case DSP_FIFO_FLAG_RECV_UNIT_2B: - len = DSP_FIFO_RECV_LEN_2B; + len = DSP_FIFO_RECV_2B; size = 1; break; case DSP_FIFO_FLAG_RECV_UNIT_16B: - len = DSP_FIFO_RECV_LEN_16B; + len = DSP_FIFO_RECV_16B; size = 8; break; case DSP_FIFO_FLAG_RECV_UNIT_32B: - len = DSP_FIFO_RECV_LEN_32B; + len = DSP_FIFO_RECV_32B; size = 16; break; default: - len = DSP_FIFO_RECV_LEN_CONTINUOUS; + len = DSP_FIFO_RECV_CONTINUOUS; break; } - reg_DSP_DSP_FIFO_ADDR = addr; - reg_DSP_DSP_CONFIG = (u16)((reg_DSP_DSP_CONFIG & ~(REG_DSP_DSP_CONFIG_FIFO_MEMSEL_MASK|REG_DSP_DSP_CONFIG_FIFO_RECV_LEN_MASK|REG_DSP_DSP_CONFIG_FIFO_INC_MODE_MASK)) - | memsel | len | incmode | REG_DSP_DSP_CONFIG_FIFO_RECV_E_MASK); + reg_DSP_PADR = addr; + reg_DSP_PCFG = (u16)((reg_DSP_PCFG & ~(REG_DSP_PCFG_MEMSEL_MASK|REG_DSP_PCFG_DRS_MASK|REG_DSP_PCFG_AIM_MASK)) + | memsel | len | incmode | REG_DSP_PCFG_RS_MASK); if (flags & DSP_FIFO_FLAG_DEST_FIX) { while (size-- > 0) { - while ((reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_FIFO_RECV_NEMP_MASK) == 0) + while ((reg_DSP_PSTS & REG_DSP_PSTS_RFNEI_MASK) == 0) { } - *bufp = reg_DSP_DSP_FIFO_DATA; + *bufp = reg_DSP_PDATA; } } else { while (size-- > 0) { - while ((reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_FIFO_RECV_NEMP_MASK) == 0) + while ((reg_DSP_PSTS & REG_DSP_PSTS_RFNEI_MASK) == 0) { } - *bufp++ = reg_DSP_DSP_FIFO_DATA; + *bufp++ = reg_DSP_PDATA; } } - reg_DSP_DSP_CONFIG &= ~REG_DSP_DSP_CONFIG_FIFO_RECV_E_MASK; + reg_DSP_PCFG &= ~REG_DSP_PCFG_RS_MASK; } /*---------------------------------------------------------------------------* @@ -379,7 +379,7 @@ void DSP_RecvFifo(DSPFifoMemSel memsel, u16 addr, u16 *bufp, int size, u16 flags *---------------------------------------------------------------------------*/ void DSP_SetSemaphore(u16 mask) { - reg_DSP_DSP_SEM_SEND_DATA |= mask; + reg_DSP_PSEM |= mask; } /*---------------------------------------------------------------------------* @@ -394,7 +394,7 @@ void DSP_SetSemaphore(u16 mask) *---------------------------------------------------------------------------*/ u16 DSP_GetSemaphore(void) { - return reg_DSP_DSP_SEM_RECV_DATA; + return reg_DSP_APBP_SEM; } /*---------------------------------------------------------------------------* @@ -408,7 +408,7 @@ u16 DSP_GetSemaphore(void) *---------------------------------------------------------------------------*/ void DSP_ClearSemaphore(u16 mask) { - reg_DSP_DSP_SEM_RECV_CLEAR |= mask; + reg_DSP_PCLEAR |= mask; } /*---------------------------------------------------------------------------* @@ -422,7 +422,7 @@ void DSP_ClearSemaphore(u16 mask) *---------------------------------------------------------------------------*/ void DSP_MaskSemaphore(u16 mask) { - reg_DSP_DSP_SEM_RECV_MASK |= mask; + reg_DSP_PMASK |= mask; } /*---------------------------------------------------------------------------* @@ -436,6 +436,6 @@ void DSP_MaskSemaphore(u16 mask) *---------------------------------------------------------------------------*/ BOOL DSP_CheckSemaphoreRequest(void) { - return (reg_DSP_DSP_STATUS & REG_DSP_DSP_STATUS_SEM_RECV_IF_MASK) >> REG_DSP_DSP_STATUS_SEM_RECV_IF_SHIFT; + return (reg_DSP_PSTS & REG_DSP_PSTS_PSEMI_MASK) >> REG_DSP_PSTS_PSEMI_SHIFT; } diff --git a/include/twl/dsp/ARM9/dsp_if.h b/include/twl/dsp/ARM9/dsp_if.h index 7771e99..360c1e6 100644 --- a/include/twl/dsp/ARM9/dsp_if.h +++ b/include/twl/dsp/ARM9/dsp_if.h @@ -31,21 +31,31 @@ extern "C" { *---------------------------------------------------------------------------*/ typedef enum { - DSP_FIFO_MEMSEL_DATA = (0x0 << REG_DSP_DSP_CONFIG_FIFO_MEMSEL_SHIFT), - DSP_FIFO_MEMSEL_MMIO = (0x1 << REG_DSP_DSP_CONFIG_FIFO_MEMSEL_SHIFT), - DSP_FIFO_MEMSEL_PROGRAM = (0x5 << REG_DSP_DSP_CONFIG_FIFO_MEMSEL_SHIFT) + DSP_FIFO_MEMSEL_DATA = (0x0 << REG_DSP_PCFG_MEMSEL_SHIFT), + DSP_FIFO_MEMSEL_MMIO = (0x1 << REG_DSP_PCFG_MEMSEL_SHIFT), + DSP_FIFO_MEMSEL_PROGRAM = (0x5 << REG_DSP_PCFG_MEMSEL_SHIFT) } DSPFifoMemSel; typedef enum { - DSP_FIFO_RECV_LEN_2B = (0x0 << REG_DSP_DSP_CONFIG_FIFO_RECV_LEN_SHIFT), - DSP_FIFO_RECV_LEN_16B = (0x1 << REG_DSP_DSP_CONFIG_FIFO_RECV_LEN_SHIFT), - DSP_FIFO_RECV_LEN_32B = (0x2 << REG_DSP_DSP_CONFIG_FIFO_RECV_LEN_SHIFT), - DSP_FIFO_RECV_LEN_CONTINUOUS = (0x3 << REG_DSP_DSP_CONFIG_FIFO_RECV_LEN_SHIFT) + DSP_FIFO_RECV_2B = (0x0 << REG_DSP_PCFG_DRS_SHIFT), + DSP_FIFO_RECV_16B = (0x1 << REG_DSP_PCFG_DRS_SHIFT), + DSP_FIFO_RECV_32B = (0x2 << REG_DSP_PCFG_DRS_SHIFT), + DSP_FIFO_RECV_CONTINUOUS = (0x3 << REG_DSP_PCFG_DRS_SHIFT) } DSPFifoRecvLength; +typedef enum +{ + DSP_FIFO_INTR_SEND_EMPTY = REG_DSP_PCFG_WFEIE_MASK, + DSP_FIFO_INTR_SEND_FULL = REG_DSP_PCFG_WFFIE_MASK, + DSP_FIFO_INTR_RECV_NOT_EMPTY = REG_DSP_PCFG_RFNEIE_MASK, + DSP_FIFO_INTR_RECV_FULL = REG_DSP_PCFG_RFFIE_MASK +} +DSPFifoIntr; + +// for complex API typedef enum { DSP_FIFO_FLAG_SRC_INC = (0UL << 0), @@ -62,15 +72,6 @@ typedef enum } DSPFifoFlag; -typedef enum -{ - DSP_FIFO_INTR_RECV_FULL = (1 << REG_DSP_DSP_CONFIG_FIFO_IE_SHIFT), - DSP_FIFO_INTR_RECV_NOT_EMPTY = (2 << REG_DSP_DSP_CONFIG_FIFO_IE_SHIFT), - DSP_FIFO_INTR_SEND_FULL = (4 << REG_DSP_DSP_CONFIG_FIFO_IE_SHIFT), - DSP_FIFO_INTR_SEND_EMPTY = (8 << REG_DSP_DSP_CONFIG_FIFO_IE_SHIFT) -} -DSPFifoIntr; - /*---------------------------------------------------------------------------* 構造体定義 *---------------------------------------------------------------------------*/ @@ -82,8 +83,8 @@ DSPFifoIntr; /*---------------------------------------------------------------------------* Name: DSP_PowerOn - Description: power DSP block on but reset yet. - you should call DSP_ResetOff() to boot DSP. + Description: power DSP block on but DSPR yet. + you should call DSP_DSPROff() to boot DSP. Arguments: None. @@ -105,7 +106,7 @@ void DSP_PowerOff(void); /*---------------------------------------------------------------------------* Name: DSP_ResetOn - Description: reset DSP. + Description: Reset DSP. Arguments: None. @@ -116,7 +117,7 @@ void DSP_ResetOn(void); /*---------------------------------------------------------------------------* Name: DSP_ResetOff - Description: boot DSP if in reset state. + Description: boot DSP if in Reset state. Arguments: None. @@ -127,8 +128,8 @@ void DSP_ResetOff(void); /*---------------------------------------------------------------------------* Name: DSP_ResetInterface - Description: reset interface registers. - it should be called while reset state. + Description: Reset interface registers. + it should be called while Reset state. Arguments: None.