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update ex_dma test.

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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@49 4ee2a332-4b2b-5046-8439-1ba90f034370
This commit is contained in:
nakasima 2007-04-27 02:34:35 +00:00
parent e7582616d7
commit 67c6cebc03
4 changed files with 294 additions and 240 deletions
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2
build/libraries/mi/common/mi_exDma.c
View File

@ -18,7 +18,7 @@
static u32 intervalTable[] =
{
2, 4, 8, 16,
1, 1, 1, 1,
};
//================================================================================

43
build/tests/mi/_ARM7_exDma-1/src/main.c
View File

@ -16,6 +16,8 @@
#include <twl.h>
#define MY_DMA_MMEM ((t_TestBuf *)HW_MAIN_MEM_SUB)
#define MY_TEST_LOOPS 2 // (sizeof(copyfillArg)/sizeof(t_CommonArg))
#define ONE_BUF_SIZE 0x2004
typedef struct
@ -41,17 +43,26 @@ t_TestBuf testBuf __attribute__ ((aligned (32)));
t_CommonArg copyfillArg[] =
{
{ testBuf.src, testBuf.dest, "DmaCopy success.\n", "DmaFill success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "DmaCopy success on WRAM -> WRAM.\n", NULL, },
{ MY_DMA_MMEM->src, testBuf.dest, "DmaCopy success on MAIN_MEM -> WRAM.\n", "DmaFill success on WRAM.\n", },
{ testBuf.src, MY_DMA_MMEM->dest, "DmaCopy success on WRAM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", "DmaFill success on MAIN_MEM.\n", },
};
t_CommonArg stopArg[] =
{
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success.\n", "Stopping DmaFill success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success on WRAM -> WRAM.\n", NULL, },
{ MY_DMA_MMEM->src, testBuf.dest, "Stopping DmaCopy success on MAIN_MEM -> WRAM.\n", "Stopping DmaFill success on WRAM.\n", },
{ testBuf.src, MY_DMA_MMEM->dest, "Stopping DmaCopy success on WRAM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "Stopping DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", "Stopping DmaFill success on MAIN_MEM.\n", },
};
t_CommonArg copyfillAsyncArg[] =
{
{ testBuf.src, testBuf.dest, "DmaCopyAsync success.\n", "DmaFillAsync success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "DmaCopyAsync success on WRAM -> WRAM.\n", NULL, },
{ MY_DMA_MMEM->src, testBuf.dest, "DmaCopyAsync success on MAIN_MEM -> WRAM.\n", "DmaFillAsync success on WRAM.\n", },
{ testBuf.src, MY_DMA_MMEM->dest, "DmaCopyAsync success on WRAM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_MMEM->src, MY_DMA_MMEM->dest, "DmaCopyAsync success on MAIN_MEM -> MAIN_MEM.\n", "DmaFillAsync success on MAIN_MEM.\n", },
};
u32 exDmaIntrCount[MI_EXDMA_CH_NUM];
@ -130,6 +141,9 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
src[i][ii] = (u16)(ii+i-data);
}
}
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -144,7 +158,10 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
}
c_ercd |= CheckDmaCopy( ch, s, d, str );
}
}
if ( fillStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -158,6 +175,7 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
}
f_ercd |= CheckDmaFill( ch, d, data+i, str );
}
}
return c_ercd | f_ercd;
}
@ -178,6 +196,9 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
src[i][ii] = (u16)(ii+i-data);
}
}
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -212,7 +233,10 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
}
c_ercd |= CheckDmaCopy( ch, s, d, str );
}
}
if ( fillStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -245,6 +269,7 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
}
f_ercd |= CheckDmaFill( ch, d, data+i, str );
}
}
return c_ercd | f_ercd;
}
@ -258,6 +283,8 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
BOOL c_ercd = TRUE, f_ercd = TRUE;
u32 i;
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -282,7 +309,10 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
{
OS_TPrintf( copyStr );
}
}
if ( fillStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -306,6 +336,7 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
{
OS_TPrintf( fillStr );
}
}
return c_ercd | f_ercd;
}
@ -318,21 +349,21 @@ static void TestDmaFuncs( void )
// sync copy and fill test
OS_TPrintf( "\nChecking DmaCopy and DmaFill ....\n" );
for (i=0; i<1; i++)
for (i=0; i<MY_TEST_LOOPS; i++)
{
(void)CheckDmaCopyAndFill( &copyfillArg[i], i );
}
// async copy and fill test
OS_TPrintf( "\nChecking DmaCopyAsync and DmaFillAsync ....\n" );
for (i=0; i<1; i++)
for (i=0; i<MY_TEST_LOOPS; i++)
{
(void)CheckDmaCopyAndFillAsync( &copyfillAsyncArg[i], i );
}
// stop test
OS_TPrintf( "\nChecking DmaStop ....\n" );
for (i=0; i<1; i++)
for (i=0; i<MY_TEST_LOOPS; i++)
{
(void)CheckDmaStop( &stopArg[i] );
}

42
build/tests/mi/exDma-1/src/main.c
View File

@ -43,20 +43,26 @@ t_TestBuf testBuf __attribute__ ((aligned (32)));
t_CommonArg copyfillArg[] =
{
{ testBuf.src, testBuf.dest, "DmaCopy success.\n", "DmaFill success on MAIN_MEM.\n", },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopy success.\n", "DmaFill success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_WRAM->src, testBuf.dest, "DmaCopy success on WRAM -> MAIN_MEM.\n", "DmaFill success on MAIN_MEM.\n", },
{ testBuf.src, MY_DMA_WRAM->dest, "DmaCopy success on MAIN_MEM -> WRAM.\n", NULL, },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopy success on WRAM -> WRAM.\n", "DmaFill success on WRAM.\n", },
};
t_CommonArg stopArg[] =
{
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success.\n", "Stopping DmaFill success on MAIN_MEM.\n", },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "Stopping DmaCopy success.\n", "Stopping DmaFill success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "Stopping DmaCopy success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_WRAM->src, testBuf.dest, "Stopping DmaCopy success on WRAM -> MAIN_MEM.\n", "Stopping DmaFill success on MAIN_MEM.\n", },
{ testBuf.src, MY_DMA_WRAM->dest, "Stopping DmaCopy success on MAIN_MEM -> WRAM.\n", NULL, },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "Stopping DmaCopy success on WRAM -> WRAM.\n", "Stopping DmaFill success on WRAM.\n", },
};
t_CommonArg copyfillAsyncArg[] =
{
{ testBuf.src, testBuf.dest, "DmaCopyAsync success.\n", "DmaFillAsync success on MAIN_MEM.\n", },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopyAsync success.\n", "DmaFillAsync success on WRAM.\n", },
{ testBuf.src, testBuf.dest, "DmaCopyAsync success on MAIN_MEM -> MAIN_MEM.\n", NULL, },
{ MY_DMA_WRAM->src, testBuf.dest, "DmaCopyAsync success on WRAM -> MAIN_MEM.\n", "DmaFillAsync success on MAIN_MEM.\n", },
{ testBuf.src, MY_DMA_WRAM->dest, "DmaCopyAsync success on MAIN_MEM -> WRAM.\n", NULL, },
{ MY_DMA_WRAM->src, MY_DMA_WRAM->dest, "DmaCopyAsync success on WRAM -> WRAM.\n", "DmaFillAsync success on WRAM.\n", },
};
u32 exDmaIntrCount[MI_EXDMA_CH_NUM];
@ -135,6 +141,9 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
src[i][ii] = (u16)(ii+i-data);
}
}
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -151,7 +160,10 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
}
c_ercd |= CheckDmaCopy( ch, s, d, str );
}
}
if ( fillStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -167,6 +179,7 @@ static BOOL CheckDmaCopyAndFill( t_CommonArg *arg, u32 data )
}
f_ercd |= CheckDmaFill( ch, d, data+i, str );
}
}
return c_ercd | f_ercd;
}
@ -187,6 +200,9 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
src[i][ii] = (u16)(ii+i-data);
}
}
if ( copyStr )
{
DC_FlushAll();
for (i=0; i<4; i++)
{
@ -222,7 +238,10 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
}
c_ercd |= CheckDmaCopy( ch, s, d, str );
}
}
if ( fillStr )
{
DC_FlushAll();
for (i=0; i<4; i++)
{
@ -256,6 +275,7 @@ static BOOL CheckDmaCopyAndFillAsync( t_CommonArg *arg, u32 data )
}
f_ercd |= CheckDmaFill( ch, d, data+i, str );
}
}
return c_ercd | f_ercd;
}
@ -269,6 +289,8 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
BOOL c_ercd = TRUE, f_ercd = TRUE;
u32 i;
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -289,11 +311,14 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
// break;
}
}
if ( c_ercd == TRUE )
if ( c_ercd == TRUE && copyStr )
{
OS_TPrintf( copyStr );
}
}
if ( copyStr )
{
for (i=0; i<4; i++)
{
u32 ch = i + MI_EXDMA_CH_MIN;
@ -313,10 +338,11 @@ static BOOL CheckDmaStop( t_CommonArg *arg )
// break;
}
}
if ( f_ercd == TRUE )
if ( f_ercd == TRUE && fillStr )
{
OS_TPrintf( fillStr );
}
}
return c_ercd | f_ercd;
}

3
tools/partner_mlt/readme.txt
View File

@ -1,7 +1,4 @@
Partner のプロジェクトファイルに core0、core1 を上書きして下さい。
現状では ARM7 側のロード直後にレジスタウインドウの CPSR をクリックして
SVCモードへ切り替えて下さい。
デフォルトは Partner 用にビルドされる設定になっていますが、変更された場合は
"export TWL_DEBUGGER=KMC" または "make TWL_DEBUGGER=KMC" でビルドして下さい。