diff --git a/build/libraries/cdc/ARM7/Makefile b/build/libraries/cdc/ARM7/Makefile index 1b56732..1f210c5 100644 --- a/build/libraries/cdc/ARM7/Makefile +++ b/build/libraries/cdc/ARM7/Makefile @@ -27,8 +27,11 @@ TWL_PROC = ARM7 SRCS = cdc.c \ cdc_api.c \ - cdc_filter_coefficient.c + cdc_filter_coefficient.c \ + cdc_dsmode_access.c +INCDIR += $(TWL_NITROSDK_ROOT)/build/libraries/spi/ARM7/include \ + $(TWL_NITROSDK_ROOT)/build/libraries/spi/ARM7/pm/include TARGET_LIB = libcdc_sp$(TWL_LIBSUFFIX).a diff --git a/build/libraries/cdc/ARM7/src/cdc.c b/build/libraries/cdc/ARM7/src/cdc.c index e9d0fc7..cdcef28 100644 --- a/build/libraries/cdc/ARM7/src/cdc.c +++ b/build/libraries/cdc/ARM7/src/cdc.c @@ -18,6 +18,7 @@ #include #include +#include "spi_sp.h" void CDCi_PreInitAudio( void ); void CDCi_PostInitAudio( void ); @@ -39,17 +40,16 @@ int cdcRevisionID = 0; (CDC_SPI_BAUDRATE_DEFAULT << REG_SPI_SPICNT_BAUDRATE_SHIFT))) #define CDC_SPI_MODE_SETTING_REVISION_B ((u16)((1 << REG_SPI_SPICNT_E_SHIFT) | \ (0 << REG_SPI_SPICNT_I_SHIFT) | \ - (SPI_SLAVE_CODEC_TP << REG_SPI_SPICNT_SEL_SHIFT) | \ + (SPI_COMMPARTNER_TP << REG_SPI_SPICNT_SEL_SHIFT) | \ (CDC_SPI_BAUDRATE_DEFAULT << REG_SPI_SPICNT_BAUDRATE_SHIFT))) #define CDC_SPI_MODE_SETTING_REVISION_C CDC_SPI_MODE_SETTING_REVISION_B -#if 0 u16 cdcSpiMode = CDC_SPI_MODE_SETTING_REVISION_B; //================================================================================ static inline void CDCi_ChangeSpiMode( SPITransMode continuous ) { - reg_SPI_SPICNT = (u16)((continuous << REG_SPI_SPICNT_MODE_SHIFT) | CDC_SpiMode ); + reg_SPI_SPICNT = (u16)((continuous << REG_SPI_SPICNT_MODE_SHIFT) | cdcSpiMode ); } //================================================================================ @@ -77,9 +77,9 @@ void CDCi_SetSpiParams( u8 reg, u8 setBits, u8 maskBits ) } void CDC_SetSpiParams( u8 reg, u8 setBits, u8 maskBits ) { - (void)spiLock(); + (void)SPI_Lock(123); CDCi_SetSpiParams( reg, setBits, maskBits ); - (void)spiUnlock(); + (void)SPI_Unlock(123); } /*---------------------------------------------------------------------------* @@ -135,13 +135,13 @@ void CDC_ClearSpiFlags( u8 reg, u8 clrBits ) *---------------------------------------------------------------------------*/ void CDCi_WriteSpiRegister( u8 reg, u8 data ) { - i_spiWait(); + SPI_Wait(); CDCi_ChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); - i_spiSendWait( reg << 1 ); + SPI_SendWait( reg << 1 ); CDCi_ChangeSpiMode( SPI_TRANSMODE_1BYTE ); - i_spiSend( data ); + SPI_Send( data ); } /*---------------------------------------------------------------------------* @@ -157,13 +157,13 @@ u8 CDCi_ReadSpiRegister( u8 reg ) { u8 data; - i_spiWait(); + SPI_Wait(); CDCi_ChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); - i_spiSendWait( reg << 1 ); + SPI_SendWait( reg << 1 ); CDCi_ChangeSpiMode( SPI_TRANSMODE_1BYTE ); - data = i_spiDummyWaitReceive(); + data = SPI_DummyWaitReceive(); return data; } @@ -181,19 +181,19 @@ void CDCi_WriteSpiRegisters( u8 reg, const u8 *bufp, size_t size ) { int i; - i_spiWait(); + SPI_Wait(); CDCi_ChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); - i_spiSendWait( reg << 1 ); + SPI_SendWait( reg << 1 ); for ( i=0; i<(size-1); i++ ) { - i_spiWait(); - i_spiSend( *bufp++ ); + SPI_Wait(); + SPI_Send( *bufp++ ); } - i_spiWait(); + SPI_Wait(); CDCi_ChangeSpiMode( SPI_TRANSMODE_1BYTE ); - i_spiSend( *bufp++ ); + SPI_Send( *bufp++ ); } /*---------------------------------------------------------------------------* @@ -209,20 +209,19 @@ void CDCi_ReadSpiRegisters( u8 reg, u8 *bufp, size_t size ) { int i; - i_spiWait(); + SPI_Wait(); CDCi_ChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); - i_spiSendWait( reg << 1 ); + SPI_SendWait( reg << 1 ); for ( i=0; i<(size-1); i++ ) { - i_spiWait(); - *bufp++ = i_spiDummyWaitReceive(); + SPI_Wait(); + *bufp++ = SPI_DummyWaitReceive(); } CDCi_ChangeSpiMode( SPI_TRANSMODE_1BYTE ); - *bufp++ = i_spiDummyWaitReceive(); + *bufp++ = SPI_DummyWaitReceive(); } -#endif //================================================================================ // Utility Functions diff --git a/build/libraries/cdc/ARM7/src/cdc_api.c b/build/libraries/cdc/ARM7/src/cdc_api.c index 71d6f44..3b3af9b 100644 --- a/build/libraries/cdc/ARM7/src/cdc_api.c +++ b/build/libraries/cdc/ARM7/src/cdc_api.c @@ -16,6 +16,8 @@ #include #include +#include "pm_pmic.h" + //#define MEASUREMENT_BY_TICK #ifdef MEASUREMENT_BY_TICK #include @@ -35,8 +37,8 @@ BOOL isADCOn = FALSE; BOOL isDACOn = FALSE; #define CDC_PLL_STABLE_WAIT_TIME 18 -void CDCi_PowerUpPLL( void ); -void CDCi_PowerDownPLL( void ); +static void CDCi_PowerUpPLL( void ); +static void CDCi_PowerDownPLL( void ); //================================================================================ // INIT APIs @@ -243,7 +245,7 @@ u8 CDC_GetRevisionId( void ) CDC_ChangePage( 0 ); return (u8)(( CDC_ReadI2cRegister( REG_CDC0_REV_ID_ADDR ) & CDC0_REV_ID_MASK ) >> CDC0_REV_ID_SHIFT); } -#if 0 + //================================================================================ // State Transition APIs //================================================================================ @@ -300,7 +302,7 @@ void CDC_GoDsMode( void ) { // MicBias powered up // In Rev-A, MicBias must be powered up before enabling Master Sound Power - dsmodeSetSpiFlags( REG_CDC255_DS_MIC_CTL_ADDR, CDC255_DS_MIC_CTL_BIAS_PWR ); + CDC_DsmodeSetSpiFlags( REG_CDC255_DS_MIC_CTL_ADDR, CDC255_DS_MIC_CTL_BIAS_PWR ); // enable Master Sound Power (via reg0 : current page=255) // @@ -310,18 +312,18 @@ void CDC_GoDsMode( void ) // CODEC PCSN is connected to IO-board Analog Key CS. // CODEC PCSN is associated with TouchPanel now (for revision A). // - dsmodeSetSpiFlags( REG_CDC255_AUD_CTL_ADDR, CDC255_AUD_CTL_PWR ); + CDC_DsmodeSetSpiFlags( REG_CDC255_AUD_CTL_ADDR, CDC255_AUD_CTL_PWR ); } else { // MicBias powered up - pmSetFlags( REG_CDC255_DS_MIC_CTL_ADDR, CDC255_DS_MIC_CTL_BIAS_PWR ); + u8 flags = PMi_GetRegister( REG_CDC255_DS_MIC_CTL_ADDR ); + PMi_SetRegister( REG_CDC255_DS_MIC_CTL_ADDR, (u8)(flags | CDC255_DS_MIC_CTL_BIAS_PWR) ); } // change CODEC status variable - CDCi_IsTwlMode = FALSE; + cdcIsTwlMode = FALSE; } -#endif /*---------------------------------------------------------------------------* Name: CDC_SetInputPinControl @@ -392,7 +394,7 @@ void CDC_GetInputPinControl( BOOL *enable_vcnt5, BOOL *enable_sphp, BOOL *enable Returns: None *---------------------------------------------------------------------------*/ -void CDCi_PowerUpPLL( void ) +static void CDCi_PowerUpPLL( void ) { // IOP からの MCLK を check / enable @@ -414,7 +416,7 @@ void CDCi_PowerUpPLL( void ) Returns: None *---------------------------------------------------------------------------*/ -void CDCi_PowerDownPLL( void ) +static void CDCi_PowerDownPLL( void ) { // page 0, reg 5 で PLL off 設定 CDC_ChangePage( 0 ); diff --git a/build/libraries/cdc/ARM7/src/cdc_dsmode_access.c b/build/libraries/cdc/ARM7/src/cdc_dsmode_access.c new file mode 100644 index 0000000..f68d3ce --- /dev/null +++ b/build/libraries/cdc/ARM7/src/cdc_dsmode_access.c @@ -0,0 +1,194 @@ +/*---------------------------------------------------------------------------* + Project: TwlSDK - libraties - tp + File: cdc_Dsmode_access.c + + Copyright 2006-2007 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Log: $ + $NoKeywords: $ + *---------------------------------------------------------------------------*/ +#include + +#include "spi_sp.h" + +SPIBaudRate cdcDsmodeSPIBaudRate = DSMODE_SPI_BAUDRATE_DEFAULT; + + +//================================================================================ +// SPI BIT CONTROL +//================================================================================ +/*---------------------------------------------------------------------------* + Name: CDC_DsmodeSetSpiParams + + Description: set control bit to device register + + Arguments: reg : device register + setBits : bits to set + maskBits : bits to mask + + Returns: None + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeSetSpiParams( u8 reg, u8 setBits, u8 maskBits ) +{ + u8 tmp; + tmp = CDCi_DsmodeReadSpiRegister( reg ); + tmp &= ~maskBits; + setBits &= maskBits; + tmp |= setBits; + CDCi_DsmodeWriteSpiRegister( reg, tmp ); +} +void CDC_DsmodeSetSpiParams( u8 reg, u8 setBits, u8 maskBits ) +{ + (void)SPI_Lock(123); + CDCi_DsmodeSetSpiParams( reg, setBits, maskBits ); + (void)SPI_Unlock(123); +} + +/*---------------------------------------------------------------------------* + Name: CDC_DsmodeSetSpiFlags + + Description: set control bit to device register + + Arguments: reg : device register + setBits : bits to set + + Returns: None + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeSetSpiFlags( u8 reg, u8 setBits ) +{ + CDCi_DsmodeSetSpiParams( reg, setBits, setBits ); +} +void CDC_DsmodeSetSpiFlags( u8 reg, u8 setBits ) +{ + CDC_DsmodeSetSpiParams( reg, setBits, setBits ); +} + +/*---------------------------------------------------------------------------* + Name: CDC_DsmodeClearSpiFlags + + Description: clear control bit to device register + + Arguments: reg : device register + clrBits : bits to set + + Returns: None + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeClearSpiFlags( u8 reg, u8 clrBits ) +{ + CDCi_DsmodeSetSpiParams( reg, 0, clrBits ); +} +void CDC_DsmodeClearSpiFlags( u8 reg, u8 clrBits ) +{ + CDC_DsmodeSetSpiParams( reg, 0, clrBits ); +} + +//================================================================================ +// SPI ACCESS +//================================================================================ +/*---------------------------------------------------------------------------* + Name: CDCi_DsmodeWriteSpiRegister + + Description: set value to Touch-Panel register + + Arguments: reg : DS-mode PMIC register + data : value to be written + + Returns: None + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeWriteSpiRegister( u8 reg, u8 data ) +{ + SPI_Wait(); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); + SPI_SendWait( reg ); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_1BYTE ); + SPI_Send( data ); +} + +/*---------------------------------------------------------------------------* + Name: CDCi_DsmodeReadSpiRegister + + Description: get value from Touch-Panel register + + Arguments: reg : DS-mode PMIC register + + Returns: value which is read from specified TP register + *---------------------------------------------------------------------------*/ +u8 CDCi_DsmodeReadSpiRegister( u8 reg ) +{ + u8 data; + + SPI_Wait(); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); + SPI_SendWait( 0x80 | reg ); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_1BYTE ); + data = SPI_DummyWaitReceive(); + return data; +} + +/*---------------------------------------------------------------------------* + Name: CDCi_DsmodeWriteSpiRegisters + + Description: set value to decive registers through SPI. + + Arguments: reg : decive register + data : value to be written + + Returns: None + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeWriteSpiRegisters( u8 reg, const u8 *bufp, size_t size ) +{ + int i; + + SPI_Wait(); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); + SPI_SendWait( reg ); + + for ( i=0; i<(size-1); i++ ) + { + SPI_Wait(); + SPI_Send( *bufp++ ); + } + SPI_Wait(); + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_1BYTE ); + SPI_Send( *bufp++ ); +} + +/*---------------------------------------------------------------------------* + Name: CDCi_DsmodeReadSpiRegisters + + Description: get value from decive registers through SPI. + + Arguments: reg : decive register + + Returns: value which is read from specified decive register + *---------------------------------------------------------------------------*/ +void CDCi_DsmodeReadSpiRegisters( u8 reg, u8 *bufp, size_t size ) +{ + int i; + + SPI_Wait(); + + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_CONTINUOUS ); + SPI_SendWait( 0x80 | reg ); + + for ( i=0; i<(size-1); i++ ) + { + SPI_Wait(); + *bufp++ = SPI_DummyWaitReceive(); + } + CDCi_DsmodeChangeSpiMode( SPI_TRANSMODE_1BYTE ); + *bufp++ = SPI_DummyWaitReceive(); +} + +