From 39cf5455593af8056f47db1fb6de68bc02b784ec Mon Sep 17 00:00:00 2001 From: nakasima Date: Fri, 1 Jun 2007 12:26:19 +0000 Subject: [PATCH] fix pmic registers. git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@100 4ee2a332-4b2b-5046-8439-1ba90f034370 --- build/buildtools/commondefs | 10 +- include/twl/mi/exDma.h | 15 +- include/twl/pm/common/pm_reg_ex.h | 369 +++++++++++++----------------- 3 files changed, 175 insertions(+), 219 deletions(-) diff --git a/build/buildtools/commondefs b/build/buildtools/commondefs index dea9bab..bf41e57 100644 --- a/build/buildtools/commondefs +++ b/build/buildtools/commondefs @@ -91,6 +91,13 @@ NITRO_BUILD_TYPE ?= $(TWL_BUILD_TYPE) NITRO_BUILD_DIR ?= $(TWL_BUILD_DIR) +# +# PMIC Revision +# + +TWL_PMIC_REV ?= 0 + + # # Debugger Type # @@ -247,8 +254,9 @@ TWL_INSTALL_ADDINS := $(TWL_INSTALL_ROOT)/add-ins #---------------------------------------------------------------------------- # Compiler flags # -MACRO_FLAGS += -DSDK_DEBUGGER_$(TWL_DEBUGGER) MACRO_FLAGS += -DTWL_PLATFORM_$(TWL_PLATFORM) +MACRO_FLAGS += -DSDK_DEBUGGER_$(TWL_DEBUGGER) +MACRO_FLAGS += -DSDK_PMIC_REV=$(TWL_PMIC_REV) #---------------------------------------------------------------------------- diff --git a/include/twl/mi/exDma.h b/include/twl/mi/exDma.h index 9b5acd1..024aca9 100644 --- a/include/twl/mi/exDma.h +++ b/include/twl/mi/exDma.h @@ -78,8 +78,8 @@ MIExDmaBlockSize; //---- pre-scaler typedef enum { - MI_EXDMA_PRESCALER_1 = (0UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 1 - MI_EXDMA_PRESCALER_4 = (1UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 4 + MI_EXDMA_PRESCALER_1 = (0UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 1 + MI_EXDMA_PRESCALER_4 = (1UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 4 MI_EXDMA_PRESCALER_16 = (2UL << REG_MI_DMA4BCNT_PS_SHIFT), // x 16 MI_EXDMA_PRESCALER_64 = (3UL << REG_MI_DMA4BCNT_PS_SHIFT) // x 64 } @@ -154,17 +154,6 @@ typedef volatile t_MIExDmaChanRegs MIExDmaChanRegs; #define MI_EXDMA_CONTINUOUS_OFF (0UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode off #define MI_EXDMA_CONTINUOUS_ON (1UL << REG_MI_DMA4CNT_CM_SHIFT) // continuous mode on -//---- DMA timing -#if 0 -# define MI_EXDMA_TIMING_MASK (REG_MI_DMA4CNT_TIMING_MASK) // mask of start field -# define MI_EXDMA_TIMING_SHIFT (REG_MI_DMA4CNT_TIMING_SHIFT) // shift of start field -# define MI_EXDMA_TIMING_IMM (0UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start immediately -# define MI_EXDMA_TIMING_V_BLANK (1UL << REG_MI_DMA4CNT_TIMING_SHIFT) // start by VBlank -# define MI_EXDMA_TIMING_CARD (2UL << REG_MI_DMA4CNT_TIMING_SHIFT) // card -# define MI_EXDMA_TIMING_WIRELESS (3UL << REG_MI_DMA4CNT_TIMING_SHIFT) // DMA4,2:wireless interrupt -# define MI_EXDMA_TIMING_CARTRIDGE MI_DMA_TIMING_WIRELESS // DMA1,3:cartridge warning -#endif - //---- block size #define MI_EXDMA_BLOCK_SIZE_MASK (REG_MI_DMA4CNT_BSIZE_MASK) // mask of block size #define MI_EXDMA_BLOCK_SIZE_SHIFT (REG_MI_DMA4CNT_BSIZE_SHIFT) // shift of block size diff --git a/include/twl/pm/common/pm_reg_ex.h b/include/twl/pm/common/pm_reg_ex.h index b313908..f42882b 100644 --- a/include/twl/pm/common/pm_reg_ex.h +++ b/include/twl/pm/common/pm_reg_ex.h @@ -27,74 +27,85 @@ extern "C" { //================================================================ //---------------- address #define REG_PMIC_CTL2_ADDR 0x10 // R/W -#define REG_PMIC_BT_STAT_ADDR 0x11 // R +#if SDK_PMIC_REV!=0 +#define REG_PMIC_OUT_CTL_ADDR 0x11 // R/W +#define REG_PMIC_TIME_CTL_ADDR 0x12 // R/W +#define REG_PMIC_PM_INFO_ADDR 0x14 // R +#define REG_PMIC_BT_INFO_ADDR 0x15 // R +#define REG_PMIC_SW_FLAGS_ADDR 0x16 // R/W +#define REG_PMIC_BT_CRCT_ADDR 0x17 // R/W +#define REG_PMIC_BT_THL_ADDR 0x18 // R/W +#define REG_PMIC_BT_THH_ADDR 0x19 // R/W +#define REG_PMIC_LED_CTL_ADDR 0x1a // R/W +#define REG_PMIC_LED12_BLK_ADDR 0x1a // R/W mirror +#define REG_PMIC_LED12_B4_ADDR 0x1b // R/W +#define REG_PMIC_LED12_B3_ADDR 0x1c // R/W +#define REG_PMIC_LED12_B2_ADDR 0x1d // R/W +#define REG_PMIC_LED12_B1_ADDR 0x1e // R/W +#define REG_PMIC_BL1_BRT_ADDR 0x1f // R/W +#define REG_PMIC_BL2_BRT_ADDR 0x20 // R/W +#else // SDK_PMIC_REV==0 +#define REG_PMIC_BT_INFO_ADDR 0x11 // R #define REG_PMIC_SW_FLAGS_ADDR 0x12 // R/W -#define REG_PMIC_AGPIO_CTL_ADDR 0x13 // R/W -#define REG_PMIC_GPIO_ADDR 0x14 // R/W -#define REG_PMIC_OFF_TIME_ADDR 0x15 // R/W -#define REG_PMIC_PFM_PWM_ADDR 0x16 // R/W -#define REG_PMIC_GPU_VLT_ADDR 0x17 // R/W +#define REG_PMIC_TIME_CTL_ADDR 0x15 // R/W +#define REG_PMIC_OUT_CTL_ADDR 0x16 // R/W #define REG_PMIC_BT_CRCT_ADDR 0x18 // R/W #define REG_PMIC_BT_THL_ADDR 0x19 // R/W #define REG_PMIC_BT_THH_ADDR 0x1a // R/W -#define REG_PMIC_BT_VDET_ADDR 0x1b // R/W #define REG_PMIC_LED_CTL_ADDR 0x1c // R/W #define REG_PMIC_LED12_B4_ADDR 0x1d // R/W #define REG_PMIC_LED12_B3_ADDR 0x1e // R/W #define REG_PMIC_LED12_B2_ADDR 0x1f // R/W -#define REG_PMIC_LED12_B15_ADDR 0x20 // R/W -#define REG_PMIC_LED3_BRT_ADDR 0x21 // R/W +#define REG_PMIC_LED12_B1_ADDR 0x20 // R/W #define REG_PMIC_LED12_BLK_ADDR 0x22 // R/W -#define REG_PMIC_LED3_BLK_ADDR 0x23 // R/W -#define REG_PMIC_BL_BRT_ADDR 0x24 // R/W -#define REG_PMIC_DEBUG_ADDR 0x2f // R/W +#define REG_PMIC_BL1_BRT_ADDR 0x24 // R/W +#define REG_PMIC_BL2_BRT_ADDR 0x24 // R/W +#endif // SDK_PMIC_REV==0 +#define REG_PMIC_GPIO_CTL_ADDR 0x13 // R/W //---------------- each register spec //---- PMIC_CTL2 #define PMIC_CTL2_RST (1<< 0) -#define PMIC_CTL2_BL_SHIFT 2 -#define PMIC_CTL2_BL_ON (3<< PMIC_CTL2_BL_SHIFT) -#define PMIC_CTL2_BL_OFF (0<< PMIC_CTL2_BL_SHIFT) -#define PMIC_CTL2_GPU_DPD (1<< 4) +#define PMIC_CTL2_BKLT1 (1<< 2) +#define PMIC_CTL2_BKLT2 (1<< 3) +#define PMIC_CTL2_VLT42 (1<< 4) // ? #define PMIC_CTL2_LCD_PWR (1<< 5) #define PMIC_CTL2_PWR_OFF (1<< 6) -//---- PMIC_BT_STAT -#define PMIC_BT_STAT_VLTLOW (1<< 0) -#define PMIC_BT_STAT_VLT_SHIFT 1 -#define PMIC_BT_STAT_VLT_MASK (7<< PMIC_BT_STAT_VLT_SHIFT) -#define PMIC_BT_STAT_MKR_SHIFT 5 -#define PMIC_BT_STAT_MKR_MASK (7<< PMIC_BT_STAT_MKR_SHIFT) +//---- PMIC_BT_INFO +#define PMIC_BT_INFO_VLTLOW (1<< 0) +#define PMIC_BT_INFO_VLT_SHIFT 1 +#define PMIC_BT_INFO_VLT_MASK (7<< PMIC_BT_INFO_VLT_SHIFT) +#define PMIC_BT_INFO_MKR_SHIFT 5 +#define PMIC_BT_INFO_MKR_MASK (7<< PMIC_BT_INFO_MKR_SHIFT) //---- PMIC_SW_FLAGS #define PMIC_SW_FLAGS_WARMBOOT (1 << 7) -//---- PMIC_AGPIO_CTL -#define PMIC_AGPIO_CTL_O_DACRST (1<< 1) // maybe include GPURST -#define PMIC_AGPIO_CTL_O_GPIO2 (1<< 2) -#define PMIC_AGPIO_CTL_O_ADPT (1<< 3) -#define PMIC_AGPIO_CTL_AO_SHIFT 6 -#define PMIC_AGPIO_CTL_AO_MASK (3<< PMIC_AGPIO_CTL_SHIFT) +//---- PMIC_GPIO_CTL +#if SDK_PMIC_REV!=0 +#define PMIC_GPIO_CTL_O1 (1<< 0) +#define PMIC_GPIO_CTL_O2 (1<< 1) +#define PMIC_GPIO_CTL_O3 (1<< 2) +#else // SDK_PMIC_REV==0 +#define PMIC_GPIO_CTL_O1 (1<< 1) +#define PMIC_GPIO_CTL_O2 (1<< 2) +#define PMIC_GPIO_CTL_O3 (1<< 3) +#define PMIC_GPIO_CTL_AO_SHIFT 6 +#define PMIC_GPIO_CTL_AO_MASK (3<< PMIC_GPIO_CTL_SHIFT) +#endif // SDK_PMIC_REV==0 -//---- PMIC_GPIO -#define PMIC_GPIO_O_DACRST (1<< 1) // maybe include GPURST -#define PMIC_GPIO_IO_GPIO2 (1<< 2) -#define PMIC_GPIO_I_ADPT (1<< 3) -#define PMIC_GPIO_MKR_SHIFT 4 -#define PMIC_GPIO_MKR_MASK (3<< PMIC_BGPIO_MKR_SHIFT) -#define PMIC_GPIO_VER_SHIFT 6 -#define PMIC_GPIO_VER_MASK (3<< PMIC_BGPIO_VER_SHIFT) - -//---- PMIC_OFF_TIME -#define PMIC_OFF_TIME_SHIFT 0 -#define PMIC_OFF_TIME_MASK (0xf<< PMIC_OFF_TIME_SHIFT) - -//---- PMIC_GPU_VLT -#define PMIC_GPU_VLT_V1A_SHIFT 0 -#define PMIC_GPU_VLT_V1A_MASK (0xf<< PMIC_GPU_VLT_V1A_SHIFT) -#define PMIC_GPU_VLT_V18_SHIFT 4 -#define PMIC_GPU_VLT_V18_MASK (0x3<< PMIC_GPU_VLT_V18_SHIFT) +//---- PMIC_TIME_CTL +#if SDK_PMIC_REV!=0 +#define PMIC_TIME_CTL_OFF_SHIFT 0 +#define PMIC_TIME_CTL_OFF_MASK (0x7<< PMIC_TIME_CTL_OFF_SHIFT) +#define PMIC_TIME_CTL_ACQ_SHIFT 4 +#define PMIC_TIME_CTL_ACQ_MASK (0x3<< PMIC_TIME_CTL_ACQ_SHIFT) +#else // SDK_PMIC_REV==0 +#define PMIC_TIME_CTL_OFF_SHIFT 0 +#define PMIC_TIME_CTL_OFF_MASK (0xf<< PMIC_TIME_CTL_OFF_SHIFT) +#endif // SDK_PMIC_REV==0 //---- PMIC_BT_CRCT #define PMIC_BT_CRCT_TEMP_ON (1<< 0) @@ -116,27 +127,45 @@ extern "C" { #define PMIC_BT_THH_TH4_SHIFT 4 #define PMIC_BT_THH_TH4_MASK (7<< PMIC_BT_THH_TH4_SHIFT) -//---- PMIC_PFM_PWM -#define PMIC_PFM_PWM_V18_SHIFT 0 -#define PMIC_PFM_PWM_V18_MASK (0x3<< PMIC_PFM_PWM_V18_SHIFT) -#define PMIC_PFM_PWM_V12_SHIFT 2 -#define PMIC_PFM_PWM_V12_MASK (0x1<< PMIC_PFM_PWM_V12_SHIFT) -#define PMIC_PFM_PWM_V33_SHIFT 3 -#define PMIC_PFM_PWM_V33_MASK (0x1<< PMIC_PFM_PWM_V33_SHIFT) - -//---- PMIC_BT_VDET -#define PMIC_BT_VDET_FREQ_SHIFT 0 -#define PMIC_BT_VDET_FREQ_MASK (0x3<< PMIC_BT_VDET_FREQ_SHIFT) -#define PMIC_BT_VDET_NUM_SHIFT 2 -#define PMIC_BT_VDET_NUM_MASK (0x3<< PMIC_BT_VDET_NUM_SHIFT) +//---- PMIC_OUT_CTL +#if SDK_PMIC_REV!=0 +#define PMIC_OUT_CTL_V12_SHIFT 0 +#define PMIC_OUT_CTL_V12_MASK (0x1<< PMIC_OUT_CTL_V12_SHIFT) +#define PMIC_OUT_CTL_V18_SHIFT 1 +#define PMIC_OUT_CTL_V18_MASK (0x1<< PMIC_OUT_CTL_V18_SHIFT) +#define PMIC_OUT_CTL_V33_SHIFT 2 +#define PMIC_OUT_CTL_V33_MASK (0x1<< PMIC_OUT_CTL_V33_SHIFT) +#else // SDK_PMIC_REV==0 +#define PMIC_OUT_CTL_V18_SHIFT 0 +#define PMIC_OUT_CTL_V18_MASK (0x3<< PMIC_OUT_CTL_V18_SHIFT) +#define PMIC_OUT_CTL_V12_SHIFT 2 +#define PMIC_OUT_CTL_V12_MASK (0x1<< PMIC_OUT_CTL_V12_SHIFT) +#define PMIC_OUT_CTL_V33_SHIFT 3 +#define PMIC_OUT_CTL_V33_MASK (0x1<< PMIC_OUT_CTL_V33_SHIFT) +#endif // SDK_PMIC_REV==0 //---- PMIC_LED_CTL -#define PMIC_LED_CTL_L12_B4_ONLY (1<< 0) -#define PMIC_LED_CTL_L12_BLK (1<< 1) -#define PMIC_LED_CTL_L3_BLK (1<< 2) -#define PMIC_LED_CTL_L12_B3_E (1<< 4) -#define PMIC_LED_CTL_L12_B4_E (1<< 5) -#define PMIC_LED_CTL_L12_B5_E (1<< 6) +#define PMIC_LED_CTL_L12_B4_ONLY (1<< 0) +#define PMIC_LED_CTL_L12_AT_BLK (1<< 1) +#if SDK_PMIC_REV!=0 +#define PMIC_LED_CTL_L12_BLKF_SHIFT 4 +#define PMIC_LED_CTL_L12_BLKF_MASK (0x3<< PMIC_LED_CTL_L12_BLKF_SHIFT) +#define PMIC_LED_CTL_L12_BLKD_SHIFT 6 +#define PMIC_LED_CTL_L12_BLKD_MASK (0x3<< PMIC_LED_CTL_L12_BLKD_SHIFT) +#endif // SDK_PMIC_REV!=0 + +//---- PMIC_LED12_BLK (mirror) +#if SDK_PMIC_REV!=0 +#define PMIC_LED12_BLK_FQ_SHIFT 4 +#define PMIC_LED12_BLK_FQ_MASK (0x3<< PMIC_LED12_BLK_FQ_SHIFT) +#define PMIC_LED12_BLK_DT_SHIFT 6 +#define PMIC_LED12_BLK_DT_MASK (0x3<< PMIC_LED12_BLK_DT_SHIFT) +#else // SDK_PMIC_REV==0 +#define PMIC_LED12_BLK_FQ_SHIFT 0 +#define PMIC_LED12_BLK_FQ_MASK (0x7<< PMIC_LED12_BLK_FQ_SHIFT) +#define PMIC_LED12_BLK_DT_SHIFT 4 +#define PMIC_LED12_BLK_DT_MASK (0x3<< PMIC_LED12_BLK_DT_SHIFT) +#endif // SDK_PMIC_REV==0 //---- PMIC_LED12_B4 #define PMIC_LED12_B4_L1_SHIFT 0 @@ -156,106 +185,75 @@ extern "C" { #define PMIC_LED12_B2_L2_SHIFT 4 #define PMIC_LED12_B2_L2_MASK (0x7<< PMIC_LED12_B2_L2_SHIFT) -//---- PMIC_LED12_B15 +//---- PMIC_LED12_B1 #define PMIC_LED12_B5_L1_SHIFT 0 #define PMIC_LED12_B5_L1_MASK (0x7<< PMIC_LED12_B5_L1_SHIFT) #define PMIC_LED12_B1_L2_SHIFT 4 #define PMIC_LED12_B1_L2_MASK (0x7<< PMIC_LED12_B1_L2_SHIFT) -//---- PMIC_LED3_BRT -#define PMIC_LED3_BRT_SHIFT 0 -#define PMIC_LED3_BRT_MASK (0x7<< PMIC_LED3_BRT_SHIFT) +//---- PMIC_BL1_BRT +#define PMIC_BL1_BRT_SHIFT 0 +#define PMIC_BL1_BRT_MASK (0x1f<< PMIC_BL1_BRT_SHIFT) -//---- PMIC_LED12_BLK -#define PMIC_LED12_BLK_FQ_SHIFT 0 -#define PMIC_LED12_BLK_FQ_MASK (0x7<< PMIC_LED12_BLK_FQ_SHIFT) -#define PMIC_LED12_BLK_DT_SHIFT 4 -#define PMIC_LED12_BLK_DT_MASK (0x3<< PMIC_LED12_BLK_DT_SHIFT) - -//---- PMIC_LED3_BLK -#define PMIC_LED3_BLK_FQ_SHIFT 0 -#define PMIC_LED3_BLK_FQ_MASK (0x7<< PMIC_LED3_BLK_FQ_SHIFT) -#define PMIC_LED3_BLK_DT_SHIFT 4 -#define PMIC_LED3_BLK_DT_MASK (0x3<< PMIC_LED3_BLK_DT_SHIFT) - -//---- PMIC_BL_BRT -#define PMIC_BL_BRT_SHIFT 0 -#define PMIC_BL_BRT_MASK (0x1f<< PMIC_BL_BRT_SHIFT) +//---- PMIC_BL2_BRT +#define PMIC_BL2_BRT_SHIFT 0 +#define PMIC_BL2_BRT_MASK (0x1f<< PMIC_BL2_BRT_SHIFT) -//---- PMIC_BT_STAT +//---- PMIC_BT_INFO typedef enum { - PMIC_BT_STAT_VLT_L1 = (0 << PMIC_BT_STAT_VLT_SHIFT), - PMIC_BT_STAT_VLT_L2 = (1 << PMIC_BT_STAT_VLT_SHIFT), - PMIC_BT_STAT_VLT_L3 = (2 << PMIC_BT_STAT_VLT_SHIFT), - PMIC_BT_STAT_VLT_L4 = (3 << PMIC_BT_STAT_VLT_SHIFT), - PMIC_BT_STAT_VLT_L5 = (4 << PMIC_BT_STAT_VLT_SHIFT) + PMIC_BT_INFO_VLT_L1 = (0 << PMIC_BT_INFO_VLT_SHIFT), + PMIC_BT_INFO_VLT_L2 = (1 << PMIC_BT_INFO_VLT_SHIFT), + PMIC_BT_INFO_VLT_L3 = (2 << PMIC_BT_INFO_VLT_SHIFT), + PMIC_BT_INFO_VLT_L4 = (3 << PMIC_BT_INFO_VLT_SHIFT), + PMIC_BT_INFO_VLT_L5 = (4 << PMIC_BT_INFO_VLT_SHIFT) } PMBatteryLevel; -//---- PMIC_AGPIO_CTL +//---- PMIC_GPIO_CTL typedef enum { - PMIC_AGPIO_CTL_AO_NONE = (0x0 << PMIC_AGPIO_CTL_AO_SHIFT), // default - PMIC_AGPIO_CTL_AO_VLT = (0x1 << PMIC_AGPIO_CTL_AO_SHIFT), - PMIC_AGPIO_CTL_AO_AMPR = (0x2 << PMIC_AGPIO_CTL_AO_SHIFT), - PMIC_AGPIO_CTL_AO_TEMP = (0x3 << PMIC_AGPIO_CTL_AO_SHIFT) + PMIC_GPIO_CTL_AO_NONE = (0x0 << PMIC_GPIO_CTL_AO_SHIFT), // default + PMIC_GPIO_CTL_AO_VLT = (0x1 << PMIC_GPIO_CTL_AO_SHIFT), + PMIC_GPIO_CTL_AO_AMPR = (0x2 << PMIC_GPIO_CTL_AO_SHIFT), + PMIC_GPIO_CTL_AO_TEMP = (0x3 << PMIC_GPIO_CTL_AO_SHIFT) } PMAnalogOut; -//---- PMIC_OFF_TIME +//---- PMIC_TIME_CTL typedef enum { - PMIC_OFF_TIME_100MS = (0x0 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_200MS = (0x1 << PMIC_OFF_TIME_SHIFT), // default - PMIC_OFF_TIME_300MS = (0x2 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_500MS = (0x3 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_700MS = (0x4 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_900MS = (0x5 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_1S = (0x6 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_1500MS = (0x7 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_2S = (0x8 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_2500MS = (0x9 << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_3S = (0xa << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_4S = (0xb << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_5S = (0xc << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_7S = (0xd << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_9S = (0xe << PMIC_OFF_TIME_SHIFT), - PMIC_OFF_TIME_10S = (0xf << PMIC_OFF_TIME_SHIFT) +#if SDK_PMIC_REV!=0 + PMIC_TIME_CTL_OFF_125MS = (0x0 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_250MS = (0x1 << PMIC_TIME_CTL_OFF_SHIFT), // default + PMIC_TIME_CTL_OFF_500MS = (0x2 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_750MS = (0x3 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_1S = (0x4 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_2S = (0x5 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_4S = (0x6 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_8S = (0x7 << PMIC_TIME_CTL_OFF_SHIFT) +#else // SDK_PMIC_REV==0 + PMIC_TIME_CTL_OFF_100MS = (0x0 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_200MS = (0x1 << PMIC_TIME_CTL_OFF_SHIFT), // default + PMIC_TIME_CTL_OFF_300MS = (0x2 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_500MS = (0x3 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_700MS = (0x4 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_900MS = (0x5 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_1S = (0x6 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_1500MS = (0x7 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_2S = (0x8 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_2500MS = (0x9 << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_3S = (0xa << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_4S = (0xb << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_5S = (0xc << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_7S = (0xd << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_9S = (0xe << PMIC_TIME_CTL_OFF_SHIFT), + PMIC_TIME_CTL_OFF_10S = (0xf << PMIC_TIME_CTL_OFF_SHIFT) +#endif // SDK_PMIC_REV==0 } PMOffTime; -//---- PMIC_GPU_VLT -typedef enum -{ - PMIC_GPU_V1A_0875 = (0x0 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_0900 = (0x1 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_0925 = (0x2 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_0950 = (0x3 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_0975 = (0x4 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1000 = (0x5 << PMIC_GPU_VLT_V1A_SHIFT), // default - PMIC_GPU_V1A_1025 = (0x6 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1050 = (0x7 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1075 = (0x8 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1100 = (0x9 << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1125 = (0xa << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1150 = (0xb << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1175 = (0xc << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1200 = (0xd << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1225 = (0xe << PMIC_GPU_VLT_V1A_SHIFT), - PMIC_GPU_V1A_1250 = (0xf << PMIC_GPU_VLT_V1A_SHIFT) -} -PMGpuV1A; - -typedef enum -{ - PMIC_GPU_V18_1800 = (0x0 << PMIC_GPU_VLT_V18_SHIFT), // default - PMIC_GPU_V18_1850 = (0x1 << PMIC_GPU_VLT_V18_SHIFT), - PMIC_GPU_V18_1900 = (0x2 << PMIC_GPU_VLT_V18_SHIFT) -} -PMGpuV18; - //---- PMIC_BT_CRCT typedef enum { @@ -341,49 +339,29 @@ typedef enum } PMBatteryThreshold4Down; -//---- PMIC_PFM_PWM +//---- PMIC_OUT_CTL typedef enum { - PMIC_PFM_PWM_V18_PWM = (0 << PMIC_PFM_PWM_V18_SHIFT), // default - PMIC_PFM_PWM_V18_PFM = (1 << PMIC_PFM_PWM_V18_SHIFT), - PMIC_PFM_PWM_V18_AUTO = (2 << PMIC_PFM_PWM_V18_SHIFT) + PMIC_OUT_CTL_V18_PWM = (0 << PMIC_OUT_CTL_V18_SHIFT), // default + PMIC_OUT_CTL_V18_PFM = (1 << PMIC_OUT_CTL_V18_SHIFT) } PMPfmPwmV18; typedef enum { - PMIC_PFM_PWM_V12_PWM = (0 << PMIC_PFM_PWM_V12_SHIFT), // default - PMIC_PFM_PWM_V12_PFM = (1 << PMIC_PFM_PWM_V12_SHIFT) + PMIC_OUT_CTL_V12_PWM = (0 << PMIC_OUT_CTL_V12_SHIFT), // default + PMIC_OUT_CTL_V12_PFM = (1 << PMIC_OUT_CTL_V12_SHIFT) } PMPfmPwmV12; typedef enum { - PMIC_PFM_PWM_V33_PWM = (0 << PMIC_PFM_PWM_V33_SHIFT), // default - PMIC_PFM_PWM_V33_PFM = (1 << PMIC_PFM_PWM_V33_SHIFT) + PMIC_OUT_CTL_V33_PWM = (0 << PMIC_OUT_CTL_V33_SHIFT), // default + PMIC_OUT_CTL_V33_PFM = (1 << PMIC_OUT_CTL_V33_SHIFT) } PMPfmPwmV33; -//---- PMIC_BT_VDET -typedef enum -{ - PMIC_BT_VDET_FREQ_10HZ = (0 << PMIC_BT_VDET_FREQ_SHIFT), - PMIC_BT_VDET_FREQ_100HZ = (1 << PMIC_BT_VDET_FREQ_SHIFT), - PMIC_BT_VDET_FREQ_200HZ = (2 << PMIC_BT_VDET_FREQ_SHIFT), // default - PMIC_BT_VDET_FREQ_1KHZ = (3 << PMIC_BT_VDET_FREQ_SHIFT) -} -PMVltDetectFreq; - -typedef enum -{ - PMIC_BT_VDET_NUM_16 = (0 << PMIC_BT_VDET_NUM_SHIFT), // default - PMIC_BT_VDET_NUM_64 = (1 << PMIC_BT_VDET_NUM_SHIFT), - PMIC_BT_VDET_NUM_256 = (2 << PMIC_BT_VDET_NUM_SHIFT), - PMIC_BT_VDET_NUM_512 = (3 << PMIC_BT_VDET_NUM_SHIFT) -} -PMVltDetectNum; - -//---- PMIC_LED12_B4 / PMIC_LED12_B3 / PMIC_LED12_B2 / PMIC_LED12_B15 / PMIC_LED3_BRT +//---- PMIC_LED12_B4 / PMIC_LED12_B3 / PMIC_LED12_B2 / PMIC_LED12_B1 typedef enum { PMIC_LED_BRT_OFF = 0, // default @@ -501,20 +479,7 @@ typedef enum } PMLed2Bright1; -typedef enum -{ - PMIC_LED3_BRT_OFF = (0 << PMIC_LED3_BRT_SHIFT), // default - PMIC_LED3_BRT_14 = (1 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_28 = (2 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_43 = (3 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_57 = (4 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_71 = (5 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_85 = (6 << PMIC_LED3_BRT_SHIFT), - PMIC_LED3_BRT_100 = (7 << PMIC_LED3_BRT_SHIFT) -} -PMLed3Bright; - -//---- PMIC_LED12_BLK / PMIC_LED3_BLK +//---- PMIC_LED_CTL ( PMIC_LED12_BLK ) typedef enum { @@ -529,45 +494,39 @@ PMLedBlinkFreqCommon; typedef enum { +#if SDK_PMIC_REV!=0 + PMIC_LED12_BLK_FREQ_041HZ = (0 << PMIC_LED_CTL_L12_BLKF_SHIFT), + PMIC_LED12_BLK_FREQ_082HZ = (1 << PMIC_LED_CTL_L12_BLKF_SHIFT), + PMIC_LED12_BLK_FREQ_2Z = (2 << PMIC_LED_CTL_L12_BLKF_SHIFT), // default + PMIC_LED12_BLK_FREQ_4HZ = (3 << PMIC_LED_CTL_L12_BLKF_SHIFT) +#else // SDK_PMIC_REV==0 PMIC_LED12_BLK_FREQ_033HZ = (0 << PMIC_LED12_BLK_FQ_SHIFT), // default PMIC_LED12_BLK_FREQ_050HZ = (1 << PMIC_LED12_BLK_FQ_SHIFT), PMIC_LED12_BLK_FREQ_067HZ = (2 << PMIC_LED12_BLK_FQ_SHIFT), PMIC_LED12_BLK_FREQ_1HZ = (3 << PMIC_LED12_BLK_FQ_SHIFT), PMIC_LED12_BLK_FREQ_2HZ = (4 << PMIC_LED12_BLK_FQ_SHIFT), PMIC_LED12_BLK_FREQ_4HZ = (5 << PMIC_LED12_BLK_FQ_SHIFT) +#endif // SDK_PMIC_REV==0 } PMLed12BlinkFreq; typedef enum { - PMIC_LED3_BLK_FREQ_033HZ = (0 << PMIC_LED3_BLK_FQ_SHIFT), // default - PMIC_LED3_BLK_FREQ_050HZ = (1 << PMIC_LED3_BLK_FQ_SHIFT), - PMIC_LED3_BLK_FREQ_067HZ = (2 << PMIC_LED3_BLK_FQ_SHIFT), - PMIC_LED3_BLK_FREQ_1HZ = (3 << PMIC_LED3_BLK_FQ_SHIFT), - PMIC_LED3_BLK_FREQ_2HZ = (4 << PMIC_LED3_BLK_FQ_SHIFT), - PMIC_LED3_BLK_FREQ_4HZ = (5 << PMIC_LED3_BLK_FQ_SHIFT) -} -PMLed3BlinkFreq; - -typedef enum -{ +#if SDK_PMIC_REV!=0 + PMIC_LED12_BLK_DUTY_10 = (0 << PMIC_LED_CTL_L12_BLKD_SHIFT), + PMIC_LED12_BLK_DUTY_25 = (1 << PMIC_LED_CTL_L12_BLKD_SHIFT), + PMIC_LED12_BLK_DUTY_50 = (2 << PMIC_LED_CTL_L12_BLKD_SHIFT), // default + PMIC_LED12_BLK_DUTY_75 = (3 << PMIC_LED_CTL_L12_BLKD_SHIFT) +#else // SDK_PMIC_REV==0 PMIC_LED12_BLK_DUTY_10 = (0 << PMIC_LED12_BLK_DT_SHIFT), // default PMIC_LED12_BLK_DUTY_25 = (1 << PMIC_LED12_BLK_DT_SHIFT), PMIC_LED12_BLK_DUTY_50 = (2 << PMIC_LED12_BLK_DT_SHIFT), PMIC_LED12_BLK_DUTY_75 = (3 << PMIC_LED12_BLK_DT_SHIFT) +#endif // SDK_PMIC_REV==0 } PMLed12BlinkDuty; -typedef enum -{ - PMIC_LED3_BLK_DUTY_10 = (0 << PMIC_LED3_BLK_DT_SHIFT), // default - PMIC_LED3_BLK_DUTY_25 = (1 << PMIC_LED3_BLK_DT_SHIFT), - PMIC_LED3_BLK_DUTY_FIREFLY = (2 << PMIC_LED3_BLK_DT_SHIFT), - PMIC_LED3_BLK_DUTY_NTR = (3 << PMIC_LED3_BLK_DT_SHIFT) -} -PMLed3BlinkDuty; - -//---- PMIC_BL_BRT +//---- PMIC_BL1_BRT / PMIC_BL2_BRT typedef enum { PMIC_BL_BRT_MIN = 0, // default