From 0dba10e72f28b4b5c2d0068919747cc5430592ad Mon Sep 17 00:00:00 2001 From: nakasima Date: Wed, 30 May 2007 11:02:47 +0000 Subject: [PATCH] fix mic and i2s. git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/twl_wrapsdk/trunk@97 4ee2a332-4b2b-5046-8439-1ba90f034370 --- .../buildsetup/ioreg_sp/io_register_list.csv | 4 +- build/libraries/snd/ARM7/snd_i2s.c | 13 +- build/libraries/snd/ARM7/snd_mic.c | 99 +-- build/tests/os/alarm-1/ARM7/src/main.c | 1 + build/tests/snd/mic-1/ARM7/src/main.c | 15 + build/tests/snd/mic-2/ARM7/src/main.c | 22 + include/twl.h | 1 + include/twl/pm.h | 25 + include/twl/pm/common/pm_ex_reg.h | 585 ++++++++++++++++++ include/twl/snd/ARM7/snd_mic.h | 11 + 10 files changed, 731 insertions(+), 45 deletions(-) create mode 100644 include/twl/pm.h create mode 100644 include/twl/pm/common/pm_ex_reg.h diff --git a/build/buildsetup/ioreg_sp/io_register_list.csv b/build/buildsetup/ioreg_sp/io_register_list.csv index eed481b..eae3a73 100644 --- a/build/buildsetup/ioreg_sp/io_register_list.csv +++ b/build/buildsetup/ioreg_sp/io_register_list.csv @@ -76,9 +76,9 @@ 0x4500,,I2CD,8,rw,EXI,volatile,,,,,,,,,,,,,,,,,,,,, 0x4501,,I2CCNT,8,rw,EXI,volatile,E,7,1,I,6,1,RW,5,1,ACK,4,1,NT,2,1,START,1,1,STOP,0,1 #I2S twl p208 〜 p213,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4700,,I2SCNT,8,rw,SND,volatile,E,15,1,MUTE,14,1,CODEC_SMP,13,1,MIX_RATIO,0,4,,,,,,,,, +0x4700,,I2SCNT,16,rw,SND,volatile,E,15,1,MUTE,14,1,CODEC_SMP,13,1,MIX_RATIO,0,4,,,,,,,,, #MIC twl p200 〜 p203,,,,,,,,,,,,,,,,,,,,,,,,,,, -0x4600,,MICCNT,8,rw,SND,volatile,E,15,1,IM,13,2,FIFO_CLR,12,1,FIFO_ERR,11,1,FIFO_FUL,10,1,FIFO_HALF,9,1,FIFO_EMP,8,1,FIFO_SMP,2,2,NR,1,1,NL,0,1 +0x4600,,MICCNT,16,rw,SND,volatile,E,15,1,IM,13,2,FIFO_CLR,12,1,FIFO_ERR,11,1,FIFO_FUL,10,1,FIFO_HALF,9,1,FIFO_EMP,8,1,FIFO_SMP,2,2,NR,1,1,NL,0,1 0x4604,,MIC_FIFO,32,rw,SND,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, #表示ステータス nitro p215 / twl p222,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, 0x004,,DISPSTAT,16,rw,GX,volatile,VCOUNTER,7,9,LD_INI,6,1,VQI,5,1,HBI,4,1,VBI,3,1,LYC,2,1,HBLK,1,1,VBLK,0,1,,,,,, diff --git a/build/libraries/snd/ARM7/snd_i2s.c b/build/libraries/snd/ARM7/snd_i2s.c index 16d6c84..73857fa 100644 --- a/build/libraries/snd/ARM7/snd_i2s.c +++ b/build/libraries/snd/ARM7/snd_i2s.c @@ -28,7 +28,7 @@ static variables ******************************************************************************/ -static u8 state; +static u16 state; static BOOL isTwl = FALSE; /****************************************************************************** @@ -41,17 +41,18 @@ static void SNDi_I2SInit(void) if (isInitialized == FALSE) { isInitialized = TRUE; - if ((reg_CFG_CLK & REG_CFG_CLK_SND_MASK) == 0) - { - CDC_Init(); - } reg_SND_POWCNT |= REG_SND_POWCNT_SPE_MASK; reg_CFG_TWL_EX |= REG_CFG_TWL_EX_I2S_MASK; if (reg_CFG_TWL_EX & REG_CFG_TWL_EX_I2S_MASK) { isTwl = TRUE; reg_SND_I2SCNT |= REG_SND_I2SCNT_MIX_RATIO_MASK; - reg_SND_I2SCNT &= ~REG_SND_I2SCNT_MUTE_MASK; + reg_SND_I2SCNT &= ~(REG_SND_I2SCNT_MUTE_MASK | REG_SND_I2SCNT_CODEC_SMP_MASK); // 32KHz + } + if ((reg_CFG_CLK & REG_CFG_CLK_SND_MASK) == 0) + { + // initialize codec with enabling I2S + CDC_Init(); } } } diff --git a/build/libraries/snd/ARM7/snd_mic.c b/build/libraries/snd/ARM7/snd_mic.c index 5a71b72..d6c1441 100644 --- a/build/libraries/snd/ARM7/snd_mic.c +++ b/build/libraries/snd/ARM7/snd_mic.c @@ -15,6 +15,7 @@ *---------------------------------------------------------------------------*/ #include +#include #include @@ -27,18 +28,32 @@ void MICi_FifoInterruptHandler( void ); static MICWork micWork; +/*---------------------------------------------------------------------------* + Name: MICi_Init + + Description: initialize MIC + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void MICi_Init( void ) +{ + CDC_InitMic(); +} + /*---------------------------------------------------------------------------* Name: MICi_Start Description: start MIC - Arguments: dtc : enable DTC or not + Arguments: Returns: None *---------------------------------------------------------------------------*/ void MICi_Start( MICSampleRate smp, u32 dmaNo, void *dest, s32 size ) { - MICWork *wp = &micWork; + MICWork *wp = &micWork; OSIntrMode enabled; @@ -50,28 +65,28 @@ void MICi_Start( MICSampleRate smp, u32 dmaNo, void *dest, s32 size ) enabled = OS_DisableInterrupts(); - if ( dest != NULL ) - { - if ( MI_EXDMA_CH_MIN <= dmaNo && dmaNo <= MI_EXDMA_CH_MAX ) - { + if ( dest != NULL ) + { + if ( MI_EXDMA_CH_MIN <= dmaNo && dmaNo <= MI_EXDMA_CH_MAX ) + { u32 ch = dmaNo + MI_EXDMA_CH_MIN; - MIi_StopExDma( dmaNo ); + MIi_StopExDma( dmaNo ); - MICi_ExDmaRecvAsync( dmaNo, dest, size ); + MICi_ExDmaRecvAsync( dmaNo, dest, size ); - OS_SetIrqFunction( OS_IE_DMA4 + ch, MICi_ExDmaInterruptHandler ); + OS_SetIrqFunction( OS_IE_DMA4 + ch, MICi_ExDmaInterruptHandler ); - reg_OS_IF = (OS_IE_DMA4 << ch); - reg_OS_IE |= (OS_IE_DMA4 << ch); // enable mic dma interrupt - } - } + reg_OS_IF = (OS_IE_DMA4 << ch); + reg_OS_IE |= (OS_IE_DMA4 << ch); // enable mic dma interrupt + } + } SND_Enable(); // start monoral sampling - reg_SND_MICCNT = (u8)REG_SND_MICCNT_FIFO_CLR_MASK; - reg_SND_MICCNT = (u8)(REG_SND_MICCNT_E_MASK | REG_SND_MICCNT_NR_MASK | MIC_INTR_OVERFLOW + reg_SND_MICCNT = REG_SND_MICCNT_FIFO_CLR_MASK; + reg_SND_MICCNT = (u16)(REG_SND_MICCNT_E_MASK | REG_SND_MICCNT_NR_MASK | MIC_INTR_OVERFLOW | smp); (void)OS_RestoreInterrupts(enabled); @@ -88,31 +103,31 @@ void MICi_Start( MICSampleRate smp, u32 dmaNo, void *dest, s32 size ) *---------------------------------------------------------------------------*/ void MICi_Stop( void ) { - MICWork *wp = &micWork; + MICWork *wp = &micWork; OSIntrMode enabled = OS_DisableInterrupts(); if ( reg_SND_MICCNT & REG_SND_MICCNT_E_MASK ) { - u32 dmaNo = wp->dmaNo; + u32 dmaNo = wp->dmaNo; - reg_SND_MICCNT &= ~REG_SND_MICCNT_E_MASK; + reg_SND_MICCNT &= ~REG_SND_MICCNT_E_MASK; - if ( MI_EXDMA_CH_MIN <= dmaNo && dmaNo <= MI_EXDMA_CH_MAX ) - { + if ( MI_EXDMA_CH_MIN <= dmaNo && dmaNo <= MI_EXDMA_CH_MAX ) + { u32 ch = dmaNo + MI_EXDMA_CH_MIN; - MIi_StopExDma( dmaNo ); + MIi_StopExDma( dmaNo ); - reg_OS_IE &= ~(OS_IE_DMA4 << ch); // disable mic dma interrupt - reg_OS_IF = (OS_IE_DMA4 << ch); - } - else - { - reg_OS_IE2 &= ~(OS_IE_MIC >> 32); // disable mic fifo interrupt - reg_OS_IF2 = (OS_IE_MIC >> 32); - } - } + reg_OS_IE &= ~(OS_IE_DMA4 << ch); // disable mic dma interrupt + reg_OS_IF = (OS_IE_DMA4 << ch); + } + else if ( dmaNo > MI_EXDMA_CH_MAX ) + { + reg_OS_IE2 &= ~(OS_IE_MIC >> 32); // disable mic fifo interrupt + reg_OS_IF2 = (OS_IE_MIC >> 32); + } + } (void)OS_RestoreInterrupts(enabled); } @@ -131,8 +146,12 @@ void MICi_Stop( void ) *---------------------------------------------------------------------------*/ static void MICi_ExDmaRecvAsync( u32 dmaNo, void *dest, s32 size ) { - u32 interval = (0x2C0 * 16) - 16; - MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1; + u32 interval = (0x2C0 * 16) - 16; + MIExDmaPrescaler prescale = MI_EXDMA_PRESCALER_1; + +#ifdef TWL_PLATFORM_BB + interval /= 2; +#endif // TWL_PLATFORM_BB MIi_ExDmaRecvAsyncCore( dmaNo, (void*)REG_MIC_FIFO_ADDR, dest, (u32)size, (u32)size, @@ -152,11 +171,13 @@ static void MICi_ExDmaRecvAsync( u32 dmaNo, void *dest, s32 size ) *---------------------------------------------------------------------------*/ void MICi_ExDmaInterruptHandler( void ) { -// MICWork *wp = &micWork; - // OS_TPrintf( "*" ); -// MICi_ExDmaRecvAsync( wp->dmaNo, wp->buf, wp->bufSize ); +#if 0 + MICWork *wp = &micWork; + + MICi_ExDmaRecvAsync( wp->dmaNo, wp->buf, wp->bufSize ); +#endif } /*---------------------------------------------------------------------------* @@ -170,9 +191,13 @@ void MICi_ExDmaInterruptHandler( void ) *---------------------------------------------------------------------------*/ void MICi_FifoInterruptHandler( void ) { - MICWork *wp = &micWork; +// OS_TPrintf( "X" ); - MIi_CpuSend32( (void*)REG_MIC_FIFO_ADDR, wp->buf, (u32)wp->bufSize ); +#if 0 + MICWork *wp = &micWork; + + MIi_CpuSend32( (void*)REG_MIC_FIFO_ADDR, wp->buf, (u32)wp->bufSize ); +#endif } diff --git a/build/tests/os/alarm-1/ARM7/src/main.c b/build/tests/os/alarm-1/ARM7/src/main.c index 1a66222..2bf837a 100644 --- a/build/tests/os/alarm-1/ARM7/src/main.c +++ b/build/tests/os/alarm-1/ARM7/src/main.c @@ -221,6 +221,7 @@ void alarmDisp2(u32 arg) OS_Panic("END\n"); } + OS_Printf(">>> called alarmCallback2. arg=%x\n", arg); // OS_Printf(">>> called alarmCallback2. arg=%x SYSCLOCK=%x\n", arg, OS_GetTime()); // OS_Printf( ">>> sp=%x\n", OSi_GetCurrentStackPointer() ); } diff --git a/build/tests/snd/mic-1/ARM7/src/main.c b/build/tests/snd/mic-1/ARM7/src/main.c index 78de828..9f7a408 100644 --- a/build/tests/snd/mic-1/ARM7/src/main.c +++ b/build/tests/snd/mic-1/ARM7/src/main.c @@ -34,9 +34,23 @@ void TwlSpMain(void) OS_Init(); OS_InitThread(); +// reg_CFG_DS_MDFY |= REG_CFG_DS_MDFY_SND_MASK; // SOUND回路バグ修正 (default: off) +// reg_CFG_DS_MDFY |= REG_CFG_DS_MDFY_SDMA_MASK; // SOUND-DMAバグ修正 (default: off) +// reg_CFG_DS_EX &= ~REG_CFG_DS_EX_SDMA2_MASK; // SOUND-DMA新回路 (default: on) + + // ボタン入力サーチ初期化 + (void)PAD_InitXYButton(); + + // 割込み許可 + (void)OS_EnableIrq(); + (void)OS_EnableInterrupts(); + // サウンド初期化 SND_Init(THREAD_PRIO_SND); + // マイク初期化 +// MICi_Init(); + OS_TPrintf("\nARM7 starts.\n"); MICi_Start( MIC_SMP_ALL, MIC_DEFAULT_DMA_NO, micBuf, sizeof(micBuf) ); @@ -61,3 +75,4 @@ void TwlSpMain(void) OS_TPrintf("\nARM7 ends.\n"); OS_Terminate(); } + diff --git a/build/tests/snd/mic-2/ARM7/src/main.c b/build/tests/snd/mic-2/ARM7/src/main.c index bc8cc1e..c2dc7e2 100644 --- a/build/tests/snd/mic-2/ARM7/src/main.c +++ b/build/tests/snd/mic-2/ARM7/src/main.c @@ -22,6 +22,10 @@ #define ENABLE_PSG +// ===== スレッド優先度 ===== + +#define THREAD_PRIO_SND 6 + #define MY_MIC_BUF_LEN 0x100 #define MPI 3.14159265358979323846 @@ -182,6 +186,24 @@ static void TestFunc( void ) void TwlSpMain(void) { OS_Init(); + OS_InitThread(); + +// reg_CFG_DS_MDFY |= REG_CFG_DS_MDFY_SND_MASK; // SOUND回路バグ修正 (default: off) +// reg_CFG_DS_MDFY |= REG_CFG_DS_MDFY_SDMA_MASK; // SOUND-DMAバグ修正 (default: off) +// reg_CFG_DS_EX &= ~REG_CFG_DS_EX_SDMA2_MASK; // SOUND-DMA新回路 (default: on) + + // ボタン入力サーチ初期化 + (void)PAD_InitXYButton(); + + // 割込み許可 + (void)OS_EnableIrq(); + (void)OS_EnableInterrupts(); + + // サウンド初期化 + SND_Init(THREAD_PRIO_SND); + + // マイク初期化 +// MICi_Init(); OS_TPrintf("\nARM7 starts.\n"); diff --git a/include/twl.h b/include/twl.h index 017d870..1c87dbc 100644 --- a/include/twl.h +++ b/include/twl.h @@ -20,6 +20,7 @@ #include #include +#include #include #include #ifdef SDK_DEBUGGER_KMC diff --git a/include/twl/pm.h b/include/twl/pm.h new file mode 100644 index 0000000..7fa7508 --- /dev/null +++ b/include/twl/pm.h @@ -0,0 +1,25 @@ +/*---------------------------------------------------------------------------* + Project: TwlSDK - include - PM + File: pm.h + + Copyright 2007 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Log: $ + $NoKeywords: $ + *---------------------------------------------------------------------------*/ + +#ifndef TWL_PM_H_ +#define TWL_PM_H_ + +#include + +#include + +/* TWL_PM_H_ */ +#endif diff --git a/include/twl/pm/common/pm_ex_reg.h b/include/twl/pm/common/pm_ex_reg.h new file mode 100644 index 0000000..e683db0 --- /dev/null +++ b/include/twl/pm/common/pm_ex_reg.h @@ -0,0 +1,585 @@ +/*---------------------------------------------------------------------------* + Project: TwlSDK - PM - include - common + File: pm_ex_reg.h + + Copyright 2006 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Log: $ + $NoKeywords: $ + *---------------------------------------------------------------------------*/ +#ifndef TWL_PM_PM_EX_REG_H_ +#define TWL_PM_PM_EX_REG_H_ + + +#ifdef __cplusplus +extern "C" { +#endif + + +//================================================================ +// PMIC extention register parameter +//================================================================ +//---------------- address +#define REG_PMIC_CTL2_ADDR 0x10 // R/W +#define REG_PMIC_BT_STAT_ADDR 0x11 // R +#define REG_PMIC_SW_FLAGS_ADDR 0x12 // R/W +#define REG_PMIC_AGPIO_CTL_ADDR 0x13 // R/W +#define REG_PMIC_GPIO_ADDR 0x14 // R/W +#define REG_PMIC_OFF_TIME_ADDR 0x15 // R/W +#define REG_PMIC_PFM_PWM_ADDR 0x16 // R/W +#define REG_PMIC_GPU_VLT_ADDR 0x17 // R/W +#define REG_PMIC_BT_CRCT_ADDR 0x18 // R/W +#define REG_PMIC_BT_THL_ADDR 0x19 // R/W +#define REG_PMIC_BT_THH_ADDR 0x1a // R/W +#define REG_PMIC_BT_VDET_ADDR 0x1b // R/W +#define REG_PMIC_LED_CTL_ADDR 0x1c // R/W +#define REG_PMIC_LED12_B4_ADDR 0x1d // R/W +#define REG_PMIC_LED12_B3_ADDR 0x1e // R/W +#define REG_PMIC_LED12_B2_ADDR 0x1f // R/W +#define REG_PMIC_LED12_B15_ADDR 0x20 // R/W +#define REG_PMIC_LED3_BRT_ADDR 0x21 // R/W +#define REG_PMIC_LED12_BLK_ADDR 0x22 // R/W +#define REG_PMIC_LED3_BLK_ADDR 0x23 // R/W +#define REG_PMIC_BL_BRT_ADDR 0x24 // R/W +#define REG_PMIC_DEBUG_ADDR 0x2f // R/W + + +//---------------- each register spec +//---- PMIC_CTL2 +#define PMIC_CTL2_RST (1<< 0) +#define PMIC_CTL2_BL_SHIFT 2 +#define PMIC_CTL2_BL_ON (3<< PMIC_CTL2_BL_SHIFT) +#define PMIC_CTL2_BL_OFF (0<< PMIC_CTL2_BL_SHIFT) +#define PMIC_CTL2_GPU_DPD (1<< 4) +#define PMIC_CTL2_LCD_PWR (1<< 5) +#define PMIC_CTL2_PWR_OFF (1<< 6) + +//---- PMIC_BT_STAT +#define PMIC_BT_STAT_VLTLOW (1<< 0) +#define PMIC_BT_STAT_VLT_SHIFT 1 +#define PMIC_BT_STAT_VLT_MASK (7<< PMIC_BT_STAT_VLT_SHIFT) +#define PMIC_BT_STAT_MKR_SHIFT 5 +#define PMIC_BT_STAT_MKR_MASK (7<< PMIC_BT_STAT_MKR_SHIFT) + +//---- PMIC_SW_FLAGS +#define PMIC_SW_FLAGS_WARMBOOT (1 << 7) + +//---- PMIC_AGPIO_CTL +#define PMIC_AGPIO_CTL_O_DACRST (1<< 1) // maybe include GPURST +#define PMIC_AGPIO_CTL_O_GPIO2 (1<< 2) +#define PMIC_AGPIO_CTL_O_ADPT (1<< 3) +#define PMIC_AGPIO_CTL_AO_SHIFT 6 +#define PMIC_AGPIO_CTL_AO_MASK (3<< PMIC_AGPIO_CTL_SHIFT) + +//---- PMIC_GPIO +#define PMIC_GPIO_O_DACRST (1<< 1) // maybe include GPURST +#define PMIC_GPIO_IO_GPIO2 (1<< 2) +#define PMIC_GPIO_I_ADPT (1<< 3) +#define PMIC_GPIO_MKR_SHIFT 4 +#define PMIC_GPIO_MKR_MASK (3<< PMIC_BGPIO_MKR_SHIFT) +#define PMIC_GPIO_VER_SHIFT 6 +#define PMIC_GPIO_VER_MASK (3<< PMIC_BGPIO_VER_SHIFT) + +//---- PMIC_OFF_TIME +#define PMIC_OFF_TIME_SHIFT 0 +#define PMIC_OFF_TIME_MASK (0xf<< PMIC_OFF_TIME_SHIFT) + +//---- PMIC_GPU_VLT +#define PMIC_GPU_VLT_V1A_SHIFT 0 +#define PMIC_GPU_VLT_V1A_MASK (0xf<< PMIC_GPU_VLT_V1A_SHIFT) +#define PMIC_GPU_VLT_V18_SHIFT 4 +#define PMIC_GPU_VLT_V18_MASK (0x3<< PMIC_GPU_VLT_V18_SHIFT) + +//---- PMIC_BT_CRCT +#define PMIC_BT_CRCT_TEMP_ON (1<< 0) +#define PMIC_BT_CRCT_AMPR_ON (1<< 1) +#define PMIC_BT_CRCT_AK_SHIFT 4 +#define PMIC_BT_CRCT_AK_MASK (0x3<< PMIC_BT_CRCT_AK_SHIFT) +#define PMIC_BT_CRCT_TK_SHIFT 6 +#define PMIC_BT_CRCT_TK_MASK (0x3<< PMIC_BT_CRCT_TK_SHIFT) + +//---- PMIC_BT_THL +#define PMIC_BT_THL_TH1_SHIFT 0 +#define PMIC_BT_THL_TH1_MASK (7<< PMIC_BT_THL_TH1_SHIFT) +#define PMIC_BT_THL_TH2_SHIFT 4 +#define PMIC_BT_THL_TH2_MASK (7<< PMIC_BT_THL_TH2_SHIFT) + +//---- PMIC_BT_THH +#define PMIC_BT_THH_TH3_SHIFT 0 +#define PMIC_BT_THH_TH3_MASK (7<< PMIC_BT_THH_TH3_SHIFT) +#define PMIC_BT_THH_TH4_SHIFT 4 +#define PMIC_BT_THH_TH4_MASK (7<< PMIC_BT_THH_TH4_SHIFT) + +//---- PMIC_PFM_PWM +#define PMIC_PFM_PWM_V18_SHIFT 0 +#define PMIC_PFM_PWM_V18_MASK (0x3<< PMIC_PFM_PWM_V18_SHIFT) +#define PMIC_PFM_PWM_V12_SHIFT 2 +#define PMIC_PFM_PWM_V12_MASK (0x1<< PMIC_PFM_PWM_V12_SHIFT) +#define PMIC_PFM_PWM_V33_SHIFT 3 +#define PMIC_PFM_PWM_V33_MASK (0x1<< PMIC_PFM_PWM_V33_SHIFT) + +//---- PMIC_BT_VDET +#define PMIC_BT_VDET_FREQ_SHIFT 0 +#define PMIC_BT_VDET_FREQ_MASK (0x3<< PMIC_BT_VDET_FREQ_SHIFT) +#define PMIC_BT_VDET_NUM_SHIFT 2 +#define PMIC_BT_VDET_NUM_MASK (0x3<< PMIC_BT_VDET_NUM_SHIFT) + +//---- PMIC_LED_CTL +#define PMIC_LED_CTL_L12_B4_ONLY (1<< 0) +#define PMIC_LED_CTL_L12_BLK (1<< 1) +#define PMIC_LED_CTL_L3_BLK (1<< 2) +#define PMIC_LED_CTL_L12_B3_E (1<< 4) +#define PMIC_LED_CTL_L12_B4_E (1<< 5) +#define PMIC_LED_CTL_L12_B5_E (1<< 6) + +//---- PMIC_LED12_B4 +#define PMIC_LED12_B4_L1_SHIFT 0 +#define PMIC_LED12_B4_L1_MASK (0x7<< PMIC_LED12_B4_L1_SHIFT) +#define PMIC_LED12_B4_L2_SHIFT 4 +#define PMIC_LED12_B4_L2_MASK (0x7<< PMIC_LED12_B4_L2_SHIFT) + +//---- PMIC_LED12_B3 +#define PMIC_LED12_B3_L1_SHIFT 0 +#define PMIC_LED12_B3_L1_MASK (0x7<< PMIC_LED12_B3_L1_SHIFT) +#define PMIC_LED12_B3_L2_SHIFT 4 +#define PMIC_LED12_B3_L2_MASK (0x7<< PMIC_LED12_B3_L2_SHIFT) + +//---- PMIC_LED12_B2 +#define PMIC_LED12_B2_L1_SHIFT 0 +#define PMIC_LED12_B2_L1_MASK (0x7<< PMIC_LED12_B2_L1_SHIFT) +#define PMIC_LED12_B2_L2_SHIFT 4 +#define PMIC_LED12_B2_L2_MASK (0x7<< PMIC_LED12_B2_L2_SHIFT) + +//---- PMIC_LED12_B15 +#define PMIC_LED12_B5_L1_SHIFT 0 +#define PMIC_LED12_B5_L1_MASK (0x7<< PMIC_LED12_B5_L1_SHIFT) +#define PMIC_LED12_B1_L2_SHIFT 4 +#define PMIC_LED12_B1_L2_MASK (0x7<< PMIC_LED12_B1_L2_SHIFT) + +//---- PMIC_LED3_BRT +#define PMIC_LED3_BRT_SHIFT 0 +#define PMIC_LED3_BRT_MASK (0x7<< PMIC_LED3_BRT_SHIFT) + +//---- PMIC_LED12_BLK +#define PMIC_LED12_BLK_FQ_SHIFT 0 +#define PMIC_LED12_BLK_FQ_MASK (0x7<< PMIC_LED12_BLK_FQ_SHIFT) +#define PMIC_LED12_BLK_DT_SHIFT 4 +#define PMIC_LED12_BLK_DT_MASK (0x3<< PMIC_LED12_BLK_DT_SHIFT) + +//---- PMIC_LED3_BLK +#define PMIC_LED3_BLK_FQ_SHIFT 0 +#define PMIC_LED3_BLK_FQ_MASK (0x7<< PMIC_LED3_BLK_FQ_SHIFT) +#define PMIC_LED3_BLK_DT_SHIFT 4 +#define PMIC_LED3_BLK_DT_MASK (0x3<< PMIC_LED3_BLK_DT_SHIFT) + +//---- PMIC_BL_BRT +#define PMIC_BL_BRT_SHIFT 0 +#define PMIC_BL_BRT_MASK (0x1f<< PMIC_BL_BRT_SHIFT) + + +//---- PMIC_BT_STAT +typedef enum +{ + PMIC_BT_STAT_VLT_L1 = (0 << PMIC_BT_STAT_VLT_SHIFT), + PMIC_BT_STAT_VLT_L2 = (1 << PMIC_BT_STAT_VLT_SHIFT), + PMIC_BT_STAT_VLT_L3 = (2 << PMIC_BT_STAT_VLT_SHIFT), + PMIC_BT_STAT_VLT_L4 = (3 << PMIC_BT_STAT_VLT_SHIFT), + PMIC_BT_STAT_VLT_L5 = (4 << PMIC_BT_STAT_VLT_SHIFT) +} +PMBatteryLevel; + +//---- PMIC_AGPIO_CTL +typedef enum +{ + PMIC_AGPIO_CTL_AO_NONE = (0x0 << PMIC_AGPIO_CTL_AO_SHIFT), // default + PMIC_AGPIO_CTL_AO_VLT = (0x1 << PMIC_AGPIO_CTL_AO_SHIFT), + PMIC_AGPIO_CTL_AO_AMPR = (0x2 << PMIC_AGPIO_CTL_AO_SHIFT), + PMIC_AGPIO_CTL_AO_TEMP = (0x3 << PMIC_AGPIO_CTL_AO_SHIFT) +} +PMAnalogOut; + +//---- PMIC_OFF_TIME +typedef enum +{ + PMIC_OFF_TIME_100MS = (0x0 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_200MS = (0x1 << PMIC_OFF_TIME_SHIFT), // default + PMIC_OFF_TIME_300MS = (0x2 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_500MS = (0x3 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_700MS = (0x4 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_900MS = (0x5 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_1S = (0x6 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_1500MS = (0x7 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_2S = (0x8 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_2500MS = (0x9 << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_3S = (0xa << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_4S = (0xb << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_5S = (0xc << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_7S = (0xd << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_9S = (0xe << PMIC_OFF_TIME_SHIFT), + PMIC_OFF_TIME_10S = (0xf << PMIC_OFF_TIME_SHIFT) +} +PMOffTime; + +//---- PMIC_GPU_VLT +typedef enum +{ + PMIC_GPU_V1A_0875 = (0x0 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_0900 = (0x1 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_0925 = (0x2 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_0950 = (0x3 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_0975 = (0x4 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1000 = (0x5 << PMIC_GPU_VLT_V1A_SHIFT), // default + PMIC_GPU_V1A_1025 = (0x6 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1050 = (0x7 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1075 = (0x8 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1100 = (0x9 << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1125 = (0xa << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1150 = (0xb << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1175 = (0xc << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1200 = (0xd << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1225 = (0xe << PMIC_GPU_VLT_V1A_SHIFT), + PMIC_GPU_V1A_1250 = (0xf << PMIC_GPU_VLT_V1A_SHIFT) +} +PMGpuV1A; + +typedef enum +{ + PMIC_GPU_V18_1800 = (0x0 << PMIC_GPU_VLT_V18_SHIFT), // default + PMIC_GPU_V18_1850 = (0x1 << PMIC_GPU_VLT_V18_SHIFT), + PMIC_GPU_V18_1900 = (0x2 << PMIC_GPU_VLT_V18_SHIFT) +} +PMGpuV18; + +//---- PMIC_BT_CRCT +typedef enum +{ + PMIC_BT_CRCT_AK_30_10 = (0 << PMIC_BT_CRCT_AK_SHIFT), + PMIC_BT_CRCT_AK_50_10 = (1 << PMIC_BT_CRCT_AK_SHIFT), // default + PMIC_BT_CRCT_AK_70_10 = (2 << PMIC_BT_CRCT_AK_SHIFT), + PMIC_BT_CRCT_AK_90_10 = (3 << PMIC_BT_CRCT_AK_SHIFT) +} +PMAmprCoeff; + +typedef enum +{ + PMIC_BT_CRCT_TK_10 = (0 << PMIC_BT_CRCT_TK_SHIFT), + PMIC_BT_CRCT_TK_15 = (1 << PMIC_BT_CRCT_TK_SHIFT), // default + PMIC_BT_CRCT_TK_20 = (2 << PMIC_BT_CRCT_TK_SHIFT), + PMIC_BT_CRCT_TK_30 = (3 << PMIC_BT_CRCT_TK_SHIFT) +} +PMTempCoeff; + +//---- PMIC_BT_THL / PMIC_BT_THH +typedef enum +{ + PMIC_BT_TH_D0 = 0, + PMIC_BT_TH_D20 = 1, + PMIC_BT_TH_D40 = 2, + PMIC_BT_TH_D60 = 3, + PMIC_BT_TH_D80 = 4, + PMIC_BT_TH_D100 = 5, + PMIC_BT_TH_D120 = 6, + PMIC_BT_TH_D140 = 7 +} +PMBatteryThresholdDownCommon; + +typedef enum +{ + PMIC_BT_THL_TH1_D0 = (0 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D20 = (1 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D40 = (2 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D60 = (3 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D80 = (4 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D100 = (5 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D120 = (6 << PMIC_BT_THL_TH1_SHIFT), + PMIC_BT_THL_TH1_D140 = (7 << PMIC_BT_THL_TH1_SHIFT) +} +PMBatteryThreshold1Down; + +typedef enum +{ + PMIC_BT_THL_TH2_D0 = (0 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D20 = (1 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D40 = (2 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D60 = (3 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D80 = (4 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D100 = (5 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D120 = (6 << PMIC_BT_THL_TH2_SHIFT), + PMIC_BT_THL_TH2_D140 = (7 << PMIC_BT_THL_TH2_SHIFT) +} +PMBatteryThreshold2Down; + +typedef enum +{ + PMIC_BT_THH_TH3_D0 = (0 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D20 = (1 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D40 = (2 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D60 = (3 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D80 = (4 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D100 = (5 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D120 = (6 << PMIC_BT_THH_TH3_SHIFT), + PMIC_BT_THH_TH3_D140 = (7 << PMIC_BT_THH_TH3_SHIFT) +} +PMBatteryThreshold3Down; + +typedef enum +{ + PMIC_BT_THH_TH4_D0 = (0 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D20 = (1 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D40 = (2 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D60 = (3 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D80 = (4 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D100 = (5 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D120 = (6 << PMIC_BT_THH_TH4_SHIFT), + PMIC_BT_THH_TH4_D140 = (7 << PMIC_BT_THH_TH4_SHIFT) +} +PMBatteryThreshold4Down; + +//---- PMIC_PFM_PWM +typedef enum +{ + PMIC_PFM_PWM_V18_PWM = (0 << PMIC_PFM_PWM_V18_SHIFT), // default + PMIC_PFM_PWM_V18_PFM = (1 << PMIC_PFM_PWM_V18_SHIFT), + PMIC_PFM_PWM_V18_AUTO = (2 << PMIC_PFM_PWM_V18_SHIFT) +} +PMPfmPwmV18; + +typedef enum +{ + PMIC_PFM_PWM_V12_PWM = (0 << PMIC_PFM_PWM_V12_SHIFT), // default + PMIC_PFM_PWM_V12_PFM = (1 << PMIC_PFM_PWM_V12_SHIFT) +} +PMPfmPwmV12; + +typedef enum +{ + PMIC_PFM_PWM_V33_PWM = (0 << PMIC_PFM_PWM_V33_SHIFT), // default + PMIC_PFM_PWM_V33_PFM = (1 << PMIC_PFM_PWM_V33_SHIFT) +} +PMPfmPwmV33; + +//---- PMIC_BT_VDET +typedef enum +{ + PMIC_BT_VDET_FREQ_10HZ = (0 << PMIC_BT_VDET_FREQ_SHIFT), + PMIC_BT_VDET_FREQ_100HZ = (1 << PMIC_BT_VDET_FREQ_SHIFT), + PMIC_BT_VDET_FREQ_200HZ = (2 << PMIC_BT_VDET_FREQ_SHIFT), // default + PMIC_BT_VDET_FREQ_1KHZ = (3 << PMIC_BT_VDET_FREQ_SHIFT) +} +PMVltDetectFreq; + +typedef enum +{ + PMIC_BT_VDET_NUM_16 = (0 << PMIC_BT_VDET_NUM_SHIFT), // default + PMIC_BT_VDET_NUM_64 = (1 << PMIC_BT_VDET_NUM_SHIFT), + PMIC_BT_VDET_NUM_256 = (2 << PMIC_BT_VDET_NUM_SHIFT), + PMIC_BT_VDET_NUM_512 = (3 << PMIC_BT_VDET_NUM_SHIFT) +} +PMVltDetectNum; + +//---- PMIC_LED12_B4 / PMIC_LED12_B3 / PMIC_LED12_B2 / PMIC_LED12_B15 / PMIC_LED3_BRT +typedef enum +{ + PMIC_LED_BRT_OFF = 0, // default + PMIC_LED_BRT_14 = 1, + PMIC_LED_BRT_28 = 2, + PMIC_LED_BRT_43 = 3, + PMIC_LED_BRT_57 = 4, + PMIC_LED_BRT_71 = 5, + PMIC_LED_BRT_85 = 6, + PMIC_LED_BRT_100 = 7 +} +PMLedBrightCommon; + +typedef enum +{ + PMIC_LED12_B4_L1_OFF = (0 << PMIC_LED12_B4_L1_SHIFT), // default + PMIC_LED12_B4_L1_14 = (1 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_28 = (2 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_43 = (3 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_57 = (4 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_71 = (5 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_85 = (6 << PMIC_LED12_B4_L1_SHIFT), + PMIC_LED12_B4_L1_100 = (7 << PMIC_LED12_B4_L1_SHIFT) +} +PMLed1Bright4; + +typedef enum +{ + PMIC_LED12_B4_L2_OFF = (0 << PMIC_LED12_B4_L2_SHIFT), // default + PMIC_LED12_B4_L2_14 = (1 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_28 = (2 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_43 = (3 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_57 = (4 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_71 = (5 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_85 = (6 << PMIC_LED12_B4_L2_SHIFT), + PMIC_LED12_B4_L2_100 = (7 << PMIC_LED12_B4_L2_SHIFT) +} +PMLed2Bright4; + +typedef enum +{ + PMIC_LED12_B3_L1_OFF = (0 << PMIC_LED12_B3_L1_SHIFT), // default + PMIC_LED12_B3_L1_14 = (1 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_28 = (2 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_43 = (3 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_57 = (4 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_71 = (5 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_85 = (6 << PMIC_LED12_B3_L1_SHIFT), + PMIC_LED12_B3_L1_100 = (7 << PMIC_LED12_B3_L1_SHIFT) +} +PMLed1Bright3; + +typedef enum +{ + PMIC_LED12_B3_L2_OFF = (0 << PMIC_LED12_B3_L2_SHIFT), // default + PMIC_LED12_B3_L2_14 = (1 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_28 = (2 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_43 = (3 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_57 = (4 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_71 = (5 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_85 = (6 << PMIC_LED12_B3_L2_SHIFT), + PMIC_LED12_B3_L2_100 = (7 << PMIC_LED12_B3_L2_SHIFT) +} +PMLed2Bright3; + +typedef enum +{ + PMIC_LED12_B2_L1_OFF = (0 << PMIC_LED12_B2_L1_SHIFT), // default + PMIC_LED12_B2_L1_14 = (1 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_28 = (2 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_43 = (3 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_57 = (4 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_71 = (5 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_85 = (6 << PMIC_LED12_B2_L1_SHIFT), + PMIC_LED12_B2_L1_100 = (7 << PMIC_LED12_B2_L1_SHIFT) +} +PMLed1Bright2; + +typedef enum +{ + PMIC_LED12_B2_L2_OFF = (0 << PMIC_LED12_B2_L2_SHIFT), // default + PMIC_LED12_B2_L2_14 = (1 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_28 = (2 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_43 = (3 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_57 = (4 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_71 = (5 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_85 = (6 << PMIC_LED12_B2_L2_SHIFT), + PMIC_LED12_B2_L2_100 = (7 << PMIC_LED12_B2_L2_SHIFT) +} +PMLed2Bright2; + +typedef enum +{ + PMIC_LED12_B5_L1_OFF = (0 << PMIC_LED12_B5_L1_SHIFT), // default + PMIC_LED12_B5_L1_14 = (1 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_28 = (2 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_43 = (3 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_57 = (4 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_71 = (5 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_85 = (6 << PMIC_LED12_B5_L1_SHIFT), + PMIC_LED12_B5_L1_100 = (7 << PMIC_LED12_B5_L1_SHIFT) +} +PMLed1Bright5; + +typedef enum +{ + PMIC_LED12_B1_L2_OFF = (0 << PMIC_LED12_B1_L2_SHIFT), // default + PMIC_LED12_B1_L2_14 = (1 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_28 = (2 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_43 = (3 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_57 = (4 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_71 = (5 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_85 = (6 << PMIC_LED12_B1_L2_SHIFT), + PMIC_LED12_B1_L2_100 = (7 << PMIC_LED12_B1_L2_SHIFT) +} +PMLed2Bright1; + +typedef enum +{ + PMIC_LED3_BRT_OFF = (0 << PMIC_LED3_BRT_SHIFT), // default + PMIC_LED3_BRT_14 = (1 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_28 = (2 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_43 = (3 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_57 = (4 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_71 = (5 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_85 = (6 << PMIC_LED3_BRT_SHIFT), + PMIC_LED3_BRT_100 = (7 << PMIC_LED3_BRT_SHIFT) +} +PMLed3Bright; + +//---- PMIC_LED12_BLK / PMIC_LED3_BLK + +typedef enum +{ + PMIC_LED_BLK_FREQ_033HZ = 0, // default + PMIC_LED_BLK_FREQ_050HZ = 1, + PMIC_LED_BLK_FREQ_067HZ = 2, + PMIC_LED_BLK_FREQ_1HZ = 3, + PMIC_LED_BLK_FREQ_2HZ = 4, + PMIC_LED_BLK_FREQ_4HZ = 5 +} +PMLedBlinkFreqCommon; + +typedef enum +{ + PMIC_LED12_BLK_FREQ_033HZ = (0 << PMIC_LED12_BLK_FQ_SHIFT), // default + PMIC_LED12_BLK_FREQ_050HZ = (1 << PMIC_LED12_BLK_FQ_SHIFT), + PMIC_LED12_BLK_FREQ_067HZ = (2 << PMIC_LED12_BLK_FQ_SHIFT), + PMIC_LED12_BLK_FREQ_1HZ = (3 << PMIC_LED12_BLK_FQ_SHIFT), + PMIC_LED12_BLK_FREQ_2HZ = (4 << PMIC_LED12_BLK_FQ_SHIFT), + PMIC_LED12_BLK_FREQ_4HZ = (5 << PMIC_LED12_BLK_FQ_SHIFT) +} +PMLed12BlinkFreq; + +typedef enum +{ + PMIC_LED3_BLK_FREQ_033HZ = (0 << PMIC_LED3_BLK_FQ_SHIFT), // default + PMIC_LED3_BLK_FREQ_050HZ = (1 << PMIC_LED3_BLK_FQ_SHIFT), + PMIC_LED3_BLK_FREQ_067HZ = (2 << PMIC_LED3_BLK_FQ_SHIFT), + PMIC_LED3_BLK_FREQ_1HZ = (3 << PMIC_LED3_BLK_FQ_SHIFT), + PMIC_LED3_BLK_FREQ_2HZ = (4 << PMIC_LED3_BLK_FQ_SHIFT), + PMIC_LED3_BLK_FREQ_4HZ = (5 << PMIC_LED3_BLK_FQ_SHIFT) +} +PMLed3BlinkFreq; + +typedef enum +{ + PMIC_LED12_BLK_DUTY_10 = (0 << PMIC_LED12_BLK_DT_SHIFT), // default + PMIC_LED12_BLK_DUTY_25 = (1 << PMIC_LED12_BLK_DT_SHIFT), + PMIC_LED12_BLK_DUTY_50 = (2 << PMIC_LED12_BLK_DT_SHIFT), + PMIC_LED12_BLK_DUTY_75 = (3 << PMIC_LED12_BLK_DT_SHIFT) +} +PMLed12BlinkDuty; + +typedef enum +{ + PMIC_LED3_BLK_DUTY_10 = (0 << PMIC_LED3_BLK_DT_SHIFT), // default + PMIC_LED3_BLK_DUTY_25 = (1 << PMIC_LED3_BLK_DT_SHIFT), + PMIC_LED3_BLK_DUTY_FIREFLY = (2 << PMIC_LED3_BLK_DT_SHIFT), + PMIC_LED3_BLK_DUTY_NTR = (3 << PMIC_LED3_BLK_DT_SHIFT) +} +PMLed3BlinkDuty; + +//---- PMIC_BL_BRT +typedef enum +{ + PMIC_BL_BRT_MIN = 0, // default + PMIC_BL_BRT_MAX = 0x1f, + PMIC_BL_BRT_DEFAULT = 0x08 +} +PMBackLightBrightness; + + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +/* TWL_PM_PM_EX_REG_H_ */ +#endif diff --git a/include/twl/snd/ARM7/snd_mic.h b/include/twl/snd/ARM7/snd_mic.h index 457e4ee..a29dbf6 100644 --- a/include/twl/snd/ARM7/snd_mic.h +++ b/include/twl/snd/ARM7/snd_mic.h @@ -54,6 +54,17 @@ MICWork; #define MIC_DEFAULT_DMA_NO 6 +/*---------------------------------------------------------------------------* + Name: MICi_Init + + Description: initialize MIC + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void MICi_Init( void ); + /*---------------------------------------------------------------------------* Name: MICi_Start