#ifndef _MDINT_
#define _MDINT_

/*
 External Interrupt Rising Edge Enable Register (EGP)
*/
/* INTPn pin valid edge selection(EGP.EGPn) */
#define INTP_EGP_RESET_VALUE		0x00
#define INTP0_EDGE_RISING_SEL		0x01
#define INTP0_EDGE_RISING_UNSEL		0x00
#define INTP1_EDGE_RISING_SEL		0x02
#define INTP1_EDGE_RISING_UNSEL		0x00
#define INTP2_EDGE_RISING_SEL		0x04
#define INTP2_EDGE_RISING_UNSEL		0x00
#define INTP3_EDGE_RISING_SEL		0x08
#define INTP3_EDGE_RISING_UNSEL		0x00
#define INTP4_EDGE_RISING_SEL		0x10
#define INTP4_EDGE_RISING_UNSEL		0x00
#define INTP5_EDGE_RISING_SEL		0x20
#define INTP5_EDGE_RISING_UNSEL		0x00

/*
 External Interrupt Falling Edge Enable Register (EGN)
*/
/* INTPn pin valid edge selection(EGN.EGNn) */
#define INTP_EGN_RESET_VALUE		0x00
#define INTP0_EDGE_FALLING_SEL		0x01
#define INTP0_EDGE_FALLING_UNSEL	0x00
#define INTP1_EDGE_FALLING_SEL		0x02
#define INTP1_EDGE_FALLING_UNSEL	0x00
#define INTP2_EDGE_FALLING_SEL		0x04
#define INTP2_EDGE_FALLING_UNSEL	0x00
#define INTP3_EDGE_FALLING_SEL		0x08
#define INTP3_EDGE_FALLING_UNSEL	0x00
#define INTP4_EDGE_FALLING_SEL		0x10
#define INTP4_EDGE_FALLING_UNSEL	0x00
#define INTP5_EDGE_FALLING_SEL		0x20
#define INTP5_EDGE_FALLING_UNSEL	0x00



enum MaskableSource {
	INT_LVI, INT_INTP0, INT_INTP1, INT_INTP2,
	INT_INTP3, INT_INTP4, INT_INTP5, INT_SRE6,
	INT_SR6, INT_ST6, INT_CSI10_ST0, INT_TMH1,
	INT_TMH0, INT_TM50, INT_TM000, INT_TM010,
	INT_AD, INT_SR0, INT_TM51 = 19,
	INT_IIC0 = 24
	};



void INTP_Init( void );
#endif