mirror of
https://github.com/rvtr/ntr_bootrom.git
synced 2025-10-31 07:11:11 -04:00
337 lines
9.1 KiB
ArmAsm
337 lines
9.1 KiB
ArmAsm
;********************************************************************
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; IRIS-SUBPモニタ例外ハンドラ
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;********************************************************************
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AREA Init, CODE, READONLY
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INCLUDE IrisSubpDefineArm.s
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INCLUDE IrisSubpMemoryMapArm.s
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INCLUDE IrisSubpMonDefineArm.s
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INCLUDE IrisSubpMonMemoryMapArm.s
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;====================================================================
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; 例外ハンドラ群
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;====================================================================
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;--------------------------------------------------------------------
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; デバッガモニタへジャンプ
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;--------------------------------------------------------------------
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GLOBAL fiq_handler
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CODE32
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fiq_handler
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mrs sp, cpsr ; IRQ/FIQ不許可
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orr sp, sp, #PSR_IRQ_DISABLE | PSR_FIQ_DISABLE
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msr cpsr_cxsf, sp
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ldr sp, fiq_sp ; SP のｾｯﾄ
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add sp, sp, #1
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fiq_m stmfd sp!, {r12, lr} ; ﾚｼﾞｽﾀ の退避（合計3ﾜｰﾄﾞ）
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mrs lr, spsr
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stmfd sp!, {lr}
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bic r12, sp, #1 ; ﾃﾞﾊﾞｯｶﾞ処理へｼﾞｬﾝﾌﾟ
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ldr r12, [r12, #12]
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adr lr, fiq_return
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cmp r12, #0
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bxne r12
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;--------------------------------------------------------------------
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; デバッガモニタからの復帰
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;--------------------------------------------------------------------
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CODE32
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fiq_return
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ldmfd sp!, {lr} ; ﾚｼﾞｽﾀ の復帰
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msr spsr_sxcf, lr
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ldmfd sp!, {r12, lr}
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subs pc, lr, #4
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;--------------------------------------------------------------------
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; 初期化
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;--------------------------------------------------------------------
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EXTERN IrisSubpMonMain
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EXTERN intr_main
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GLOBAL start_handler
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CODE32
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start_handler
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cmp lr, #0 ; fiq_return => pc = -4 対策
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moveq lr, #4
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mov r12, #REG_BASE ; ﾓﾆﾀ/ﾕｰｻﾞ ﾁｪｯｸ
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ldrb r12, [r12, #OFFSET_REG_PAUSE]
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teq r12, #1
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mrseq r12, cpsr ; IRQ/FIQ不許可
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orreq r12, r12, #PSR_IRQ_DISABLE | PSR_FIQ_DISABLE
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msreq cpsr_cxsf, r12
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ldreq sp, fiq_sp ; SP のｾｯﾄ
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beq fiq_m ; ﾃﾞﾊﾞｯｶﾞﾓﾆﾀへｼﾞｬﾝﾌﾟ
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restart_v mov r0, #0xc0 | PSR_SYS_MODE ; ｼｽﾃﾑﾓｰﾄﾞへ切り換え & IRQ/FIQ不許可
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msr cpsr_cxsf, r0
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mov r4, #REG_BASE ; IME ﾘｾｯﾄ
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strb r4, [r4, #OFFSET_REG_IME]
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bl bankreg_init_stack_clear ; ﾊﾞﾝｸﾚｼﾞｽﾀ ﾘｾｯﾄ & ｽﾀｯｸ領域 ｸﾘｱ
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ldr r0, =intr_main ; 割り込みｱﾄﾞﾚｽのｾｯﾄ
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str r0, [r4, #INTR_VECTOR_BUF - CPU_WRAM_END]
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; str r0, [sp, #0x100-4]
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ldr r0, =IrisSubpMonMain ; Cﾙｰﾁﾝ処理
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adr lr, main_return
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bx r0
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main_return
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bl terminate_mon ; ﾓﾆﾀ終了処理
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ldr r12, =MAIN_MEM_EX_END ; ﾕｰｻﾞ･ｴﾝﾄﾘﾎﾟｲﾝﾄ 獲得
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IF :DEF: DISABLE_ENTRY_OF_ROM_HEADER
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ldr lr, [r12, #-(0x200 - 0x38)] ; rmhp->arm7->ramAddr
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ELSE
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ldr lr, [r12, #-(0x200 - 0x34)] ; rmhp->arm7->entryAddr
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ENDIF
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IF :DEF: DISABLE_BOOT_IPL2
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ldrh r0, [r12, #-4] ; ROMﾍｯﾀﾞ ﾁｪｯｸ
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cmp r0, #1
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0 beq %b0 ; ROMﾍｯﾀﾞ不整合時
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sub r12, r12, #0x800
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ldrh r0, [r12, #0x14] ; ﾃﾞﾊﾞｯｶﾞﾁｪｯｸ
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add r12, r12, #0x800
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cmp r0, #1 ; if (!shwp->isOnDebugger)
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mov r0, #0
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ldreq r12, [r12, #-(0x200 - 0x16c)]; ﾃﾞﾊﾞｯｶﾞｴﾝﾄﾘﾎﾟｲﾝﾄ 獲得
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; cmpeq r12, #0 ; rmhp->dbgArm7RamAddr
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; cmpeq r12, #-1
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bxeq r12
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IF :DEF: IRIS_BB
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0 b %b0 ; ﾌﾞﾚｯﾄﾞﾎﾞｰﾄﾞ開発用
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ENDIF
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mov r0, #0
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bx lr
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ELSE
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sub r12, r12, #0x800
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ldrh r0, [r12, #0x2c] ; IPL2･CRCチェック
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cmp r0, #0 ; if (!shwp->flashCrcError)
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0 bne %b0
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ldr r12, [r12, #0x24] ; IPL2･ｴﾝﾄﾘﾎﾟｲﾝﾄ 獲得
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cmp r12, #0 ; shwp->flashArm7RamAddr
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0 beq %b0
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bx r12
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ENDIF
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;--------------------------------------------------------------------
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; ソフトリセット
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;--------------------------------------------------------------------
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CODE32
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soft_reset
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bl terminate_mon ; 終了処理
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ldr r12, =MAIN_MEM_EX_END ; ﾕｰｻﾞ･ｴﾝﾄﾘﾎﾟｲﾝﾄ 獲得
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ldr lr, [r12, #-(0x200 - 0x34)]
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mov r12, #0
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bx lr
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;--------------------------------------------------------------------
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; モニタプログラム終了処理
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;--------------------------------------------------------------------
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CODE32
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terminate_mon
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mov r12, lr
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mov r0, #PSR_SYS_MODE ; IRQ/FIQ許可
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msr cpsr_cxsf, r0
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bl bankreg_init_stack_clear ; ﾊﾞﾝｸﾚｼﾞｽﾀ ﾘｾｯﾄ & ｽﾀｯｸ領域 ｸﾘｱ
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ldmea r4, {r0-r11} ; 汎用ﾚｼﾞｽﾀ ｸﾘｱ
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bx r12
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;--------------------------------------------------------------------
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; バンクレジスタ リセット ＆ スタック領域 クリア
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;--------------------------------------------------------------------
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GLOBAL bankreg_init_stack_clear
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CODE32
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bankreg_init_stack_clear
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mov r0, #0xc0 | PSR_SVC_MODE ; SVCﾓｰﾄﾞへ切り換え & IRQ/FIQ不許可
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msr cpsr_cxsf, r0
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ldr sp, svc_sp ; SP のｾｯﾄ
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mov lr, #0
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msr spsr_csxf, lr
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mov r0, #0xc0 | PSR_IRQ_MODE ; IRQﾓｰﾄﾞへ切り換え & IRQ/FIQ不許可
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msr cpsr_cxsf, r0
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ldr sp, irq_sp ; SP のｾｯﾄ
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mov lr, #0
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msr spsr_cxsf, lr
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mov r0, #0x40 | PSR_SYS_MODE ; ｼｽﾃﾑﾓｰﾄﾞへ切り換え & IRQ許可/FIQ不許可
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msr cpsr_cxsf, r0
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ldr sp, usr_sp ; SP のｾｯﾄ
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stack_clear
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IF :DEF: BB_MON
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ldr r4, =CPU_WRAM_END
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ELSE
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mov r4, #REG_BASE ; r4: REG_BASE
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ENDIF ; BB_MON
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adr r0, stack_clear_10 + 1
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bx r0
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CODE16
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stack_clear_10 mov r0, #0
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ldr r1, =-4*128
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1 str r0, [r4, r1]
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add r1, #4
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blt %b1
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bx lr
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;--------------------------------------------------------------------
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; ＩＲＱ処理へジャンプ
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;--------------------------------------------------------------------
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GLOBAL irq_handler
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ALIGN
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CODE32
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irq_handler
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stmfd sp!, {r0-r3,r12,lr} ; ﾚｼﾞｽﾀ の退避（6ﾜｰﾄﾞ）
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; ldr r0, =CPU_WRAM_END
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mov r0, #REG_BASE
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adr lr, irq_return
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ldr pc, [r0, #-4] ; 32bitｺｰﾄﾞでｼﾞｬﾝﾌﾟ
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; ldr r1, [r0, #-4] ; 32bitｺｰﾄﾞでｼﾞｬﾝﾌﾟ
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; bx r1
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;--------------------------------------------------------------------
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; ＩＲＱからの復帰
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;--------------------------------------------------------------------
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CODE32
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irq_return ldmfd sp!, {r0-r3,r12,lr} ; ﾚｼﾞｽﾀ の復帰
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subs pc, lr, #4
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;--------------------------------------------------------------------
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; システムコールへジャンプ
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;--------------------------------------------------------------------
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GLOBAL swi_handler
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CODE32
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swi_handler
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stmfd sp!, {r11, r12, lr} ; SVCﾓｰﾄﾞ ﾚｼﾞｽﾀ退避
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ldrh r12, [lr, #-2] ; ｼｽﾃﾑｺｰﾙNo 取得（ﾊｰﾌﾜｰﾄﾞｱｸｾｽ対応／ｻｳﾝﾄﾞBB時）
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and r12, r12, #0xff
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adr r11, sys_table ; ｼｽﾃﾑｺｰﾙ･ｱﾄﾞﾚｽ 取得
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ldr r12, [r11, r12, lsl #2]
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mrs r11, spsr ; SVCﾓｰﾄﾞ SPSR退避（合計4ﾜｰﾄﾞ）
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stmfd sp!, {r11}
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and r11, r11, #PSR_IRQ_DISABLE ; IRQ許可状態 ｺﾋﾟｰ
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orr r11, r11, #PSR_SYS_MODE ; ｼｽﾃﾑﾓｰﾄﾞへ切り換え & FIQ許可
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msr cpsr_cxsf,r11
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stmfd sp!, {r2, lr} ; ｼｽﾃﾑﾓｰﾄﾞ ﾚｼﾞｽﾀ退避（2ﾜｰﾄﾞ）
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adr lr, swi_return
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bx r12 ; ｺｰﾄﾞの切換とｼﾞｬﾝﾌﾟ
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;--------------------------------------------------------------------
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;- システムコールからの復帰 18c -
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;--------------------------------------------------------------------
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GLOBAL swi_return
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CODE32
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swi_return ldmfd sp!, {r2, lr} ; ｼｽﾃﾑﾓｰﾄﾞ ﾚｼﾞｽﾀ復帰
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mov r12, #0xc0 | PSR_SVC_MODE ; SVCﾓｰﾄﾞへ切り換え
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msr cpsr_cxsf, r12 ; & IRQ/FIQ不許可
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ldmfd sp!, {r11} ; SVCﾓｰﾄﾞ ﾚｼﾞｽﾀ復帰
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msr spsr_cxsf, r11
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ldmfd sp!, {r11, r12, lr}
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movs pc, lr
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;====================================================================
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; アドレステーブル
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;====================================================================
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ALIGN
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usr_sp DCD CPU_WRAM_END - 0x100
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irq_sp DCD CPU_WRAM_END - 0x50
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svc_sp
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fiq_sp DCD CPU_WRAM_END - 0x24
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EXTERN AccessCard
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EXTERN WaitByLoop
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EXTERN WaitIntr
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EXTERN WaitVBlankIntr
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EXTERN Halt
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EXTERN Stop
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EXTERN SetPauseHi
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EXTERN ChangeSoundBias16
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EXTERN IsMmem8MB
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EXTERN GetCRC16
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EXTERN DivS32
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EXTERN SqrtU32
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EXTERN CpuSet16_32
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EXTERN CpuSetFast32
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EXTERN UnPackBits32
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EXTERN UnCompLZ77Byte
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EXTERN UnCompLZ77Short
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EXTERN UnCompHuffman32
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EXTERN UnCompRLByte
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EXTERN UnCompRLShort
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EXTERN GetSoundSinTable
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EXTERN GetSoundPitchTable
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EXTERN GetSoundVolumeTable
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EXTERN GetFuncp4IPL2
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sys_table
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DCD soft_reset ; 0
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DCD 0 ; 1
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DCD 0 ; 2
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DCD WaitByLoop ; 3
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DCD WaitIntr ; 4
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DCD WaitVBlankIntr ; 5
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DCD Halt ; 6
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DCD Stop ; 7
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DCD ChangeSoundBias16 ; 8
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DCD DivS32 ; 9
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DCD 0 ; 10
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DCD CpuSet16_32 ; 11
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DCD CpuSetFast32 ; 12
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DCD SqrtU32 ; 13
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DCD GetCRC16 ; 14
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DCD IsMmem8MB ; 15
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DCD UnPackBits32 ; 16
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DCD UnCompLZ77Byte ; 17
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DCD UnCompLZ77Short ; 18
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DCD UnCompHuffman32 ; 19
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DCD UnCompRLByte ; 20
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DCD UnCompRLShort ; 21
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DCD 0 ; 22
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DCD 0 ; 23
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DCD 0 ; 24
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DCD 0 ; 25
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DCD GetSoundSinTable ; 26
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DCD GetSoundPitchTable ; 27
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DCD GetSoundVolumeTable ; 28
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DCD GetFuncp4IPL2 ; 29
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DCD 0 ; 30
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DCD SetPauseHi ; 31
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END
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