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ctr_mcu/branches/0.10(X3)/inter_asm/pm.asm
N2232 dc469bd4c6 0.10のX3対応版を登録 
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
2010-06-23 07:16:15 +00:00

3971 lines
116 KiB
NASM
Raw Blame History

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; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:23
; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no pm.c
; In-file : pm.c
; Asm-file : inter_asm\pm.asm
; Para-file :
$PROCESSOR(9F0104)
$DEBUG
$NODEBUGA
$KANJICODE SJIS
$TOL_INF 03FH, 0210H, 02H, 00H, 00H, 00H, 00H
$DGS FIL_NAM, .file, 0217H, 0FFFEH, 03FH, 067H, 01H, 00H
$DGS AUX_FIL, pm.c
$DGS MOD_NAM, pm, 00H, 0FFFEH, 00H, 077H, 00H, 00H
$DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CNSTL, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, ROM_CODE, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
$DGS ENM_TAG, _pwr_state_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H
$DGS AUX_TAG, 01H, 01EH
$DGS MEB_ENM, _OFF_TRIG, 00H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _OFF, 01H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _ON_TRIG, 02H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _ON, 03H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _SLEEP_TRIG, 04H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _SLEEP, 05H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _BT_CHARGE, 06H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 013H, 01H
$DGS ENM_TAG, _poweron_reason_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H
$DGS AUX_TAG, 01H, 025H
$DGS MEB_ENM, _NONE, 00H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _PWSW, 01H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _RTC_ALARM, 02H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 01EH, 01H
$DGS ENM_TAG, _model_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H
$DGS AUX_TAG, 01H, 02FH
$DGS MEB_ENM, _MODEL_JIKKI, 00H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _MODEL_TS_BOARD, 01H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _MODEL_SHIROBAKO, 02H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _MODEL_RESERVED1, 03H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _MODEL_RESERVED2, 04H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _MODEL_RESERVED3, 05H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 025H, 01H
$DGS STR_STR, .0fake, 00H, 0FFFEH, 08H, 0AH, 01H, 00H
$DGS AUX_TAG, 04H, 041H
$DGS MEB_STR, _pwr_state, 00H, 0FFFFH, 0AH, 08H, 01H, 00H
$DGS AUX_STR, 013H, 00H, 01H, 00H, 00H, 00H, 00H, 00H
$DGS MEB_STR, _poweron_reason, 01H, 0FFFFH, 0AH, 08H, 01H, 00H
$DGS AUX_STR, 01EH, 00H, 01H, 00H, 00H, 00H, 00H, 00H
$DGS BIT_FLD, _dipsw0, 010H, 0FFFFH, 0CH, 012H, 01H, 00H
$DGS AUX_BIT, 00H, 01H
$DGS BIT_FLD, _dipsw1, 011H, 0FFFFH, 0CH, 012H, 01H, 00H
$DGS AUX_BIT, 00H, 01H
$DGS BIT_FLD, _dipsw2, 012H, 0FFFFH, 0CH, 012H, 01H, 00H
$DGS AUX_BIT, 00H, 01H
$DGS BIT_FLD, _reboot, 013H, 0FFFFH, 0CH, 012H, 01H, 00H
$DGS AUX_BIT, 00H, 01H
$DGS MEB_STR, _model, 03H, 0FFFFH, 0AH, 08H, 01H, 00H
$DGS AUX_STR, 025H, 00H, 01H, 00H, 00H, 00H, 00H, 00H
$DGS END_STR, .eos, 04H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 02FH, 04H
$DGS ENM_TAG, .2fake, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H
$DGS AUX_TAG, 01H, 06DH
$DGS MEB_ENM, _ERR_FINISED, 00H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS MEB_ENM, _ERR_CONTINUE, 01H, 0FFFFH, 04H, 010H, 00H, 00H
$DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 041H, 01H
$DGS LAB_SYM, bs_F0153, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0153, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0154, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0154, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0155, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0155, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0151, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0151, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_S0152, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_S0152, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0149, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0149, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0150, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0150, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0146, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0146, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0147, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0147, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0148, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0148, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_S0144, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_S0144, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, bs_F0145, U, U, 00H, 06H, 00H, 00H
$DGS LAB_SYM, es_F0145, U, U, 00H, 06H, 00H, 00H
$DGS STA_SYM, _lpf_coeff, U, U, 05002H, 03H, 01H, 03H
$DGS AUX_STR, 00H, 00H, 02FH, 02FH, 00H, 00H, 00H, 00H
$DGS STA_SYM, _BT_PARAM, U, U, 0500CH, 03H, 01H, 0FH
$DGS AUX_STR, 00H, 00H, 01C0H, 07H, 040H, 00H, 00H, 00H
$DGS STA_SYM, _BT_PANA_RCOMP, U, U, 0500CH, 03H, 00H, 00H
$DGS STA_SYM, _BT_PANA_TEMPCOUP, U, U, 05006H, 03H, 00H, 00H
$DGS STA_SYM, _BT_PANA_TEMPCODN, U, U, 05006H, 03H, 00H, 00H
$DGS GLV_SYM, _PM_init, U, U, 01H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 09AH, 00H, 00H
$DGS BEG_FUN, ??bf_PM_init, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 02EH, 08H, 07CH
$DGS AUT_VAR, _temp, 07H, 0FFFFH, 0CH, 01H, 00H, 00H
$DGS AUT_VAR, _origParam, 03H, 0FFFFH, 0CH, 01H, 01H, 03H
$DGS AUX_STR, 00H, 00H, 04H, 04H, 00H, 00H, 00H, 00H
$DGS STR_STR, .7fake, 00H, 0FFFEH, 08H, 0AH, 01H, 00H
$DGS AUX_TAG, 02H, 073H
$DGS MEB_STR, _lsb, 00H, 0FFFFH, 0CH, 08H, 00H, 00H
$DGS MEB_STR, _msb, 01H, 0FFFFH, 0CH, 08H, 00H, 00H
$DGS END_STR, .eos, 02H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 06DH, 02H
$DGS UNI_TAG, .6fake, 00H, 0FFFEH, 09H, 0CH, 01H, 00H
$DGS AUX_TAG, 02H, 07AH
$DGS MEB_UNI, __u16, 00H, 0FFFFH, 0DH, 0BH, 00H, 00H
$DGS MEB_UNI, _chars, 00H, 0FFFFH, 08H, 0BH, 01H, 00H
$DGS AUX_STR, 06DH, 00H, 02H, 00H, 00H, 00H, 00H, 00H
$DGS END_STR, .eos, 02H, 0FFFFH, 00H, 066H, 01H, 00H
$DGS AUX_EOS, 073H, 02H
$DGS AUT_VAR, _dat_16, 00H, 0FFFFH, 09H, 01H, 01H, 00H
$DGS AUX_STR, 073H, 00H, 02H, 00H, 00H, 00H, 00H, 00H
$DGS BEG_BLK, ??bb00_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 080H
$DGS END_BLK, ??eb00_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 019H
$DGS BEG_BLK, ??bb01_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01BH, 00H, 082H
$DGS BEG_BLK, ??bb02_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 030H, 00H, 084H
$DGS BEG_BLK, ??bb03_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 030H, 00H, 08AH
$DGS END_BLK, ??eb03_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 030H
$DGS END_BLK, ??eb02_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 030H
$DGS BEG_BLK, ??bb04_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 033H, 00H, 08EH
$DGS END_BLK, ??eb04_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 040H
$DGS BEG_BLK, ??bb05_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 04FH, 00H, 092H
$DGS END_BLK, ??eb05_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 051H
$DGS BEG_BLK, ??bb06_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 051H, 00H, 00H
$DGS END_BLK, ??eb06_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 053H
$DGS END_BLK, ??eb01_PM_init, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 05DH
$DGS END_FUN, ??ef_PM_init, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 068H
$DGS GLV_SYM, _PM_bt_temp_update, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 0B8H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_bt_temp_update, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0A3H, 02H, 0A2H
$DGS STA_SYM, _count, ?L0018, U, 0CH, 03H, 00H, 00H
$DGS STA_SYM, _rawdat_old, ?L0019, U, 0CH, 03H, 00H, 00H
$DGS STA_SYM, _temperature, ?L0020, U, 03H, 03H, 00H, 00H
$DGS AUT_VAR, _newrcomp, 00H, 0FFFFH, 0DH, 01H, 00H, 00H
$DGS BEG_BLK, ??bb00_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 0EH, 00H, 0A6H
$DGS END_BLK, ??eb00_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 013H
$DGS BEG_BLK, ??bb01_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 017H, 00H, 0A8H
$DGS BEG_BLK, ??bb02_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01AH, 00H, 0ACH
$DGS END_BLK, ??eb02_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01CH
$DGS BEG_BLK, ??bb03_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01EH, 00H, 0B0H
$DGS END_BLK, ??eb03_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 020H
$DGS BEG_BLK, ??bb04_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 028H, 00H, 00H
$DGS END_BLK, ??eb04_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 02AH
$DGS END_BLK, ??eb01_PM_bt_temp_update, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 02BH
$DGS END_FUN, ??ef_PM_bt_temp_update, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 02FH
$DGS GLV_SYM, _PM_LCD_on, U, U, 0CH, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0C3H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_LCD_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0E3H, 02H, 0BDH
$DGS REG_VAR, _rv, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS BEG_BLK, ??bb00_PM_LCD_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 00H
$DGS END_BLK, ??eb00_PM_LCD_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01CH
$DGS END_FUN, ??ef_PM_LCD_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 023H
$DGS GLV_SYM, _PM_LCD_off, U, U, 01H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0DFH, 00H, 00H
$DGS BEG_FUN, ??bf_PM_LCD_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0109H, 02H, 0C7H
$DGS BEG_BLK, ??bb00_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 0AH, 00H, 0CBH
$DGS REG_VAR, _tot, 06H, 0FFFFH, 010CH, 04H, 01H, 00H
$DGS AUX_STR, 00H, 0BH, 01H, 00H, 00H, 00H, 00H, 00H
$DGS BEG_BLK, ??bb01_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 011H, 00H, 0CDH
$DGS BEG_BLK, ??bb02_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 013H, 00H, 0D1H
$DGS END_BLK, ??eb02_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 013H
$DGS BEG_BLK, ??bb03_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 015H, 00H, 0D5H
$DGS END_BLK, ??eb03_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 015H
$DGS BEG_BLK, ??bb04_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 00H
$DGS END_BLK, ??eb04_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 016H
$DGS END_BLK, ??eb01_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 017H
$DGS END_BLK, ??eb00_PM_LCD_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 019H
$DGS END_FUN, ??ef_PM_LCD_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 028H
$DGS GLV_SYM, _PM_BL_set, U, U, 0CH, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0112H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_BL_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 013AH, 06H, 0E6H
$DGS FUN_ARG, _dat, 04H, 0FFFFH, 0CH, 09H, 00H, 00H
$DGS AUT_VAR, _blset, 03H, 0FFFFH, 0CH, 01H, 00H, 00H
$DGS AUT_VAR, _intset, 02H, 0FFFFH, 0CH, 01H, 00H, 00H
$DGS BEG_BLK, ??bb00_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 010H, 00H, 0EAH
$DGS END_BLK, ??eb00_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 013H
$DGS BEG_BLK, ??bb01_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 015H, 00H, 0EEH
$DGS END_BLK, ??eb01_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 018H
$DGS BEG_BLK, ??bb02_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01CH, 00H, 0F2H
$DGS END_BLK, ??eb02_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01FH
$DGS BEG_BLK, ??bb03_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 021H, 00H, 0F6H
$DGS END_BLK, ??eb03_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 024H
$DGS BEG_BLK, ??bb04_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 033H, 00H, 0FAH
$DGS AUT_VAR, _tot, 01H, 0FFFFH, 0CH, 01H, 01H, 00H
$DGS AUX_STR, 00H, 034H, 01H, 00H, 00H, 00H, 00H, 00H
$DGS BEG_BLK, ??bb05_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 037H, 00H, 0FCH
$DGS BEG_BLK, ??bb06_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 039H, 00H, 0100H
$DGS END_BLK, ??eb06_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 039H
$DGS BEG_BLK, ??bb07_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 03BH, 00H, 0104H
$DGS END_BLK, ??eb07_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 03BH
$DGS BEG_BLK, ??bb08_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 03CH, 00H, 010CH
$DGS END_BLK, ??eb08_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 03CH
$DGS END_BLK, ??eb05_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 03DH
$DGS END_BLK, ??eb04_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 03EH
$DGS BEG_BLK, ??bb09_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 043H, 00H, 00H
$DGS END_BLK, ??eb09_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 045H
$DGS END_FUN, ??ef_PM_BL_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 049H
$DGS GLV_SYM, _PM_LCD_vcom_set, U, U, 0CH, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0119H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_LCD_vcom_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 018BH, 02H, 0119H
$DGS REG_VAR, _rv, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS END_FUN, ??ef_PM_LCD_vcom_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 07H
$DGS GLV_SYM, _tski_vcom_set, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 011FH, 00H, 00H
$DGS BEG_FUN, ??bf_tski_vcom_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 01C2H, 00H, 011FH
$DGS END_FUN, ??ef_tski_vcom_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 04H
$DGS GLV_SYM, _PM_sys_pow_on, U, U, 0CH, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0142H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_sys_pow_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 01D2H, 02H, 0124H
$DGS REG_VAR, _temp, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS BEG_BLK, ??bb00_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 07H, 00H, 0128H
$DGS END_BLK, ??eb00_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 08H
$DGS BEG_BLK, ??bb01_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 012H, 00H, 012CH
$DGS END_BLK, ??eb01_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 014H
$DGS BEG_BLK, ??bb02_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 018H, 00H, 0130H
$DGS END_BLK, ??eb02_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 018H
$DGS BEG_BLK, ??bb03_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 019H, 00H, 0134H
$DGS END_BLK, ??eb03_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 019H
$DGS BEG_BLK, ??bb04_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 030H, 00H, 0138H
$DGS END_BLK, ??eb04_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 032H
$DGS BEG_BLK, ??bb05_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 033H, 00H, 013CH
$DGS END_BLK, ??eb05_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 033H
$DGS BEG_BLK, ??bb06_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 035H, 00H, 00H
$DGS END_BLK, ??eb06_PM_sys_pow_on, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 035H
$DGS END_FUN, ??ef_PM_sys_pow_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 069H
$DGS GLV_SYM, _PM_sys_pow_off, U, U, 0CH, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0150H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_sys_pow_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0247H, 00H, 0146H
$DGS BEG_BLK, ??bb00_PM_sys_pow_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 07H, 00H, 014AH
$DGS END_BLK, ??eb00_PM_sys_pow_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 07H
$DGS BEG_BLK, ??bb01_PM_sys_pow_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 08H, 00H, 00H
$DGS END_BLK, ??eb01_PM_sys_pow_off, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 08H
$DGS END_FUN, ??ef_PM_sys_pow_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 020H
$DGS GLV_SYM, _tsk_batt, U, U, 01H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 01A1H, 00H, 00H
$DGS BEG_FUN, ??bf_tsk_batt, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 027DH, 00H, 0157H
$DGS STA_SYM, _task_interval, ?L0077, U, 0CH, 03H, 00H, 00H
$DGS STA_SYM, _charge_hys, ?L0078, U, 0CH, 03H, 00H, 00H
$DGS STA_SYM, _pm_extdc_old, ?L0079, U, 034CH, 028H, 00H, 00H
$DGS BEG_BLK, ??bb00_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 07H, 00H, 015BH
$DGS END_BLK, ??eb00_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 09H
$DGS BEG_BLK, ??bb01_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 0BH, 00H, 015FH
$DGS END_BLK, ??eb01_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 0DH
$DGS BEG_BLK, ??bb02_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 012H, 00H, 0161H
$DGS BEG_BLK, ??bb03_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 015H, 00H, 0163H
$DGS BEG_BLK, ??bb04_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 0165H
$DGS BEG_BLK, ??bb05_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 0169H
$DGS END_BLK, ??eb05_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 016H
$DGS BEG_BLK, ??bb06_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 016H, 00H, 0171H
$DGS END_BLK, ??eb06_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 016H
$DGS END_BLK, ??eb04_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 016H
$DGS END_BLK, ??eb03_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 018H
$DGS BEG_BLK, ??bb07_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01AH, 00H, 0173H
$DGS BEG_BLK, ??bb08_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01BH, 00H, 0175H
$DGS BEG_BLK, ??bb09_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01BH, 00H, 0179H
$DGS END_BLK, ??eb09_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01BH
$DGS BEG_BLK, ??bb0A_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 01BH, 00H, 0183H
$DGS END_BLK, ??eb0A_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01BH
$DGS END_BLK, ??eb08_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01BH
$DGS END_BLK, ??eb07_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01DH
$DGS END_BLK, ??eb02_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01EH
$DGS BEG_BLK, ??bb0B_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 024H, 00H, 0187H
$DGS END_BLK, ??eb0B_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 026H
$DGS BEG_BLK, ??bb0C_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 02AH, 00H, 018BH
$DGS END_BLK, ??eb0C_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 02CH
$DGS BEG_BLK, ??bb0D_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 034H, 00H, 018FH
$DGS END_BLK, ??eb0D_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 037H
$DGS BEG_BLK, ??bb0E_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 039H, 00H, 0193H
$DGS END_BLK, ??eb0E_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 03CH
$DGS BEG_BLK, ??bb0F_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 043H, 00H, 0195H
$DGS BEG_BLK, ??bb10_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 043H, 00H, 0199H
$DGS END_BLK, ??eb10_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 043H
$DGS BEG_BLK, ??bb11_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 043H, 00H, 00H
$DGS END_BLK, ??eb11_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 043H
$DGS END_BLK, ??eb0F_tsk_batt, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 043H
$DGS END_FUN, ??ef_tsk_batt, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 04DH
$DGS GLV_SYM, _intp4_extdc, U, U, 0E001H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 01A7H, 00H, 00H
$DGS BEG_FUN, ??bf_intp4_extdc, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 02D4H, 00H, 01A7H
$DGS END_FUN, ??ef_intp4_extdc, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 03H
$DGS GLV_SYM, _intp5_shell, U, U, 0E001H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 01ADH, 00H, 00H
$DGS BEG_FUN, ??bf_intp5_shell, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 02DFH, 00H, 01ADH
$DGS END_FUN, ??ef_intp5_shell, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 03H
$DGS GLV_SYM, _intp6_PM_irq, U, U, 0E001H, 026H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 01B7H, 00H, 00H
$DGS BEG_FUN, ??bf_intp6_PM_irq, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 02E8H, 016H, 01B1H
$DGS BEG_BLK, ??bb00_intp6_PM_irq, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 03H, 00H, 00H
$DGS END_BLK, ??eb00_intp6_PM_irq, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 06H
$DGS END_FUN, ??ef_intp6_PM_irq, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 07H
$DGS GLV_SYM, _ntr_pmic_comm, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 01ECH, 00H, 00H
$DGS BEG_FUN, ??bf_ntr_pmic_comm, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 02F8H, 02H, 01BEH
$DGS STA_SYM, _reg_shadow, ?L0112, U, 0CH, 03H, 00H, 00H
$DGS REG_VAR, _reg1_old, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS REG_VAR, _irq_work, 07H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS BEG_BLK, ??bb00_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 09H, 00H, 01C2H
$DGS END_BLK, ??eb00_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 0BH
$DGS BEG_BLK, ??bb01_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 011H, 00H, 01C4H
$DGS BEG_BLK, ??bb02_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 013H, 00H, 01C8H
$DGS END_BLK, ??eb02_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 016H
$DGS BEG_BLK, ??bb03_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 018H, 00H, 01CEH
$DGS END_BLK, ??eb03_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01BH
$DGS END_BLK, ??eb01_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 01CH
$DGS BEG_BLK, ??bb04_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 020H, 00H, 01D0H
$DGS BEG_BLK, ??bb05_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 022H, 00H, 01D4H
$DGS END_BLK, ??eb05_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 025H
$DGS BEG_BLK, ??bb06_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 027H, 00H, 01DAH
$DGS END_BLK, ??eb06_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 02AH
$DGS END_BLK, ??eb04_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 02BH
$DGS BEG_BLK, ??bb07_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 04BH, 00H, 01DEH
$DGS END_BLK, ??eb07_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 04DH
$DGS BEG_BLK, ??bb08_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 051H, 00H, 01E0H
$DGS BEG_BLK, ??bb09_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 056H, 00H, 01E6H
$DGS END_BLK, ??eb09_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 058H
$DGS END_BLK, ??eb08_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 059H
$DGS BEG_BLK, ??bb0A_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 05EH, 00H, 00H
$DGS END_BLK, ??eb0A_ntr_pmic_comm, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 061H
$DGS END_FUN, ??ef_ntr_pmic_comm, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 063H
$DGS STA_SYM, _PM_get_batt_left, U, U, 01H, 03H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 0200H, 00H, 00H
$DGS BEG_FUN, ??bf_PM_get_batt_left, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0364H, 02H, 01F0H
$DGS BEG_BLK, ??bb00_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 03H, 00H, 01F2H
$DGS BEG_BLK, ??bb01_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 05H, 00H, 01FAH
$DGS AUT_VAR, _temp, 00H, 0FFFFH, 0CH, 01H, 01H, 03H
$DGS AUX_STR, 00H, 06H, 02H, 02H, 00H, 00H, 00H, 00H
$DGS END_BLK, ??eb01_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 0DH
$DGS END_BLK, ??eb00_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 010H
$DGS BEG_BLK, ??bb02_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 012H, 00H, 00H
$DGS END_BLK, ??eb02_PM_get_batt_left, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 014H
$DGS END_FUN, ??ef_PM_get_batt_left, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 01AH
$DGS GLV_SYM, _tski_PM_LCD_on, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 0206H, 00H, 00H
$DGS BEG_FUN, ??bf_tski_PM_LCD_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0388H, 00H, 0206H
$DGS END_FUN, ??ef_tski_PM_LCD_on, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 04H
$DGS GLV_SYM, _tski_PM_LCD_off, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 020CH, 00H, 00H
$DGS BEG_FUN, ??bf_tski_PM_LCD_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 038EH, 00H, 020CH
$DGS END_FUN, ??ef_tski_PM_LCD_off, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 04H
$DGS GLV_SYM, _tski_PM_BL_set, U, U, 0AH, 026H, 01H, 02H
$DGS AUX_FUN, 041H, U, U, 0217H, 00H, 00H
$DGS BEG_FUN, ??bf_tski_PM_BL_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 0394H, 02H, 0211H
$DGS REG_VAR, _cmd_BL, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
$DGS BEG_BLK, ??bb00_tski_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 05H, 00H, 00H
$DGS END_BLK, ??eb00_tski_PM_BL_set, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 08H
$DGS END_FUN, ??ef_tski_PM_BL_set, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 0DH
$DGS GLV_SYM, _raw_adc_temperature, U, U, 0CH, 026H, 00H, 00H
$DGS GLV_SYM, _rcomp, U, U, 0CH, 026H, 00H, 00H
$DGS GLV_SYM, _temp_co_up, U, U, 06H, 026H, 00H, 00H
$DGS GLV_SYM, _temp_co_dn, U, U, 06H, 026H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_write, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_write_a_byte, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _wait_ms, U, U, 01H, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_read_a_byte, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _vreg_ctr, U, U, 0CH, 02H, 01H, 03H
$DGS AUX_STR, 00H, 00H, 01H, 01H, 00H, 00H, 00H, 00H
$DGS GLV_SYM, _@RTARG0, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _@RTARG2, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _system_status, U, U, 08H, 02H, 01H, 00H
$DGS AUX_STR, 02FH, 00H, 04H, 00H, 00H, 00H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_read, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _get_adc, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_busy, U, U, 0134CH, 02H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_wo_dma, U, U, 034CH, 02H, 00H, 00H
$DGS GLV_SYM, _renge_task_immed_add, U, U, 0CH, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, @@lstof, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _@RTARG4, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@fmul, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@fdiv, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@fsub, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@ftols, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@frev, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _@RTARG3, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, @@ftolu, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _set_irq, U, U, 01H, 02H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
$DGS GLV_SYM, _iic_mcu_bus_status, U, U, 0CH, 02H, 00H, 00H
$DGS GLV_SYM, _@SEGAX, U, U, 00H, 02H, 00H, 00H
$DGS GLV_SYM, _@SEGDE, U, U, 00H, 02H, 00H, 00H
EXTRN _iic_mcu_write
EXTRN _iic_mcu_write_a_byte
EXTRN _wait_ms
EXTRN _iic_mcu_read_a_byte
EXTRN _vreg_ctr
EXTRN _@RTARG0
EXTRN _@RTARG2
EXTRN _system_status
EXTRN _iic_mcu_read
EXTRN _get_adc
EXTRN _renge_task_immed_add
EXTRN @@lstof
EXTRN _@RTARG4
EXTRN @@fmul
EXTRN @@fdiv
EXTRN @@fsub
EXTRN @@ftols
EXTRN @@frev
EXTRN _@RTARG3
EXTRN @@ftolu
EXTRN _set_irq
EXTRN _@SEGAX
EXTRN _@SEGDE
EXTRN _iic_mcu_bus_status
EXTBIT _iic_mcu_busy
EXTBIT _iic_mcu_wo_dma
PUBLIC _raw_adc_temperature
PUBLIC _rcomp
PUBLIC _temp_co_up
PUBLIC _temp_co_dn
PUBLIC _PM_init
PUBLIC _PM_bt_temp_update
PUBLIC _PM_LCD_on
PUBLIC _PM_LCD_off
PUBLIC _PM_BL_set
PUBLIC _PM_LCD_vcom_set
PUBLIC _tski_vcom_set
PUBLIC _PM_sys_pow_on
PUBLIC _PM_sys_pow_off
PUBLIC _tsk_batt
PUBLIC _intp4_extdc
PUBLIC _intp5_shell
PUBLIC _intp6_PM_irq
PUBLIC _ntr_pmic_comm
PUBLIC _tski_PM_LCD_on
PUBLIC _tski_PM_LCD_off
PUBLIC _tski_PM_BL_set
@@BITS BSEG
?L0079 DBIT
@@CNST CSEG MIRRORP
_lpf_coeff: DB 01H ; 1
DB 02H ; 2
DB 02H ; 2
DB 03H ; 3
DB 03H ; 3
DB 02H ; 2
DB 00H ; 0
DB 0FEH ; 254
DB 0FBH ; 251
DB 0F7H ; 247
DB 0F3H ; 243
DB 0F0H ; 240
DB 0F0H ; 240
DB 0F3H ; 243
DB 0FAH ; 250
DB 04H ; 4
DB 012H ; 18
DB 025H ; 37
DB 038H ; 56
DB 04DH ; 77
DB 05FH ; 95
DB 06EH ; 110
DB 077H ; 119
DB 07AH ; 122
DB 077H ; 119
DB 06EH ; 110
DB 05FH ; 95
DB 04DH ; 77
DB 038H ; 56
DB 025H ; 37
DB 012H ; 18
DB 04H ; 4
DB 0FAH ; 250
DB 0F3H ; 243
DB 0F0H ; 240
DB 0F0H ; 240
DB 0F3H ; 243
DB 0F7H ; 247
DB 0FBH ; 251
DB 0FEH ; 254
DB 00H ; 0
DB 02H ; 2
DB 03H ; 3
DB 03H ; 3
DB 02H ; 2
DB 02H ; 2
DB 01H ; 1
_BT_PARAM: DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 0ADH ; 173
DB 030H ; 48
DB 0AEH ; 174
DB 070H ; 112
DB 0B0H ; 176
DB 00H ; 0
DB 0B3H ; 179
DB 00H ; 0
DB 0B4H ; 180
DB 070H ; 112
DB 0B5H ; 181
DB 0A0H ; 160
DB 0B7H ; 183
DB 080H ; 128
DB 0BAH ; 186
DB 00H ; 0
DB 0BBH ; 187
DB 090H ; 144
DB 0BDH ; 189
DB 00H ; 0
DB 0BEH ; 190
DB 00H ; 0
DB 0BFH ; 191
DB 0F0H ; 240
DB 0C3H ; 195
DB 00H ; 0
DB 0C5H ; 197
DB 0C0H ; 192
DB 0C8H ; 200
DB 00H ; 0
DB 0CAH ; 202
DB 0C0H ; 192
DB 04H ; 4
DB 00H ; 0
DB 012H ; 18
DB 00H ; 0
DB 0CH ; 12
DB 010H ; 16
DB 024H ; 36
DB 00H ; 0
DB 010H ; 16
DB 0D0H ; 208
DB 01BH ; 27
DB 0F0H ; 240
DB 0AH ; 10
DB 0F0H ; 240
DB 08H ; 8
DB 0E0H ; 224
DB 0CH ; 12
DB 0F0H ; 240
DB 08H ; 8
DB 0C0H ; 192
DB 08H ; 8
DB 0B0H ; 176
DB 07H ; 7
DB 0F0H ; 240
DB 0BH ; 11
DB 00H ; 0
DB 05H ; 5
DB 0D0H ; 208
DB 02H ; 2
DB 00H ; 0
DB 09H ; 9
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB 0ADH ; 173
DB 030H ; 48
DB 0AEH ; 174
DB 070H ; 112
DB 0B0H ; 176
DB 00H ; 0
DB 0B3H ; 179
DB 00H ; 0
DB 0B4H ; 180
DB 070H ; 112
DB 0B5H ; 181
DB 0A0H ; 160
DB 0B7H ; 183
DB 080H ; 128
DB 0BAH ; 186
DB 00H ; 0
DB 0BBH ; 187
DB 090H ; 144
DB 0BDH ; 189
DB 00H ; 0
DB 0BEH ; 190
DB 00H ; 0
DB 0BFH ; 191
DB 0F0H ; 240
DB 0C3H ; 195
DB 00H ; 0
DB 0C5H ; 197
DB 0C0H ; 192
DB 0C8H ; 200
DB 00H ; 0
DB 0CAH ; 202
DB 0C0H ; 192
DB 04H ; 4
DB 00H ; 0
DB 012H ; 18
DB 00H ; 0
DB 0CH ; 12
DB 010H ; 16
DB 024H ; 36
DB 00H ; 0
DB 010H ; 16
DB 0D0H ; 208
DB 01BH ; 27
DB 0F0H ; 240
DB 0AH ; 10
DB 0F0H ; 240
DB 08H ; 8
DB 0E0H ; 224
DB 0CH ; 12
DB 0F0H ; 240
DB 08H ; 8
DB 0C0H ; 192
DB 08H ; 8
DB 0B0H ; 176
DB 07H ; 7
DB 0F0H ; 240
DB 0BH ; 11
DB 00H ; 0
DB 05H ; 5
DB 0D0H ; 208
DB 02H ; 2
DB 00H ; 0
DB 09H ; 9
DB 00H ; 0
_BT_PANA_RCOMP: DB 087H ; 135
_BT_PANA_TEMPCOUP: DW 0999AH,03E99H ; 1050253722
_BT_PANA_TEMPCODN: DW 00000H,03F00H ; 1056964608
@@R_INIT CSEG UNIT64KP
DB 00H ; 0
DB 00H ; 0
DB 00H ; 0
DB (1)
@@INIT DSEG BASEP
?L0018: DS (1)
?L0077: DS (1)
?L0078: DS (1)
DS (1)
@@DATA DSEG BASEP
_raw_adc_temperature: DS (1)
_rcomp: DS (1)
_temp_co_up: DS (4)
_temp_co_dn: DS (4)
?L0019: DS (1)
DS (1)
?L0020: DS (2)
?L0112: DS (1)
DS (1)
@@R_INIS CSEG UNIT64KP
@@INIS DSEG SADDRP
@@DATS DSEG SADDRP
@@CNSTL CSEG PAGE64KP
@@RLINIT CSEG UNIT64KP
@@INITL DSEG UNIT64KP
@@DATAL DSEG UNIT64KP
@@CALT CSEG CALLT0
; Sub-Routines created by CC78K0R
ROM_CODE CSEG BASE
bs_F0153:
mov x,#06CH ; 108 ;[INF] 2, 1
br !_iic_mcu_write ;[INF] 3, 3
es_F0153:
ROM_CODE CSEG BASE
bs_F0154:
mov x,#084H ; 132 ;[INF] 2, 1
br !_iic_mcu_write_a_byte ;[INF] 3, 3
es_F0154:
ROM_CODE CSEG BASE
bs_F0155:
movw ax,#010H ; 16 ;[INF] 3, 1
br !_wait_ms ;[INF] 3, 3
es_F0155:
ROM_CODE CSEG BASE
bs_F0151:
push ax ;[INF] 1, 1
mov x,#06CH ; 108 ;[INF] 2, 1
call !_iic_mcu_read_a_byte ;[INF] 3, 3
pop ax ;[INF] 1, 1
mov a,c ;[INF] 1, 1
ret ;[INF] 1, 6
es_F0151:
ROM_CODE CSEG BASE
bs_S0152:
mov c,a ;[INF] 1, 1
movw de,#loww (_vreg_ctr+19) ;[INF] 3, 1
mov a,[de] ;[INF] 1, 1
or a,c ;[INF] 2, 1
mov [de],a ;[INF] 1, 1
ret ;[INF] 1, 6
es_S0152:
ROM_CODE CSEG BASE
bs_F0149:
movw ax,#04H ; 4 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_read_a_byte ;[INF] 3, 3
pop ax ;[INF] 1, 1
mov a,c ;[INF] 1, 1
ret ;[INF] 1, 6
es_F0149:
ROM_CODE CSEG BASE
bs_F0150:
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
ret ;[INF] 1, 6
es_F0150:
ROM_CODE CSEG BASE
bs_F0146:
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
ret ;[INF] 1, 6
es_F0146:
ROM_CODE CSEG BASE
bs_F0147:
movw ax,#03H ; 3 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_read_a_byte ;[INF] 3, 3
pop ax ;[INF] 1, 1
mov a,c ;[INF] 1, 1
and a,#01H ; 1 ;[INF] 2, 1
ret ;[INF] 1, 6
es_F0147:
ROM_CODE CSEG BASE
bs_F0148:
onew ax ;[INF] 1, 1
push ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
ret ;[INF] 1, 6
es_F0148:
ROM_CODE CSEG BASE
bs_S0144:
movw ax,!?L0020 ; temperature ;[INF] 3, 1
subw ax,#014H ; 20 ;[INF] 3, 1
movw bc,ax ;[INF] 1, 1
sarw ax,15 ;[INF] 2, 1
xchw ax,bc ;[INF] 1, 1
movw _@RTARG0,ax ;[INF] 2, 1
movw ax,bc ;[INF] 1, 1
movw _@RTARG2,ax ;[INF] 2, 1
ret ;[INF] 1, 6
es_S0144:
ROM_CODE CSEG BASE
bs_F0145:
movw ax,#07H ; 7 ;[INF] 3, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#084H ; 132 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
ret ;[INF] 1, 6
es_F0145:
; *** Sub-Routine Information ***
;
; $SUB bs_S0144
; CODE SIZE= 16 bytes
;
; $SUB bs_F0145
; CODE SIZE= 15 bytes
;
; $SUB bs_F0146
; CODE SIZE= 12 bytes
;
; $SUB bs_F0147
; CODE SIZE= 14 bytes
;
; $SUB bs_F0148
; CODE SIZE= 13 bytes
;
; $SUB bs_F0149
; CODE SIZE= 12 bytes
;
; $SUB bs_F0150
; CODE SIZE= 11 bytes
;
; $SUB bs_F0151
; CODE SIZE= 9 bytes
;
; $SUB bs_S0152
; CODE SIZE= 9 bytes
;
; $SUB bs_F0153
; CODE SIZE= 5 bytes
;
; $SUB bs_F0154
; CODE SIZE= 5 bytes
;
; $SUB bs_F0155
; CODE SIZE= 6 bytes
; End of Sub-Routines
; line 1 : /* ========================================================
; line 2 : <20><>PMIC
; line 3 : <20><><EFBFBD>c<EFBFBD><63><EFBFBD>J<EFBFBD>Z
; line 4 : nintendo
; line 5 : '08 Dec
; line 6 : ======================================================== */
; line 7 : #pragma nop
; line 8 :
; line 9 : #include "incs.h"
; line 10 : #include "adc.h"
; line 11 : #include "led.h"
; line 12 : #include "pm.h"
; line 13 : #include "renge.h"
; line 14 :
; line 15 : #include "batt_params.h"
; line 16 :
; line 17 : #include <fsl.h>
; line 18 : #include "fsl_user.h"
; line 19 : extern u16 pool[];
; line 20 :
; line 21 : // ========================================================
; line 22 :
; line 23 :
; line 24 : // ========================================================
; line 25 : u8 raw_adc_temperature;
; line 26 : u8 rcomp;
; line 27 : float temp_co_up;
; line 28 : float temp_co_dn;
; line 29 :
; line 30 : // ========================================================
; line 31 : static void PM_get_batt_left();
; line 32 :
; line 33 :
; line 34 : /******************************************************//**
; line 35 : PMIC<49>B<EFBFBD>̏<EFBFBD><CC8F><EFBFBD><EFBFBD><EFBFBD>
; line 36 : \n <20>d<EFBFBD>r<EFBFBD><72><EFBFBD>[<5B>J<EFBFBD>[<5B><><EFBFBD><EFBFBD>
; line 37 : \n <20>d<EFBFBD>r<EFBFBD>c<EFBFBD><63>IC<49>̃Z<CC83>b<EFBFBD>g
; line 38 : \n <20>o<EFBFBD>[<5B>W<EFBFBD><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̎擾
; line 39 : \n
; line 40 : \n <20>ȉ<EFBFBD><C889>̃s<CC83><73><EFBFBD>͎<EFBFBD><CD8E>ɂ<EFBFBD><C982><EFBFBD><EFBFBD>ő<EFBFBD><C591><EFBFBD><EFBFBD>E<EFBFBD>Ď<EFBFBD><C48E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
; line 41 : \n <20>EPM_BT_DET,_P
; line 42 : *********************************************************/
; line 43 : #define swap_endian_16( x ) (unsigned int)( x << 8 | x >> 8 )
; line 44 :
; line 45 : void PM_init( )
; line 46 : {
ROM_CODE CSEG BASE
_PM_init:
$DGL 1,102
push hl ;[INF] 1, 1
subw sp,#08H ;[INF] 2, 1
movw hl,sp ;[INF] 3, 1
??bf_PM_init:
; line 47 : u8 temp;
; line 48 : u8 origParam[4];
; line 49 : union{
; line 50 : u16 _u16; // <20><><EFBFBD>ł킩<C582><ED82A9><EFBFBD>悤<EFBFBD>ɁAlittle endi
; an <20>ł<EFBFBD><C582>B<EFBFBD><42><EFBFBD>ӁB
; line 51 : struct{
; line 52 : u8 lsb;
; line 53 : u8 msb;
; line 54 : }chars;
; line 55 : }dat_16;
; line 56 :
; line 57 : system_status.model = MODEL_JIKKI;
$DGL 0,12
clrb !_system_status+3 ;[INF] 3, 1
; line 58 : wait_ms( 150 );
$DGL 0,13
movw ax,#096H ; 150 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 59 :
; line 60 : // -1. <20>Ȃ񂩂<C882><F182A982><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>c<EFBFBD>@<40><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă݂<C482>
; line 61 : dat_16._u16 = swap_endian_16( 0x5400 ); // reset
$DGL 0,16
movw ax,#054H ; 84 ;[INF] 3, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 62 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_COMMAND, 2, &d
; at_16 ); // <20><><EFBFBD><EFBFBD><EFBFBD>‚<EFBFBD>NACK<43><4B><EFBFBD>Ԃ<EFBFBD>
$DGL 0,17
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#0FEH ; 254 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 63 :
; line 64 : // 0. <20>o<EFBFBD>b<EFBFBD>e<EFBFBD><65><EFBFBD>c<EFBFBD><63>IC <20>N<EFBFBD>C<EFBFBD>b<EFBFBD>N<EFBFBD>X<EFBFBD>^<5E>[<5B>g
; line 65 : dat_16._u16 = swap_endian_16( 0x4000 ); // quick start
$DGL 0,20
movw ax,#040H ; 64 ;[INF] 3, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 66 : if( iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_MODE, 2, &
; dat_16 ) != ERR_SUCCESS )
$DGL 0,21
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#06H ; 6 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
cmp0 c ;[INF] 1, 1
bz $?L0003 ;[INF] 2, 4
; line 67 : {
??bb00_PM_init:
; line 68 : vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_GASGAUGE_ERR;
$DGL 0,23
set1 !_vreg_ctr+14.0 ;[INF] 4, 2
; line 69 : system_status.model = MODEL_TS_BOARD;
$DGL 0,24
oneb !_system_status+3 ;[INF] 3, 1
??eb00_PM_init:
; line 70 : }
$DGL 0,25
br !?L0004 ;[INF] 3, 3
?L0003:
; line 71 : else
; line 72 : {
??bb01_PM_init:
; line 73 : // 1. <20><><EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD><EFBFBD>
; line 74 : dat_16._u16 = swap_endian_16( 0x4057 ); // unlock key
$DGL 0,29
movw ax,#05740H ; 22336 ;[INF] 3, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 75 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_LOCK, 2, &
; dat_16 );
$DGL 0,30
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#03EH ; 62 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 76 :
; line 77 : // 2. <20><><EFBFBD><EFBFBD><EFBFBD>p<EFBFBD><70><EFBFBD><EFBFBD><EFBFBD>[<5B>^<5E><><EFBFBD>ꎞ<EFBFBD>ۑ<EFBFBD>
; line 78 : iic_mcu_read( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4, o
; rigParam );
$DGL 0,33
movw ax,hl ;[INF] 1, 1
addw ax,#03H ;[INF] 3, 1
push ax ;[INF] 1, 1
movw ax,#04H ; 4 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#0CH ; 12 ;[INF] 2, 1
push ax ;[INF] 1, 1
mov x,#06CH ; 108 ;[INF] 2, 1
call !_iic_mcu_read ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 79 :
; line 80 : // 3. <20>ꎞ<EFBFBD>I<EFBFBD><49>OCV<43><56><EFBFBD>ύX
; line 81 : dat_16._u16 = swap_endian_16( 0xD4C0 ); // <20>}<7D>W<EFBFBD>b<EFBFBD>N<EFBFBD>i<EFBFBD><69><EFBFBD>o
; <20>[<5B>I<EFBFBD>Ȃ<EFBFBD><C882>́B<CC81><42><EFBFBD>[<5B>J<EFBFBD>[<5B>w<EFBFBD><77>
$DGL 0,36
movw ax,#0C0D4H ; -16172 ;[INF] 3, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 82 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_OCV, 2, &d
; at_16 );
$DGL 0,37
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#0EH ; 14 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 83 :
; line 84 : // 4. <20>ꎞ<EFBFBD>I<EFBFBD><49>RCOMP<4D><50><EFBFBD>ύX
; line 85 : dat_16._u16 = swap_endian_16( 0xFF00 );
$DGL 0,40
clrw ax ;[INF] 1, 1
dec x ;[INF] 1, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 86 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 2,
; &dat_16 );
$DGL 0,41
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#0CH ; 12 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 87 :
; line 88 : // <20>d<EFBFBD>r<EFBFBD><72><EFBFBD>[<5B>J<EFBFBD>[<5B>̎<EFBFBD><CC8E><EFBFBD>
; line 89 : BT_DET_P = 1;
$DGL 0,44
set1 P1.6 ;[INF] 3, 2
; line 90 : temp = ( u8 ) ( ( get_adc( ADC_SEL_BATT_DET ) >> 5 ) -1
; ); // <20><><EFBFBD>ʒl<CA92>O<EFBFBD>̔<EFBFBD><CC94><EFBFBD><EFBFBD>̕<EFBFBD><CC95>A<EFBFBD>C<EFBFBD><43><EFBFBD>f<EFBFBD>b<EFBFBD>N<EFBFBD>X<EFBFBD><58><EFBFBD>킹
$DGL 0,45
movw ax,#09H ; 9 ;[INF] 3, 1
call !_get_adc ;[INF] 3, 3
mov a,c ;[INF] 1, 1
shrw ax,13 ;[INF] 2, 1
decw ax ;[INF] 1, 1
mov a,x ;[INF] 1, 1
mov [hl+7],a ; temp ;[INF] 2, 1
; line 91 : BT_DET_P = 0;
$DGL 0,46
clr1 P1.6 ;[INF] 3, 2
; line 92 :
; line 93 : iic_mcu_set_wo_dma( );
$DGL 0,48
??bb02_PM_init:
?L0005:
bf _iic_mcu_busy,$?L0006 ;[INF] 4, 5
??bb03_PM_init:
??eb03_PM_init:
br $?L0005 ;[INF] 2, 3
?L0006:
set1 _iic_mcu_wo_dma ;[INF] 3, 2
??eb02_PM_init:
; line 94 : // 5.<2E><><EFBFBD>[<5B>J<EFBFBD>[<5B>ʃp<CA83><70><EFBFBD><EFBFBD><EFBFBD>[<5B>^<5E>̃<EFBFBD><CC83>[<5B>h
; line 95 : switch ( temp )
$DGL 0,50
mov a,[hl+7] ; temp ;[INF] 2, 1
shrw ax,8 ;[INF] 2, 1
clrw bc ;[INF] 1, 1
subw ax,bc ;[INF] 1, 1
bz $?L0008 ;[INF] 2, 4
subw ax,#03H ; 3 ;[INF] 3, 1
bz $?L0009 ;[INF] 2, 4
subw ax,#04H ; 4 ;[INF] 3, 1
br $?L0009 ;[INF] 2, 3
; line 96 : {
??bb04_PM_init:
; line 97 : case( BT_VENDER_SHIROBAKO ):
?L0008:
; line 98 : system_status.model = MODEL_SHIROBAKO;
$DGL 0,53
mov !_system_status+3,#02H ; 2 ;[INF] 4, 1
; line 99 : break;
$DGL 0,54
br $?L0007 ;[INF] 2, 3
; line 100 :
; line 101 : case( BT_VENDER_PANA ):
?L0009:
; line 102 : case( BT_VENDER_MAXELL ):
; line 103 : default:
; line 104 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_BT_PAR
; AM, 64, &BT_PARAM[0] );
$DGL 0,59
movw de,#loww (_BT_PARAM) ;[INF] 3, 1
push de ;[INF] 1, 1
movw ax,#040H ; 64 ;[INF] 3, 1
push ax ;[INF] 1, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 105 : rcomp = BT_PANA_RCOMP;
$DGL 0,60
mov a,!_BT_PANA_RCOMP ;[INF] 3, 1
mov !_rcomp,a ;[INF] 3, 1
; line 106 : temp_co_up = BT_PANA_TEMPCOUP;
$DGL 0,61
movw bc,!_BT_PANA_TEMPCOUP+2 ;[INF] 3, 1
movw ax,!_BT_PANA_TEMPCOUP ;[INF] 3, 1
movw !_temp_co_up,ax ;[INF] 3, 1
xchw ax,bc ;[INF] 1, 1
movw !_temp_co_up+2,ax ;[INF] 3, 1
; line 107 : temp_co_dn = BT_PANA_TEMPCODN;
$DGL 0,62
movw bc,!_BT_PANA_TEMPCODN+2 ;[INF] 3, 1
movw ax,!_BT_PANA_TEMPCODN ;[INF] 3, 1
movw !_temp_co_dn,ax ;[INF] 3, 1
xchw ax,bc ;[INF] 1, 1
movw !_temp_co_dn+2,ax ;[INF] 3, 1
; line 108 : break;
??eb04_PM_init:
; line 109 : }
?L0007:
; line 110 :
; line 111 : // 6. 150ms<6D>ȏ<EFBFBD><C88F>҂<EFBFBD>
; line 112 : wait_ms( 200 );
$DGL 0,67
movw ax,#0C8H ; 200 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 113 :
; line 114 : // 7. OCV<43>Ɂu<C981>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD>l<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 115 : dat_16._u16 = swap_endian_16( 0xD4C0 );
$DGL 0,70
movw ax,#0C0D4H ; -16172 ;[INF] 3, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 116 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_OCV, 2, &d
; at_16 );
$DGL 0,71
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#0EH ; 14 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 117 :
; line 118 : // 8. 150<35>`600ms<6D>҂B600ms<6D>͌<EFBFBD><CD8C><EFBFBD>
; line 119 : wait_ms( 200 );
$DGL 0,74
movw ax,#0C8H ; 200 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 120 :
; line 121 : // 9. SOC<4F><43><EFBFBD>ǂށB<DE81>x<EFBFBD><78><EFBFBD>t<EFBFBD>@<40>C<EFBFBD>̂<EFBFBD><CC82>߁B
; line 122 : temp = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_R
; EG_SOC );
$DGL 0,77
movw ax,#04H ; 4 ;[INF] 3, 1
call !bs_F0151 ;[INF] 3, 3
mov [hl+7],a ; temp ;[INF] 2, 1
; line 123 :
; line 124 : if( 0x6D == temp || temp == 0x6E || temp == 0x6F ){
$DGL 0,79
cmp a,#06DH ; 109 ;[INF] 2, 1
bz $?L0015 ;[INF] 2, 4
mov a,[hl+7] ; temp ;[INF] 2, 1
cmp a,#06EH ; 110 ;[INF] 2, 1
bz $?L0015 ;[INF] 2, 4
mov a,[hl+7] ; temp ;[INF] 2, 1
cmp a,#06FH ; 111 ;[INF] 2, 1
?L0015:
??bb05_PM_init:
??eb05_PM_init:
; line 125 : // <20>J<EFBFBD>X<EFBFBD>^<5E><><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OK<4F>I
; line 126 : }else{
??bb06_PM_init:
??eb06_PM_init:
; line 127 : // <20><><EFBFBD>s<EFBFBD><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>烊<EFBFBD>g<EFBFBD><67><EFBFBD>C<EFBFBD><43><EFBFBD><EFBFBD><EFBFBD>̂<EFBFBD><CC82>H
; line 128 : }
; line 129 :
; line 130 : // 10.<2E><><EFBFBD><EFBFBD>RCOMP<4D><50>OCV<43><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߂<EFBFBD>
; line 131 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4,
; origParam );
$DGL 0,86
movw ax,hl ;[INF] 1, 1
addw ax,#03H ;[INF] 3, 1
push ax ;[INF] 1, 1
movw ax,#04H ; 4 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#0CH ; 12 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 132 :
; line 133 : // 11. <20><><EFBFBD>b<EFBFBD>N
; line 134 : dat_16._u16 = swap_endian_16( 0x0000 ); // lock key
$DGL 0,89
clrw ax ;[INF] 1, 1
movw [hl],ax ; dat_16 ;[INF] 1, 1
; line 135 : iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_LOCK, 2, &
; dat_16 );
$DGL 0,90
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#03EH ; 62 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
??eb01_PM_init:
; line 136 :
; line 137 : // <20><><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD> //
; line 138 : }
?L0004:
; line 139 :
; line 140 : // <20>d<EFBFBD>r<EFBFBD><72><EFBFBD>x<EFBFBD><78><EFBFBD><EFBFBD>
; line 141 : BT_TEMP_P = 1; // <20>d<EFBFBD>r<EFBFBD><72><EFBFBD>x<EFBFBD>Ď<EFBFBD><C48E>X<EFBFBD>^<5E>[<5B>g
$DGL 0,96
set1 P1.7 ;[INF] 3, 2
; line 142 : raw_adc_temperature = get_adc( ADC_SEL_BATT_TEMP ); // <20><><EFBFBD>x<EFBFBD><78>
; temp<6D>B
$DGL 0,97
movw ax,#08H ; 8 ;[INF] 3, 1
call !_get_adc ;[INF] 3, 3
mov a,c ;[INF] 1, 1
mov !_raw_adc_temperature,a ;[INF] 3, 1
; line 143 : renge_task_immed_add( PM_bt_temp_update );
$DGL 0,98
movw ax,#loww (_PM_bt_temp_update) ;[INF] 3, 1
call !_renge_task_immed_add ;[INF] 3, 3
; line 144 :
; line 145 : // PMIC <20>o<EFBFBD>[<5B>W<EFBFBD><57><EFBFBD><EFBFBD><EFBFBD>ǂݏo<DD8F><6F>
; line 146 : // temp = iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VER
; );
; line 147 : // vreg_ctr[ VREG_C_PM_INFO ] = temp;
; line 148 : // <20>f<EFBFBD>o<EFBFBD>b<EFBFBD>O<EFBFBD>p<EFBFBD>͕ʂɂ܂Ƃ߂<C682>
; line 149 : }
$DGL 0,104
??ef_PM_init:
addw sp,#08H ;[INF] 2, 1
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_init:
; line 150 :
; line 151 :
; line 152 :
; line 153 :
; line 154 :
; line 155 :
; line 156 : /* ========================================================
; line 157 : raw_adc_temperature<72>ɓ<EFBFBD><C993><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>l<EFBFBD><6C><EFBFBD><EFBFBD><EFBFBD>ɕϊ<C995><CF8A><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƂƂ<C682><C682>ɁA
; line 158 : <20>E<EFBFBD><45><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>ɃZ<C983>b<EFBFBD>g
; line 159 : <20>E<EFBFBD>c<EFBFBD><63>IC<49>ɃZ<C983>b<EFBFBD>g
; line 160 : todo
; line 161 : ======================================================== */
; line 162 : task_status_immed PM_bt_temp_update( )
; line 163 : {
_PM_bt_temp_update:
$DGL 1,154
push hl ;[INF] 1, 1
push ax ;[INF] 1, 1
movw hl,sp ;[INF] 3, 1
??bf_PM_bt_temp_update:
; line 164 : static u8 count = 0; // <20><><EFBFBD>܂ɂ<DC82><C982><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɍs<C98D><73><EFBFBD>Ȃ<EFBFBD>
; line 165 :
; line 166 : static u8 rawdat_old;
; line 167 : static s16 temperature; // todo
; line 168 : u16 newrcomp;
; line 169 :
; line 170 : /*
; line 171 : <09>T<EFBFBD>[<5B>~<7E>X<EFBFBD>^ - 10k<30><6B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>_<EFBFBD>̎<EFBFBD><CC8E>A
; line 172 : <09><><EFBFBD>p<EFBFBD><70><EFBFBD>x<EFBFBD>ł͕<C582><CD95><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̃J<CC83>[<5B>u<EFBFBD><75><EFBFBD>قڃ<D982><DA83>j<EFBFBD>A<EFBFBD>ŁA
; line 173 : <09><><EFBFBD>c T[<5B><>] = 81.48 - 111.97 x ratio
; line 174 : TDK T = 81.406 - 111.81 x ratio
; line 175 : */
; line 176 : if( rawdat_old != raw_adc_temperature ){
$DGL 0,14
mov a,!?L0019 ; rawdat_old ;[INF] 3, 1
cmp a,!_raw_adc_temperature ;[INF] 3, 1
bz $?L0021 ;[INF] 2, 4
??bb00_PM_bt_temp_update:
; line 177 : DBG_P_n = 1;
$DGL 0,15
set1 P2.2 ;[INF] 3, 2
; line 178 : temperature = 81.45 - 111.9 * raw_adc_temperature/256.0;
$DGL 0,16
mov a,!_raw_adc_temperature ;[INF] 3, 1
shrw ax,8 ;[INF] 2, 1
clrw bc ;[INF] 1, 1
movw _@RTARG0,ax ;[INF] 2, 1
movw ax,bc ;[INF] 1, 1
movw _@RTARG2,ax ;[INF] 2, 1
call !@@lstof ;[INF] 3, 3
movw _@RTARG4,#0CCCDH ; -13107 ;[INF] 4, 1
movw ax,#042DFH ; 17119 ;[INF] 3, 1
call !@@fmul ;[INF] 3, 3
movw _@RTARG4,#00H ; 0 ;[INF] 4, 1
movw ax,#04380H ; 17280 ;[INF] 3, 1
call !@@fdiv ;[INF] 3, 3
movw ax,_@RTARG0 ;[INF] 2, 1
movw _@RTARG4,ax ;[INF] 2, 1
movw ax,_@RTARG2 ;[INF] 2, 1
movw _@RTARG0,#0E666H ; -6554 ;[INF] 4, 1
movw _@RTARG2,#042A2H ; 17058 ;[INF] 4, 1
call !@@fsub ;[INF] 3, 3
call !@@ftols ;[INF] 3, 3
movw ax,_@RTARG0 ;[INF] 2, 1
movw !?L0020,ax ; temperature ;[INF] 3, 1
; line 179 : vreg_ctr[VREG_C_BT_TEMP] = (u8)temperature;
$DGL 0,17
mov a,!?L0020 ; temperature ;[INF] 3, 1
mov !_vreg_ctr+10,a ;[INF] 3, 1
; line 180 : DBG_P_n = 0;
$DGL 0,18
clr1 P2.2 ;[INF] 3, 2
??eb00_PM_bt_temp_update:
; line 181 : }
?L0021:
; line 182 :
; line 183 : // <20><><EFBFBD>X<EFBFBD><58><EFBFBD><EFBFBD><EFBFBD>ɂ䂭
; line 184 : if( count == 0 )
$DGL 0,22
cmp0 !?L0018 ; count ;[INF] 3, 1
bnz $?L0031 ;[INF] 2, 4
; line 185 : {
??bb01_PM_bt_temp_update:
; line 186 : DBG_P_n = 1;
$DGL 0,24
set1 P2.2 ;[INF] 3, 2
; line 187 : if( vreg_ctr[VREG_C_BT_TEMP] > 20 )
$DGL 0,25
cmp !_vreg_ctr+10,#015H ; 21 ;[INF] 4, 1
bc $?L0025 ;[INF] 2, 4
; line 188 : {
??bb02_PM_bt_temp_update:
; line 189 : newrcomp = -( ( temperature - 20 ) * temp_co_up );
$DGL 0,27
call !bs_S0144 ;[INF] 3, 3
call !@@lstof ;[INF] 3, 3
movw ax,!_temp_co_up ;[INF] 3, 1
movw _@RTARG4,ax ;[INF] 2, 1
movw ax,!_temp_co_up+2 ;[INF] 3, 1
call !@@fmul ;[INF] 3, 3
call !@@frev ;[INF] 3, 3
bt _@RTARG3.7,$?L0027 ;[INF] 4, 5
call !@@ftolu ;[INF] 3, 3
br $?L0028 ;[INF] 2, 3
?L0027:
call !@@ftols ;[INF] 3, 3
?L0028:
movw ax,_@RTARG0 ;[INF] 2, 1
movw [hl],ax ; newrcomp ;[INF] 1, 1
??eb02_PM_bt_temp_update:
; line 190 : }
$DGL 0,28
br $?L0026 ;[INF] 2, 3
?L0025:
; line 191 : else
; line 192 : {
??bb03_PM_bt_temp_update:
; line 193 : newrcomp = -( ( temperature - 20 ) * temp_co_dn );
$DGL 0,31
call !bs_S0144 ;[INF] 3, 3
call !@@lstof ;[INF] 3, 3
movw ax,!_temp_co_dn ;[INF] 3, 1
movw _@RTARG4,ax ;[INF] 2, 1
movw ax,!_temp_co_dn+2 ;[INF] 3, 1
call !@@fmul ;[INF] 3, 3
call !@@frev ;[INF] 3, 3
bt _@RTARG3.7,$?L0029 ;[INF] 4, 5
call !@@ftolu ;[INF] 3, 3
br $?L0030 ;[INF] 2, 3
?L0029:
call !@@ftols ;[INF] 3, 3
?L0030:
movw ax,_@RTARG0 ;[INF] 2, 1
movw [hl],ax ; newrcomp ;[INF] 1, 1
??eb03_PM_bt_temp_update:
; line 194 : }
?L0026:
; line 195 : newrcomp += rcomp;
$DGL 0,33
mov x,!_rcomp ;[INF] 3, 1
clrb a ;[INF] 1, 1
addw ax,[hl+0] ; newrcomp ;[INF] 3, 1
movw [hl],ax ; newrcomp ;[INF] 1, 1
; line 196 :
; line 197 : newrcomp = swap_endian_16( (u16)newrcomp );
$DGL 0,35
shlw ax,8 ;[INF] 2, 1
xch a,x ;[INF] 1, 1
or a,[hl+1] ; newrcomp ;[INF] 2, 1
xch a,x ;[INF] 1, 1
movw [hl],ax ; newrcomp ;[INF] 1, 1
; line 198 : DBG_P_n = 0;
$DGL 0,36
clr1 P2.2 ;[INF] 3, 2
; line 199 :
; line 200 : if( iic_mcu_write
; line 201 : ( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 2, &newrcomp
; ) == ERR_SUCCESS )
$DGL 0,39
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#0CH ; 12 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0153 ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
cmp0 c ;[INF] 1, 1
bnz $?L0031 ;[INF] 2, 4
; line 202 : {
??bb04_PM_bt_temp_update:
; line 203 : rawdat_old = raw_adc_temperature;
$DGL 0,41
mov a,!_raw_adc_temperature ;[INF] 3, 1
mov !?L0019,a ; rawdat_old ;[INF] 3, 1
??eb04_PM_bt_temp_update:
; line 204 : }
?L0031:
??eb01_PM_bt_temp_update:
; line 205 : }
; line 206 : count += 1;
$DGL 0,44
inc !?L0018 ; count ;[INF] 3, 2
; line 207 :
; line 208 : return ( ERR_SUCCESS );
$DGL 0,46
clrw bc ;[INF] 1, 1
; line 209 : }
$DGL 0,47
??ef_PM_bt_temp_update:
pop ax ;[INF] 1, 1
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_bt_temp_update:
; line 210 :
; line 211 :
; line 212 :
; line 213 : #ifdef _PMIC_TWL_
; line 214 : u8 blset;
; line 215 : #endif
; line 216 :
; line 217 : #ifndef _PARRADIUM_
; line 218 : /* ========================================================
; line 219 : <20>t<EFBFBD><74><EFBFBD>n<EFBFBD>̓d<CC93><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 220 : <20>@<40>X<EFBFBD>e<EFBFBD>[<5B>^<5E>X<EFBFBD>t<EFBFBD><74><EFBFBD>O<EFBFBD>͂<EFBFBD><CD82><EFBFBD><EFBFBD>ɗ<EFBFBD><C997>ĂĂ<C482><C482>܂<EFBFBD><DC82>B
; line 221 : <20>@<40>s<EFBFBD><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԃ<EFBFBD><D482><EFBFBD><EFBFBD>邵<EFBFBD>A
; line 222 : <20>N<EFBFBD><4E><EFBFBD><EFBFBD><EFBFBD>s<EFBFBD>ł<EFBFBD><C582><EFBFBD><EFBFBD>Γd<CE93><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 223 : <20>ʂ̃^<5E>X<EFBFBD>N<EFBFBD>œd<C593><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͊Ď<CD8A><C48E><EFBFBD><EFBFBD>Ă<EFBFBD><C482>āA<C481>X<EFBFBD>e<EFBFBD>[<5B>^<5E>X<EFBFBD><58><EFBFBD>N<EFBFBD><4E><EFBFBD>A<EFBFBD><41><EFBFBD><EFBFBD>
; line 224 : ======================================================== */
; line 225 : // BSR //
; line 226 : err PM_LCD_on( )
; line 227 : {
_PM_LCD_on:
$DGL 1,184
push hl ;[INF] 1, 1
??bf_PM_LCD_on:
; line 228 : u8 rv;
; line 229 :
; line 230 : PM_VDDLCD_on( );
$DGL 0,4
call !bs_F0145 ;[INF] 3, 3
; line 231 :
; line 232 : wait_ms( DELAY_PM_TSS_50B_AND_TCOM );
$DGL 0,6
movw ax,#011H ; 17 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 233 :
; line 234 : PM_TCOM_on( );
$DGL 0,8
movw ax,#0FH ; 15 ;[INF] 3, 1
call !bs_F0146 ;[INF] 3, 3
; line 235 :
; line 236 : wait_ms( DELAY_PM_TCOM_TO_VCS );
$DGL 0,10
movw ax,#03H ; 3 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 237 :
; line 238 : PM_VCS_on( );
$DGL 0,12
movw ax,#01FH ; 31 ;[INF] 3, 1
call !bs_F0146 ;[INF] 3, 3
; line 239 :
; line 240 : wait_ms( DELAY_PM_VCS_TO_BL );
$DGL 0,14
movw ax,#016H ; 22 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 241 : #ifdef _PM_BUG_
; line 242 : iic_mcu_write_a_byte( IIC_SLA_PMIC, 0x22, 0x4A ); // <20>o<EFBFBD>O<EFBFBD><4F>
; <20><>PMIC<49>΍<EFBFBD>
; line 243 : #endif
; line 244 :
; line 245 : rv = PM_chk_LDSW( );
$DGL 0,19
call !bs_F0147 ;[INF] 3, 3
mov l,a ;[INF] 1, 1
; line 246 :
; line 247 : if( rv != 0 )
$DGL 0,21
cmp0 a ;[INF] 1, 1
bz $?L0035 ;[INF] 2, 4
; line 248 : {
??bb00_PM_LCD_on:
; line 249 : // <20>d<EFBFBD><64><EFBFBD>N<EFBFBD><4E><EFBFBD>G<EFBFBD><47><EFBFBD>[<5B>Ȃ<EFBFBD><C882>d<EFBFBD><64><EFBFBD><EFBFBD><EFBFBD>؂<EFBFBD><D882>Ă<EFBFBD><C482>܂<EFBFBD><DC82>B<EFBFBD><42><EFBFBD><EFBFBD><EFBFBD>ł̓P<CD83>A<EFBFBD><41><EFBFBD><EFBFBD>
; <20><>
; line 250 : vreg_ctr[VREG_C_STATUS] |= REG_BIT_LCD_POW;
$DGL 0,24
set1 !_vreg_ctr+15.7 ;[INF] 4, 2
; line 251 : set_irq( VREG_C_IRQ3, REG_BIT_LCD_ON );
$DGL 0,25
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#013H ; 19 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
; line 252 :
; line 253 : SND_DEPOP_DEACT; // 1<>Ń~<7E><><EFBFBD>[<5B>g
??eb00_PM_LCD_on:
; line 254 : }
?L0035:
; line 255 :
; line 256 : #ifdef _PMIC_TWL_
; line 257 : PM_TEG_LCD_dis( 0 );
; line 258 : blset = ( PM_REG_BIT_BL_U | PM_REG_BIT_BL_L );
; line 259 : #endif
; line 260 : return ( rv );
$DGL 0,34
movw ax,hl ;[INF] 1, 1
clrb a ;[INF] 1, 1
movw bc,ax ;[INF] 1, 1
; line 261 : }
$DGL 0,35
??ef_PM_LCD_on:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_LCD_on:
; line 262 :
; line 263 : // BSR //
; line 264 : void PM_LCD_off()
; line 265 : {
_PM_LCD_off:
$DGL 1,195
push hl ;[INF] 1, 1
??bf_PM_LCD_off:
; line 266 : SND_DEPOP_ACT;
; line 267 :
; line 268 : // BL<42>‚<EFBFBD><C282>Ă<EFBFBD><C482><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 269 : #ifdef _PMIC_TWL_
; line 270 : if( blset != 0 )
; line 271 : #else
; line 272 : if( ( iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL ) &
; 0x03 ) != 0 )
$DGL 0,8
call !bs_F0149 ;[INF] 3, 3
and a,#03H ; 3 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0039 ;[INF] 2, 4
; line 273 : #endif
; line 274 : {
??bb00_PM_LCD_off:
; line 275 : u8 tot;
; line 276 :
; line 277 : PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF )
; ;
$DGL 0,13
movw ax,#014H ; 20 ;[INF] 3, 1
call !_PM_BL_set ;[INF] 3, 3
; line 278 : vreg_ctr[VREG_C_STATUS] &= 0b10011111;
$DGL 0,14
movw de,#loww (_vreg_ctr+15) ;[INF] 3, 1
mov a,[de] ;[INF] 1, 1
and a,#09FH ; 159 ;[INF] 2, 1
mov [de],a ;[INF] 1, 1
; line 279 :
; line 280 : if( (( REG_BIT_BL_U_OFF | REG_BIT_BL_L_OFF ) & ~vreg_ctr
; [ VREG_C_IRQ_MASK3 ] ) != 0 )
$DGL 0,16
mov a,[de+12] ;[INF] 2, 1
xor a,#0FFH ; 255 ;[INF] 2, 1
mov x,#0FFH ; 255 ;[INF] 2, 1
and a,#014H ; 20 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0041 ;[INF] 2, 4
; line 281 : {
??bb01_PM_LCD_off:
; line 282 : vreg_ctr[ VREG_C_IRQ3 ] |= ( ( REG_BIT_BL_U_OFF | RE
; G_BIT_BL_L_OFF ) & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] );
$DGL 0,18
mov a,[de+12] ;[INF] 2, 1
xor a,#0FFH ; 255 ;[INF] 2, 1
and a,#014H ; 20 ;[INF] 2, 1
call !bs_S0152 ;[INF] 3, 3
; line 283 : IRQ0_neg;
$DGL 0,19
??bb02_PM_LCD_off:
set1 PM7.6 ;[INF] 3, 2
??eb02_PM_LCD_off:
; line 284 : tot = 0;
$DGL 0,20
mov l,#00H ; 0 ;[INF] 2, 1
; line 285 : while( !IRQ0 && ( ++tot != 0 ) ){;}
$DGL 0,21
?L0043:
bt P7.6,$?L0044 ;[INF] 4, 5
inc l ;[INF] 1, 1
mov a,l ;[INF] 1, 1
cmp0 a ;[INF] 1, 1
bnz $?L0043 ;[INF] 2, 4
??bb03_PM_LCD_off:
??eb03_PM_LCD_off:
?L0044:
; line 286 : IRQ0_ast;
$DGL 0,22
??bb04_PM_LCD_off:
clr1 P7.6 ;[INF] 3, 2
clr1 PM7.6 ;[INF] 3, 2
??eb04_PM_LCD_off:
??eb01_PM_LCD_off:
; line 287 : }
?L0041:
; line 288 : vreg_ctr[VREG_C_COMMAND2] &= ~( REG_BIT_CMD_BL_U_OFF | R
; EG_BIT_CMD_BL_L_OFF );
$DGL 0,24
movw de,#loww (_vreg_ctr+34) ;[INF] 3, 1
mov a,[de] ;[INF] 1, 1
and a,#0EBH ; 235 ;[INF] 2, 1
mov [de],a ;[INF] 1, 1
??eb00_PM_LCD_off:
; line 289 : }
?L0039:
; line 290 :
; line 291 : #ifdef _PMIC_TWL_
; line 292 : PM_TEG_LCD_dis( 1 );
; line 293 : blset = 0;
; line 294 : #endif
; line 295 :
; line 296 : PM_TCOM_VCS_off( );
$DGL 0,32
call !bs_F0145 ;[INF] 3, 3
; line 297 : wait_ms( DELAY_PM_LCD_OFF );
$DGL 0,33
movw ax,#033H ; 51 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
; line 298 :
; line 299 : PM_VDDLCD_off( ); // <20>c<EFBFBD><63><EFBFBD>Ă<EFBFBD><C482>̑S<CC91><53><EFBFBD>~<7E>߂܂<DF82><DC82>B
$DGL 0,35
clrw ax ;[INF] 1, 1
call !bs_F0146 ;[INF] 3, 3
; line 300 : vreg_ctr[VREG_C_STATUS] &= ~REG_BIT_LCD_POW;
$DGL 0,36
clr1 !_vreg_ctr+15.7 ;[INF] 4, 2
; line 301 :
; line 302 :
; line 303 : set_irq( VREG_C_IRQ3, REG_BIT_LCD_OFF );
$DGL 0,39
onew ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#013H ; 19 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
; line 304 : }
$DGL 0,40
??ef_PM_LCD_off:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_LCD_off:
; line 305 :
; line 306 :
; line 307 :
; line 308 : /* ========================================================
; line 309 : <20>@<40>o<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>C<EFBFBD>g<EFBFBD>̌•<CC8C>on/off
; line 310 : <20>@<40><><EFBFBD>󂩂<EFBFBD><F382A982>@on/off/<2F>ێ<EFBFBD><DB8E>@<40>̃t<CC83><74><EFBFBD>O<EFBFBD>Ȃ̂Ŗʓ|
; line 311 : <20>@<40>@<40>Ⴆ<EFBFBD>΁ABL on/on <20>̏<EFBFBD><CC8F>ԂŁAon/on<6F>ɂ<EFBFBD><C982><EFBFBD><EFBFBD>ƌ<EFBFBD><C68C><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482>Aon/on<6F><6E><EFBFBD><EFBFBD>
; <20><><EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
; line 312 : ======================================================== */
; line 313 : err PM_BL_set( u8 dat )
; line 314 : {
_PM_BL_set:
$DGL 1,223
push hl ;[INF] 1, 1
push ax ;[INF] 1, 1
subw sp,#04H ;[INF] 2, 1
movw hl,sp ;[INF] 3, 1
??bf_PM_BL_set:
; line 315 : #ifndef _PMIC_TWL_
; line 316 : u8 blset;
; line 317 : #endif
; line 318 : u8 intset = 0;
$DGL 0,5
mov [hl+2],#00H ; intset,0 ;[INF] 3, 1
; line 319 : // RMW<4D><57><EFBFBD>s<EFBFBD><73>
; line 320 :
; line 321 : #ifndef _PMIC_TWL_
; line 322 : // Read
; line 323 : blset = iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL )
; ;
$DGL 0,10
call !bs_F0149 ;[INF] 3, 3
mov [hl+3],a ; blset ;[INF] 2, 1
; line 324 : #endif
; line 325 :
; line 326 : // Modify
; line 327 : // ue
; line 328 : if(( dat & REG_BIT_CMD_BL_U_ON ) != 0 )
$DGL 0,15
mov a,[hl+4] ; dat ;[INF] 2, 1
and a,#020H ; 32 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0047 ;[INF] 2, 4
; line 329 : {
??bb00_PM_BL_set:
; line 330 : blset |= PM_REG_BIT_BL_U;
$DGL 0,17
mov a,[hl+3] ; blset ;[INF] 2, 1
or a,#01H ; 1 ;[INF] 2, 1
mov [hl+3],a ; blset ;[INF] 2, 1
; line 331 : intset |= REG_BIT_BL_U_ON;
$DGL 0,18
mov a,[hl+2] ; intset ;[INF] 2, 1
or a,#020H ; 32 ;[INF] 2, 1
mov [hl+2],a ; intset ;[INF] 2, 1
??eb00_PM_BL_set:
; line 332 : }
$DGL 0,19
br $?L0049 ;[INF] 2, 3
?L0047:
; line 333 : else if(( dat & REG_BIT_CMD_BL_U_OFF ) != 0 )
$DGL 0,20
mov a,[hl+4] ; dat ;[INF] 2, 1
and a,#010H ; 16 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0049 ;[INF] 2, 4
; line 334 : {
??bb01_PM_BL_set:
; line 335 : blset &= ~PM_REG_BIT_BL_U;
$DGL 0,22
mov a,[hl+3] ; blset ;[INF] 2, 1
and a,#0FEH ; 254 ;[INF] 2, 1
mov [hl+3],a ; blset ;[INF] 2, 1
; line 336 : intset |= REG_BIT_BL_U_OFF;
$DGL 0,23
mov a,[hl+2] ; intset ;[INF] 2, 1
or a,#010H ; 16 ;[INF] 2, 1
mov [hl+2],a ; intset ;[INF] 2, 1
??eb01_PM_BL_set:
; line 337 : }
?L0049:
; line 338 :
; line 339 : // shita
; line 340 : if(( dat & REG_BIT_CMD_BL_L_ON ) != 0 )
$DGL 0,27
mov a,[hl+4] ; dat ;[INF] 2, 1
and a,#08H ; 8 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0051 ;[INF] 2, 4
; line 341 : {
??bb02_PM_BL_set:
; line 342 : blset |= PM_REG_BIT_BL_L;
$DGL 0,29
mov a,[hl+3] ; blset ;[INF] 2, 1
or a,#02H ; 2 ;[INF] 2, 1
mov [hl+3],a ; blset ;[INF] 2, 1
; line 343 : intset |= REG_BIT_BL_L_ON;
$DGL 0,30
mov a,[hl+2] ; intset ;[INF] 2, 1
or a,#08H ; 8 ;[INF] 2, 1
mov [hl+2],a ; intset ;[INF] 2, 1
??eb02_PM_BL_set:
; line 344 : }
$DGL 0,31
br $?L0053 ;[INF] 2, 3
?L0051:
; line 345 : else if(( dat & REG_BIT_CMD_BL_L_OFF ) != 0 )
$DGL 0,32
mov a,[hl+4] ; dat ;[INF] 2, 1
and a,#04H ; 4 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0053 ;[INF] 2, 4
; line 346 : {
??bb03_PM_BL_set:
; line 347 : blset &= ~PM_REG_BIT_BL_L;
$DGL 0,34
mov a,[hl+3] ; blset ;[INF] 2, 1
and a,#0FDH ; 253 ;[INF] 2, 1
mov [hl+3],a ; blset ;[INF] 2, 1
; line 348 : intset |= REG_BIT_BL_L_OFF;
$DGL 0,35
mov a,[hl+2] ; intset ;[INF] 2, 1
or a,#04H ; 4 ;[INF] 2, 1
mov [hl+2],a ; intset ;[INF] 2, 1
??eb03_PM_BL_set:
; line 349 : }
?L0053:
; line 350 :
; line 351 : /*
; line 352 : SoC<6F><43>PWM<57><4D><EFBFBD>o<EFBFBD><6F><EFBFBD>悤<EFBFBD><E682A4><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD><67><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>x<EFBFBD><78><EFBFBD><EFBFBD><EFBFBD>L<EFBFBD>邽<EFBFBD>߁A<DF81>X<EFBFBD>e<EFBFBD>[
; <20>^<5E>X<EFBFBD><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 353 : <20>X<EFBFBD>V<EFBFBD><56><EFBFBD>Ă<EFBFBD><C482>܂<EFBFBD><DC82>B
; line 354 : // Write
; line 355 : iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL, blset );
; line 356 : if( blset != 0x00 ){
; line 357 : wait_ms( 10 );
; line 358 : }
; line 359 : */
; line 360 : vreg_ctr[VREG_C_STATUS] = (( vreg_ctr[VREG_C_STATUS] & 0b100
; 11111 )
; line 361 : | (( blset << 6 ) | ( blset << 4 )
; ) & 0b01100000 );
$DGL 0,48
mov a,!_vreg_ctr+15 ;[INF] 3, 1
and a,#09FH ; 159 ;[INF] 2, 1
mov c,a ;[INF] 1, 1
mov a,[hl+3] ; blset ;[INF] 2, 1
shrw ax,8 ;[INF] 2, 1
shlw ax,6 ;[INF] 2, 1
movw de,ax ;[INF] 1, 1
mov a,[hl+3] ; blset ;[INF] 2, 1
shrw ax,8 ;[INF] 2, 1
shlw ax,4 ;[INF] 2, 1
or a,d ;[INF] 2, 1
xch a,x ;[INF] 1, 1
or a,e ;[INF] 2, 1
and a,#060H ; 96 ;[INF] 2, 1
or c,a ;[INF] 2, 1
mov a,c ;[INF] 1, 1
mov !_vreg_ctr+15,a ;[INF] 3, 1
; line 362 : // PMIC<49><43>BL<42>̃r<CC83>b<EFBFBD>g<EFBFBD>ƁAMCU<43><55>STATUS<55><53><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>̃r<CC83>b<EFBFBD>g<EFBFBD>ʒu<CA92><75><EFBFBD>t<EFBFBD><74>
; <20><><EFBFBD>ߓ<EFBFBD><DF93><EFBFBD><EFBFBD>ւ<EFBFBD>
; line 363 :
; line 364 : {
??bb04_PM_BL_set:
; line 365 : u8 tot;
; line 366 :
; line 367 : if( ( intset & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ) != 0 )
$DGL 0,54
mov a,!_vreg_ctr+27 ;[INF] 3, 1
xor a,#0FFH ; 255 ;[INF] 2, 1
mov x,#0FFH ; 255 ;[INF] 2, 1
and a,[hl+2] ; intset ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0055 ;[INF] 2, 4
; line 368 : {
??bb05_PM_BL_set:
; line 369 : vreg_ctr[ VREG_C_IRQ3 ] |= ( intset & ~vreg_ctr[ VRE
; G_C_IRQ_MASK3 ] );
$DGL 0,56
mov a,!_vreg_ctr+27 ;[INF] 3, 1
xor a,#0FFH ; 255 ;[INF] 2, 1
and a,[hl+2] ; intset ;[INF] 2, 1
call !bs_S0152 ;[INF] 3, 3
; line 370 : IRQ0_neg;
$DGL 0,57
??bb06_PM_BL_set:
set1 PM7.6 ;[INF] 3, 2
??eb06_PM_BL_set:
; line 371 : tot = 0;
$DGL 0,58
mov [hl+1],#00H ; tot,0 ;[INF] 3, 1
; line 372 : while( !IRQ0 && ( ++tot != 0 ) ){;} // <20><><EFBFBD>荞<EFBFBD>݂<EFBFBD><DD82><EFBFBD>
; <20>꒼<EFBFBD><EA92BC>
$DGL 0,59
?L0057:
bt P7.6,$?L0058 ;[INF] 4, 5
inc [hl+1] ; tot ;[INF] 3, 2
mov a,[hl+1] ; tot ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bnz $?L0057 ;[INF] 2, 4
??bb07_PM_BL_set:
??eb07_PM_BL_set:
?L0058:
; line 373 : IRQ0_ast;
$DGL 0,60
??bb08_PM_BL_set:
clr1 P7.6 ;[INF] 3, 2
clr1 PM7.6 ;[INF] 3, 2
??eb08_PM_BL_set:
??eb05_PM_BL_set:
; line 374 : }
?L0055:
??eb04_PM_BL_set:
; line 375 : }
; line 376 :
; line 377 : // Write
; line 378 : if( blset != 0 ) // BL<42><4C><EFBFBD>t<EFBFBD><74><EFBFBD><EFBFBD><EFBFBD>ꍇ<EFBFBD>̓E<CD83>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD>܂Ȃ<DC82><C882><EFBFBD>PWM
; <20><><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482>炸
$DGL 0,65
mov a,[hl+3] ; blset ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0059 ;[INF] 2, 4
; line 379 : /// <20>V<EFBFBD><56><EFBFBD>b<EFBFBD>g<EFBFBD>_<EFBFBD>E<EFBFBD><45><EFBFBD><EFBFBD><EFBFBD>邱<EFBFBD>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD><EFBFBD>
; line 380 : {
??bb09_PM_BL_set:
; line 381 : wait_ms( 10 );
$DGL 0,68
movw ax,#0AH ; 10 ;[INF] 3, 1
call !_wait_ms ;[INF] 3, 3
??eb09_PM_BL_set:
; line 382 : }
?L0059:
; line 383 : iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL, blset );
$DGL 0,70
mov a,[hl+3] ; blset ;[INF] 2, 1
shrw ax,8 ;[INF] 2, 1
push ax ;[INF] 1, 1
mov x,#04H ; 4 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
; line 384 :
; line 385 : return( ERR_SUCCESS ); // <20><><EFBFBD><EFBFBD><EFBFBD>łُ͈<CD88><D98F>`<60>F<EFBFBD>b<EFBFBD>N<EFBFBD>s<EFBFBD>v
$DGL 0,72
clrw bc ;[INF] 1, 1
; line 386 : }
$DGL 0,73
??ef_PM_BL_set:
addw sp,#06H ;[INF] 2, 1
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_BL_set:
; line 387 :
; line 388 :
; line 389 :
; line 390 : /* ========================================================
; line 391 : <20>t<EFBFBD><74><EFBFBD>̑Ό<CC91><CE8C>d<EFBFBD><64><EFBFBD>̐ݒ<CC90><DD92><EFBFBD><EFBFBD>s<EFBFBD><73><EFBFBD>܂<EFBFBD><DC82>B
; line 392 : <20><><EFBFBD>z<EFBFBD><7A><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>̓<EFBFBD><CC93>e<EFBFBD>𑗂邾<F0919782><E982BE>
; line 393 : ======================================================== */
; line 394 : err PM_LCD_vcom_set( )
; line 395 : {
_PM_LCD_vcom_set:
$DGL 1,274
push hl ;[INF] 1, 1
??bf_PM_LCD_vcom_set:
; line 396 : u8 rv;
; line 397 :
; line 398 : rv = iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DAC
; 1, vreg_ctr[VREG_C_VCOM_T] ); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882>ƂɁAPMIC<49>̓o<CD83>[<5B>X
; <20>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݕs<DD95><73>
$DGL 0,4
mov x,!_vreg_ctr+3 ;[INF] 3, 1
clrb a ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#06H ; 6 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
mov a,c ;[INF] 1, 1
mov l,a ;[INF] 1, 1
; line 399 : rv |= iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DA
; C2, vreg_ctr[VREG_C_VCOM_B] );
$DGL 0,5
mov x,!_vreg_ctr+4 ;[INF] 3, 1
clrb a ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#07H ; 7 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
mov a,c ;[INF] 1, 1
or l,a ;[INF] 2, 1
; line 400 : return ( rv );
$DGL 0,6
movw ax,hl ;[INF] 1, 1
clrb a ;[INF] 1, 1
movw bc,ax ;[INF] 1, 1
; line 401 : }
$DGL 0,7
??ef_PM_LCD_vcom_set:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_LCD_vcom_set:
; line 402 :
; line 403 :
; line 404 :
; line 405 : #else
; line 406 : // <20>p<EFBFBD><70><EFBFBD>f<EFBFBD>B<EFBFBD>E<EFBFBD><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SoC<6F>Ń`<60>F<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƃ<EFBFBD><C682>APMIC<49><43><EFBFBD>t<EFBFBD><74><EFBFBD><EFBFBD><EFBFBD>‚Ȃ<C282><C882><EFBFBD>
; <20>ĂȂ<C482><C882>̂<EFBFBD>
; line 407 : // <20>ُ<EFBFBD><D98F>I<EFBFBD><49><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882>悤<EFBFBD>Ƀ_<C983>~<7E>[<5B>֐<EFBFBD><D690>ɂ<EFBFBD><C982><EFBFBD>
; line 408 : err PM_LCD_on( )
; line 409 : {
; line 410 : vreg_ctr[VREG_C_STATUS] |= REG_BIT_LCD_POW;
; line 411 : set_irq( VREG_C_IRQ3, REG_BIT_LCD_ON );
; line 412 : SND_DEPOP_DEACT; // 1<>Ń~<7E><><EFBFBD>[<5B>g
; line 413 : return ( ERR_SUCCESS );
; line 414 : }
; line 415 :
; line 416 :
; line 417 : void PM_LCD_off( )
; line 418 : {
; line 419 : SND_DEPOP_ACT;
; line 420 : vreg_ctr[VREG_C_STATUS] &= ~REG_BIT_LCD_POW;
; line 421 : set_irq( VREG_C_IRQ3, REG_BIT_LCD_OFF );
; line 422 : }
; line 423 :
; line 424 :
; line 425 : err PM_BL_set( u8 )
; line 426 : {
; line 427 : wait_ms( 10 );
; line 428 : vreg_ctr[VREG_C_STATUS] = ( vreg_ctr[VREG_C_STATUS] & ~(
; REG_BIT_BL_U | REG_BIT_BL_L )
; line 429 : | ( command_bl_set & REG_BIT_CMD_BL_U_ON )? REG_BIT_BL_U
; line 430 : | ( command_bl_set & REG_BIT_CMD_BL_L_ON )? REG_BIT_BL_L
; line 431 : );
; line 432 : return ( PM_chk_LDSW( ) );
; line 433 : }
; line 434 :
; line 435 :
; line 436 : err PM_LCD_vcom_set( )
; line 437 : {
; line 438 : return ( ERR_SUCCESS );
; line 439 : }
; line 440 :
; line 441 : #endif
; line 442 :
; line 443 :
; line 444 :
; line 445 : /* ========================================================
; line 446 : <20><><EFBFBD>ŁA<C581><41><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD>Ăяo<D18F><6F><EFBFBD><EFBFBD><EFBFBD>鎞<EFBFBD>̂<EFBFBD><CC82><EFBFBD>
; line 447 : <20>@I2C<32>̎<EFBFBD><CC8E>荇<EFBFBD><E88D87><EFBFBD>̊֌W<D68C>ł<EFBFBD><C582><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD>
; line 448 : ======================================================== */
; line 449 : task_status_immed tski_vcom_set( )
; line 450 : {
_tski_vcom_set:
$DGL 1,281
??bf_tski_vcom_set:
; line 451 : PM_LCD_vcom_set( );
$DGL 0,2
call !_PM_LCD_vcom_set ;[INF] 3, 3
; line 452 : return ( ERR_FINISED );
$DGL 0,3
clrw bc ;[INF] 1, 1
; line 453 : }
$DGL 0,4
??ef_tski_vcom_set:
ret ;[INF] 1, 6
??ee_tski_vcom_set:
; line 454 :
; line 455 :
; line 456 :
; line 457 : /* ========================================================
; line 458 : <20>V<EFBFBD>[<5B>P<EFBFBD><50><EFBFBD>X<EFBFBD>̒ʂ<CC92><CA82>d<EFBFBD><64><EFBFBD>𗧂<EFBFBD><F097A782>グ<EFBFBD>Ă䂫<C482>܂<EFBFBD><DC82>B
; line 459 : <20>Ԓl 0 <20>Ō<EFBFBD><C58C>܂Ő<DC82><C590><EFBFBD><EFBFBD>Ɋ<EFBFBD><C98A><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>B
; line 460 : 1 <20>V<EFBFBD><56><EFBFBD>[<5B>g<EFBFBD>Ȃǂœd<C593><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>肫<EFBFBD><E882AB><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD><EFBFBD>
; line 461 :
; line 462 : <20>ȉ<EFBFBD><C889>̃s<CC83><73><EFBFBD>͎<EFBFBD><CD8E>ɂ<EFBFBD><C982><EFBFBD><EFBFBD>ő<EFBFBD><C591><EFBFBD><EFBFBD>E<EFBFBD>Ď<EFBFBD><C48E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
; line 463 : <20>EPOW_CONT1,2 TEG<45>d<EFBFBD><64><EFBFBD>̂<EFBFBD>
; line 464 : ======================================================== */
; line 465 : err PM_sys_pow_on( )
; line 466 : {
_PM_sys_pow_on:
$DGL 1,287
push hl ;[INF] 1, 1
??bf_PM_sys_pow_on:
; line 467 : #ifdef _PMIC_CTR_
; line 468 : u8 temp;
; line 469 :
; line 470 : // <20>d<EFBFBD>r<EFBFBD><72><EFBFBD>x<EFBFBD><78><EFBFBD><EFBFBD>
; line 471 : while( ADCEN != 0 )
$DGL 0,6
?L0067:
push hl ;[INF] 1, 1
movw hl,#0F0H ; 240 ;[INF] 3, 1
mov1 CY,[hl].5 ;[INF] 2, 1
pop hl ;[INF] 1, 1
bc $?L0067 ;[INF] 2, 4
; line 472 : {;
??bb00_PM_sys_pow_on:
??eb00_PM_sys_pow_on:
; line 473 : }
; line 474 : BT_TEMP_P = 1;
$DGL 0,9
set1 P1.7 ;[INF] 3, 2
; line 475 : vreg_ctr[VREG_C_BT_TEMP] = get_adc( ADC_SEL_BATT_TEMP );
$DGL 0,10
movw ax,#08H ; 8 ;[INF] 3, 1
call !_get_adc ;[INF] 3, 3
mov a,c ;[INF] 1, 1
mov !_vreg_ctr+10,a ;[INF] 3, 1
; line 476 : BT_TEMP_P = 0;
$DGL 0,11
clr1 P1.7 ;[INF] 3, 2
; line 477 : PM_bt_temp_update( ); // <20><><EFBFBD>x<EFBFBD><78>temp<6D>B<EFBFBD>@<40>c<EFBFBD><63>IC<49>ɍs<C98D><73><EFBFBD>܂<EFBFBD>
$DGL 0,12
call !_PM_bt_temp_update ;[INF] 3, 3
; line 478 :
; line 479 : // <20>c<EFBFBD>ʃ`<60>F<EFBFBD>b<EFBFBD>N
; line 480 : PM_get_batt_left(); // <20><><EFBFBD>ɁAPM_init()<29><><EFBFBD><EFBFBD><EFBFBD>s<EFBFBD><73><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD>
; <20><><EFBFBD>K<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B(<28><><EFBFBD><EFBFBD><EFBFBD>v)
$DGL 0,15
call !_PM_get_batt_left ;[INF] 3, 3
; line 481 : // todo: batt remain -> volatage?
; line 482 : if( vreg_ctr[VREG_C_BT_REMAIN] < 0 )
$DGL 0,17
cmp0 !_vreg_ctr+11 ;[INF] 3, 1
bnc $?L0069 ;[INF] 2, 4
; line 483 : {
??bb01_PM_sys_pow_on:
; line 484 : return ( 1 );
$DGL 0,19
onew bc ;[INF] 1, 1
br $?L0066 ;[INF] 2, 3
??eb01_PM_sys_pow_on:
; line 485 : }
?L0069:
; line 486 :
; line 487 : // <20>d<EFBFBD><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>グ
; line 488 : // PM_reset_ast( ); <20>s<EFBFBD>v PM_LDSW_on<6F>܂<EFBFBD><DC82><EFBFBD>
; line 489 : RESET2_ast;
$DGL 0,24
??bb02_PM_sys_pow_on:
clr1 P0.1 ;[INF] 3, 2
clr1 PM0.1 ;[INF] 3, 2
??eb02_PM_sys_pow_on:
; line 490 : FCRAM_RST_ast;
$DGL 0,25
??bb03_PM_sys_pow_on:
clr1 P3.0 ;[INF] 3, 2
??eb03_PM_sys_pow_on:
; line 491 :
; line 492 : PM_LDSW_on( );
$DGL 0,27
call !bs_F0148 ;[INF] 3, 3
; line 493 :
; line 494 : wait_ms( 1 );
$DGL 0,29
onew ax ;[INF] 1, 1
call !_wait_ms ;[INF] 3, 3
; line 495 : #ifdef _PM_BUG_
; line 496 : iic_mcu_write_a_byte( IIC_SLA_PMIC, 0x22, 0xCA ); // <20>o<EFBFBD>O<EFBFBD><4F>
; <20><>PMIC<49>΍<EFBFBD> OVP<56><50><EFBFBD><EFBFBD>
; line 497 : #endif
; line 498 :
; line 499 : wait_ms( DELAY_PM_TW_PWUP );
$DGL 0,34
call !bs_F0155 ;[INF] 3, 3
; line 500 :
; line 501 : PM_VDD_on( );
$DGL 0,36
movw ax,#0FH ; 15 ;[INF] 3, 1
call !bs_F0150 ;[INF] 3, 3
; line 502 : wait_ms( DELAY_PM_TW_PWUP );
$DGL 0,37
call !bs_F0155 ;[INF] 3, 3
; line 503 :
; line 504 : PM_VDD50A_on( ); // <20>t<EFBFBD><74><EFBFBD>d<EFBFBD><64><EFBFBD>ł͂Ȃ<CD82><C882>Aled<65>Ƃ<EFBFBD><C682>Ɏg<C98E><67><EFBFBD><EFBFBD><EFBFBD>̂ł<CC82>
$DGL 0,39
movw ax,#01FH ; 31 ;[INF] 3, 1
call !bs_F0150 ;[INF] 3, 3
; line 505 :
; line 506 : wait_ms( DELAY_PM_TW_PWUP );
$DGL 0,41
call !bs_F0155 ;[INF] 3, 3
; line 507 :
; line 508 : PM_VDD_normMode();
$DGL 0,43
clrw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#05H ; 5 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
; line 509 : #ifdef _PM_BUG_
; line 510 : iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, 0x
; 03 ); // <20>o<EFBFBD>O<EFBFBD><4F><EFBFBD><EFBFBD>PMIC<49>΍<EFBFBD> <20><><EFBFBD><EFBFBD>PWM
; line 511 : #endif
; line 512 : if( PM_chk_LDSW( ) == 0 )
$DGL 0,47
call !bs_F0147 ;[INF] 3, 3
cmp0 a ;[INF] 1, 1
bnz $?L0071 ;[INF] 2, 4
; line 513 : {
??bb04_PM_sys_pow_on:
; line 514 : return ( ERR_ERR );
$DGL 0,49
onew bc ;[INF] 1, 1
br $?L0066 ;[INF] 2, 3
??eb04_PM_sys_pow_on:
; line 515 : }
?L0071:
; line 516 : FCRAM_RST_neg;
$DGL 0,51
??bb05_PM_sys_pow_on:
set1 P3.0 ;[INF] 3, 2
??eb05_PM_sys_pow_on:
; line 517 : PM_reset_neg();
$DGL 0,52
movw ax,#03H ; 3 ;[INF] 3, 1
push ax ;[INF] 1, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
; line 518 : RESET2_neg;
$DGL 0,53
??bb06_PM_sys_pow_on:
set1 PM0.1 ;[INF] 3, 2
??eb06_PM_sys_pow_on:
; line 519 : /*
; line 520 : wait_ms( 100 );
; line 521 : {
; line 522 : // CODEC <20>s<EFBFBD>背<EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 523 : u8 codec_reg_init[3] = { 0,0,0 };
; line 524 : iic_mcu_write( IIC_SLA_CODEC, CODEC_REG_PM, 3, codec_reg
; _init );
; line 525 : }
; line 526 : */
; line 527 :
; line 528 : #else
; line 529 : // TWL PMIC
; line 530 : u8 temp;
; line 531 :
; line 532 : // <20>d<EFBFBD><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 533 : PM_reset_ast();
; line 534 : RESET2_ast;
; line 535 : FCRAM_RST_ast;
; line 536 :
; line 537 : PM_TEG_PWSW = 1;
; line 538 : wait_ms( 160 );
; line 539 : PM_TEG_PWSW = 0;
; line 540 :
; line 541 :
; line 542 : // <20>c<EFBFBD>ʊm<CA8A>F
; line 543 : temp = 99;
; line 544 : if( temp < 5 )
; line 545 : {
; line 546 : return ( ERR_ERR );
; line 547 : }
; line 548 : vreg_ctr[VREG_C_BT_REMAIN] = temp;
; line 549 : FCRAM_RST_neg;
; line 550 : PM_reset_neg();
; line 551 : RESET2_neg;
; line 552 : wait_ms( 100 );
; line 553 : if( !RESET1_n )
; line 554 : {
; line 555 : // <20>N<EFBFBD><4E><EFBFBD><EFBFBD><EFBFBD>s
; line 556 : PM_reset_ast();
; line 557 : RESET2_ast;
; line 558 : FCRAM_RST_ast;
; line 559 : return ( ERR_ERR );
; line 560 : }
; line 561 : /*
; line 562 : { // CODEC <20>s<EFBFBD>背<EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 563 : u8 codec_reg_init[3] = { 0,0,0 };
; line 564 : iic_mcu_write( IIC_SLA_CODEC, CODEC_REG_PM, 3, codec_reg
; _init );
; line 565 : }
; line 566 : */
; line 567 : #endif
; line 568 :
; line 569 : return ( ERR_SUCCESS );
$DGL 0,104
clrw bc ;[INF] 1, 1
; line 570 : }
?L0066:
$DGL 0,105
??ef_PM_sys_pow_on:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_sys_pow_on:
; line 571 :
; line 572 :
; line 573 :
; line 574 :
; line 575 :
; line 576 :
; line 577 :
; line 578 : /* ========================================================
; line 579 : <20>d<EFBFBD><64>OFF<46>V<EFBFBD>[<5B>P<EFBFBD><50><EFBFBD>X
; line 580 : todo: <20>d<EFBFBD><64><EFBFBD>ُ<EFBFBD><D98F>f<EFBFBD>̏ꍇ
; line 581 : ======================================================== */
; line 582 : err PM_sys_pow_off( )
; line 583 : {
_PM_sys_pow_off:
$DGL 1,322
??bf_PM_sys_pow_off:
; line 584 : #ifdef _PMIC_CTR_
; line 585 : // PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF );
; line 586 : // PM_LCD_off( ); // TCOM,VCS OFF <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD>
; <20>܂<EFBFBD><DC82>B
; line 587 :
; line 588 : PM_reset_ast( );
$DGL 0,6
call !bs_F0148 ;[INF] 3, 3
; line 589 : RESET2_ast;
$DGL 0,7
??bb00_PM_sys_pow_off:
clr1 P0.1 ;[INF] 3, 2
clr1 PM0.1 ;[INF] 3, 2
??eb00_PM_sys_pow_off:
; line 590 : FCRAM_RST_ast;
$DGL 0,8
??bb01_PM_sys_pow_off:
clr1 P3.0 ;[INF] 3, 2
??eb01_PM_sys_pow_off:
; line 591 :
; line 592 : PM_off( );
$DGL 0,10
clrw ax ;[INF] 1, 1
call !bs_F0150 ;[INF] 3, 3
; line 593 :
; line 594 : PM_LDSW_off( );
$DGL 0,12
clrw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#03H ; 3 ;[INF] 2, 1
push ax ;[INF] 1, 1
call !bs_F0154 ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
; line 595 : #else
; line 596 :
; line 597 : if( RESET1_n )
; line 598 : {
; line 599 : PM_reset_ast();
; line 600 : RESET2_ast;
; line 601 : FCRAM_RST_ast;
; line 602 : PM_TEG_PWSW = 1;
; line 603 : wait_ms( 250 );
; line 604 : wait_ms( 250 );
; line 605 : wait_ms( 250 );
; line 606 : PM_TEG_PWSW = 0;
; line 607 : }
; line 608 : PM_reset_ast();
; line 609 : RESET2_ast;
; line 610 : FCRAM_RST_ast;
; line 611 :
; line 612 : #endif
; line 613 : return ( ERR_SUCCESS );
$DGL 0,31
clrw bc ;[INF] 1, 1
; line 614 : }
$DGL 0,32
??ef_PM_sys_pow_off:
ret ;[INF] 1, 6
??ee_PM_sys_pow_off:
; line 615 :
; line 616 :
; line 617 :
; line 618 : /* ========================================================
; line 619 : <20>d<EFBFBD>r<EFBFBD>̊Ǘ<CC8A>
; line 620 :
; line 621 : <20>ȉ<EFBFBD><C889>̃s<CC83><73><EFBFBD>͎<EFBFBD><CD8E>ɂ<EFBFBD><C982><EFBFBD><EFBFBD>ő<EFBFBD><C591><EFBFBD><EFBFBD>E<EFBFBD>Ď<EFBFBD><C48E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
; line 622 : <20>EPM_BT_AUTH <09><><EFBFBD><EFBFBD><EFBFBD>AGPI in
; line 623 : <20>EPM_CHARGE_n CCIC /CHG in
; line 624 : <20>EPM_CHARGE_ERR_n /FLT in
; line 625 : <20>EPM_EXTDC_n /DOK INTP4 in
; line 626 : <20>EPM_CHARGE_EN_n /CEN out
; line 627 :
; line 628 : <20>ȉ<EFBFBD><C889>̕<EFBFBD><CC95>͊֌W<D68C><57><EFBFBD>肻<EFBFBD><E882BB><EFBFBD>ł<EFBFBD><C582><EFBFBD><EFBFBD>ʂ̂Ƃ<CC82><C682><EFBFBD><EFBFBD>Ŏ<EFBFBD><C58E>ɊĎ<C98A><C48E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482>܂<EFBFBD><DC82>B
; line 629 : <20>ELED_Pow R, B, Charge tsk_LED
; line 630 : <20>EBT_TEMP,_P tsk_ADC
; line 631 :
; line 632 : PM_EXTDC<44>͊<EFBFBD><CD8A>荞<EFBFBD>݃<EFBFBD><DD83>C<EFBFBD><43><EFBFBD>ɂ<EFBFBD><C982>邩<EFBFBD><E982A9>
; line 633 : ======================================================== */
; line 634 : #define INTERVAL_TSK_BATT 250
; line 635 :
; line 636 : void tsk_batt( )
; line 637 : {
_tsk_batt:
$DGL 1,336
??bf_tsk_batt:
; line 638 : static u8 task_interval = 0;
; line 639 : static u8 charge_hys = 0; // <20>q<EFBFBD>X<EFBFBD>e<EFBFBD><65><EFBFBD>V<EFBFBD>X<EFBFBD>ŏ<EFBFBD><C58F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD>
; <20><><EFBFBD>Ƃ<EFBFBD><C682>P
; line 640 : static bit pm_extdc_old;
; line 641 :
; line 642 : if( task_interval-- != 0 )
$DGL 0,6
mov a,!?L0077 ; task_interval ;[INF] 3, 1
dec !?L0077 ; task_interval ;[INF] 3, 2
cmp0 a ;[INF] 1, 1
skz ;[INF] 2, 1
br !?L0076 ;[INF] 3, 3
; line 643 : {
??bb00_tsk_batt:
; line 644 : return;
??eb00_tsk_batt:
; line 645 : }
; line 646 : else
; line 647 : {
??bb01_tsk_batt:
; line 648 : task_interval = (u8)( INTERVAL_TSK_BATT / SYS_INTERVAL_T
; ICK );
$DGL 0,12
mov !?L0077,#080H ; task_interval,128 ;[INF] 4, 1
??eb01_tsk_batt:
; line 649 : }
; line 650 :
; line 651 :
; line 652 : // <20>A<EFBFBD>_<EFBFBD>v<EFBFBD>^<5E>H //
; line 653 : if( pm_extdc_old != !PM_EXTDC_n )
$DGL 0,17
mov1 CY,P7.0 ;[INF] 3, 1
onew ax ;[INF] 1, 1
subc x,a ;[INF] 2, 1
movw bc,ax ;[INF] 1, 1
clrw ax ;[INF] 1, 1
mov1 CY,?L0079 ;[INF] 3, 1
addc x,a ;[INF] 2, 1
cmpw ax,bc ;[INF] 1, 1
bz $?L0085 ;[INF] 2, 4
; line 654 : {
??bb02_tsk_batt:
; line 655 : pm_extdc_old = !PM_EXTDC_n;
$DGL 0,19
mov1 CY,P7.0 ;[INF] 3, 1
onew ax ;[INF] 1, 1
subc x,a ;[INF] 2, 1
mov a,x ;[INF] 1, 1
rorc a,1 ;[INF] 2, 1
mov1 ?L0079,CY ;[INF] 3, 2
; line 656 : if( pm_extdc_old )
$DGL 0,20
bf ?L0079,$?L0088 ;[INF] 4, 5
; line 657 : {
??bb03_tsk_batt:
; line 658 : set_bit( 1, vreg_ctr[VREG_C_STATUS], REG_BIT_POW_SUP
; PLY );
$DGL 0,22
??bb04_tsk_batt:
??bb05_tsk_batt:
set1 !_vreg_ctr+15.3 ;[INF] 4, 2
??eb05_tsk_batt:
??bb06_tsk_batt:
??eb06_tsk_batt:
; line 659 : set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_CONNECT );
$DGL 0,23
??eb04_tsk_batt:
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#011H ; 17 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb03_tsk_batt:
; line 660 : }
$DGL 0,24
br $?L0085 ;[INF] 2, 3
; line 661 : else
; line 662 : {
??bb07_tsk_batt:
; line 663 : set_bit( 0, vreg_ctr[VREG_C_STATUS], REG_BIT_POW_SUP
; PLY );
$DGL 0,27
??bb08_tsk_batt:
??bb09_tsk_batt:
??eb09_tsk_batt:
?L0088:
??bb0A_tsk_batt:
clr1 !_vreg_ctr+15.3 ;[INF] 4, 2
??eb0A_tsk_batt:
??eb08_tsk_batt:
; line 664 : set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_DISC );
$DGL 0,28
onew ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#011H ; 17 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb07_tsk_batt:
; line 665 : }
?L0085:
??eb02_tsk_batt:
; line 666 : }
; line 667 :
; line 668 :
; line 669 : // <20>[<5B>d ///////////////////////////
; line 670 : // <20><><EFBFBD>x<EFBFBD>t<EFBFBD><74><EFBFBD>q<EFBFBD>X<EFBFBD>e<EFBFBD><65><EFBFBD>V<EFBFBD>X
; line 671 : if( vreg_ctr[VREG_C_BT_TEMP] < 0x36 )
$DGL 0,35
cmp !_vreg_ctr+10,#036H ; 54 ;[INF] 4, 1
sknc ;[INF] 2, 1
; line 672 : {
??bb0B_tsk_batt:
; line 673 : charge_hys = 1;
$DGL 0,37
oneb !?L0078 ; charge_hys ;[INF] 3, 1
??eb0B_tsk_batt:
; line 674 : }
?L0090:
; line 675 :
; line 676 : if( ( 1 < vreg_ctr[VREG_C_BT_TEMP] )
; line 677 : && ( vreg_ctr[VREG_C_BT_TEMP] < 0x2C ) )
$DGL 0,41
cmp !_vreg_ctr+10,#02H ; 2 ;[INF] 4, 1
bc $?L0092 ;[INF] 2, 4
cmp !_vreg_ctr+10,#02CH ; 44 ;[INF] 4, 1
sknc ;[INF] 2, 1
; line 678 : {
??bb0C_tsk_batt:
; line 679 : charge_hys = 0;
$DGL 0,43
clrb !?L0078 ; charge_hys ;[INF] 3, 1
??eb0C_tsk_batt:
; line 680 : }
?L0092:
; line 681 :
; line 682 : if( ( ( charge_hys == 1 )
; line 683 : && ( 1 < vreg_ctr[VREG_C_BT_TEMP] )
; line 684 : && ( vreg_ctr[VREG_C_BT_TEMP] < 0x2C ) )
; line 685 : ||
$DGL 0,49
cmp !?L0078,#01H ; charge_hys,1 ;[INF] 4, 1
bnz $?L0097 ;[INF] 2, 4
cmp !_vreg_ctr+10,#02H ; 2 ;[INF] 4, 1
bc $?L0097 ;[INF] 2, 4
cmp !_vreg_ctr+10,#02CH ; 44 ;[INF] 4, 1
bc $?L0096 ;[INF] 2, 4
?L0097:
; line 686 : ( ( charge_hys == 0 )
$DGL 0,50
cmp0 !?L0078 ; charge_hys ;[INF] 3, 1
bnz $?L0094 ;[INF] 2, 4
; line 687 : && ( vreg_ctr[VREG_C_BT_TEMP] < 0x36 ) ) )
$DGL 0,51
cmp !_vreg_ctr+10,#036H ; 54 ;[INF] 4, 1
bnc $?L0094 ;[INF] 2, 4
?L0096:
; line 688 : {
??bb0D_tsk_batt:
; line 689 : #ifndef _MODEL_WM0_
; line 690 : BT_CHG_ENABLE(); // <20><><EFBFBD>x<EFBFBD>͈<EFBFBD>OK<4F>ŏ[<5B>d<EFBFBD>ĊJ
$DGL 0,54
clr1 P4.3 ;[INF] 3, 2
??eb0D_tsk_batt:
; line 691 : }
$DGL 0,55
br $?L0095 ;[INF] 2, 3
?L0094:
; line 692 : else
; line 693 : {
??bb0E_tsk_batt:
; line 694 : BT_CHG_DISABLE(); // <20><><EFBFBD>x<EFBFBD>댯<EFBFBD>I<EFBFBD>@<40>[<5B>d<EFBFBD><64><EFBFBD>~
$DGL 0,58
set1 P4.3 ;[INF] 3, 2
??eb0E_tsk_batt:
; line 695 : #endif
; line 696 : }
?L0095:
; line 697 : #ifdef _MODEL_WM0_
; line 698 : // CHG_ENABLE<4C>s<EFBFBD><73><EFBFBD><EFBFBD> /WL_RST <20>ɔz<C994><7A><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>̂<EFBFBD>
; line 699 : #endif
; line 700 :
; line 701 : // <20>[<5B>d //
; line 702 : // <20><><EFBFBD><EFBFBD><EFBFBD>荞<EFBFBD>݁Bmisc<73>̒<EFBFBD><CC92>ł<EFBFBD><C582>낵<EFBFBD><EB82B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>B
; line 703 : set_bit( !BT_CHG_n, vreg_ctr[VREG_C_STATUS], REG_BIT_BATT_CH
; ARGE );
$DGL 0,67
??bb0F_tsk_batt:
bt P5.1,$?L0098 ;[INF] 4, 5
??bb10_tsk_batt:
set1 !_vreg_ctr+15.4 ;[INF] 4, 2
??eb10_tsk_batt:
br $?L0099 ;[INF] 2, 3
?L0098:
??bb11_tsk_batt:
clr1 !_vreg_ctr+15.4 ;[INF] 4, 2
??eb11_tsk_batt:
?L0099:
??eb0F_tsk_batt:
; line 704 : LED_CHARGE = !BT_CHG_n ? 1 : 0;
$DGL 0,68
bt P5.1,$?L0100 ;[INF] 4, 5
onew ax ;[INF] 1, 1
br $?L0101 ;[INF] 2, 3
?L0100:
clrw ax ;[INF] 1, 1
?L0101:
mov a,x ;[INF] 1, 1
rorc a,1 ;[INF] 2, 1
mov1 P2.4,CY ;[INF] 3, 2
; line 705 :
; line 706 :
; line 707 : // <20>d<EFBFBD>r<EFBFBD>c<EFBFBD><63> //
; line 708 : PM_get_batt_left();
$DGL 0,72
call !_PM_get_batt_left ;[INF] 3, 3
; line 709 :
; line 710 : // dubug monitor
; line 711 :
; line 712 : return;
; line 713 : }
?L0076:
$DGL 0,77
??ef_tsk_batt:
ret ;[INF] 1, 6
??ee_tsk_batt:
; line 714 :
; line 715 :
; line 716 :
; line 717 :
; line 718 : /*=========================================================
; line 719 : extDC<44><43><EFBFBD>荞<EFBFBD><E88D9E>
; line 720 : <20>d<EFBFBD><64>OFF<46><46><EFBFBD><EFBFBD><EFBFBD>N<EFBFBD><4E><EFBFBD><EFBFBD><EFBFBD>i<EFBFBD>[<5B>d<EFBFBD>̉<EFBFBD><CC89>x<EFBFBD>Ď<EFBFBD><C48E>̂<EFBFBD><CC82>߁j<DF81>̂<EFBFBD>
; line 721 : <20><><EFBFBD>i<EFBFBD>̓|<7C>[<5B><><EFBFBD><EFBFBD><EFBFBD>O(pm)
; line 722 : =========================================================*/
; line 723 : __interrupt void intp4_extdc( )
; line 724 : {
@@BASE CSEG BASE
_intp4_extdc:
$DGL 1,417
??bf_intp4_extdc:
; line 725 : ;
; line 726 : }
$DGL 0,3
??ef_intp4_extdc:
reti ;[INF] 2, 6
??ee_intp4_extdc:
; line 727 :
; line 728 :
; line 729 :
; line 730 : /*=========================================================
; line 731 : <20>t<EFBFBD>^<5E>J<EFBFBD><4A><EFBFBD>‚ߊ<C282><DF8A>荞<EFBFBD><E88D9E>
; line 732 : <20><><EFBFBD>i<EFBFBD>̓|<7C>[<5B><><EFBFBD>O(misc)
; line 733 : =========================================================*/
; line 734 : __interrupt void intp5_shell( )
; line 735 : {
_intp5_shell:
$DGL 1,423
??bf_intp5_shell:
; line 736 : ;
; line 737 : }
$DGL 0,3
??ef_intp5_shell:
reti ;[INF] 2, 6
??ee_intp5_shell:
; line 738 :
; line 739 :
; line 740 : /*=========================================================
; line 741 : <20><>PMIC<49>ւ̃R<CC83>}<7D><><EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; line 742 : =========================================================*/
; line 743 : __interrupt void intp6_PM_irq( )
; line 744 : {
_intp6_PM_irq:
$DGL 1,429
push ax ;[INF] 1, 1
push bc ;[INF] 1, 1
push de ;[INF] 1, 1
push hl ;[INF] 1, 1
mov c,#0CH ;[INF] 2, 1
dec c ;[INF] 1, 1
dec c ;[INF] 1, 1
movw ax,_@SEGAX[c] ;[INF] 3, 1
push ax ;[INF] 1, 1
bnz $$-6 ;[INF] 2, 4
mov a,ES ;[INF] 2, 1
mov x,a ;[INF] 1, 1
mov a,CS ;[INF] 2, 1
push ax ;[INF] 1, 1
??bf_intp6_PM_irq:
; line 745 : if( system_status.pwr_state == ON )
$DGL 0,2
cmp !_system_status,#03H ; 3 ;[INF] 4, 1
bnz $?L0108 ;[INF] 2, 4
; line 746 : {
??bb00_intp6_PM_irq:
; line 747 : EI();
$DGL 0,4
ei ;[INF] 3, 4
; line 748 : renge_task_immed_add( ntr_pmic_comm );
$DGL 0,5
movw ax,#loww (_ntr_pmic_comm) ;[INF] 3, 1
call !_renge_task_immed_add ;[INF] 3, 3
??eb00_intp6_PM_irq:
; line 749 : }
?L0108:
; line 750 : }
$DGL 0,7
??ef_intp6_PM_irq:
pop ax ;[INF] 1, 1
mov CS,a ;[INF] 2, 1
mov a,x ;[INF] 1, 1
mov ES,a ;[INF] 2, 1
movw de,#_@SEGAX ;[INF] 3, 1
mov c,#06H ;[INF] 2, 1
pop ax ;[INF] 1, 1
movw [de],ax ;[INF] 1, 1
incw de ;[INF] 1, 1
incw de ;[INF] 1, 1
dec c ;[INF] 1, 1
bnz $$-5 ;[INF] 2, 4
pop hl ;[INF] 1, 1
pop de ;[INF] 1, 1
pop bc ;[INF] 1, 1
pop ax ;[INF] 1, 1
reti ;[INF] 2, 6
??ee_intp6_PM_irq:
; line 751 :
; line 752 :
; line 753 :
; line 754 : extern u8 temp_debug_3;
; line 755 :
; line 756 : /* ========================================================
; line 757 : PMIC<49><43><EFBFBD><EFBFBD><EFBFBD>̊<EFBFBD><CC8A>荞<EFBFBD>݂<EFBFBD><DD82>󂯂āANTR PMIC<49>݊<EFBFBD><DD8A><EFBFBD><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD>烊<EFBFBD>[<5B>h
; line 758 : ======================================================== */
; line 759 : task_status_immed ntr_pmic_comm( )
; line 760 : {
ROM_CODE CSEG BASE
_ntr_pmic_comm:
$DGL 1,439
push hl ;[INF] 1, 1
??bf_ntr_pmic_comm:
; line 761 : static u8 reg_shadow;
; line 762 : u8 reg1_old;
; line 763 : u8 irq_work = 0;
$DGL 0,4
mov h,#00H ; 0 ;[INF] 2, 1
; line 764 :
; line 765 : reg1_old = reg_shadow;
$DGL 0,6
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
mov l,a ;[INF] 1, 1
; line 766 : reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_P
; M );
$DGL 0,7
movw ax,#010H ; 16 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#0A4H ; 164 ;[INF] 2, 1
call !_iic_mcu_read_a_byte ;[INF] 3, 3
pop ax ;[INF] 1, 1
mov a,c ;[INF] 1, 1
mov !?L0112,a ; reg_shadow ;[INF] 3, 1
; line 767 : if( iic_mcu_bus_status != ERR_SUCCESS )
$DGL 0,8
cmp0 !_iic_mcu_bus_status ;[INF] 3, 1
bz $?L0113 ;[INF] 2, 4
; line 768 : {
??bb00_ntr_pmic_comm:
; line 769 : return ( ERR_FINISED );
$DGL 0,10
clrw bc ;[INF] 1, 1
br !?L0111 ;[INF] 3, 3
??eb00_ntr_pmic_comm:
; line 770 : }
?L0113:
; line 771 :
; line 772 : DI( );
$DGL 0,13
di ;[INF] 3, 4
; line 773 :
; line 774 : // <20>o<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>C<EFBFBD>g <20><> ////////////////////////////////////
; line 775 : if( ( ( reg1_old ^ reg_shadow ) & REG_BIT_TWL_REQ_BL_U ) !=
; 0 )
$DGL 0,16
mov a,l ;[INF] 1, 1
xor a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#08H ; 8 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0118 ;[INF] 2, 4
; line 776 : {
??bb01_ntr_pmic_comm:
; line 777 : if( ( reg_shadow & REG_BIT_TWL_REQ_BL_U ) == 0 )
; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
$DGL 0,18
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#08H ; 8 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bnz $?L0117 ;[INF] 2, 4
; line 778 : {
??bb02_ntr_pmic_comm:
; line 779 : // irq_work = REG_BIT_TWL_BL_U_OFF;
; line 780 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_BL_U_OFF );
$DGL 0,21
movw ax,#010H ; 16 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb02_ntr_pmic_comm:
; line 781 : }
$DGL 0,22
br $?L0118 ;[INF] 2, 3
?L0117:
; line 782 : else
; line 783 : {
??bb03_ntr_pmic_comm:
; line 784 : // irq_work = REG_BIT_TWL_BL_U_ON;
; line 785 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_BL_U_ON );
$DGL 0,26
movw ax,#020H ; 32 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb03_ntr_pmic_comm:
; line 786 : }
?L0118:
??eb01_ntr_pmic_comm:
; line 787 : }
; line 788 :
; line 789 : // <20>o<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>C<EFBFBD>g <20><>
; line 790 : if( ( ( reg1_old ^ reg_shadow ) & REG_BIT_TWL_REQ_BL_L ) !=
; 0 )
$DGL 0,31
mov a,l ;[INF] 1, 1
xor a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#04H ; 4 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0122 ;[INF] 2, 4
; line 791 : {
??bb04_ntr_pmic_comm:
; line 792 : if( ( reg_shadow & REG_BIT_TWL_REQ_BL_L ) == 0 )
; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
$DGL 0,33
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#04H ; 4 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bnz $?L0121 ;[INF] 2, 4
; line 793 : {
??bb05_ntr_pmic_comm:
; line 794 : // irq_work = REG_BIT_TWL_BL_L_OFF;
; line 795 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_BL_L_OFF );
$DGL 0,36
movw ax,#04H ; 4 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb05_ntr_pmic_comm:
; line 796 : }
$DGL 0,37
br $?L0122 ;[INF] 2, 3
?L0121:
; line 797 : else
; line 798 : {
??bb06_ntr_pmic_comm:
; line 799 : // irq_work = REG_BIT_TWL_BL_L_ON;
; line 800 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_BL_L_ON );
$DGL 0,41
movw ax,#08H ; 8 ;[INF] 3, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb06_ntr_pmic_comm:
; line 801 : }
?L0122:
??eb04_ntr_pmic_comm:
; line 802 : }
; line 803 :
; line 804 : #if 0
; line 805 : irq_work &= ~VREG_C_IRQ_MASK2;
; line 806 : // set_irq <20><><EFBFBD><EFBFBD><EFBFBD>i
; line 807 : if( irq_work != 0 )
; line 808 : {
; line 809 : u8 tot;
; line 810 :
; line 811 : DI();
; line 812 : vreg_ctr[ VREG_C_IRQ2 ] |= irq_work;
; line 813 : EI();
; line 814 : IRQ0_neg; // <20><><EFBFBD>u<EFBFBD>グ<EFBFBD>ăp<C483><70><EFBFBD>X<EFBFBD>𑗂蒼<F0919782><E892BC>
; line 815 : tot = 0;
; line 816 : while( !IRQ0 && ( ++tot != 0 ) ){;} // O.D<>Ȃ̂ł<CC82><C582><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̂<EFBFBD><CC82>҂<EFBFBD> <20><> IRQ_mcu <20><>L<EFBFBD>ɔ<EFBFBD><C994><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482>ƍ<EFBFBD><C68D><EFBFBD>(<28><><EFBFBD>•s<C295><73>)
; line 817 : IRQ0_ast;
; line 818 : }
; line 819 : #endif
; line 820 :
; line 821 : #if 0
; line 822 : // <20>o<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>C<EFBFBD>g<EFBFBD>ݒ<EFBFBD>
; line 823 : // <20><><EFBFBD><EFBFBD><EFBFBD>ɏ<EFBFBD><C98F><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD>
; line 824 : /// <20><><EFBFBD>̂Ƃ<CC82><C682>낳<EFBFBD><EB82B3><EFBFBD>ɍׂ<C98D><D782><EFBFBD><EFBFBD>͕<EFBFBD><CD95><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD>ǁc
; line 825 : if( ( reg_shadow & ( REG_BIT_TWL_REQ_BL_U | REG_BIT_TWL_REQ_
; BL_U ) ) == 0 )
; line 826 : {
; line 827 : vreg_ctr[ VREG_C_COMMAND2 ] = ( REG_BIT_CMD_BL_U_OFF | R
; EG_BIT_CMD_BL_U_OFF );
; line 828 : renge_task_immed_add( tski_PM_BL_set );
; line 829 : }
; line 830 : #endif
; line 831 :
; line 832 : // off<66><66><EFBFBD>N<EFBFBD>G<EFBFBD>X<EFBFBD>g //////////////////////////////////////
; line 833 : if( ( reg_shadow & REG_BIT_TWL_REQ_OFF_REQ ) != 0 )
$DGL 0,74
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#040H ; 64 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0123 ;[INF] 2, 4
; line 834 : {
??bb07_ntr_pmic_comm:
; line 835 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ );
$DGL 0,76
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb07_ntr_pmic_comm:
; line 836 : }
?L0123:
; line 837 :
; line 838 : // <20><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD><67><EFBFBD>N<EFBFBD>G<EFBFBD>X<EFBFBD>g /////////////////////////////////
; line 839 : if( ( reg_shadow & REG_BIT_TWL_REQ_RST_REQ ) != 0 )
$DGL 0,80
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#01H ; 1 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0125 ;[INF] 2, 4
; line 840 : {
??bb08_ntr_pmic_comm:
; line 841 : // CODEC<45>o<EFBFBD>O<EFBFBD><4F><EFBFBD><EFBFBD>
; line 842 : // <20><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD>P<EFBFBD>i<EFBFBD>łȂ<C582><C882><EFBFBD><EFBFBD><EFBFBD><EFBFBD>疳<EFBFBD><E796B3>
; line 843 : // codec <20>C<EFBFBD><43><EFBFBD>ρ<EFBFBD>
; line 844 : // if( ( reg1_old ^ reg_shadow ) == REG_BIT_TWL_REQ_RST_R
; EQ )
; line 845 : {
??bb09_ntr_pmic_comm:
; line 846 : set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ );
$DGL 0,87
onew ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
call !_set_irq ;[INF] 3, 3
pop ax ;[INF] 1, 1
??eb09_ntr_pmic_comm:
; line 847 : }
??eb08_ntr_pmic_comm:
; line 848 : }
?L0125:
; line 849 :
; line 850 : // <20>o<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD>}<7D>X<EFBFBD>N<EFBFBD><4E><EFBFBD>ď<EFBFBD><C48F><EFBFBD><EFBFBD>߂<EFBFBD>
; line 851 : EI( );
$DGL 0,92
ei ;[INF] 3, 4
; line 852 : if( ( reg_shadow & ( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_R
; EQ_RST_REQ )) != 0 )
$DGL 0,93
mov a,!?L0112 ; reg_shadow ;[INF] 3, 1
and a,#041H ; 65 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bz $?L0127 ;[INF] 2, 4
; line 853 : {
??bb0A_ntr_pmic_comm:
; line 854 : reg_shadow &= ~( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_R
; EQ_RST_REQ );
$DGL 0,95
movw de,#loww (?L0112) ; reg_shadow ;[INF] 3, 1
mov a,[de] ;[INF] 1, 1
and a,#0BEH ; 190 ;[INF] 2, 1
mov [de],a ;[INF] 1, 1
; line 855 : iic_mcu_write_a_byte( IIC_SLA_CODEC, CODEC_REG_PM, reg_s
; hadow );
$DGL 0,96
mov x,!?L0112 ; reg_shadow ;[INF] 3, 1
clrb a ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#010H ; 16 ;[INF] 2, 1
push ax ;[INF] 1, 1
mov x,#0A4H ; 164 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
??eb0A_ntr_pmic_comm:
; line 856 : }
?L0127:
; line 857 : return ( ERR_FINISED );
$DGL 0,98
clrw bc ;[INF] 1, 1
; line 858 : }
?L0111:
$DGL 0,99
??ef_ntr_pmic_comm:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_ntr_pmic_comm:
; line 859 :
; line 860 :
; line 861 :
; line 862 : /**********************************************************
; line 863 : <20>d<EFBFBD>r<EFBFBD>c<EFBFBD><63>IC<49><43><EFBFBD><EFBFBD><EFBFBD>c<EFBFBD>ʂ<EFBFBD><CA82>擾<EFBFBD><E693BE><EFBFBD>A<EFBFBD><41><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>ɏ<EFBFBD><C98F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ށB
; line 864 : <20>@<40>d<EFBFBD>r<EFBFBD>c<EFBFBD><63>IC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>E<EFBFBD>̏<EFBFBD><CC8F>Ȃǂ̎<C782><CC8E>͂Ƃ肠<C682><E882A0><EFBFBD><EFBFBD><EFBFBD>c<EFBFBD><63>99%<25>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD>B
; line 865 : <20>@<40>@<40>@<40>@<40>@<40>@<40>@<40>@<40><><EFBFBD><EFBFBD> status_1<5F>Ŋm<C58A>F<EFBFBD>”\<5C>B<EFBFBD>d<EFBFBD><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƀ`<60>F<EFBFBD>b<EFBFBD>N<EFBFBD><4E>
; <20>Ă<EFBFBD><C482>܂<EFBFBD><DC82>B
; line 866 : <20>@PM_init()<29><><EFBFBD><EFBFBD><EFBFBD>s<EFBFBD><73><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD>K<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
; line 867 : **********************************************************/
; line 868 : static void PM_get_batt_left(){
_PM_get_batt_left:
$DGL 1,492
push hl ;[INF] 1, 1
push ax ;[INF] 1, 1
movw hl,sp ;[INF] 3, 1
??bf_PM_get_batt_left:
; line 869 : if(( vreg_ctr[ VREG_C_STATUS_1 ] & REG_BIT_GASGAUGE_ERR ) ==
; 0 )
$DGL 0,2
mov a,!_vreg_ctr+14 ;[INF] 3, 1
and a,#01H ; 1 ;[INF] 2, 1
cmp0 a ;[INF] 1, 1
bnz $?L0131 ;[INF] 2, 4
; line 870 : {
??bb00_PM_get_batt_left:
; line 871 : // <20>d<EFBFBD>r<EFBFBD>c<EFBFBD>ʂ̎擾
; line 872 : {
??bb01_PM_get_batt_left:
; line 873 : u8 temp[2];
; line 874 :
; line 875 : iic_mcu_read( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC, 2,
; temp );
$DGL 0,8
movw ax,hl ;[INF] 1, 1
push ax ;[INF] 1, 1
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#06CH ; 108 ;[INF] 2, 1
call !_iic_mcu_read ;[INF] 3, 3
addw sp,#06H ; 6 ;[INF] 2, 1
; line 876 :
; line 877 : vreg_ctr[ VREG_C_BT_REMAIN ] = temp[0];
$DGL 0,10
mov a,[hl] ; temp ;[INF] 1, 1
mov !_vreg_ctr+11,a ;[INF] 3, 1
; line 878 : vreg_ctr[ VREG_C_BT_REMAIN_FINE ] = temp[1];
$DGL 0,11
mov a,[hl+1] ; temp ;[INF] 2, 1
mov !_vreg_ctr+12,a ;[INF] 3, 1
??eb01_PM_get_batt_left:
; line 879 : // todo 臒l<E88792>𒴂<EFBFBD><F092B482><EFBFBD><EFBFBD>犄<EFBFBD>荞<EFBFBD><E88D9E>
; line 880 : }
; line 881 :
; line 882 : vreg_ctr[ VREG_C_BT_VOLTAGE ] = iic_mcu_read_a_byte( IIC
; _SLA_BT_GAUGE, BT_GAUGE_REG_VCELL );
$DGL 0,15
onew ax ;[INF] 1, 1
incw ax ;[INF] 1, 1
call !bs_F0151 ;[INF] 3, 3
mov !_vreg_ctr+13,a ;[INF] 3, 1
??eb00_PM_get_batt_left:
; line 883 : }
$DGL 0,16
br $?L0132 ;[INF] 2, 3
?L0131:
; line 884 : else
; line 885 : {
??bb02_PM_get_batt_left:
; line 886 : vreg_ctr[ VREG_C_BT_REMAIN ] = 99;
$DGL 0,19
mov !_vreg_ctr+11,#063H ; 99 ;[INF] 4, 1
??eb02_PM_get_batt_left:
; line 887 : }
?L0132:
; line 888 :
; line 889 : // PMIC-NTR<54>ɓd<C993>r<EFBFBD>c<EFBFBD>ʂ<EFBFBD><CA82><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD><EFBFBD>
; line 890 : iic_mcu_write_a_byte( IIC_SLA_CODEC, CODEC_REG_BT,
; line 891 : ( vreg_ctr[ VREG_C_BT_REMAIN ] < 5 )?
; 1 : 0 ); // 1<>œd<C593>r<EFBFBD>؂<EFBFBD>
$DGL 0,24
cmp !_vreg_ctr+11,#05H ; 5 ;[INF] 4, 1
bnc $?L0133 ;[INF] 2, 4
onew ax ;[INF] 1, 1
br $?L0134 ;[INF] 2, 3
?L0133:
clrw ax ;[INF] 1, 1
?L0134:
clrb a ;[INF] 1, 1
push ax ;[INF] 1, 1
mov x,#012H ; 18 ;[INF] 2, 1
push ax ;[INF] 1, 1
mov x,#0A4H ; 164 ;[INF] 2, 1
call !_iic_mcu_write_a_byte ;[INF] 3, 3
addw sp,#04H ; 4 ;[INF] 2, 1
; line 892 :
; line 893 : }
$DGL 0,26
??ef_PM_get_batt_left:
pop ax ;[INF] 1, 1
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_PM_get_batt_left:
; line 894 :
; line 895 :
; line 896 :
; line 897 :
; line 898 :
; line 899 : /**********************************************************
; line 900 : command2 <20>t<EFBFBD><74><EFBFBD>n
; line 901 : <20>@ <20><><EFBFBD>b<EFBFBD>p<EFBFBD>[<5B>I<EFBFBD>ȕ<EFBFBD><C895>BERR_SUCCESS<53><53><EFBFBD><EFBFBD><EFBFBD>Ԃ<EFBFBD><D482>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD>c
; line 902 : **********************************************************/
; line 903 : task_status_immed tski_PM_LCD_on()
; line 904 : {
_tski_PM_LCD_on:
$DGL 1,512
??bf_tski_PM_LCD_on:
; line 905 : PM_LCD_on();
$DGL 0,2
call !_PM_LCD_on ;[INF] 3, 3
; line 906 : return( ERR_SUCCESS );
$DGL 0,3
clrw bc ;[INF] 1, 1
; line 907 : }
$DGL 0,4
??ef_tski_PM_LCD_on:
ret ;[INF] 1, 6
??ee_tski_PM_LCD_on:
; line 908 :
; line 909 : task_status_immed tski_PM_LCD_off()
; line 910 : {
_tski_PM_LCD_off:
$DGL 1,518
??bf_tski_PM_LCD_off:
; line 911 : PM_LCD_off();
$DGL 0,2
call !_PM_LCD_off ;[INF] 3, 3
; line 912 : return( ERR_SUCCESS );
$DGL 0,3
clrw bc ;[INF] 1, 1
; line 913 : }
$DGL 0,4
??ef_tski_PM_LCD_off:
ret ;[INF] 1, 6
??ee_tski_PM_LCD_off:
; line 914 :
; line 915 : task_status_immed tski_PM_BL_set()
; line 916 : {
_tski_PM_BL_set:
$DGL 1,524
push hl ;[INF] 1, 1
??bf_tski_PM_BL_set:
; line 917 : u8 cmd_BL; // <20><>volatile<6C>Ƃ<EFBFBD><C682>t<EFBFBD><74><EFBFBD>Ȃ<EFBFBD><C882>Ă<EFBFBD><C482><EFBFBD><EFBFBD><EFBFBD>
; <20>v<EFBFBD>݂<EFBFBD><DD82><EFBFBD>
; line 918 :
; line 919 : do
?L0141:
; line 920 : {
??bb00_tski_PM_BL_set:
; line 921 : cmd_BL = vreg_ctr[VREG_C_COMMAND2];
$DGL 0,6
mov a,!_vreg_ctr+34 ;[INF] 3, 1
mov l,a ;[INF] 1, 1
; line 922 : PM_BL_set( cmd_BL ); // <20>}<7D>X<EFBFBD>N<EFBFBD>ς<EFBFBD>
$DGL 0,7
movw ax,hl ;[INF] 1, 1
clrb a ;[INF] 1, 1
call !_PM_BL_set ;[INF] 3, 3
??eb00_tski_PM_BL_set:
; line 923 : }
; line 924 : while( cmd_BL != vreg_ctr[VREG_C_COMMAND2] );
$DGL 0,9
mov a,l ;[INF] 1, 1
cmp a,!_vreg_ctr+34 ;[INF] 3, 1
bnz $?L0141 ;[INF] 2, 4
; line 925 : vreg_ctr[VREG_C_COMMAND2] = 0;
$DGL 0,10
clrb !_vreg_ctr+34 ;[INF] 3, 1
; line 926 :
; line 927 : return( ERR_SUCCESS );
$DGL 0,12
clrw bc ;[INF] 1, 1
; line 928 : }
$DGL 0,13
??ef_tski_PM_BL_set:
pop hl ;[INF] 1, 1
ret ;[INF] 1, 6
??ee_tski_PM_BL_set:
@@CODEL CSEG
END
; *** Code Information ***
;
; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\pm.c
;
; $FUNC PM_init(46)
; void=(void)
; CODE SIZE= 335 bytes, CLOCK_SIZE= 294 clocks, STACK_SIZE= 20 bytes
;
; $CALL wait_ms(58)
; void=(int:ax)
;
; $CALL iic_mcu_write(62)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_write(66)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_write(75)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_read(78)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_write(82)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_write(86)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL get_adc(90)
; bc=(int:ax)
;
; $CALL iic_mcu_write(104)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL wait_ms(112)
; void=(int:ax)
;
; $CALL iic_mcu_write(116)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL wait_ms(119)
; void=(int:ax)
;
; $CALL iic_mcu_read_a_byte(122)
; bc=(int:ax, int:[sp+4])
;
; $CALL iic_mcu_write(131)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_write(135)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL get_adc(142)
; bc=(int:ax)
;
; $CALL renge_task_immed_add(143)
; bc=(pointer:ax)
;
; $FUNC PM_bt_temp_update(163)
; bc=(void)
; CODE SIZE= 217 bytes, CLOCK_SIZE= 196 clocks, STACK_SIZE= 14 bytes
;
; $CALL iic_mcu_write(201)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $FUNC PM_LCD_on(227)
; bc=(void)
; CODE SIZE= 59 bytes, CLOCK_SIZE= 114 clocks, STACK_SIZE= 14 bytes
;
; $CALL iic_mcu_write_a_byte(230)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(232)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(234)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(236)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(238)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(240)
; void=(int:ax)
;
; $CALL iic_mcu_read_a_byte(245)
; bc=(int:ax, int:[sp+4])
;
; $CALL set_irq(251)
; void=(int:ax, int:[sp+4])
;
; $FUNC PM_LCD_off(265)
; void=(void)
; CODE SIZE= 96 bytes, CLOCK_SIZE= 139 clocks, STACK_SIZE= 14 bytes
;
; $CALL iic_mcu_read_a_byte(272)
; bc=(int:ax, int:[sp+4])
;
; $CALL PM_BL_set(277)
; bc=(int:ax)
;
; $CALL iic_mcu_write_a_byte(296)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(297)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(299)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL set_irq(303)
; void=(int:ax, int:[sp+4])
;
; $FUNC PM_BL_set(314)
; bc=(unsigned char dat:x)
; CODE SIZE= 202 bytes, CLOCK_SIZE= 176 clocks, STACK_SIZE= 18 bytes
;
; $CALL iic_mcu_read_a_byte(323)
; bc=(int:ax, int:[sp+4])
;
; $CALL wait_ms(381)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(383)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC PM_LCD_vcom_set(395)
; bc=(void)
; CODE SIZE= 37 bytes, CLOCK_SIZE= 41 clocks, STACK_SIZE= 10 bytes
;
; $CALL iic_mcu_write_a_byte(398)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL iic_mcu_write_a_byte(399)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC tski_vcom_set(450)
; bc=(void)
; CODE SIZE= 5 bytes, CLOCK_SIZE= 10 clocks, STACK_SIZE= 4 bytes
;
; $CALL PM_LCD_vcom_set(451)
; bc=(void)
;
; $FUNC PM_sys_pow_on(466)
; bc=(void)
; CODE SIZE= 115 bytes, CLOCK_SIZE= 182 clocks, STACK_SIZE= 14 bytes
;
; $CALL get_adc(475)
; bc=(int:ax)
;
; $CALL PM_bt_temp_update(477)
; bc=(void)
;
; $CALL PM_get_batt_left(480)
; void=(void)
;
; $CALL iic_mcu_write_a_byte(492)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(494)
; void=(int:ax)
;
; $CALL wait_ms(499)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(501)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(502)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(504)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL wait_ms(506)
; void=(int:ax)
;
; $CALL iic_mcu_write_a_byte(508)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL iic_mcu_read_a_byte(512)
; bc=(int:ax, int:[sp+4])
;
; $CALL iic_mcu_write_a_byte(517)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC PM_sys_pow_off(583)
; bc=(void)
; CODE SIZE= 28 bytes, CLOCK_SIZE= 62 clocks, STACK_SIZE= 12 bytes
;
; $CALL iic_mcu_write_a_byte(588)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL iic_mcu_write_a_byte(592)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL iic_mcu_write_a_byte(594)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC tsk_batt(637)
; void=(void)
; CODE SIZE= 168 bytes, CLOCK_SIZE= 133 clocks, STACK_SIZE= 6 bytes
;
; $CALL set_irq(659)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(664)
; void=(int:ax, int:[sp+4])
;
; $CALL PM_get_batt_left(708)
; void=(void)
;
; $FUNC intp4_extdc(724)
; void=(void)
; CODE SIZE= 2 bytes, CLOCK_SIZE= 6 clocks, STACK_SIZE= 0 bytes
;
; $FUNC intp5_shell(735)
; void=(void)
; CODE SIZE= 2 bytes, CLOCK_SIZE= 6 clocks, STACK_SIZE= 0 bytes
;
; $FUNC intp6_PM_irq(744)
; void=(void)
; CODE SIZE= 59 bytes, CLOCK_SIZE= 55 clocks, STACK_SIZE= 26 bytes
;
; $CALL renge_task_immed_add(748)
; bc=(pointer:ax)
;
; $FUNC ntr_pmic_comm(760)
; bc=(void)
; CODE SIZE= 180 bytes, CLOCK_SIZE= 152 clocks, STACK_SIZE= 10 bytes
;
; $CALL iic_mcu_read_a_byte(766)
; bc=(int:ax, int:[sp+4])
;
; $CALL set_irq(780)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(785)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(795)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(800)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(835)
; void=(int:ax, int:[sp+4])
;
; $CALL set_irq(846)
; void=(int:ax, int:[sp+4])
;
; $CALL iic_mcu_write_a_byte(855)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC PM_get_batt_left(868)
; void=(void)
; CODE SIZE= 76 bytes, CLOCK_SIZE= 77 clocks, STACK_SIZE= 14 bytes
;
; $CALL iic_mcu_read(875)
; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])
;
; $CALL iic_mcu_read_a_byte(882)
; bc=(int:ax, int:[sp+4])
;
; $CALL iic_mcu_write_a_byte(891)
; bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC tski_PM_LCD_on(904)
; bc=(void)
; CODE SIZE= 5 bytes, CLOCK_SIZE= 10 clocks, STACK_SIZE= 4 bytes
;
; $CALL PM_LCD_on(905)
; bc=(void)
;
; $FUNC tski_PM_LCD_off(910)
; bc=(void)
; CODE SIZE= 5 bytes, CLOCK_SIZE= 10 clocks, STACK_SIZE= 4 bytes
;
; $CALL PM_LCD_off(911)
; void=(void)
;
; $FUNC tski_PM_BL_set(916)
; bc=(void)
; CODE SIZE= 22 bytes, CLOCK_SIZE= 23 clocks, STACK_SIZE= 6 bytes
;
; $CALL PM_BL_set(922)
; bc=(int:ax)
; Target chip : uPD79F0104
; Device file : E1.00b
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