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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
797 lines
58 KiB
Plaintext
797 lines
58 KiB
Plaintext
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78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1
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Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\i2c_twl.asm
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Para-file:
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In-file: inter_asm\i2c_twl.asm
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Obj-file: i2c_twl.rel
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Prn-file: i2c_twl.prn
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Assemble list
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ALNO STNO ADRS OBJECT M I SOURCE STATEMENT
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1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:24
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2 2
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3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
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4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
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5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no i2c_twl.c
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6 6 ; In-file : i2c_twl.c
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7 7 ; Asm-file : inter_asm\i2c_twl.asm
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8 8 ; Para-file :
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9 9
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10 10 $PROCESSOR(9F0104)
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11 11 $DEBUG
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12 12 $NODEBUGA
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13 13 $KANJICODE SJIS
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14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H
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15 15
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16 16 $DGS FIL_NAM, .file, 06FH, 0FFFEH, 03FH, 067H, 01H, 00H
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17 17 $DGS AUX_FIL, i2c_twl.c
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18 18 $DGS MOD_NAM, i2c_twl, 00H, 0FFFEH, 00H, 077H, 00H, 00H
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19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
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20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
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21 21 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
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22 22 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
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23 23 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
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24 24 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
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25 25 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
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26 26 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
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27 27 $DGS SEC_NAM, @@CNSTL, U, U, 00H, 078H, 00H, 00H
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28 28 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
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29 29 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
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30 30 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
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31 31 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
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32 32 $DGS SEC_NAM, ROM_CODE, U, U, 00H, 078H, 00H, 00H
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33 33 $DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H
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34 34 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
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35 35 $DGS STA_SYM, _lpf_coeff, U, U, 05002H, 03H, 01H, 03H
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36 36 $DGS AUX_STR, 00H, 00H, 02FH, 02FH, 00H, 00H, 00H, 00H
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37 37 $DGS GLV_SYM, _int_iic_twl, U, U, 0E001H, 026H, 01H, 02H
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38 38 $DGS AUX_FUN, 00H, U, U, 063H, 00H, 00H
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39 39 $DGS BEG_FUN, ??bf_int_iic_twl, U, U, 00H, 065H, 01H, 00H
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40 40 $DGS AUX_BEG, 052H, 01CH, 01BH
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41 41 $DGS AUT_VAR, _temp, 05H, 0FFFFH, 0CH, 01H, 00H, 00H
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42 42 $DGS AUT_VAR, _tot, 02H, 0FFFFH, 0DH, 01H, 00H, 00H
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43 43 $DGS BEG_BLK, ??bb00_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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44 44 $DGS AUX_BEG, 011H, 00H, 01DH
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45 45 $DGS BEG_BLK, ??bb01_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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46 46 $DGS AUX_BEG, 011H, 00H, 01FH
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47 47 $DGS BEG_BLK, ??bb02_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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48 48 $DGS AUX_BEG, 011H, 00H, 023H
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49 49 $DGS END_BLK, ??eb02_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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50 50 $DGS AUX_END, 011H
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51 51 $DGS BEG_BLK, ??bb03_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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52 52 $DGS AUX_BEG, 011H, 00H, 02BH
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53 53 $DGS END_BLK, ??eb03_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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54 54 $DGS AUX_END, 011H
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55 55 $DGS END_BLK, ??eb01_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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56 56 $DGS AUX_END, 011H
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57 57 $DGS END_BLK, ??eb00_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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58 58 $DGS AUX_END, 011H
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59 59 $DGS BEG_BLK, ??bb04_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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60 60 $DGS AUX_BEG, 01EH, 00H, 02FH
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61 61 $DGS AUT_VAR, _my_iics, 01H, 0FFFFH, 0CH, 01H, 01H, 00H
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62 62 $DGS AUX_STR, 00H, 01FH, 01H, 00H, 00H, 00H, 00H, 00H
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63 63 $DGS BEG_BLK, ??bb05_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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64 64 $DGS AUX_BEG, 022H, 00H, 033H
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65 65 $DGS END_BLK, ??eb05_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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66 66 $DGS AUX_END, 025H
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67 67 $DGS BEG_BLK, ??bb06_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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68 68 $DGS AUX_BEG, 027H, 00H, 035H
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69 69 $DGS BEG_BLK, ??bb07_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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70 70 $DGS AUX_BEG, 02CH, 00H, 037H
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71 71 $DGS BEG_BLK, ??bb08_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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72 72 $DGS AUX_BEG, 02CH, 00H, 039H
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73 73 $DGS BEG_BLK, ??bb09_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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74 74 $DGS AUX_BEG, 02CH, 00H, 03DH
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75 75 $DGS END_BLK, ??eb09_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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76 76 $DGS AUX_END, 02CH
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77 77 $DGS BEG_BLK, ??bb0A_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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78 78 $DGS AUX_BEG, 02CH, 00H, 045H
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79 79 $DGS END_BLK, ??eb0A_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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80 80 $DGS AUX_END, 02CH
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81 81 $DGS END_BLK, ??eb08_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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82 82 $DGS AUX_END, 02CH
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83 83 $DGS END_BLK, ??eb07_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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84 84 $DGS AUX_END, 02CH
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85 85 $DGS BEG_BLK, ??bb0B_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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86 86 $DGS AUX_BEG, 02FH, 00H, 049H
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87 87 $DGS END_BLK, ??eb0B_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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88 88 $DGS AUX_END, 032H
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89 89 $DGS BEG_BLK, ??bb0C_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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90 90 $DGS AUX_BEG, 035H, 00H, 04BH
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91 91 $DGS BEG_BLK, ??bb0D_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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92 92 $DGS AUX_BEG, 035H, 00H, 04DH
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93 93 $DGS BEG_BLK, ??bb0E_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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94 94 $DGS AUX_BEG, 035H, 00H, 051H
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95 95 $DGS END_BLK, ??eb0E_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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96 96 $DGS AUX_END, 035H
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97 97 $DGS BEG_BLK, ??bb0F_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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98 98 $DGS AUX_BEG, 035H, 00H, 05BH
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99 99 $DGS END_BLK, ??eb0F_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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100 100 $DGS AUX_END, 035H
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101 101 $DGS END_BLK, ??eb0D_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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102 102 $DGS AUX_END, 035H
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103 103 $DGS END_BLK, ??eb0C_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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104 104 $DGS AUX_END, 035H
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105 105 $DGS END_BLK, ??eb06_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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106 106 $DGS AUX_END, 03AH
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107 107 $DGS BEG_BLK, ??bb10_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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108 108 $DGS AUX_BEG, 03CH, 00H, 00H
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109 109 $DGS END_BLK, ??eb10_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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110 110 $DGS AUX_END, 046H
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111 111 $DGS END_BLK, ??eb04_int_iic_twl, U, U, 00H, 064H, 01H, 00H
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112 112 $DGS AUX_END, 047H
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113 113 $DGS END_FUN, ??ef_int_iic_twl, U, U, 00H, 065H, 01H, 00H
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114 114 $DGS AUX_END, 048H
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115 115 $DGS GLV_SYM, _IIC_twl_Init, U, U, 01H, 026H, 01H, 02H
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116 116 $DGS AUX_FUN, 00H, U, U, 069H, 00H, 00H
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117 117 $DGS BEG_FUN, ??bf_IIC_twl_Init, U, U, 00H, 065H, 01H, 00H
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118 118 $DGS AUX_BEG, 09FH, 00H, 069H
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119 119 $DGS END_FUN, ??ef_IIC_twl_Init, U, U, 00H, 065H, 01H, 00H
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120 120 $DGS AUX_END, 024H
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121 121 $DGS GLV_SYM, _IIC_twl_Stop, U, U, 01H, 026H, 01H, 02H
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122 122 $DGS AUX_FUN, 00H, U, U, 06FH, 00H, 00H
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123 123 $DGS BEG_FUN, ??bf_IIC_twl_Stop, U, U, 00H, 065H, 01H, 00H
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124 124 $DGS AUX_BEG, 0C8H, 00H, 06FH
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125 125 $DGS END_FUN, ??ef_IIC_twl_Stop, U, U, 00H, 065H, 01H, 00H
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126 126 $DGS AUX_END, 04H
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127 127 $DGS GLV_SYM, _vreg_adrs, U, U, 0CH, 026H, 00H, 00H
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128 128 $DGS GLV_SYM, _pre_dat, U, U, 0CH, 026H, 00H, 00H
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129 129 $DGS GLV_SYM, _tot, U, U, 0DH, 026H, 00H, 00H
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130 130 $DGS GLV_SYM, _@SEGAX, U, U, 00H, 02H, 00H, 00H
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131 131 $DGS GLV_SYM, _adrs_table_twl_ext2int, U, U, 0CH, 02H, 01H, 02H
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132 132 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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133 133 $DGS GLV_SYM, _vreg_twl_read, U, U, 0CH, 02H, 01H, 02H
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134 134 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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135 135 $DGS GLV_SYM, _vreg_twl_write, U, U, 01H, 02H, 01H, 02H
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136 136 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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137 137 $DGS GLV_SYM, _@SEGDE, U, U, 00H, 02H, 00H, 00H
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138 138 $DGS GLV_SYM, _@RTARG0, U, U, 00H, 02H, 00H, 00H
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139 139
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140 140 EXTRN _@SEGAX
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141 141 EXTRN _@SEGDE
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142 142 EXTRN _@RTARG0
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143 143 EXTRN _adrs_table_twl_ext2int
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144 144 EXTRN _vreg_twl_read
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145 145 EXTRN _vreg_twl_write
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146 146 PUBLIC _vreg_adrs
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147 147 PUBLIC _pre_dat
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148 148 PUBLIC _tot
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149 149 PUBLIC _int_iic_twl
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150 150 PUBLIC _IIC_twl_Init
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151 151 PUBLIC _IIC_twl_Stop
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152 152
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153 153 ----- @@BITS BSEG
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154 154
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155 155 ----- @@CNST CSEG MIRRORP
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156 156 00000 01 _lpf_coeff: DB 01H ; 1
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157 157 00001 02 DB 02H ; 2
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158 158 00002 02 DB 02H ; 2
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159 159 00003 03 DB 03H ; 3
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160 160 00004 03 DB 03H ; 3
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161 161 00005 02 DB 02H ; 2
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162 162 00006 00 DB 00H ; 0
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163 163 00007 FE DB 0FEH ; 254
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164 164 00008 FB DB 0FBH ; 251
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165 165 00009 F7 DB 0F7H ; 247
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166 166 0000A F3 DB 0F3H ; 243
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167 167 0000B F0 DB 0F0H ; 240
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168 168 0000C F0 DB 0F0H ; 240
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169 169 0000D F3 DB 0F3H ; 243
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170 170 0000E FA DB 0FAH ; 250
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171 171 0000F 04 DB 04H ; 4
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172 172 00010 12 DB 012H ; 18
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173 173 00011 25 DB 025H ; 37
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174 174 00012 38 DB 038H ; 56
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175 175 00013 4D DB 04DH ; 77
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176 176 00014 5F DB 05FH ; 95
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177 177 00015 6E DB 06EH ; 110
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178 178 00016 77 DB 077H ; 119
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179 179 00017 7A DB 07AH ; 122
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180 180 00018 77 DB 077H ; 119
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181 181 00019 6E DB 06EH ; 110
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182 182 0001A 5F DB 05FH ; 95
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183 183 0001B 4D DB 04DH ; 77
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184 184 0001C 38 DB 038H ; 56
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185 185 0001D 25 DB 025H ; 37
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186 186 0001E 12 DB 012H ; 18
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187 187 0001F 04 DB 04H ; 4
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188 188 00020 FA DB 0FAH ; 250
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189 189 00021 F3 DB 0F3H ; 243
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190 190 00022 F0 DB 0F0H ; 240
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191 191 00023 F0 DB 0F0H ; 240
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192 192 00024 F3 DB 0F3H ; 243
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193 193 00025 F7 DB 0F7H ; 247
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194 194 00026 FB DB 0FBH ; 251
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195 195 00027 FE DB 0FEH ; 254
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196 196 00028 00 DB 00H ; 0
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197 197 00029 02 DB 02H ; 2
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198 198 0002A 03 DB 03H ; 3
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199 199 0002B 03 DB 03H ; 3
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200 200 0002C 02 DB 02H ; 2
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201 201 0002D 02 DB 02H ; 2
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202 202 0002E 01 DB 01H ; 1
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203 203 0002F 00 DB (1)
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204 204
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205 205 ----- @@R_INIT CSEG UNIT64KP
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206 206
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207 207 ----- @@INIT DSEG BASEP
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208 208
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209 209 ----- @@DATA DSEG BASEP
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210 210 00000 _vreg_adrs: DS (1)
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211 211 00001 _pre_dat: DS (1)
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212 212 00002 _tot: DS (2)
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213 213
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214 214 ----- @@R_INIS CSEG UNIT64KP
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215 215
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216 216 ----- @@INIS DSEG SADDRP
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217 217
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218 218 ----- @@DATS DSEG SADDRP
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219 219
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220 220 ----- @@CNSTL CSEG PAGE64KP
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221 221
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222 222 ----- @@RLINIT CSEG UNIT64KP
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223 223
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224 224 ----- @@INITL DSEG UNIT64KP
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225 225
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226 226 ----- @@DATAL DSEG UNIT64KP
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227 227
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228 228 ----- @@CALT CSEG CALLT0
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229 229
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230 230 ; line 1 : #pragma sfr /* <20><><EFBFBD><EFBFBD><EFBFBD>@<40>\<5C><><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>g<EFBFBD>p */
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231 231 ; line 2 :
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232 232 ; line 3 :
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233 233 ; line 4 :
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234 234 ; line 5 : /*==============================================================
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235 235 ; ==============*/
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236 236 ; line 6 : #include "incs.h"
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237 237 ; line 7 : #include "i2c_twl_defs.h"
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238 238 ; line 8 :
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239 239 ; line 9 :
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240 240 ; line 10 : extern u8 vreg_twl[];
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241 241 ; line 11 :
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242 242 ; line 12 : #ifdef _MCU_BSR_
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243 243 ; line 13 : //#ifdef _MODEL_TS0_ || _MODEL_WM0_
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244 244 ; line 14 :
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245 245 ; line 15 : // <20><><EFBFBD>[<5B>L<EFBFBD><4C><EFBFBD>O<EFBFBD><4F><EFBFBD>f<EFBFBD><66><EFBFBD><EFBFBD>I2C<32><43><EFBFBD>t
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246 246 ; line 16 : #define ACKD ACKD0
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247 247 ; line 17 : #define ACKE ACKE0
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248 248 ; line 18 : #define COI COI0
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249 249 ; line 19 : #define IICAEN IICA0EN
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250 250 ; line 20 : #define IICRSV IICRSV0
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251 251 ; line 21 : #define IICA IICA0
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252 252 ; line 22 : #define IICAIF IICAIF0
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253 253 ; line 23 : #define IICAMK IICAMK0
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254 254 ; line 24 : #define IICAPR0 IICAPR00
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255 255 ; line 25 : #define IICAPR1 IICAPR10
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256 256 ; line 26 : #define IICCTL0 IICCTL00
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257 257 ; line 27 : #define IICE IICE0
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258 258 ; line 28 : #define IICF IICF0
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259 259 ; line 29 : #define IICS IICS0
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260 260 ; line 30 : #define IICWH IICWH0
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261 261 ; line 31 : #define IICWL IICWL0
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262 262 ; line 32 : #define LREL LREL0
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263 263 ; line 33 : #define SPD SPD0
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264 264 ; line 34 : #define SPIE SPIE0
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265 265 ; line 35 : #define STCEN STCEN0
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266 266 ; line 36 : #define STD STD0
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267 267 ; line 37 : #define SVA SVA0
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268 268 ; line 38 : #define WREL WREL0
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269 269 ; line 39 : #define WTIM WTIM0
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270 270 ; line 40 : #define SMC SMC0
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271 271 ; line 41 :
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272 272 ; line 42 : #endif
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273 273 ; line 43 :
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274 274 ; line 44 : #ifndef _MCU_BSR_
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275 275 ; line 45 :
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276 276 ; line 46 : // ke3<65>̎<EFBFBD><CC8E>̓_<CD83>~<7E>[<5B><EFBFBD>
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277 277 ; line 47 : void IIC_twl_Stop( void )
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278 278 ; line 48 : {
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279 279 ; line 49 : }
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280 280 ; line 50 : void IIC_twl_Init( void )
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281 281 ; line 51 : {
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282 282 ; line 52 : }
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283 283 ; line 53 : #else
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284 284 ; line 54 :
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285 285 ; line 55 :
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286 286 ; line 56 : /*==============================================================
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287 287 ; ==============*/
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288 288 ; line 57 : u8 vreg_adrs;
|
||
289 289 ; line 58 : u8 pre_dat;
|
||
290 290 ; line 59 :
|
||
291 291 ; line 60 :
|
||
292 292 ; line 61 : u16 tot;
|
||
293 293 ; line 62 :
|
||
294 294 ; line 63 :
|
||
295 295 ; line 64 : // <20><><EFBFBD>I<EFBFBD>@<40><><EFBFBD>̓}<7D>N<EFBFBD><4E><EFBFBD>Ȃ̂ŁAreturn<72>̓<EFBFBD><CD83>C<EFBFBD><43><EFBFBD><EFBFBD><EFBFBD>[<5B>v<EFBFBD>ɖ߂<C996><DF82>܂<EFBFBD><DC82>B
|
||
296 296 ; line 65 : #define wait_next { \
|
||
297 297 ; line 66 : tot = 0; \
|
||
298 298 ; line 67 : while( IICAIF != 1 ){ \
|
||
299 299 ; line 68 : if( SPD ){ \
|
||
300 300 ; line 69 : LREL = 1; \
|
||
301 301 ; line 70 : return; \
|
||
302 302 ; line 71 : } \
|
||
303 303 ; line 72 : tot++; \
|
||
304 304 ; line 73 : if( tot == 0 ){ \
|
||
305 305 ; line 74 : LREL = 1; \
|
||
306 306 ; line 75 : return; \
|
||
307 307 ; line 76 : } \
|
||
308 308 ; line 77 : } \
|
||
309 309 ; line 78 : }
|
||
310 310 ; line 79 :
|
||
311 311 ; line 80 :
|
||
312 312 ; line 81 : __interrupt void int_iic_twl( )
|
||
313 313 ; line 82 : {
|
||
314 314
|
||
315 315 ----- @@BASE CSEG BASE
|
||
316 316 00000 _int_iic_twl:
|
||
317 317 $DGL 1,21
|
||
318 318 00000 C1 push ax ;[INF] 1, 1
|
||
319 319 00001 C3 push bc ;[INF] 1, 1
|
||
320 320 00002 C5 push de ;[INF] 1, 1
|
||
321 321 00003 C7 push hl ;[INF] 1, 1
|
||
322 322 00004 520C mov c,#0CH ;[INF] 2, 1
|
||
323 323 00006 92 dec c ;[INF] 1, 1
|
||
324 324 00007 92 dec c ;[INF] 1, 1
|
||
325 325 00008 R690000 movw ax,_@SEGAX[c] ;[INF] 3, 1
|
||
326 326 0000B C1 push ax ;[INF] 1, 1
|
||
327 327 0000C DFF8 bnz $$-6 ;[INF] 2, 4
|
||
328 328 0000E 8EFD mov a,ES ;[INF] 2, 1
|
||
329 329 00010 70 mov x,a ;[INF] 1, 1
|
||
330 330 00011 8EFC mov a,CS ;[INF] 2, 1
|
||
331 331 00013 C1 push ax ;[INF] 1, 1
|
||
332 332 00014 2006 subw sp,#06H ;[INF] 2, 1
|
||
333 333 00016 FBF8FF movw hl,sp ;[INF] 3, 1
|
||
334 334 00019 ??bf_int_iic_twl:
|
||
335 335 ; line 83 : u8 temp;
|
||
336 336 ; line 84 : u16 tot;
|
||
337 337 ; line 85 :
|
||
338 338 ; line 86 : // WDT_Restart();
|
||
339 339 ; line 87 : // <20>t<EFBFBD><74><EFBFBD>O<EFBFBD>P<EFBFBD><50><EFBFBD><EFBFBD> <20>X<EFBFBD><58><EFBFBD>[<5B>u<EFBFBD>A<EFBFBD>h<EFBFBD><68><EFBFBD>X,R/W
|
||
340 340 ; line 88 : /* COI != 1 <20>Ȃ<EFBFBD><C882>A<EFBFBD><41><EFBFBD>荞<EFBFBD>݂͂<DD82><CD82><EFBFBD><EFBFBD>Ȃ<EFBFBD>
|
||
341 341 ; line 89 : if( COI != 1 ){ // <20><><EFBFBD>Ăяo<D18F><6F><EFBFBD>H
|
||
342 342 ; line 90 : LREL = 1; // <20>Ăꂽ<CE82>̂͑<CC82><CD91><EFBFBD>ID
|
||
343 343 ; line 91 : return;
|
||
344 344 ; line 92 : }else{
|
||
345 345 ; line 93 : ACKE0 = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ack<63><6B><EFBFBD>Ԃ<EFBFBD><D482>悤<EFBFBD>ɂ<EFBFBD><C982><EFBFBD>
|
||
346 346 ; line 94 : WREL = 1; // <20>E<EFBFBD>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ď<EFBFBD><C48E>̃o<CC83>C<EFBFBD>g<EFBFBD><67><EFBFBD>҂<EFBFBD>
|
||
347 347 ; line 95 : }
|
||
348 348 ; line 96 : */
|
||
349 349 ; line 97 : WREL = 1; // <20>E<EFBFBD>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ď<EFBFBD><C48E>̃o<CC83>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD>
|
||
350 350 ; <20><>
|
||
351 351 $DGL 0,16
|
||
352 352 00019 71503002 set1 !IICCTL00.5 ;[INF] 4, 2
|
||
353 353 ; line 98 : wait_next; // <20>P<EFBFBD>o<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD>M<EFBFBD><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>҂<EFBFBD>
|
||
354 354 $DGL 0,17
|
||
355 355 0001D ??bb00_int_iic_twl:
|
||
356 356 0001D F6 clrw ax ;[INF] 1, 1
|
||
357 357 0001E BC02 movw [hl+2],ax ; tot ;[INF] 2, 1
|
||
358 358 00020 ?L0003:
|
||
359 359 00020 31B2E21B bt IF1L.3,$?L0004 ;[INF] 4, 5
|
||
360 360 00024 ??bb01_int_iic_twl:
|
||
361 361 00024 31845107 bf IICS0.0,$?L0005 ;[INF] 4, 5
|
||
362 362 00028 ??bb02_int_iic_twl:
|
||
363 363 00028 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
364 364 0002C REDFD00 br !?L0010 ;[INF] 3, 3
|
||
365 365 0002F ??eb02_int_iic_twl:
|
||
366 366 0002F ?L0005:
|
||
367 367 0002F 617902 incw [hl+2] ; tot ;[INF] 3, 2
|
||
368 368 00032 F6 clrw ax ;[INF] 1, 1
|
||
369 369 00033 614902 cmpw ax,[hl+2] ; tot ;[INF] 3, 1
|
||
370 370 00036 DFE8 bnz $?L0003 ;[INF] 2, 4
|
||
371 371 00038 ??bb03_int_iic_twl:
|
||
372 372 00038 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
373 373 0003C REDFD00 br !?L0010 ;[INF] 3, 3
|
||
374 374 0003F ??eb03_int_iic_twl:
|
||
375 375 0003F ??eb01_int_iic_twl:
|
||
376 376 0003F ?L0004:
|
||
377 377 0003F ??eb00_int_iic_twl:
|
||
378 378 ; line 99 :
|
||
379 379 ; line 100 : // <20>Q<EFBFBD><51><EFBFBD><EFBFBD> R/W <20><><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>A<EFBFBD>h<EFBFBD><68><EFBFBD>X
|
||
380 380 ; line 101 : temp = IICA;
|
||
381 381 $DGL 0,20
|
||
382 382 0003F 8E50 mov a,IICA0 ;[INF] 2, 1
|
||
383 383 00041 9C05 mov [hl+5],a ; temp ;[INF] 2, 1
|
||
384 384 ; line 102 : IICAIF = 0;
|
||
385 385 $DGL 0,21
|
||
386 386 00043 713BE2 clr1 IF1L.3 ;[INF] 3, 2
|
||
387 387 ; line 103 : WREL = 1;
|
||
388 388 $DGL 0,22
|
||
389 389 00046 71503002 set1 !IICCTL00.5 ;[INF] 4, 2
|
||
390 390 ; line 104 :
|
||
391 391 ; line 105 : vreg_adrs = adrs_table_twl_ext2int( temp );
|
||
392 392 $DGL 0,24
|
||
393 393 0004A 8C05 mov a,[hl+5] ; temp ;[INF] 2, 1
|
||
394 394 0004C 318E shrw ax,8 ;[INF] 2, 1
|
||
395 395 0004E RFD0000 call !_adrs_table_twl_ext2int ;[INF] 3, 3
|
||
396 396 00051 62 mov a,c ;[INF] 1, 1
|
||
397 397 00052 R9F0000 mov !_vreg_adrs,a ;[INF] 3, 1
|
||
398 398 ; line 106 :
|
||
399 399 ; line 107 : // <20>R<EFBFBD><52><EFBFBD><EFBFBD>
|
||
400 400 ; line 108 : // <20>X<EFBFBD>^<5E>[<5B>g<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>A<EFBFBD>f<EFBFBD>[<5B>^<5E><><EFBFBD>M<EFBFBD><4D><EFBFBD><EFBFBD><EFBFBD>t<EFBFBD><74><EFBFBD>O<EFBFBD>҂<EFBFBD>
|
||
401 401 ; line 109 :
|
||
402 402 ; line 110 : while( 1 )
|
||
403 403 00055 ?L0009:
|
||
404 404 ; line 111 : {
|
||
405 405 00055 ??bb04_int_iic_twl:
|
||
406 406 ; line 112 : u8 my_iics = IICS;
|
||
407 407 $DGL 0,31
|
||
408 408 00055 8E51 mov a,IICS0 ;[INF] 2, 1
|
||
409 409 00057 9C01 mov [hl+1],a ; my_iics ;[INF] 2, 1
|
||
410 410 ; line 113 :
|
||
411 411 ; line 114 : if( my_iics & 0x01 ) // SPD
|
||
412 412 $DGL 0,33
|
||
413 413 00059 5C01 and a,#01H ; 1 ;[INF] 2, 1
|
||
414 414 0005B D1 cmp0 a ;[INF] 1, 1
|
||
415 415 0005C DD07 bz $?L0011 ;[INF] 2, 4
|
||
416 416 ; line 115 : { // <20><><EFBFBD><EFBFBD><EFBFBD>I<EFBFBD><49>
|
||
417 417 0005E ??bb05_int_iic_twl:
|
||
418 418 ; line 116 : LREL = 1;
|
||
419 419 $DGL 0,35
|
||
420 420 0005E 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
421 421 ; line 117 : return;
|
||
422 422 $DGL 0,36
|
||
423 423 00062 REDFD00 br !?L0010 ;[INF] 3, 3
|
||
424 424 00065 ??eb05_int_iic_twl:
|
||
425 425 ; line 118 : }
|
||
426 426 00065 ?L0011:
|
||
427 427 ; line 119 : else if( my_iics & 0x02 ) // ( STD && !SPD )
|
||
428 428 $DGL 0,38
|
||
429 429 00065 8C01 mov a,[hl+1] ; my_iics ;[INF] 2, 1
|
||
430 430 00067 5C02 and a,#02H ; 2 ;[INF] 2, 1
|
||
431 431 00069 D1 cmp0 a ;[INF] 1, 1
|
||
432 432 0006A DD66 bz $?L0013 ;[INF] 2, 4
|
||
433 433 ; line 120 : {
|
||
434 434 0006C ??bb06_int_iic_twl:
|
||
435 435 ; line 121 : // <20><><EFBFBD>M // (<28>X<EFBFBD>^<5E>[<5B>g<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>o)
|
||
436 436 ; line 122 : pre_dat = vreg_twl_read( vreg_adrs ); // mcu<63><75>
|
||
437 437 ; <20><><EFBFBD>A<EFBFBD>h<EFBFBD><68><EFBFBD>X<EFBFBD><58><EFBFBD>n<EFBFBD><6E><EFBFBD>B<EFBFBD><42><EFBFBD>o<EFBFBD>C<EFBFBD>g<EFBFBD>ڂ̏<DA82><CC8F><EFBFBD> IICB<43>ɏ<EFBFBD><C98F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ނƃE<C683>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD>
|
||
438 438 $DGL 0,41
|
||
439 439 0006C RD90000 mov x,!_vreg_adrs ;[INF] 3, 1
|
||
440 440 0006F F1 clrb a ;[INF] 1, 1
|
||
441 441 00070 RFD0000 call !_vreg_twl_read ;[INF] 3, 3
|
||
442 442 00073 62 mov a,c ;[INF] 1, 1
|
||
443 443 00074 R9F0100 mov !_pre_dat,a ;[INF] 3, 1
|
||
444 444 ; line 123 :
|
||
445 445 ; line 124 : // <20><><EFBFBD>ǂ<EFBFBD>R<EFBFBD>ŌĂ<C482><CE82><EFBFBD><EFBFBD>̂<EFBFBD><CC82>҂<EFBFBD>
|
||
446 446 ; line 125 : wait_next;
|
||
447 447 $DGL 0,44
|
||
448 448 00077 ??bb07_int_iic_twl:
|
||
449 449 00077 F6 clrw ax ;[INF] 1, 1
|
||
450 450 00078 BC02 movw [hl+2],ax ; tot ;[INF] 2, 1
|
||
451 451 0007A ?L0015:
|
||
452 452 0007A 31B2E219 bt IF1L.3,$?L0016 ;[INF] 4, 5
|
||
453 453 0007E ??bb08_int_iic_twl:
|
||
454 454 0007E 31845106 bf IICS0.0,$?L0017 ;[INF] 4, 5
|
||
455 455 00082 ??bb09_int_iic_twl:
|
||
456 456 00082 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
457 457 00086 EF75 br $?L0010 ;[INF] 2, 3
|
||
458 458 00088 ??eb09_int_iic_twl:
|
||
459 459 00088 ?L0017:
|
||
460 460 00088 617902 incw [hl+2] ; tot ;[INF] 3, 2
|
||
461 461 0008B F6 clrw ax ;[INF] 1, 1
|
||
462 462 0008C 614902 cmpw ax,[hl+2] ; tot ;[INF] 3, 1
|
||
463 463 0008F DFE9 bnz $?L0015 ;[INF] 2, 4
|
||
464 464 00091 ??bb0A_int_iic_twl:
|
||
465 465 00091 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
466 466 00095 EF66 br $?L0010 ;[INF] 2, 3
|
||
467 467 00097 ??eb0A_int_iic_twl:
|
||
468 468 ; line 126 : IICAIF = 0;
|
||
469 469 $DGL 0,45
|
||
470 470 00097 ??eb08_int_iic_twl:
|
||
471 471 00097 ?L0016:
|
||
472 472 00097 ??eb07_int_iic_twl:
|
||
473 473 00097 713BE2 clr1 IF1L.3 ;[INF] 3, 2
|
||
474 474 ; line 127 : if( COI != 1 )
|
||
475 475 $DGL 0,46
|
||
476 476 0009A 31C25106 bt IICS0.4,$?L0021 ;[INF] 4, 5
|
||
477 477 ; line 128 : { // <20><><EFBFBD>Ăяo<D18F><6F><EFBFBD>H
|
||
478 478 0009E ??bb0B_int_iic_twl:
|
||
479 479 ; line 129 : LREL = 1; // <20>Ăꂽ<CE82>̂͑<CC82><CD91><EFBFBD>ID<49>i<EFBFBD><69><EFBFBD><EFBFBD><EFBFBD>H<EFBFBD>j
|
||
480 480 $DGL 0,48
|
||
481 481 0009E 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
482 482 ; line 130 : return;
|
||
483 483 $DGL 0,49
|
||
484 484 000A2 EF59 br $?L0010 ;[INF] 2, 3
|
||
485 485 000A4 ??eb0B_int_iic_twl:
|
||
486 486 ; line 131 : }
|
||
487 487 000A4 ?L0021:
|
||
488 488 ; line 132 : IICA = pre_dat; // <20>f<EFBFBD>[<5B>^<5E>𑗂<EFBFBD><F0919782>B<EFBFBD>E<EFBFBD>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
489 489 ; <20><><EFBFBD><EFBFBD><EFBFBD>B
|
||
490 490 $DGL 0,51
|
||
491 491 000A4 R8F0100 mov a,!_pre_dat ;[INF] 3, 1
|
||
492 492 000A7 9E50 mov IICA0,a ;[INF] 2, 1
|
||
493 493 ; line 133 :
|
||
494 494 ; line 134 : wait_next;
|
||
495 495 $DGL 0,53
|
||
496 496 000A9 ??bb0C_int_iic_twl:
|
||
497 497 000A9 F6 clrw ax ;[INF] 1, 1
|
||
498 498 000AA BC02 movw [hl+2],ax ; tot ;[INF] 2, 1
|
||
499 499 000AC ?L0023:
|
||
500 500 000AC 31B2E219 bt IF1L.3,$?L0024 ;[INF] 4, 5
|
||
501 501 000B0 ??bb0D_int_iic_twl:
|
||
502 502 000B0 31845106 bf IICS0.0,$?L0025 ;[INF] 4, 5
|
||
503 503 000B4 ??bb0E_int_iic_twl:
|
||
504 504 000B4 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
505 505 000B8 EF43 br $?L0010 ;[INF] 2, 3
|
||
506 506 000BA ??eb0E_int_iic_twl:
|
||
507 507 000BA ?L0025:
|
||
508 508 000BA 617902 incw [hl+2] ; tot ;[INF] 3, 2
|
||
509 509 000BD F6 clrw ax ;[INF] 1, 1
|
||
510 510 000BE 614902 cmpw ax,[hl+2] ; tot ;[INF] 3, 1
|
||
511 511 000C1 DFE9 bnz $?L0023 ;[INF] 2, 4
|
||
512 512 000C3 ??bb0F_int_iic_twl:
|
||
513 513 000C3 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
514 514 000C7 EF34 br $?L0010 ;[INF] 2, 3
|
||
515 515 000C9 ??eb0F_int_iic_twl:
|
||
516 516 ; line 135 : // <20>S<EFBFBD><53><EFBFBD>ځB(<28><><EFBFBD>M<EFBFBD>f<EFBFBD>[<5B>^<5E><><EFBFBD>́AACK/NACK<43><4B>)<29>@<40>ǂ<EFBFBD><C782><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD>
|
||
517 517 ; <20><><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482>܂<EFBFBD><DC82>B
|
||
518 518 000C9 ??eb0D_int_iic_twl:
|
||
519 519 000C9 ?L0024:
|
||
520 520 000C9 ??eb0C_int_iic_twl:
|
||
521 521 ; line 136 : IICAIF = 0; // <20><><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD>
|
||
522 522 $DGL 0,55
|
||
523 523 000C9 713BE2 clr1 IF1L.3 ;[INF] 3, 2
|
||
524 524 ; line 137 : LREL = 1;
|
||
525 525 $DGL 0,56
|
||
526 526 000CC 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
527 527 ; line 138 : return;
|
||
528 528 $DGL 0,57
|
||
529 529 000D0 EF2B br $?L0010 ;[INF] 2, 3
|
||
530 530 000D2 ??eb06_int_iic_twl:
|
||
531 531 ; line 139 : }
|
||
532 532 000D2 ?L0013:
|
||
533 533 ; line 140 : else if( IICAIF && (( my_iics & 0x03 ) == 0 )) // !STD
|
||
534 534 ; && !SPD )
|
||
535 535 $DGL 0,59
|
||
536 536 000D2 31B4E224 bf IF1L.3,$?L0029 ;[INF] 4, 5
|
||
537 537 000D6 8C01 mov a,[hl+1] ; my_iics ;[INF] 2, 1
|
||
538 538 000D8 5C03 and a,#03H ; 3 ;[INF] 2, 1
|
||
539 539 000DA D1 cmp0 a ;[INF] 1, 1
|
||
540 540 000DB DF1D bnz $?L0029 ;[INF] 2, 4
|
||
541 541 ; line 141 : {
|
||
542 542 000DD ??bb10_int_iic_twl:
|
||
543 543 ; line 142 : // <20><><EFBFBD>M //
|
||
544 544 ; line 143 : IICAIF = 0;
|
||
545 545 $DGL 0,62
|
||
546 546 000DD 713BE2 clr1 IF1L.3 ;[INF] 3, 2
|
||
547 547 ; line 144 : temp = IICA;
|
||
548 548 $DGL 0,63
|
||
549 549 000E0 8E50 mov a,IICA0 ;[INF] 2, 1
|
||
550 550 000E2 9C05 mov [hl+5],a ; temp ;[INF] 2, 1
|
||
551 551 ; line 145 : WREL = 1;
|
||
552 552 $DGL 0,64
|
||
553 553 000E4 71503002 set1 !IICCTL00.5 ;[INF] 4, 2
|
||
554 554 ; line 146 :
|
||
555 555 ; line 147 : // <20>ʏ<EFBFBD><CA8F>A<EFBFBD>N<EFBFBD>Z<EFBFBD>X(<28><><EFBFBD>C<EFBFBD>g) //
|
||
556 556 ; line 148 : LREL = 1; // <20>X<EFBFBD>^<5E>[<5B>g<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD>҂<EFBFBD><D282><EFBFBD>(
|
||
557 557 ; <20>A<EFBFBD><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݖ<EFBFBD><DD96>Ή<EFBFBD><CE89>̂<EFBFBD><CC82><EFBFBD>)
|
||
558 558 $DGL 0,67
|
||
559 559 000E8 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
560 560 ; line 149 : vreg_twl_write( vreg_adrs, temp );
|
||
561 561 $DGL 0,68
|
||
562 562 000EC 8C05 mov a,[hl+5] ; temp ;[INF] 2, 1
|
||
563 563 000EE 318E shrw ax,8 ;[INF] 2, 1
|
||
564 564 000F0 C1 push ax ;[INF] 1, 1
|
||
565 565 000F1 RD90000 mov x,!_vreg_adrs ;[INF] 3, 1
|
||
566 566 000F4 RFD0000 call !_vreg_twl_write ;[INF] 3, 3
|
||
567 567 000F7 C0 pop ax ;[INF] 1, 1
|
||
568 568 ; line 150 : return; // <20><><EFBFBD>M<EFBFBD><4D><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD> //
|
||
569 569 $DGL 0,69
|
||
570 570 000F8 EF03 br $?L0010 ;[INF] 2, 3
|
||
571 571 000FA ??eb10_int_iic_twl:
|
||
572 572 ; line 151 : }
|
||
573 573 000FA ?L0029:
|
||
574 574 000FA ??eb04_int_iic_twl:
|
||
575 575 ; line 152 : }
|
||
576 576 $DGL 0,71
|
||
577 577 000FA RED5500 br !?L0009 ;[INF] 3, 3
|
||
578 578 000FD ?L0010:
|
||
579 579 ; line 153 : }
|
||
580 580 $DGL 0,72
|
||
581 581 000FD ??ef_int_iic_twl:
|
||
582 582 000FD 1006 addw sp,#06H ;[INF] 2, 1
|
||
583 583 000FF C0 pop ax ;[INF] 1, 1
|
||
584 584 00100 9EFC mov CS,a ;[INF] 2, 1
|
||
585 585 00102 60 mov a,x ;[INF] 1, 1
|
||
586 586 00103 9EFD mov ES,a ;[INF] 2, 1
|
||
587 587 00105 R340000 movw de,#_@SEGAX ;[INF] 3, 1
|
||
588 588 00108 5206 mov c,#06H ;[INF] 2, 1
|
||
589 589 0010A C0 pop ax ;[INF] 1, 1
|
||
590 590 0010B B9 movw [de],ax ;[INF] 1, 1
|
||
591 591 0010C A5 incw de ;[INF] 1, 1
|
||
592 592 0010D A5 incw de ;[INF] 1, 1
|
||
593 593 0010E 92 dec c ;[INF] 1, 1
|
||
594 594 0010F DFF9 bnz $$-5 ;[INF] 2, 4
|
||
595 595 00111 C6 pop hl ;[INF] 1, 1
|
||
596 596 00112 C4 pop de ;[INF] 1, 1
|
||
597 597 00113 C2 pop bc ;[INF] 1, 1
|
||
598 598 00114 C0 pop ax ;[INF] 1, 1
|
||
599 599 00115 61FC reti ;[INF] 2, 6
|
||
600 600 00117 ??ee_int_iic_twl:
|
||
601 601 ; line 154 :
|
||
602 602 ; line 155 :
|
||
603 603 ; line 156 :
|
||
604 604 ; line 157 : /*****************************************************/
|
||
605 605 ; line 158 : void IIC_twl_Init( void )
|
||
606 606 ; line 159 : {
|
||
607 607
|
||
608 608 ----- ROM_CODE CSEG BASE
|
||
609 609 00000 _IIC_twl_Init:
|
||
610 610 $DGL 1,99
|
||
611 611 00000 ??bf_IIC_twl_Init:
|
||
612 612 ; line 160 :
|
||
613 613 ; line 161 : IICAEN = 1;
|
||
614 614 $DGL 0,3
|
||
615 615 00000 7140F000 set1 !PER0.4 ;[INF] 4, 2
|
||
616 616 ; line 162 :
|
||
617 617 ; line 163 : IICE = 0; /* IICA disable */
|
||
618 618 $DGL 0,5
|
||
619 619 00004 71783002 clr1 !IICCTL00.7 ;[INF] 4, 2
|
||
620 620 ; line 164 :
|
||
621 621 ; line 165 : IICAMK = 1; /* INTIICA disable */
|
||
622 622 $DGL 0,7
|
||
623 623 00008 713AE6 set1 MK1L.3 ;[INF] 3, 2
|
||
624 624 ; line 166 : IICAIF = 0; /* clear INTIICA interrupt flag
|
||
625 625 ; */
|
||
626 626 $DGL 0,8
|
||
627 627 0000B 713BE2 clr1 IF1L.3 ;[INF] 3, 2
|
||
628 628 ; line 167 :
|
||
629 629 ; line 168 : IICAPR0 = 0; /* set INTIICA high priority */
|
||
630 630 $DGL 0,10
|
||
631 631 0000E 713BEA clr1 PR01L.3 ;[INF] 3, 2
|
||
632 632 ; line 169 : IICAPR1 = 0; /* set INTIICA high priority */
|
||
633 633 $DGL 0,11
|
||
634 634 00011 713BEE clr1 PR11L.3 ;[INF] 3, 2
|
||
635 635 ; line 170 : P20 &= ~0x3;
|
||
636 636 $DGL 0,12
|
||
637 637 00014 8F1005 mov a,!P20 ;[INF] 3, 1
|
||
638 638 00017 5CFC and a,#0FCH ; 252 ;[INF] 2, 1
|
||
639 639 00019 9F1005 mov !P20,a ;[INF] 3, 1
|
||
640 640 ; line 171 :
|
||
641 641 ; line 172 : SVA = IIC_T_SLAVEADDRESS;
|
||
642 642 $DGL 0,14
|
||
643 643 0001C CF34024A mov !SVA0,#04AH ; 74 ;[INF] 4, 1
|
||
644 644 ; line 173 : IICF = 0x01;
|
||
645 645 $DGL 0,15
|
||
646 646 00020 E552FF oneb !IICF0 ;[INF] 3, 1
|
||
647 647 ; line 174 :
|
||
648 648 ; line 175 : STCEN = 1; // <20><><EFBFBD>X<EFBFBD>^<5E>[<5B>g<EFBFBD>̋<EFBFBD><CC8B><EFBFBD>
|
||
649 649 $DGL 0,17
|
||
650 650 00023 711A52 set1 IICF0.1 ;[INF] 3, 2
|
||
651 651 ; line 176 : IICRSV = 1; // <20>ʐM<CA90>\<5C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD>:<3A>X<EFBFBD><58><EFBFBD>[<5B>u<EFBFBD><75>
|
||
652 652 ; <20>O<EFBFBD><4F><EFBFBD><EFBFBD>
|
||
653 653 $DGL 0,18
|
||
654 654 00026 710A52 set1 IICF0.0 ;[INF] 3, 2
|
||
655 655 ; line 177 :
|
||
656 656 ; line 178 : SPIE = 0; // <20>X<EFBFBD>g<EFBFBD>b<EFBFBD>v<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD>ł̊<C582><CC8A><EFBFBD>
|
||
657 657 ; <20><><EFBFBD>݂<EFBFBD><DD82>֎~
|
||
658 658 $DGL 0,20
|
||
659 659 00029 71483002 clr1 !IICCTL00.4 ;[INF] 4, 2
|
||
660 660 ; line 179 : WTIM = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD>Ԃ<EFBFBD><D482><EFBFBD><EFBFBD><EFBFBD>clk<6C><6B>L<EFBFBD>Ɍ<EFBFBD>
|
||
661 661 ; <20>肷<EFBFBD><E882B7>
|
||
662 662 $DGL 0,21
|
||
663 663 0002D 71303002 set1 !IICCTL00.3 ;[INF] 4, 2
|
||
664 664 ; line 180 : ACKE = 1; // <20>_<EFBFBD><5F>CPU<50>͖<EFBFBD><CD96><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ď<EFBFBD><C48E>̒ʐM<CA90><4D><EFBFBD><EFBFBD>
|
||
665 665 ; <20><><EFBFBD>߂邩<DF82><E982A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD>ő<EFBFBD><C591><EFBFBD>clk<6C><6B><EFBFBD>J<EFBFBD><4A><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD>Ȃ<EFBFBD>
|
||
666 666 $DGL 0,22
|
||
667 667 00031 71203002 set1 !IICCTL00.2 ;[INF] 4, 2
|
||
668 668 ; line 181 :
|
||
669 669 ; line 182 : IICWH = 5;
|
||
670 670 $DGL 0,24
|
||
671 671 00035 CF330205 mov !IICWH0,#05H ; 5 ;[INF] 4, 1
|
||
672 672 ; line 183 : IICWL = 10; // L<><4C><EFBFBD>Ԃ̒<D482><CC92><EFBFBD><EFBFBD>i<EFBFBD>H<EFBFBD>j
|
||
673 673 $DGL 0,25
|
||
674 674 00039 CF32020A mov !IICWL0,#0AH ; 10 ;[INF] 4, 1
|
||
675 675 ; line 184 :
|
||
676 676 ; line 185 : SMC = 1;
|
||
677 677 $DGL 0,27
|
||
678 678 0003D 71303102 set1 !IICCTL10.3 ;[INF] 4, 2
|
||
679 679 ; line 186 :
|
||
680 680 ; line 187 : IICAMK = 0; // <20><><EFBFBD>荞<EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD><EFBFBD>
|
||
681 681 $DGL 0,29
|
||
682 682 00041 713BE6 clr1 MK1L.3 ;[INF] 3, 2
|
||
683 683 ; line 188 :
|
||
684 684 ; line 189 : IICE = 1;
|
||
685 685 $DGL 0,31
|
||
686 686 00044 71703002 set1 !IICCTL00.7 ;[INF] 4, 2
|
||
687 687 ; line 190 :
|
||
688 688 ; line 191 : PM20 &= ~0x3; /* set clock pin for IICA */
|
||
689 689 $DGL 0,33
|
||
690 690 00048 8F1105 mov a,!PM20 ;[INF] 3, 1
|
||
691 691 0004B 5CFC and a,#0FCH ; 252 ;[INF] 2, 1
|
||
692 692 0004D 9F1105 mov !PM20,a ;[INF] 3, 1
|
||
693 693 ; line 192 :
|
||
694 694 ; line 193 : LREL = 1;
|
||
695 695 $DGL 0,35
|
||
696 696 00050 71603002 set1 !IICCTL00.6 ;[INF] 4, 2
|
||
697 697 ; line 194 : }
|
||
698 698 $DGL 0,36
|
||
699 699 00054 ??ef_IIC_twl_Init:
|
||
700 700 00054 D7 ret ;[INF] 1, 6
|
||
701 701 00055 ??ee_IIC_twl_Init:
|
||
702 702 ; line 195 :
|
||
703 703 ; line 196 :
|
||
704 704 ; line 197 :
|
||
705 705 ; line 198 : //**************************************************************
|
||
706 706 ; **************
|
||
707 707 ; line 199 : void IIC_twl_Stop( void )
|
||
708 708 ; line 200 : {
|
||
709 709 00055 _IIC_twl_Stop:
|
||
710 710 $DGL 1,105
|
||
711 711 00055 ??bf_IIC_twl_Stop:
|
||
712 712 ; line 201 : IICE = 0; /* IICA disable */
|
||
713 713 $DGL 0,2
|
||
714 714 00055 71783002 clr1 !IICCTL00.7 ;[INF] 4, 2
|
||
715 715 ; line 202 : IICAEN = 0;
|
||
716 716 $DGL 0,3
|
||
717 717 00059 7148F000 clr1 !PER0.4 ;[INF] 4, 2
|
||
718 718 ; line 203 : }
|
||
719 719 $DGL 0,4
|
||
720 720 0005D ??ef_IIC_twl_Stop:
|
||
721 721 0005D D7 ret ;[INF] 1, 6
|
||
722 722 0005E ??ee_IIC_twl_Stop:
|
||
723 723
|
||
724 724 ----- @@CODEL CSEG
|
||
725 725 END
|
||
726 726
|
||
727 727
|
||
728 728 ; *** Code Information ***
|
||
729 729 ;
|
||
730 730 ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\i2c_twl.c
|
||
731 731 ;
|
||
732 732 ; $FUNC int_iic_twl(82)
|
||
733 733 ; void=(void)
|
||
734 734 ; CODE SIZE= 279 bytes, CLOCK_SIZE= 232 clocks, STACK_SIZE= 34 bytes
|
||
735 735 ;
|
||
736 736 ; $CALL adrs_table_twl_ext2int(105)
|
||
737 737 ; bc=(int:ax)
|
||
738 738 ;
|
||
739 739 ; $CALL vreg_twl_read(122)
|
||
740 740 ; bc=(int:ax)
|
||
741 741 ;
|
||
742 742 ; $CALL vreg_twl_write(149)
|
||
743 743 ; void=(int:ax, int:[sp+4])
|
||
744 744 ;
|
||
745 745 ; $FUNC IIC_twl_Init(159)
|
||
746 746 ; void=(void)
|
||
747 747 ; CODE SIZE= 85 bytes, CLOCK_SIZE= 46 clocks, STACK_SIZE= 0 bytes
|
||
748 748 ;
|
||
749 749 ; $FUNC IIC_twl_Stop(200)
|
||
750 750 ; void=(void)
|
||
751 751 ; CODE SIZE= 9 bytes, CLOCK_SIZE= 10 clocks, STACK_SIZE= 0 bytes
|
||
752 752
|
||
753 753 ; Target chip : uPD79F0104
|
||
754 754 ; Device file : E1.00b
|
||
|
||
Segment informations:
|
||
|
||
ADRS LEN NAME
|
||
|
||
00000 00000H.0 @@BITS
|
||
00000 00030H @@CNST
|
||
00000 00000H @@R_INIT
|
||
00000 00000H @@INIT
|
||
00000 00004H @@DATA
|
||
00000 00000H @@R_INIS
|
||
00000 00000H @@INIS
|
||
00000 00000H @@DATS
|
||
00000 00000H @@CNSTL
|
||
00000 00000H @@RLINIT
|
||
00000 00000H @@INITL
|
||
00000 00000H @@DATAL
|
||
00000 00000H @@CALT
|
||
00000 00117H @@BASE
|
||
00000 0005EH ROM_CODE
|
||
00000 00000H @@CODEL
|
||
|
||
Target chip : uPD79F0104
|
||
Device file : E1.00b
|
||
Assembly complete, 0 error(s) and 0 warning(s) found. ( 0)
|
||
|