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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
963 lines
71 KiB
Plaintext
963 lines
71 KiB
Plaintext
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78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1
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Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\i2c_ctr.asm
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Para-file:
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In-file: inter_asm\i2c_ctr.asm
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Obj-file: i2c_ctr.rel
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Prn-file: i2c_ctr.prn
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Assemble list
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ALNO STNO ADRS OBJECT M I SOURCE STATEMENT
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1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:23
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2 2
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3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
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4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
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5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no i2c_ctr.c
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6 6 ; In-file : i2c_ctr.c
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7 7 ; Asm-file : inter_asm\i2c_ctr.asm
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8 8 ; Para-file :
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9 9
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10 10 $PROCESSOR(9F0104)
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11 11 $DEBUG
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12 12 $NODEBUGA
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13 13 $KANJICODE SJIS
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14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H
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15 15
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16 16 $DGS FIL_NAM, .file, 07CH, 0FFFEH, 03FH, 067H, 01H, 00H
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17 17 $DGS AUX_FIL, i2c_ctr.c
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18 18 $DGS MOD_NAM, i2c_ctr, 00H, 0FFFEH, 00H, 077H, 00H, 00H
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19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
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20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
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21 21 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
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22 22 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
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23 23 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
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24 24 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
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25 25 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
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26 26 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
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27 27 $DGS SEC_NAM, @@CNSTL, U, U, 00H, 078H, 00H, 00H
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28 28 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
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29 29 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
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30 30 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
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31 31 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
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32 32 $DGS SEC_NAM, ROM_CODE, U, U, 00H, 078H, 00H, 00H
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33 33 $DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H
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34 34 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
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35 35 $DGS STA_SYM, _lpf_coeff, U, U, 05002H, 03H, 01H, 03H
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36 36 $DGS AUX_STR, 00H, 00H, 02FH, 02FH, 00H, 00H, 00H, 00H
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37 37 $DGS GLV_SYM, _int_iic_ctr, U, U, 0E001H, 026H, 01H, 02H
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38 38 $DGS AUX_FUN, 00H, U, U, 070H, 00H, 00H
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39 39 $DGS BEG_FUN, ??bf_int_iic_ctr, U, U, 00H, 065H, 01H, 00H
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40 40 $DGS AUX_BEG, 041H, 016H, 01EH
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41 41 $DGS STA_SYM, _state, ?L0003, U, 0CH, 03H, 00H, 00H
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42 42 $DGS STA_SYM, _reg_adrs, ?L0004, U, 0CH, 03H, 00H, 00H
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43 43 $DGS STA_SYM, _reg_adrs_internal, ?L0005, U, 0CH, 03H, 00H, 00H
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44 44 $DGS STA_SYM, _tx_buf, ?L0006, U, 0CH, 03H, 00H, 00H
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45 45 $DGS REG_VAR, _rx_buf, 06H, 0FFFFH, 010CH, 04H, 00H, 00H
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46 46 $DGS BEG_BLK, ??bb00_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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47 47 $DGS AUX_BEG, 0CH, 00H, 020H
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48 48 $DGS BEG_BLK, ??bb01_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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49 49 $DGS AUX_BEG, 014H, 00H, 022H
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50 50 $DGS BEG_BLK, ??bb02_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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51 51 $DGS AUX_BEG, 015H, 00H, 026H
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52 52 $DGS END_BLK, ??eb02_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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53 53 $DGS AUX_END, 015H
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54 54 $DGS BEG_BLK, ??bb03_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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55 55 $DGS AUX_BEG, 01BH, 00H, 028H
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56 56 $DGS BEG_BLK, ??bb04_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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57 57 $DGS AUX_BEG, 01CH, 00H, 02CH
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58 58 $DGS END_BLK, ??eb04_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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59 59 $DGS AUX_END, 01CH
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60 60 $DGS BEG_BLK, ??bb05_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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61 61 $DGS AUX_BEG, 01DH, 00H, 036H
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62 62 $DGS END_BLK, ??eb05_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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63 63 $DGS AUX_END, 01DH
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64 64 $DGS END_BLK, ??eb03_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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65 65 $DGS AUX_END, 01EH
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66 66 $DGS END_BLK, ??eb01_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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67 67 $DGS AUX_END, 01FH
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68 68 $DGS END_BLK, ??eb00_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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69 69 $DGS AUX_END, 026H
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70 70 $DGS BEG_BLK, ??bb06_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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71 71 $DGS AUX_BEG, 02AH, 00H, 03AH
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72 72 $DGS END_BLK, ??eb06_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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73 73 $DGS AUX_END, 030H
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74 74 $DGS BEG_BLK, ??bb07_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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75 75 $DGS AUX_BEG, 033H, 00H, 03CH
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76 76 $DGS BEG_BLK, ??bb08_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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77 77 $DGS AUX_BEG, 037H, 00H, 042H
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78 78 $DGS END_BLK, ??eb08_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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79 79 $DGS AUX_END, 03AH
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80 80 $DGS END_BLK, ??eb07_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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81 81 $DGS AUX_END, 03BH
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82 82 $DGS BEG_BLK, ??bb09_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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83 83 $DGS AUX_BEG, 03EH, 00H, 044H
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84 84 $DGS BEG_BLK, ??bb0A_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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85 85 $DGS AUX_BEG, 04CH, 00H, 048H
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86 86 $DGS END_BLK, ??eb0A_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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87 87 $DGS AUX_END, 04EH
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88 88 $DGS BEG_BLK, ??bb0B_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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89 89 $DGS AUX_BEG, 050H, 00H, 04CH
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90 90 $DGS END_BLK, ??eb0B_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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91 91 $DGS AUX_END, 052H
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92 92 $DGS BEG_BLK, ??bb0C_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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93 93 $DGS AUX_BEG, 059H, 00H, 04EH
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94 94 $DGS BEG_BLK, ??bb0D_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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95 95 $DGS AUX_BEG, 05CH, 00H, 052H
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96 96 $DGS END_BLK, ??eb0D_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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97 97 $DGS AUX_END, 05FH
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98 98 $DGS BEG_BLK, ??bb0E_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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99 99 $DGS AUX_BEG, 061H, 00H, 058H
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100 100 $DGS END_BLK, ??eb0E_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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101 101 $DGS AUX_END, 067H
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102 102 $DGS END_BLK, ??eb0C_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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103 103 $DGS AUX_END, 068H
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104 104 $DGS BEG_BLK, ??bb0F_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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105 105 $DGS AUX_BEG, 06AH, 00H, 05CH
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106 106 $DGS END_BLK, ??eb0F_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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107 107 $DGS AUX_END, 06DH
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108 108 $DGS BEG_BLK, ??bb10_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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109 109 $DGS AUX_BEG, 071H, 00H, 060H
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110 110 $DGS END_BLK, ??eb10_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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111 111 $DGS AUX_END, 074H
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112 112 $DGS BEG_BLK, ??bb11_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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113 113 $DGS AUX_BEG, 076H, 00H, 064H
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114 114 $DGS END_BLK, ??eb11_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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115 115 $DGS AUX_END, 07AH
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116 116 $DGS BEG_BLK, ??bb12_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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117 117 $DGS AUX_BEG, 07EH, 00H, 068H
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118 118 $DGS END_BLK, ??eb12_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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119 119 $DGS AUX_END, 080H
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120 120 $DGS BEG_BLK, ??bb13_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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121 121 $DGS AUX_BEG, 083H, 00H, 00H
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122 122 $DGS END_BLK, ??eb13_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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123 123 $DGS AUX_END, 085H
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124 124 $DGS END_BLK, ??eb09_int_iic_ctr, U, U, 00H, 064H, 01H, 00H
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125 125 $DGS AUX_END, 087H
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126 126 $DGS END_FUN, ??ef_int_iic_ctr, U, U, 00H, 065H, 01H, 00H
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127 127 $DGS AUX_END, 088H
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128 128 $DGS GLV_SYM, _IIC_ctr_Init, U, U, 01H, 026H, 01H, 02H
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129 129 $DGS AUX_FUN, 00H, U, U, 076H, 00H, 00H
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130 130 $DGS BEG_FUN, ??bf_IIC_ctr_Init, U, U, 00H, 065H, 01H, 00H
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131 131 $DGS AUX_BEG, 0CEH, 00H, 076H
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132 132 $DGS END_FUN, ??ef_IIC_ctr_Init, U, U, 00H, 065H, 01H, 00H
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133 133 $DGS AUX_END, 02CH
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134 134 $DGS GLV_SYM, _IIC_ctr_Stop, U, U, 01H, 026H, 01H, 02H
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135 135 $DGS AUX_FUN, 00H, U, U, 07CH, 00H, 00H
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136 136 $DGS BEG_FUN, ??bf_IIC_ctr_Stop, U, U, 00H, 065H, 01H, 00H
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137 137 $DGS AUX_BEG, 0FFH, 00H, 07CH
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138 138 $DGS END_FUN, ??ef_IIC_ctr_Stop, U, U, 00H, 065H, 01H, 00H
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139 139 $DGS AUX_END, 04H
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140 140 $DGS GLV_SYM, _iic_burst_state, U, U, 0CH, 026H, 00H, 00H
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141 141 $DGS GLV_SYM, _@SEGAX, U, U, 00H, 02H, 00H, 00H
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142 142 $DGS GLV_SYM, _irq_readed, U, U, 034CH, 02H, 00H, 00H
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143 143 $DGS GLV_SYM, _vreg_ctr, U, U, 0CH, 02H, 01H, 03H
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144 144 $DGS AUX_STR, 00H, 00H, 01H, 01H, 00H, 00H, 00H, 00H
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145 145 $DGS GLV_SYM, _hosu_read_end, U, U, 01H, 02H, 01H, 02H
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146 146 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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147 147 $DGS GLV_SYM, _rtc_unlock, U, U, 01H, 02H, 01H, 02H
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148 148 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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149 149 $DGS GLV_SYM, _vreg_ctr_read, U, U, 0CH, 02H, 01H, 02H
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150 150 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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151 151 $DGS GLV_SYM, _vreg_ctr_after_read, U, U, 01H, 02H, 01H, 02H
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152 152 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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153 153 $DGS GLV_SYM, _vreg_ctr_write, U, U, 01H, 02H, 01H, 02H
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154 154 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H
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155 155 $DGS GLV_SYM, _@SEGDE, U, U, 00H, 02H, 00H, 00H
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156 156 $DGS GLV_SYM, _@RTARG0, U, U, 00H, 02H, 00H, 00H
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157 157
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158 158 EXTRN _@SEGAX
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159 159 EXTRN _@SEGDE
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160 160 EXTRN _@RTARG0
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161 161 EXTRN _vreg_ctr
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162 162 EXTRN _hosu_read_end
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163 163 EXTRN _rtc_unlock
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164 164 EXTRN _vreg_ctr_read
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165 165 EXTRN _vreg_ctr_after_read
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166 166 EXTRN _vreg_ctr_write
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167 167 EXTBIT _irq_readed
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168 168 PUBLIC _iic_burst_state
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169 169 PUBLIC _int_iic_ctr
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170 170 PUBLIC _IIC_ctr_Init
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171 171 PUBLIC _IIC_ctr_Stop
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172 172
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173 173 ----- @@BITS BSEG
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174 174
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175 175 ----- @@CNST CSEG MIRRORP
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176 176 00000 01 _lpf_coeff: DB 01H ; 1
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177 177 00001 02 DB 02H ; 2
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178 178 00002 02 DB 02H ; 2
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179 179 00003 03 DB 03H ; 3
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180 180 00004 03 DB 03H ; 3
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181 181 00005 02 DB 02H ; 2
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182 182 00006 00 DB 00H ; 0
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183 183 00007 FE DB 0FEH ; 254
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184 184 00008 FB DB 0FBH ; 251
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185 185 00009 F7 DB 0F7H ; 247
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186 186 0000A F3 DB 0F3H ; 243
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187 187 0000B F0 DB 0F0H ; 240
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188 188 0000C F0 DB 0F0H ; 240
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189 189 0000D F3 DB 0F3H ; 243
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190 190 0000E FA DB 0FAH ; 250
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191 191 0000F 04 DB 04H ; 4
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192 192 00010 12 DB 012H ; 18
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193 193 00011 25 DB 025H ; 37
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194 194 00012 38 DB 038H ; 56
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195 195 00013 4D DB 04DH ; 77
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196 196 00014 5F DB 05FH ; 95
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197 197 00015 6E DB 06EH ; 110
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198 198 00016 77 DB 077H ; 119
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199 199 00017 7A DB 07AH ; 122
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200 200 00018 77 DB 077H ; 119
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201 201 00019 6E DB 06EH ; 110
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202 202 0001A 5F DB 05FH ; 95
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203 203 0001B 4D DB 04DH ; 77
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204 204 0001C 38 DB 038H ; 56
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205 205 0001D 25 DB 025H ; 37
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206 206 0001E 12 DB 012H ; 18
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207 207 0001F 04 DB 04H ; 4
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208 208 00020 FA DB 0FAH ; 250
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209 209 00021 F3 DB 0F3H ; 243
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210 210 00022 F0 DB 0F0H ; 240
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211 211 00023 F0 DB 0F0H ; 240
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212 212 00024 F3 DB 0F3H ; 243
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213 213 00025 F7 DB 0F7H ; 247
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214 214 00026 FB DB 0FBH ; 251
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215 215 00027 FE DB 0FEH ; 254
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216 216 00028 00 DB 00H ; 0
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217 217 00029 02 DB 02H ; 2
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218 218 0002A 03 DB 03H ; 3
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219 219 0002B 03 DB 03H ; 3
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220 220 0002C 02 DB 02H ; 2
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221 221 0002D 02 DB 02H ; 2
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222 222 0002E 01 DB 01H ; 1
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223 223 0002F 00 DB (1)
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224 224
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225 225 ----- @@R_INIT CSEG UNIT64KP
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226 226 00000 00 DB 00H ; 0
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227 227 00001 00 DB (1)
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228 228
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229 229 ----- @@INIT DSEG BASEP
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230 230 00000 ?L0003: DS (1)
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231 231 00001 DS (1)
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232 232
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233 233 ----- @@DATA DSEG BASEP
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234 234 00000 _iic_burst_state: DS (1)
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235 235 00001 ?L0004: DS (1)
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236 236 00002 ?L0005: DS (1)
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237 237 00003 ?L0006: DS (1)
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238 238
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239 239 ----- @@R_INIS CSEG UNIT64KP
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240 240
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241 241 ----- @@INIS DSEG SADDRP
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242 242
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243 243 ----- @@DATS DSEG SADDRP
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244 244
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245 245 ----- @@CNSTL CSEG PAGE64KP
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246 246
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247 247 ----- @@RLINIT CSEG UNIT64KP
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248 248
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249 249 ----- @@INITL DSEG UNIT64KP
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250 250
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251 251 ----- @@DATAL DSEG UNIT64KP
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252 252
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253 253 ----- @@CALT CSEG CALLT0
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254 254
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255 255 ; line 1 : /* ========================================================
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256 256 ; line 2 : <20><>SoC <20>V<EFBFBD>K<EFBFBD>`<60><><EFBFBD><EFBFBD><EFBFBD>l<EFBFBD><6C> I2C<32>ʐM
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257 257 ; line 3 : <20><><EFBFBD>c<EFBFBD><63><EFBFBD>J<EFBFBD>Z.nintendo
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258 258 ; line 4 : '09 Apr
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259 259 ; line 5 : ======================================================== */
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260 260 ; line 6 : #include "incs.h"
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261 261 ; line 7 : #include "accero.h"
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262 262 ; line 8 :
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263 263 ; line 9 : #ifdef _MCU_BSR_
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264 264 ; line 10 : // #ifdef _MODEL_TS0_ || _MODEL_WM0_
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265 265 ; line 11 :
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266 266 ; line 12 : // <20><><EFBFBD>[<5B>L<EFBFBD><4C><EFBFBD>O<EFBFBD><4F><EFBFBD>f<EFBFBD><66><EFBFBD><EFBFBD>I2C<32><43><EFBFBD>t
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267 267 ; line 13 : // TEG<45>͉<EFBFBD><CD89>H<EFBFBD>}<7D>Ńe<C583><65><EFBFBD>R
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268 268 ; line 14 : #define ACKD ACKD1
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269 269 ; line 15 : #define ACKE ACKE1
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270 270 ; line 16 : #define COI COI1
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||
271 271 ; line 17 : #define IICAEN IICA1EN
|
||
272 272 ; line 18 : #define IICRSV IICRSV1
|
||
273 273 ; line 19 : #define IICA IICA1
|
||
274 274 ; line 20 : #define IICAIF IICAIF1
|
||
275 275 ; line 21 : #define IICAMK IICAMK1
|
||
276 276 ; line 22 : #define IICAPR0 IICAPR11
|
||
277 277 ; line 23 : #define IICAPR1 IICAPR01
|
||
278 278 ; line 24 : #define IICCTL0 IICCTL10
|
||
279 279 ; line 25 : #define IICE IICE1
|
||
280 280 ; line 26 : #define IICF IICF1
|
||
281 281 ; line 27 : #define IICS IICS1
|
||
282 282 ; line 28 : #define IICWH IICWH1
|
||
283 283 ; line 29 : #define IICWL IICWL1
|
||
284 284 ; line 30 : #define LREL LREL1
|
||
285 285 ; line 31 : #define SPD SPD1
|
||
286 286 ; line 32 : #define SPIE SPIE1
|
||
287 287 ; line 33 : #define STCEN STCEN1
|
||
288 288 ; line 34 : #define STD STD1
|
||
289 289 ; line 35 : #define SVA SVA1
|
||
290 290 ; line 36 : #define WREL WREL1
|
||
291 291 ; line 37 : #define WTIM WTIM1
|
||
292 292 ; line 38 : #define TRC TRC1
|
||
293 293 ; line 39 : #define SMC SMC1
|
||
294 294 ; line 40 : #define DFC DFC1
|
||
295 295 ; line 41 :
|
||
296 296 ; line 42 :
|
||
297 297 ; line 43 : #endif
|
||
298 298 ; line 44 :
|
||
299 299 ; line 45 : // ==============================================
|
||
300 300 ; line 46 : extern bit irq_readed; // <20><><EFBFBD><EFBFBD><EFBFBD>ꂩ<EFBFBD><EA82A9>IRQ<52><51><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><>
|
||
301 301 ; <20>ǂ܂ꂽ
|
||
302 302 ; line 47 :
|
||
303 303 ; line 48 : u8 iic_burst_state;
|
||
304 304 ; line 49 :
|
||
305 305 ; line 50 :
|
||
306 306 ; line 51 : /* ========================================================
|
||
307 307 ; line 52 : ======================================================== */
|
||
308 308 ; line 53 : enum
|
||
309 309 ; line 54 : {
|
||
310 310 ; line 55 : IIC_IDLE = 0,
|
||
311 311 ; line 56 : IIC_RCV_REG_ADRS,
|
||
312 312 ; line 57 : IIC_TX_OR_RX,
|
||
313 313 ; line 58 : IIC_TX,
|
||
314 314 ; line 59 : IIC_RX
|
||
315 315 ; line 60 : };
|
||
316 316 ; line 61 :
|
||
317 317 ; line 62 :
|
||
318 318 ; line 63 : // 1<>o<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD><EFBFBD>̓x<CC93>Ɋ<EFBFBD><C98A>荞<EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>o<EFBFBD>[<5B>W<EFBFBD><57><EFBFBD><EFBFBD>
|
||
319 319 ; line 64 : __interrupt void int_iic_ctr( )
|
||
320 320 ; line 65 : {
|
||
321 321
|
||
322 322 ----- @@BASE CSEG BASE
|
||
323 323 00000 _int_iic_ctr:
|
||
324 324 $DGL 1,21
|
||
325 325 00000 C1 push ax ;[INF] 1, 1
|
||
326 326 00001 C3 push bc ;[INF] 1, 1
|
||
327 327 00002 C5 push de ;[INF] 1, 1
|
||
328 328 00003 C7 push hl ;[INF] 1, 1
|
||
329 329 00004 520C mov c,#0CH ;[INF] 2, 1
|
||
330 330 00006 92 dec c ;[INF] 1, 1
|
||
331 331 00007 92 dec c ;[INF] 1, 1
|
||
332 332 00008 R690000 movw ax,_@SEGAX[c] ;[INF] 3, 1
|
||
333 333 0000B C1 push ax ;[INF] 1, 1
|
||
334 334 0000C DFF8 bnz $$-6 ;[INF] 2, 4
|
||
335 335 0000E 8EFD mov a,ES ;[INF] 2, 1
|
||
336 336 00010 70 mov x,a ;[INF] 1, 1
|
||
337 337 00011 8EFC mov a,CS ;[INF] 2, 1
|
||
338 338 00013 C1 push ax ;[INF] 1, 1
|
||
339 339 00014 ??bf_int_iic_ctr:
|
||
340 340 ; line 66 : static u8 state = IIC_IDLE;
|
||
341 341 ; line 67 : static u8 reg_adrs;
|
||
342 342 ; line 68 : static u8 reg_adrs_internal;
|
||
343 343 ; line 69 : static u8 tx_buf;
|
||
344 344 ; line 70 : u8 rx_buf;
|
||
345 345 ; line 71 :
|
||
346 346 ; line 72 : EI();
|
||
347 347 $DGL 0,8
|
||
348 348 00014 717AFA ei ;[INF] 3, 4
|
||
349 349 ; line 73 :
|
||
350 350 ; line 74 : // <20>ǂݏo<DD8F><6F><EFBFBD>I<EFBFBD><49>
|
||
351 351 ; line 75 : if( !ACKD ) // <20><><EFBFBD>荞<EFBFBD>ݗv<DD97><76><EFBFBD><EFBFBD>NAK<41>i<EFBFBD>f<EFBFBD>[<5B>^<5E><><EFBFBD>M
|
||
352 352 ; <20>̍Ō<CC8D><C58C>j
|
||
353 353 $DGL 0,11
|
||
354 354 00017 C7 push hl ;[INF] 1, 1
|
||
355 355 00018 364105 movw hl,#0541H ; 1345 ;[INF] 3, 1
|
||
356 356 0001B 71A4 mov1 CY,[hl].2 ;[INF] 2, 1
|
||
357 357 0001D C6 pop hl ;[INF] 1, 1
|
||
358 358 0001E DC41 bc $?L0007 ;[INF] 2, 4
|
||
359 359 ; line 76 : {
|
||
360 360 00020 ??bb00_int_iic_ctr:
|
||
361 361 ; line 77 : state = IIC_IDLE;
|
||
362 362 $DGL 0,13
|
||
363 363 00020 RF50000 clrb !?L0003 ; state ;[INF] 3, 1
|
||
364 364 ; line 78 : SPIE = 0;
|
||
365 365 $DGL 0,14
|
||
366 366 00023 71485005 clr1 !IICCTL01.4 ;[INF] 4, 2
|
||
367 367 ; line 79 : LREL = 1;
|
||
368 368 $DGL 0,15
|
||
369 369 00027 71605005 set1 !IICCTL01.6 ;[INF] 4, 2
|
||
370 370 ; line 80 :
|
||
371 371 ; line 81 : // <20><><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E><><EFBFBD>[<5B>h<EFBFBD>ŁA<C581><41><EFBFBD>荞<EFBFBD>݃s<DD83><73><EFBFBD><EFBFBD><EFBFBD>l<EFBFBD>Q<EFBFBD>[<5B>g
|
||
372 372 ; line 82 : // <20>܂<EFBFBD><DC82>ǂ܂<C782><DC82>ĂȂ<C482><C882><EFBFBD><EFBFBD>荞<EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD><EFBFBD><EFBFBD>A<CE81>ēx<C493>A<EFBFBD>T<EFBFBD>[<5B>g
|
||
373 373 ; line 83 : if( irq_readed )
|
||
374 374 $DGL 0,19
|
||
375 375 0002B R31040026 bf _irq_readed,$?L0011 ;[INF] 4, 5
|
||
376 376 ; line 84 : {
|
||
377 377 0002F ??bb01_int_iic_ctr:
|
||
378 378 ; line 85 : IRQ0_neg;
|
||
379 379 $DGL 0,21
|
||
380 380 0002F ??bb02_int_iic_ctr:
|
||
381 381 0002F 716A27 set1 PM7.6 ;[INF] 3, 2
|
||
382 382 00032 ??eb02_int_iic_ctr:
|
||
383 383 ; line 86 : irq_readed = 0;
|
||
384 384 $DGL 0,22
|
||
385 385 00032 R710300 clr1 _irq_readed ;[INF] 3, 2
|
||
386 386 ; line 87 : if( !( ( vreg_ctr[VREG_C_IRQ0] == 0 )
|
||
387 387 ; line 88 : && ( vreg_ctr[VREG_C_IRQ1] == 0 )
|
||
388 388 ; line 89 : && ( vreg_ctr[VREG_C_IRQ2] == 0 )
|
||
389 389 ; line 90 : && ( vreg_ctr[VREG_C_IRQ3] == 0 ) ) )
|
||
390 390 $DGL 0,26
|
||
391 391 00035 RD51000 cmp0 !_vreg_ctr+16 ;[INF] 3, 1
|
||
392 392 00038 DF0F bnz $?L0013 ;[INF] 2, 4
|
||
393 393 0003A RD51100 cmp0 !_vreg_ctr+17 ;[INF] 3, 1
|
||
394 394 0003D DF0A bnz $?L0013 ;[INF] 2, 4
|
||
395 395 0003F RD51200 cmp0 !_vreg_ctr+18 ;[INF] 3, 1
|
||
396 396 00042 DF05 bnz $?L0013 ;[INF] 2, 4
|
||
397 397 00044 RD51300 cmp0 !_vreg_ctr+19 ;[INF] 3, 1
|
||
398 398 00047 DD0C bz $?L0011 ;[INF] 2, 4
|
||
399 399 00049 ?L0013:
|
||
400 400 ; line 91 : {
|
||
401 401 00049 ??bb03_int_iic_ctr:
|
||
402 402 ; line 92 : while( !IRQ0 ){;} // <20><><EFBFBD>ԉ҂<D489><D282>s<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD>
|
||
403 403 $DGL 0,28
|
||
404 404 00049 31620702 bt P7.6,$?L0015 ;[INF] 4, 5
|
||
405 405 0004D ??bb04_int_iic_ctr:
|
||
406 406 0004D ??eb04_int_iic_ctr:
|
||
407 407 0004D EFFA br $?L0013 ;[INF] 2, 3
|
||
408 408 0004F ?L0015:
|
||
409 409 ; line 93 : IRQ0_ast;
|
||
410 410 $DGL 0,29
|
||
411 411 0004F ??bb05_int_iic_ctr:
|
||
412 412 0004F 716307 clr1 P7.6 ;[INF] 3, 2
|
||
413 413 00052 716B27 clr1 PM7.6 ;[INF] 3, 2
|
||
414 414 00055 ??eb05_int_iic_ctr:
|
||
415 415 00055 ??eb03_int_iic_ctr:
|
||
416 416 ; line 94 : }
|
||
417 417 00055 ?L0011:
|
||
418 418 00055 ??eb01_int_iic_ctr:
|
||
419 419 ; line 95 : }
|
||
420 420 ; line 96 :
|
||
421 421 ; line 97 : // <20><><EFBFBD><EFBFBD><EFBFBD>v<EFBFBD>ǂݏo<DD8F><6F><EFBFBD>I<EFBFBD><49>
|
||
422 422 ; line 98 : hosu_read_end( );
|
||
423 423 $DGL 0,34
|
||
424 424 00055 RFD0000 call !_hosu_read_end ;[INF] 3, 3
|
||
425 425 ; line 99 : rtc_unlock( );
|
||
426 426 $DGL 0,35
|
||
427 427 00058 RFD0000 call !_rtc_unlock ;[INF] 3, 3
|
||
428 428 ; line 100 : iic_burst_state = 0;
|
||
429 429 $DGL 0,36
|
||
430 430 0005B RF50000 clrb !_iic_burst_state ;[INF] 3, 1
|
||
431 431 ; line 101 : return;
|
||
432 432 $DGL 0,37
|
||
433 433 0005E RED4B01 br !?L0023 ;[INF] 3, 3
|
||
434 434 00061 ??eb00_int_iic_ctr:
|
||
435 435 ; line 102 : }
|
||
436 436 00061 ?L0007:
|
||
437 437 ; line 103 :
|
||
438 438 ; line 104 : if( SPD ) // <20><><EFBFBD>荞<EFBFBD>ݗv<DD97><76><EFBFBD>̓X<CD83>g<EFBFBD>b<EFBFBD>v<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B
|
||
439 439 ; <20>V<EFBFBD><56><EFBFBD><EFBFBD>
|
||
440 440 $DGL 0,40
|
||
441 441 00061 C7 push hl ;[INF] 1, 1
|
||
442 442 00062 364105 movw hl,#0541H ; 1345 ;[INF] 3, 1
|
||
443 443 00065 7184 mov1 CY,[hl].0 ;[INF] 2, 1
|
||
444 444 00067 C6 pop hl ;[INF] 1, 1
|
||
445 445 00068 DE0D bnc $?L0016 ;[INF] 2, 4
|
||
446 446 ; line 105 : // <20>ʐM<CA90>̍Ō<CC8D><C58C>B<EFBFBD><42><EFBFBD><EFBFBD> !ACKD <20>ɗ<EFBFBD><C997><EFBFBD>
|
||
447 447 ; <20>Ƃ<EFBFBD><C682>͊<EFBFBD><CD8A>荞<EFBFBD>ݗ<EFBFBD><DD97>Ȃ<EFBFBD> (SPIE = 0 <20>̂<EFBFBD><CC82><EFBFBD> )
|
||
448 448 ; line 106 : {
|
||
449 449 0006A ??bb06_int_iic_ctr:
|
||
450 450 ; line 107 : state = IIC_IDLE;
|
||
451 451 $DGL 0,43
|
||
452 452 0006A RF50000 clrb !?L0003 ; state ;[INF] 3, 1
|
||
453 453 ; line 108 : SPIE = 0;
|
||
454 454 $DGL 0,44
|
||
455 455 0006D 71485005 clr1 !IICCTL01.4 ;[INF] 4, 2
|
||
456 456 ; line 109 : // I2C<32>I<EFBFBD><49><EFBFBD><EFBFBD><EFBFBD>ɉ<EFBFBD><C989><EFBFBD><EFBFBD><EFBFBD><EFBFBD>镨 //
|
||
457 457 ; line 110 : rtc_unlock( );
|
||
458 458 $DGL 0,46
|
||
459 459 00071 RFD0000 call !_rtc_unlock ;[INF] 3, 3
|
||
460 460 ; line 111 : return;
|
||
461 461 $DGL 0,47
|
||
462 462 00074 RED4B01 br !?L0023 ;[INF] 3, 3
|
||
463 463 00077 ??eb06_int_iic_ctr:
|
||
464 464 ; line 112 : }
|
||
465 465 00077 ?L0016:
|
||
466 466 ; line 113 :
|
||
467 467 ; line 114 : if( STD ) // <20><><EFBFBD>荞<EFBFBD>ݗv<DD97><76><EFBFBD>F<EFBFBD>X<EFBFBD>^<5E>[<5B>g<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B
|
||
468 468 ; <20>V<EFBFBD><56><EFBFBD><EFBFBD>
|
||
469 469 $DGL 0,50
|
||
470 470 00077 C7 push hl ;[INF] 1, 1
|
||
471 471 00078 364105 movw hl,#0541H ; 1345 ;[INF] 3, 1
|
||
472 472 0007B 7194 mov1 CY,[hl].1 ;[INF] 2, 1
|
||
473 473 0007D C6 pop hl ;[INF] 1, 1
|
||
474 474 0007E DE15 bnc $?L0020 ;[INF] 2, 4
|
||
475 475 ; line 115 : {
|
||
476 476 00080 ??bb07_int_iic_ctr:
|
||
477 477 ; line 116 : if( ( state == IIC_TX ) || ( state == IIC_RX )
|
||
478 478 ; line 117 : || ( state == IIC_RCV_REG_ADRS )
|
||
479 479 $DGL 0,53
|
||
480 480 00080 R40000003 cmp !?L0003,#03H ; state,3 ;[INF] 4, 1
|
||
481 481 00084 DD0C bz $?L0022 ;[INF] 2, 4
|
||
482 482 00086 R40000004 cmp !?L0003,#04H ; state,4 ;[INF] 4, 1
|
||
483 483 0008A DD06 bz $?L0022 ;[INF] 2, 4
|
||
484 484 0008C R40000001 cmp !?L0003,#01H ; state,1 ;[INF] 4, 1
|
||
485 485 00090 61F8 sknz ;[INF] 2, 1
|
||
486 486 00092 ?L0022:
|
||
487 487 ; line 118 : )
|
||
488 488 ; line 119 : {
|
||
489 489 00092 ??bb08_int_iic_ctr:
|
||
490 490 ; line 120 : state = IIC_IDLE;
|
||
491 491 $DGL 0,56
|
||
492 492 00092 RF50000 clrb !?L0003 ; state ;[INF] 3, 1
|
||
493 493 00095 ??eb08_int_iic_ctr:
|
||
494 494 ; line 121 : // no break //
|
||
495 495 ; line 122 : }
|
||
496 496 00095 ?L0020:
|
||
497 497 00095 ??eb07_int_iic_ctr:
|
||
498 498 ; line 123 : }
|
||
499 499 ; line 124 :
|
||
500 500 ; line 125 : switch ( state )
|
||
501 501 $DGL 0,61
|
||
502 502 00095 RD90000 mov x,!?L0003 ; state ;[INF] 3, 1
|
||
503 503 00098 F1 clrb a ;[INF] 1, 1
|
||
504 504 00099 E7 onew bc ;[INF] 1, 1
|
||
505 505 0009A 240000 subw ax,#00H ; 0 ;[INF] 3, 1
|
||
506 506 0009D DD08 bz $?L0024 ;[INF] 2, 4
|
||
507 507 0009F 23 subw ax,bc ;[INF] 1, 1
|
||
508 508 000A0 DD13 bz $?L0025 ;[INF] 2, 4
|
||
509 509 000A2 23 subw ax,bc ;[INF] 1, 1
|
||
510 510 000A3 DD36 bz $?L0026 ;[INF] 2, 4
|
||
511 511 000A5 EF5D br $?L0033 ;[INF] 2, 3
|
||
512 512 ; line 126 : {
|
||
513 513 000A7 ??bb09_int_iic_ctr:
|
||
514 514 ; line 127 : case ( IIC_IDLE ):
|
||
515 515 000A7 ?L0024:
|
||
516 516 ; line 128 : // <20><><EFBFBD>njĂяo<D18F><6F><EFBFBD>ɉ<EFBFBD><C989><EFBFBD><EFBFBD>B
|
||
517 517 ; line 129 : // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD>
|
||
518 518 ; line 130 : SPIE = 1;
|
||
519 519 $DGL 0,66
|
||
520 520 000A7 71405005 set1 !IICCTL01.4 ;[INF] 4, 2
|
||
521 521 ; line 131 : state = IIC_RCV_REG_ADRS;
|
||
522 522 $DGL 0,67
|
||
523 523 000AB RE50000 oneb !?L0003 ; state ;[INF] 3, 1
|
||
524 524 ; line 132 : WREL = 1; // <20>E<EFBFBD>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD>
|
||
525 525 $DGL 0,68
|
||
526 526 000AE 71505005 set1 !IICCTL01.5 ;[INF] 4, 2
|
||
527 527 ; line 133 : break;
|
||
528 528 $DGL 0,69
|
||
529 529 000B2 RED4B01 br !?L0023 ;[INF] 3, 3
|
||
530 530 ; line 134 :
|
||
531 531 ; line 135 : case ( IIC_RCV_REG_ADRS ): // <20>Q<EFBFBD>o<EFBFBD>C<EFBFBD>g<EFBFBD>ځi<DA81><69><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>A<EFBFBD>h<EFBFBD><68><EFBFBD>X<EFBFBD>j
|
||
532 532 ; <20><><EFBFBD>M<EFBFBD><4D><EFBFBD>ɗ<EFBFBD><C997><EFBFBD>
|
||
533 533 000B5 ?L0025:
|
||
534 534 ; line 136 : // <20><><EFBFBD>W<EFBFBD>X<EFBFBD>^<5E>A<EFBFBD>h<EFBFBD><68><EFBFBD>X<EFBFBD><58><EFBFBD>M
|
||
535 535 ; line 137 : reg_adrs = IICA;
|
||
536 536 $DGL 0,73
|
||
537 537 000B5 8F4005 mov a,!IICA1 ;[INF] 3, 1
|
||
538 538 000B8 R9F0100 mov !?L0004,a ; reg_adrs ;[INF] 3, 1
|
||
539 539 ; line 138 : tx_buf = vreg_ctr_read( reg_adrs ); // <20>f<EFBFBD>[<5B>^<5E>̏<EFBFBD><CC8F><EFBFBD><EFBFBD><EFBFBD>
|
||
540 540 ; <20><><EFBFBD>Ă<EFBFBD><C482><EFBFBD>
|
||
541 541 $DGL 0,74
|
||
542 542 000BB RD90100 mov x,!?L0004 ; reg_adrs ;[INF] 3, 1
|
||
543 543 000BE F1 clrb a ;[INF] 1, 1
|
||
544 544 000BF RFD0000 call !_vreg_ctr_read ;[INF] 3, 3
|
||
545 545 000C2 62 mov a,c ;[INF] 1, 1
|
||
546 546 000C3 R9F0300 mov !?L0006,a ; tx_buf ;[INF] 3, 1
|
||
547 547 ; line 139 : if( reg_adrs != VREG_C_INFO )
|
||
548 548 $DGL 0,75
|
||
549 549 000C6 R4001007F cmp !?L0004,#07FH ; reg_adrs,127 ;[INF] 4, 1
|
||
550 550 000CA DD06 bz $?L0030 ;[INF] 2, 4
|
||
551 551 ; line 140 : {
|
||
552 552 000CC ??bb0A_int_iic_ctr:
|
||
553 553 ; line 141 : state = IIC_TX_OR_RX;
|
||
554 554 $DGL 0,77
|
||
555 555 000CC RCF000002 mov !?L0003,#02H ; state,2 ;[INF] 4, 1
|
||
556 556 000D0 ??eb0A_int_iic_ctr:
|
||
557 557 ; line 142 : }
|
||
558 558 $DGL 0,78
|
||
559 559 000D0 EF03 br $?L0031 ;[INF] 2, 3
|
||
560 560 000D2 ?L0030:
|
||
561 561 ; line 143 : else
|
||
562 562 ; line 144 : {
|
||
563 563 000D2 ??bb0B_int_iic_ctr:
|
||
564 564 ; line 145 : state = IIC_IDLE;
|
||
565 565 $DGL 0,81
|
||
566 566 000D2 RF50000 clrb !?L0003 ; state ;[INF] 3, 1
|
||
567 567 000D5 ??eb0B_int_iic_ctr:
|
||
568 568 ; line 146 : }
|
||
569 569 000D5 ?L0031:
|
||
570 570 ; line 147 : WREL = 1;
|
||
571 571 $DGL 0,83
|
||
572 572 000D5 71505005 set1 !IICCTL01.5 ;[INF] 4, 2
|
||
573 573 ; line 148 : break;
|
||
574 574 $DGL 0,84
|
||
575 575 000D9 EF70 br $?L0023 ;[INF] 2, 3
|
||
576 576 ; line 149 :
|
||
577 577 ; line 150 : case ( IIC_TX_OR_RX ): // <20><><EFBFBD>̎<EFBFBD><CC8E>ɗ<EFBFBD><C997>銄<EFBFBD>荞<EFBFBD>݁BST<53>Ȃ瑗
|
||
578 578 ; <20>M<EFBFBD><4D><EFBFBD><EFBFBD><EFBFBD>A<EFBFBD>f<EFBFBD>[<5B>^<5E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>珑<EFBFBD><E78F91><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD>
|
||
579 579 000DB ?L0026:
|
||
580 580 ; line 151 : // if( TRC ){ // <20><><EFBFBD>M<EFBFBD><4D><EFBFBD><EFBFBD><EFBFBD>t<EFBFBD><74><EFBFBD>O <20>ŋ<EFBFBD><C58B>ʂ<EFBFBD><CA82><EFBFBD><EFBFBD>̂́A<CD81><41><EFBFBD><EFBFBD>
|
||
581 581 ; <20><><EFBFBD>ݒx<DD92><78><EFBFBD><EFBFBD><EFBFBD>ɕs<C995><EFBFBD><EF8D87><EFBFBD>N<EFBFBD><4E><EFBFBD>肦<EFBFBD><E882A6>
|
||
582 582 ; line 152 : if( STD )
|
||
583 583 $DGL 0,88
|
||
584 584 000DB C7 push hl ;[INF] 1, 1
|
||
585 585 000DC 364105 movw hl,#0541H ; 1345 ;[INF] 3, 1
|
||
586 586 000DF 7194 mov1 CY,[hl].1 ;[INF] 2, 1
|
||
587 587 000E1 C6 pop hl ;[INF] 1, 1
|
||
588 588 000E2 DE1C bnc $?L0032 ;[INF] 2, 4
|
||
589 589 ; line 153 : { // <20>X<EFBFBD>^<5E>[<5B>g<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>o<EFBFBD>t<EFBFBD><74>
|
||
590 590 ; <20>O
|
||
591 591 000E4 ??bb0C_int_iic_ctr:
|
||
592 592 ; line 154 : // <20><><EFBFBD>[<5B>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
593 593 ; line 155 : if( COI )
|
||
594 594 $DGL 0,91
|
||
595 595 000E4 C7 push hl ;[INF] 1, 1
|
||
596 596 000E5 364105 movw hl,#0541H ; 1345 ;[INF] 3, 1
|
||
597 597 000E8 71C4 mov1 CY,[hl].4 ;[INF] 2, 1
|
||
598 598 000EA C6 pop hl ;[INF] 1, 1
|
||
599 599 000EB DE06 bnc $?L0034 ;[INF] 2, 4
|
||
600 600 ; line 156 : { // <20>A<EFBFBD>h<EFBFBD><68><EFBFBD>X<EFBFBD><58><EFBFBD>v<EFBFBD>t<EFBFBD><74><EFBFBD>O
|
||
601 601 000ED ??bb0D_int_iic_ctr:
|
||
602 602 ; line 157 : state = IIC_TX;
|
||
603 603 $DGL 0,93
|
||
604 604 000ED RCF000003 mov !?L0003,#03H ; state,3 ;[INF] 4, 1
|
||
605 605 000F1 ??eb0D_int_iic_ctr:
|
||
606 606 ; line 158 : // no break, no return //
|
||
607 607 ; line 159 : }
|
||
608 608 $DGL 0,95
|
||
609 609 000F1 EF11 br $?L0033 ;[INF] 2, 3
|
||
610 610 000F3 ?L0034:
|
||
611 611 ; line 160 : else
|
||
612 612 ; line 161 : {
|
||
613 613 000F3 ??bb0E_int_iic_ctr:
|
||
614 614 ; line 162 : // <20><><EFBFBD>X<EFBFBD>^<5E>[<5B>g<EFBFBD>ňႤ<C588>f<EFBFBD>o<EFBFBD>C<EFBFBD>X<EFBFBD><58><EFBFBD>Ăꂽ<CE82>I
|
||
615 615 ; line 163 : state = IIC_IDLE; // <20>I<EFBFBD><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
616 616 $DGL 0,99
|
||
617 617 000F3 RF50000 clrb !?L0003 ; state ;[INF] 3, 1
|
||
618 618 ; line 164 : SPIE = 0;
|
||
619 619 $DGL 0,100
|
||
620 620 000F6 71485005 clr1 !IICCTL01.4 ;[INF] 4, 2
|
||
621 621 ; line 165 : LREL = 1; // <20>E<EFBFBD>F<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD><EFBFBD>?
|
||
622 622 $DGL 0,101
|
||
623 623 000FA 71605005 set1 !IICCTL01.6 ;[INF] 4, 2
|
||
624 624 ; line 166 : return;
|
||
625 625 $DGL 0,102
|
||
626 626 000FE EF4B br $?L0023 ;[INF] 2, 3
|
||
627 627 00100 ??eb0E_int_iic_ctr:
|
||
628 628 ; line 167 : }
|
||
629 629 ; line 168 : }
|
||
630 630 00100 ??eb0C_int_iic_ctr:
|
||
631 631 00100 ?L0032:
|
||
632 632 ; line 169 : else
|
||
633 633 ; line 170 : {
|
||
634 634 00100 ??bb0F_int_iic_ctr:
|
||
635 635 ; line 171 : state = IIC_RX; // <20>f<EFBFBD>[<5B>^1<>o<EFBFBD>C<EFBFBD>g<EFBFBD><67><EFBFBD>M<EFBFBD>̊<EFBFBD><CC8A>荞<EFBFBD>݂<EFBFBD>
|
||
636 636 ; <20><><EFBFBD><EFBFBD>
|
||
637 637 $DGL 0,107
|
||
638 638 00100 RCF000004 mov !?L0003,#04H ; state,4 ;[INF] 4, 1
|
||
639 639 00104 ??eb0F_int_iic_ctr:
|
||
640 640 ; line 172 : // no break, no return //
|
||
641 641 ; line 173 : }
|
||
642 642 00104 ?L0033:
|
||
643 643 ; line 174 :
|
||
644 644 ; line 175 : default: // <20>o<EFBFBD>[<5B>X<EFBFBD>g R/W <20>ł<EFBFBD><C582><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
645 645 ; <20><EFBFBD><CE82>邱<EFBFBD>ƂɂȂ<C982>
|
||
646 646 ; line 176 : if( state == IIC_TX )
|
||
647 647 $DGL 0,112
|
||
648 648 00104 R40000003 cmp !?L0003,#03H ; state,3 ;[INF] 4, 1
|
||
649 649 00108 DF0F bnz $?L0036 ;[INF] 2, 4
|
||
650 650 ; line 177 : { // <20><><EFBFBD>M
|
||
651 651 0010A ??bb10_int_iic_ctr:
|
||
652 652 ; line 178 : IICA = tx_buf;
|
||
653 653 $DGL 0,114
|
||
654 654 0010A R8F0300 mov a,!?L0006 ; tx_buf ;[INF] 3, 1
|
||
655 655 0010D 9F4005 mov !IICA1,a ;[INF] 3, 1
|
||
656 656 ; line 179 : vreg_ctr_after_read( reg_adrs ); // <20>ǂ<C782><F182BE82>N<EFBFBD><4E><EFBFBD>A
|
||
657 657 ; <20>Ȃǂ̏<C782><CC8F><EFBFBD>
|
||
658 658 $DGL 0,115
|
||
659 659 00110 RD90100 mov x,!?L0004 ; reg_adrs ;[INF] 3, 1
|
||
660 660 00113 F1 clrb a ;[INF] 1, 1
|
||
661 661 00114 RFD0000 call !_vreg_ctr_after_read ;[INF] 3, 3
|
||
662 662 00117 ??eb10_int_iic_ctr:
|
||
663 663 ; line 180 : }
|
||
664 664 $DGL 0,116
|
||
665 665 00117 EF12 br $?L0037 ;[INF] 2, 3
|
||
666 666 00119 ?L0036:
|
||
667 667 ; line 181 : else
|
||
668 668 ; line 182 : { // <20><><EFBFBD>M
|
||
669 669 00119 ??bb11_int_iic_ctr:
|
||
670 670 ; line 183 : rx_buf = IICA;
|
||
671 671 $DGL 0,119
|
||
672 672 00119 8F4005 mov a,!IICA1 ;[INF] 3, 1
|
||
673 673 0011C 76 mov l,a ;[INF] 1, 1
|
||
674 674 ; line 184 : vreg_ctr_write( reg_adrs, rx_buf );
|
||
675 675 $DGL 0,120
|
||
676 676 0011D 17 movw ax,hl ;[INF] 1, 1
|
||
677 677 0011E F1 clrb a ;[INF] 1, 1
|
||
678 678 0011F C1 push ax ;[INF] 1, 1
|
||
679 679 00120 RD90100 mov x,!?L0004 ; reg_adrs ;[INF] 3, 1
|
||
680 680 00123 RFD0000 call !_vreg_ctr_write ;[INF] 3, 3
|
||
681 681 00126 C0 pop ax ;[INF] 1, 1
|
||
682 682 ; line 185 : WREL = 1;
|
||
683 683 $DGL 0,121
|
||
684 684 00127 71505005 set1 !IICCTL01.5 ;[INF] 4, 2
|
||
685 685 0012B ??eb11_int_iic_ctr:
|
||
686 686 ; line 186 : }
|
||
687 687 0012B ?L0037:
|
||
688 688 ; line 187 : //
|
||
689 689 ; line 188 : if( ( reg_adrs != VREG_C_ACC_HOSU_HIST )
|
||
690 690 ; line 189 : && ( reg_adrs != VREG_C_INFO ) )
|
||
691 691 $DGL 0,125
|
||
692 692 0012B R4001004F cmp !?L0004,#04FH ; reg_adrs,79 ;[INF] 4, 1
|
||
693 693 0012F DD09 bz $?L0038 ;[INF] 2, 4
|
||
694 694 00131 R4001007F cmp !?L0004,#07FH ; reg_adrs,127 ;[INF] 4, 1
|
||
695 695 00135 61E8 skz ;[INF] 2, 1
|
||
696 696 ; line 190 : { // <20><><EFBFBD>̓<EFBFBD><CC93>̃<C282><CC83>W<EFBFBD>X<EFBFBD>^<5E>͓<EFBFBD><CD93><EFBFBD><EFBFBD>ȃA<C883>N<EFBFBD>Z<EFBFBD>X<EFBFBD><58><EFBFBD>@<40><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>B<EFBFBD>A<EFBFBD>N
|
||
697 697 ; <20>Z<EFBFBD>X<EFBFBD>|<7C>C<EFBFBD><43><EFBFBD>^<5E><><EFBFBD>i<EFBFBD>߂Ȃ<DF82><C882>B
|
||
698 698 00137 ??bb12_int_iic_ctr:
|
||
699 699 ; line 191 : reg_adrs += 1;
|
||
700 700 $DGL 0,127
|
||
701 701 00137 RA00100 inc !?L0004 ; reg_adrs ;[INF] 3, 2
|
||
702 702 0013A ??eb12_int_iic_ctr:
|
||
703 703 ; line 192 : }
|
||
704 704 0013A ?L0038:
|
||
705 705 ; line 193 :
|
||
706 706 ; line 194 : if( state == IIC_TX )
|
||
707 707 $DGL 0,130
|
||
708 708 0013A R40000003 cmp !?L0003,#03H ; state,3 ;[INF] 4, 1
|
||
709 709 0013E DF0B bnz $?L0023 ;[INF] 2, 4
|
||
710 710 ; line 195 : { // <20><><EFBFBD><EFBFBD><EFBFBD>ɂ<C982><C282>ɑ<EFBFBD><C991><EFBFBD><EFBFBD>f<EFBFBD>[<5B>^<5E>̏<EFBFBD><CC8F><EFBFBD><EFBFBD><EFBFBD>
|
||
711 711 ; <20><><EFBFBD>V<EFBFBD>e<EFBFBD>I<EFBFBD>N<EFBFBD>BSP<53><50><EFBFBD><EFBFBD><EFBFBD>Ďg<C48E><67><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD>
|
||
712 712 00140 ??bb13_int_iic_ctr:
|
||
713 713 ; line 196 : tx_buf = vreg_ctr_read( reg_adrs );
|
||
714 714 $DGL 0,132
|
||
715 715 00140 RD90100 mov x,!?L0004 ; reg_adrs ;[INF] 3, 1
|
||
716 716 00143 F1 clrb a ;[INF] 1, 1
|
||
717 717 00144 RFD0000 call !_vreg_ctr_read ;[INF] 3, 3
|
||
718 718 00147 62 mov a,c ;[INF] 1, 1
|
||
719 719 00148 R9F0300 mov !?L0006,a ; tx_buf ;[INF] 3, 1
|
||
720 720 0014B ??eb13_int_iic_ctr:
|
||
721 721 ; line 197 : }
|
||
722 722 ; line 198 : break;
|
||
723 723 0014B ??eb09_int_iic_ctr:
|
||
724 724 ; line 199 : }
|
||
725 725 0014B ?L0023:
|
||
726 726 ; line 200 : }
|
||
727 727 $DGL 0,136
|
||
728 728 0014B ??ef_int_iic_ctr:
|
||
729 729 0014B C0 pop ax ;[INF] 1, 1
|
||
730 730 0014C 9EFC mov CS,a ;[INF] 2, 1
|
||
731 731 0014E 60 mov a,x ;[INF] 1, 1
|
||
732 732 0014F 9EFD mov ES,a ;[INF] 2, 1
|
||
733 733 00151 R340000 movw de,#_@SEGAX ;[INF] 3, 1
|
||
734 734 00154 5206 mov c,#06H ;[INF] 2, 1
|
||
735 735 00156 C0 pop ax ;[INF] 1, 1
|
||
736 736 00157 B9 movw [de],ax ;[INF] 1, 1
|
||
737 737 00158 A5 incw de ;[INF] 1, 1
|
||
738 738 00159 A5 incw de ;[INF] 1, 1
|
||
739 739 0015A 92 dec c ;[INF] 1, 1
|
||
740 740 0015B DFF9 bnz $$-5 ;[INF] 2, 4
|
||
741 741 0015D C6 pop hl ;[INF] 1, 1
|
||
742 742 0015E C4 pop de ;[INF] 1, 1
|
||
743 743 0015F C2 pop bc ;[INF] 1, 1
|
||
744 744 00160 C0 pop ax ;[INF] 1, 1
|
||
745 745 00161 61FC reti ;[INF] 2, 6
|
||
746 746 00163 ??ee_int_iic_ctr:
|
||
747 747 ; line 201 :
|
||
748 748 ; line 202 :
|
||
749 749 ; line 203 :
|
||
750 750 ; line 204 : // ========================================================
|
||
751 751 ; line 205 : void IIC_ctr_Init( void )
|
||
752 752 ; line 206 : {
|
||
753 753
|
||
754 754 ----- ROM_CODE CSEG BASE
|
||
755 755 00000 _IIC_ctr_Init:
|
||
756 756 $DGL 1,112
|
||
757 757 00000 ??bf_IIC_ctr_Init:
|
||
758 758 ; line 207 :
|
||
759 759 ; line 208 : IICAEN = 1;
|
||
760 760 $DGL 0,3
|
||
761 761 00000 71000105 set1 !PER3.0 ;[INF] 4, 2
|
||
762 762 ; line 209 :
|
||
763 763 ; line 210 : IICE = 0; /* IICA disable */
|
||
764 764 $DGL 0,5
|
||
765 765 00004 71785005 clr1 !IICCTL01.7 ;[INF] 4, 2
|
||
766 766 ; line 211 :
|
||
767 767 ; line 212 : IICAMK = 1; /* INTIICA disable */
|
||
768 768 $DGL 0,7
|
||
769 769 00008 713AD5 set1 MK2H.3 ;[INF] 3, 2
|
||
770 770 ; line 213 : IICAIF = 0; /* clear INTIICA interrupt flag
|
||
771 771 ; */
|
||
772 772 $DGL 0,8
|
||
773 773 0000B 713BD1 clr1 IF2H.3 ;[INF] 3, 2
|
||
774 774 ; line 214 :
|
||
775 775 ; line 215 : IICAPR0 = 1; /* set INTIICA high priority */
|
||
776 776 $DGL 0,10
|
||
777 777 0000E 713ADD set1 PR12H.3 ;[INF] 3, 2
|
||
778 778 ; line 216 : IICAPR1 = 0; /* set INTIICA high priority */
|
||
779 779 $DGL 0,11
|
||
780 780 00011 713BD9 clr1 PR02H.3 ;[INF] 3, 2
|
||
781 781 ; line 217 :
|
||
782 782 ; line 218 : #ifdef _MODEL_TEG2_
|
||
783 783 ; line 219 : P6 &= ~0x3;
|
||
784 784 ; line 220 : #else
|
||
785 785 ; line 221 : P20 &= ~0x3;
|
||
786 786 $DGL 0,16
|
||
787 787 00014 8F1005 mov a,!P20 ;[INF] 3, 1
|
||
788 788 00017 5CFC and a,#0FCH ; 252 ;[INF] 2, 1
|
||
789 789 00019 9F1005 mov !P20,a ;[INF] 3, 1
|
||
790 790 ; line 222 : #endif
|
||
791 791 ; line 223 :
|
||
792 792 ; line 224 : SVA = IIC_C_SLAVEADDRESS;
|
||
793 793 $DGL 0,19
|
||
794 794 0001C CF54054A mov !SVA1,#04AH ; 74 ;[INF] 4, 1
|
||
795 795 ; line 225 : IICF = 0x01;
|
||
796 796 $DGL 0,20
|
||
797 797 00020 E54205 oneb !IICF1 ;[INF] 3, 1
|
||
798 798 ; line 226 :
|
||
799 799 ; line 227 : STCEN = 1; // <20><><EFBFBD>X<EFBFBD>^<5E>[<5B>g<EFBFBD>̋<EFBFBD><CC8B><EFBFBD>
|
||
800 800 $DGL 0,22
|
||
801 801 00023 71104205 set1 !IICF1.1 ;[INF] 4, 2
|
||
802 802 ; line 228 : IICRSV = 1; // <20>ʐM<CA90>\<5C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD>:<3A>X<EFBFBD><58><EFBFBD>[<5B>u<EFBFBD><75>
|
||
803 803 ; <20>O<EFBFBD><4F><EFBFBD><EFBFBD>
|
||
804 804 $DGL 0,23
|
||
805 805 00027 71004205 set1 !IICF1.0 ;[INF] 4, 2
|
||
806 806 ; line 229 :
|
||
807 807 ; line 230 : SPIE = 0; // <20>X<EFBFBD>g<EFBFBD>b<EFBFBD>v<EFBFBD>R<EFBFBD><52><EFBFBD>f<EFBFBD>B<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD>ł̊<C582><CC8A><EFBFBD>
|
||
808 808 ; <20><><EFBFBD>݂<EFBFBD><DD82>֎~
|
||
809 809 $DGL 0,25
|
||
810 810 0002B 71485005 clr1 !IICCTL01.4 ;[INF] 4, 2
|
||
811 811 ; line 231 : WTIM = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD>Ԃ<EFBFBD><D482><EFBFBD><EFBFBD><EFBFBD>clk<6C><6B>L<EFBFBD>Ɍ<EFBFBD>
|
||
812 812 ; <20>肷<EFBFBD><E882B7>
|
||
813 813 $DGL 0,26
|
||
814 814 0002F 71305005 set1 !IICCTL01.3 ;[INF] 4, 2
|
||
815 815 ; line 232 : ACKE = 1; // <20>_<EFBFBD><5F>CPU<50>͖<EFBFBD><CD96><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ď<EFBFBD><C48E>̒ʐM<CA90><4D><EFBFBD><EFBFBD>
|
||
816 816 ; <20><><EFBFBD>߂邩<DF82><E982A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD>ő<EFBFBD><C591><EFBFBD>clk<6C><6B><EFBFBD>J<EFBFBD><4A><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD>Ȃ<EFBFBD>
|
||
817 817 $DGL 0,27
|
||
818 818 00033 71205005 set1 !IICCTL01.2 ;[INF] 4, 2
|
||
819 819 ; line 233 :
|
||
820 820 ; line 234 : IICWH = 5;
|
||
821 821 $DGL 0,29
|
||
822 822 00037 CF530505 mov !IICWH1,#05H ; 5 ;[INF] 4, 1
|
||
823 823 ; line 235 : IICWL = 10; // L<><4C><EFBFBD>Ԃ̒<D482><CC92><EFBFBD>
|
||
824 824 $DGL 0,30
|
||
825 825 0003B CF52050A mov !IICWL1,#0AH ; 10 ;[INF] 4, 1
|
||
826 826 ; line 236 :
|
||
827 827 ; line 237 : SMC = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>[<5B>h
|
||
828 828 $DGL 0,32
|
||
829 829 0003F 71305105 set1 !IICCTL11.3 ;[INF] 4, 2
|
||
830 830 ; line 238 : DFC = 1; // <20>f<EFBFBD>W<EFBFBD>^<5E><><EFBFBD>t<EFBFBD>B<EFBFBD><42><EFBFBD>^on (@fast mod
|
||
831 831 ; e)
|
||
832 832 $DGL 0,33
|
||
833 833 00043 71205105 set1 !IICCTL11.2 ;[INF] 4, 2
|
||
834 834 ; line 239 :
|
||
835 835 ; line 240 : IICAMK = 0; // <20><><EFBFBD>荞<EFBFBD>݂<EFBFBD><DD82><EFBFBD><EFBFBD><EFBFBD>
|
||
836 836 $DGL 0,35
|
||
837 837 00047 713BD5 clr1 MK2H.3 ;[INF] 3, 2
|
||
838 838 ; line 241 :
|
||
839 839 ; line 242 : IICE = 1;
|
||
840 840 $DGL 0,37
|
||
841 841 0004A 71705005 set1 !IICCTL01.7 ;[INF] 4, 2
|
||
842 842 ; line 243 :
|
||
843 843 ; line 244 : #ifdef _MODEL_TEG2_
|
||
844 844 ; line 245 : PM6 &= ~0x3; /* set clock pin for IICA */
|
||
845 845 ; line 246 : #else
|
||
846 846 ; line 247 : PM20 &= ~0x3; /* set clock pin for IICA */
|
||
847 847 $DGL 0,42
|
||
848 848 0004E 8F1105 mov a,!PM20 ;[INF] 3, 1
|
||
849 849 00051 5CFC and a,#0FCH ; 252 ;[INF] 2, 1
|
||
850 850 00053 9F1105 mov !PM20,a ;[INF] 3, 1
|
||
851 851 ; line 248 : #endif
|
||
852 852 ; line 249 : }
|
||
853 853 $DGL 0,44
|
||
854 854 00056 ??ef_IIC_ctr_Init:
|
||
855 855 00056 D7 ret ;[INF] 1, 6
|
||
856 856 00057 ??ee_IIC_ctr_Init:
|
||
857 857 ; line 250 :
|
||
858 858 ; line 251 :
|
||
859 859 ; line 252 :
|
||
860 860 ; line 253 : // ========================================================
|
||
861 861 ; line 254 : void IIC_ctr_Stop( void )
|
||
862 862 ; line 255 : {
|
||
863 863 00057 _IIC_ctr_Stop:
|
||
864 864 $DGL 1,118
|
||
865 865 00057 ??bf_IIC_ctr_Stop:
|
||
866 866 ; line 256 : IICE = 0; /* IICA disable */
|
||
867 867 $DGL 0,2
|
||
868 868 00057 71785005 clr1 !IICCTL01.7 ;[INF] 4, 2
|
||
869 869 ; line 257 : IICAEN = 0;
|
||
870 870 $DGL 0,3
|
||
871 871 0005B 71080105 clr1 !PER3.0 ;[INF] 4, 2
|
||
872 872 ; line 258 : }
|
||
873 873 $DGL 0,4
|
||
874 874 0005F ??ef_IIC_ctr_Stop:
|
||
875 875 0005F D7 ret ;[INF] 1, 6
|
||
876 876 00060 ??ee_IIC_ctr_Stop:
|
||
877 877
|
||
878 878 ----- @@CODEL CSEG
|
||
879 879 END
|
||
880 880
|
||
881 881
|
||
882 882 ; *** Code Information ***
|
||
883 883 ;
|
||
884 884 ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\i2c_ctr.c
|
||
885 885 ;
|
||
886 886 ; $FUNC int_iic_ctr(65)
|
||
887 887 ; void=(void)
|
||
888 888 ; CODE SIZE= 355 bytes, CLOCK_SIZE= 278 clocks, STACK_SIZE= 28 bytes
|
||
889 889 ;
|
||
890 890 ; $CALL hosu_read_end(98)
|
||
891 891 ; void=(void)
|
||
892 892 ;
|
||
893 893 ; $CALL rtc_unlock(99)
|
||
894 894 ; void=(void)
|
||
895 895 ;
|
||
896 896 ; $CALL rtc_unlock(110)
|
||
897 897 ; void=(void)
|
||
898 898 ;
|
||
899 899 ; $CALL vreg_ctr_read(138)
|
||
900 900 ; bc=(int:ax)
|
||
901 901 ;
|
||
902 902 ; $CALL vreg_ctr_after_read(179)
|
||
903 903 ; void=(int:ax)
|
||
904 904 ;
|
||
905 905 ; $CALL vreg_ctr_write(184)
|
||
906 906 ; void=(int:ax, int:[sp+4])
|
||
907 907 ;
|
||
908 908 ; $CALL vreg_ctr_read(196)
|
||
909 909 ; bc=(int:ax)
|
||
910 910 ;
|
||
911 911 ; $FUNC IIC_ctr_Init(206)
|
||
912 912 ; void=(void)
|
||
913 913 ; CODE SIZE= 87 bytes, CLOCK_SIZE= 46 clocks, STACK_SIZE= 0 bytes
|
||
914 914 ;
|
||
915 915 ; $FUNC IIC_ctr_Stop(255)
|
||
916 916 ; void=(void)
|
||
917 917 ; CODE SIZE= 9 bytes, CLOCK_SIZE= 10 clocks, STACK_SIZE= 0 bytes
|
||
918 918
|
||
919 919 ; Target chip : uPD79F0104
|
||
920 920 ; Device file : E1.00b
|
||
|
||
Segment informations:
|
||
|
||
ADRS LEN NAME
|
||
|
||
00000 00000H.0 @@BITS
|
||
00000 00030H @@CNST
|
||
00000 00002H @@R_INIT
|
||
00000 00002H @@INIT
|
||
00000 00004H @@DATA
|
||
00000 00000H @@R_INIS
|
||
00000 00000H @@INIS
|
||
00000 00000H @@DATS
|
||
00000 00000H @@CNSTL
|
||
00000 00000H @@RLINIT
|
||
00000 00000H @@INITL
|
||
00000 00000H @@DATAL
|
||
00000 00000H @@CALT
|
||
00000 00163H @@BASE
|
||
00000 00060H ROM_CODE
|
||
00000 00000H @@CODEL
|
||
|
||
Target chip : uPD79F0104
|
||
Device file : E1.00b
|
||
Assembly complete, 0 error(s) and 0 warning(s) found. ( 0)
|
||
|