ctr_mcu/branches/0.10(X3)/magic.prn
N2232 dc469bd4c6 0.10のX3対応版を登録
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
2010-06-23 07:16:15 +00:00

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78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1
Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\magic.asm
Para-file:
In-file: inter_asm\magic.asm
Obj-file: magic.rel
Prn-file: magic.prn
Assemble list
ALNO STNO ADRS OBJECT M I SOURCE STATEMENT
1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:47
2 2
3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no magic.c
6 6 ; In-file : magic.c
7 7 ; Asm-file : inter_asm\magic.asm
8 8 ; Para-file :
9 9
10 10 $PROCESSOR(9F0104)
11 11 $DEBUG
12 12 $NODEBUGA
13 13 $KANJICODE SJIS
14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H
15 15
16 16 $DGS FIL_NAM, .file, 01BH, 0FFFEH, 03FH, 067H, 01H, 00H
17 17 $DGS AUX_FIL, magic.c
18 18 $DGS MOD_NAM, magic, 00H, 0FFFEH, 00H, 077H, 00H, 00H
19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
21 21 $DGS SEC_NAM, MGC_MIMI, U, U, 00H, 078H, 00H, 00H
22 22 $DGS SEC_NAM, MGC_TAIL, U, U, 00H, 078H, 00H, 00H
23 23 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
24 24 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
25 25 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
26 26 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
27 27 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
28 28 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
29 29 $DGS SEC_NAM, MGC_LOAD, U, U, 00H, 078H, 00H, 00H
30 30 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
31 31 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
32 32 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
33 33 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
34 34 $DGS SEC_NAM, @@CODE, U, U, 00H, 078H, 00H, 00H
35 35 $DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H
36 36 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
37 37 $DGS STA_SYM, _MGC_LOAD, U, U, 0D00CH, 03H, 01H, 03H
38 38 $DGS AUX_STR, 00H, 00H, 09H, 09H, 00H, 00H, 00H, 00H
39 39 $DGS STA_SYM, _MGC_HEAD, U, U, 0500CH, 03H, 01H, 03H
40 40 $DGS AUX_STR, 00H, 00H, 09H, 09H, 00H, 00H, 00H, 00H
41 41 $DGS STA_SYM, _MGC_TAIL, U, U, 0500CH, 03H, 01H, 03H
42 42 $DGS AUX_STR, 00H, 00H, 09H, 09H, 00H, 00H, 00H, 00H
43 43
44 44
45 45 ----- @@BITS BSEG
46 46
47 47 ----- MGC_MIMI CSEG AT 2100H
48 48 02100 31393A33 _MGC_HEAD: DB '19:31:47'
02104 313A3437
49 49 02108 00 DB 00H
50 50 02109 00 DB (1)
51 51
52 52 ----- MGC_TAIL CSEG AT 4FF6H
53 53 04FF6 31393A33 _MGC_TAIL: DB '19:31:47'
04FFA 313A3437
54 54 04FFE 00 DB 00H
55 55 04FFF 00 DB (1)
56 56
57 57 ----- @@R_INIT CSEG UNIT64KP
58 58
59 59 ----- @@INIT DSEG BASEP
60 60
61 61 ----- @@DATA DSEG BASEP
62 62
63 63 ----- @@R_INIS CSEG UNIT64KP
64 64
65 65 ----- @@INIS DSEG SADDRP
66 66
67 67 ----- @@DATS DSEG SADDRP
68 68
69 69 ----- MGC_LOAD CSEG AT 0FF6H
70 70 00FF6 31393A33 _MGC_LOAD: DB '19:31:47'
00FFA 313A3437
71 71 00FFE 00 DB 00H
72 72 00FFF 00 DB (1)
73 73
74 74 ----- @@RLINIT CSEG UNIT64KP
75 75
76 76 ----- @@INITL DSEG UNIT64KP
77 77
78 78 ----- @@DATAL DSEG UNIT64KP
79 79
80 80 ----- @@CALT CSEG CALLT0
81 81
82 82 ; line 1 : /***************************************************************
83 83 ; **************
84 84 ; line 2 : <20>r<EFBFBD><72><EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD>𖄂ߍ<F0968482><DF8D>݂܂<DD82><DC82>B
85 85 ; line 3 : <20>r<EFBFBD><72><EFBFBD>h<EFBFBD>̓x<CC93>ɍX<C98D>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɂ<EFBFBD><C982><EFBFBD><EFBFBD>K<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
86 86 ; line 4 : (touch<63><68><EFBFBD>Ă<EFBFBD>)
87 87 ; line 5 : ***************************************************************
88 88 ; *************/
89 89 ; line 6 : #include "config.h"
90 90 ; line 7 :
91 91 ; line 8 : // V0.5 (<28>j<EFBFBD>Z0.1<EFBFBD><EFBFBD>)
92 92 ; line 9 : #pragma section @@CNSTL MGC_LOAD AT 0x0FF6
93 93 ; line 10 : __far static const unsigned char MGC_LOAD[] = __TIME__;
94 94 ; line 11 :
95 95 ; line 12 : #pragma section @@CNST MGC_MIMI AT 0x2100
96 96 ; line 13 : static const unsigned char MGC_HEAD[] = __TIME__;
97 97 ; line 14 :
98 98 ; line 15 : #pragma section @@CNST MGC_TAIL AT 0x4FF6
99 99 ; line 16 : static const unsigned char MGC_TAIL[] = __TIME__;
100 100
101 101 ----- @@CODE CSEG BASE
102 102
103 103 ----- @@CODEL CSEG
104 104
105 105 ----- @@BASE CSEG BASE
106 106
107 107 ----- @@CNST CSEG MIRRORP
108 108
109 109 END
110 110
111 111
112 112 ; *** Code Information ***
113 113
114 114 ; Target chip : uPD79F0104
115 115 ; Device file : E1.00b
Segment informations:
ADRS LEN NAME
00000 00000H.0 @@BITS
02100 0000AH MGC_MIMI
04FF6 0000AH MGC_TAIL
00000 00000H @@R_INIT
00000 00000H @@INIT
00000 00000H @@DATA
00000 00000H @@R_INIS
00000 00000H @@INIS
00000 00000H @@DATS
00FF6 0000AH MGC_LOAD
00000 00000H @@RLINIT
00000 00000H @@INITL
00000 00000H @@DATAL
00000 00000H @@CALT
00000 00000H @@CODE
00000 00000H @@CODEL
00000 00000H @@BASE
00000 00000H @@CNST
Target chip : uPD79F0104
Device file : E1.00b
Assembly complete, 0 error(s) and 0 warning(s) found. ( 0)