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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
154 lines
8.2 KiB
Plaintext
154 lines
8.2 KiB
Plaintext
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78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1
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Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\WDT.asm
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Para-file:
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In-file: inter_asm\WDT.asm
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Obj-file: WDT.rel
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Prn-file: WDT.prn
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Assemble list
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ALNO STNO ADRS OBJECT M I SOURCE STATEMENT
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1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:23
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2 2
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3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
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4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
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5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no WDT.c
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6 6 ; In-file : WDT.c
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7 7 ; Asm-file : inter_asm\WDT.asm
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8 8 ; Para-file :
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9 9
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10 10 $PROCESSOR(9F0104)
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11 11 $DEBUG
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12 12 $NODEBUGA
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13 13 $KANJICODE SJIS
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14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H
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15 15
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16 16 $DGS FIL_NAM, .file, 019H, 0FFFEH, 03FH, 067H, 01H, 00H
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17 17 $DGS AUX_FIL, WDT.c
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18 18 $DGS MOD_NAM, WDT, 00H, 0FFFEH, 00H, 077H, 00H, 00H
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19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
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20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
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21 21 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
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22 22 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
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23 23 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
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24 24 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
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25 25 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
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26 26 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
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27 27 $DGS SEC_NAM, LDR_CNSL, U, U, 00H, 078H, 00H, 00H
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28 28 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
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29 29 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
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30 30 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
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31 31 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
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32 32 $DGS SEC_NAM, LDR_CODE, U, U, 00H, 078H, 00H, 00H
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33 33 $DGS SEC_NAM, LDR_CODL, U, U, 00H, 078H, 00H, 00H
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34 34 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
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35 35 $DGS GLV_SYM, _WDT_Restart, U, U, 01H, 026H, 01H, 02H
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36 36 $DGS AUX_FUN, 00H, U, U, 019H, 00H, 00H
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37 37 $DGS BEG_FUN, ??bf_WDT_Restart, U, U, 00H, 065H, 01H, 00H
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38 38 $DGS AUX_BEG, 0CH, 00H, 019H
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39 39 $DGS END_FUN, ??ef_WDT_Restart, U, U, 00H, 065H, 01H, 00H
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40 40 $DGS AUX_END, 03H
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41 41
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42 42 PUBLIC _WDT_Restart
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43 43
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44 44 ----- @@BITS BSEG
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45 45
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46 46 ----- @@CNST CSEG MIRRORP
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47 47
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48 48 ----- @@R_INIT CSEG UNIT64KP
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49 49
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50 50 ----- @@INIT DSEG BASEP
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51 51
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52 52 ----- @@DATA DSEG BASEP
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53 53
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54 54 ----- @@R_INIS CSEG UNIT64KP
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55 55
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56 56 ----- @@INIS DSEG SADDRP
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57 57
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58 58 ----- @@DATS DSEG SADDRP
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59 59
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60 60 ----- LDR_CNSL CSEG PAGE64KP
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61 61
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62 62 ----- @@RLINIT CSEG UNIT64KP
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63 63
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64 64 ----- @@INITL DSEG UNIT64KP
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65 65
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66 66 ----- @@DATAL DSEG UNIT64KP
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67 67
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68 68 ----- @@CALT CSEG CALLT0
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69 69
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70 70 ; line 1 : #pragma sfr
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71 71 ; line 2 :
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72 72 ; line 3 :
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73 73 ; line 4 : #include "incs_loader.h"
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74 74 ; line 5 :
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75 75 ; line 6 :
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76 76 ; line 7 :
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77 77 ; line 8 : //=========================================================
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78 78 ; line 9 : // <20>E<EFBFBD>H<EFBFBD>b<EFBFBD>`<60>h<EFBFBD>b<EFBFBD>O<EFBFBD>^<5E>C<EFBFBD>}<7D>̃<EFBFBD><CC83>X<EFBFBD>^<5E>[<5B>g
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79 79 ; line 10 : // 0xAC<41>̓}<7D>W<EFBFBD>b<EFBFBD>N
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80 80 ; line 11 : void WDT_Restart( void )
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81 81 ; line 12 : {
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82 82
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83 83 ----- LDR_CODE CSEG BASE
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84 84 00000 _WDT_Restart:
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85 85 $DGL 1,19
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86 86 00000 ??bf_WDT_Restart:
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87 87 ; line 13 : WDTE = WDT_RESTART_MAGIC;
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88 88 $DGL 0,2
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89 89 00000 CEABAC mov WDTE,#0ACH ; 172 ;[INF] 3, 1
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90 90 ; line 14 : }
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91 91 $DGL 0,3
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92 92 00003 ??ef_WDT_Restart:
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93 93 00003 D7 ret ;[INF] 1, 6
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94 94 00004 ??ee_WDT_Restart:
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95 95
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96 96 ----- LDR_CODL CSEG
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97 97
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98 98 ----- @@BASE CSEG BASE
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99 99 END
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100 100
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101 101
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102 102 ; *** Code Information ***
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103 103 ;
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104 104 ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\WDT.c
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105 105 ;
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106 106 ; $FUNC WDT_Restart(12)
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107 107 ; void=(void)
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108 108 ; CODE SIZE= 4 bytes, CLOCK_SIZE= 7 clocks, STACK_SIZE= 0 bytes
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109 109
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110 110 ; Target chip : uPD79F0104
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111 111 ; Device file : E1.00b
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Segment informations:
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ADRS LEN NAME
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00000 00000H.0 @@BITS
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00000 00000H @@CNST
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00000 00000H @@R_INIT
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00000 00000H @@INIT
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00000 00000H @@DATA
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00000 00000H @@R_INIS
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00000 00000H @@INIS
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00000 00000H @@DATS
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00000 00000H LDR_CNSL
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00000 00000H @@RLINIT
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00000 00000H @@INITL
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00000 00000H @@DATAL
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00000 00000H @@CALT
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00000 00004H LDR_CODE
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00000 00000H LDR_CODL
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00000 00000H @@BASE
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Target chip : uPD79F0104
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Device file : E1.00b
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Assembly complete, 0 error(s) and 0 warning(s) found. ( 0)
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