mirror of
https://github.com/rvtr/ctr_mcu.git
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dc469bd4c6
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@193 013db118-44a6-b54f-8bf7-843cb86687b1
135 lines
3.8 KiB
NASM
135 lines
3.8 KiB
NASM
; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:25
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; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
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; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
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; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no reboot.c
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; In-file : reboot.c
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; Asm-file : inter_asm\reboot.asm
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; Para-file :
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$PROCESSOR(9F0104)
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$DEBUG
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$NODEBUGA
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$KANJICODE SJIS
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$TOL_INF 03FH, 0210H, 02H, 00H, 00H, 00H, 00H
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$DGS FIL_NAM, .file, 019H, 0FFFEH, 03FH, 067H, 01H, 00H
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$DGS AUX_FIL, reboot.c
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$DGS MOD_NAM, reboot, 00H, 0FFFEH, 00H, 077H, 00H, 00H
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$DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, LDR_CNSL, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, LDR_CODE, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, LDR_CODL, U, U, 00H, 078H, 00H, 00H
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$DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H
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$DGS GLV_SYM, _my_reboot, U, U, 01H, 026H, 01H, 02H
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$DGS AUX_FUN, 00H, U, U, 019H, 00H, 00H
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$DGS BEG_FUN, ??bf_my_reboot, U, U, 00H, 065H, 01H, 00H
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$DGS AUX_BEG, 0EH, 00H, 019H
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$DGS END_FUN, ??ef_my_reboot, U, U, 00H, 065H, 01H, 00H
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$DGS AUX_END, 0BH
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PUBLIC _my_reboot
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@@BITS BSEG
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@@CNST CSEG MIRRORP
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@@R_INIT CSEG UNIT64KP
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@@INIT DSEG BASEP
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@@DATA DSEG BASEP
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@@R_INIS CSEG UNIT64KP
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@@INIS DSEG SADDRP
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@@DATS DSEG SADDRP
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LDR_CNSL CSEG PAGE64KP
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@@RLINIT CSEG UNIT64KP
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@@INITL DSEG UNIT64KP
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@@DATAL DSEG UNIT64KP
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@@CALT CSEG CALLT0
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; line 1 : /********************************************************//*
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; line 2 :
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; line 3 : <20>ނ<EFBFBD><DE82><EFBFBD><EFBFBD>胊<EFBFBD>u<EFBFBD>[<5B>g
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; line 4 :
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; line 5 : <20>t<EFBFBD>@<40>C<EFBFBD><43><EFBFBD><EFBFBD><EFBFBD>ɃC<C983><43><EFBFBD><EFBFBD><EFBFBD>C<EFBFBD><43><EFBFBD>A<EFBFBD>Z<EFBFBD><5A><EFBFBD>u<EFBFBD><75><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƁA
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; line 6 : <20><><EFBFBD>̃<EFBFBD><CC83>W<EFBFBD><57><EFBFBD>[<5B><><EFBFBD>S<EFBFBD><53><EFBFBD>œK<C593><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882>Ȃ邽<C882>ߒǂ<DF92><C782>o<EFBFBD><6F><EFBFBD><EFBFBD>
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; line 7 :
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; line 8 : **********************************************************/
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; line 9 : #pragma SFR
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; line 10 :
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; line 11 : #include "incs_loader.h"
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; line 12 :
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; line 13 :
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; line 14 : void my_reboot(){
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LDR_CODE CSEG BASE
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_my_reboot:
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$DGL 1,19
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??bf_my_reboot:
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; line 15 : #asm
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$DGL 0,4
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MOV PSW,#06H ; <20>_<EFBFBD>~<7E>[<5B><>PSW<53><57><EFBFBD>Z<EFBFBD>b<EFBFBD>g
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$DGL 0,5
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MOVW AX,#000d0h ; <20><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD>̃x<CC83>N<EFBFBD>^<5E>l<EFBFBD><6C><EFBFBD><EFBFBD><EFBFBD>荞<EFBFBD><E88D9E><EFBFBD>ł<EFBFBD><C582>܂<EFBFBD><DC82>B
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$DGL 0,6
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PUSH PSW
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$DGL 0,7
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PUSH AX ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RETI<54>̂<EFBFBD><CC82>߂̃X<CC83>^<5E>b<EFBFBD>N<EFBFBD><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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$DGL 0,8
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RETI ; <20><><EFBFBD><EFBFBD><EFBFBD>Ń<EFBFBD><C583>Z<EFBFBD>b<EFBFBD>g<EFBFBD>E<EFBFBD>x<EFBFBD>N<EFBFBD>^<5E>ɕ<EFBFBD><C995><EFBFBD>
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; line 16 :
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; line 17 : MOV PSW,#06H ; <20>_<EFBFBD>~<7E>[<5B><>PSW<53><57><EFBFBD>Z<EFBFBD>b<EFBFBD>g
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; line 18 : MOVW AX,#000d0h ; <20><><EFBFBD>Z<EFBFBD>b<EFBFBD>g<EFBFBD>̃x<CC83>N<EFBFBD>^<5E>l<EFBFBD><6C><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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; <20><><EFBFBD><EFBFBD><EFBFBD>ł<EFBFBD><C582>܂<EFBFBD><DC82>B
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; line 19 : PUSH PSW
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; line 20 : PUSH AX ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RETI<54>̂<EFBFBD><CC82>߂̃X<CC83>^<5E>b<EFBFBD>N
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; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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; line 21 : RETI ; <20><><EFBFBD><EFBFBD><EFBFBD>Ń<EFBFBD><C583>Z<EFBFBD>b<EFBFBD>g<EFBFBD>E<EFBFBD>x<EFBFBD>N<EFBFBD>^<5E>ɕ<EFBFBD>
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; <20><>
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; line 22 :
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; line 23 : #endasm
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; line 24 : }
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$DGL 0,11
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??ef_my_reboot:
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ret ;[INF] 1, 6
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??ee_my_reboot:
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LDR_CODL CSEG
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@@BASE CSEG BASE
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END
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; *** Code Information ***
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;
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; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\reboot.c
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;
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; $FUNC my_reboot(14)
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; void=(void)
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; CODE SIZE= 1 bytes, CLOCK_SIZE= 6 clocks, STACK_SIZE= 0 bytes
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; Target chip : uPD79F0104
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; Device file : E1.00b
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