; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:25 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\ ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no task_misc.c ; In-file : task_misc.c ; Asm-file : inter_asm\task_misc.asm ; Para-file : $PROCESSOR(9F0104) $DEBUG $NODEBUGA $KANJICODE SJIS $TOL_INF 03FH, 0210H, 02H, 00H, 00H, 00H, 00H $DGS FIL_NAM, .file, 0EAH, 0FFFEH, 03FH, 067H, 01H, 00H $DGS AUX_FIL, task_misc.c $DGS MOD_NAM, task_misc, 00H, 0FFFEH, 00H, 077H, 00H, 00H $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@CNSTL, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, ROM_CODE, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H $DGS ENM_TAG, _pwr_state_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H $DGS AUX_TAG, 01H, 01EH $DGS MEB_ENM, _OFF_TRIG, 00H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _OFF, 01H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _ON_TRIG, 02H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _ON, 03H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _SLEEP_TRIG, 04H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _SLEEP, 05H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _BT_CHARGE, 06H, 0FFFFH, 04H, 010H, 00H, 00H $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H $DGS AUX_EOS, 013H, 01H $DGS ENM_TAG, _poweron_reason_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H $DGS AUX_TAG, 01H, 025H $DGS MEB_ENM, _NONE, 00H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _PWSW, 01H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _RTC_ALARM, 02H, 0FFFFH, 04H, 010H, 00H, 00H $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H $DGS AUX_EOS, 01EH, 01H $DGS ENM_TAG, _model_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H $DGS AUX_TAG, 01H, 02FH $DGS MEB_ENM, _MODEL_JIKKI, 00H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _MODEL_TS_BOARD, 01H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _MODEL_SHIROBAKO, 02H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _MODEL_RESERVED1, 03H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _MODEL_RESERVED2, 04H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _MODEL_RESERVED3, 05H, 0FFFFH, 04H, 010H, 00H, 00H $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H $DGS AUX_EOS, 025H, 01H $DGS STR_STR, .0fake, 00H, 0FFFEH, 08H, 0AH, 01H, 00H $DGS AUX_TAG, 04H, 041H $DGS MEB_STR, _pwr_state, 00H, 0FFFFH, 0AH, 08H, 01H, 00H $DGS AUX_STR, 013H, 00H, 01H, 00H, 00H, 00H, 00H, 00H $DGS MEB_STR, _poweron_reason, 01H, 0FFFFH, 0AH, 08H, 01H, 00H $DGS AUX_STR, 01EH, 00H, 01H, 00H, 00H, 00H, 00H, 00H $DGS BIT_FLD, _dipsw0, 010H, 0FFFFH, 0CH, 012H, 01H, 00H $DGS AUX_BIT, 00H, 01H $DGS BIT_FLD, _dipsw1, 011H, 0FFFFH, 0CH, 012H, 01H, 00H $DGS AUX_BIT, 00H, 01H $DGS BIT_FLD, _dipsw2, 012H, 0FFFFH, 0CH, 012H, 01H, 00H $DGS AUX_BIT, 00H, 01H $DGS BIT_FLD, _reboot, 013H, 0FFFFH, 0CH, 012H, 01H, 00H $DGS AUX_BIT, 00H, 01H $DGS MEB_STR, _model, 03H, 0FFFFH, 0AH, 08H, 01H, 00H $DGS AUX_STR, 025H, 00H, 01H, 00H, 00H, 00H, 00H, 00H $DGS END_STR, .eos, 04H, 0FFFFH, 00H, 066H, 01H, 00H $DGS AUX_EOS, 02FH, 04H $DGS ENM_TAG, .2fake, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H $DGS AUX_TAG, 01H, 047H $DGS MEB_ENM, _ERR_FINISED, 00H, 0FFFFH, 04H, 010H, 00H, 00H $DGS MEB_ENM, _ERR_CONTINUE, 01H, 0FFFFH, 04H, 010H, 00H, 00H $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H $DGS AUX_EOS, 041H, 01H $DGS LAB_SYM, bs_F0060, U, U, 00H, 06H, 00H, 00H $DGS LAB_SYM, es_F0060, U, U, 00H, 06H, 00H, 00H $DGS STA_SYM, _lpf_coeff, U, U, 05002H, 03H, 01H, 03H $DGS AUX_STR, 00H, 00H, 02FH, 02FH, 00H, 00H, 00H, 00H $DGS GLV_SYM, _tsk_misc_stat, U, U, 01H, 026H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 098H, 00H, 00H $DGS BEG_FUN, ??bf_tsk_misc_stat, U, U, 00H, 065H, 01H, 00H $DGS AUX_BEG, 037H, 02H, 052H $DGS STA_SYM, _interval_task_misc_stat, ?L0003, U, 0CH, 03H, 00H, 00H $DGS STA_SYM, _state_old, ?L0004, U, 0CH, 03H, 00H, 00H $DGS REG_VAR, _diff, 06H, 0FFFFH, 010CH, 04H, 00H, 00H $DGS BEG_BLK, ??bb00_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0AH, 00H, 056H $DGS END_BLK, ??eb00_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 0DH $DGS BEG_BLK, ??bb01_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0FH, 00H, 05AH $DGS END_BLK, ??eb01_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 011H $DGS BEG_BLK, ??bb02_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 013H, 00H, 05CH $DGS BEG_BLK, ??bb03_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 013H, 00H, 060H $DGS END_BLK, ??eb03_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 013H $DGS BEG_BLK, ??bb04_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 013H, 00H, 066H $DGS END_BLK, ??eb04_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 013H $DGS END_BLK, ??eb02_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 013H $DGS BEG_BLK, ??bb05_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 017H, 00H, 068H $DGS BEG_BLK, ??bb06_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 020H, 00H, 06AH $DGS BEG_BLK, ??bb07_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 024H, 00H, 06CH $DGS BEG_BLK, ??bb08_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 027H, 00H, 070H $DGS END_BLK, ??eb08_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 029H $DGS BEG_BLK, ??bb09_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 02BH, 00H, 076H $DGS END_BLK, ??eb09_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 02DH $DGS END_BLK, ??eb07_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 02EH $DGS BEG_BLK, ??bb0A_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 031H, 00H, 078H $DGS BEG_BLK, ??bb0B_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 034H, 00H, 07CH $DGS END_BLK, ??eb0B_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 036H $DGS BEG_BLK, ??bb0C_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 038H, 00H, 084H $DGS END_BLK, ??eb0C_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 03AH $DGS END_BLK, ??eb0A_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 03BH $DGS END_BLK, ??eb06_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 03CH $DGS BEG_BLK, ??bb0D_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 049H, 00H, 086H $DGS BEG_BLK, ??bb0E_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 04BH, 00H, 088H $DGS BEG_BLK, ??bb0F_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 04CH, 00H, 090H $DGS END_BLK, ??eb0F_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 04EH $DGS END_BLK, ??eb0E_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 04FH $DGS END_BLK, ??eb0D_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 050H $DGS BEG_BLK, ??bb10_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 054H, 00H, 00H $DGS END_BLK, ??eb10_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 057H $DGS END_BLK, ??eb05_tsk_misc_stat, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 058H $DGS END_FUN, ??ef_tsk_misc_stat, U, U, 00H, 065H, 01H, 00H $DGS AUX_END, 05AH $DGS GLV_SYM, _do_command0, U, U, 0AH, 026H, 01H, 02H $DGS AUX_FUN, 041H, U, U, 0CEH, 00H, 00H $DGS BEG_FUN, ??bf_do_command0, U, U, 00H, 065H, 01H, 00H $DGS AUX_BEG, 09FH, 00H, 09CH $DGS BEG_BLK, ??bb00_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 04H, 00H, 09EH $DGS BEG_BLK, ??bb01_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 06H, 00H, 0A2H $DGS END_BLK, ??eb01_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 08H $DGS BEG_BLK, ??bb02_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0AH, 00H, 0A4H $DGS BEG_BLK, ??bb03_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0CH, 00H, 0A6H $DGS BEG_BLK, ??bb04_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0EH, 00H, 0AAH $DGS END_BLK, ??eb04_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 0EH $DGS BEG_BLK, ??bb05_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0FH, 00H, 0B0H $DGS END_BLK, ??eb05_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 0FH $DGS END_BLK, ??eb03_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 010H $DGS BEG_BLK, ??bb06_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 012H, 00H, 0B2H $DGS BEG_BLK, ??bb07_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 013H, 00H, 0B8H $DGS END_BLK, ??eb07_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 013H $DGS END_BLK, ??eb06_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 014H $DGS BEG_BLK, ??bb08_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 016H, 00H, 0BAH $DGS BEG_BLK, ??bb09_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 017H, 00H, 0C0H $DGS END_BLK, ??eb09_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 017H $DGS END_BLK, ??eb08_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 018H $DGS BEG_BLK, ??bb0A_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 01AH, 00H, 0C4H $DGS END_BLK, ??eb0A_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 01AH $DGS BEG_BLK, ??bb0B_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 01CH, 00H, 00H $DGS END_BLK, ??eb0B_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 01CH $DGS END_BLK, ??eb02_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 025H $DGS END_BLK, ??eb00_do_command0, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 026H $DGS END_FUN, ??ef_do_command0, U, U, 00H, 065H, 01H, 00H $DGS AUX_END, 02AH $DGS GLV_SYM, _tski_mcu_info_read, U, U, 0AH, 026H, 01H, 02H $DGS AUX_FUN, 041H, U, U, 0EAH, 00H, 00H $DGS BEG_FUN, ??bf_tski_mcu_info_read, U, U, 00H, 065H, 01H, 00H $DGS AUX_BEG, 0D9H, 02H, 0D3H $DGS REG_VAR, _temp, 06H, 0FFFFH, 010CH, 04H, 00H, 00H $DGS BEG_BLK, ??bb00_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 06H, 00H, 0D7H $DGS END_BLK, ??eb00_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 08H $DGS BEG_BLK, ??bb01_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 0BH, 00H, 0DBH $DGS END_BLK, ??eb01_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 0DH $DGS BEG_BLK, ??bb02_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 010H, 00H, 0DFH $DGS END_BLK, ??eb02_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 012H $DGS BEG_BLK, ??bb03_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 014H, 00H, 0E3H $DGS END_BLK, ??eb03_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 016H $DGS BEG_BLK, ??bb04_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_BEG, 018H, 00H, 00H $DGS END_BLK, ??eb04_tski_mcu_info_read, U, U, 00H, 064H, 01H, 00H $DGS AUX_END, 031H $DGS LAB_SYM, _end, ?L0046, U, 00H, 06H, 00H, 00H $DGS END_FUN, ??ef_tski_mcu_info_read, U, U, 00H, 065H, 01H, 00H $DGS AUX_END, 03AH $DGS GLV_SYM, _iic_mcu_read_a_byte, U, U, 0CH, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _vreg_ctr, U, U, 0CH, 02H, 01H, 03H $DGS AUX_STR, 00H, 00H, 01H, 01H, 00H, 00H, 00H, 00H $DGS GLV_SYM, _system_status, U, U, 08H, 02H, 01H, 00H $DGS AUX_STR, 02FH, 00H, 04H, 00H, 00H, 00H, 00H, 00H $DGS GLV_SYM, _set_irq, U, U, 01H, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _tsk_cbk_accero, U, U, 0AH, 02H, 01H, 02H $DGS AUX_FUN, 041H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _renge_task_immed_add, U, U, 0CH, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _ntr_pmic_comm, U, U, 0AH, 02H, 01H, 02H $DGS AUX_FUN, 041H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _iic_mcu_write_a_byte, U, U, 0CH, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _wait_ms, U, U, 01H, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H $DGS GLV_SYM, _iic_burst_state, U, U, 0CH, 02H, 00H, 00H $DGS GLV_SYM, _get_adc, U, U, 0CH, 02H, 01H, 02H $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H EXTRN _iic_mcu_read_a_byte EXTRN _vreg_ctr EXTRN _system_status EXTRN _set_irq EXTRN _tsk_cbk_accero EXTRN _renge_task_immed_add EXTRN _ntr_pmic_comm EXTRN _iic_mcu_write_a_byte EXTRN _wait_ms EXTRN _iic_burst_state EXTRN _get_adc PUBLIC _tsk_misc_stat PUBLIC _do_command0 PUBLIC _tski_mcu_info_read @@BITS BSEG @@CNST CSEG MIRRORP _lpf_coeff: DB 01H ; 1 DB 02H ; 2 DB 02H ; 2 DB 03H ; 3 DB 03H ; 3 DB 02H ; 2 DB 00H ; 0 DB 0FEH ; 254 DB 0FBH ; 251 DB 0F7H ; 247 DB 0F3H ; 243 DB 0F0H ; 240 DB 0F0H ; 240 DB 0F3H ; 243 DB 0FAH ; 250 DB 04H ; 4 DB 012H ; 18 DB 025H ; 37 DB 038H ; 56 DB 04DH ; 77 DB 05FH ; 95 DB 06EH ; 110 DB 077H ; 119 DB 07AH ; 122 DB 077H ; 119 DB 06EH ; 110 DB 05FH ; 95 DB 04DH ; 77 DB 038H ; 56 DB 025H ; 37 DB 012H ; 18 DB 04H ; 4 DB 0FAH ; 250 DB 0F3H ; 243 DB 0F0H ; 240 DB 0F0H ; 240 DB 0F3H ; 243 DB 0F7H ; 247 DB 0FBH ; 251 DB 0FEH ; 254 DB 00H ; 0 DB 02H ; 2 DB 03H ; 3 DB 03H ; 3 DB 02H ; 2 DB 02H ; 2 DB 01H ; 1 DB (1) @@R_INIT CSEG UNIT64KP DB 00H ; 0 DB (1) @@INIT DSEG BASEP ?L0003: DS (1) DS (1) @@DATA DSEG BASEP ?L0004: DS (1) DS (1) @@R_INIS CSEG UNIT64KP @@INIS DSEG SADDRP @@DATS DSEG SADDRP @@CNSTL CSEG PAGE64KP @@RLINIT CSEG UNIT64KP @@INITL DSEG UNIT64KP @@DATAL DSEG UNIT64KP @@CALT CSEG CALLT0 ; Sub-Routines created by CC78K0R ROM_CODE CSEG BASE bs_F0060: push ax ;[INF] 1, 1 mov x,#06CH ; 108 ;[INF] 2, 1 call !_iic_mcu_read_a_byte ;[INF] 3, 3 pop ax ;[INF] 1, 1 mov a,c ;[INF] 1, 1 mov !IICA1,a ;[INF] 3, 1 ret ;[INF] 1, 6 es_F0060: ; *** Sub-Routine Information *** ; ; $SUB bs_F0060 ; CODE SIZE= 12 bytes ; End of Sub-Routines ; line 1 : #pragma SFR ; line 2 : #pragma NOP ; line 3 : #pragma HALT ; line 4 : #pragma STOP ; line 5 : ; line 6 : #include "incs.h" ; line 7 : #include "renge.h" ; line 8 : #include "pm.h" ; line 9 : ; line 10 : #include "accero.h" ; line 11 : #include "adc.h" ; line 12 : #include "i2c_mcu.h" ; line 13 : ; line 14 : ; line 15 : #ifdef _MCU_BSR_ ; line 16 : #define ACKD ACKD1 ; line 17 : #define ACKE ACKE1 ; line 18 : #define COI COI1 ; line 19 : #define IICAEN IICA1EN ; line 20 : #define IICRSV IICRSV1 ; line 21 : #define IICA IICA1 ; line 22 : #define IICAIF IICAIF1 ; line 23 : #define IICAMK IICAMK1 ; line 24 : #define IICAPR0 IICAPR11 ; line 25 : #define IICAPR1 IICAPR01 ; line 26 : #define IICCTL0 IICCTL10 ; line 27 : #define IICE IICE1 ; line 28 : #define IICF IICF1 ; line 29 : #define IICS IICS1 ; line 30 : #define IICWH IICWH1 ; line 31 : #define IICWL IICWL1 ; line 32 : #define LREL LREL1 ; line 33 : #define SPD SPD1 ; line 34 : #define SPIE SPIE1 ; line 35 : #define STCEN STCEN1 ; line 36 : #define STD STD1 ; line 37 : #define SVA SVA1 ; line 38 : #define WREL WREL1 ; line 39 : #define WTIM WTIM1 ; line 40 : #define TRC TRC1 ; line 41 : #define SMC SMC1 ; line 42 : #define DFC DFC1 ; line 43 : #endif ; line 44 : ; line 45 : ; line 46 : ; line 47 : // ======================================================== ; line 48 : #define INTERVAL_TSK_MISC_STAT 4 ; line 49 : ; line 50 : ; line 51 : /* ======================================================== ; line 52 : ステータスレジスタなど ; line 53 : ======================================================== */ ; line 54 : void tsk_misc_stat( ) ; line 55 : { ROM_CODE CSEG BASE _tsk_misc_stat: $DGL 1,75 push hl ;[INF] 1, 1 ??bf_tsk_misc_stat: ; line 56 : static u8 interval_task_misc_stat = 0; ; line 57 : static u8 state_old; // ステータス変化検出→割り込み ; の為 ; line 58 : #ifdef _BL_INDEPENDENT_ ; line 59 : static u8 state2_old; ; line 60 : #endif ; line 61 : u8 diff; ; line 62 : ; line 63 : if( interval_task_misc_stat != 0 ) $DGL 0,9 cmp0 !?L0003 ; interval_task_misc_stat ;[INF] 3, 1 bz $?L0005 ;[INF] 2, 4 ; line 64 : { ??bb00_tsk_misc_stat: ; line 65 : interval_task_misc_stat -= 1; $DGL 0,11 dec !?L0003 ; interval_task_misc_stat ;[INF] 3, 2 ; line 66 : return; $DGL 0,12 br !?L0028 ;[INF] 3, 3 ??eb00_tsk_misc_stat: ; line 67 : } ?L0005: ; line 68 : else ; line 69 : { ??bb01_tsk_misc_stat: ; line 70 : interval_task_misc_stat = ( INTERVAL_TSK_MISC_STAT / SYS ; _INTERVAL_TICK ); $DGL 0,16 mov !?L0003,#02H ; interval_task_misc_stat,2 ;[INF] 4, 1 ??eb01_tsk_misc_stat: ; line 71 : } ; line 72 : ; line 73 : set_bit( SHELL_OPEN, vreg_ctr[VREG_C_STATUS], REG_BIT_ST_SHE ; LL_OPEN ); $DGL 0,19 ??bb02_tsk_misc_stat: bf P7.1,$?L0007 ;[INF] 4, 5 ??bb03_tsk_misc_stat: set1 !_vreg_ctr+15.1 ;[INF] 4, 2 ??eb03_tsk_misc_stat: br $?L0008 ;[INF] 2, 3 ?L0007: ??bb04_tsk_misc_stat: clr1 !_vreg_ctr+15.1 ;[INF] 4, 2 ??eb04_tsk_misc_stat: ?L0008: ??eb02_tsk_misc_stat: ; line 74 : ; line 75 : // ステータスレジスタ関係 → 割り込み // ; line 76 : if( ( system_status.pwr_state == ON ) || ( system_status.pwr ; _state == SLEEP ) ) $DGL 0,22 cmp !_system_status,#03H ; 3 ;[INF] 4, 1 bz $?L0011 ;[INF] 2, 4 cmp !_system_status,#05H ; 5 ;[INF] 4, 1 skz ;[INF] 2, 1 br !?L0028 ;[INF] 3, 3 ?L0011: ; line 77 : { ??bb05_tsk_misc_stat: ; line 78 : // pm.c で、その場で行います。 ; line 79 : // REG_BIT_LCD_ON/OFF ; line 80 : // REG_BIT_BL_ON/OFF ; line 81 : // REG_BIT_BT_DC_CONNECT/DISC ; line 82 : ; line 83 : ; line 84 : diff = vreg_ctr[VREG_C_STATUS] ^ state_old; $DGL 0,30 mov a,!_vreg_ctr+15 ;[INF] 3, 1 xor a,!?L0004 ; state_old ;[INF] 3, 1 mov l,a ;[INF] 1, 1 ; line 85 : if( diff != 0 ) $DGL 0,31 cmp0 a ;[INF] 1, 1 bz $?L0021 ;[INF] 2, 4 ; line 86 : { ??bb06_tsk_misc_stat: ; line 87 : state_old = vreg_ctr[VREG_C_STATUS]; $DGL 0,33 mov a,!_vreg_ctr+15 ;[INF] 3, 1 mov !?L0004,a ; state_old ;[INF] 3, 1 ; line 88 : ; line 89 : if( diff & REG_BIT_BATT_CHARGE ) $DGL 0,35 mov a,l ;[INF] 1, 1 and a,#010H ; 16 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0017 ;[INF] 2, 4 ; line 90 : { ??bb07_tsk_misc_stat: ; line 91 : // 充電状態に以下略 ; line 92 : if( vreg_ctr[VREG_C_STATUS] & REG_BIT_BATT_CHARG ; E ) $DGL 0,38 mov a,!_vreg_ctr+15 ;[INF] 3, 1 and a,#010H ; 16 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0016 ;[INF] 2, 4 ; line 93 : { ??bb08_tsk_misc_stat: ; line 94 : set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_START ) ; ; $DGL 0,40 movw ax,#080H ; 128 ;[INF] 3, 1 push ax ;[INF] 1, 1 mov x,#011H ; 17 ;[INF] 2, 1 call !_set_irq ;[INF] 3, 3 pop ax ;[INF] 1, 1 ??eb08_tsk_misc_stat: ; line 95 : } $DGL 0,41 br $?L0017 ;[INF] 2, 3 ?L0016: ; line 96 : else ; line 97 : { ??bb09_tsk_misc_stat: ; line 98 : set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_STOP ); $DGL 0,44 movw ax,#040H ; 64 ;[INF] 3, 1 push ax ;[INF] 1, 1 mov x,#011H ; 17 ;[INF] 2, 1 call !_set_irq ;[INF] 3, 3 pop ax ;[INF] 1, 1 ??eb09_tsk_misc_stat: ; line 99 : } ?L0017: ??eb07_tsk_misc_stat: ; line 100 : } ; line 101 : ; line 102 : if( diff & REG_BIT_ST_SHELL_OPEN ) $DGL 0,48 mov a,l ;[INF] 1, 1 and a,#02H ; 2 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0021 ;[INF] 2, 4 ; line 103 : { ??bb0A_tsk_misc_stat: ; line 104 : // 蓋の開け閉め ; line 105 : if( vreg_ctr[VREG_C_STATUS] & REG_BIT_ST_SHELL_O ; PEN ) $DGL 0,51 mov a,!_vreg_ctr+15 ;[INF] 3, 1 and a,#02H ; 2 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0020 ;[INF] 2, 4 ; line 106 : { ??bb0B_tsk_misc_stat: ; line 107 : set_irq( VREG_C_IRQ0, REG_BIT_SHELL_OPEN ); $DGL 0,53 movw ax,#040H ; 64 ;[INF] 3, 1 push ax ;[INF] 1, 1 mov x,#010H ; 16 ;[INF] 2, 1 call !_set_irq ;[INF] 3, 3 pop ax ;[INF] 1, 1 ??eb0B_tsk_misc_stat: ; line 108 : } $DGL 0,54 br $?L0021 ;[INF] 2, 3 ?L0020: ; line 109 : else ; line 110 : { ??bb0C_tsk_misc_stat: ; line 111 : set_irq( VREG_C_IRQ0, REG_BIT_SHELL_CLOSE ); $DGL 0,57 movw ax,#020H ; 32 ;[INF] 3, 1 push ax ;[INF] 1, 1 mov x,#010H ; 16 ;[INF] 2, 1 call !_set_irq ;[INF] 3, 3 pop ax ;[INF] 1, 1 ??eb0C_tsk_misc_stat: ; line 112 : } ?L0021: ??eb0A_tsk_misc_stat: ; line 113 : } ??eb06_tsk_misc_stat: ; line 114 : } ; line 115 : ; line 116 : ; line 117 : //#ifdef _MCU_KE3_ ; line 118 : // KE3では必須です。 ; line 119 : /* ===================================================== ; === ; line 120 : 加速度センサ割り込みピンがオリジナルマイコンには無いの ; で ; line 121 : ポーリングする。 ; line 122 : 歩数計用 ; line 123 : BSRマイコンはaccero.cで割り込みルーチンからタスク登録 ; します。 ; line 124 : ===================================================== ; === */ ; line 125 : // 割り込みの取りこぼし？ ; line 126 : if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 0x03 ) != 0x00 ) $DGL 0,72 mov a,!_vreg_ctr+64 ;[INF] 3, 1 and a,#03H ; 3 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0026 ;[INF] 2, 4 ; line 127 : { ??bb0D_tsk_misc_stat: ; line 128 : if( ACC_VALID ) $DGL 0,74 push hl ;[INF] 1, 1 movw hl,#0510H ; 1296 ;[INF] 3, 1 mov1 CY,[hl].5 ;[INF] 2, 1 pop hl ;[INF] 1, 1 bnc $?L0026 ;[INF] 2, 4 ; line 129 : { ??bb0E_tsk_misc_stat: ; line 130 : if( renge_task_immed_add( tsk_cbk_accero ) == ER ; R_SUCCESS ){ $DGL 0,76 movw ax,#loww (_tsk_cbk_accero) ;[INF] 3, 1 call !_renge_task_immed_add ;[INF] 3, 3 cmp0 c ;[INF] 1, 1 sknz ;[INF] 2, 1 ??bb0F_tsk_misc_stat: ; line 131 : NOP(); $DGL 0,77 nop ;[INF] 1, 1 ??eb0F_tsk_misc_stat: ; line 132 : } ?L0026: ??eb0E_tsk_misc_stat: ; line 133 : } ??eb0D_tsk_misc_stat: ; line 134 : } ; line 135 : //#endif ; line 136 : ; line 137 : // 割り込みの取りこぼし？ ; line 138 : if( !PM_IRQ_n ){ $DGL 0,84 bt P7.2,$?L0028 ;[INF] 4, 5 ??bb10_tsk_misc_stat: ; line 139 : renge_task_immed_add( ntr_pmic_comm ); $DGL 0,85 movw ax,#loww (_ntr_pmic_comm) ;[INF] 3, 1 call !_renge_task_immed_add ;[INF] 3, 3 ; line 140 : NOP(); $DGL 0,86 nop ;[INF] 1, 1 ??eb10_tsk_misc_stat: ; line 141 : } ?L0028: ??eb05_tsk_misc_stat: ; line 142 : } ; line 143 : return; ; line 144 : } $DGL 0,90 ??ef_tsk_misc_stat: pop hl ;[INF] 1, 1 ret ;[INF] 1, 6 ??ee_tsk_misc_stat: ; line 145 : ; line 146 : ; line 147 : ; line 148 : ; line 149 : ; line 150 : /* ======================================================== ; line 151 : 逐一起動タスク ; line 152 : ======================================================== */ ; line 153 : ; line 154 : /* ======================================================== ; line 155 : COMMANDレジスタへの書き込み ; line 156 : 　 0なら呼ばれません。ケア不要 ; line 157 : ======================================================== */ ; line 158 : task_status_immed do_command0( ) ; line 159 : { _do_command0: $DGL 1,152 ??bf_do_command0: ; line 160 : // command0 本体電源など ; line 161 : if( ( vreg_ctr[VREG_C_COMMAND0] & ( REG_BIT_OFF_REQ | REG_BI ; T_RESET1_REQ | REG_BIT_FCRAM_RESET_REQ | REG_BIT_RESET2_REQ )) ! ; = 0x00 ) $DGL 0,3 mov a,!_vreg_ctr+32 ;[INF] 3, 1 and a,#0FH ; 15 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0035 ;[INF] 2, 4 ; line 162 : { ??bb00_do_command0: ; line 163 : if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_OFF_REQ ) $DGL 0,5 mov a,!_vreg_ctr+32 ;[INF] 3, 1 and a,#01H ; 1 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0034 ;[INF] 2, 4 ; line 164 : { ??bb01_do_command0: ; line 165 : system_status.pwr_state = OFF_TRIG; $DGL 0,7 clrb !_system_status ;[INF] 3, 1 ??eb01_do_command0: ; line 166 : } $DGL 0,8 br $?L0035 ;[INF] 2, 3 ?L0034: ; line 167 : else ; line 168 : { ??bb02_do_command0: ; line 169 : if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_RESET1_REQ ) $DGL 0,11 mov a,!_vreg_ctr+32 ;[INF] 3, 1 and a,#02H ; 2 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0036 ;[INF] 2, 4 ; line 170 : { ??bb03_do_command0: ; line 171 : PM_reset_ast( ); $DGL 0,13 onew ax ;[INF] 1, 1 push ax ;[INF] 1, 1 incw ax ;[INF] 1, 1 incw ax ;[INF] 1, 1 push ax ;[INF] 1, 1 mov x,#084H ; 132 ;[INF] 2, 1 call !_iic_mcu_write_a_byte ;[INF] 3, 3 addw sp,#04H ; 4 ;[INF] 2, 1 ; line 172 : RESET2_ast; $DGL 0,14 ??bb04_do_command0: clr1 P0.1 ;[INF] 3, 2 clr1 PM0.1 ;[INF] 3, 2 ??eb04_do_command0: ; line 173 : FCRAM_RST_ast; $DGL 0,15 ??bb05_do_command0: clr1 P3.0 ;[INF] 3, 2 ??eb05_do_command0: ??eb03_do_command0: ; line 174 : } ?L0036: ; line 175 : if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_FCRAM_RESET_ ; REQ ) $DGL 0,17 mov a,!_vreg_ctr+32 ;[INF] 3, 1 and a,#08H ; 8 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0038 ;[INF] 2, 4 ; line 176 : { ??bb06_do_command0: ; line 177 : FCRAM_RST_ast; $DGL 0,19 ??bb07_do_command0: clr1 P3.0 ;[INF] 3, 2 ??eb07_do_command0: ??eb06_do_command0: ; line 178 : } $DGL 0,20 br $?L0040 ;[INF] 2, 3 ?L0038: ; line 179 : else if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_RESET2_ ; REQ ) $DGL 0,21 mov a,!_vreg_ctr+32 ;[INF] 3, 1 and a,#04H ; 4 ;[INF] 2, 1 cmp0 a ;[INF] 1, 1 bz $?L0040 ;[INF] 2, 4 ; line 180 : { ??bb08_do_command0: ; line 181 : RESET2_ast; $DGL 0,23 ??bb09_do_command0: clr1 P0.1 ;[INF] 3, 2 clr1 PM0.1 ;[INF] 3, 2 ??eb09_do_command0: ??eb08_do_command0: ; line 182 : } ?L0040: ; line 183 : wait_ms( 5 ); $DGL 0,25 movw ax,#05H ; 5 ;[INF] 3, 1 call !_wait_ms ;[INF] 3, 3 ; line 184 : FCRAM_RST_neg; $DGL 0,26 ??bb0A_do_command0: set1 P3.0 ;[INF] 3, 2 ??eb0A_do_command0: ; line 185 : PM_reset_neg(); $DGL 0,27 movw ax,#03H ; 3 ;[INF] 3, 1 push ax ;[INF] 1, 1 push ax ;[INF] 1, 1 mov x,#084H ; 132 ;[INF] 2, 1 call !_iic_mcu_write_a_byte ;[INF] 3, 3 addw sp,#04H ; 4 ;[INF] 2, 1 ; line 186 : RESET2_neg; $DGL 0,28 ??bb0B_do_command0: set1 PM0.1 ;[INF] 3, 2 ??eb0B_do_command0: ??eb02_do_command0: ; line 187 : /* ; line 188 : // CODEC 不定レジスタ初期化 ; line 189 : wait_ms( 100 ); ; line 190 : { ; line 191 : u8 codec_reg_init[3] = { 0,0,0 }; ; line 192 : iic_mcu_write( IIC_SLA_CODEC, CODEC_REG_PM, 3, c ; odec_reg_init ); ; line 193 : } ; line 194 : */ ; line 195 : } ?L0035: ??eb00_do_command0: ; line 196 : } ; line 197 : ; line 198 : vreg_ctr[VREG_C_COMMAND0] = 0; $DGL 0,40 clrb !_vreg_ctr+32 ;[INF] 3, 1 ; line 199 : return ( ERR_FINISED ); $DGL 0,41 clrw bc ;[INF] 1, 1 ; line 200 : } $DGL 0,42 ??ef_do_command0: ret ;[INF] 1, 6 ??ee_do_command0: ; line 201 : ; line 202 : ; line 203 : ; line 204 : /* ======================================================== ; line 205 : 　互換向け、TWLアプリへの割り込み ; line 206 : 仮想レジスタの書き込み時に行います。 ; line 207 : ======================================================== */ ; line 208 : // task_status_immed do_command1( ) ; line 209 : ; line 210 : ; line 211 : extern u8 iic_burst_state; ; line 212 : /* ======================================================== ; line 213 : 　デバッグ用にいろいろ読んできます。 ; line 214 : 　返値はデータそのもの ; line 215 : ======================================================== */ ; line 216 : task_status_immed tski_mcu_info_read() ; line 217 : { _tski_mcu_info_read: $DGL 1,206 push hl ;[INF] 1, 1 ??bf_tski_mcu_info_read: ; line 218 : u8 temp; ; line 219 : ; line 220 : ; line 221 : if( SPD ) $DGL 0,5 push hl ;[INF] 1, 1 movw hl,#0541H ; 1345 ;[INF] 3, 1 mov1 CY,[hl].0 ;[INF] 2, 1 pop hl ;[INF] 1, 1 bc $?L0046 ;[INF] 2, 4 ; line 222 : { ??bb00_tski_mcu_info_read: ; line 223 : goto end; ??eb00_tski_mcu_info_read: ; line 224 : } ; line 225 : ; line 226 : if( STD ) $DGL 0,10 push hl ;[INF] 1, 1 movw hl,#0541H ; 1345 ;[INF] 3, 1 mov1 CY,[hl].1 ;[INF] 2, 1 pop hl ;[INF] 1, 1 sknc ;[INF] 2, 1 ; line 227 : { ??bb01_tski_mcu_info_read: ; line 228 : SPIE = 1; $DGL 0,12 set1 !IICCTL01.4 ;[INF] 4, 2 ??eb01_tski_mcu_info_read: ; line 229 : } ?L0047: ; line 230 : ; line 231 : if( IICAIF == 0 ) $DGL 0,15 bt IF2H.3,$?L0049 ;[INF] 4, 5 ; line 232 : { ??bb02_tski_mcu_info_read: ; line 233 : return( ERR_CONTINUE ); $DGL 0,17 onew bc ;[INF] 1, 1 br $?L0043 ;[INF] 2, 3 ??eb02_tski_mcu_info_read: ; line 234 : } ?L0049: ; line 235 : else ; line 236 : { ??bb03_tski_mcu_info_read: ; line 237 : IICAIF = 0; $DGL 0,21 clr1 IF2H.3 ;[INF] 3, 2 ??eb03_tski_mcu_info_read: ; line 238 : } ; line 239 : ; line 240 : switch( iic_burst_state++ ){ $DGL 0,24 mov a,!_iic_burst_state ;[INF] 3, 1 inc !_iic_burst_state ;[INF] 3, 2 shrw ax,8 ;[INF] 2, 1 onew bc ;[INF] 1, 1 subw ax,#00H ; 0 ;[INF] 3, 1 bz $?L0052 ;[INF] 2, 4 subw ax,bc ;[INF] 1, 1 bz $?L0053 ;[INF] 2, 4 subw ax,bc ;[INF] 1, 1 bz $?L0054 ;[INF] 2, 4 subw ax,bc ;[INF] 1, 1 bz $?L0055 ;[INF] 2, 4 subw ax,bc ;[INF] 1, 1 bz $?L0056 ;[INF] 2, 4 br $?L0046 ;[INF] 2, 3 ??bb04_tski_mcu_info_read: ; line 241 : case( 0 ): // 本体種類識別 ?L0052: ; line 242 : IICA = (u8)system_status.model; $DGL 0,26 mov a,!_system_status+3 ;[INF] 3, 1 mov !IICA1,a ;[INF] 3, 1 ; line 243 : break; $DGL 0,27 br $?L0051 ;[INF] 2, 3 ; line 244 : ; line 245 : case( 1 ): // IICがなにかエラーでも知らない。00かFFな ; らエラーの可能性が高い ?L0053: ; line 246 : IICA = iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VE ; R ); $DGL 0,30 clrw ax ;[INF] 1, 1 push ax ;[INF] 1, 1 mov x,#084H ; 132 ;[INF] 2, 1 call !_iic_mcu_read_a_byte ;[INF] 3, 3 pop ax ;[INF] 1, 1 mov a,c ;[INF] 1, 1 mov !IICA1,a ;[INF] 3, 1 ; line 247 : break; $DGL 0,31 br $?L0051 ;[INF] 2, 3 ; line 248 : ; line 249 : case( 2 ): // 電池メーカーの識別 ?L0054: ; line 250 : BT_DET_P = 1; $DGL 0,34 set1 P1.6 ;[INF] 3, 2 ; line 251 : IICA = ( u8 ) ( get_adc( ADC_SEL_BATT_DET ) >> 5 ); $DGL 0,35 movw ax,#09H ; 9 ;[INF] 3, 1 call !_get_adc ;[INF] 3, 3 mov a,c ;[INF] 1, 1 shr a,5 ;[INF] 2, 1 mov !IICA1,a ;[INF] 3, 1 ; line 252 : BT_DET_P = 0; $DGL 0,36 clr1 P1.6 ;[INF] 3, 2 ; line 253 : break; $DGL 0,37 br $?L0051 ;[INF] 2, 3 ; line 254 : ; line 255 : case( 3 ): // ガスゲージバージョン ?L0055: ; line 256 : IICA = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_R ; EG_VERSION ); $DGL 0,40 movw ax,#08H ; 8 ;[INF] 3, 1 call !bs_F0060 ;[INF] 3, 3 ; line 257 : break; $DGL 0,41 br $?L0051 ;[INF] 2, 3 ; line 258 : ; line 259 : case( 4 ): // LSB ?L0056: ; line 260 : IICA = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_R ; EG_VERSION + 1 ); $DGL 0,44 movw ax,#09H ; 9 ;[INF] 3, 1 call !bs_F0060 ;[INF] 3, 3 ; line 261 : break; ; line 262 : ; line 263 : default: ; line 264 : goto end; ??eb04_tski_mcu_info_read: ; line 265 : } ?L0051: ; line 266 : return( ERR_CONTINUE ); $DGL 0,50 onew bc ;[INF] 1, 1 br $?L0043 ;[INF] 2, 3 ; line 267 : ; line 268 : end: ?L0046: ; line 269 : LREL = 1; $DGL 0,53 set1 !IICCTL01.6 ;[INF] 4, 2 ; line 270 : SPIE = 0; $DGL 0,54 clr1 !IICCTL01.4 ;[INF] 4, 2 ; line 271 : IICAMK = 0; $DGL 0,55 clr1 MK2H.3 ;[INF] 3, 2 ; line 272 : iic_burst_state = 0; $DGL 0,56 clrb !_iic_burst_state ;[INF] 3, 1 ; line 273 : return( ERR_FINISED ); $DGL 0,57 clrw bc ;[INF] 1, 1 ; line 274 : } ?L0043: $DGL 0,58 ??ef_tski_mcu_info_read: pop hl ;[INF] 1, 1 ret ;[INF] 1, 6 ??ee_tski_mcu_info_read: @@CODEL CSEG @@BASE CSEG BASE END ; *** Code Information *** ; ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\task_misc.c ; ; $FUNC tsk_misc_stat(55) ; void=(void) ; CODE SIZE= 173 bytes, CLOCK_SIZE= 145 clocks, STACK_SIZE= 8 bytes ; ; $CALL set_irq(94) ; void=(int:ax, int:[sp+4]) ; ; $CALL set_irq(98) ; void=(int:ax, int:[sp+4]) ; ; $CALL set_irq(107) ; void=(int:ax, int:[sp+4]) ; ; $CALL set_irq(111) ; void=(int:ax, int:[sp+4]) ; ; $CALL renge_task_immed_add(130) ; bc=(pointer:ax) ; ; $CALL renge_task_immed_add(139) ; bc=(pointer:ax) ; ; $FUNC do_command0(159) ; bc=(void) ; CODE SIZE= 106 bytes, CLOCK_SIZE= 88 clocks, STACK_SIZE= 8 bytes ; ; $CALL iic_mcu_write_a_byte(171) ; bc=(int:ax, int:[sp+4], int:[sp+6]) ; ; $CALL wait_ms(183) ; void=(int:ax) ; ; $CALL iic_mcu_write_a_byte(185) ; bc=(int:ax, int:[sp+4], int:[sp+6]) ; ; $FUNC tski_mcu_info_read(217) ; bc=(void) ; CODE SIZE= 137 bytes, CLOCK_SIZE= 149 clocks, STACK_SIZE= 12 bytes ; ; $CALL iic_mcu_read_a_byte(246) ; bc=(int:ax, int:[sp+4]) ; ; $CALL get_adc(251) ; bc=(int:ax) ; ; $CALL iic_mcu_read_a_byte(256) ; bc=(int:ax, int:[sp+4]) ; ; $CALL iic_mcu_read_a_byte(260) ; bc=(int:ax, int:[sp+4]) ; Target chip : uPD79F0104 ; Device file : E1.00b