; 78K0R C Compiler V2.10 Assembler Source        Date:13 Jun 2010 Time:19:31:25

; Command   : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
;             renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
;             V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no task_debug.c
; In-file   : task_debug.c
; Asm-file  : inter_asm\task_debug.asm
; Para-file : 

$PROCESSOR(9F0104)
$DEBUG
$NODEBUGA
$KANJICODE SJIS
$TOL_INF	03FH, 0210H, 00H, 00H, 00H, 00H, 00H

$DGS	FIL_NAM, .file,		05CH,	0FFFEH,	03FH,	067H,	01H,	00H
$DGS	AUX_FIL, task_debug.c
$DGS	MOD_NAM, task_debug,	00H,	0FFFEH,	00H,	077H,	00H,	00H
$DGS	SEC_NAM, @@BITS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNST,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATA,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNSTL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@RLINIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INITL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATAL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CALT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, ROM_CODE,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CODEL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@BASE,	U,	U,	00H,	078H,	00H,	00H
$DGS	ENM_TAG, _pwr_state_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		01EH
$DGS	MEB_ENM, _OFF_TRIG,	00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _OFF,		01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _ON_TRIG,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _ON,		03H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _SLEEP_TRIG,	04H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _SLEEP,	05H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _BT_CHARGE,	06H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 013H,		01H
$DGS	ENM_TAG, _poweron_reason_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		025H
$DGS	MEB_ENM, _NONE,		00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _PWSW,		01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _RTC_ALARM,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 01EH,		01H
$DGS	ENM_TAG, _model_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		02FH
$DGS	MEB_ENM, _MODEL_JIKKI,	00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_TS_BOARD,	01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_SHIROBAKO,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED1,	03H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED2,	04H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED3,	05H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 025H,		01H
$DGS	STR_STR, .0fake,	00H,	0FFFEH,	08H,	0AH,	01H,	00H
$DGS	AUX_TAG, 04H,		041H
$DGS	MEB_STR, _pwr_state,	00H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 013H,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	MEB_STR, _poweron_reason,	01H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 01EH,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	BIT_FLD, _dipsw0,	010H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _dipsw1,	011H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _dipsw2,	012H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _reboot,	013H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	MEB_STR, _model,	03H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 025H,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	END_STR, .eos,		04H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 02FH,		04H
$DGS	STA_SYM, _lpf_coeff,	U,	U,	05002H,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	02FH,	02FH,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _tsk_debug,	U,	U,	01H,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	050H,	00H,	00H
$DGS	BEG_FUN, ??bf_tsk_debug,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 010H,		02H,	04AH
$DGS	REG_VAR, _temp,		06H,	0FFFFH,	010CH,	04H,	00H,	00H
$DGS	STA_SYM, _count,	?L0003,	U,	0CH,	03H,	00H,	00H
$DGS	STA_SYM, _task_interval,	?L0004,	U,	0CH,	03H,	00H,	00H
$DGS	BEG_BLK, ??bb00_tsk_debug,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 06H,		00H,	00H
$DGS	END_BLK, ??eb00_tsk_debug,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 015H
$DGS	END_FUN, ??ef_tsk_debug,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 017H
$DGS	GLV_SYM, _tsk_debug2,	U,	U,	01H,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	05CH,	00H,	00H
$DGS	BEG_FUN, ??bf_tsk_debug2,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 02BH,		04H,	056H
$DGS	AUT_VAR, _str,		00H,	0FFFFH,	0CH,	01H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	04H,	04H,	00H,	00H,	00H,	00H
$DGS	BEG_BLK, ??bb00_tsk_debug2,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 05H,		00H,	00H
$DGS	END_BLK, ??eb00_tsk_debug2,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 01CH
$DGS	END_FUN, ??ef_tsk_debug2,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 01EH
$DGS	GLV_SYM, _temp_debug_3,	U,	U,	0CH,	026H,	00H,	00H
$DGS	GLV_SYM, _system_status,	U,	U,	08H,	02H,	01H,	00H
$DGS	AUX_STR, 02FH,		00H,	04H,	00H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _vreg_ctr,	U,	U,	0CH,	02H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	01H,	01H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _iic_mcu_write,	U,	U,	0CH,	02H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	00H,	00H,	00H

	EXTRN	_system_status
	EXTRN	_vreg_ctr
	EXTRN	_iic_mcu_write
	PUBLIC	_tsk_debug
	PUBLIC	_temp_debug_3
	PUBLIC	_tsk_debug2

@@BITS	BSEG

@@CNST	CSEG	MIRRORP
_lpf_coeff:	DB	01H	; 1
	DB	02H	; 2
	DB	02H	; 2
	DB	03H	; 3
	DB	03H	; 3
	DB	02H	; 2
	DB	00H	; 0
	DB	0FEH	; 254
	DB	0FBH	; 251
	DB	0F7H	; 247
	DB	0F3H	; 243
	DB	0F0H	; 240
	DB	0F0H	; 240
	DB	0F3H	; 243
	DB	0FAH	; 250
	DB	04H	; 4
	DB	012H	; 18
	DB	025H	; 37
	DB	038H	; 56
	DB	04DH	; 77
	DB	05FH	; 95
	DB	06EH	; 110
	DB	077H	; 119
	DB	07AH	; 122
	DB	077H	; 119
	DB	06EH	; 110
	DB	05FH	; 95
	DB	04DH	; 77
	DB	038H	; 56
	DB	025H	; 37
	DB	012H	; 18
	DB	04H	; 4
	DB	0FAH	; 250
	DB	0F3H	; 243
	DB	0F0H	; 240
	DB	0F0H	; 240
	DB	0F3H	; 243
	DB	0F7H	; 247
	DB	0FBH	; 251
	DB	0FEH	; 254
	DB	00H	; 0
	DB	02H	; 2
	DB	03H	; 3
	DB	03H	; 3
	DB	02H	; 2
	DB	02H	; 2
	DB	01H	; 1
	DB	(1)

@@R_INIT	CSEG	UNIT64KP
	DB	00H	; 0
	DB	(1)

@@INIT	DSEG	BASEP
?L0003:	DS	(1)
	DS	(1)

@@DATA	DSEG	BASEP
?L0004:	DS	(1)
_temp_debug_3:	DS	(1)

@@R_INIS	CSEG	UNIT64KP

@@INIS	DSEG	SADDRP

@@DATS	DSEG	SADDRP

@@CNSTL	CSEG	PAGE64KP

@@RLINIT	CSEG	UNIT64KP

@@INITL	DSEG	UNIT64KP

@@DATAL	DSEG	UNIT64KP

@@CALT	CSEG	CALLT0

; line     1 : #pragma SFR
; line     2 : #pragma NOP
; line     3 : #pragma HALT
; line     4 : #pragma STOP
; line     5 : 
; line     6 : #include "incs.h"
; line     7 : #include "renge.h"
; line     8 : #include "pm.h"
; line     9 : 
; line    10 : #include "accero.h"
; line    11 : 
; line    12 : 
; line    13 : /* ========================================================
; line    14 :  ======================================================== */
; line    15 : void tsk_debug(  )
; line    16 : {

ROM_CODE	CSEG	BASE
_tsk_debug:
$DGL	1,67
	push	hl						;[INF] 1, 1
??bf_tsk_debug:
; line    17 :     u8      temp;
; line    18 :     static u8 count = 0;
; line    19 :     static u8 task_interval;
; line    20 : 
; line    21 :     if( system_status.pwr_state == ON_TRIG ){
$DGL	0,6
	cmp	!_system_status,#02H	; 2 			;[INF] 4, 1
??bb00_tsk_debug:
??eb00_tsk_debug:
; line    22 : 
; line    23 : #ifdef _MODEL_WM0_
; line    24 :         PM_CHG_TIMEOUT_DISABLE();                            // 
;              /WL_RST に配線されています
; line    25 : #endif
; line    26 : #ifndef _MODEL_CTR_
; line    27 :         iic_mcu_write_a_byte( IIC_SLA_DCP, 0x08, 0x80 );     // 
;              ACR←0x80 揮発モードへ
; line    28 : #endif
; line    29 : 
; line    30 :     /*
; line    31 :        temp = iic_mcu_read_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_
;              DO );
; line    32 :        count += 1;
; line    33 :        iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, co
;              unt );
; line    34 :        iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, count );
; line    35 :      */
; line    36 :     }
; line    37 :     return;
; line    38 : }
$DGL	0,23
??ef_tsk_debug:
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_tsk_debug:
; line    39 : 
; line    40 : u8 temp_debug_3;
; line    41 : 
; line    42 : void tsk_debug2(  )
; line    43 : {
_tsk_debug2:
$DGL	1,80
	push	hl						;[INF] 1, 1
	subw	sp,#04H						;[INF] 2, 1
	movw	hl,sp						;[INF] 3, 1
??bf_tsk_debug2:
; line    44 :     u8      str[4];
; line    45 : 
; line    46 :     if( ( system_status.pwr_state == ON ) || ( system_status.pwr
;              _state == SLEEP ) )
$DGL	0,4
	cmp	!_system_status,#03H	; 3 			;[INF] 4, 1
	bz	$?L0011						;[INF] 2, 4
	cmp	!_system_status,#05H	; 5 			;[INF] 4, 1
	bnz	$?L0009						;[INF] 2, 4
?L0011:
; line    47 :     {
??bb00_tsk_debug2:
; line    48 : /*
; line    49 :         str[3] = vreg_ctr[ VREG_C_FREE0 ];
; line    50 :         str[2] = vreg_ctr[ VREG_C_FREE1 ];
; line    51 :         str[1] = vreg_ctr[ VREG_C_STATUS ];
; line    52 :         str[0] = vreg_ctr[ VREG_C_RTC_SEC ];
; line    53 : */
; line    54 :         str[3] = vreg_ctr[ VREG_C_SND_VOL ];
$DGL	0,12
	mov	a,!_vreg_ctr+9					;[INF] 3, 1
	mov	[hl+3],a	; str 				;[INF] 2, 1
; line    55 :         str[2] = vreg_ctr[ VREG_C_TUNE ];
$DGL	0,13
	mov	a,!_vreg_ctr+8					;[INF] 3, 1
	mov	[hl+2],a	; str 				;[INF] 2, 1
; line    56 :         str[1] = vreg_ctr[ VREG_C_ACC_CONFIG ];
$DGL	0,14
	mov	a,!_vreg_ctr+64					;[INF] 3, 1
	mov	[hl+1],a	; str 				;[INF] 2, 1
; line    57 :         str[0] = SEC;
$DGL	0,15
	mov	a,SEC						;[INF] 2, 1
	mov	[hl],a	; str 					;[INF] 1, 1
; line    58 : 
; line    59 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VR
;              EG_C_IRQ1 ] );
; line    60 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura );
; line    61 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VR
;              EG_C_SND_VOL ] );
; line    62 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VR
;              EG_TUNE ] );
; line    63 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VR
;              EG_C_ACC_ZH ] );
; line    64 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VR
;              EG_C_TUNE ] );
; line    65 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VR
;              EG_C_SND_VOL ] );
; line    66 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VR
;              EG_C_STATUS ] );
; line    67 : //    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VR
;              EG_C_ACC_ZH ] );
; line    68 : 
; line    69 :         iic_mcu_write( IIC_SLA_DBG_MONITOR, 0, 4, &str[0] );
$DGL	0,27
	movw	ax,hl						;[INF] 1, 1
	push	ax						;[INF] 1, 1
	movw	ax,#04H	; 4 					;[INF] 3, 1
	push	ax						;[INF] 1, 1
	clrw	ax						;[INF] 1, 1
	push	ax						;[INF] 1, 1
	mov	x,#044H	; 68 					;[INF] 2, 1
	call	!_iic_mcu_write					;[INF] 3, 3
	addw	sp,#06H	; 6 					;[INF] 2, 1
??eb00_tsk_debug2:
; line    70 :     }
?L0009:
; line    71 :     return;
; line    72 : }
$DGL	0,30
??ef_tsk_debug2:
	addw	sp,#04H						;[INF] 2, 1
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_tsk_debug2:

@@CODEL	CSEG

@@BASE	CSEG	BASE
	END


; *** Code Information ***
;
; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\task_debug.c
;
; $FUNC tsk_debug(16)
;	void=(void)
;	CODE SIZE= 7 bytes, CLOCK_SIZE= 9 clocks, STACK_SIZE= 2 bytes
;
; $FUNC tsk_debug2(43)
;	void=(void)
;	CODE SIZE= 55 bytes, CLOCK_SIZE= 40 clocks, STACK_SIZE= 16 bytes
;
; $CALL iic_mcu_write(69)
;	bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8])

; Target chip : uPD79F0104
; Device file : E1.00b