78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1 Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\accero.asm Para-file: In-file: inter_asm\accero.asm Obj-file: accero.rel Prn-file: accero.prn Assemble list ALNO STNO ADRS OBJECT M I SOURCE STATEMENT 1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:24 2 2 3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i 4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\ 5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no accero.c 6 6 ; In-file : accero.c 7 7 ; Asm-file : inter_asm\accero.asm 8 8 ; Para-file : 9 9 10 10 $PROCESSOR(9F0104) 11 11 $DEBUG 12 12 $NODEBUGA 13 13 $KANJICODE SJIS 14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H 15 15 16 16 $DGS FIL_NAM, .file, 0B7H, 0FFFEH, 03FH, 067H, 01H, 00H 17 17 $DGS AUX_FIL, accero.c 18 18 $DGS MOD_NAM, accero, 00H, 0FFFEH, 00H, 077H, 00H, 00H 19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H 20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H 21 21 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H 22 22 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H 23 23 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H 24 24 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H 25 25 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H 26 26 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H 27 27 $DGS SEC_NAM, @@CNSTL, U, U, 00H, 078H, 00H, 00H 28 28 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H 29 29 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H 30 30 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H 31 31 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H 32 32 $DGS SEC_NAM, ROM_CODE, U, U, 00H, 078H, 00H, 00H 33 33 $DGS SEC_NAM, @@CODEL, U, U, 00H, 078H, 00H, 00H 34 34 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H 35 35 $DGS ENM_TAG, _pwr_state_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H 36 36 $DGS AUX_TAG, 01H, 01EH 37 37 $DGS MEB_ENM, _OFF_TRIG, 00H, 0FFFFH, 04H, 010H, 00H, 00H 38 38 $DGS MEB_ENM, _OFF, 01H, 0FFFFH, 04H, 010H, 00H, 00H 39 39 $DGS MEB_ENM, _ON_TRIG, 02H, 0FFFFH, 04H, 010H, 00H, 00H 40 40 $DGS MEB_ENM, _ON, 03H, 0FFFFH, 04H, 010H, 00H, 00H 41 41 $DGS MEB_ENM, _SLEEP_TRIG, 04H, 0FFFFH, 04H, 010H, 00H, 00H 42 42 $DGS MEB_ENM, _SLEEP, 05H, 0FFFFH, 04H, 010H, 00H, 00H 43 43 $DGS MEB_ENM, _BT_CHARGE, 06H, 0FFFFH, 04H, 010H, 00H, 00H 44 44 $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H 45 45 $DGS AUX_EOS, 013H, 01H 46 46 $DGS ENM_TAG, _poweron_reason_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H 47 47 $DGS AUX_TAG, 01H, 025H 48 48 $DGS MEB_ENM, _NONE, 00H, 0FFFFH, 04H, 010H, 00H, 00H 49 49 $DGS MEB_ENM, _PWSW, 01H, 0FFFFH, 04H, 010H, 00H, 00H 50 50 $DGS MEB_ENM, _RTC_ALARM, 02H, 0FFFFH, 04H, 010H, 00H, 00H 51 51 $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H 52 52 $DGS AUX_EOS, 01EH, 01H 53 53 $DGS ENM_TAG, _model_, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H 54 54 $DGS AUX_TAG, 01H, 02FH 55 55 $DGS MEB_ENM, _MODEL_JIKKI, 00H, 0FFFFH, 04H, 010H, 00H, 00H 56 56 $DGS MEB_ENM, _MODEL_TS_BOARD, 01H, 0FFFFH, 04H, 010H, 00H, 00H 57 57 $DGS MEB_ENM, _MODEL_SHIROBAKO, 02H, 0FFFFH, 04H, 010H, 00H, 00H 58 58 $DGS MEB_ENM, _MODEL_RESERVED1, 03H, 0FFFFH, 04H, 010H, 00H, 00H 59 59 $DGS MEB_ENM, _MODEL_RESERVED2, 04H, 0FFFFH, 04H, 010H, 00H, 00H 60 60 $DGS MEB_ENM, _MODEL_RESERVED3, 05H, 0FFFFH, 04H, 010H, 00H, 00H 61 61 $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H 62 62 $DGS AUX_EOS, 025H, 01H 63 63 $DGS STR_STR, .0fake, 00H, 0FFFEH, 08H, 0AH, 01H, 00H 64 64 $DGS AUX_TAG, 04H, 041H 65 65 $DGS MEB_STR, _pwr_state, 00H, 0FFFFH, 0AH, 08H, 01H, 00H 66 66 $DGS AUX_STR, 013H, 00H, 01H, 00H, 00H, 00H, 00H, 00H 67 67 $DGS MEB_STR, _poweron_reason, 01H, 0FFFFH, 0AH, 08H, 01H, 00H 68 68 $DGS AUX_STR, 01EH, 00H, 01H, 00H, 00H, 00H, 00H, 00H 69 69 $DGS BIT_FLD, _dipsw0, 010H, 0FFFFH, 0CH, 012H, 01H, 00H 70 70 $DGS AUX_BIT, 00H, 01H 71 71 $DGS BIT_FLD, _dipsw1, 011H, 0FFFFH, 0CH, 012H, 01H, 00H 72 72 $DGS AUX_BIT, 00H, 01H 73 73 $DGS BIT_FLD, _dipsw2, 012H, 0FFFFH, 0CH, 012H, 01H, 00H 74 74 $DGS AUX_BIT, 00H, 01H 75 75 $DGS BIT_FLD, _reboot, 013H, 0FFFFH, 0CH, 012H, 01H, 00H 76 76 $DGS AUX_BIT, 00H, 01H 77 77 $DGS MEB_STR, _model, 03H, 0FFFFH, 0AH, 08H, 01H, 00H 78 78 $DGS AUX_STR, 025H, 00H, 01H, 00H, 00H, 00H, 00H, 00H 79 79 $DGS END_STR, .eos, 04H, 0FFFFH, 00H, 066H, 01H, 00H 80 80 $DGS AUX_EOS, 02FH, 04H 81 81 $DGS ENM_TAG, .2fake, 00H, 0FFFEH, 0AH, 0FH, 01H, 00H 82 82 $DGS AUX_TAG, 01H, 047H 83 83 $DGS MEB_ENM, _ERR_FINISED, 00H, 0FFFFH, 04H, 010H, 00H, 00H 84 84 $DGS MEB_ENM, _ERR_CONTINUE, 01H, 0FFFFH, 04H, 010H, 00H, 00H 85 85 $DGS END_STR, .eos, 01H, 0FFFFH, 00H, 066H, 01H, 00H 86 86 $DGS AUX_EOS, 041H, 01H 87 87 $DGS LAB_SYM, bs_F0038, U, U, 00H, 06H, 00H, 00H 88 88 $DGS LAB_SYM, es_F0038, U, U, 00H, 06H, 00H, 00H 89 89 $DGS STA_SYM, _lpf_coeff, U, U, 05002H, 03H, 01H, 03H 90 90 $DGS AUX_STR, 00H, 00H, 02FH, 02FH, 00H, 00H, 00H, 00H 91 91 $DGS GLV_SYM, _tsk_cbk_accero, U, U, 0AH, 026H, 01H, 02H 92 92 $DGS AUX_FUN, 041H, U, U, 067H, 00H, 00H 93 93 $DGS BEG_FUN, ??bf_tsk_cbk_accero, U, U, 00H, 065H, 01H, 00H 94 94 $DGS AUX_BEG, 042H, 06H, 04FH 95 95 $DGS BEG_BLK, ??bb00_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 96 96 $DGS AUX_BEG, 0EH, 00H, 053H 97 97 $DGS END_BLK, ??eb00_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 98 98 $DGS AUX_END, 014H 99 99 $DGS BEG_BLK, ??bb01_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 100 100 $DGS AUX_BEG, 016H, 00H, 055H 101 101 $DGS BEG_BLK, ??bb02_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 102 102 $DGS AUX_BEG, 01CH, 00H, 057H 103 103 $DGS BEG_BLK, ??bb03_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 104 104 $DGS AUX_BEG, 020H, 00H, 05FH 105 105 $DGS AUT_VAR, _temp, 00H, 0FFFFH, 0CH, 01H, 01H, 03H 106 106 $DGS AUX_STR, 00H, 021H, 06H, 06H, 00H, 00H, 00H, 00H 107 107 $DGS END_BLK, ??eb03_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 108 108 $DGS AUX_END, 023H 109 109 $DGS END_BLK, ??eb02_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 110 110 $DGS AUX_END, 024H 111 111 $DGS BEG_BLK, ??bb04_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 112 112 $DGS AUX_BEG, 029H, 00H, 00H 113 113 $DGS END_BLK, ??eb04_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 114 114 $DGS AUX_END, 02DH 115 115 $DGS END_BLK, ??eb01_tsk_cbk_accero, U, U, 00H, 064H, 01H, 00H 116 116 $DGS AUX_END, 02EH 117 117 $DGS END_FUN, ??ef_tsk_cbk_accero, U, U, 00H, 065H, 01H, 00H 118 118 $DGS AUX_END, 030H 119 119 $DGS GLV_SYM, _acc_read, U, U, 0AH, 026H, 01H, 02H 120 120 $DGS AUX_FUN, 041H, U, U, 075H, 00H, 00H 121 121 $DGS BEG_FUN, ??bf_acc_read, U, U, 00H, 065H, 01H, 00H 122 122 $DGS AUX_BEG, 07BH, 00H, 06BH 123 123 $DGS BEG_BLK, ??bb00_acc_read, U, U, 00H, 064H, 01H, 00H 124 124 $DGS AUX_BEG, 06H, 00H, 06DH 125 125 $DGS BEG_BLK, ??bb01_acc_read, U, U, 00H, 064H, 01H, 00H 126 126 $DGS AUX_BEG, 07H, 00H, 00H 127 127 $DGS END_BLK, ??eb01_acc_read, U, U, 00H, 064H, 01H, 00H 128 128 $DGS AUX_END, 07H 129 129 $DGS END_BLK, ??eb00_acc_read, U, U, 00H, 064H, 01H, 00H 130 130 $DGS AUX_END, 08H 131 131 $DGS END_FUN, ??ef_acc_read, U, U, 00H, 065H, 01H, 00H 132 132 $DGS AUX_END, 0AH 133 133 $DGS GLV_SYM, _acc_write, U, U, 0AH, 026H, 01H, 02H 134 134 $DGS AUX_FUN, 041H, U, U, 083H, 00H, 00H 135 135 $DGS BEG_FUN, ??bf_acc_write, U, U, 00H, 065H, 01H, 00H 136 136 $DGS AUX_BEG, 08CH, 00H, 079H 137 137 $DGS BEG_BLK, ??bb00_acc_write, U, U, 00H, 064H, 01H, 00H 138 138 $DGS AUX_BEG, 05H, 00H, 07BH 139 139 $DGS BEG_BLK, ??bb01_acc_write, U, U, 00H, 064H, 01H, 00H 140 140 $DGS AUX_BEG, 06H, 00H, 00H 141 141 $DGS END_BLK, ??eb01_acc_write, U, U, 00H, 064H, 01H, 00H 142 142 $DGS AUX_END, 06H 143 143 $DGS END_BLK, ??eb00_acc_write, U, U, 00H, 064H, 01H, 00H 144 144 $DGS AUX_END, 07H 145 145 $DGS END_FUN, ??ef_acc_write, U, U, 00H, 065H, 01H, 00H 146 146 $DGS AUX_END, 09H 147 147 $DGS GLV_SYM, _acc_hosu_set, U, U, 0AH, 026H, 01H, 02H 148 148 $DGS AUX_FUN, 041H, U, U, 0A5H, 00H, 00H 149 149 $DGS BEG_FUN, ??bf_acc_hosu_set, U, U, 00H, 065H, 01H, 00H 150 150 $DGS AUX_BEG, 09EH, 0AH, 089H 151 151 $DGS AUT_VAR, _str_send_buf, 06H, 0FFFFH, 0CH, 01H, 01H, 03H 152 152 $DGS AUX_STR, 00H, 00H, 04H, 04H, 00H, 00H, 00H, 00H 153 153 $DGS BEG_BLK, ??bb00_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 154 154 $DGS AUX_BEG, 06H, 00H, 08DH 155 155 $DGS END_BLK, ??eb00_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 156 156 $DGS AUX_END, 0CH 157 157 $DGS BEG_BLK, ??bb01_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 158 158 $DGS AUX_BEG, 0CH, 00H, 091H 159 159 $DGS END_BLK, ??eb01_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 160 160 $DGS AUX_END, 0EH 161 161 $DGS BEG_BLK, ??bb02_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 162 162 $DGS AUX_BEG, 028H, 00H, 095H 163 163 $DGS END_BLK, ??eb02_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 164 164 $DGS AUX_END, 02FH 165 165 $DGS BEG_BLK, ??bb03_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 166 166 $DGS AUX_BEG, 031H, 00H, 099H 167 167 $DGS END_BLK, ??eb03_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 168 168 $DGS AUX_END, 03AH 169 169 $DGS BEG_BLK, ??bb04_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 170 170 $DGS AUX_BEG, 03FH, 00H, 09BH 171 171 $DGS BEG_BLK, ??bb05_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 172 172 $DGS AUX_BEG, 041H, 00H, 00H 173 173 $DGS AUT_VAR, _temp, 00H, 0FFFFH, 0CH, 01H, 01H, 03H 174 174 $DGS AUX_STR, 00H, 042H, 06H, 06H, 00H, 00H, 00H, 00H 175 175 $DGS END_BLK, ??eb05_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 176 176 $DGS AUX_END, 044H 177 177 $DGS END_BLK, ??eb04_acc_hosu_set, U, U, 00H, 064H, 01H, 00H 178 178 $DGS AUX_END, 045H 179 179 $DGS END_FUN, ??ef_acc_hosu_set, U, U, 00H, 065H, 01H, 00H 180 180 $DGS AUX_END, 047H 181 181 $DGS GLV_SYM, _intp23_ACC_ready, U, U, 0E001H, 026H, 01H, 02H 182 182 $DGS AUX_FUN, 00H, U, U, 0B7H, 00H, 00H 183 183 $DGS BEG_FUN, ??bf_intp23_ACC_ready, U, U, 00H, 065H, 01H, 00H 184 184 $DGS AUX_BEG, 0EDH, 016H, 0A9H 185 185 $DGS BEG_BLK, ??bb00_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 186 186 $DGS AUX_BEG, 04H, 00H, 0ABH 187 187 $DGS BEG_BLK, ??bb01_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 188 188 $DGS AUX_BEG, 06H, 00H, 0ADH 189 189 $DGS BEG_BLK, ??bb02_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 190 190 $DGS AUX_BEG, 08H, 00H, 00H 191 191 $DGS END_BLK, ??eb02_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 192 192 $DGS AUX_END, 0AH 193 193 $DGS END_BLK, ??eb01_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 194 194 $DGS AUX_END, 0BH 195 195 $DGS END_BLK, ??eb00_intp23_ACC_ready, U, U, 00H, 064H, 01H, 00H 196 196 $DGS AUX_END, 0CH 197 197 $DGS END_FUN, ??ef_intp23_ACC_ready, U, U, 00H, 065H, 01H, 00H 198 198 $DGS AUX_END, 0DH 199 199 $DGS GLV_SYM, _iic_mcu_read, U, U, 0CH, 02H, 01H, 02H 200 200 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 201 201 $DGS GLV_SYM, _vreg_ctr, U, U, 0CH, 02H, 01H, 03H 202 202 $DGS AUX_STR, 00H, 00H, 01H, 01H, 00H, 00H, 00H, 00H 203 203 $DGS GLV_SYM, _system_status, U, U, 08H, 02H, 01H, 00H 204 204 $DGS AUX_STR, 02FH, 00H, 04H, 00H, 00H, 00H, 00H, 00H 205 205 $DGS GLV_SYM, _set_irq, U, U, 01H, 02H, 01H, 02H 206 206 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 207 207 $DGS GLV_SYM, _pedometer, U, U, 01H, 02H, 01H, 02H 208 208 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 209 209 $DGS GLV_SYM, _iic_mcu_read_a_byte, U, U, 0CH, 02H, 01H, 02H 210 210 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 211 211 $DGS GLV_SYM, _iic_mcu_write_a_byte, U, U, 0CH, 02H, 01H, 02H 212 212 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 213 213 $DGS GLV_SYM, _iic_mcu_bus_status, U, U, 0CH, 02H, 00H, 00H 214 214 $DGS GLV_SYM, _iic_mcu_write, U, U, 0CH, 02H, 01H, 02H 215 215 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 216 216 $DGS GLV_SYM, _@SEGAX, U, U, 00H, 02H, 00H, 00H 217 217 $DGS GLV_SYM, _renge_task_immed_add, U, U, 0CH, 02H, 01H, 02H 218 218 $DGS AUX_FUN, 00H, U, U, 00H, 00H, 00H 219 219 $DGS GLV_SYM, _@SEGDE, U, U, 00H, 02H, 00H, 00H 220 220 $DGS GLV_SYM, _@RTARG0, U, U, 00H, 02H, 00H, 00H 221 221 222 222 EXTRN _iic_mcu_read 223 223 EXTRN _vreg_ctr 224 224 EXTRN _system_status 225 225 EXTRN _set_irq 226 226 EXTRN _pedometer 227 227 EXTRN _iic_mcu_read_a_byte 228 228 EXTRN _iic_mcu_write_a_byte 229 229 EXTRN _iic_mcu_bus_status 230 230 EXTRN _iic_mcu_write 231 231 EXTRN _@SEGAX 232 232 EXTRN _@SEGDE 233 233 EXTRN _@RTARG0 234 234 EXTRN _renge_task_immed_add 235 235 PUBLIC _tsk_cbk_accero 236 236 PUBLIC _acc_read 237 237 PUBLIC _acc_write 238 238 PUBLIC _acc_hosu_set 239 239 PUBLIC _intp23_ACC_ready 240 240 241 241 ----- @@BITS BSEG 242 242 243 243 ----- @@CNST CSEG MIRRORP 244 244 00000 01 _lpf_coeff: DB 01H ; 1 245 245 00001 02 DB 02H ; 2 246 246 00002 02 DB 02H ; 2 247 247 00003 03 DB 03H ; 3 248 248 00004 03 DB 03H ; 3 249 249 00005 02 DB 02H ; 2 250 250 00006 00 DB 00H ; 0 251 251 00007 FE DB 0FEH ; 254 252 252 00008 FB DB 0FBH ; 251 253 253 00009 F7 DB 0F7H ; 247 254 254 0000A F3 DB 0F3H ; 243 255 255 0000B F0 DB 0F0H ; 240 256 256 0000C F0 DB 0F0H ; 240 257 257 0000D F3 DB 0F3H ; 243 258 258 0000E FA DB 0FAH ; 250 259 259 0000F 04 DB 04H ; 4 260 260 00010 12 DB 012H ; 18 261 261 00011 25 DB 025H ; 37 262 262 00012 38 DB 038H ; 56 263 263 00013 4D DB 04DH ; 77 264 264 00014 5F DB 05FH ; 95 265 265 00015 6E DB 06EH ; 110 266 266 00016 77 DB 077H ; 119 267 267 00017 7A DB 07AH ; 122 268 268 00018 77 DB 077H ; 119 269 269 00019 6E DB 06EH ; 110 270 270 0001A 5F DB 05FH ; 95 271 271 0001B 4D DB 04DH ; 77 272 272 0001C 38 DB 038H ; 56 273 273 0001D 25 DB 025H ; 37 274 274 0001E 12 DB 012H ; 18 275 275 0001F 04 DB 04H ; 4 276 276 00020 FA DB 0FAH ; 250 277 277 00021 F3 DB 0F3H ; 243 278 278 00022 F0 DB 0F0H ; 240 279 279 00023 F0 DB 0F0H ; 240 280 280 00024 F3 DB 0F3H ; 243 281 281 00025 F7 DB 0F7H ; 247 282 282 00026 FB DB 0FBH ; 251 283 283 00027 FE DB 0FEH ; 254 284 284 00028 00 DB 00H ; 0 285 285 00029 02 DB 02H ; 2 286 286 0002A 03 DB 03H ; 3 287 287 0002B 03 DB 03H ; 3 288 288 0002C 02 DB 02H ; 2 289 289 0002D 02 DB 02H ; 2 290 290 0002E 01 DB 01H ; 1 291 291 0002F 00 DB (1) 292 292 293 293 ----- @@R_INIT CSEG UNIT64KP 294 294 295 295 ----- @@INIT DSEG BASEP 296 296 297 297 ----- @@DATA DSEG BASEP 298 298 299 299 ----- @@R_INIS CSEG UNIT64KP 300 300 301 301 ----- @@INIS DSEG SADDRP 302 302 303 303 ----- @@DATS DSEG SADDRP 304 304 305 305 ----- @@CNSTL CSEG PAGE64KP 306 306 307 307 ----- @@RLINIT CSEG UNIT64KP 308 308 309 309 ----- @@INITL DSEG UNIT64KP 310 310 311 311 ----- @@DATAL DSEG UNIT64KP 312 312 313 313 ----- @@CALT CSEG CALLT0 314 314 315 315 ; Sub-Routines created by CC78K0R 316 316 317 317 ----- ROM_CODE CSEG BASE 318 318 00000 bs_F0038: 319 319 00000 C1 push ax ;[INF] 1, 1 320 320 00001 300600 movw ax,#06H ; 6 ;[INF] 3, 1 321 321 00004 C1 push ax ;[INF] 1, 1 322 322 00005 50A8 mov x,#0A8H ; 168 ;[INF] 2, 1 323 323 00007 C1 push ax ;[INF] 1, 1 324 324 00008 5030 mov x,#030H ; 48 ;[INF] 2, 1 325 325 0000A RFD0000 call !_iic_mcu_read ;[INF] 3, 3 326 326 0000D 1006 addw sp,#06H ; 6 ;[INF] 2, 1 327 327 0000F D7 ret ;[INF] 1, 6 328 328 00010 es_F0038: 329 329 330 330 ; *** Sub-Routine Information *** 331 331 ; 332 332 ; $SUB bs_F0038 333 333 ; CODE SIZE= 16 bytes 334 334 335 335 ; End of Sub-Routines 336 336 337 337 ; line 1 : /* ======================================================== 338 338 ; line 2 : 　加速度センサ関係 339 339 ; line 3 : ・データ更新完了でデータを吸い上げ手レジスタを更新、CPUに割り込み 340 340 ; line 4 : ・フラグが立っていれば歩数カウント 341 341 ; line 5 : ・加速度センサ割り込みからタスクを登録して下さい。（I2Cの競合回避 342 342 ; などがあるので） 343 343 ; line 6 : 344 344 ; line 7 : ======================================================== */ 345 345 ; line 8 : #pragma SFR 346 346 ; line 9 : #pragma NOP 347 347 ; line 10 : #pragma HALT 348 348 ; line 11 : #pragma STOP 349 349 ; line 12 : #pragma ROT 350 350 ; line 13 : // rorb, rolb, rorw, rolw 351 351 ; line 14 : #pragma MUL 352 352 ; line 15 : #pragma BCD 353 353 ; line 16 : 354 354 ; line 17 : #include "incs.h" 355 355 ; line 18 : #include 356 356 ; line 19 : 357 357 ; line 20 : // ======================================================== 358 358 ; line 21 : // レジスタ名 359 359 ; line 22 : #define ACC_REG_WHOAMI 0x0F 360 360 ; line 23 : #define ACC_REG_CTRL1 0x20 361 361 ; line 24 : #define ACC_REG_CTRL5 0x24 362 362 ; line 25 : #define ACC_REG_X 0x28 363 363 ; line 26 : 364 364 ; line 27 : // ビット位置 365 365 ; line 28 : #define ACC_bP_PM0 5 366 366 ; line 29 : #define ACC_bP_DR0 3 367 367 ; line 30 : 368 368 ; line 31 : // ビット設定値 369 369 ; line 32 : #define ACC_BITS_PM_PDN 0 370 370 ; line 33 : #define ACC_BITS_PM_NORM 1 371 371 ; line 34 : #define ACC_BITS_PM_LP0R5 2 372 372 ; line 35 : #define ACC_BITS_PM_LP1 3 373 373 ; line 36 : #define ACC_BITS_PM_LP2 4 374 374 ; line 37 : #define ACC_BITS_PM_LP5 5 375 375 ; line 38 : #define ACC_BITS_PM_LP10 6 376 376 ; line 39 : 377 377 ; line 40 : #define ACC_BITS_DR_50Hz 0 378 378 ; line 41 : #define ACC_BITS_DR_100Hz 1 379 379 ; line 42 : #define ACC_BITS_DR_400Hz 2 380 380 ; line 43 : #define ACC_BITS_DR_1000Hz 3 381 381 ; line 44 : 382 382 ; line 45 : #define ACC_BITS_ALL_AXIS_ON 7 383 383 ; line 46 : 384 384 ; line 47 : 385 385 ; line 48 : #define VREG_BITMASK_ACC_CONF_ACQ ( 1 << 0 ) 386 386 ; line 49 : #define VREG_BITMASK_ACC_CONF_HOSU ( 1 << 1 ) 387 387 ; line 50 : 388 388 ; line 51 : 389 389 ; line 52 : 390 390 ; line 53 : 391 391 ; line 54 : // ======================================================== 392 392 ; line 55 : task_status tsk_soft_int( ); 393 393 ; line 56 : 394 394 ; line 57 : 395 395 ; line 58 : 396 396 ; line 59 : /* ======================================================== 397 397 ; line 60 : 　・割り込みを確認してデータを吸い上げ、レジスタに書き出します 398 398 ; line 61 : ・本当であればコールバック関数を登録しておけばいいじゃんとなる 399 399 ; のですが、 400 400 ; line 62 : I2Cが使用中だったら？とか考えると私ではそこまでできないのです。 401 401 ; line 63 : ・自動歩数計とかでも結局 402 402 ; line 64 : ======================================================== */ 403 403 ; line 65 : task_status_immed tsk_cbk_accero( ) 404 404 ; line 66 : { // （疑似）isrから登録されます 405 405 406 406 ----- ROM_CODE CSEG BASE 407 407 00010 _tsk_cbk_accero: 408 408 $DGL 1,75 409 409 00010 C7 push hl ;[INF] 1, 1 410 410 00011 2006 subw sp,#06H ;[INF] 2, 1 411 411 00013 FBF8FF movw hl,sp ;[INF] 3, 1 412 412 00016 ??bf_tsk_cbk_accero: 413 413 ; line 67 : 414 414 ; line 68 : /* 415 415 ; line 69 : if(( system_status.pwr_state == OFF ) || ( system_status.pwr 416 416 ; _state == BT_CHARGE ) ) 417 417 ; line 70 : { 418 418 ; line 71 : return ( ERR_SUCCESS ); 419 419 ; line 72 : } 420 420 ; line 73 : else 421 421 ; line 74 : { 422 422 ; line 75 : */ 423 423 ; line 76 : // 加速度センサデータレジスタへの反映 424 424 ; line 77 : if( iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6 425 425 ; , &vreg_ctr[VREG_C_ACC_XL] ) 426 426 ; line 78 : != ERR_SUCCESS ) 427 427 $DGL 0,13 428 428 00016 R344500 movw de,#loww (_vreg_ctr+69) ;[INF] 3, 1 429 429 00019 C5 push de ;[INF] 1, 1 430 430 0001A 300600 movw ax,#06H ; 6 ;[INF] 3, 1 431 431 0001D C1 push ax ;[INF] 1, 1 432 432 0001E 50A8 mov x,#0A8H ; 168 ;[INF] 2, 1 433 433 00020 C1 push ax ;[INF] 1, 1 434 434 00021 5030 mov x,#030H ; 48 ;[INF] 2, 1 435 435 00023 RFD0000 call !_iic_mcu_read ;[INF] 3, 3 436 436 00026 1006 addw sp,#06H ; 6 ;[INF] 2, 1 437 437 00028 D2 cmp0 c ;[INF] 1, 1 438 438 00029 DD0D bz $?L0003 ;[INF] 2, 4 439 439 ; line 79 : { 440 440 0002B ??bb00_tsk_cbk_accero: 441 441 ; line 80 : // 加速度センサが異常になったので止める 442 442 ; line 81 : vreg_ctr[VREG_C_ACC_CONFIG] &= ~( VREG_BITMASK_ACC_CONF_ 443 443 ; HOSU | VREG_BITMASK_ACC_CONF_ACQ ); 444 444 $DGL 0,16 445 445 0002B R344000 movw de,#loww (_vreg_ctr+64) ;[INF] 3, 1 446 446 0002E 89 mov a,[de] ;[INF] 1, 1 447 447 0002F 5CFC and a,#0FCH ; 252 ;[INF] 2, 1 448 448 00031 99 mov [de],a ;[INF] 1, 1 449 449 ; line 82 : // vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR; 450 450 ; line 83 : acc_hosu_set(); 451 451 $DGL 0,18 452 452 00032 RFDBF00 call !_acc_hosu_set ;[INF] 3, 3 453 453 ; line 84 : return ( ERR_SUCCESS ); // タスクの削除は必要 454 454 $DGL 0,19 455 455 00035 F7 clrw bc ;[INF] 1, 1 456 456 00036 EF3C br $?L0002 ;[INF] 2, 3 457 457 00038 ??eb00_tsk_cbk_accero: 458 458 ; line 85 : } 459 459 00038 ?L0003: 460 460 ; line 86 : else 461 461 ; line 87 : { 462 462 00038 ??bb01_tsk_cbk_accero: 463 463 ; line 88 : // 正常時パス // 464 464 ; line 89 : // 加速度更新＆割り込み 465 465 ; line 90 : if( (( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CO 466 466 ; NF_ACQ ) != 0 ) && 467 467 $DGL 0,25 468 468 00038 R8F4000 mov a,!_vreg_ctr+64 ;[INF] 3, 1 469 469 0003B 5C01 and a,#01H ; 1 ;[INF] 2, 1 470 470 0003D D1 cmp0 a ;[INF] 1, 1 471 471 0003E DD1C bz $?L0007 ;[INF] 2, 4 472 472 ; line 91 : ( system_status.pwr_state == ON ) 473 473 $DGL 0,26 474 474 00040 R40000003 cmp !_system_status,#03H ; 3 ;[INF] 4, 1 475 475 00044 DF16 bnz $?L0007 ;[INF] 2, 4 476 476 ; line 92 : ) 477 477 ; line 93 : { 478 478 00046 ??bb02_tsk_cbk_accero: 479 479 ; line 94 : set_irq( VREG_C_IRQ1, REG_BIT_ACC_DAT_RDY ); 480 480 $DGL 0,29 481 481 00046 301000 movw ax,#010H ; 16 ;[INF] 3, 1 482 482 00049 C1 push ax ;[INF] 1, 1 483 483 0004A A1 incw ax ;[INF] 1, 1 484 484 0004B RFD0000 call !_set_irq ;[INF] 3, 3 485 485 0004E C0 pop ax ;[INF] 1, 1 486 486 ; line 95 : // ゴミデータのカラ読み 487 487 ; line 96 : if( ACC_VALID == 1 ) 488 488 $DGL 0,31 489 489 0004F C7 push hl ;[INF] 1, 1 490 490 00050 361005 movw hl,#0510H ; 1296 ;[INF] 3, 1 491 491 00053 71D4 mov1 CY,[hl].5 ;[INF] 2, 1 492 492 00055 C6 pop hl ;[INF] 1, 1 493 493 00056 DE04 bnc $?L0007 ;[INF] 2, 4 494 494 ; line 97 : { 495 495 00058 ??bb03_tsk_cbk_accero: 496 496 ; line 98 : u8 temp[6]; 497 497 ; line 99 : iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 498 498 ; ), 6, temp ); 499 499 $DGL 0,34 500 500 00058 17 movw ax,hl ;[INF] 1, 1 501 501 00059 RFD0000 call !bs_F0038 ;[INF] 3, 3 502 502 0005C ??eb03_tsk_cbk_accero: 503 503 ; line 100 : } 504 504 0005C ?L0007: 505 505 0005C ??eb02_tsk_cbk_accero: 506 506 ; line 101 : } 507 507 ; line 102 : if(( system_status.pwr_state != OFF ) && 508 508 ; line 103 : ( system_status.pwr_state != BT_CHARGE ) && 509 509 $DGL 0,38 510 510 0005C R40000001 cmp !_system_status,#01H ; 1 ;[INF] 4, 1 511 511 00060 DD11 bz $?L0009 ;[INF] 2, 4 512 512 00062 R40000006 cmp !_system_status,#06H ; 6 ;[INF] 4, 1 513 513 00066 DD0B bz $?L0009 ;[INF] 2, 4 514 514 ; line 104 : ( ( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CO 515 515 ; NF_HOSU ) != 0 ) 516 516 $DGL 0,39 517 517 00068 R8F4000 mov a,!_vreg_ctr+64 ;[INF] 3, 1 518 518 0006B 5C02 and a,#02H ; 2 ;[INF] 2, 1 519 519 0006D D1 cmp0 a ;[INF] 1, 1 520 520 0006E 61E8 skz ;[INF] 2, 1 521 521 ; line 105 : ) 522 522 ; line 106 : { 523 523 00070 ??bb04_tsk_cbk_accero: 524 524 ; line 107 : DBG_LED_WIFI_2_on; 525 525 ; line 108 : pedometer(); // 歩数計 526 526 $DGL 0,43 527 527 00070 RFD0000 call !_pedometer ;[INF] 3, 3 528 528 ; line 109 : DBG_LED_WIFI_2_off; 529 529 00073 ??eb04_tsk_cbk_accero: 530 530 ; line 110 : } 531 531 00073 ?L0009: 532 532 00073 ??eb01_tsk_cbk_accero: 533 533 ; line 111 : } 534 534 ; line 112 : return ( ERR_SUCCESS ); 535 535 $DGL 0,47 536 536 00073 F7 clrw bc ;[INF] 1, 1 537 537 ; line 113 : } 538 538 00074 ?L0002: 539 539 $DGL 0,48 540 540 00074 ??ef_tsk_cbk_accero: 541 541 00074 1006 addw sp,#06H ;[INF] 2, 1 542 542 00076 C6 pop hl ;[INF] 1, 1 543 543 00077 D7 ret ;[INF] 1, 6 544 544 00078 ??ee_tsk_cbk_accero: 545 545 ; line 114 : 546 546 ; line 115 : 547 547 ; line 116 : 548 548 ; line 117 : 549 549 ; line 118 : 550 550 ; line 119 : /*======================================================= 551 551 ; line 120 : 　加速度センサ透過アクセス　リード 552 552 ; line 121 : ========================================================*/ 553 553 ; line 122 : task_status_immed acc_read( ) 554 554 ; line 123 : { 555 555 00078 _acc_read: 556 556 $DGL 1,103 557 557 00078 ??bf_acc_read: 558 558 ; line 124 : vreg_ctr[VREG_C_ACC_W_BUF] = iic_mcu_read_a_byte( IIC_SLA_AC 559 559 ; CEL, vreg_ctr[VREG_C_ACC_R_ADRS] ); 560 560 $DGL 0,2 561 561 00078 RD94100 mov x,!_vreg_ctr+65 ;[INF] 3, 1 562 562 0007B F1 clrb a ;[INF] 1, 1 563 563 0007C C1 push ax ;[INF] 1, 1 564 564 0007D 5030 mov x,#030H ; 48 ;[INF] 2, 1 565 565 0007F RFD0000 call !_iic_mcu_read_a_byte ;[INF] 3, 3 566 566 00082 C0 pop ax ;[INF] 1, 1 567 567 00083 62 mov a,c ;[INF] 1, 1 568 568 00084 R9F4400 mov !_vreg_ctr+68,a ;[INF] 3, 1 569 569 ; line 125 : // vreg_ctr[ VREG_C_ACC_R_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ 570 570 ; ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] ); 571 571 ; line 126 : vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK; 572 572 $DGL 0,4 573 573 00087 R71301100 set1 !_vreg_ctr+17.3 ;[INF] 4, 2 574 574 ; line 127 : if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 ) 575 575 $DGL 0,5 576 576 0008B R8F1900 mov a,!_vreg_ctr+25 ;[INF] 3, 1 577 577 0008E 5C08 and a,#08H ; 8 ;[INF] 2, 1 578 578 00090 D1 cmp0 a ;[INF] 1, 1 579 579 00091 DF06 bnz $?L0013 ;[INF] 2, 4 580 580 ; line 128 : { 581 581 00093 ??bb00_acc_read: 582 582 ; line 129 : IRQ0_ast; 583 583 $DGL 0,7 584 584 00093 ??bb01_acc_read: 585 585 00093 716307 clr1 P7.6 ;[INF] 3, 2 586 586 00096 716B27 clr1 PM7.6 ;[INF] 3, 2 587 587 00099 ??eb01_acc_read: 588 588 00099 ??eb00_acc_read: 589 589 ; line 130 : } 590 590 00099 ?L0013: 591 591 ; line 131 : return ( ERR_SUCCESS ); 592 592 $DGL 0,9 593 593 00099 F7 clrw bc ;[INF] 1, 1 594 594 ; line 132 : } 595 595 $DGL 0,10 596 596 0009A ??ef_acc_read: 597 597 0009A D7 ret ;[INF] 1, 6 598 598 0009B ??ee_acc_read: 599 599 ; line 133 : 600 600 ; line 134 : 601 601 ; line 135 : 602 602 ; line 136 : /*========================================================= 603 603 ; line 137 : 　加速度センサ透過アクセス　ライト 604 604 ; line 138 : ========================================================*/ 605 605 ; line 139 : task_status_immed acc_write( ) 606 606 ; line 140 : { 607 607 0009B _acc_write: 608 608 $DGL 1,117 609 609 0009B ??bf_acc_write: 610 610 ; line 141 : iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_A 611 611 ; DRS], vreg_ctr[VREG_C_ACC_W_BUF] ); 612 612 $DGL 0,2 613 613 0009B RD94400 mov x,!_vreg_ctr+68 ;[INF] 3, 1 614 614 0009E F1 clrb a ;[INF] 1, 1 615 615 0009F C1 push ax ;[INF] 1, 1 616 616 000A0 RD94300 mov x,!_vreg_ctr+67 ;[INF] 3, 1 617 617 000A3 C1 push ax ;[INF] 1, 1 618 618 000A4 5030 mov x,#030H ; 48 ;[INF] 2, 1 619 619 000A6 RFD0000 call !_iic_mcu_write_a_byte ;[INF] 3, 3 620 620 000A9 1004 addw sp,#04H ; 4 ;[INF] 2, 1 621 621 ; line 142 : vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK; 622 622 $DGL 0,3 623 623 000AB R71301100 set1 !_vreg_ctr+17.3 ;[INF] 4, 2 624 624 ; line 143 : if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 ) 625 625 $DGL 0,4 626 626 000AF R8F1900 mov a,!_vreg_ctr+25 ;[INF] 3, 1 627 627 000B2 5C08 and a,#08H ; 8 ;[INF] 2, 1 628 628 000B4 D1 cmp0 a ;[INF] 1, 1 629 629 000B5 DF06 bnz $?L0017 ;[INF] 2, 4 630 630 ; line 144 : { 631 631 000B7 ??bb00_acc_write: 632 632 ; line 145 : IRQ0_ast; 633 633 $DGL 0,6 634 634 000B7 ??bb01_acc_write: 635 635 000B7 716307 clr1 P7.6 ;[INF] 3, 2 636 636 000BA 716B27 clr1 PM7.6 ;[INF] 3, 2 637 637 000BD ??eb01_acc_write: 638 638 000BD ??eb00_acc_write: 639 639 ; line 146 : } 640 640 000BD ?L0017: 641 641 ; line 147 : return ( ERR_SUCCESS ); 642 642 $DGL 0,8 643 643 000BD F7 clrw bc ;[INF] 1, 1 644 644 ; line 148 : } 645 645 $DGL 0,9 646 646 000BE ??ef_acc_write: 647 647 000BE D7 ret ;[INF] 1, 6 648 648 000BF ??ee_acc_write: 649 649 ; line 149 : 650 650 ; line 150 : 651 651 ; line 151 : 652 652 ; line 152 : /*========================================================= 653 653 ; line 153 : 　自動歩数カウントモードにセット 654 654 ; line 154 : todo 他のモードだったら止めたり、復帰させたり 655 655 ; line 155 : 割り込みルーチンなどでカウント判定が必要 656 656 ; line 156 : ========================================================*/ 657 657 ; line 157 : task_status_immed acc_hosu_set( ) 658 658 ; line 158 : { 659 659 000BF _acc_hosu_set: 660 660 $DGL 1,131 661 661 000BF C7 push hl ;[INF] 1, 1 662 662 000C0 200A subw sp,#0AH ;[INF] 2, 1 663 663 000C2 FBF8FF movw hl,sp ;[INF] 3, 1 664 664 000C5 ??bf_acc_hosu_set: 665 665 ; line 159 : u8 str_send_buf[4]; 666 666 ; line 160 : 667 667 ; line 161 : iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI ); 668 668 $DGL 0,4 669 669 000C5 300F00 movw ax,#0FH ; 15 ;[INF] 3, 1 670 670 000C8 C1 push ax ;[INF] 1, 1 671 671 000C9 5030 mov x,#030H ; 48 ;[INF] 2, 1 672 672 000CB RFD0000 call !_iic_mcu_read_a_byte ;[INF] 3, 3 673 673 000CE C0 pop ax ;[INF] 1, 1 674 674 ; line 162 : if( iic_mcu_bus_status == ERR_NOSLAVE ) 675 675 $DGL 0,5 676 676 000CF R40000002 cmp !_iic_mcu_bus_status,#02H ; 2 ;[INF] 4, 1 677 677 000D3 DF07 bnz $?L0021 ;[INF] 2, 4 678 678 ; line 163 : { 679 679 000D5 ??bb00_acc_hosu_set: 680 680 ; line 164 : vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR; 681 681 $DGL 0,7 682 682 000D5 R71100E00 set1 !_vreg_ctr+14.1 ;[INF] 4, 2 683 683 ; line 165 : #ifdef _MCU_BSR_ 684 684 ; line 166 : // PMK23 = 1; 685 685 ; line 167 : #endif 686 686 ; line 168 : return ( ERR_SUCCESS ); // とりあえず、タスクは削除しなく 687 687 ; てはならない 688 688 $DGL 0,11 689 689 000D9 F7 clrw bc ;[INF] 1, 1 690 690 000DA EF4A br $?L0020 ;[INF] 2, 3 691 691 000DC ??eb00_acc_hosu_set: 692 692 ; line 169 : }else{ 693 693 000DC ?L0021: 694 694 000DC ??bb01_acc_hosu_set: 695 695 ; line 170 : vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_ACCERO_ERR; 696 696 $DGL 0,13 697 697 000DC R71180E00 clr1 !_vreg_ctr+14.1 ;[INF] 4, 2 698 698 000E0 ??eb01_acc_hosu_set: 699 699 ; line 171 : } 700 700 ; line 172 : 701 701 ; line 173 : 702 702 ; line 174 : str_send_buf[1] = 0x00; // ctrl2 HPF:normal, filterd, H 703 703 ; PF for IRQ : dis/dis, HPF coeff:norm 704 704 $DGL 0,17 705 705 000E0 CC0700 mov [hl+7],#00H ; str_send_buf,0 ;[INF] 3, 1 706 706 ; line 175 : #ifdef _MODEL_WM0_ 707 707 ; line 176 : # ifdef _MODEL_WM0_TEG2_CTRC_ 708 708 ; line 177 : str_send_buf[2] = 0x02; // 回路が一部違う 709 709 ; line 178 : # else 710 710 ; line 179 : 711 711 ; line 180 : str_send_buf[2] = 0x10; // 3 IRQ pol :Active HI, Dr 712 712 ; ive:Pushpull, 713 713 ; line 181 : /// IRQ2flg latch: auto cl 714 714 ; ear after read, IRQ2 conf: IRQ( fall,shock,...) 715 715 ; line 182 : /// 1 : auto cl 716 716 ; ear after read, conf: data ready 717 717 ; line 183 : # endif 718 718 ; line 184 : #else 719 719 ; line 185 : # ifdef _MODEL_CTR_JIKKI_ 720 720 ; line 186 : str_send_buf[2] = 0x10; 721 721 ; line 187 : # else 722 722 ; line 188 : str_send_buf[2] = 0x02; // 3 IRQ pol :Active HI, Dr 723 723 ; ive:Pushpull, 724 724 $DGL 0,31 725 725 000E3 CC0802 mov [hl+8],#02H ; str_send_buf,2 ;[INF] 3, 1 726 726 ; line 189 : /// IRQ2flg latch: auto cl 727 727 ; ear after read, IRQ2 conf: IRQ( fall,shock,...) 728 728 ; line 190 : /// 1 : auto cl 729 729 ; ear after read, conf: data ready 730 730 ; line 191 : # endif 731 731 ; line 192 : #endif 732 732 ; line 193 : str_send_buf[3] = 0x80; // ctrl3 block update:enable, M 733 733 ; SB first, scale: +-2G(default), selftest: dis 734 734 $DGL 0,36 735 735 000E6 CC0980 mov [hl+9],#080H ; str_send_buf,128 ;[INF] 3, 1 736 736 ; line 194 : 737 737 ; line 195 : if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 738 738 ; line 196 : ( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_A 739 739 ; CQ ) ) == 0 ) 740 740 $DGL 0,39 741 741 000E9 R8F4000 mov a,!_vreg_ctr+64 ;[INF] 3, 1 742 742 000EC 5C03 and a,#03H ; 3 ;[INF] 2, 1 743 743 000EE D1 cmp0 a ;[INF] 1, 1 744 744 000EF DF08 bnz $?L0023 ;[INF] 2, 4 745 745 ; line 197 : { 746 746 000F1 ??bb02_acc_hosu_set: 747 747 ; line 198 : #ifdef _MCU_BSR_ 748 748 ; line 199 : PMK23 = 1; 749 749 $DGL 0,42 750 750 000F1 717AD5 set1 MK2H.7 ;[INF] 3, 2 751 751 ; line 200 : #endif 752 752 ; line 201 : // 完全停止 753 753 ; line 202 : str_send_buf[0] = 754 754 ; line 203 : ( ACC_BITS_PM_PDN << ACC_bP_PM0 | 0 << ACC_bP_DR0 | 755 755 ; ACC_BITS_ALL_AXIS_ON ); 756 756 $DGL 0,46 757 757 000F4 CC0607 mov [hl+6],#07H ; str_send_buf,7 ;[INF] 3, 1 758 758 000F7 ??eb02_acc_hosu_set: 759 759 ; line 204 : } 760 760 $DGL 0,47 761 761 000F7 EF06 br $?L0024 ;[INF] 2, 3 762 762 000F9 ?L0023: 763 763 ; line 205 : else 764 764 ; line 206 : { 765 765 000F9 ??bb03_acc_hosu_set: 766 766 ; line 207 : #ifdef _MCU_BSR_ 767 767 ; line 208 : PMK23 = 0; 768 768 $DGL 0,51 769 769 000F9 717BD5 clr1 MK2H.7 ;[INF] 3, 2 770 770 ; line 209 : #endif 771 771 ; line 210 : // 100Hz 自動取り込み 772 772 ; line 211 : str_send_buf[0] = 773 773 ; line 212 : ( ACC_BITS_PM_NORM << ACC_bP_PM0 774 774 ; line 213 : | ACC_BITS_DR_100Hz << ACC_bP_DR0 775 775 ; line 214 : | ACC_BITS_ALL_AXIS_ON ); 776 776 $DGL 0,57 777 777 000FC CC062F mov [hl+6],#02FH ; str_send_buf,47 ;[INF] 3, 1 778 778 000FF ??eb03_acc_hosu_set: 779 779 ; line 215 : } 780 780 000FF ?L0024: 781 781 ; line 216 : iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | 0x80 ), 4, s 782 782 ; tr_send_buf ); 783 783 $DGL 0,59 784 784 000FF 17 movw ax,hl ;[INF] 1, 1 785 785 00100 040600 addw ax,#06H ;[INF] 3, 1 786 786 00103 C1 push ax ;[INF] 1, 1 787 787 00104 300400 movw ax,#04H ; 4 ;[INF] 3, 1 788 788 00107 C1 push ax ;[INF] 1, 1 789 789 00108 50A0 mov x,#0A0H ; 160 ;[INF] 2, 1 790 790 0010A C1 push ax ;[INF] 1, 1 791 791 0010B 5030 mov x,#030H ; 48 ;[INF] 2, 1 792 792 0010D RFD0000 call !_iic_mcu_write ;[INF] 3, 3 793 793 00110 1006 addw sp,#06H ; 6 ;[INF] 2, 1 794 794 ; line 217 : 795 795 ; line 218 : // カラ読み 796 796 ; line 219 : if( ACC_VALID == 1 ) 797 797 $DGL 0,62 798 798 00112 C7 push hl ;[INF] 1, 1 799 799 00113 361005 movw hl,#0510H ; 1296 ;[INF] 3, 1 800 800 00116 71D4 mov1 CY,[hl].5 ;[INF] 2, 1 801 801 00118 C6 pop hl ;[INF] 1, 1 802 802 00119 DE0A bnc $?L0027 ;[INF] 2, 4 803 803 ; line 220 : { 804 804 0011B ??bb04_acc_hosu_set: 805 805 ; line 221 : if( system_status.pwr_state == ON ) 806 806 $DGL 0,64 807 807 0011B R40000003 cmp !_system_status,#03H ; 3 ;[INF] 4, 1 808 808 0011F DF04 bnz $?L0027 ;[INF] 2, 4 809 809 ; line 222 : { 810 810 00121 ??bb05_acc_hosu_set: 811 811 ; line 223 : u8 temp[6]; 812 812 ; line 224 : iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6 813 813 ; , temp ); 814 814 $DGL 0,67 815 815 00121 17 movw ax,hl ;[INF] 1, 1 816 816 00122 RFD0000 call !bs_F0038 ;[INF] 3, 3 817 817 00125 ??eb05_acc_hosu_set: 818 818 ; line 225 : } 819 819 00125 ?L0027: 820 820 00125 ??eb04_acc_hosu_set: 821 821 ; line 226 : } 822 822 ; line 227 : return ( ERR_SUCCESS ); 823 823 $DGL 0,70 824 824 00125 F7 clrw bc ;[INF] 1, 1 825 825 ; line 228 : } 826 826 00126 ?L0020: 827 827 $DGL 0,71 828 828 00126 ??ef_acc_hosu_set: 829 829 00126 100A addw sp,#0AH ;[INF] 2, 1 830 830 00128 C6 pop hl ;[INF] 1, 1 831 831 00129 D7 ret ;[INF] 1, 6 832 832 0012A ??ee_acc_hosu_set: 833 833 ; line 229 : 834 834 ; line 230 : 835 835 ; line 231 : 836 836 ; line 232 : /* ======================================================== 837 837 ; line 233 : 加速度センサ割り込み 838 838 ; line 234 : I2Cが使用中かもしれないので、読み出しタスクの登録を行うのみ 839 839 ; line 235 : ======================================================== */ 840 840 ; line 236 : __interrupt void intp23_ACC_ready( ) 841 841 ; line 237 : { 842 842 843 843 ----- @@BASE CSEG BASE 844 844 00000 _intp23_ACC_ready: 845 845 $DGL 1,165 846 846 00000 C1 push ax ;[INF] 1, 1 847 847 00001 C3 push bc ;[INF] 1, 1 848 848 00002 C5 push de ;[INF] 1, 1 849 849 00003 C7 push hl ;[INF] 1, 1 850 850 00004 520C mov c,#0CH ;[INF] 2, 1 851 851 00006 92 dec c ;[INF] 1, 1 852 852 00007 92 dec c ;[INF] 1, 1 853 853 00008 R690000 movw ax,_@SEGAX[c] ;[INF] 3, 1 854 854 0000B C1 push ax ;[INF] 1, 1 855 855 0000C DFF8 bnz $$-6 ;[INF] 2, 4 856 856 0000E 8EFD mov a,ES ;[INF] 2, 1 857 857 00010 70 mov x,a ;[INF] 1, 1 858 858 00011 8EFC mov a,CS ;[INF] 2, 1 859 859 00013 C1 push ax ;[INF] 1, 1 860 860 00014 ??bf_intp23_ACC_ready: 861 861 ; line 238 : EI(); 862 862 $DGL 0,2 863 863 00014 717AFA ei ;[INF] 3, 4 864 864 ; line 239 : if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 0x03 ) != 0x00 ) 865 865 $DGL 0,3 866 866 00017 R8F4000 mov a,!_vreg_ctr+64 ;[INF] 3, 1 867 867 0001A 5C03 and a,#03H ; 3 ;[INF] 2, 1 868 868 0001C D1 cmp0 a ;[INF] 1, 1 869 869 0001D DD19 bz $?L0036 ;[INF] 2, 4 870 870 ; line 240 : { 871 871 0001F ??bb00_intp23_ACC_ready: 872 872 ; line 241 : if( ( system_status.pwr_state == ON ) || ( system_status 873 873 ; .pwr_state == SLEEP ) ) 874 874 $DGL 0,5 875 875 0001F R40000003 cmp !_system_status,#03H ; 3 ;[INF] 4, 1 876 876 00023 DD06 bz $?L0035 ;[INF] 2, 4 877 877 00025 R40000005 cmp !_system_status,#05H ; 5 ;[INF] 4, 1 878 878 00029 DF0D bnz $?L0036 ;[INF] 2, 4 879 879 0002B ?L0035: 880 880 ; line 242 : { 881 881 0002B ??bb01_intp23_ACC_ready: 882 882 ; line 243 : if( ACC_VALID ) 883 883 $DGL 0,7 884 884 0002B 361005 movw hl,#0510H ; 1296 ;[INF] 3, 1 885 885 0002E 71D4 mov1 CY,[hl].5 ;[INF] 2, 1 886 886 00030 DE06 bnc $?L0036 ;[INF] 2, 4 887 887 ; line 244 : { 888 888 00032 ??bb02_intp23_ACC_ready: 889 889 ; line 245 : renge_task_immed_add( tsk_cbk_accero ); 890 890 $DGL 0,9 891 891 00032 R301000 movw ax,#loww (_tsk_cbk_accero) ;[INF] 3, 1 892 892 00035 RFD0000 call !_renge_task_immed_add ;[INF] 3, 3 893 893 00038 ??eb02_intp23_ACC_ready: 894 894 ; line 246 : } 895 895 00038 ?L0036: 896 896 00038 ??eb01_intp23_ACC_ready: 897 897 ; line 247 : } 898 898 00038 ??eb00_intp23_ACC_ready: 899 899 ; line 248 : } 900 900 ; line 249 : } 901 901 $DGL 0,13 902 902 00038 ??ef_intp23_ACC_ready: 903 903 00038 C0 pop ax ;[INF] 1, 1 904 904 00039 9EFC mov CS,a ;[INF] 2, 1 905 905 0003B 60 mov a,x ;[INF] 1, 1 906 906 0003C 9EFD mov ES,a ;[INF] 2, 1 907 907 0003E R340000 movw de,#_@SEGAX ;[INF] 3, 1 908 908 00041 5206 mov c,#06H ;[INF] 2, 1 909 909 00043 C0 pop ax ;[INF] 1, 1 910 910 00044 B9 movw [de],ax ;[INF] 1, 1 911 911 00045 A5 incw de ;[INF] 1, 1 912 912 00046 A5 incw de ;[INF] 1, 1 913 913 00047 92 dec c ;[INF] 1, 1 914 914 00048 DFF9 bnz $$-5 ;[INF] 2, 4 915 915 0004A C6 pop hl ;[INF] 1, 1 916 916 0004B C4 pop de ;[INF] 1, 1 917 917 0004C C2 pop bc ;[INF] 1, 1 918 918 0004D C0 pop ax ;[INF] 1, 1 919 919 0004E 61FC reti ;[INF] 2, 6 920 920 00050 ??ee_intp23_ACC_ready: 921 921 922 922 ----- @@CODEL CSEG 923 923 END 924 924 925 925 926 926 ; *** Code Information *** 927 927 ; 928 928 ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\accero.c 929 929 ; 930 930 ; $FUNC tsk_cbk_accero(66) 931 931 ; bc=(void) 932 932 ; CODE SIZE= 104 bytes, CLOCK_SIZE= 103 clocks, STACK_SIZE= 22 bytes 933 933 ; 934 934 ; $CALL iic_mcu_read(78) 935 935 ; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8]) 936 936 ; 937 937 ; $CALL acc_hosu_set(83) 938 938 ; bc=(void) 939 939 ; 940 940 ; $CALL set_irq(94) 941 941 ; void=(int:ax, int:[sp+4]) 942 942 ; 943 943 ; $CALL iic_mcu_read(99) 944 944 ; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8]) 945 945 ; 946 946 ; $CALL pedometer(108) 947 947 ; void=(void) 948 948 ; 949 949 ; $FUNC acc_read(123) 950 950 ; bc=(void) 951 951 ; CODE SIZE= 35 bytes, CLOCK_SIZE= 30 clocks, STACK_SIZE= 6 bytes 952 952 ; 953 953 ; $CALL iic_mcu_read_a_byte(124) 954 954 ; bc=(int:ax, int:[sp+4]) 955 955 ; 956 956 ; $FUNC acc_write(140) 957 957 ; bc=(void) 958 958 ; CODE SIZE= 36 bytes, CLOCK_SIZE= 30 clocks, STACK_SIZE= 8 bytes 959 959 ; 960 960 ; $CALL iic_mcu_write_a_byte(141) 961 961 ; bc=(int:ax, int:[sp+4], int:[sp+6]) 962 962 ; 963 963 ; $FUNC acc_hosu_set(158) 964 964 ; bc=(void) 965 965 ; CODE SIZE= 107 bytes, CLOCK_SIZE= 96 clocks, STACK_SIZE= 26 bytes 966 966 ; 967 967 ; $CALL iic_mcu_read_a_byte(161) 968 968 ; bc=(int:ax, int:[sp+4]) 969 969 ; 970 970 ; $CALL iic_mcu_write(216) 971 971 ; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8]) 972 972 ; 973 973 ; $CALL iic_mcu_read(224) 974 974 ; bc=(int:ax, int:[sp+4], int:[sp+6], pointer:[sp+8]) 975 975 ; 976 976 ; $FUNC intp23_ACC_ready(237) 977 977 ; void=(void) 978 978 ; CODE SIZE= 80 bytes, CLOCK_SIZE= 73 clocks, STACK_SIZE= 26 bytes 979 979 ; 980 980 ; $CALL renge_task_immed_add(245) 981 981 ; bc=(pointer:ax) 982 982 983 983 ; Target chip : uPD79F0104 984 984 ; Device file : E1.00b Segment informations: ADRS LEN NAME 00000 00000H.0 @@BITS 00000 00030H @@CNST 00000 00000H @@R_INIT 00000 00000H @@INIT 00000 00000H @@DATA 00000 00000H @@R_INIS 00000 00000H @@INIS 00000 00000H @@DATS 00000 00000H @@CNSTL 00000 00000H @@RLINIT 00000 00000H @@INITL 00000 00000H @@DATAL 00000 00000H @@CALT 00000 0012AH ROM_CODE 00000 00050H @@BASE 00000 00000H @@CODEL Target chip : uPD79F0104 Device file : E1.00b Assembly complete, 0 error(s) and 0 warning(s) found. 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