78K0R Assembler W1.31 Date:13 Jun 2010 Page: 1 Command: -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff inter_asm\WDT.asm Para-file: In-file: inter_asm\WDT.asm Obj-file: WDT.rel Prn-file: WDT.prn Assemble list ALNO STNO ADRS OBJECT M I SOURCE STATEMENT 1 1 ; 78K0R C Compiler V2.10 Assembler Source Date:13 Jun 2010 Time:19:31:23 2 2 3 3 ; Command : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i 4 4 ; renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\ 5 5 ; V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no WDT.c 6 6 ; In-file : WDT.c 7 7 ; Asm-file : inter_asm\WDT.asm 8 8 ; Para-file : 9 9 10 10 $PROCESSOR(9F0104) 11 11 $DEBUG 12 12 $NODEBUGA 13 13 $KANJICODE SJIS 14 14 $TOL_INF 03FH, 0210H, 00H, 00H, 00H, 00H, 00H 15 15 16 16 $DGS FIL_NAM, .file, 019H, 0FFFEH, 03FH, 067H, 01H, 00H 17 17 $DGS AUX_FIL, WDT.c 18 18 $DGS MOD_NAM, WDT, 00H, 0FFFEH, 00H, 077H, 00H, 00H 19 19 $DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H 20 20 $DGS SEC_NAM, @@CNST, U, U, 00H, 078H, 00H, 00H 21 21 $DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H 22 22 $DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H 23 23 $DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H 24 24 $DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H 25 25 $DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H 26 26 $DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H 27 27 $DGS SEC_NAM, LDR_CNSL, U, U, 00H, 078H, 00H, 00H 28 28 $DGS SEC_NAM, @@RLINIT, U, U, 00H, 078H, 00H, 00H 29 29 $DGS SEC_NAM, @@INITL, U, U, 00H, 078H, 00H, 00H 30 30 $DGS SEC_NAM, @@DATAL, U, U, 00H, 078H, 00H, 00H 31 31 $DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H 32 32 $DGS SEC_NAM, LDR_CODE, U, U, 00H, 078H, 00H, 00H 33 33 $DGS SEC_NAM, LDR_CODL, U, U, 00H, 078H, 00H, 00H 34 34 $DGS SEC_NAM, @@BASE, U, U, 00H, 078H, 00H, 00H 35 35 $DGS GLV_SYM, _WDT_Restart, U, U, 01H, 026H, 01H, 02H 36 36 $DGS AUX_FUN, 00H, U, U, 019H, 00H, 00H 37 37 $DGS BEG_FUN, ??bf_WDT_Restart, U, U, 00H, 065H, 01H, 00H 38 38 $DGS AUX_BEG, 0CH, 00H, 019H 39 39 $DGS END_FUN, ??ef_WDT_Restart, U, U, 00H, 065H, 01H, 00H 40 40 $DGS AUX_END, 03H 41 41 42 42 PUBLIC _WDT_Restart 43 43 44 44 ----- @@BITS BSEG 45 45 46 46 ----- @@CNST CSEG MIRRORP 47 47 48 48 ----- @@R_INIT CSEG UNIT64KP 49 49 50 50 ----- @@INIT DSEG BASEP 51 51 52 52 ----- @@DATA DSEG BASEP 53 53 54 54 ----- @@R_INIS CSEG UNIT64KP 55 55 56 56 ----- @@INIS DSEG SADDRP 57 57 58 58 ----- @@DATS DSEG SADDRP 59 59 60 60 ----- LDR_CNSL CSEG PAGE64KP 61 61 62 62 ----- @@RLINIT CSEG UNIT64KP 63 63 64 64 ----- @@INITL DSEG UNIT64KP 65 65 66 66 ----- @@DATAL DSEG UNIT64KP 67 67 68 68 ----- @@CALT CSEG CALLT0 69 69 70 70 ; line 1 : #pragma sfr 71 71 ; line 2 : 72 72 ; line 3 : 73 73 ; line 4 : #include "incs_loader.h" 74 74 ; line 5 : 75 75 ; line 6 : 76 76 ; line 7 : 77 77 ; line 8 : //========================================================= 78 78 ; line 9 : // ウォッチドッグタイマのリスタート 79 79 ; line 10 : // 0xACはマジック 80 80 ; line 11 : void WDT_Restart( void ) 81 81 ; line 12 : { 82 82 83 83 ----- LDR_CODE CSEG BASE 84 84 00000 _WDT_Restart: 85 85 $DGL 1,19 86 86 00000 ??bf_WDT_Restart: 87 87 ; line 13 : WDTE = WDT_RESTART_MAGIC; 88 88 $DGL 0,2 89 89 00000 CEABAC mov WDTE,#0ACH ; 172 ;[INF] 3, 1 90 90 ; line 14 : } 91 91 $DGL 0,3 92 92 00003 ??ef_WDT_Restart: 93 93 00003 D7 ret ;[INF] 1, 6 94 94 00004 ??ee_WDT_Restart: 95 95 96 96 ----- LDR_CODL CSEG 97 97 98 98 ----- @@BASE CSEG BASE 99 99 END 100 100 101 101 102 102 ; *** Code Information *** 103 103 ; 104 104 ; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\WDT.c 105 105 ; 106 106 ; $FUNC WDT_Restart(12) 107 107 ; void=(void) 108 108 ; CODE SIZE= 4 bytes, CLOCK_SIZE= 7 clocks, STACK_SIZE= 0 bytes 109 109 110 110 ; Target chip : uPD79F0104 111 111 ; Device file : E1.00b Segment informations: ADRS LEN NAME 00000 00000H.0 @@BITS 00000 00000H @@CNST 00000 00000H @@R_INIT 00000 00000H @@INIT 00000 00000H @@DATA 00000 00000H @@R_INIS 00000 00000H @@INIS 00000 00000H @@DATS 00000 00000H LDR_CNSL 00000 00000H @@RLINIT 00000 00000H @@INITL 00000 00000H @@DATAL 00000 00000H @@CALT 00000 00004H LDR_CODE 00000 00000H LDR_CODL 00000 00000H @@BASE Target chip : uPD79F0104 Device file : E1.00b Assembly complete, 0 error(s) and 0 warning(s) found. ( 0)