; 78K0R C Compiler V2.10 Assembler Source        Date:13 Jun 2010 Time:19:31:24

; Command   : -c9F0104 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -i
;             renge -iC:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\
;             V1.20\inc78k0r -ms -qvjl3wt -sainter_asm -zp -no adc.c
; In-file   : adc.c
; Asm-file  : inter_asm\adc.asm
; Para-file : 

$PROCESSOR(9F0104)
$DEBUG
$NODEBUGA
$KANJICODE SJIS
$TOL_INF	03FH, 0210H, 02H, 00H, 00H, 00H, 00H

$DGS	FIL_NAM, .file,		0FAH,	0FFFEH,	03FH,	067H,	01H,	00H
$DGS	AUX_FIL, adc.c
$DGS	MOD_NAM, adc,		00H,	0FFFEH,	00H,	077H,	00H,	00H
$DGS	SEC_NAM, @@BITS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNST,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATA,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNSTL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@RLINIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INITL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATAL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CALT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, ROM_CODE,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CODEL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@BASE,	U,	U,	00H,	078H,	00H,	00H
$DGS	ENM_TAG, _pwr_state_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		01EH
$DGS	MEB_ENM, _OFF_TRIG,	00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _OFF,		01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _ON_TRIG,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _ON,		03H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _SLEEP_TRIG,	04H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _SLEEP,	05H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _BT_CHARGE,	06H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 013H,		01H
$DGS	ENM_TAG, _poweron_reason_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		025H
$DGS	MEB_ENM, _NONE,		00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _PWSW,		01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _RTC_ALARM,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 01EH,		01H
$DGS	ENM_TAG, _model_,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		02FH
$DGS	MEB_ENM, _MODEL_JIKKI,	00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_TS_BOARD,	01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_SHIROBAKO,	02H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED1,	03H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED2,	04H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _MODEL_RESERVED3,	05H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 025H,		01H
$DGS	STR_STR, .0fake,	00H,	0FFFEH,	08H,	0AH,	01H,	00H
$DGS	AUX_TAG, 04H,		041H
$DGS	MEB_STR, _pwr_state,	00H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 013H,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	MEB_STR, _poweron_reason,	01H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 01EH,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	BIT_FLD, _dipsw0,	010H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _dipsw1,	011H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _dipsw2,	012H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	BIT_FLD, _reboot,	013H,	0FFFFH,	0CH,	012H,	01H,	00H
$DGS	AUX_BIT, 00H,		01H
$DGS	MEB_STR, _model,	03H,	0FFFFH,	0AH,	08H,	01H,	00H
$DGS	AUX_STR, 025H,		00H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	END_STR, .eos,		04H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 02FH,		04H
$DGS	ENM_TAG, .2fake,	00H,	0FFFEH,	0AH,	0FH,	01H,	00H
$DGS	AUX_TAG, 01H,		047H
$DGS	MEB_ENM, _ERR_FINISED,	00H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	MEB_ENM, _ERR_CONTINUE,	01H,	0FFFFH,	04H,	010H,	00H,	00H
$DGS	END_STR, .eos,		01H,	0FFFFH,	00H,	066H,	01H,	00H
$DGS	AUX_EOS, 041H,		01H
$DGS	LAB_SYM, bs_S0076,	U,	U,	00H,	06H,	00H,	00H
$DGS	LAB_SYM, es_S0076,	U,	U,	00H,	06H,	00H,	00H
$DGS	LAB_SYM, bs_F0075,	U,	U,	00H,	06H,	00H,	00H
$DGS	LAB_SYM, es_F0075,	U,	U,	00H,	06H,	00H,	00H
$DGS	LAB_SYM, bs_F0074,	U,	U,	00H,	06H,	00H,	00H
$DGS	LAB_SYM, es_F0074,	U,	U,	00H,	06H,	00H,	00H
$DGS	STA_SYM, _lpf_coeff,	U,	U,	05002H,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	02FH,	02FH,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _slider_to_codec,	U,	U,	0500CH,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	040H,	040H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _tsk_adc,	U,	U,	01H,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	0B5H,	00H,	00H
$DGS	BEG_FUN, ??bf_tsk_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 03DH,		02H,	059H
$DGS	STA_SYM, _task_interval,	?L0003,	U,	0CH,	03H,	00H,	00H
$DGS	STA_SYM, _old_tune,	?L0004,	U,	0CH,	03H,	00H,	00H
$DGS	STA_SYM, _sndvol_codec,	?L0005,	U,	0CH,	03H,	00H,	00H
$DGS	STA_SYM, _bt_temp_old,	?L0006,	U,	0CH,	03H,	00H,	00H
$DGS	BEG_BLK, ??bb00_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 08H,		00H,	05DH
$DGS	END_BLK, ??eb00_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0AH
$DGS	BEG_BLK, ??bb01_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 0CH,		00H,	061H
$DGS	END_BLK, ??eb01_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0EH
$DGS	BEG_BLK, ??bb02_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 012H,		00H,	063H
$DGS	BEG_BLK, ??bb03_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 014H,		00H,	065H
$DGS	BEG_BLK, ??bb04_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 016H,		00H,	06DH
$DGS	STA_SYM, _old_value,	?L0007,	U,	0CH,	03H,	01H,	00H
$DGS	AUX_STR, 00H,		01AH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _diffs,	?L0008,	U,	02H,	03H,	01H,	00H
$DGS	AUX_STR, 00H,		01BH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	REG_VAR, _temp,		06H,	0FFFFH,	010CH,	04H,	01H,	00H
$DGS	AUX_STR, 00H,		01CH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	BEG_BLK, ??bb05_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 01FH,		00H,	071H
$DGS	END_BLK, ??eb05_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 02AH
$DGS	BEG_BLK, ??bb06_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 02CH,		00H,	075H
$DGS	STA_SYM, _kikan_count,	?L0009,	U,	0CH,	03H,	01H,	00H
$DGS	AUX_STR, 00H,		02EH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	BEG_BLK, ??bb07_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 030H,		00H,	079H
$DGS	END_BLK, ??eb07_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 032H
$DGS	BEG_BLK, ??bb08_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 034H,		00H,	07DH
$DGS	END_BLK, ??eb08_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 036H
$DGS	BEG_BLK, ??bb09_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 039H,		00H,	07FH
$DGS	BEG_BLK, ??bb0A_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 03BH,		00H,	083H
$DGS	END_BLK, ??eb0A_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 03DH
$DGS	BEG_BLK, ??bb0B_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 03FH,		00H,	08DH
$DGS	END_BLK, ??eb0B_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 041H
$DGS	END_BLK, ??eb09_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 045H
$DGS	END_BLK, ??eb06_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 046H
$DGS	END_BLK, ??eb04_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 047H
$DGS	BEG_BLK, ??bb0C_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 04CH,		00H,	095H
$DGS	REG_VAR, _temp,		06H,	0FFFFH,	010CH,	04H,	01H,	00H
$DGS	AUX_STR, 00H,		04EH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _vol_old,	?L0010,	U,	0CH,	03H,	01H,	00H
$DGS	AUX_STR, 00H,		04FH,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _force_update_vol,	?L0011,	U,	0CH,	03H,	01H,	00H
$DGS	AUX_STR, 00H,		050H,	01H,	00H,	00H,	00H,	00H,	00H
$DGS	BEG_BLK, ??bb0D_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 053H,		00H,	097H
$DGS	BEG_BLK, ??bb0E_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 055H,		00H,	09DH
$DGS	END_BLK, ??eb0E_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 062H
$DGS	END_BLK, ??eb0D_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 063H
$DGS	BEG_BLK, ??bb0F_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 065H,		00H,	09FH
$DGS	BEG_BLK, ??bb10_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 068H,		00H,	0A7H
$DGS	END_BLK, ??eb10_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 070H
$DGS	END_BLK, ??eb0F_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 071H
$DGS	END_BLK, ??eb0C_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 072H
$DGS	BEG_BLK, ??bb11_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 077H,		00H,	0A9H
$DGS	BEG_BLK, ??bb12_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 079H,		00H,	00H
$DGS	END_BLK, ??eb12_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 086H
$DGS	END_BLK, ??eb11_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 087H
$DGS	END_BLK, ??eb03_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 089H
$DGS	END_BLK, ??eb02_tsk_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 08AH
$DGS	END_FUN, ??ef_tsk_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 09FH
$DGS	STA_SYM, _getmean3,	U,	U,	0CH,	03H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	0D5H,	00H,	00H
$DGS	BEG_FUN, ??bf_getmean3,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 0E4H,		02H,	0BBH
$DGS	REG_PAR, _hist,		0103H,	0FFFFH,	010CH,	011H,	01H,	01H
$DGS	AUX_STR, 00H,		00H,	02H,	00H,	00H,	00H,	00H,	01H
$DGS	BEG_BLK, ??bb00_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 03H,		00H,	0BDH
$DGS	BEG_BLK, ??bb01_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 05H,		00H,	0C1H
$DGS	END_BLK, ??eb01_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 07H
$DGS	BEG_BLK, ??bb02_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 09H,		00H,	0C7H
$DGS	END_BLK, ??eb02_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0BH
$DGS	END_BLK, ??eb00_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0CH
$DGS	BEG_BLK, ??bb03_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 0CH,		00H,	0C9H
$DGS	BEG_BLK, ??bb04_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 0EH,		00H,	0CDH
$DGS	END_BLK, ??eb04_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 010H
$DGS	BEG_BLK, ??bb05_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 012H,		00H,	00H
$DGS	END_BLK, ??eb05_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 014H
$DGS	END_BLK, ??eb03_getmean3,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 015H
$DGS	END_FUN, ??ef_getmean3,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 016H
$DGS	GLV_SYM, _int_adc,	U,	U,	0E001H,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	0EEH,	00H,	00H
$DGS	BEG_FUN, ??bf_int_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 0102H,		016H,	0E0H
$DGS	STA_SYM, _hist_tune,	?L0055,	U,	0CH,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	03H,	03H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _hist_snd_vol,	?L0056,	U,	0CH,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	03H,	03H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _hist_bt_temp,	?L0057,	U,	0CH,	03H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	03H,	03H,	00H,	00H,	00H,	00H
$DGS	STA_SYM, _index,	?L0058,	U,	0CH,	03H,	00H,	00H
$DGS	BEG_BLK, ??bb00_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 09H,		00H,	0E4H
$DGS	END_BLK, ??eb00_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 02EH
$DGS	BEG_BLK, ??bb01_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 034H,		00H,	0E8H
$DGS	END_BLK, ??eb01_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 037H
$DGS	BEG_BLK, ??bb02_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 039H,		00H,	00H
$DGS	END_BLK, ??eb02_int_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 03EH
$DGS	END_FUN, ??ef_int_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 03FH
$DGS	GLV_SYM, _get_adc,	U,	U,	0CH,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	0FAH,	00H,	00H
$DGS	BEG_FUN, ??bf_get_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 0148H,		02H,	0F4H
$DGS	REG_PAR, _ch,		06H,	0FFFFH,	010CH,	011H,	00H,	00H
$DGS	REG_VAR, _temp,		07H,	0FFFFH,	010CH,	04H,	00H,	00H
$DGS	BEG_BLK, ??bb00_get_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 018H,		00H,	00H
$DGS	END_BLK, ??eb00_get_adc,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 018H
$DGS	END_FUN, ??ef_get_adc,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 01DH
$DGS	GLV_SYM, _adc_updated,	U,	U,	034CH,	027H,	00H,	00H
$DGS	GLV_SYM, _adc_raw_vol,	U,	U,	0CH,	026H,	00H,	00H
$DGS	GLV_SYM, _adc_raw_dep,	U,	U,	0CH,	026H,	00H,	00H
$DGS	GLV_SYM, _abs,		U,	U,	04H,	02H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	00H,	00H,	00H
$DGS	GLV_SYM, _iic_mcu_write_a_byte,	U,	U,	0CH,	02H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	00H,	00H,	00H
$DGS	GLV_SYM, _system_status,	U,	U,	08H,	02H,	01H,	00H
$DGS	AUX_STR, 02FH,		00H,	04H,	00H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _vreg_ctr,	U,	U,	0CH,	02H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	01H,	01H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _vreg_twl,	U,	U,	0CH,	02H,	01H,	03H
$DGS	AUX_STR, 00H,		00H,	01H,	01H,	00H,	00H,	00H,	00H
$DGS	GLV_SYM, _@SEGAX,	U,	U,	00H,	02H,	00H,	00H
$DGS	GLV_SYM, _raw_adc_temperature,	U,	U,	0CH,	02H,	00H,	00H
$DGS	GLV_SYM, _PM_bt_temp_update,	U,	U,	0AH,	02H,	01H,	02H
$DGS	AUX_FUN, 041H,		U,	U,	00H,	00H,	00H
$DGS	GLV_SYM, _renge_task_immed_add,	U,	U,	0CH,	02H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	00H,	00H,	00H
$DGS	GLV_SYM, _@SEGDE,	U,	U,	00H,	02H,	00H,	00H
$DGS	GLV_SYM, _@RTARG0,	U,	U,	00H,	02H,	00H,	00H

	EXTRN	_abs
	EXTRN	_iic_mcu_write_a_byte
	EXTRN	_system_status
	EXTRN	_vreg_ctr
	EXTRN	_vreg_twl
	EXTRN	_@SEGAX
	EXTRN	_@SEGDE
	EXTRN	_@RTARG0
	EXTRN	_raw_adc_temperature
	EXTRN	_PM_bt_temp_update
	EXTRN	_renge_task_immed_add
	PUBLIC	_adc_updated
	PUBLIC	_adc_raw_vol
	PUBLIC	_adc_raw_dep
	PUBLIC	_tsk_adc
	PUBLIC	_int_adc
	PUBLIC	_get_adc

@@BITS	BSEG
_adc_updated	DBIT

@@CNST	CSEG	MIRRORP
_lpf_coeff:	DB	01H	; 1
	DB	02H	; 2
	DB	02H	; 2
	DB	03H	; 3
	DB	03H	; 3
	DB	02H	; 2
	DB	00H	; 0
	DB	0FEH	; 254
	DB	0FBH	; 251
	DB	0F7H	; 247
	DB	0F3H	; 243
	DB	0F0H	; 240
	DB	0F0H	; 240
	DB	0F3H	; 243
	DB	0FAH	; 250
	DB	04H	; 4
	DB	012H	; 18
	DB	025H	; 37
	DB	038H	; 56
	DB	04DH	; 77
	DB	05FH	; 95
	DB	06EH	; 110
	DB	077H	; 119
	DB	07AH	; 122
	DB	077H	; 119
	DB	06EH	; 110
	DB	05FH	; 95
	DB	04DH	; 77
	DB	038H	; 56
	DB	025H	; 37
	DB	012H	; 18
	DB	04H	; 4
	DB	0FAH	; 250
	DB	0F3H	; 243
	DB	0F0H	; 240
	DB	0F0H	; 240
	DB	0F3H	; 243
	DB	0F7H	; 247
	DB	0FBH	; 251
	DB	0FEH	; 254
	DB	00H	; 0
	DB	02H	; 2
	DB	03H	; 3
	DB	03H	; 3
	DB	02H	; 2
	DB	02H	; 2
	DB	01H	; 1
_slider_to_codec:	DB	07FH	; 127
	DB	07EH	; 126
	DB	07DH	; 125
	DB	07CH	; 124
	DB	07BH	; 123
	DB	07AH	; 122
	DB	079H	; 121
	DB	078H	; 120
	DB	077H	; 119
	DB	076H	; 118
	DB	075H	; 117
	DB	074H	; 116
	DB	073H	; 115
	DB	072H	; 114
	DB	071H	; 113
	DB	070H	; 112
	DB	06FH	; 111
	DB	06EH	; 110
	DB	06DH	; 109
	DB	06DH	; 109
	DB	06CH	; 108
	DB	06BH	; 107
	DB	06AH	; 106
	DB	069H	; 105
	DB	068H	; 104
	DB	067H	; 103
	DB	066H	; 102
	DB	065H	; 101
	DB	064H	; 100
	DB	063H	; 99
	DB	062H	; 98
	DB	061H	; 97
	DB	060H	; 96
	DB	05FH	; 95
	DB	05EH	; 94
	DB	05DH	; 93
	DB	05CH	; 92
	DB	05BH	; 91
	DB	05AH	; 90
	DB	059H	; 89
	DB	058H	; 88
	DB	057H	; 87
	DB	056H	; 86
	DB	055H	; 85
	DB	054H	; 84
	DB	053H	; 83
	DB	052H	; 82
	DB	051H	; 81
	DB	051H	; 81
	DB	050H	; 80
	DB	04FH	; 79
	DB	04EH	; 78
	DB	04DH	; 77
	DB	04CH	; 76
	DB	04BH	; 75
	DB	04AH	; 74
	DB	049H	; 73
	DB	048H	; 72
	DB	047H	; 71
	DB	046H	; 70
	DB	045H	; 69
	DB	044H	; 68
	DB	043H	; 67
	DB	042H	; 66
	DB	(1)

@@R_INIT	CSEG	UNIT64KP
	DB	00H	; 0
	DB	020H	; 32

@@INIT	DSEG	BASEP
?L0003:	DS	(1)
?L0009:	DS	(1)

@@DATA	DSEG	BASEP
_adc_raw_vol:	DS	(1)
_adc_raw_dep:	DS	(1)
?L0004:	DS	(1)
?L0005:	DS	(1)
?L0006:	DS	(1)
?L0007:	DS	(1)
?L0008:	DS	(1)
?L0010:	DS	(1)
?L0011:	DS	(1)
?L0055:	DS	(3)
?L0056:	DS	(3)
?L0057:	DS	(3)
?L0058:	DS	(1)
	DS	(1)

@@R_INIS	CSEG	UNIT64KP

@@INIS	DSEG	SADDRP

@@DATS	DSEG	SADDRP

@@CNSTL	CSEG	PAGE64KP

@@RLINIT	CSEG	UNIT64KP

@@INITL	DSEG	UNIT64KP

@@DATAL	DSEG	UNIT64KP

@@CALT	CSEG	CALLT0

; Sub-Routines created by CC78K0R

ROM_CODE	CSEG	BASE
bs_S0076:
	mov	x,!_adc_raw_vol					;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	sarw	ax,2						;[INF] 2, 1
	ret							;[INF] 1, 6
es_S0076:

ROM_CODE	CSEG	BASE
bs_F0075:
	mov	x,a						;[INF] 1, 1
	subc	a,a						;[INF] 2, 1
	call	!_abs						;[INF] 3, 3
	movw	ax,bc						;[INF] 1, 1
	cmpw	ax,#02H	; 2 					;[INF] 3, 1
	or1	CY,a.7						;[INF] 2, 1
	ret							;[INF] 1, 6
es_F0075:

ROM_CODE	CSEG	BASE
bs_F0074:
	mov	a,_slider_to_codec[bc]				;[INF] 3, 1
	shrw	ax,8						;[INF] 2, 1
	push	ax						;[INF] 1, 1
	mov	x,#013H	; 19 					;[INF] 2, 1
	push	ax						;[INF] 1, 1
	mov	x,#0A4H	; 164 					;[INF] 2, 1
	call	!_iic_mcu_write_a_byte				;[INF] 3, 3
	addw	sp,#04H	; 4 					;[INF] 2, 1
	ret							;[INF] 1, 6
es_F0074:

; *** Sub-Routine Information ***
;
; $SUB bs_F0074
;      CODE SIZE= 17 bytes
;
; $SUB bs_F0075
;      CODE SIZE= 13 bytes
;
; $SUB bs_S0076
;      CODE SIZE= 7 bytes

; End of Sub-Routines

; line     1 : /* ========================================================
; line     2 :     藤田＠開技
; line     3 :     nintendo
; line     4 :     '09 Apr
; line     5 :  ======================================================== */
; line     6 : #include "incs.h"
; line     7 : #include "adc.h"
; line     8 : #include "pm.h"
; line     9 : 
; line    10 : #include "led.h"
; line    11 : 
; line    12 : bit     adc_updated;
; line    13 : 
; line    14 : u8 adc_raw_vol;
; line    15 : u8 adc_raw_dep;
; line    16 : 
; line    17 : #define INTERVAL_TSK_ADC  3
; line    18 : /* ========================================================
; line    19 :  ADC設定と、開始
; line    20 : 
; line    21 :   以下のピンは主にここで操作・監視されます。
; line    22 :  ・BT_TEMP,_P
; line    23 :  ・ADIN1
; line    24 :  ・VOL
; line    25 : 
; line    26 :   関係ありそうですが別のところで管理しています
; line    27 :  ・PM_BT_DET,_P		PM_init
; line    28 : 
; line    29 :   ・8tics毎に呼ばれ、３チャンネル分取り込むとADCを停止します。
; line    30 :   　タスク起動時、レジスタには前回の取り込み値が入っています。
; line    31 :  ======================================================== */
; line    32 : /*
; line    33 : // max -4db
; line    34 : static const u8 slider_to_codec[64] =
; line    35 : {
; line    36 :     127, 125, 124, 123, 121, 120, 119, 117,
; line    37 :     116, 115, 113, 112, 111, 109, 108, 107,
; line    38 :     105, 104, 103, 101, 100,  99,  98,  96,
; line    39 :      95,  94,  92,  91,  90,  88,  87,  86,
; line    40 :      84,  83,  82,  80,  79,  78,  76,  75,
; line    41 :      74,  72,  71,  70,  69,  67,  66,  65,
; line    42 :      63,  62,  61,  59,  58,  57,  55,  54,
; line    43 :      53,  51,  50,  49,  47,  46,  45,  44
; line    44 : };
; line    45 : */
; line    46 : 
; line    47 : // max -10db
; line    48 : static const u8 slider_to_codec[64] =
; line    49 : {
; line    50 :     127,  126,  125,  124,  123,  122,  121,  120,
; line    51 :     119,  118,  117,  116,  115,  114,  113,  112,
; line    52 :     111,  110,  109,  109,  108,  107,  106,  105,
; line    53 :     104,  103,  102,  101,  100,   99,   98,   97,
; line    54 :      96,   95,   94,   93,   92,   91,   90,   89,
; line    55 :      88,   87,   86,   85,   84,   83,   82,   81,
; line    56 :      81,   80,   79,   78,   77,   76,   75,   74,
; line    57 :      73,   72,   71,   70,   69,   68,   67,   66
; line    58 : };
; line    59 : 
; line    60 : void tsk_adc(  )
; line    61 : {

ROM_CODE	CSEG	BASE
_tsk_adc:
$DGL	1,81
	push	hl						;[INF] 1, 1
??bf_tsk_adc:
; line    62 :     static u8 task_interval = 0;
; line    63 :     static u8 old_tune;
; line    64 :     static u8 sndvol_codec;
; line    65 :     static u8 bt_temp_old;
; line    66 : 
; line    67 :     if( task_interval-- != 0 )
$DGL	0,7
	mov	a,!?L0003	; task_interval 		;[INF] 3, 1
	dec	!?L0003	; task_interval 			;[INF] 3, 2
	cmp0	a						;[INF] 1, 1
	skz							;[INF] 2, 1
	br	!?L0002						;[INF] 3, 3
; line    68 :     {
??bb00_tsk_adc:
; line    69 :         return;
??eb00_tsk_adc:
; line    70 :     }
; line    71 :     else
; line    72 :     {
??bb01_tsk_adc:
; line    73 :         task_interval = (u8)( INTERVAL_TSK_ADC / SYS_INTERVAL_TI
;              CK );
$DGL	0,13
	oneb	!?L0003	; task_interval 			;[INF] 3, 1
??eb01_tsk_adc:
; line    74 :     }
; line    75 : 
; line    76 : 
; line    77 :     if( adc_updated )
$DGL	0,17
	bt	_adc_updated,$$+7				;[INF] 4, 5
	br	!?L0016						;[INF] 3, 3
; line    78 :     {
??bb02_tsk_adc:
; line    79 :         if( system_status.pwr_state == ON )
$DGL	0,19
	cmp	!_system_status,#03H	; 3 			;[INF] 4, 1
	skz							;[INF] 2, 1
	br	!?L0016						;[INF] 3, 3
; line    80 :         {
??bb03_tsk_adc:
; line    81 :             // Tune ///////////////////////////////////////
; line    82 :             {
??bb04_tsk_adc:
; line    83 :                 // 似非ヒステリシス V2
; line    84 :                 //  ガリオームには適さない
; line    85 : #define KIKAN 32
; line    86 :                 static u8 old_value;
; line    87 :                 static s8 diffs;
; line    88 :                 u8        temp;
; line    89 : 
; line    90 :                 if( abs( adc_raw_dep - old_value ) >= 2 )
$DGL	0,30
	mov	a,!_adc_raw_dep					;[INF] 3, 1
	sub	a,!?L0007	; old_value 			;[INF] 3, 1
	call	!bs_F0075					;[INF] 3, 3
	bc	$?L0018						;[INF] 2, 4
; line    91 :                 {
??bb05_tsk_adc:
; line    92 :                     // 大きく離れた
; line    93 :                     vreg_ctr[ VREG_C_TUNE ] = adc_raw_dep;
$DGL	0,33
	mov	a,!_adc_raw_dep					;[INF] 3, 1
	mov	!_vreg_ctr+8,a					;[INF] 3, 1
; line    94 :                     old_value = adc_raw_dep;
$DGL	0,34
	mov	a,!_adc_raw_dep					;[INF] 3, 1
	mov	!?L0007,a	; old_value 			;[INF] 3, 1
; line    95 : #if 0
; line    96 :                     割り込み入れない;
; line    97 :                     割り込みを入れるようであれば、ちゃんと変化チ
;              ェックする;
; line    98 : 
; line    99 :                     set_irq( VREG_C_IRQ0, REG_BIT_VR_TUNE_CHANGE
;               );
; line   100 : #endif
; line   101 :                     diffs = 0;
$DGL	0,41
	clrb	!?L0008	; diffs 				;[INF] 3, 1
??eb05_tsk_adc:
; line   102 :                 }
$DGL	0,42
	br	$?L0024						;[INF] 2, 3
?L0018:
; line   103 :                 else
; line   104 :                 {
??bb06_tsk_adc:
; line   105 :                     // 近所の値でも、ある期間でいっぱい偏っていた
;              らそっちに寄せる
; line   106 :                     static u8 kikan_count = KIKAN;
; line   107 :                     if( old_value < adc_raw_dep )
$DGL	0,47
	mov	a,!?L0007	; old_value 			;[INF] 3, 1
	cmp	a,!_adc_raw_dep					;[INF] 3, 1
	bnc	$?L0020						;[INF] 2, 4
; line   108 :                     {
??bb07_tsk_adc:
; line   109 :                         diffs += 1;
$DGL	0,49
	inc	!?L0008	; diffs 				;[INF] 3, 2
??eb07_tsk_adc:
; line   110 :                     }
$DGL	0,50
	br	$?L0022						;[INF] 2, 3
?L0020:
; line   111 :                     else if( old_value > adc_raw_dep )
$DGL	0,51
	mov	a,!_adc_raw_dep					;[INF] 3, 1
	cmp	a,!?L0007	; old_value 			;[INF] 3, 1
	sknc							;[INF] 2, 1
; line   112 :                     {
??bb08_tsk_adc:
; line   113 :                         diffs -= 1;
$DGL	0,53
	dec	!?L0008	; diffs 				;[INF] 3, 2
??eb08_tsk_adc:
; line   114 :                     }
?L0022:
; line   115 : 
; line   116 :                     if( --kikan_count == 0 )
$DGL	0,56
	dec	!?L0009	; kikan_count 				;[INF] 3, 2
	cmp0	!?L0009	; kikan_count 				;[INF] 3, 1
	bnz	$?L0024						;[INF] 2, 4
; line   117 :                     {
??bb09_tsk_adc:
; line   118 :                         if( diffs >= KIKAN && ( diffs < 64 ))
$DGL	0,58
	mov	a,!?L0008	; diffs 			;[INF] 3, 1
	xor	a,#080H	; 128 					;[INF] 2, 1
	cmp	a,#0A0H	; 160 					;[INF] 2, 1
	bc	$?L0026						;[INF] 2, 4
	mov	a,!?L0008	; diffs 			;[INF] 3, 1
	xor	a,#080H	; 128 					;[INF] 2, 1
	cmp	a,#0C0H	; 192 					;[INF] 2, 1
	bnc	$?L0026						;[INF] 2, 4
; line   119 :                         {
??bb0A_tsk_adc:
; line   120 :                             old_value += 1;
$DGL	0,60
	inc	!?L0007	; old_value 				;[INF] 3, 2
??eb0A_tsk_adc:
; line   121 :                         }
$DGL	0,61
	br	$?L0028						;[INF] 2, 3
?L0026:
; line   122 :                         else if( ( diffs <= ( 256 - KIKAN )) && 
;              ( diffs > ( 128 + 64 ) ))  // あらー？
$DGL	0,62
	mov	a,!?L0008	; diffs 			;[INF] 3, 1
	sarw	ax,8						;[INF] 2, 1
	cmpw	ax,#0E1H	; 225 				;[INF] 3, 1
	or1	CY,a.7						;[INF] 2, 1
	bnc	$?L0028						;[INF] 2, 4
	mov	a,!?L0008	; diffs 			;[INF] 3, 1
	sarw	ax,8						;[INF] 2, 1
	cmpw	ax,#0C1H	; 193 				;[INF] 3, 1
	or1	CY,a.7						;[INF] 2, 1
	skc							;[INF] 2, 1
; line   123 :                         {
??bb0B_tsk_adc:
; line   124 :                             old_value -= 1;
$DGL	0,64
	dec	!?L0007	; old_value 				;[INF] 3, 2
??eb0B_tsk_adc:
; line   125 :                         }
?L0028:
; line   126 :                         vreg_ctr[ VREG_C_TUNE ] = old_value;
$DGL	0,66
	mov	a,!?L0007	; old_value 			;[INF] 3, 1
	mov	!_vreg_ctr+8,a					;[INF] 3, 1
; line   127 :                         kikan_count = KIKAN;
$DGL	0,67
	mov	!?L0009,#020H	; kikan_count,32 		;[INF] 4, 1
; line   128 :                         diffs = 0;
$DGL	0,68
	clrb	!?L0008	; diffs 				;[INF] 3, 1
??eb09_tsk_adc:
; line   129 :                     }
?L0024:
??eb06_tsk_adc:
; line   130 :                 }
??eb04_tsk_adc:
; line   131 :             }
; line   132 :             vreg_ctr[ VREG_C_DBG1 ] = vreg_ctr[ VREG_C_TUNE ];
$DGL	0,72
	mov	a,!_vreg_ctr+8					;[INF] 3, 1
	mov	!_vreg_ctr+5,a					;[INF] 3, 1
; line   133 :             vreg_ctr[ VREG_C_DBG2 ] = adc_raw_dep;  // dbg
$DGL	0,73
	mov	a,!_adc_raw_dep					;[INF] 3, 1
	mov	!_vreg_ctr+6,a					;[INF] 3, 1
; line   134 : 
; line   135 :             // Volume /////////////////////////////////////
; line   136 :             {
??bb0C_tsk_adc:
; line   137 :                 // 似非ヒステリシスを付けて64段
; line   138 :                 u8        temp;
; line   139 :                 static u8 vol_old;
; line   140 :                 static u8 force_update_vol;
; line   141 : 
; line   142 :                 if( abs( adc_raw_vol - vol_old ) >= 2 )       //
;               生値でこれくらいずれたら更新
$DGL	0,82
	mov	a,!_adc_raw_vol					;[INF] 3, 1
	sub	a,!?L0010	; vol_old 			;[INF] 3, 1
	call	!bs_F0075					;[INF] 3, 3
	bc	$?L0030						;[INF] 2, 4
; line   143 :                 {
??bb0D_tsk_adc:
; line   144 : //                    if( vreg_ctr[ VREG_C_SND_VOL ] != ( adc_ra
;              w_vol / 4 ) )
; line   145 :                     {
??bb0E_tsk_adc:
; line   146 :                         vol_old = adc_raw_vol;
$DGL	0,86
	mov	a,!_adc_raw_vol					;[INF] 3, 1
	mov	!?L0010,a	; vol_old 			;[INF] 3, 1
; line   147 :                         // レジスタ更新
; line   148 :                         vreg_ctr[ VREG_C_SND_VOL ] = ( adc_raw_v
;              ol / 4 );
$DGL	0,88
	call	!bs_S0076					;[INF] 3, 3
	mov	a,x						;[INF] 1, 1
	mov	!_vreg_ctr+9,a					;[INF] 3, 1
; line   149 :                         vreg_twl[ REG_TWL_INT_ADRS_VOL ] = adc_r
;              aw_vol / ( 256 / 32 );  // ←adc値でよい
$DGL	0,89
	mov	x,!_adc_raw_vol					;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	sarw	ax,3						;[INF] 2, 1
	mov	a,x						;[INF] 1, 1
	mov	!_vreg_twl+6,a					;[INF] 3, 1
; line   150 : 
; line   151 :                         // codecに伝える
; line   152 :                         iic_mcu_write_a_byte( IIC_SLA_CODEC, COD
;              EC_REG_VOL, slider_to_codec[ adc_raw_vol / 4 ] );
$DGL	0,92
	call	!bs_S0076					;[INF] 3, 3
	movw	bc,ax						;[INF] 1, 1
	call	!bs_F0074					;[INF] 3, 3
; line   153 : #ifndef _MODEL_CTR_
; line   154 :                         iic_mcu_write_a_byte( IIC_SLA_DCP, 0, sl
;              ider_to_codec[ ( 255 - adc_raw_vol ) / 4 ] );  // todo
; line   155 : #endif
; line   156 : //                        set_irq( VREG_C_IRQ0, REG_BIT_VR_SNDVO
;              L_CHANGE );  // 割り込み廃止
; line   157 :                         force_update_vol = 100;
$DGL	0,97
	mov	!?L0011,#064H	; force_update_vol,100 		;[INF] 4, 1
??eb0E_tsk_adc:
; line   158 :                     }
??eb0D_tsk_adc:
; line   159 :                 }
?L0030:
; line   160 : 
; line   161 :                 {
??bb0F_tsk_adc:
; line   162 :                     // ポーリング
; line   163 :                     if( --force_update_vol == 0 )
$DGL	0,103
	dec	!?L0011	; force_update_vol 			;[INF] 3, 2
	cmp0	!?L0011	; force_update_vol 			;[INF] 3, 1
	bnz	$?L0032						;[INF] 2, 4
; line   164 :                     {
??bb10_tsk_adc:
; line   165 :                         vol_old = adc_raw_vol;
$DGL	0,105
	mov	a,!_adc_raw_vol					;[INF] 3, 1
	mov	!?L0010,a	; vol_old 			;[INF] 3, 1
; line   166 :                         // レジスタ更新
; line   167 : //                        vreg_ctr[ VREG_C_SND_VOL ] = temp;
; line   168 : //                        vreg_twl[ REG_TWL_INT_ADRS_VOL ] = adc
;              _raw_vol / ( 256 / 32 );  // ←adc値でよい
; line   169 :                         // codecに伝える
; line   170 :                         iic_mcu_write_a_byte( IIC_SLA_CODEC, COD
;              EC_REG_VOL, slider_to_codec[ adc_raw_vol / 4 ] );
$DGL	0,110
	call	!bs_S0076					;[INF] 3, 3
	movw	bc,ax						;[INF] 1, 1
	call	!bs_F0074					;[INF] 3, 3
; line   171 :                         force_update_vol = 100;
$DGL	0,111
	mov	!?L0011,#064H	; force_update_vol,100 		;[INF] 4, 1
??eb10_tsk_adc:
; line   172 :                     }
?L0032:
??eb0F_tsk_adc:
; line   173 :                 }
??eb0C_tsk_adc:
; line   174 :             }
; line   175 : 
; line   176 : 
; line   177 :             // TUNE_LED ///////////////////////////////////
; line   178 :             // ここで？仕様？
; line   179 :             {
??bb11_tsk_adc:
; line   180 :                 switch ( vreg_ctr[VREG_C_LED_TUNE] )
$DGL	0,120
	mov	x,!_vreg_ctr+44					;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	onew	bc						;[INF] 1, 1
	subw	ax,#00H	; 0 					;[INF] 3, 1
	bz	$?L0037						;[INF] 2, 4
	subw	ax,bc						;[INF] 1, 1
	bz	$?L0035						;[INF] 2, 4
	subw	ax,bc						;[INF] 1, 1
	bz	$?L0036						;[INF] 2, 4
	br	$?L0037						;[INF] 2, 3
; line   181 :                 {
??bb12_tsk_adc:
; line   182 :                 case LED_TUNE_ILM_ON:
?L0035:
; line   183 :                     LED_duty_TUNE = vreg_ctr[VREG_C_LED_BRIGHT];
$DGL	0,123
	mov	x,!_vreg_ctr+40					;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	movw	TDR01,ax					;[INF] 2, 1
; line   184 :                     break;
$DGL	0,124
	br	$?L0034						;[INF] 2, 3
; line   185 : 
; line   186 :                 case LED_TUNE_ILM_SVR:
?L0036:
; line   187 :                     LED_duty_TUNE = vreg_ctr[VREG_C_TUNE] / 16;
$DGL	0,127
	mov	x,!_vreg_ctr+8					;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	sarw	ax,4						;[INF] 2, 1
	movw	TDR01,ax					;[INF] 2, 1
; line   188 :                     break;
$DGL	0,128
	br	$?L0034						;[INF] 2, 3
; line   189 : 
; line   190 :                 case LED_TUNE_ILM_OFF:
?L0037:
; line   191 :                 default:
; line   192 :                     LED_duty_TUNE = 0;
$DGL	0,132
	clrw	ax						;[INF] 1, 1
	movw	TDR01,ax					;[INF] 2, 1
; line   193 :                     break;
??eb12_tsk_adc:
; line   194 :                 }
?L0034:
??eb11_tsk_adc:
; line   195 :             }
; line   196 :             adc_updated = 0;
$DGL	0,136
	clr1	_adc_updated					;[INF] 3, 2
??eb03_tsk_adc:
; line   197 :         }
?L0016:
??eb02_tsk_adc:
; line   198 :     }
; line   199 : 
; line   200 : 
; line   201 :     ADCEN = 1;
$DGL	0,141
	set1	!PER0.5						;[INF] 4, 2
; line   202 :     ADM =  0b00011011;      // セレクトモード、章圧、fCLK/6 ///こ
;              こから ↓
$DGL	0,142
	mov	ADM,#01BH	; 27 				;[INF] 3, 1
; line   203 : 
; line   204 :     ADPC = 0x06;            // ADCポートのセレクト
$DGL	0,144
	mov	!ADPC,#06H	; 6 				;[INF] 4, 1
; line   205 :     ADS = ADC_SEL_TUNE;
$DGL	0,145
	mov	ADS,#06H	; 6 				;[INF] 3, 1
; line   206 :     NOP();
$DGL	0,146
	nop							;[INF] 1, 1
; line   207 :     NOP();
$DGL	0,147
	nop							;[INF] 1, 1
; line   208 :     NOP();
$DGL	0,148
	nop							;[INF] 1, 1
; line   209 :     NOP();
$DGL	0,149
	nop							;[INF] 1, 1
; line   210 :     NOP();
$DGL	0,150
	nop							;[INF] 1, 1
; line   211 :     NOP();
$DGL	0,151
	nop							;[INF] 1, 1
; line   212 :     NOP();
$DGL	0,152
	nop							;[INF] 1, 1
; line   213 :     NOP();
$DGL	0,153
	nop							;[INF] 1, 1
; line   214 :     ADCS = 1;               // AD開始。                     /// 
;              ここまで　↑　までに1us=8clk以上開ける
$DGL	0,154
	set1	ADM.7						;[INF] 3, 2
; line   215 : 
; line   216 :     ADIF = 0;
$DGL	0,156
	clr1	IF1H.0						;[INF] 3, 2
; line   217 :     ADMK = 0;
$DGL	0,157
	clr1	MK1H.0						;[INF] 3, 2
; line   218 : 
; line   219 : }
?L0002:
$DGL	0,159
??ef_tsk_adc:
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_tsk_adc:
; line   220 : 
; line   221 : 
; line   222 : /* ========================================================
; line   223 : 　過去３つのminでもMAXでもない値を返す
; line   224 :  　突発的なノイズを除く。
; line   225 :  　根本対策ではないが、これはこれで使い道がある。
; line   226 : ======================================================== */
; line   227 : static u8 getmean3( u8 * hist )
; line   228 : {
_getmean3:
$DGL	1,181
	push	hl						;[INF] 1, 1
	movw	hl,ax						;[INF] 1, 1
??bf_getmean3:
; line   229 :     if( *hist > *( hist + 1 ) )
$DGL	0,2
	mov	a,[hl]						;[INF] 1, 1
	mov	c,a						;[INF] 1, 1
	mov	a,[hl+1]					;[INF] 2, 1
	cmp	a,c						;[INF] 2, 1
	bnc	$?L0043						;[INF] 2, 4
; line   230 :     {
??bb00_getmean3:
; line   231 :         if( *hist > *( hist + 2 ) )
$DGL	0,4
	mov	a,[hl]						;[INF] 1, 1
	mov	c,a						;[INF] 1, 1
	mov	a,[hl+2]					;[INF] 2, 1
	cmp	a,c						;[INF] 2, 1
	bnc	$?L0045						;[INF] 2, 4
; line   232 :         {
??bb01_getmean3:
; line   233 :             return( ( *( hist + 1 ) > *( hist + 2 ) ) ? *( hist 
;              + 1 ) : *( hist + 2 ) );
$DGL	0,6
	mov	a,[hl+1]					;[INF] 2, 1
	mov	c,a						;[INF] 1, 1
	mov	a,[hl+2]					;[INF] 2, 1
	cmp	a,c						;[INF] 2, 1
	bnc	$?L0047						;[INF] 2, 4
	mov	a,[hl+1]					;[INF] 2, 1
	shrw	ax,8						;[INF] 2, 1
	br	$?L0048						;[INF] 2, 3
?L0047:
	mov	a,[hl+2]					;[INF] 2, 1
	shrw	ax,8						;[INF] 2, 1
?L0048:
	movw	bc,ax						;[INF] 1, 1
	br	$?L0050						;[INF] 2, 3
??eb01_getmean3:
; line   234 :         }
?L0045:
; line   235 :         else
; line   236 :         {
??bb02_getmean3:
; line   237 :             return( *hist );
$DGL	0,10
	mov	a,[hl]						;[INF] 1, 1
	shrw	ax,8						;[INF] 2, 1
	movw	bc,ax						;[INF] 1, 1
	br	$?L0050						;[INF] 2, 3
??eb02_getmean3:
; line   238 :         }
; line   239 :     }else{
??eb00_getmean3:
?L0043:
??bb03_getmean3:
; line   240 :         if( *hist > *( hist + 2 ) )
$DGL	0,13
	mov	a,[hl]						;[INF] 1, 1
	mov	c,a						;[INF] 1, 1
	mov	a,[hl+2]					;[INF] 2, 1
	cmp	a,c						;[INF] 2, 1
	bnc	$?L0049						;[INF] 2, 4
; line   241 :         {
??bb04_getmean3:
; line   242 :             return( *hist );
$DGL	0,15
	mov	a,[hl]						;[INF] 1, 1
	shrw	ax,8						;[INF] 2, 1
	movw	bc,ax						;[INF] 1, 1
	br	$?L0050						;[INF] 2, 3
??eb04_getmean3:
; line   243 :         }
?L0049:
; line   244 :         else
; line   245 :         {
??bb05_getmean3:
; line   246 :             return( ( *( hist + 1 ) < *( hist + 2 ) ) ? *( hist 
;              + 1 ) : *( hist + 2 ) );
$DGL	0,19
	mov	a,[hl+1]					;[INF] 2, 1
	mov	c,a						;[INF] 1, 1
	mov	a,[hl+2]					;[INF] 2, 1
	cmp	c,a						;[INF] 2, 1
	bnc	$?L0051						;[INF] 2, 4
	mov	a,[hl+1]					;[INF] 2, 1
	shrw	ax,8						;[INF] 2, 1
	br	$?L0052						;[INF] 2, 3
?L0051:
	mov	a,[hl+2]					;[INF] 2, 1
	shrw	ax,8						;[INF] 2, 1
?L0052:
	movw	bc,ax						;[INF] 1, 1
??eb05_getmean3:
; line   247 :         }
?L0050:
??eb03_getmean3:
; line   248 :     }
; line   249 : }
$DGL	0,22
??ef_getmean3:
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_getmean3:
; line   250 : 
; line   251 : 
; line   252 : 
; line   253 : /* ========================================================
; line   254 : 　自前で次のチャンネル
; line   255 : 　　一通り終わったら止める
; line   256 :  ======================================================== */
; line   257 : __interrupt void int_adc(  )
; line   258 : {

@@BASE	CSEG	BASE
_int_adc:
$DGL	1,213
	push	ax						;[INF] 1, 1
	push	bc						;[INF] 1, 1
	push	de						;[INF] 1, 1
	push	hl						;[INF] 1, 1
	mov	c,#0CH						;[INF] 2, 1
	dec	c						;[INF] 1, 1
	dec	c						;[INF] 1, 1
	movw	ax,_@SEGAX[c]					;[INF] 3, 1
	push	ax						;[INF] 1, 1
	bnz	$$-6						;[INF] 2, 4
	mov	a,ES						;[INF] 2, 1
	mov	x,a						;[INF] 1, 1
	mov	a,CS						;[INF] 2, 1
	push	ax						;[INF] 1, 1
??bf_int_adc:
; line   259 :     static u8 hist_tune[3];
; line   260 :     static u8 hist_snd_vol[3];
; line   261 :     static u8 hist_bt_temp[3];
; line   262 :     static u8 index;
; line   263 : 
; line   264 :     EI(  );
$DGL	0,7
	ei							;[INF] 3, 4
; line   265 :     switch ( ADS )
$DGL	0,8
	mov	a,ADS						;[INF] 2, 1
	shrw	ax,8						;[INF] 2, 1
	onew	bc						;[INF] 1, 1
	subw	ax,#06H	; 6 					;[INF] 3, 1
	bz	$?L0060						;[INF] 2, 4
	subw	ax,bc						;[INF] 1, 1
	bz	$?L0061						;[INF] 2, 4
	subw	ax,bc						;[INF] 1, 1
	bz	$?L0062						;[INF] 2, 4
	subw	ax,bc						;[INF] 1, 1
	br	$?L0059						;[INF] 2, 3
; line   266 :     {
??bb00_int_adc:
; line   267 : /*
; line   268 : case ( ADC_SEL_AMB_BRIT ):
; line   269 :         vreg_ctr[ VREG_C_AMBIENT_BRIGHTNESS ] = ADCRH;
; line   270 :         break;
; line   271 : */
; line   272 : 
; line   273 :     case ( ADC_SEL_TUNE ):
?L0060:
; line   274 :         hist_tune[index] = ADCRH;
$DGL	0,17
	mov	x,!?L0058	; index 			;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	addw	ax,#loww (?L0055)	; hist_tune 		;[INF] 3, 1
	movw	de,ax						;[INF] 1, 1
	mov	a,ADCRH						;[INF] 2, 1
	mov	[de],a						;[INF] 1, 1
; line   275 : #ifdef _MODEL_WM0_
; line   276 :         adc_raw_dep = 255 - getmean3( hist_tune );
; line   277 : #else
; line   278 :         adc_raw_dep = getmean3( hist_tune );
$DGL	0,21
	movw	ax,#loww (?L0055)	; hist_tune 		;[INF] 3, 1
	call	!_getmean3					;[INF] 3, 3
	mov	a,c						;[INF] 1, 1
	mov	!_adc_raw_dep,a					;[INF] 3, 1
; line   279 : #endif
; line   280 :         break;
$DGL	0,23
	br	$?L0059						;[INF] 2, 3
; line   281 : 
; line   282 :     case ( ADC_SEL_VOL ):
?L0061:
; line   283 :         hist_snd_vol[index] = ADCRH;
$DGL	0,26
	mov	x,!?L0058	; index 			;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	addw	ax,#loww (?L0056)	; hist_snd_vol 		;[INF] 3, 1
	movw	de,ax						;[INF] 1, 1
	mov	a,ADCRH						;[INF] 2, 1
	mov	[de],a						;[INF] 1, 1
; line   284 : #ifdef _MODEL_CTR_JIKKI_
; line   285 :         adc_raw_vol = ( 255 - getmean3( hist_snd_vol ));
; line   286 : #else
; line   287 :         adc_raw_vol = getmean3( hist_snd_vol );
$DGL	0,30
	movw	ax,#loww (?L0056)	; hist_snd_vol 		;[INF] 3, 1
	call	!_getmean3					;[INF] 3, 3
	mov	a,c						;[INF] 1, 1
	mov	!_adc_raw_vol,a					;[INF] 3, 1
; line   288 : #endif
; line   289 :         // TWL用レジスタ(32段)の更新。アトミックな処理として扱わ
;              ないと不都合が。
; line   290 :         /// 割り込みはHorizonを通してコマンドを発行されるのを待て
;              ばよい
; line   291 :         break;
$DGL	0,34
	br	$?L0059						;[INF] 2, 3
; line   292 : 
; line   293 :     case ( ADC_SEL_BATT_TEMP ):
?L0062:
; line   294 :         hist_bt_temp[index] = ADCRH;
$DGL	0,37
	mov	x,!?L0058	; index 			;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	addw	ax,#loww (?L0057)	; hist_bt_temp 		;[INF] 3, 1
	movw	de,ax						;[INF] 1, 1
	mov	a,ADCRH						;[INF] 2, 1
	mov	[de],a						;[INF] 1, 1
; line   295 :         raw_adc_temperature = getmean3( hist_bt_temp );
$DGL	0,38
	movw	ax,#loww (?L0057)	; hist_bt_temp 		;[INF] 3, 1
	call	!_getmean3					;[INF] 3, 3
	mov	a,c						;[INF] 1, 1
	mov	!_raw_adc_temperature,a				;[INF] 3, 1
; line   296 :         renge_task_immed_add( PM_bt_temp_update );
$DGL	0,39
	movw	ax,#loww (_PM_bt_temp_update)			;[INF] 3, 1
	call	!_renge_task_immed_add				;[INF] 3, 3
; line   297 :         break;
; line   298 : 
; line   299 :     case ( ADC_SEL_BATT_DET ):
; line   300 : //    vreg_ctr[ VREG_C_DBG_BATT_DET ] = ADCRH;
; line   301 :         // todo
; line   302 :         break;
??eb00_int_adc:
; line   303 :     }
?L0059:
; line   304 : 
; line   305 : 
; line   306 : // もっとまともな書き方がありそうだ
; line   307 : // if( ADS == ADC_SEL_BATT_DET ){
; line   308 :     if( ADS != ADC_SEL_BATT_TEMP )
$DGL	0,51
	cmp	!ADS,#08H	; 8 				;[INF] 4, 1
	bz	$?L0066						;[INF] 2, 4
; line   309 :     {                           // 電池判別は電源投入の一回のみ
??bb01_int_adc:
; line   310 :         ADS += 1;               // 次のチャンネル
$DGL	0,53
	inc	!ADS						;[INF] 3, 2
; line   311 :         BT_TEMP_P = 1;              // 電池温度監視スタート
$DGL	0,54
	set1	P1.7						;[INF] 3, 2
??eb01_int_adc:
; line   312 :     }
$DGL	0,55
	br	$?L0067						;[INF] 2, 3
?L0066:
; line   313 :     else
; line   314 :     {
??bb02_int_adc:
; line   315 :         ADCEN = 0;              // 止めてしまう
$DGL	0,58
	clr1	!PER0.5						;[INF] 4, 2
; line   316 :         BT_TEMP_P = 0;              // 電池温度監視スタート
$DGL	0,59
	clr1	P1.7						;[INF] 3, 2
; line   317 :         adc_updated = 1;
$DGL	0,60
	set1	_adc_updated					;[INF] 3, 2
; line   318 :         index = ( index == 2 ) ? 0 : ( index + 1 );
$DGL	0,61
	cmp	!?L0058,#02H	; index,2 			;[INF] 4, 1
	bnz	$?L0068						;[INF] 2, 4
	clrw	ax						;[INF] 1, 1
	br	$?L0069						;[INF] 2, 3
?L0068:
	mov	x,!?L0058	; index 			;[INF] 3, 1
	clrb	a						;[INF] 1, 1
	incw	ax						;[INF] 1, 1
?L0069:
	mov	a,x						;[INF] 1, 1
	mov	!?L0058,a	; index 			;[INF] 3, 1
??eb02_int_adc:
; line   319 :     }
?L0067:
; line   320 : }
$DGL	0,63
??ef_int_adc:
	pop	ax						;[INF] 1, 1
	mov	CS,a						;[INF] 2, 1
	mov	a,x						;[INF] 1, 1
	mov	ES,a						;[INF] 2, 1
	movw	de,#_@SEGAX					;[INF] 3, 1
	mov	c,#06H						;[INF] 2, 1
	pop	ax						;[INF] 1, 1
	movw	[de],ax						;[INF] 1, 1
	incw	de						;[INF] 1, 1
	incw	de						;[INF] 1, 1
	dec	c						;[INF] 1, 1
	bnz	$$-5						;[INF] 2, 4
	pop	hl						;[INF] 1, 1
	pop	de						;[INF] 1, 1
	pop	bc						;[INF] 1, 1
	pop	ax						;[INF] 1, 1
	reti							;[INF] 2, 6
??ee_int_adc:
; line   321 : 
; line   322 : 
; line   323 : 
; line   324 : /* ========================================================
; line   325 :  tsk_adcと競合することを考慮していません。
; line   326 :  ======================================================== */
; line   327 : u8 get_adc( u8 ch )
; line   328 : {

ROM_CODE	CSEG	BASE
_get_adc:
$DGL	1,238
	push	hl						;[INF] 1, 1
	movw	hl,ax						;[INF] 1, 1
??bf_get_adc:
; line   329 :     u8      temp;
; line   330 : 
; line   331 :     ADMK = 1;
$DGL	0,4
	set1	MK1H.0						;[INF] 3, 2
; line   332 :     ADIF = 0;
$DGL	0,5
	clr1	IF1H.0						;[INF] 3, 2
; line   333 : 
; line   334 :     ADCEN = 1;
$DGL	0,7
	set1	!PER0.5						;[INF] 4, 2
; line   335 :     ADCS = 0;
$DGL	0,8
	clr1	ADM.7						;[INF] 3, 2
; line   336 :     ADM = 0b00100011;          // セレクトモード、昇圧、fCLK/6  
;              ///ここから↓
$DGL	0,9
	mov	ADM,#023H	; 35 				;[INF] 3, 1
; line   337 : 
; line   338 :     ADPC = 0x06;                // ADCポートのセレクト
$DGL	0,11
	mov	!ADPC,#06H	; 6 				;[INF] 4, 1
; line   339 :     ADS = ch;
$DGL	0,12
	mov	a,l						;[INF] 1, 1
	mov	ADS,a						;[INF] 2, 1
; line   340 :     NOP();
$DGL	0,13
	nop							;[INF] 1, 1
; line   341 :     NOP();
$DGL	0,14
	nop							;[INF] 1, 1
; line   342 :     NOP();
$DGL	0,15
	nop							;[INF] 1, 1
; line   343 :     NOP();
$DGL	0,16
	nop							;[INF] 1, 1
; line   344 :     NOP();
$DGL	0,17
	nop							;[INF] 1, 1
; line   345 :     NOP();
$DGL	0,18
	nop							;[INF] 1, 1
; line   346 :     NOP();
$DGL	0,19
	nop							;[INF] 1, 1
; line   347 :     NOP();
$DGL	0,20
	nop							;[INF] 1, 1
; line   348 :     ADCS = 1;                   // AD開始。                     
;              /// ここまで↑　に、1us以上開ける
$DGL	0,21
	set1	ADM.7						;[INF] 3, 2
; line   349 : 
; line   350 :     ADMK = 0;
$DGL	0,23
	clr1	MK1H.0						;[INF] 3, 2
; line   351 :     while( ADIF == 0 ){;}
$DGL	0,24
?L0072:
	bt	IF1H.0,$?L0073					;[INF] 4, 5
??bb00_get_adc:
??eb00_get_adc:
	br	$?L0072						;[INF] 2, 3
?L0073:
; line   352 :     temp = ADCRH;
$DGL	0,25
	mov	a,ADCRH						;[INF] 2, 1
; line   353 :     ADCEN = 0;
$DGL	0,26
	clr1	!PER0.5						;[INF] 4, 2
; line   354 : 
; line   355 :     return ( temp );
$DGL	0,28
	shrw	ax,8						;[INF] 2, 1
	movw	bc,ax						;[INF] 1, 1
; line   356 : }
$DGL	0,29
??ef_get_adc:
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_get_adc:

@@CODEL	CSEG
	END


; *** Code Information ***
;
; $FILE C:\78k_data\yav-mcu-basara\branches\0.10(fix)\adc.c
;
; $FUNC tsk_adc(61)
;	void=(void)
;	CODE SIZE= 312 bytes, CLOCK_SIZE= 302 clocks, STACK_SIZE= 14 bytes
;
; $CALL abs(90)
;	bc=(int:ax)
;
; $CALL abs(142)
;	bc=(int:ax)
;
; $CALL iic_mcu_write_a_byte(152)
;	bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $CALL iic_mcu_write_a_byte(170)
;	bc=(int:ax, int:[sp+4], int:[sp+6])
;
; $FUNC getmean3(228)
;	bc=(pointer hist:ax)
;	CODE SIZE= 82 bytes, CLOCK_SIZE= 80 clocks, STACK_SIZE= 2 bytes
;
; $FUNC int_adc(258)
;	void=(void)
;	CODE SIZE= 181 bytes, CLOCK_SIZE= 146 clocks, STACK_SIZE= 26 bytes
;
; $CALL getmean3(278)
;	bc=(pointer:ax)
;
; $CALL getmean3(287)
;	bc=(pointer:ax)
;
; $CALL getmean3(295)
;	bc=(pointer:ax)
;
; $CALL renge_task_immed_add(296)
;	bc=(pointer:ax)
;
; $FUNC get_adc(328)
;	bc=(unsigned char ch:x)
;	CODE SIZE= 56 bytes, CLOCK_SIZE= 46 clocks, STACK_SIZE= 2 bytes

; Target chip : uPD79F0104
; Device file : E1.00b