diff --git a/tags/SDK3.0(2.00)/VCProj/Debug/BuildLog.htm b/tags/SDK3.0(2.00)/VCProj/Debug/BuildLog.htm
new file mode 100644
index 0000000..826ce7c
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/Debug/BuildLog.htm differ
diff --git a/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.lastbuildstate b/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.lastbuildstate
new file mode 100644
index 0000000..ed27c09
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.lastbuildstate
@@ -0,0 +1,2 @@
+#v4.0:v100
+Debug|Win32|C:\78k_data\yav-mcu-basara\trunk\VCProj\|
diff --git a/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.log b/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.log
new file mode 100644
index 0000000..58c1bd7
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.log
@@ -0,0 +1,71 @@
+2011/08/02 14:10:42 にビルドを開始しました。
+     1>ノード 2 上のプロジェクト "C:\78k_data\yav-mcu-basara\branches\sim\VCProj\bsr_trunk.vcxproj" (build ターゲット)。
+     1>InitializeBuildStatus:
+         "Debug\sim.unsuccessfulbuild" のタッチ タスクを実行しています。
+       ClCompile:
+         C:\Program Files (x86)\Microsoft Visual Studio 10.0\VC\bin\CL.exe /c /Z7 /nologo /W1 /WX- /Od /Oy- /D _MBCS /Gm- /EHsc /MD /GS /fp:precise /Zc:wchar_t /Zc:forScope /Fo"Debug\\" /Fd"Debug\vc100.pdb" /Gd /TC /analyze- /errorReport:prompt ..\accero.c ..\adc.c ..\i2c_ctr.c ..\i2c_twl.c ..\led.c ..\led_cam.c ..\led_pow.c ..\loader.c ..\magic.c ..\main.c ..\pedo_alg_thre_det2.c ..\pm.c ..\rtc.c ..\self_flash.c ..\sw.c ..\task_debug.c ..\task_misc.c ..\task_status.c ..\task_sys.c ..\vreg_ctr.c ..\vreg_twl.c
+         accero.c
+         adc.c
+         i2c_ctr.c
+         i2c_twl.c
+         led.c
+         led_cam.c
+         led_pow.c
+         loader.c
+         magic.c
+         main.c
+         pedo_alg_thre_det2.c
+         pm.c
+     1>..\pm.c(1279): warning C4090: '=' : 異なる 'const' 修飾子です。
+         rtc.c
+         self_flash.c
+         sw.c
+         task_debug.c
+         task_misc.c
+         task_status.c
+         task_sys.c
+         vreg_ctr.c
+         コードを生成中...
+         コンパイル中...
+         vreg_twl.c
+         コードを生成中...
+       Link:
+         C:\Program Files (x86)\Microsoft Visual Studio 10.0\VC\bin\link.exe /ERRORREPORT:PROMPT /OUT:"C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.exe" /NOLOGO kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /MANIFEST /ManifestFile:"Debug\sim.exe.intermediate.manifest" /MANIFESTUAC:"level='asInvoker' uiAccess='false'" /DEBUG /PDB:"C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.pdb" /TLBID:1 /DYNAMICBASE /NXCOMPAT /IMPLIB:"C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.lib" /MACHINE:X86 Debug\accero.obj
+         Debug\adc.obj
+         Debug\hal.obj
+         Debug\i2c_ctr.obj
+         Debug\i2c_mcu.obj
+         Debug\i2c_twl.obj
+         Debug\ini_VECT.obj
+         Debug\led.obj
+         Debug\led_cam.obj
+         Debug\led_pow.obj
+         Debug\loader.obj
+         Debug\magic.obj
+         Debug\main.obj
+         Debug\pedo_alg_thre_det2.obj
+         Debug\pm.obj
+         Debug\rtc.obj
+         Debug\self_flash.obj
+         Debug\simFixture.obj
+         Debug\sw.obj
+         Debug\task_debug.obj
+         Debug\task_misc.obj
+         Debug\task_status.obj
+         Debug\task_sys.obj
+         Debug\vreg_ctr.obj
+         Debug\vreg_twl.obj
+         Debug\WDT.obj
+         Debug\renge.obj
+         LINK : 前回のインクリメンタル リンクで C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.exe が見つからなかったか、ビルドされませんでした。フル リンクを行います。
+         bsr_trunk.vcxproj -> C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.exe
+       Manifest:
+         C:\Program Files (x86)\Microsoft SDKs\Windows\v7.0A\bin\mt.exe /nologo /verbose /outputresource:"C:\78k_data\yav-mcu-basara\branches\sim\VCProj\Debug\sim.exe;#1" /manifest Debug\sim.exe.intermediate.manifest
+       FinalizeBuildStatus:
+         ファイル "Debug\sim.unsuccessfulbuild" を削除しています。
+         "Debug\sim.lastbuildstate" のタッチ タスクを実行しています。
+     1>プロジェクト "C:\78k_data\yav-mcu-basara\branches\sim\VCProj\bsr_trunk.vcxproj" (build ターゲット) のビルドが完了しました。
+
+ビルドに成功しました。
+
+経過時間 00:00:03.96
diff --git a/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.unsuccessfulbuild b/tags/SDK3.0(2.00)/VCProj/Debug/bsr_trunk.unsuccessfulbuild
new file mode 100644
index 0000000..e69de29
diff --git a/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.css b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.css
new file mode 100644
index 0000000..3411f63
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.css
@@ -0,0 +1,207 @@
+BODY
+{
+	BACKGROUND-COLOR: white;
+	FONT-FAMILY: "Verdana", sans-serif;
+	FONT-SIZE: 100%;
+	MARGIN-LEFT: 0px;
+	MARGIN-TOP: 0px
+}
+P
+{
+	FONT-FAMILY: "Verdana", sans-serif;
+	FONT-SIZE: 70%;
+	LINE-HEIGHT: 12pt;
+	MARGIN-BOTTOM: 0px;
+	MARGIN-LEFT: 10px;
+	MARGIN-TOP: 10px
+}
+.note
+{
+	BACKGROUND-COLOR:  #ffffff;
+	COLOR: #336699;
+	FONT-FAMILY: "Verdana", sans-serif;
+	FONT-SIZE: 100%;
+	MARGIN-BOTTOM: 0px;
+	MARGIN-LEFT: 0px;
+	MARGIN-TOP: 0px;
+	PADDING-RIGHT: 10px
+}
+.infotable
+{
+	BACKGROUND-COLOR: #f0f0e0;
+	BORDER-BOTTOM: #ffffff 0px solid;
+	BORDER-COLLAPSE: collapse;
+	BORDER-LEFT: #ffffff 0px solid;
+	BORDER-RIGHT: #ffffff 0px solid;
+	BORDER-TOP: #ffffff 0px solid;
+	FONT-SIZE: 70%;
+	MARGIN-LEFT: 10px
+}
+.issuetable
+{
+	BACKGROUND-COLOR: #ffffe8;
+	BORDER-COLLAPSE: collapse;
+	COLOR: #000000;
+	FONT-SIZE: 100%;
+	MARGIN-BOTTOM: 10px;
+	MARGIN-LEFT: 13px;
+	MARGIN-TOP: 0px
+}
+.issuetitle
+{
+	BACKGROUND-COLOR: #ffffff;
+	BORDER-BOTTOM: #dcdcdc 1px solid;
+	BORDER-TOP: #dcdcdc 1px;
+	COLOR: #003366;
+	FONT-WEIGHT: normal
+}
+.header
+{
+	BACKGROUND-COLOR: #cecf9c;
+	BORDER-BOTTOM: #ffffff 1px solid;
+	BORDER-LEFT: #ffffff 1px solid;
+	BORDER-RIGHT: #ffffff 1px solid;
+	BORDER-TOP: #ffffff 1px solid;
+	COLOR: #000000;
+	FONT-WEIGHT: bold
+}
+.issuehdr
+{
+	BACKGROUND-COLOR: #E0EBF5;
+	BORDER-BOTTOM: #dcdcdc 1px solid;
+	BORDER-TOP: #dcdcdc 1px solid;
+	COLOR: #000000;
+	FONT-WEIGHT: normal
+}
+.issuenone
+{
+	BACKGROUND-COLOR: #ffffff;
+	BORDER-BOTTOM: 0px;
+	BORDER-LEFT: 0px;
+	BORDER-RIGHT: 0px;
+	BORDER-TOP: 0px;
+	COLOR: #000000;
+	FONT-WEIGHT: normal
+}
+.content
+{
+	BACKGROUND-COLOR: #e7e7ce;
+	BORDER-BOTTOM: #ffffff 1px solid;
+	BORDER-LEFT: #ffffff 1px solid;
+	BORDER-RIGHT: #ffffff 1px solid;
+	BORDER-TOP: #ffffff 1px solid;
+	PADDING-LEFT: 3px
+}
+.issuecontent
+{
+	BACKGROUND-COLOR: #ffffff;
+	BORDER-BOTTOM: #dcdcdc 1px solid;
+	BORDER-TOP: #dcdcdc 1px solid;
+	PADDING-LEFT: 3px
+}
+A:link
+{
+	COLOR: #cc6633;
+	TEXT-DECORATION: underline
+}
+A:visited
+{
+	COLOR: #cc6633;
+}
+A:active
+{
+	COLOR: #cc6633;
+}
+A:hover
+{
+	COLOR: #cc3300;
+	TEXT-DECORATION: underline
+}
+H1
+{
+	BACKGROUND-COLOR: #003366;
+	BORDER-BOTTOM: #336699 6px solid;
+	COLOR: #ffffff;
+	FONT-SIZE: 130%;
+	FONT-WEIGHT: normal;
+	MARGIN: 0em 0em 0em -20px;
+	PADDING-BOTTOM: 8px;
+	PADDING-LEFT: 30px;
+	PADDING-TOP: 16px
+}
+H2
+{
+	COLOR: #000000;
+	FONT-SIZE: 80%;
+	FONT-WEIGHT: bold;
+	MARGIN-BOTTOM: 3px;
+	MARGIN-LEFT: 10px;
+	MARGIN-TOP: 20px;
+	PADDING-LEFT: 0px
+}
+H3
+{
+	COLOR: #000000;
+	FONT-SIZE: 80%;
+	FONT-WEIGHT: bold;
+	MARGIN-BOTTOM: -5px;
+	MARGIN-LEFT: 10px;
+	MARGIN-TOP: 20px
+}
+H4
+{
+	COLOR: #000000;
+	FONT-SIZE: 70%;
+	FONT-WEIGHT: bold;
+	MARGIN-BOTTOM: 0px;
+	MARGIN-TOP: 15px;
+	PADDING-BOTTOM: 0px
+}
+UL
+{
+	COLOR: #000000;
+	FONT-SIZE: 70%;
+	LIST-STYLE: square;
+	MARGIN-BOTTOM: 0pt;
+	MARGIN-TOP: 0pt
+}
+OL
+{
+	COLOR: #000000;
+	FONT-SIZE: 70%;
+	LIST-STYLE: square;
+	MARGIN-BOTTOM: 0pt;
+	MARGIN-TOP: 0pt
+}
+LI
+{
+	LIST-STYLE: square;
+	MARGIN-LEFT: 0px
+}
+.expandable
+{
+	CURSOR: hand
+}
+.expanded
+{
+	color: black
+}
+.collapsed
+{
+	DISPLAY: none
+}
+.foot
+{
+BACKGROUND-COLOR: #ffffff;
+BORDER-BOTTOM: #cecf9c 1px solid;
+BORDER-TOP: #cecf9c 2px solid
+}
+.settings
+{
+MARGIN-LEFT: 25PX;
+}
+.help
+{
+TEXT-ALIGN: right;
+margin-right: 10px;
+}
diff --git a/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.xslt b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.xslt
new file mode 100644
index 0000000..8277446
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport.xslt
@@ -0,0 +1,232 @@
+<?xml version="1.0" encoding="utf-8"?>
+<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform" xmlns:msxsl="urn:schemas-microsoft-com:xslt">
+
+    <xsl:key name="ProjectKey" match="Event" use="@Project"/>
+
+    <xsl:template match="Events" mode="createProjects">
+        <projects>
+            <xsl:for-each select="Event">
+                <!--xsl:sort select="@Project" order="descending"/-->
+                <xsl:if test="(1=position()) or (preceding-sibling::*[1]/@Project != @Project)">
+
+                    <xsl:variable name="ProjectName" select="@Project"/>
+
+                    <project>
+                        <xsl:attribute name="name">
+                            <xsl:value-of select="@Project"/>
+                        </xsl:attribute> 
+
+                        <xsl:if test="@Project=''">
+                        <xsl:attribute name="solution">
+                            <xsl:value-of select="@Solution"/>
+                        </xsl:attribute> 
+                        </xsl:if>
+
+                        <xsl:for-each select="key('ProjectKey', $ProjectName)">
+                            <!--xsl:sort select="@Source" /-->
+                            <xsl:if test="(1=position()) or (preceding-sibling::*[1]/@Source != @Source)">
+
+                                <source>
+                                    <xsl:attribute name="name">
+                                        <xsl:value-of select="@Source"/>
+                                    </xsl:attribute>
+
+                                    <xsl:variable name="Source">
+                                        <xsl:value-of select="@Source"/>
+                                    </xsl:variable>
+
+                                    <xsl:for-each select="key('ProjectKey', $ProjectName)[ @Source = $Source ]">
+
+                                        <event>
+                                            <xsl:attribute name="error-level">
+                                                <xsl:value-of select="@ErrorLevel"/>
+                                            </xsl:attribute> 
+                                            <xsl:attribute name="description">
+                                                <xsl:value-of select="@Description"/>
+                                            </xsl:attribute> 
+                                        </event>
+                                    </xsl:for-each>
+                                </source>
+                            </xsl:if>
+                        </xsl:for-each>
+
+                    </project>
+                </xsl:if>
+            </xsl:for-each>
+        </projects>
+    </xsl:template>
+
+    <xsl:template match="projects">
+    <xsl:for-each select="project">
+    <xsl:sort select="@Name" order="ascending"/>
+        <h2>
+        <xsl:if test="@solution"><a _locID="Solution">ソリューション</a>: <xsl:value-of select="@solution"/></xsl:if>
+        <xsl:if test="not(@solution)"><a _locID="Project">プロジェクト</a>: <xsl:value-of select="@name"/>
+            <xsl:for-each select="source">
+                <xsl:variable name="Hyperlink" select="@name"/>
+            <xsl:for-each select="event[@error-level='4']">
+             <A class="note"><xsl:attribute name="HREF"><xsl:value-of select="$Hyperlink"/></xsl:attribute><xsl:value-of select="@description"/></A>
+                </xsl:for-each>
+            </xsl:for-each>
+        </xsl:if>
+        </h2>
+
+        <table cellpadding="2" cellspacing="0" width="98%" border="1" bordercolor="white" class="infotable">
+            <tr>
+                <td nowrap="1" class="header" _locID="Filename">ファイル名</td>
+                <td nowrap="1" class="header" _locID="Status">状態</td>
+                <td nowrap="1" class="header" _locID="Errors">エラー</td>
+                <td nowrap="1" class="header" _locID="Warnings">警告</td>
+            </tr>
+
+            <xsl:for-each select="source">
+                <xsl:sort select="@name" order="ascending"/>
+                <xsl:variable name="source-id" select="generate-id(.)"/>
+
+                <xsl:if test="count(event)!=count(event[@error-level='4'])">
+
+                <tr class="row">
+                    <td class="content">
+                        <A HREF="javascript:"><xsl:attribute name="onClick">javascript:document.images['<xsl:value-of select="$source-id"/>'].click()</xsl:attribute><IMG border="0" _locID="IMG.alt" _locAttrData="alt" alt="セクションの展開/折りたたみ" class="expandable" height="11" onclick="changepic()" src="_UpgradeReport_Files/UpgradeReport_Plus.gif" width="9"><xsl:attribute name="name"><xsl:value-of select="$source-id"/></xsl:attribute><xsl:attribute name="child">src<xsl:value-of select="$source-id"/></xsl:attribute></IMG></A> <xsl:value-of select="@name"/> 
+                    </td>
+                    <td class="content">
+                        <xsl:if test="count(event[@error-level='3'])=1">
+                            <xsl:for-each select="event[@error-level='3']">
+                            <xsl:if test="@description='Converted'"><a _locID="Converted1">変換済み</a></xsl:if>
+                            <xsl:if test="@description!='Converted'"><xsl:value-of select="@description"/></xsl:if>
+                            </xsl:for-each>
+                        </xsl:if>
+                        <xsl:if test="count(event[@error-level='3'])!=1 and count(event[@error-level='3' and @description='Converted'])!=0"><a _locID="Converted2">変換済み</a>
+                        </xsl:if>
+                    </td>
+                    <td class="content"><xsl:value-of select="count(event[@error-level='2'])"/></td>
+                    <td class="content"><xsl:value-of select="count(event[@error-level='1'])"/></td>
+                </tr>
+
+                <tr class="collapsed" bgcolor="#ffffff">
+                    <xsl:attribute name="id">src<xsl:value-of select="$source-id"/></xsl:attribute>
+
+                    <td colspan="7">
+                        <table width="97%" border="1" bordercolor="#dcdcdc" rules="cols" class="issuetable">
+                            <tr>
+                                <td colspan="7" class="issuetitle" _locID="ConversionIssues">変換レポート - <xsl:value-of select="@name"/>:</td>
+                            </tr>
+
+                            <xsl:for-each select="event[@error-level!='3']">
+                                <xsl:if test="@error-level!='4'">
+                                <tr>
+                                    <td class="issuenone" style="border-bottom:solid 1 lightgray">
+                                        <xsl:value-of select="@description"/>
+                                    </td>
+                                </tr>
+                                </xsl:if>
+                            </xsl:for-each>
+                        </table>
+                    </td>
+                </tr>
+                </xsl:if>
+            </xsl:for-each>
+
+            <tr valign="top">
+                <td class="foot">
+                    <xsl:if test="count(source)!=1">
+                        <xsl:value-of select="count(source)"/><a _locID="file1"> ファイル</a>
+                    </xsl:if>
+                    <xsl:if test="count(source)=1">
+                        <a _locID="file2">1 ファイル</a>
+                    </xsl:if>
+                </td>
+                <td class="foot">
+					<a _locID="Converted3">変換済み</a>: <xsl:value-of select="count(source/event[@error-level='3' and @description='Converted'])"/><BR/>
+					<a _locID="NotConverted">変換されませんでした。</a>: <xsl:value-of select="count(source) - count(source/event[@error-level='3' and @description='Converted'])"/>
+                </td>
+                <td class="foot"><xsl:value-of select="count(source/event[@error-level='2'])"/></td>
+                <td class="foot"><xsl:value-of select="count(source/event[@error-level='1'])"/></td>
+            </tr>
+        </table>
+    </xsl:for-each>
+    </xsl:template>
+
+    <xsl:template match="Property">
+        <xsl:if test="@Name!='Date' and @Name!='Time' and @Name!='LogNumber' and @Name!='Solution'">
+        <tr><td nowrap="1"><b><xsl:value-of select="@Name"/>: </b><xsl:value-of select="@Value"/></td></tr>
+        </xsl:if>
+    </xsl:template>
+
+    <xsl:template match="UpgradeLog">
+        <html>
+            <head>
+                <META HTTP-EQUIV="Content-Type" content="text/html; charset=utf-8"/>
+                <link rel="stylesheet" href="_UpgradeReport_Files\UpgradeReport.css"/>
+                <title _locID="ConversionReport0">変換レポート 
+                    <xsl:if test="Properties/Property[@Name='LogNumber']">
+                        <xsl:value-of select="Properties/Property[@Name='LogNumber']/@Value"/>
+                    </xsl:if>
+                </title>
+                <script language="javascript">
+                    function outliner () {
+                        oMe = window.event.srcElement
+                        //get child element
+                        var child = document.all[event.srcElement.getAttribute("child",false)];
+                        //if child element exists, expand or collapse it.
+                        if (null != child)
+                            child.className = child.className == "collapsed" ? "expanded" : "collapsed";
+                    }
+
+                    function changepic() {
+                        uMe = window.event.srcElement;
+                        var check = uMe.src.toLowerCase();
+                        if (check.lastIndexOf("upgradereport_plus.gif") != -1)
+                        {
+                            uMe.src = "_UpgradeReport_Files/UpgradeReport_Minus.gif"
+                        }
+                        else
+                        {
+                            uMe.src = "_UpgradeReport_Files/UpgradeReport_Plus.gif"
+                        }
+                    }
+                </script>
+            </head>
+            <body topmargin="0" leftmargin="0" rightmargin="0" onclick="outliner();">
+                <h1 _locID="ConversionReport">変換レポート - <xsl:value-of select="Properties/Property[@Name='Solution']/@Value"/></h1>
+
+                <p><span class="note">
+                <b _locID="TimeOfConversion">変換時間:</b>  <xsl:value-of select="Properties/Property[@Name='Date']/@Value"/>  <xsl:value-of select="Properties/Property[@Name='Time']/@Value"/><br/>
+                </span></p>
+
+                <xsl:variable name="SortedEvents">
+                    <Events>
+                        <xsl:for-each select="Event">
+                            <xsl:sort select="@Project" order="ascending"/>
+                            <xsl:sort select="@Source" order="ascending"/>
+                            <xsl:sort select="@ErrorLevel" order="ascending"/>
+                            <Event>
+                                <xsl:attribute name="Project"><xsl:value-of select="@Project"/> </xsl:attribute> 
+                                <xsl:attribute name="Solution"><xsl:value-of select="/UpgradeLog/Properties/Property[@Name='Solution']/@Value"/> </xsl:attribute> 
+                                <xsl:attribute name="Source"><xsl:value-of select="@Source"/> </xsl:attribute> 
+                                <xsl:attribute name="ErrorLevel"><xsl:value-of select="@ErrorLevel"/> </xsl:attribute> 
+                                <xsl:attribute name="Description"><xsl:value-of select="@Description"/> </xsl:attribute> 
+                            </Event>
+                        </xsl:for-each>     
+                    </Events>
+                </xsl:variable>
+                
+                <xsl:variable name="Projects">
+                    <xsl:apply-templates select="msxsl:node-set($SortedEvents)/*" mode="createProjects"/>
+                </xsl:variable>
+
+                <xsl:apply-templates select="msxsl:node-set($Projects)/*"/>
+
+                <p></p><p>
+                <table class="note">
+                    <tr>
+                        <td nowrap="1">
+                            <b _locID="ConversionSettings">変換の設定</b>
+                        </td>
+                    </tr>
+                    <xsl:apply-templates select="Properties"/>
+                </table></p>
+            </body>
+        </html>
+    </xsl:template>
+</xsl:stylesheet>
diff --git a/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Minus.gif b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Minus.gif
new file mode 100644
index 0000000..17751cb
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Minus.gif differ
diff --git a/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Plus.gif b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Plus.gif
new file mode 100644
index 0000000..f6009ca
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/_UpgradeReport_Files/UpgradeReport_Plus.gif differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.ncb b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.ncb
new file mode 100644
index 0000000..c3df735
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.ncb differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.opensdf b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.opensdf
new file mode 100644
index 0000000..cdfe0d5
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.opensdf differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sdf b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sdf
new file mode 100644
index 0000000..c3d9657
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sdf differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln
new file mode 100644
index 0000000..520f84d
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln
@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Visual C++ Express 2010
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "bsr_trunk", "bsr_trunk.vcxproj", "{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Win32 = Debug|Win32
+		Release|Win32 = Release|Win32
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.ActiveCfg = Debug|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.Build.0 = Debug|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.ActiveCfg = Release|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.Build.0 = Release|Win32
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln.old b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln.old
new file mode 100644
index 0000000..2881d87
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.sln.old
@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 10.00
+# Visual C++ Express 2008
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "bsr_trunk", "bsr_trunk.vcproj", "{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Win32 = Debug|Win32
+		Release|Win32 = Release|Win32
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.ActiveCfg = Debug|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.Build.0 = Debug|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.ActiveCfg = Release|Win32
+		{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.Build.0 = Release|Win32
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo
new file mode 100644
index 0000000..3b84754
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo.old b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo.old
new file mode 100644
index 0000000..63c7d49
Binary files /dev/null and b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.suo.old differ
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj
new file mode 100644
index 0000000..1a6531b
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj
@@ -0,0 +1,594 @@
+<?xml version="1.0" encoding="shift_jis"?>
+<VisualStudioProject
+	ProjectType="Visual C++"
+	Version="9.00"
+	Name="bsr_trunk"
+	ProjectGUID="{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}"
+	RootNamespace="bsr_trunk"
+	TargetFrameworkVersion="196613"
+	>
+	<Platforms>
+		<Platform
+			Name="Win32"
+		/>
+	</Platforms>
+	<ToolFiles>
+	</ToolFiles>
+	<Configurations>
+		<Configuration
+			Name="Debug|Win32"
+			OutputDirectory="$(SolutionDir)$(ConfigurationName)"
+			IntermediateDirectory="$(ConfigurationName)"
+			ConfigurationType="0"
+			CharacterSet="2"
+			>
+			<Tool
+				Name="VCNMakeTool"
+				BuildCommandLine="nmake -f yav_mcu_bsr.mak"
+				ReBuildCommandLine=""
+				CleanCommandLine=""
+				Output=""
+				PreprocessorDefinitions=""
+				IncludeSearchPath=""
+				ForcedIncludes=""
+				AssemblySearchPath=""
+				ForcedUsingAssemblies=""
+				CompileAsManaged=""
+			/>
+		</Configuration>
+		<Configuration
+			Name="Release|Win32"
+			OutputDirectory="$(SolutionDir)$(ConfigurationName)"
+			IntermediateDirectory="$(ConfigurationName)"
+			ConfigurationType="1"
+			CharacterSet="2"
+			WholeProgramOptimization="1"
+			>
+			<Tool
+				Name="VCPreBuildEventTool"
+			/>
+			<Tool
+				Name="VCCustomBuildTool"
+			/>
+			<Tool
+				Name="VCXMLDataGeneratorTool"
+			/>
+			<Tool
+				Name="VCWebServiceProxyGeneratorTool"
+			/>
+			<Tool
+				Name="VCMIDLTool"
+			/>
+			<Tool
+				Name="VCCLCompilerTool"
+				Optimization="2"
+				EnableIntrinsicFunctions="true"
+				RuntimeLibrary="2"
+				EnableFunctionLevelLinking="true"
+				WarningLevel="3"
+				DebugInformationFormat="3"
+			/>
+			<Tool
+				Name="VCManagedResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCPreLinkEventTool"
+			/>
+			<Tool
+				Name="VCLinkerTool"
+				GenerateDebugInformation="true"
+				OptimizeReferences="2"
+				EnableCOMDATFolding="2"
+				TargetMachine="1"
+			/>
+			<Tool
+				Name="VCALinkTool"
+			/>
+			<Tool
+				Name="VCManifestTool"
+			/>
+			<Tool
+				Name="VCXDCMakeTool"
+			/>
+			<Tool
+				Name="VCBscMakeTool"
+			/>
+			<Tool
+				Name="VCFxCopTool"
+			/>
+			<Tool
+				Name="VCAppVerifierTool"
+			/>
+			<Tool
+				Name="VCPostBuildEventTool"
+			/>
+		</Configuration>
+	</Configurations>
+	<References>
+	</References>
+	<Files>
+		<Filter
+			Name="�\�[�X �t�@�C��"
+			Filter="cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx"
+			UniqueIdentifier="{4FC737F1-C7A5-4376-A066-2A32D752A2FF}"
+			>
+			<File
+				RelativePath="..\accero.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\adc.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_ctr.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_mcu.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_twl.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\ini_VECT.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\led.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\loader.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\magic.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\main.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pedo_alg_thre_det2.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pm.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\reboot.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\rtc.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\self_flash.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\sw.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\task_debug.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\task_misc.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\task_status.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\task_sys.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\vreg_ctr.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\vreg_twl.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\WDT.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+		</Filter>
+		<Filter
+			Name="�w�b�_�[ �t�@�C��"
+			Filter="h;hpp;hxx;hm;inl;inc;xsd"
+			UniqueIdentifier="{93995380-89BD-4b04-88EB-625FBE52EBFB}"
+			>
+			<File
+				RelativePath="..\accero.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\adc.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\batt_params.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\bsr_system.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\config.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\fsl.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\fsl_user.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_ctr.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_mcu.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_twl.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\i2c_twl_defs.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\incs.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\incs_loader.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\jhl_defs.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\led.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\loader.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pedo_lpf_coeff.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pedometer.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pm.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\pool.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\reboot.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\rtc.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\self_flash.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\sw.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\user_define.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\vreg_ctr.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\vreg_twl.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\WDT.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+		</Filter>
+		<Filter
+			Name="���\�[�X �t�@�C��"
+			Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav"
+			UniqueIdentifier="{67DA6AB6-F800-4c08-8B7A-83BB121AAD01}"
+			>
+		</Filter>
+		<Filter
+			Name="renge"
+			>
+			<File
+				RelativePath="..\renge\renge.c"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\renge\renge.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\renge\renge_defs.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\renge\renge_task_immediate.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+			<File
+				RelativePath="..\renge\renge_task_intval.h"
+				>
+				<FileConfiguration
+					Name="Debug|Win32"
+					>
+				</FileConfiguration>
+			</File>
+		</Filter>
+		<File
+			RelativePath="..\bsr_mcu.dr"
+			>
+			<FileConfiguration
+				Name="Debug|Win32"
+				>
+			</FileConfiguration>
+		</File>
+	</Files>
+	<Globals>
+	</Globals>
+</VisualStudioProject>
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj.NCL.N2232.user b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj.NCL.N2232.user
new file mode 100644
index 0000000..257e4e7
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcproj.NCL.N2232.user
@@ -0,0 +1,65 @@
+<?xml version="1.0" encoding="shift_jis"?>
+<VisualStudioUserFile
+	ProjectType="Visual C++"
+	Version="9.00"
+	ShowAllFiles="false"
+	>
+	<Configurations>
+		<Configuration
+			Name="Debug|Win32"
+			>
+			<DebugSettings
+				Command="$(TargetPath)"
+				WorkingDirectory="C:\78k_data\yav-mcu-basara\trunk"
+				CommandArguments=""
+				Attach="false"
+				DebuggerType="3"
+				Remote="1"
+				RemoteMachine="REDPC2232"
+				RemoteCommand=""
+				HttpUrl=""
+				PDBPath=""
+				SQLDebugging=""
+				Environment=""
+				EnvironmentMerge="true"
+				DebuggerFlavor="0"
+				MPIRunCommand=""
+				MPIRunArguments=""
+				MPIRunWorkingDirectory=""
+				ApplicationCommand=""
+				ApplicationArguments=""
+				ShimCommand=""
+				MPIAcceptMode=""
+				MPIAcceptFilter=""
+			/>
+		</Configuration>
+		<Configuration
+			Name="Release|Win32"
+			>
+			<DebugSettings
+				Command="$(TargetPath)"
+				WorkingDirectory=""
+				CommandArguments=""
+				Attach="false"
+				DebuggerType="3"
+				Remote="1"
+				RemoteMachine="REDPC2232"
+				RemoteCommand=""
+				HttpUrl=""
+				PDBPath=""
+				SQLDebugging=""
+				Environment=""
+				EnvironmentMerge="true"
+				DebuggerFlavor=""
+				MPIRunCommand=""
+				MPIRunArguments=""
+				MPIRunWorkingDirectory=""
+				ApplicationCommand=""
+				ApplicationArguments=""
+				ShimCommand=""
+				MPIAcceptMode=""
+				MPIAcceptFilter=""
+			/>
+		</Configuration>
+	</Configurations>
+</VisualStudioUserFile>
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj
new file mode 100644
index 0000000..506aae7
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj
@@ -0,0 +1,151 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|Win32">
+      <Configuration>Debug</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|Win32">
+      <Configuration>Release</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}</ProjectGuid>
+    <RootNamespace>bsr_trunk</RootNamespace>
+    <ProjectName>sim</ProjectName>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <CharacterSet>MultiByte</CharacterSet>
+    <WholeProgramOptimization>true</WholeProgramOptimization>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <CharacterSet>MultiByte</CharacterSet>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+  </ImportGroup>
+  <ImportGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+  </ImportGroup>
+  <ImportGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <_ProjectFileVersion>10.0.30319.1</_ProjectFileVersion>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)$(Configuration)\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(Configuration)\</IntDir>
+    <NMakeBuildCommandLine Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">nmake -f yav_mcu_bsr.mak</NMakeBuildCommandLine>
+    <NMakeReBuildCommandLine Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" />
+    <NMakeCleanCommandLine Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" />
+    <NMakeOutput Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" />
+    <NMakePreprocessorDefinitions Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(NMakePreprocessorDefinitions)</NMakePreprocessorDefinitions>
+    <NMakeIncludeSearchPath Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(NMakeIncludeSearchPath)</NMakeIncludeSearchPath>
+    <NMakeForcedIncludes Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(NMakeForcedIncludes)</NMakeForcedIncludes>
+    <NMakeAssemblySearchPath Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(NMakeAssemblySearchPath)</NMakeAssemblySearchPath>
+    <NMakeForcedUsingAssemblies Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(NMakeForcedUsingAssemblies)</NMakeForcedUsingAssemblies>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)$(Configuration)\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(Configuration)\</IntDir>
+    <IncludePath Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r;$(IncludePath)</IncludePath>
+  </PropertyGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
+    <ClCompile>
+      <Optimization>MaxSpeed</Optimization>
+      <IntrinsicFunctions>true</IntrinsicFunctions>
+      <RuntimeLibrary>MultiThreadedDLL</RuntimeLibrary>
+      <FunctionLevelLinking>true</FunctionLevelLinking>
+      <WarningLevel>Level3</WarningLevel>
+      <DebugInformationFormat>ProgramDatabase</DebugInformationFormat>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <OptimizeReferences>true</OptimizeReferences>
+      <EnableCOMDATFolding>true</EnableCOMDATFolding>
+      <TargetMachine>MachineX86</TargetMachine>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
+    <ClCompile>
+      <Optimization>Disabled</Optimization>
+      <DebugInformationFormat>OldStyle</DebugInformationFormat>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemGroup>
+    <ClCompile Include="..\accero.c" />
+    <ClCompile Include="..\adc.c" />
+    <ClCompile Include="..\hal.c" />
+    <ClCompile Include="..\i2c_ctr.c" />
+    <ClCompile Include="..\i2c_mcu.c" />
+    <ClCompile Include="..\i2c_twl.c" />
+    <ClCompile Include="..\ini_VECT.c" />
+    <ClCompile Include="..\led.c" />
+    <ClCompile Include="..\led_cam.c" />
+    <ClCompile Include="..\led_pow.c" />
+    <ClCompile Include="..\loader.c" />
+    <ClCompile Include="..\magic.c" />
+    <ClCompile Include="..\main.c" />
+    <ClCompile Include="..\pedo_alg_thre_det2.c" />
+    <ClCompile Include="..\pm.c" />
+    <ClCompile Include="..\rtc.c" />
+    <ClCompile Include="..\self_flash.c" />
+    <ClCompile Include="..\sim\simFixture.c" />
+    <ClCompile Include="..\sw.c" />
+    <ClCompile Include="..\task_debug.c" />
+    <ClCompile Include="..\task_misc.c" />
+    <ClCompile Include="..\task_status.c" />
+    <ClCompile Include="..\task_sys.c" />
+    <ClCompile Include="..\vreg_ctr.c" />
+    <ClCompile Include="..\vreg_twl.c" />
+    <ClCompile Include="..\WDT.c" />
+    <ClCompile Include="..\renge\renge.c" />
+  </ItemGroup>
+  <ItemGroup>
+    <ClInclude Include="..\accero.h" />
+    <ClInclude Include="..\adc.h" />
+    <ClInclude Include="..\batt_params.h" />
+    <ClInclude Include="..\bsr_system.h" />
+    <ClInclude Include="..\config.h" />
+    <ClInclude Include="..\fsl.h" />
+    <ClInclude Include="..\fsl_user.h" />
+    <ClInclude Include="..\hal.h" />
+    <ClInclude Include="..\i2c_ctr.h" />
+    <ClInclude Include="..\i2c_mcu.h" />
+    <ClInclude Include="..\i2c_twl.h" />
+    <ClInclude Include="..\i2c_twl_defs.h" />
+    <ClInclude Include="..\incs.h" />
+    <ClInclude Include="..\incs_loader.h" />
+    <ClInclude Include="..\jhl_defs.h" />
+    <ClInclude Include="..\led.h" />
+    <ClInclude Include="..\loader.h" />
+    <ClInclude Include="..\pedo_lpf_coeff.h" />
+    <ClInclude Include="..\pedometer.h" />
+    <ClInclude Include="..\pm.h" />
+    <ClInclude Include="..\pool.h" />
+    <ClInclude Include="..\reboot.h" />
+    <ClInclude Include="..\rtc.h" />
+    <ClInclude Include="..\self_flash.h" />
+    <ClInclude Include="..\sim\sfrAlias.h" />
+    <ClInclude Include="..\sw.h" />
+    <ClInclude Include="..\user_define.h" />
+    <ClInclude Include="..\vreg_ctr.h" />
+    <ClInclude Include="..\vreg_twl.h" />
+    <ClInclude Include="..\WDT.h" />
+    <ClInclude Include="..\renge\renge.h" />
+    <ClInclude Include="..\renge\renge_defs.h" />
+    <ClInclude Include="..\renge\renge_task_immediate.h" />
+    <ClInclude Include="..\renge\renge_task_intval.h" />
+  </ItemGroup>
+  <ItemGroup>
+    <None Include="..\bsr_mcu.dr" />
+  </ItemGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
+  <ImportGroup Label="ExtensionTargets">
+  </ImportGroup>
+</Project>
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.filters b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.filters
new file mode 100644
index 0000000..af77d25
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.filters
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup>
+    <Filter Include="ソース ファイル">
+      <UniqueIdentifier>{4FC737F1-C7A5-4376-A066-2A32D752A2FF}</UniqueIdentifier>
+      <Extensions>cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx</Extensions>
+    </Filter>
+    <Filter Include="ヘッダー ファイル">
+      <UniqueIdentifier>{93995380-89BD-4b04-88EB-625FBE52EBFB}</UniqueIdentifier>
+      <Extensions>h;hpp;hxx;hm;inl;inc;xsd</Extensions>
+    </Filter>
+    <Filter Include="リソース ファイル">
+      <UniqueIdentifier>{67DA6AB6-F800-4c08-8B7A-83BB121AAD01}</UniqueIdentifier>
+      <Extensions>rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav</Extensions>
+    </Filter>
+    <Filter Include="ソース ファイル\renge">
+      <UniqueIdentifier>{4e2142a2-478d-4e47-ab3f-7ae7d1e531bd}</UniqueIdentifier>
+    </Filter>
+  </ItemGroup>
+  <ItemGroup>
+    <ClCompile Include="..\accero.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\adc.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\i2c_ctr.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\i2c_mcu.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\i2c_twl.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\ini_VECT.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\led.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\loader.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\magic.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\main.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\pedo_alg_thre_det2.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\pm.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\rtc.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\self_flash.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\sw.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\task_debug.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\task_misc.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\task_status.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\task_sys.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\vreg_ctr.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\vreg_twl.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\WDT.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\renge\renge.c">
+      <Filter>ソース ファイル\renge</Filter>
+    </ClCompile>
+    <ClCompile Include="..\led_pow.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\led_cam.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\sim\simFixture.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+    <ClCompile Include="..\hal.c">
+      <Filter>ソース ファイル</Filter>
+    </ClCompile>
+  </ItemGroup>
+  <ItemGroup>
+    <ClInclude Include="..\accero.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\adc.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\batt_params.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bsr_system.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\config.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\fsl.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\fsl_user.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\i2c_ctr.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\i2c_mcu.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\i2c_twl.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\i2c_twl_defs.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\incs.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\incs_loader.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\jhl_defs.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\led.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\loader.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\pedo_lpf_coeff.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\pedometer.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\pm.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\pool.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\reboot.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\rtc.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\self_flash.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\sw.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\user_define.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\vreg_ctr.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\vreg_twl.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\WDT.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\renge\renge_task_immediate.h">
+      <Filter>ソース ファイル\renge</Filter>
+    </ClInclude>
+    <ClInclude Include="..\renge\renge_task_intval.h">
+      <Filter>ソース ファイル\renge</Filter>
+    </ClInclude>
+    <ClInclude Include="..\renge\renge_defs.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\renge\renge.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\sim\sfrAlias.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+    <ClInclude Include="..\hal.h">
+      <Filter>ヘッダー ファイル</Filter>
+    </ClInclude>
+  </ItemGroup>
+  <ItemGroup>
+    <None Include="..\bsr_mcu.dr" />
+  </ItemGroup>
+</Project>
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.user b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.user
new file mode 100644
index 0000000..695b5c7
--- /dev/null
+++ b/tags/SDK3.0(2.00)/VCProj/bsr_trunk.vcxproj.user
@@ -0,0 +1,3 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+</Project>
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/WDT.c b/tags/SDK3.0(2.00)/WDT.c
new file mode 100644
index 0000000..dd9a332
--- /dev/null
+++ b/tags/SDK3.0(2.00)/WDT.c
@@ -0,0 +1 @@
+#include "incs_loader.h"
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/WDT.h b/tags/SDK3.0(2.00)/WDT.h
new file mode 100644
index 0000000..2e28e9d
--- /dev/null
+++ b/tags/SDK3.0(2.00)/WDT.h
@@ -0,0 +1,20 @@
+#ifndef _WDT_
+#define _WDT_
+
+
+
+//=========================================================
+#define WDT_RESTART_MAGIC    0xAC
+
+
+
+//=========================================================
+// �E�H�b�`�h�b�O�^�C�}�̃��X�^�[�g
+// void WDT_Restart( void );
+#define WDT_Restart()        WDTE = WDT_RESTART_MAGIC
+
+// �K��l�ȊO�������Ɨ�O�Ń��Z�b�g��������
+#define mcu_wdt_reset        WDTE = 0x0
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/accero.c b/tags/SDK3.0(2.00)/accero.c
new file mode 100644
index 0000000..dc52759
--- /dev/null
+++ b/tags/SDK3.0(2.00)/accero.c
@@ -0,0 +1,261 @@
+/* ========================================================
+�@�����x�Z���T�֌W
+�E�f�[�^�X�V�����Ńf�[�^���z���グ�背�W�X�^���X�V�ACPU�Ɋ��荞��
+�E�t���O�������Ă���Ε����J�E���g
+�E�����x�Z���T���荞�݂���^�X�N��o�^���ĉ������B�iI2C�̋�������Ȃǂ�����̂Łj
+
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+#pragma ROT
+// rorb, rolb, rorw, rolw
+#pragma MUL
+#pragma BCD
+
+#endif
+
+#include "config.h"
+#ifndef _WIN32
+
+#pragma interrupt INTP23	intp23_ACC_ready RB3       // �����x�Z���T�A�f�[�^��������
+
+#endif
+
+
+#include "incs.h"
+
+#ifndef _WIN32
+#include <math.h>
+#endif
+// ========================================================
+// ���W�X�^��
+#define ACC_REG_WHOAMI 0x0F
+#define ACC_REG_CTRL1  0x20
+#define ACC_REG_CTRL5  0x24
+#define ACC_REG_X      0x28
+
+// �r�b�g�ʒu
+#define ACC_bP_PM0    5
+#define ACC_bP_DR0    3
+
+// �r�b�g�ݒ�l
+#define ACC_BITS_PM_PDN   0
+#define ACC_BITS_PM_NORM  1
+#define ACC_BITS_PM_LP0R5 2
+#define ACC_BITS_PM_LP1   3
+#define ACC_BITS_PM_LP2   4
+#define ACC_BITS_PM_LP5   5
+#define ACC_BITS_PM_LP10  6
+
+#define ACC_BITS_DR_50Hz   0
+#define ACC_BITS_DR_100Hz  1
+#define ACC_BITS_DR_400Hz  2
+#define ACC_BITS_DR_1000Hz 3
+
+#define ACC_BITS_ALL_AXIS_ON 7
+
+
+#define VREG_BITMASK_ACC_CONF_ACQ  ( 1 << 0 )
+#define VREG_BITMASK_ACC_CONF_HOSU ( 1 << 1 )
+
+
+
+
+// ========================================================
+task_status tsk_soft_int(  );
+
+
+
+/* ========================================================
+�@�E���荞�݂��m�F���ăf�[�^���z���グ�A���W�X�^�ɏ����o���܂�
+  �E�{���ł���΃R�[���o�b�N�֐���o�^���Ă����΂��������ƂȂ�̂ł����A
+  I2C���g�p����������H�Ƃ��l����Ǝ��ł͂����܂łł��Ȃ��̂ł��B
+  �E���������v�Ƃ��ł�����
+ ======================================================== */
+task_status_immed tski_cbk_accero(  )
+{                               // �i�^���jisr����o�^����܂�
+    static u8 err_count;
+	u8 acc_dat_buff[6];
+
+    // �����x�Z���T�f�[�^���W�X�^�ւ̔��f
+    if( iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, acc_dat_buff )
+        != ERR_SUCCESS )
+    {
+        err_count ++;
+        if( err_count < 8 )
+        {
+            // ���g���C
+            return( ERR_CONTINUE );
+        }
+        else
+        {
+            // �����x�Z���T���ُ�ɂȂ����̂Ŏ~�߂�
+            vreg_ctr[ VREG_C_ACC_CONFIG ] &= ~( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ );
+            tski_acc_hosu_set();
+            vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR;
+            return ( ERR_FINISED ); // �^�X�N�̍폜�͕K�v
+        }
+    }
+    else
+    {
+		memcpy( &vreg_ctr[VREG_C_ACC_XL], acc_dat_buff, 6 );
+
+        err_count = 0;
+        // ���펞�p�X //
+        // �����x�X�V�����荞��
+        if( (( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_ACQ ) != 0 ) &&
+            ( system_status.pwr_state == ON )
+            )
+            {
+                set_irq( VREG_C_IRQ1, REG_BIT_ACC_DAT_RDY );
+            // �S�~�f�[�^�̃J���ǂ�
+            if( ACC_VALID )
+            {
+                u8 temp[6];
+                iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, temp );
+            }
+        }
+        if(( system_status.pwr_state != ON_CHECK )
+            &&( system_status.pwr_state != OFF )
+#ifndef _DBG_PEDO_AUTO_ENABLE_
+            &&( ( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_HOSU ) != 0 )
+#endif
+            )
+        {
+            pedometer();    // �����v
+        }
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+
+
+/*=======================================================
+�@�����x�Z���T���߃A�N�Z�X�@���[�h
+ ========================================================*/
+task_status_immed tski_acc_read(  )
+{
+    vreg_ctr[VREG_C_ACC_W_BUF] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
+//  vreg_ctr[ VREG_C_ACC_R_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
+    vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK;
+    if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 )
+    {
+        IRQ0_ast;
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+/*=========================================================
+�@�����x�Z���T���߃A�N�Z�X�@���C�g
+ ========================================================*/
+task_status_immed tski_acc_write(  )
+{
+    iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] );
+    vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK;
+    if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 )
+    {
+        IRQ0_ast;
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+/*=========================================================
+�@�����x�Z���T�̐ݒ�
+ ========================================================*/
+task_status_immed tski_acc_hosu_set(  )
+{
+    u8      str_send_buf[4];
+
+    iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI );
+    if( iic_mcu_result == ERR_NOSLAVE )
+    {
+        vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR;
+        return ( ERR_FINISED ); // �Ƃ肠�����A�^�X�N�͍폜���Ȃ��Ă͂Ȃ�Ȃ�
+    }else{
+        vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_ACCERO_ERR;
+    }
+    
+    str_send_buf[1] = 0x00;     // ctrl2  HPF:normal, filterd, HPF for IRQ : dis/dis, HPF coeff:norm
+/*
+if( system_status.model == MODEL_TS_BOARD )
+    {
+        // TS Final SoC
+        str_send_buf[2] = 0x02;     //     3  IRQ pol :Active HI, Drive:Pushpull,
+    }
+    else
+    {
+        // ���@���h����A����
+        str_send_buf[2] = 0x10;     //     3  IRQ pol :Active HI, Drive:Pushpull,
+    }
+*/
+	if( system_status.model == MODEL_TS_BOARD )
+	{
+		str_send_buf[2] = bits8(0,0,0,0, 0,0,1,0);	// �s���s���̂��߁A�����ƕ�����
+	}
+	else
+	{
+		str_send_buf[2] = bits8(0,0,0,1, 0,0,0,0);
+	}
+	str_send_buf[3] = 0x80;         // ctrl3  block update:enable, MSB first, scale: +-2G(default), selftest: dis
+
+    if( ( vreg_ctr[VREG_C_ACC_CONFIG] &
+          ( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ ) ) == 0 )
+    {
+        PMK23 = 1;
+        // ���S��~
+        str_send_buf[0] =
+            ( ACC_BITS_PM_PDN << ACC_bP_PM0 | 0 << ACC_bP_DR0 | ACC_BITS_ALL_AXIS_ON );
+    }
+    else
+    {
+	    PMK23 = 0;
+        // 100Hz ������荞��
+        str_send_buf[0] =
+            ( ACC_BITS_PM_NORM << ACC_bP_PM0
+              | ACC_BITS_DR_100Hz << ACC_bP_DR0
+              | ACC_BITS_ALL_AXIS_ON );
+    }
+    iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | 0x80 ), 4, str_send_buf );
+
+    // �J���ǂ�
+    if( ACC_VALID )
+    {
+        if( system_status.pwr_state == ON )
+        {
+            u8 temp[6];
+            iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, temp );
+        }
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+/* ========================================================
+ �����x�Z���T���荞��
+  I2C���g�p����������Ȃ��̂ŁA�ǂݏo���^�X�N�̓o�^���s���̂�
+ ======================================================== */
+__interrupt void intp23_ACC_ready(  )
+{
+    EI();
+    if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 0x03 ) != 0x00 )
+    {
+        if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) )
+        {
+            if( ACC_VALID )
+            {
+                renge_task_immed_add( tski_cbk_accero );
+            }
+        }
+    }
+}
diff --git a/tags/SDK3.0(2.00)/accero.h b/tags/SDK3.0(2.00)/accero.h
new file mode 100644
index 0000000..20494b9
--- /dev/null
+++ b/tags/SDK3.0(2.00)/accero.h
@@ -0,0 +1,14 @@
+#ifndef _accero_
+#define _accero_
+
+
+#include "jhl_defs.h"
+#include "pedometer.h"
+
+
+///////////////////////////////////////////////////////////
+task_status_immed tski_cbk_accero(  );
+task_status_immed tski_acc_hosu_set(  );
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/adc.c b/tags/SDK3.0(2.00)/adc.c
new file mode 100644
index 0000000..20769fa
--- /dev/null
+++ b/tags/SDK3.0(2.00)/adc.c
@@ -0,0 +1,515 @@
+/* ========================================================
+    ���c���J�Z
+    nintendo
+    '09 Apr
+ ======================================================== */
+#include "incs.h"
+#include "adc.h"
+#include "pm.h"
+
+#include "led.h"
+
+#include "vreg_twl.h"
+
+#define _10db_
+#include "voltable.h"
+
+
+// ===================================================== //
+bit     adc_updated;
+bit     vol_changed_by_ctr;
+bit     vol_changed_by_twl;
+u8      vol_old;
+
+
+u8 adc_raw_vol;
+u8 adc_raw_dep;
+
+u8 vol_polling;
+
+u8 vol_level_twl;
+
+
+typedef struct filter_work
+{
+    u8* value_used;
+    s8 diffs;                   // KIKAN���̕΂�
+    s8 kikan;
+    u8 large_diff_count;
+}filter_work;
+
+
+filter_work work_vr_3d = {
+    &vreg_ctr[ VREG_C_3D ]
+    };
+
+
+u8 vol_data_ctr;
+u8 vol_data_ctr_tmp;
+filter_work work_vr_vol = {
+    &vol_data_ctr_tmp
+    };
+
+
+// twl ��8�i�Kvol�̃��j�A�l����̋��E
+/*
+    twl����32 -> 8 �e�[�u��
+    0�`1,�`4,�`8,�`13,�`18,�`23,�`28,31
+ */
+const u8 TWL_VOL_BOUNDARY[] = {
+    1, 4, 8, 13, 18, 23, 28, 31
+};
+
+// ===================================================== //
+extern void nop8();
+static void adc_filter( u8 new_val, filter_work* work );
+static u8 adc_scaling( u8 );
+static void update_twl_vol( u8 sent_index );
+
+
+
+// ===================================================== //
+#define INTERVAL_TSK_ADC  15
+
+
+
+/* ========================================================
+ ADC�ݒ�ƁA�J�n
+
+  �ȉ��̃s���͎�ɂ����ő���E�Ď�����܂��B
+ �EBT_TEMP,_P
+ �EADIN1
+ �EVOL
+
+  �֌W���肻���ł����ʂ̂Ƃ���ŊǗ����Ă��܂�
+ �EPM_BT_DET,_P		BT_chk
+ ======================================================== */
+void tsk_adc(  )
+{
+    if( adc_updated )
+    {
+        adc_updated = false;
+
+        // 3D /////////////////////////////////////////
+        vreg_ctr[ VREG_C_3D ] = adc_raw_dep;         // ���l
+
+        // Volume /////////////////////////////////////
+        {
+            vreg_ctr[ VREG_C_VOL_ADC_RAW ] = adc_raw_vol;
+
+            adc_filter( adc_scaling( adc_raw_vol ), &work_vr_vol );  // ���ʂ�*work_vr_vol����w�����vol_data_ctr �ǂ݂ɂ���...
+            vol_data_ctr = vol_data_ctr_tmp / 4;
+
+            if( vol_old != vol_data_ctr )
+            {
+                vol_changed_by_ctr = true;
+                vol_old = vol_data_ctr;
+                vol_polling = 3;
+//                renge_task_immed_add( tski_vol_update );             ���œo�^
+            }
+        }
+
+        // �o�b�e������ ///////////////////////////
+        /* �Ă΂�܂��� */
+    }
+
+    // �����Y�ꂪ����Ƃ���Ȃ̂Ń|�[�����O orz
+    if( vol_polling < 5 )
+    {
+        renge_task_immed_add( tski_vol_update );
+        vol_polling = (u8)(200 / SYS_INTERVAL_TICK) + 5;                      // 5��/sec
+    }
+    vol_polling --;
+
+
+    ADCEN = 1;
+    ADM =  bits8(0,0,0,0, 1,0,1,1);      // �Z���N�g���[�h�A�����AfCLK/6 // �������� ��
+
+    ADPC = 0x06;            // ADC�|�[�g�̃Z���N�g
+    ADS = ADC_SEL_3D;
+    nop8();
+    ADCS = 1;               // AD�J�n�B                     // �����܂Ł@���@�܂ł�1us=8clk�ȏ�J����
+
+    ADIF = 0;
+    ADMK = 0;
+}
+
+
+
+void vol_reset()
+{
+    vol_old = vol_data_ctr;
+    vreg_ctr[ VREG_C_SND_VOL ] = vol_data_ctr; // 64�i
+}
+
+
+/* ========================================================
+�@Vol���X�V���܂��B
+ �@����Ȏ��ɓo�^����܂��B
+�@�@�E���[�U�[��Vol�X���C�_�𓮂�����
+�@�@�EHorizon�ɋ����X�V���w�����ꂽ�@�icodec���Z�b�g���j
+�@�@�ETWL�A�v����Vol����������
+======================================================== */
+task_status_immed tski_vol_update()
+{
+    static u8 sent_index, sent_index_twl;
+    static bit last_modifyer_is_twl;  // false = ctr
+
+    if( !( system_status.pwr_state == ON ) || 
+        ( system_status.pwr_state == SLEEP )){
+        return( ERR_FINISED );
+    }
+
+    // �ǂ̉��ʂɂ���́H //
+	if( vol_changed_by_ctr )
+    {
+        // �X���C�_
+        vol_changed_by_ctr = false;
+        last_modifyer_is_twl = false;
+        sent_index = vol_data_ctr;
+    }
+    else if( vol_changed_by_twl )
+    {
+        // TWL�A�v��
+        vol_changed_by_twl = false;
+        last_modifyer_is_twl = true;
+        if( vreg_twl[ REG_TWL_INT_ADRS_VOL ] == 0 )
+        {
+            sent_index_twl = 0;
+        }
+        else
+        {
+            sent_index_twl = vreg_twl[ REG_TWL_INT_ADRS_VOL ] *2 +1;
+        }
+        sent_index = sent_index_twl;
+    }
+    else
+    {
+        // force_slider��0�ɂ����Ƃ� & �����܂���Ƃ�
+        //  �X���C�_��TWL�̍Ō�ɃZ�b�g���������Z�b�g
+        if( last_modifyer_is_twl )
+        {
+            sent_index = sent_index_twl;
+        }
+        else
+        {
+            sent_index = vol_data_ctr;
+        }
+    }
+
+    // ���W�X�^�̍X�V //
+    vreg_ctr[ VREG_C_SND_VOL ] = sent_index;
+
+	// twl���X�V
+	update_twl_vol( sent_index );
+
+    // codec�ɓ`����
+    /// ���l�ł�����
+    iic_mcu_write_a_byte_codec( CODEC_REG_VOL, slider_to_codec[ sent_index ] );
+
+    //    set_irq( VREG_C_IRQ0, REG_BIT_VR_SNDVOL_CHANGE );  // ���荞�ݔp�~
+    return( ERR_FINISED );
+}
+
+
+static void update_twl_vol( u8 sent_index )
+{
+	// �X�P�[�����O
+    if( sent_index == 0 )
+    {
+        vreg_twl[ REG_TWL_INT_ADRS_VOL ] = 0;
+    }
+    else if( sent_index <= 4 )
+    {
+        vreg_twl[ REG_TWL_INT_ADRS_VOL ] = 2;	// �P�̓~�b�V���O�Ő���
+    }
+    else
+    {
+        vreg_twl[ REG_TWL_INT_ADRS_VOL ] = sent_index/2 ;
+    }
+
+    // 8�i�K�̃��x�����B�@���荞�݂�����̂ɕK�v
+    {
+        static u8 vol_twl_old;
+        
+        if( vol_twl_old != vreg_twl[ REG_TWL_INT_ADRS_VOL ] )
+        {
+            // 8�i���x���ɕϊ�
+            u8 new_level = 31;
+            u8 i;
+            
+            vol_twl_old = vreg_twl[ REG_TWL_INT_ADRS_VOL ];
+
+            for( i=0; i<=7; i++ )
+            {
+                if( vreg_twl[ REG_TWL_INT_ADRS_VOL ] <= TWL_VOL_BOUNDARY[ i ] )
+                {
+                    new_level = i;
+                    break;
+                }
+            }
+            vol_level_twl = new_level;
+        }
+    }
+}
+
+
+/* ========================================================
+�@�ߋ��R�‚�min�ł�MAX�ł��Ȃ��l��Ԃ�
+ �@�˔��I�ȃm�C�Y�������B
+ �@�^�������ƐU�������
+======================================================== */
+static u8 getmean3( u8 * hist )
+{
+/*
+// ����͑傫���Ēx������
+	u16 temp = 0;
+	u8 min = 255;
+	u8 max = 0;
+	u8 i;
+
+	for( i=0; i!= 3; i++ )
+	{
+		temp += *(hist+i);
+		if( min > *(hist+i) ){ min = *(hist+i); }
+		if( max < *(hist+i) ){ max = *(hist+i); }
+	}
+	return (u8)(temp - min - max);
+*/
+
+    if( *hist > *( hist + 1 ) )
+    {
+        if( *hist > *( hist + 2 ) )
+        {
+            if( *( hist + 1 ) > *( hist + 2 ) )
+            {
+                return( *( hist + 1 ) );
+            }
+            else
+            {
+                return( *( hist + 2 ) );
+            }
+        }
+        else
+        {
+            return( *hist );
+        }
+
+    }else{
+        if( *hist > *( hist + 2 ) )
+        {
+            return( *hist );
+        }
+        else
+        {
+            if( *( hist + 1 ) < *( hist + 2 ) )
+            {
+                return( *( hist + 1 ) );
+            }
+            else
+            {
+                return( *( hist + 2 ) );
+            }
+        }
+    }
+}
+
+
+
+/* ========================================================
+�@���O�Ŏ��̃`�����l��
+�@�@��ʂ�I�������~�߂�
+ ======================================================== */
+__interrupt void int_adc(  )
+{
+    static u8 index;
+
+    volatile u8 adc_data;
+
+    adc_data = ADCRH;
+
+    switch ( ADS )
+    {
+/*
+case ( ADC_SEL_AMB_BRIT ): // �‹����邳
+        vreg_ctr[ VREG_C_AMBIENT_BRIGHTNESS ] = adc_data;
+        break;
+*/
+
+    case ( ADC_SEL_3D ):
+        EI();
+        adc_raw_dep = adc_data;
+        break;
+
+    case ( ADC_SEL_VOL ):
+        EI();
+        if( system_status.model == MODEL_TS_BOARD )
+        {
+            adc_raw_vol = adc_data;
+        }
+        else
+        {
+            adc_raw_vol = 255 - adc_data;
+        }
+
+        break;
+
+    case ( ADC_SEL_BATT_TEMP ):
+        EI();
+		if( vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ] == 0xFF )
+		{
+	        raw_adc_temperature = adc_data;
+		}
+		else
+		{
+			raw_adc_temperature = vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ];
+		}
+
+        if( (( vreg_ctr[ VREG_C_STATUS_1 ] & REG_BIT_MGIC_ERR ) == 0 ) &&
+            (( system_status.pwr_state == ON ) ||
+             ( system_status.pwr_state == SLEEP )
+             )
+            )
+        {
+            renge_task_immed_add( tski_BT_temp_update );
+        }
+        break;
+
+/* �Ă΂�܂���
+    case ( ADC_SEL_BATT_DET ):
+        break;
+*/
+    }
+
+// �����Ƃ܂Ƃ��ȏ����������肻����
+    if( ADS < ADC_SEL_BATT_DET )
+    {
+        ADS += 1;               // ���̃`�����l��
+    }
+    else
+    {
+        ADCEN = 0;              // �~�߂Ă��܂�
+        adc_updated = true;
+
+        if( ++index > 2 )       // �m�C�Y���̔z��C���f�b�N�X
+        {
+            index = 0;
+        }
+    }
+    ADIF = 0;               // ����������Ȃ��ƁA�������O�̃`�����l���̃f�[�^�̊����Œ���Ɋ��荞�މ”\��������
+}
+
+
+
+/* ========================================================
+ tsk_adc�Ƌ������邱�Ƃ��l�����Ă��܂���B
+ ======================================================== */
+u8 get_adc( u8 ch )
+{
+    u8      temp;
+
+    ADMK = 1;
+    ADIF = 0;
+
+    ADCEN = 1;
+    ADM = bits8(0,0,0,0, 1,0,1,1);          // �Z���N�g���[�h�A�����AfCLK/6  ///�������火
+
+    ADPC = 0x06;                // ADC�|�[�g�̃Z���N�g
+    ADS = ch;
+
+    nop8();
+
+    ADCS = 1;                   // AD�J�n�B                     /// �����܂Ł��@�ɁA1us�ȏ�J����
+
+    ADIF = 0;
+    while( ADIF == 0 ){;}
+    temp = ADCRH;
+    ADCEN = 0;
+
+    ADMK = 0;
+    return ( temp );
+}
+
+
+
+
+
+/* ========================================================
+ VR�̉“��͈͂��l���ăX�P�[�����O
+
+ ����Vol��p�@�g���񂷂Ȃ炻�̂Ƃ��ǂ��ɂ�����
+======================================================== */
+static u8 adc_scaling( u8 orig_val )
+{
+    u16 temp;
+
+    if( orig_val <= vreg_ctr[ VREG_C_VOL_CAL_MIN ] )
+    {
+        return( 0 );
+    }
+    if( orig_val >= vreg_ctr[ VREG_C_VOL_CAL_MAX ] )
+    {
+        return( 255 );
+    }
+
+    temp = (u16)(( orig_val - vreg_ctr[ VREG_C_VOL_CAL_MIN ] ) * 256 ) / ( vreg_ctr[ VREG_C_VOL_CAL_MAX ] - vreg_ctr[ VREG_C_VOL_CAL_MIN ] );
+    if( temp > 255 )
+    {
+        temp = 255;
+    }
+
+    return( (u8)( temp & 0xFF ) );
+}
+
+
+
+
+/* ========================================================
+ ����q�X�e���V�X V2
+ �l�̌ܓ��I�ȓ������܂�
+======================================================== */
+#define KIKAN 16
+static void adc_filter( u8 new_val, filter_work *work )
+{
+    if( abs( new_val - *( work -> value_used )) > 2 )
+    {
+        // �傫�����ꂽ
+        work -> large_diff_count ++;
+        if( work -> large_diff_count > 16 )
+        {
+            *( work -> value_used ) = new_val;
+            work -> diffs = 0;
+            work -> kikan = KIKAN;
+        }
+    }
+    else
+    {
+        work -> large_diff_count = 0;
+        // �ߏ��̒l�ł��A������Ԃł����ς��΂��Ă����炻�����Ɋ񂹂�
+        if( *( work -> value_used ) < new_val )
+        {
+            work -> diffs ++;
+        }
+        else if( *( work -> value_used ) > new_val )
+        {
+            work -> diffs --;
+        }
+
+        if( --( work -> kikan ) == 0 )
+        {
+            if( ( work -> diffs ) == KIKAN )
+//                if( ( work -> diffs ) > (s8)( KIKAN * 0.8 ) )
+            {
+                *( work -> value_used ) = *( work -> value_used ) + 1;
+            }
+            else if( ( work -> diffs ) == ( -1 * KIKAN ) )
+//            else if( ( work -> diffs ) < (s8)( -1 * KIKAN * 0.8 ) )
+            {
+                *( work -> value_used ) = *( work -> value_used ) - 1;
+            }
+            work -> diffs = 0;
+            work -> kikan = KIKAN;
+        }
+    }
+}
+
diff --git a/tags/SDK3.0(2.00)/adc.h b/tags/SDK3.0(2.00)/adc.h
new file mode 100644
index 0000000..6f4ad04
--- /dev/null
+++ b/tags/SDK3.0(2.00)/adc.h
@@ -0,0 +1,48 @@
+#ifndef __adc__
+#define __adc__
+
+#include "jhl_defs.h"
+
+///////////////////////////////////////
+// ANI2 P22
+#define ADC_SEL_AMB_BRIT  0x02
+
+/*
+// ANI3 P23
+#define ADC_SEL_GYRO_YAW  0x03
+// ANI4 P24
+#define ADC_SEL_GYRO_PITCH 0x04
+// ANI5 P25
+#define ADC_SEL_GYRO_ROLL 0x05
+*/
+
+// ANI6 P26
+#define ADC_SEL_3D      0x06
+// ANI7 P27
+#define ADC_SEL_VOL       0x07
+
+// ANI8 P150
+#define ADC_SEL_BATT_TEMP 0x08
+// ANI9 P151
+#define ADC_SEL_BATT_DET  0x09
+
+
+
+///////////////////////////////////////
+#define CODEC_REG_VOL 0x13
+
+
+
+///////////////////////////////////////
+extern u8 vol_polling;
+extern u8 vol_level_twl;
+
+
+
+///////////////////////////////////////
+u8 get_adc( u8 ch );
+void vol_reset();
+
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/batt_params.h b/tags/SDK3.0(2.00)/batt_params.h
new file mode 100644
index 0000000..3807441
--- /dev/null
+++ b/tags/SDK3.0(2.00)/batt_params.h
@@ -0,0 +1,132 @@
+#ifndef _bt_params_h_
+#define _bt_params_h_
+
+#include "jhl_defs.h"
+/*
+   �d�r����        CTR   | SPFL | YBS
+      0   ID = 0  maxell    ��
+    120        1
+    360        2
+    750 �@     3
+    1.3k�@     4
+    2.7k       5   pana     ��
+    8.2k�@     6
+*/
+
+
+typedef enum
+{
+    BT_PARAM_CTR_MAXELL = 0,
+    BT_PARAM_CTR_PANA,
+    BT_PARAM_SPFL_MAXELL,
+    BT_PARAM_SPFL_PANA,
+    BT_PARAM_SHRIMP_MAXELL,
+    BT_PARAM_SHRIMP_PANA,
+    _BT_PARAM_NUM_
+} BT_TYPE;
+
+typedef struct
+{
+    u8 rcomp;
+    s16 up,down;
+} rcomp_;
+
+typedef struct
+{
+    u8 hi,low;
+} verify_;
+
+    typedef struct
+{
+    u8 mg_param[64];
+    u8 v_scale;
+    rcomp_ rcomp;
+    u16 ocv;
+    verify_ verify;
+} bt_param_;
+
+
+
+
+/* ========================================================
+    �e�Ѓo�b�e���[�p�����[�^
+ ======================================================== */
+const bt_param_ bt_param[ _BT_PARAM_NUM_ ] =
+{
+    // ctr ////////////////////////////////////////////////
+    // BT_PARAM_CTR_MAXELL
+    {
+        {
+            0xAE, 0xF0, 0xB4, 0x30, 0xB7, 0x40, 0xBA, 0x30,
+            0xBB, 0x50, 0xBB, 0xB0, 0xBC, 0x50, 0xBD, 0x10,
+            0xBD, 0x60, 0xBD, 0xB0, 0xBF, 0xE0, 0xC2, 0xB0,
+            0xC4, 0x20, 0xC7, 0xB0, 0xCA, 0xE0, 0xCE, 0x10,
+            0x01, 0xF0, 0x14, 0x10, 0x14, 0x20, 0x06, 0x30,
+            0x63, 0x90, 0x49, 0x00, 0x6E, 0x00, 0x77, 0x70,
+            0x7B, 0x00, 0x19, 0x00, 0x19, 0x00, 0x17, 0xF0,
+            0x1C, 0x60, 0x12, 0x00, 0x12, 0x00, 0x12, 0x00
+            },
+        2,
+        { 92, (u8)(-256* 0.79), (u8)(-256* 4.35) },
+        0xD800,
+        { 0xEA, 0xE8 }
+    },
+
+    // BT_PARAM_CTR_PANA
+    {
+        {
+            0x8C, 0x30, 0x9C, 0x10, 0xA5, 0xE0, 0xB0, 0x40,
+            0xB1, 0xC0, 0xB2, 0x00, 0xB2, 0x50, 0xB3, 0x10,
+            0xB4, 0x90, 0xB6, 0x20, 0xB8, 0x60, 0xBA, 0x50,
+            0xBF, 0xA0, 0xC6, 0xB0, 0xCE, 0x90, 0xD0, 0x20,
+            0x00, 0x20, 0x00, 0x20, 0x00, 0x20, 0x00, 0x20,
+            0x7B, 0x30, 0x68, 0x60, 0x20, 0x00, 0x17, 0x00,
+            0x17, 0x30, 0x12, 0xF0, 0x0D, 0xE0, 0x07, 0xF0,
+            0x07, 0x00, 0x09, 0x30, 0x01, 0xC0, 0x01, 0xC0
+            },
+        1,
+        { 171, (u8)(-256* 1.00), (u8)(-256* 2.60) },
+        0xDA20,
+        { 0x69, 0x67 },
+    },
+
+    // spfl ///////////////////////////////////////////////
+    // BT_PARAM_SPFL_MAXELL
+    {
+        {
+            0xA1, 0x20, 0xB7, 0x50, 0xB9, 0xD0, 0xBB, 0x00, 
+            0xBC, 0x30, 0xBC, 0x60, 0xBC, 0xA0, 0xBD, 0x10,
+            0xBD, 0xC0, 0xBE, 0x70, 0xBF, 0xD0, 0xC2, 0xA0,
+            0xC4, 0x00, 0xC8, 0x50, 0xCC, 0x80, 0xD0, 0xB0, 
+            0x01, 0xA0, 0x25, 0x10, 0x18, 0xB0, 0x17, 0xC0,
+            0x95, 0x20, 0x6F, 0xE0, 0x7C, 0x60, 0x35, 0x10,
+            0x35, 0x00, 0x37, 0xF0, 0x16, 0xF0, 0x1C, 0xA0,
+            0x17, 0x30, 0x11, 0xD0, 0x11, 0xF0, 0x11, 0xF0
+            },
+        2,
+        { 94, (u8)(-256* 0.35), (u8)(-256* 3.85) },
+        0xDAB0,
+        { 0xF5, 0xF3 }
+    },
+
+    // BT_PARAM_SPFL_PANA  !!dummy!!
+    {
+        {
+            0x8C, 0x30, 0x9C, 0x10, 0xA5, 0xE0, 0xB0, 0x40,
+            0xB1, 0xC0, 0xB2, 0x00, 0xB2, 0x50, 0xB3, 0x10,
+            0xB4, 0x90, 0xB6, 0x20, 0xB8, 0x60, 0xBA, 0x50,
+            0xBF, 0xA0, 0xC6, 0xB0, 0xCE, 0x90, 0xD0, 0x20,
+            0x00, 0x20, 0x00, 0x20, 0x00, 0x20, 0x00, 0x20,
+            0x7B, 0x30, 0x68, 0x60, 0x20, 0x00, 0x17, 0x00,
+            0x17, 0x30, 0x12, 0xF0, 0x0D, 0xE0, 0x07, 0xF0,
+            0x07, 0x00, 0x09, 0x30, 0x01, 0xC0, 0x01, 0xC0
+            },
+        1,
+        { 171, (u8)(-256* 1.00), (u8)(-256* 2.60) },
+        0xDA20,
+        { 0x69, 0x67 },
+    }
+};
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/bsr.hex b/tags/SDK3.0(2.00)/bsr.hex
new file mode 100644
index 0000000..2ff6e9f
--- /dev/null
+++ b/tags/SDK3.0(2.00)/bsr.hex
@@ -0,0 +1,1008 @@
+:02000000660D8B
+:0400100079497B4966
+:02001C003B4B5C
+:02002400884B07
+:02002A00D34BB6
+:08003400FB4C9E4CF74C2D4ED5
+:02004A007D49EE
+:02005A00B849A3
+:02006200B14D9E
+:0400C0007EFBFF04C0
+:0A00C4001B339499E033F240BFAA09
+:1000CE00C7C1FBF8FFCEABACC736F00071F4C6610A
+:1000DE00D8710014F98EA89C018C015C10D1DD0A38
+:1000EE007110BCFB710014F9EF0B8C015C80D161B7
+:1000FE00E8710014F98F14F931030EF6B1BBF661F5
+:10010E004900DD05618900EFF5FDD401FD2801FDF3
+:10011E008001FD6402EFAEC0C6D7C7360000674C43
+:10012E0009DE3F318E04F60FC1317B9EFDC411896D
+:10013E007267318E04F64F14896142DF03F6EF01C8
+:10014E00E660610667318E124900207267318E04B7
+:10015E00F64F14896142DF03F6EF01E66061068710
+:10016E00EFBC40F84F3A61E88666D161E8FDDE06E5
+:10017E00C6D751105B0C319E609F16F94016F901DF
+:10018E00DF05CD3205EF03CD32078F14F95CE39F07
+:10019E0014F951035B04318EE7240000DD1023DDDA
+:1001AE000823DF0E712014F9D7713014F9D771407E
+:1001BE0014F9D7717BFACEA010CEA180E5F300CE54
+:1001CE00A408F5AAFFD78F14F9310508CD0003CD89
+:1001DE000307EF03CD030ECE23F88F14F931030B73
+:1001EE00CD0408CD0508F690BFB401CF1105F8F582
+:1001FE0021FFCE22E9CE24F3CE25FACE26FCCE2741
+:10020E005FCE2EFCCF120511CF350002CF3700196D
+:10021E00CF530006CBEEFEFFCE3831CE3970CF383D
+:10022E00050A308700BF1801BF1A01BF1C01BF1E8F
+:10023E0001D7C7C1C1FBF8FFCEABAC8C02D1DD122A
+:10024E00616902305C03BBF6614900DDEE61890035
+:10025E00EFF51004C6D7F50CFCF50EFCCF14FCFF21
+:10026E00CF10FCFFCF11FCFFFD6D2FFD9938FDCE99
+:10027E0004717AFAFDB123F512F98F14F9310513D1
+:10028E005003FD5A2B625C01D161E8CF12F902CF07
+:10029E00C5FB64FD4D30FD2645710261712BE7FDF6
+:1002AE009C38FD3B3961EDEFF6D7D7C7F616FDCE7C
+:1002BE0004717BFA31225F0871225F717AFAEF0BBB
+:1002CE00717AFAA7F647DFE9E2EF01F2C6D7C7C1A6
+:1002DE00C1FBF8FF17A1C1E0C18C0A70C18C02707E
+:1002EE00FD04031006D2DF04F439EF03CD39028C7E
+:1002FE0001721004C6D7C7C1FBF8FFFDB902D2DDEB
+:10030E0003E2EF618B70FD2204D2DD0771235F5291
+:10031E0002EF528C0870FD3704FD82048B6C017065
+:10032E00FD3704300400BF2401301740BF1C0130DC
+:10033E000400BF22018C0A91DF04F6BF2A01710B63
+:10034E00E2CE44FF3182E202EFFAAC0C148E4499F5
+:10035E0061790C61690A8C0AD1DFDAFDAB04710B8D
+:10036E00E271235FF2C0C6D7C7C1FBF8FFFDB90229
+:10037E00D2DD03E2EF25710AE68B70FD2204D2DD99
+:10038E000771235F5202EF138C0870FD37048C0A3D
+:10039E0070FD3704FDAB0471235FF2C0C6D7C7C131
+:1003AE00FBF8FFFDB902D2DD03E2EF65710AE671DB
+:1003BE000BE28B70FD2204D2DD0771235F5202EF38
+:1003CE0050710BE231125F39C73430FBAC0C165250
+:1003DE00048B99A5A792DFF9C63184BD02EFFA719D
+:1003EE007ABDCEB144CBB430FB8C0A318EBEB8CEC2
+:1003FE00BB48714BE1714BE5710ABD8C089E44EF11
+:10040E000F710BE68C089E448C0A9D38AC0CBD36E1
+:10041E00F2C0C6D7C716FD5A0417FD3704D2DD0643
+:10042E00FDAB04E2EF01F2C6D7C716710AE6710BF7
+:10043E00E2669E443182E202EFFAF6420401DD09E1
+:10044E00AF0401BF0C01E2EF01F2C6D7AF280108DD
+:10045E005CFB08BF2801FDB802AF28015CFBBF287A
+:10046E0001300400BF2A01301780BF1C0130040088
+:10047E00BF2201D7AF2401086C0408BF2401AF28A6
+:10048E00016C0F086C0B08BF2801FDB802AF2A01E2
+:10049E00085CFB08BF2A01FDB802ED5A04300400C7
+:1004AE00BF2401F6BF2A01300B0BBF2801FDB80295
+:1004BE00300B0FBF2801FDB802300F0FBF2801D738
+:1004CE0031345F01D771225F710BBD0000717BBDAE
+:1004DE006A0E03713B25713B23500AFD40027120C9
+:1004EE00F000FDB802F6BF26015024BF1401CB4424
+:1004FE000014300F0FBF280171135F710BE2710AE8
+:10050E00E6FD5A04CE44FF3182E202EFFAFDAB045F
+:10051E00AF0401BF0C0171235F71325FD731245FCD
+:10052E0002EFFAFD8204713A25713A235A0EFC71DC
+:10053E0028F00071335FD7C7880616FDB902D2DDE9
+:10054E0003E2EF38710AE650A4FD2204D2DD0771F2
+:10055E00235F5202EF2617FD37046770FD3704FD47
+:10056E00820450A4FD37045020FD3704D934FBFD1E
+:10057E003704A034FBFDAB0471235FF2C6D7C7204E
+:10058E0008FBF8FFFDDC085014C15008FD0E08C032
+:10059E00CC07048C074C14DE0C8C07318EFD480AF8
+:1005AE00615907EFEECC07048C074C1461C8ED7A45
+:1005BE0006CC06008C064C0461C8ED59063018F9BD
+:1005CE00BC02F6BBCEABAC31B2D109C73641057118
+:1005DE0084C6DEF3F1C73641057184C661DC9C0525
+:1005EE00713BD1AC02148F40059971505005617961
+:1005FE0002617900F0E1614900DD09C736410571FC
+:10060E0084C6DEC3F1C73641057184C661DC0E05B2
+:10061E009C055040C18C07318E31AD128C06318E47
+:10062E00318D03BDD831FFBDDADADAADD8FD140D48
+:10063E00C0D2DD0C5008C15014FD0E08C0FDD10B08
+:10064E008C05D1DF06615906EDC2058C07318EFD92
+:10065E004C0AD2DD0C5008C15014FD0E08C0FDD15D
+:10066E000B8C05D1DF06615907EDB605716050059B
+:10067E00CC0400CC05008C054C09DE2B8C05318E8C
+:10068E0004F61FC1317B9EFDC41189728C05318E1B
+:10069E0004F64F14896142DF03F6EF01E6600E04A3
+:1006AE009C04615905EFCF41001140F81F3A61E8F3
+:1006BE006159048C04D1DF08FDD20BFDE40CEF0C64
+:1006CE005008C15014FD0E08C0FDD10B1008C6D73E
+:1006DE00C72004FBF8FF715B21CC0100F6BC02AC15
+:1006EE0002440900DE3EAC0204F60F1441001189EB
+:1006FE0072AC020C5014896142DF03F6EF01E66022
+:10070E000E019C01AC021249005072AC0204F67F3D
+:10071E0014896142DF03F6EF01E6600E019C016170
+:10072E007902EFBB40F67FFF61F86159018C01D170
+:10073E0061F8EDDC07CC0100717AFAFDCE0471137D
+:10074E0000711B20710303710205E0C15003FD49C6
+:10075E002BC05013FD4002500FC1E0FD492BC0CEFF
+:10076E00ABAC6159018C0191DD068C014C03DF03AA
+:10077E00E6EF01F66061FB7151018C014C0861F8E6
+:10078E00CC010031320705A042FCEF03F542FC40DC
+:10079E0042FC11DC0DF542FCF0C15003FD492BC0AB
+:1007AE00EF12E6BC02F6614902DDB4000000006102
+:1007BE007902EFF1CE3708CBE4FFFFCBE6FFF7CEA1
+:1007CE00D4FFCF370008F5120561FDF5ABFFFDDC58
+:1007DE0008D25008C15014FD0E08C0D2FDD10B1026
+:1007EE0004C6D73184BD02EFFA717BBDCBE4FFFFA7
+:1007FE00CBE6FFFFCBD4FFFF717ABED7717BBED79E
+:10080E00C7C1200CFBF8FF8C0C318E31ADC1317B92
+:10081E009DD4C0BC068DD49C088C149C0B8C1431BA
+:10082E008E040C00128C0B318EBDD813FDA30F61FC
+:10083E00C8EDD708CEABACCC05068C0B318EFD4483
+:10084E000AD2DD158C0B318EFD480A6169058C05C7
+:10085E00D1DFE7FD0A08E2EF71CC0A008C0A4C04E6
+:10086E00DE54F6BC023018F9BBAC06148C089EFDA3
+:10087E00118972AB146299AC06A1BC066179006154
+:10088E007902F0E1614902DFE05040C18C0B318EFC
+:10089E0031AD128C0A318E318D03BDD831FFBDDAE8
+:1008AE00DADAADD8FD140DC0D2DD06FD0A08E2EF8E
+:1008BE001961590AEFA68C0B318EFD4C0AD2DD035D
+:1008CE00E2EF0761590BED2B08F2100EC6D7C77178
+:1008DE007B9D717BFAFDF1073018F9FDF70AFD8259
+:1008EE000AC6D7FDDC08FDD10BFD0A08F5ABFFF2F9
+:1008FE00D7C7316462067110C9FBEF047118C9FBCA
+:10090E008FC9FB7FEAFC76D1DD5C8FC9FB9FEAFCC9
+:10091E004012F903DF22665C10D1DD1C8FC9FB5C2F
+:10092E0010D1DD0B5080C15011FDA434C0EF095021
+:10093E0040C15011FDA434C04012F903DD0640122F
+:10094E00F904DF22665C02D1DD1C8FC9FB5C02D18B
+:10095E00DD0B5040C15010FDA434C0EF095020C132
+:10096E005010FDA434C0C6D7C78F0CFC768F0DFC7B
+:10097E0077665C80D1DD10675C80D1DF0571136214
+:10098E00EF0B711262EF06710407711162665C4023
+:10099E00D1DD10675C40D1DF05712362EF0B712250
+:1009AE0062EF06711405712162665C01D1DD10677C
+:1009BE005C01D1DF05713362EF0B713262EF0671AC
+:1009CE003407713162665C02D1DD10675C02D1DFE3
+:1009DE0005714362EF1D714262EF184015F901DF98
+:1009EE0008710402714162EF0AC736100571C4C660
+:1009FE00714162665C04D1DD10675C04D1DF057164
+:100A0E005362EF0B715262EF0671440771516266C9
+:100A1E005C08D1DD10675C08D1DF05716362EF0BF6
+:100A2E00716262EF06711407716162665C10D161CA
+:060A3E00E8715AD1C6D791
+:100A44005208EF065203EF025206FEE600FE1B00B8
+:100A5400DC16089F03088F0408089F040862FE241C
+:100A640000089F0408EEBF00EEBA00C1C514410E91
+:100A740011D9D0FF118FD1FF312E45C4C0D7F23127
+:100A8400A2C401E2D79DE261DD4C09DF12717BFA59
+:100A9400C18F06089F31FDC0CF060800EE27003144
+:100AA400F2FA04CF0608004C00DF05D50008DD1675
+:100AB40061DD717BFAD50608DD0ACDE31F61CD61E6
+:100AC400CDEE160061CDFED40061FFFE9A00FCF865
+:100AD400FF0EFEB20061CDFED5004C09DF0EC18FC2
+:100AE40006086F31FD9F0608C0EE0400CF0608001B
+:100AF400F8E3D75200EF025202FE3700CF30FD0078
+:100B0400CF060800BF0408C716629F000841001101
+:100B14008F22229B4100118F23229F0108C651007E
+:100B2400FE62FFEF025205CF060800C1510CFE0A17
+:100B340000C0D7C1511DFE0200C0D761DD717BFA30
+:100B440070CEC0A59EC47CFF9EC4609EC461CDD7F8
+:100B540061DD717BFAC18EC45C1BFED6FFCF060833
+:100B640001FED7FFC061CDD731F2FA1AC1AEE4BF9E
+:100B740022FDAEE6BF24FDAED4BF26FD30FFFFBE8E
+:100B8400E4BEE6BED4C0D731F2FA11C1AF22FDBE35
+:100B9400E4AF24FDBEE6AF26FDBED4C0D7C1BF2856
+:100BA400FD13BF2AFD15BF2CFD17BF2EFDC0D7AF07
+:100BB40028FDDB2AFDEB2CFDFB2EFDD7534B3052D9
+:100BC4005430324E323030475631323000FFC1504B
+:100BD400FEFEAB0061DD717BFACF060800FE0A0061
+:100BE400FEA4FF61CDF8E3EECF00C7FB0408BF22EB
+:100BF400FD8FC0009C05C5C337040600BF24FD3526
+:100C040036360C300000522BFE6600C2C4C630E4F7
+:100C14000BB800300000B8022004AF24FDB8003047
+:100C24000F00B802AF22FD61FF520AFE3AFFECF852
+:100C3400FF0E717BFAC1C7FB04088C05C65C80FEFD
+:100C44000200C0D761DD717BFA70CFC0FFA59FC0E1
+:100C5400007CFF9FC000609FC00061CDD7618BFE08
+:100C6400E2FF717BBE410011FB000017CEFC006166
+:100C7400CB089EFDF31161C999A58392DFF7D7FED6
+:100C8400B1FED530FDDF23C1CF0308035109FEF4C3
+:100C9400FDC0D2DF37FE3800A20408CF0308075195
+:100CA40009FEE1FDD2B20408DF22C7FB0408318348
+:100CB40002C6D7C6510AFECCFD624C1FDF06CF30F8
+:100CC400FD01EF04CF30FD00C0EE5BFEC0EE55FE2B
+:100CD400C7C1FB04088B31196C0161589BC0C6D78E
+:100CE400717BFAFE4DFEAF0408040600C1143648B9
+:100CF4000C300000522DF3FE77FF8FC000FE2BFE58
+:100D040061CF5C807C8073C0041900CEFC0F61CB82
+:100D1400C55404EF03C55417FE18FEC7360008BBBC
+:100D2400629C0288089C03D1DD334C41DE2F70F1B4
+:100D3400312DB161090033081C000851FF612A41BB
+:100D44000E118FD0FF613B118FD1FF6138DC0E8B08
+:100D54005C03DF0964C6C4FE2BFDEECAFDC6C4EE07
+:020D6400C3FDCD
+:100D660061CF5100718C7109FECBF800FEFCC10108
+:100D760000F6BF00F953C0F693935820FEDFF94101
+:100D860000363E4E34F4FCEF05118B99A7A51744A7
+:100D96006C4EDFF53602F930F4FCEF04CC0000A708
+:100DA60047DFF94100366C4E3420FEEF05118B9972
+:100DB600A7A51744744EDFF53628FE305EFEEF0415
+:100DC600CC0000A747DFF9FCCE0000EFFE61DD7125
+:100DD6007BFABEF0ADD8BEF200AEF661CDD7C361E8
+:100DE600DD717BFABEF0ADD8BEF200DBF6FFADDCFE
+:100DF600BEF000AEF6BDD8AEF40312ADDABEF20018
+:100E0600AEF661CD03BDDAC2D7C3F33174D9088318
+:100E1600C1F626D8BDD8C031750683C312F623C2E3
+:100E2600FD310E93DF0312F623C2D7440000DD2600
+:100E360061DD717BFACFE80080BEF6F6BEF4BEF245
+:100E4600ADD8BEF0CFE800818FE8003103FAAEF0EE
+:100E5600F5E80061CDD7B1D7C3F33174D90883C1A2
+:100E6600F626D8BDD8C0317505C312F623C2FD7F5C
+:100E76000E93DF0312F623C2D7440000DD2761DD9F
+:100E8600717BFACFE80080BEF6F6BEF4BEF2ADD8AE
+:100E9600BEF0CFE800818FE8003103FAAFE000F53D
+:100EA600E80061CDD7ADD8D7C3F33174DB0F83C16A
+:100EB600F626D8BDD861317026DABDDAC031750D97
+:100EC60083C312F626DCBDDC61317023C2FDE70E5A
+:100ED60093DF0CF626D8BDD861317026DABDDAC2AA
+:100EE600D7C161686BDC6BDDC0DD2F61DD717BFA1C
+:100EF600CFE80080BEF4ADDCBEF6ADD8BEF0ADDA0C
+:100F0600BEF2CFE800818FE8003103FAAEF0BDD81B
+:100F1600AEF2BDDAF5E80061CDD7F6BDD8BDDAD7B9
+:100F26008292DD2B61DD717BFACFE80080BEF0F6A0
+:100F3600BEF2BEF46208BEF6CFE800818FE800314B
+:100F460003FAAFE0006072AEF0F5E80061CDD7605D
+:100F560072F6B1D706DABDDAADDC06D8BDD861D8EF
+:100F6600A6DAD7D1DD17C1C3DAD89DD8ADDA311CE0
+:100F760061EEB4D8DFF8BDDA13BDD8C2C0D7D1DD73
+:100F86001BC1C3DADA9DDAADD8311E33311E337197
+:100F9600F9B4DADFF4BDD813BDDAC2C0D746D8DD5E
+:100FA6000771FF7177D971C0D75BDB9DDB605BDAB8
+:100FB6009DDAADDC5BD9085BD808BDD8D7C3C7F3CB
+:100FC600728EFDC162314C410036344E1161A07201
+:070FD600C09EFD62C6C2D7F8
+:0A0FF60031343A32343A3238000048
+:0A20000031343A32343A323800002D
+:10200A00AEF0B430B740BA30BB50BBB0BC50BD1014
+:10201A00BD60BDB0BFE0C2B0C420C7B0CAE0CE1038
+:10202A0001F0141014200630639049006E00777096
+:10203A007B001900190017F01C6012001200120030
+:10204A0002005C003600A70000D8EAE88C309C1039
+:10205A00A5E0B040B1C0B200B250B310B490B620FF
+:10206A00B860BA50BFA0C6B0CE90D02000200020E1
+:10207A00002000207B30686020001700173012F023
+:10208A000DE007F00700093001C001C00100AB00F4
+:10209A000000670020DA6967A120B750B9D0BB00F9
+:1020AA00BC30BC60BCA0BD10BDC0BE70BFD0C2A059
+:1020BA00C400C850CC80D0B001A0251018B017C0F9
+:1020CA0095206FE07C603510350037F016F01CA0C3
+:1020DA00173011D011F011F002005E00A70027009E
+:1020EA00B0DAF5F38C309C10A5E0B040B1C0B20074
+:1020FA00B250B310B490B620B860BA50BFA0C6B000
+:10210A00CE90D02000200020002000207B30686084
+:10211A0020001700173012F00DE007F00700093011
+:10212A0001C001C00100AB000000670020DA696746
+:10213A000000000000000000000000000000000095
+:10214A000000000000000000000000000000000085
+:10215A000000000000000000000000000000000075
+:10216A000000000000000000000000000000000065
+:10217A000000000000000000000000000000000055
+:10218A000000000000000000000000000000000045
+:10219A000000000000000000000000000000000035
+:1021AA000000000000000000000000000000000025
+:1021BA000000000000000000000000000000000015
+:1021CA00000000000000000005214F7B9EC5E900C9
+:1021DA007F7E7D7C7A7978777675747271706F6E8E
+:1021EA006D6C6A6968676665646261605F5E5D5CA2
+:1021FA005A5958575655535251504F4E4D4B4A49BA
+:10220A004948474645434241403F3E3D3B3A3938BB
+:10221A000104080D12171C1F080101020203030220
+:10222A0000FEFBF7F3F0F0F3FA041225384D5F6E67
+:10223A00777A776E5F4D38251204FAF3F0F0F3F7E8
+:10224A00FBFE000203030202010000001F003B0024
+:10225A005A0078009700B500D400F300110130014C
+:10226A004E011926344453626E777D80807D776EE5
+:10227A00625344342619100A08080808080808088E
+:02228A000A1038
+:10228C00D512F9DF04F42AEF0D8FF4FCB0F4FCD175
+:10229C00DF4DCFF4FC1EFD4A23FDEC2231325E0DE6
+:1022AC0031045E0931126205713304EF037132049B
+:1022BC00FD232331225E05714202EF03714302D4E8
+:1022CC002ADD05B42A714202314402067140C9FB71
+:1022DC00EF047148C9FB4012F90161E8FD1826D7DB
+:1022EC004A284BDC134A28B9DE0E4004F928DE04D8
+:1022FC00A004F9D771335ED74A283EDC054A28BDC5
+:10230C00DC0E4005F928DE04A005F9D771325ED742
+:10231C00F504F9F505F9D73122620E4006F902DE13
+:10232C0004A006F9D771235ED73132040A40C5FBED
+:10233C003CDE0471235ED771225EF506F9D7C7C166
+:10234C00FBF8FF71445E711762DE577114627141C4
+:10235C005E311262127130C9FB5002C15011FDA4E2
+:10236C0034C0CD2A32EF3B7138C9FBE0C15011FDAE
+:10237C00A434C0F42A17C15002FD312BC0D2DF0D9A
+:10238C008B318E318D080E01081C00BD2CAD2C44F8
+:10239C00009BDC05D5C5FBDF095020C15011FDA405
+:1023AC0034C0C0C6D7C78D2076FDF323FD652BD571
+:1023BC0015F9DD0571035EEF2C664B2061F8315485
+:1023CC005E1A71535EFDCE04664C07DD0381DF0996
+:1023DC008F14F9310303FD7C24FD902471025E30CF
+:1023EC006C25FDF138C6D7C77162017172015005B9
+:1023FC00FD40025008FD6E37629D285009FD6E3776
+:10240C006276716301711814F94A28F1DC05E5153F
+:10241C00F9EF224A2804DE1ACF15F9025008C150F0
+:10242C006CFDDC02C092DF0DD439DF09711014F998
+:10243C00EF03F515F94015F901DF05710A22EF06D6
+:10244C00710B22710302CD20075700674C08DE1078
+:10245C007309D221614EDC05679D20EF0387EFEBFA
+:10246C004A2007DF09D515F961F8CF15F903C6D74E
+:10247C00500AFD4002304000C15006FD142BC050E4
+:10248C0096ED4002C72006FBF8FFD515F961E8ED83
+:10249C006825304A57C1503EFD142BC0D2DD077160
+:1024AC0000C8FBED68257108C8FB17A1C15004C119
+:1024BC00500CC1506CFD04031006EA30AA48318D53
+:1024CC0012AA48318E616B08616A08C1500EFD1466
+:1024DC002BC0F690C1500CFD142BC0CC00008B4CC3
+:1024EC0004DE2631245F02EFFA71125FEA308B5062
+:1024FC0010D605C15010C18BD6044000C1506CFDE4
+:10250C00AC031006615900EFD550A5FD4002EA302E
+:10251C00AA48318D12AA48318E616B08616A08C1D4
+:10252C00500EFD142BC050A5FD40025004C1506C40
+:10253C00FDDC02C0629C05EA308A4B4E0561C30487
+:10254C008A4A4E0517A1C15004C1500CC1506CFDF4
+:10255C00AC031006F6C1503EFD142BC01006C6D7B6
+:10256C00C78F07F94B2861F8ED15264009F928DECD
+:10257C0006A009F9ED1526F509F98D289F07F98DA7
+:10258C00285070D612307351230480001231FF3161
+:10259C008E039F08F99FC4FBF68F08F97C804C953D
+:1025AC00DC1C8F08F9318F241400EA30BDD8AA4402
+:1025BC00FDD30D1231FF318E03318F16EF1A8F08B8
+:1025CC00F9318F241400EA30BDD8AA46FDD30D1280
+:1025DC0031FF318E03318F16EA308A427217F303C2
+:1025EC001644000171FE61C836FF001701DE02F6C9
+:1025FC001617BD50C7500CFD142BC0D2DF078D2809
+:10260C009F07F9EF047100C8FBF2C6D7C72008FB7F
+:10261C00F8FF4015F901DD064015F902DF1C17041F
+:10262C000600FD0C2CD2DF0A8C069C058C079C0442
+:10263C00EF4ACC0563CC0400EF4217040600FD0CF6
+:10264C002CD2DD0F7100C8FB71035ECC050071024A
+:10265C005FEF298C06318E318D080E07081C00BBEC
+:10266C00EA308A4072ABFD260FBB8C019C05D1DF92
+:10267C0008CC0501CC0400EF038B9C041704060066
+:10268C00FD292CD2DD06CC06C8CC07008C069FC7D2
+:10269C00FB8C06318E318D080E07081C00BD2CAD4D
+:1026AC002C4401A5DC09CC0364F6BF0AF9EF52AD4A
+:1026BC002C220AF94401A0DC09CC031EF6BF0AF94E
+:1026CC00EF3FAD2C44819DDC0BCC030A30F401BFF1
+:1026DC000AF9EF2DAD2C44019BDC0BCC030530F437
+:1026EC0001BF0AF9EF1BAD2C440191DC0BCC0300AC
+:1026FC0030F401BF0AF9EF0971025F30F401BF0A2F
+:10270C00F93132040C31245E08CC0564CC0400EFA2
+:10271C000D8C034E05DE078C039C05CC04008C0548
+:10272C009FC5FB8C049FC6FBFD992B8F0CF94E05A6
+:10273C00DD2B40C5FB0BDE06400CF90BDE1640C54D
+:10274C00FB06DE06400CF906DE0AD5C5FBDF0ED50E
+:10275C000CF9DD095020C15011FDA434C08FC5FB0C
+:10276C009F0CF9FDD62B1008C6D7C7D832C1500222
+:10277C00FD492BC04016F90161F87120100550126B
+:10278C00FD40028D326C0870C15002FD492BC050C7
+:10279C0003FD40028D326C1870C15002FD492BC0F4
+:1027AC005016FD40025003FD5A2B625C01D1DD1026
+:1027BC007170C9FB5002C15013FDA434C0F2EF017B
+:1027CC00E2C6D7C75004FD5A2B625C03D1DD4050E2
+:1027DC0014FD662834C9FB895C9F998A0C7CFF50D8
+:1027EC00FF5C14D1DD228A0C7CFF5C147234CDFBAF
+:1027FC0089616A997162075600316207058666D154
+:10280C00DFF7716307716B2734DCFB895CEB997123
+:10281C002810055002FD5A2BD2DD354016F901DF88
+:10282C0005500AFD40028D326C1070C15002FD49FA
+:10283C002BC0E0FD4002D832C15002FD492BC050E4
+:10284C0033FD4002F0C15002FD492BC07178C9FB29
+:10285C00E0C15013FDA434C0C6D7C7C12004FBF897
+:10286C00FFCC02005004FD5A2B629C038C045C20AC
+:10287C00D1DD0E8C036C019C038C026C209C02EF4E
+:10288C00138C045C10D1DD0C8C035CFE9C038C025D
+:10289C006C109C028C045C08D1DD0E8C036C029CC9
+:1028AC00038C026C089C02EF138C045C04D1DD0CCD
+:1028BC008C035CFD9C038C026C049C028C03D1DDAC
+:1028CC0005501AFD40028C0370C15004FD492BC009
+:1028DC008FC9FB5C9F728C03318E316D148C03316C
+:1028EC008E314D616D08616C5C606162629FC9FBE9
+:1028FC008FD5FB7CFF50FF5E02D1DD278FD5FB7C93
+:10290C00FF5E027234CDFB89616A99716207CC015A
+:10291C0000316207086159018C01D1DFF471630742
+:10292C00716B27F21006C6D7D9BDFBC15006FD4905
+:10293C002BC0D9BEFBC15007FD492BC0D7FD342994
+:10294C00F2D7C7711300711B20710303710205E0EC
+:10295C00C15003FD492BC05013FD4002F0C150057E
+:10296C00FD492BC0500FC1E0FD492BC0500AFD4062
+:10297C00027103055008FD4002501FC1E0FD492BB8
+:10298C00C05012FD40025003FD5A2B625C01D1DF96
+:10299C0003E2EF24F0FD5A2B629D2E3602F9C7504C
+:1029AC0008FD312BC05003C1FD492BC071020371CE
+:1029BC001A20FDF12AF429F2C6D75003FD5A2B62D6
+:1029CC005C01D1DD155014FD6628FDCF275014FD98
+:1029DC004002E0C15003FD492BC0711300711B2054
+:1029EC007103035014FD4002F0C1E0FD492BC0F00F
+:1029FC00C15003FD492BC0D7C72004FBF8FFCC0204
+:102A0C00008D299C035010C150A4FDDC02C0629DB6
+:102A1C0029D439DD04F2EDCE2A8C037B295C08D154
+:102A2C00DD0F8D295C08D1DF05CC0210EF03CC0241
+:102A3C00208C037B295C04D1DD158D295C04D1DF4E
+:102A4C00088C026C049C02EF068C026C089C028FB2
+:102A5C00C8FB5CF3728D295C0C6162629FC8FB8FB2
+:102A6C00D4FB7CFF50FF5E029C02D1DD1F34CCFBFB
+:102A7C00896E0299716207CC0100316207086159B5
+:102A8C00018C01D1DFF4716307716B278D295C40D8
+:102A9C00D1DD095002C15012FDA434C08D295C0156
+:102AAC00D1DD08E0C15012FDA434C0717AFA8D2931
+:102ABC005C41D1DD0C5A29BED829C15010FD450509
+:102ACC00C0F21004C6D7FD7627F2D7FDCF27F2D778
+:102ADC00C78FDCFB7617FD6628664FDCFBDFF2F553
+:102AEC00DCFBF2C6D75064FD4002FD412C6261FB59
+:102AFC0071115EF171145E61DC70C15012FD4505FF
+:102B0C00C0FD4A36CD3F03D7C7C1C1FBF8FFAC0AA5
+:102B1C00BB17C15002C18C0270C1506CFDAC0310CC
+:102B2C00061004C6D7C7C1FBF8FFAC08C15002C1E0
+:102B3C008B70C1506CFD04031006C0C6D7C7880645
+:102B4C00166770C1C75084FD76031004C6D7C7162C
+:102B5C00C75084FDDC02C0C6D7C74A2004DE045629
+:102B6C0000EF0256014016F901DF048686EF0A4099
+:102B7C0016F902DF045104610666318F12504CD6EF
+:102B8C0033514CD6610A040A20BD30C6D740C5FB70
+:102B9C0051DC05CF1CFC0FD740C5FB33DC05CF1C2B
+:102BAC00FC0BD740C5FB0BDC05CF1CFC07D740C585
+:102BBC00FB0661D831320405CF1CFC03D7D5C5FB0D
+:102BCC00DD04E51CFCD7F51CFCD7D512F9DF04712C
+:102BDC00635ED7FD412C6261FB71715E71145E7195
+:102BEC00775E61C831625E1771625E71745E7111DD
+:102BFC005EF171745E61DC70C15012FD4505C0D789
+:102C0C00C7164010FCFFDD0C8F10FC9B1714CA017B
+:102C1C0000F2EF07C75004FD312BC0C6D7C71640D2
+:102C2C0011FCFFDD078F11FC9BF2EF07C75002FD73
+:102C3C00312BC0C6D740C5FB0BDE02E2D7F2D771F1
+:102C4C0000010571785005713AD5713BD1713BD9B2
+:102C5C008F10055CFC9F1005CF54054AE5420571A9
+:102C6C0010420571004205714850057130500571D4
+:102C7C00205005CF530505CF52050A71305105710F
+:102C8C00205105713BD5717050058F11055CFC9F6F
+:102C9C001105F422D77178500571080105D77140E0
+:102CAC00F00071783002713AE6713BE2713BEA71E7
+:102CBC003BEE8F10055CFC9F1005CF34024AE552A9
+:102CCC00FF711A52710A5271483002713030027120
+:102CDC00203002CF330205CF32020A71303102713B
+:102CEC003BE6717030028F11055CFC9F1105716021
+:102CFC003002D7717830027148F000D7C7880616B9
+:102D0C0066614FDD0967614EDE0396EF01866672E0
+:102D1C00C6D7C7161714AA0412A943DD29AA041290
+:102D2C00A923FD744EC3AC02FD744E13C2BDD8135F
+:102D3C00FDA30FDE0C1714AA0212AA0403BA04EFA7
+:102D4C00051714A9BA04AC041231FF319E03317F6C
+:102D5C00087208C6D77100F200304400BFB60130CB
+:102D6C000188BF9001300984BF9E01BF9C01BF9AAE
+:102D7C0001BF9801BF9601BF9401BF9201F53CFFC2
+:102D8C0030FE00BFBE01F6BFBC01BFB80150EEBFA4
+:102D9C00BA01A1BFB201C918FE00F6BE6EBE64BE78
+:102DAC006A7123047153078F14F9310507F5E3FB9E
+:102DBC00CB6CFF0071535F71425FD730EF00BFB433
+:102DCC0001F6BFBA017108F2007123047153077147
+:102DDC00435FD78F9AFBB09AFBD1DF7331D4D10606
+:102DEC00715BD1E59CFBD59CFBDD347140C8FBD9F4
+:102DFC009BFBF1E734020023DD0625DD0325DF050F
+:102E0C00F6BE66EF06D9E2FBF1BE66A09BFB409BCB
+:102E1C00FB20DF06F59BFBB09CFBCF9AFB19D7CFB1
+:102E2C009AFB1E7148C8FBD5E4FBDF04F6BE66D7DF
+:102E3C00D9E2FBF14266FFDD16D9E2FBF112AE6678
+:102E4C0043DE05A266FFEF03B266FFCF9AFB03D702
+:102E5C00C7161714F6B9AA0412F6231231FF31AEB5
+:102E6C0003316FBA02C6D7C7C1FBF8FF8C0850807C
+:102E7C00D612AB1413B9AB14AA0412A92312D93766
+:102E8C00FBF133BDD813FD0F0EBA02C0C6D73164A7
+:102E9C005F01D74012F902DF10F6BE64BE6EBE6A47
+:102EAC00BFA4FBBFAAFBBFB0FB31545F1530A0FB26
+:102EBC00FD5C2E30A6FBFD5C2E30ACFBFD5C2EEDDC
+:102ECC004E2F31745F0F71735F7108E8FBF59EFB39
+:102EDC00F59DFBEF6DD59DFBDF658F36FB9F9DFB55
+:102EEC00409EFB1FDC1A7100E8FB4038FBFFDD2223
+:102EFC00A09FFB8F38FB4F9FFBDE17F59EFBEF125D
+:102F0C00D99EFBF1A1605C1F9F9EFB7108E8FBF54D
+:102F1C009FFBE99EFB093AFB70C130A0FBFD732EB1
+:102F2C00C0E99EFB095AFB70C130A6FBFD732EC095
+:102F3C00E99EFB097AFB70C130ACFBFD732EC0B06F
+:102F4C009DFB30A0FBFD1E2DF313BE6E30A6FBFDCA
+:102F5C001E2DF313BE6A30ACFBFD1E2DF313BE64A5
+:102F6C00D7C736F00071F4DC297170F000CE9D08E3
+:102F7C00CE9EC0CE9F80F594FFF593FFF592FFE5B2
+:102F8C0097FFE596FFE595FFE598FFCE9C7F7100D6
+:102F9C00BCFB711BE3712BE3711AE7712BE7717AA0
+:102FAC009D710A9E31929E02EFFA710B9E71036025
+:102FBC00711360712360C6D7C73102601E71026045
+:102FCC00710A9E31929E02EFFA34EAFB3692FF525E
+:102FDC00078B99A5A792DFF9710B9EC6D7C78806F8
+:102FEC001631126015711260C734B2FB3092FF16A5
+:102FFC0052078B99A5A792DFF9C666736718B2FBC7
+:10300C00C6D7C77103603114601E711360710A9EBC
+:10301C0031929E02EFFA3492FF36B2FB52078B9933
+:10302C00A5A792DFF9710B9E312460137123607197
+:10303C007B9E8FF2FB9E9A8FF3FB9E9B717A9EC6B2
+:10304C00D7CFBDFB5CCFBEFB5FCFDEFB5DCF12FCF1
+:10305C0036CF13FCC9E5E9FBD7C7CFBAFB12F5BBDA
+:10306C00FBCFE2FBFFF5E3FBF5E4FBF5E5FBF5E657
+:10307C00FB5600664C64DE08723836FB0086EFF3B4
+:10308C00C6D7C788061617F1E73403002361E3EDB2
+:10309C00D4332361F8ED7F31B12361E3ED89312520
+:1030AC0061F8ED9831B1240D0061D8EDD433240BC7
+:1030BC000061F8EDB9312361F8ED00322361F8EDD0
+:1030CC00CD312361F8ED983324060061F8ED6932B7
+:1030DC00B12561D8ED853224000061F8ED923223E0
+:1030EC0061F8EDD4332361F8EDB233B12361E3ED34
+:1030FC00B5322361F8EDC6322361F8EDD732236186
+:10310C00F8EDC6322361F8EDE8322361F8EDF932BF
+:10311C002361F8ED08332361F8ED2A332361F8EDD0
+:10312C0036332361F8ED42332361F8ED4B3324023F
+:10313C00002361E3EDD43324020061F8ED54332312
+:10314C0061F8ED61332561F8ED6D33B12406006152
+:10315C00D8EDD43324000061F8EDD7332561F8EDB8
+:10316C00793324120061F8ED93332361F8ED843345
+:10317C00EDD83334BCFB89615F99EDE533304929D7
+:10318C00FDF13866736718BAFBEDE53340BFFB6A97
+:10319C00DF1440C0FB68DF0E674C6CDF09304C421B
+:1031AC00FDF138713AD5679FC1FBEDE53367D1DD91
+:1031BC000D30323DFDF13834DAFB89616F99EDE564
+:1031CC0033675C02D1DD0830D22AFDF138EF0C6791
+:1031DC005C01D1DD0630D72AFDF138675C3CD1DDCE
+:1031EC001030DC2AFDF138675C3C7266736218BAE9
+:1031FC00FBEDE53367D1DD625C01D1DD0530080004
+:10320C00EF01F6609F19FC675C02D1DD03E6EF016C
+:10321C00F63419FC89616899675C04D1DD04E6A178
+:10322C00EF01F63419FC89616899675C08D1DD05FA
+:10323C00302000EF01F63419FC89616899675C1045
+:10324C00D1DD05301000EF01F63419FC8961689965
+:10325C00675C20D161E8716019FCEDE533D434DF93
+:10326C0008679FE3FBA434EF0D4A3405DE08E8340D
+:10327C0067181DFDA434EDE533675C0F726673624D
+:10328C0018BAFBEDE5334A3464DE1B4A3401DF0621
+:10329C0067D161F85701E834671836FBA4344A3417
+:1032AC000561C871725FEDE533675C7F70C117F122
+:1032BC00243000FDE92FC0EDE533675C3F70C1178A
+:1032CC00F1243000FDE92FC0EDE533675C0770C1D8
+:1032DC0017F1243000FDE92FC0EDE533675C1F705A
+:1032EC00C117F1243000FDE92FC0EDE5336770C143
+:1032FC0017F1243000FDE92FC0EDE533CEABAC71F6
+:10330C000A9E31929E02EFFAD592FFDF05710B9E59
+:10331C00EFED679E99710B9E9FF1FBEDE5337122EA
+:10332C0060675C7F9FF2FBEDE533712260675C3F69
+:10333C009FF3FBEDE533675C3F9FF4FBEDE53367F3
+:10334C005C1F9FF5FBEDE53330FE3AFDF138679FCE
+:10335C00FAFBEDE53330B93AFDF138679FFBFBEF33
+:10336C007830DB3AFDF138679FFEFBEF6C675C0150
+:10337C00D161E8FD2645EF614A3AC8DE08E83A67B4
+:10338C001868FAA43AEF52679D3AEF4D67318E24D4
+:10339C007000DD0D240200DF4030F108FDF138EF44
+:1033AC0038FD2044EF33675C01D1DD05711202EF6B
+:1033BC0003711302675C02D1DD05712202EF037108
+:1033CC002302679FE9FBEF1100EF0E00664C5BDEFA
+:1033DC0007736718BAFBEF0100C6D7C716664C30E7
+:1033EC00DC094C37DE05FDC42FEF6E664C02DF1F87
+:1033FC008FBCFB5C03728F1BFC5C03318E316D0840
+:10340C00616A08128F1BFC5C80312A6162EF59667D
+:10341C004C3DDF0AAE90BF16FCF916FCEF4A664C29
+:10342C003EDF05F917FCEF40664C4FDF05FD4E45BE
+:10343C00EF36664C61DF08E83A0968FA72EF2966E4
+:10344C004C7FDF05FDA83DEF1F664C4EDF0B316452
+:10345C0061045210EF12F2EF0F664C5BDC0452FF6A
+:10346C00EF06667309BAFB72C6D7C788061617F142
+:10347C00241000240500DC07244C00DD17EF177125
+:10348C007BFA17F104BAFB1489617F99717AFA718E
+:10349C003260EF02A43AC6D7C7C1C1FBF8FF401295
+:1034AC00F903DD064012F904DF2F8C027309C2FB0D
+:1034BC005E0AD1DF248C02318E04BAFB14896E0AA9
+:1034CC0099716207CC0100316207086159018C01C6
+:1034DC00D1DFF4716307716B271004C6D7CF1BFCC7
+:1034EC0003F519FCF51DFCF51FFCD7C7880616174C
+:1034FC00F1E734020025DD3D23DD1725DD1C23DD3E
+:10350C000523DD2BEF3B716260679F1EFCCD3F03F3
+:10351C00EF2F675C839F1BFCEF27675C039F1DFCF1
+:10352C00675C034C0261F8710262FD4147EF126760
+:10353C009F1FFCEF0C6791DF08E0C15012FDA43413
+:10354C00C0C6D7C71617F1E7240000DD2A23DD1EFD
+:10355C00240300DD0724FB00DD24EF253112620576
+:10356C00308000EF01F6086F1CFC7208EF198F1900
+:10357C00FCF519FC72EF107142615235EF09F2EF54
+:10358C000666730918FC72C6D7C71617F1E7240034
+:10359C0000DD38241000DD1C23DD1C23DD30240E5F
+:1035AC0000DD18241100DD1B240F00DD1224300077
+:1035BC00DD15EF1EE2EF1D5202EF195204EF15520A
+:1035CC0006EF115205EF0D5207EF09F2EF06520309
+:1035DC00EF0252FFC6D7C7314460377143608D3E4E
+:1035EC009FC2FB8D3D9FE1FB36FCFCC7D83DFD9F88
+:1035FC0037618A70618AFDE437C0D842F1312F609F
+:10360C009D418D3C4B41DD0A7152608D419D3CCDFD
+:10361C003F034A3F05DE09305436FDF138CD3F6B90
+:10362C00B43F7150F000CE300BCF170006CE3106F0
+:10363C00FDB802717A30710BE3710BE7C6D78D417F
+:10364C009D3C8D419FC3FBD74012F903DF0640120E
+:10365C00F904DF02F2D73154600D7153607173605D
+:10366C008D419F28FCEF3831646023716360717267
+:10367C0060D51EFCDF05F529FCEF0B8F1EFC5002FC
+:10368C00D6A1609F29FC8F29FC9F28FCEF11317477
+:10369C0060088F29FC9F28FCEF058D419F28FC8F2B
+:1036AC0028FC9FC3FBD928FCFDC736E928FC09DAA6
+:1036BC002170C15013FD4505C0F2D7C7C1C1FBF83D
+:1036CC00FF8C02D1DF05F51EFCEF1A8C024C05DED7
+:1036DC0006CF1EFC02EF0E8C02318E1231FE03312E
+:1036EC001F609F1EFC8F2AFC4F1EFCDD29CC011F86
+:1036FC008F1EFC9F2AFCCC00008B4C08DE148B73B5
+:10370C00091A224F1EFCDC058B9C01EF0561590048
+:10371C00EFE78C019D401004C6D7C7168B728C0145
+:10372C00614ADE1F8B728C02614ADE138C01728C33
+:10373C0002614ADE058C0172EF268C0272EF218B3E
+:10374C0072EF1D8B728C02614ADE048B72EF118C4E
+:10375C0001728C026142DE058C0172EF038C0272E5
+:10376C00C6D7C716710AE7710BE37150F000CE3063
+:10377C000BCF170006669E31FDB802717A30710BC3
+:10378C00E33182E302EFFA8D1F7158F000710BE701
+:10379C0072C6D7C7C1C1FBF8FF8F12FC4E02DC0307
+:1037AC00F2EF318C024F13FCDC0452FFEF268C023B
+:1037BC002F12FC706131318D128F13FC2F12FC70A3
+:1037CC00613133BDD813FD310EBB440001DC03F66F
+:1037DC0090BB8B721004C6D7C7C1FBF8FFAC0814A2
+:1037EC00A91489708B6128706131FD744E134403E8
+:1037FC000071FEDC23AC08148A04819A04AC081412
+:10380C008A044C11DC10A9148B99AC0814CA020060
+:10381C00AC0814CA0310EF72AC0814CA0400AC084C
+:10382C0014A914894DDE0AAC08148A02819A02EF9D
+:10383C0012AC0814A914894D61D308AC08148A027F
+:10384C00919A02AC08148A03919A03D1DF3CAC081C
+:10385C00148A024C10DF10A91489318EA112AC0805
+:10386C0014A9146299EF17AC08148A024CF0DF0EFD
+:10387C00A91489318EB112AC0814A9146299AC0840
+:10388C0014CA0200AC0814CA0310C0C6D7EDDC3849
+:10389C00717BFAC7D44461F83104612E71046171F3
+:1038AC002161710361D444DD05B444CEABAC717AB3
+:1038BC00FA5600664C0ADD1272F3311C7902FDCE09
+:1038CC00FC0061CAFD3B3986EFE9717AFAF2C6D782
+:1038DC00C75600664C0ADE0BF0317E12F6782CFCD3
+:1038EC0086EFF0C6D7C7C1C1FBF8FFCC01008C0135
+:1038FC004C0ADE36717BFA8C01F0317E042CFC1400
+:10390C00A96168DF09AC02B9717AFAF2EF1D8C017A
+:10391C00F0317E12792CFC614902DF06717AFAE2F1
+:10392C00EF09717AFA615901EFC4E21004C6D7C7E6
+:10393C002004FBF8FFF6422CFC61F8ED1D3A717B7C
+:10394C00FA9C038C034C0ADE3C8C03F0317E042C75
+:10395C00FC14A96168DF05717AFAEF29717AFA8C87
+:10396C000372F3311C792CFCCEFC0061CA629C0200
+:10397C00D1DF0A8C03F0317E12E6782CFC717BFAD5
+:10398C00615903EFBECC0200CC01018C02F0317EF8
+:10399C00042CFC14A96168DD788C02F0317E12795C
+:1039AC002CFCE743DF658C014C0ADE5F8C01F031A7
+:1039BC007E12792CFCE743DD4D717BFA8C01F031E2
+:1039CC007E042CFC14A96168DF186169018C01F07C
+:1039DC00317E12F6782CFC8C024E01DCED717AFAF9
+:1039EC00EF2F8C01F0317E042CFC14A9128C02F008
+:1039FC00317E33782CFC8C01F0317E12E6782CFC75
+:103A0C00615902717AFA615901EF9B615902ED9784
+:103A1C003900F21004C6D7C7200CFBF8FF170406B8
+:103A2C0000C15006C150A8C15030FD04031006D28D
+:103A3C00DD1DA040FC4040FC08DE03E2EF6B34FAD5
+:103A4C00FB895CFC99FDFE3A7110C8FBF2EF5A3011
+:103A5C000600C117040600C130FFFBFD7C4E1004AC
+:103A6C00F540FC8FFAFB5C01D1DD264012F903DF37
+:103A7C00205010C180FDA434C0C736100571D4C6C7
+:103A8C00DE0F17C15006C150A8C15030FD04031001
+:103A9C00064012F901DD114012F905DD0B8FFAFB1E
+:103AAC005C02D161E8FD5142F2100CC6D7D9FBFB88
+:103ABC00C15030FDDC02C0629FFEFB7130CBFB8F2E
+:103ACC00D3FB5C08D1DF06716307716B27F2D7D982
+:103ADC00FEFBC1D9FDFBC15030FD760310047130E3
+:103AEC00CBFB8FD3FB5C08D1DF06716307716B27AF
+:103AFC00F2D7C7200AFBF8FF500FC15030FDDC0293
+:103B0C00C04A3902DF077110C8FBF2EF5F7118C8A9
+:103B1C00FBCC07004015F901DF05CC0802EF03CC04
+:103B2C000810CC09808FFAFB5C03D1DF08717AD5C1
+:103B3C00CC0607EF06717BD5CC062F17040600C107
+:103B4C005004C150A0C15030FDAC031006C7361054
+:103B5C000571D4C6DE154012F903DF0F17C15006EC
+:103B6C00C150A8C15030FD04031006F2100AC6D78C
+:103B7C00D512F9DF06F6BD46F544FCD544FCDD0450
+:103B8C00B044FCD7CF44FC048F12F9318FE723DD0E
+:103B9C000B24020024030061C8EDA13C8F14F93101
+:103BAC00233E301B004646DF0AE0C15010FDA43412
+:103BBC00C0EF1D3077014646DF165002C15010FD94
+:103BCC00A434C0F6464CDF088FDEFB5010D6BD4C3B
+:103BDC00F6464CDD36B64C464CDF3071025FEF2BAF
+:103BEC00301B004646DF13F6464EDF18E0C150107E
+:103BFC00FDA434C0C94E5307EF0A30770146466125
+:103C0C00F871025FF6464E61E8B64E3134620871C7
+:103C1C003361F6BD46EF1431346105F6BD46EF0B4A
+:103C2C00A646F6464661F8C946FFFF314262194A7C
+:103C3C004805DE16A4484A4805DF0FA4485004C1C5
+:103C4C005010FDA434C0EF02F448314462194A4AC2
+:103C5C0005DE16A44A4A4A05DF0FA44A5008C15093
+:103C6C0010FDA434C0EF02F44AD44BDD03B44BD79F
+:103C7C00315262174A4905DE14A4494A4905DF0D41
+:103C8C00A4495010C1FDA434C0EF02F4494A4906BE
+:103C9C0061F8CD4B25D7C736100571D4DE0730231C
+:103CAC003AFDF138D24012F903DF1D3122070630FC
+:103CBC00042AFDF1383144610C7143615080C150CC
+:103CCC0012FDA434C0FDD93CFD043DC6D78F1BFCAE
+:103CDC005C01D1DD22D547FCDD04B047FCD7CF47D2
+:103CEC00FC098D404F46FCDD0E8D409F46FC50403C
+:103CFC00C15012FDA434C0D74012F903DD04F6BD47
+:103D0C001AD7D5E6FBDF08F6461ADD19B61AD7D94D
+:103D1C00E2FBF1461ADD0ED9E2FB12AD1A43DE03CB
+:103D2C00A61AD7B61AD7717BFAC78FDAFB76F5DAF3
+:103D3C00FB717AFA5C10D161E8715261665C0FD14B
+:103D4C00DD57665C01D1DD05F512F9EF4C665C02BE
+:103D5C00D1DD11E0C15003FD492BC0711300711B63
+:103D6C0020710303665C04D1DD11711300711B20FB
+:103D7C00D51BFC61F8710303FDE934665C08D16165
+:103D8C00E87103035005FD40027102035003C1FDAD
+:103D9C00492BC0711A20FDF12AF2C6D7C72014FB9B
+:103DAC00F8FF4A3413DC0552FFEDB73E8F14F9319E
+:103DBC001505300400EF0F8F14F93145053005005F
+:103DCC00EF04D915F9F1609C018D2E9C028D209C7D
+:103DDC00038F02F99C048F03F99C058D509C068D72
+:103DEC00289C0771345EE661301271045E61DC312F
+:103DFC00196162629C08CC09018F16F99C0AF17159
+:103E0C00240461DC9C0BAE6C609C0CAD1A609C0DA8
+:103E1C00AE6E609C0EAE6A609C0FAE64609C10F13E
+:103E2C0071540761DC9C11AE66609C123114020562
+:103E3C00308000EF01F6C131246205304000EF0103
+:103E4C00F6C2616B08616A08C13134040530200088
+:103E5C00EF01F6C2616B08616A08C13124020530BA
+:103E6C000800EF01F6C2616B08616A08C131546247
+:103E7C0005300400EF01F6C2616B08616A08C131BC
+:103E8C00446204E6A1EF01F6C2616B08616A08C1E5
+:103E9C0031346203E6EF01F6C2616B08616A9C1370
+:103EAC00A434D834F1B107A11489721014C6D7C741
+:103EBC00FD76098F12F9318FE724000061F8ED8649
+:103ECC004023DD1B2361F8ED903F2361F8ED0C409E
+:103EDC002361F8ED55402361F8ED3541ED83404009
+:103EEC0013F901DF29F64646DD05F516FDEF03A0B3
+:103EFC0016FD4016FD65DC0CF6BD46F512F9710297
+:103F0C0061EDC541AD4644060061D8EDC541713245
+:103F1C0061FDCE0471535EFDB1234015F903DF0939
+:103F2C00710261F512F9EDC541FD182640C7FB9BE6
+:103F3C00DE09710261F512F9EDC541714A27714034
+:103F4C00110571301105713A22715A227150110507
+:103F5C00FD4E29D2DD09710261F512F9EDC54171F1
+:103F6C00103500CF37001D714012054013F901DFE9
+:103F7C0005F5E3FBEF04CFE3FB03CF12F902FD34AD
+:103F8C0029EDC541FD4B2CFDAA2C714A9DFDE93450
+:103F9C00FD6530F537FF712BE0F513F9710261CB3C
+:103FAC00E43FEFCBE6F6F0FDCE04713BD471120288
+:103FBC007123028F14F93105285004FD5A2B625CD1
+:103FCC0003318E315D34C9FB896168995002FD5A09
+:103FDC002BD2DD067170C9FBEF047178C9FBFDB102
+:103FEC0023FD612D710814F9CF12F9038FBCFB5C12
+:103FFC0002D1DD095080C15010FDA434C0EDC54183
+:10400C00FDC7413154612FA452D452DD0831A4E0D4
+:10401C000A31020C06712BE0FD3D4231A4E0173150
+:10402C00040C13712BE05027C15005FD492BC0CF58
+:10403C0012F904710261FD32428F14F931250731F6
+:10404C00146203F512F9EDC541FDC74131020C14A0
+:10405C00F0C15005FD492BC05005FD4002FD3D420D
+:10406C00CF12F903FD32428F14F931250731146256
+:10407C0003F512F9EDC541F512F9CFE3FB03F5E4B5
+:10408C00FBF5E6FB71525FF6426CFF61E8EDC54152
+:10409C00F6BD4C71035FF5FAFBFDFE3AFDC72DFD35
+:1040AC00A12CFDFF2C714B9D711302712302F5CADB
+:1040BC00FBF5CBFBF5CCFBF5CDFB31245F02EFFA26
+:1040CC00CE3708CBE4BFFFCBE6FFF3CED4FFCF3720
+:1040DC00000971481205F6BEE0BEE2BED0716A2737
+:1040EC00FDC629714307714B2771481005714811A2
+:1040FC00057138100571381105713302713B22714D
+:10410C005302715B227158100571581105CF12F9C9
+:10411C0005713261F6BD46F50CFCF50EFCCF14FCB6
+:10412C00FFCF10FCFFCF11FCFFF513F9F516FD3195
+:10413C0012622EFDB123AD4644070061C8E512F9A9
+:10414C00D515F961E8FD2B058F14F9312511F50E04
+:10415C00FCF50CFC502EFD4002E513F9E512F9EFCD
+:10416C0058D42ADF54FD2B05FD4A2371730171329B
+:10417C000471430271035E71525E31949E02EFFA38
+:10418C00712AE7CEA409F5F3003114620261FDF443
+:10419C0044FD7609E5F300CEA40831126206CF1275
+:1041AC00F905EF09713361E513F9E512F9712BE7A4
+:1041BC008F14F9312503F512F9C6D7D548FCDF1A4F
+:1041CC00310200155003FD5A2B625C01D1DF07F55B
+:1041DC0012F9710261D7E548FCD74048FCF0DF08C2
+:1041EC0031040041F548FCD74048FCC8DF0BF51200
+:1041FC00F9710261CF48FCF0D73102000A4048FC4B
+:10420C00FFDD22A048FCD7F0C15004FD492BC08F24
+:10421C00C9FB5C9F9FC9FB7110DAFB30323DFDF18D
+:10422C0038CF48FCF0D731045F06F512F971026102
+:10423C00D7715361F452717207FDB802717307D7CD
+:10424C00FD8C05F2D7717BFAC7200CFBF8FF8F00B1
+:10425C00FCF0F9FFFBF303FD744E13BC048F02FC5E
+:10426C00F0F901FCF303FD744E13BC028F04FCF057
+:10427C00F903FCF303FD744E13BB717AFAAC04BD65
+:10428C00D8F6BDDAAC04311EBDDCF6BDDEFDE40DA6
+:10429C00ADD8BDDCADDABDDEAC02BDD8F6BDDAAC56
+:1042AC0002311EDADCC3DADEC3BDDCF6BDDEFDE4B2
+:1042BC000DC0BDDEC0BDDCADDEFD5A0FADD8BDDC22
+:1042CC00ADDABDDEABBDD8F6BDDAAB311EDADCC380
+:1042DC00DADEC3BDDCF6BDDEFDE40DC0BDDEC0BD67
+:1042EC00DCADDEFD5A0FDADAADD8FD3C46C3C58F26
+:1042FC00E2FC5C3FF0317E0462FC14C2C0B9A0E267
+:10430C00FCF6BC08BC0A9C078C074C2EDD3E8FE2E9
+:10431C00FC0E0770F161DC605C3FF0317E1279625B
+:10432C00FCBDD8F6BDDA8C0773092422318FBDDCB5
+:10433C0070BDDEFDE40DAC08BDDCAC0AFD5A0FAD62
+:10434C00DABC0AADD8BC08615907EFBCAC08BDD8C3
+:10435C00AC0ABDDAC9DC0004F6FDAE0EC9DCFFFF09
+:10436C00F6FDAF0FADD8BF5CFCAF56FC425CFCDD7C
+:10437C0012AF58FCBF5AFCAF56FCBF58FCAF5CFCEC
+:10438C00BF56FCAF58FC425AFCDC50AF56FC4258AE
+:10439C00FCDE48AF18FD4256FCDE40401CFD16DC2E
+:1043AC001F401CFDA0DE168F5EFC4F1CFDDE0EAF09
+:1043BC0056FC2260FC44691061C8FD2044F51CFDCC
+:1043CC00AF56FC445146DC0BAF56FC241027BF1AE9
+:1043DC00FDEF1130F82ABF1AFDEF09401CFDFF61FB
+:1043EC00E8A01CFDAF5AFC4258FCDC1BAF58FC4249
+:1043FC0056FCDE13AF56FC421AFDDE0BF55EFCAF2D
+:10440C0056FCBF60FCEF09405EFCFF61E8A05EFC5F
+:10441C00100CC6D7717BFAC7710A9E31929E02EFBF
+:10442C00FA8E949F50FC8E969F51FC8E979F52FC57
+:10443C008E989F53FC8E939F54FC8E929F55FC71CB
+:10444C000B9E717AFA8F53FCFDC30F76FDBA4513A0
+:10445C00BD58D505FCDF0AD506FCDF05D507FCDD0C
+:10446C0025F6B14658DF11C9583722665C0391DF37
+:10447C00060A58181A59009617FDDD4613FDF84424
+:10448C0031646102EF61520692926950FC684AFCF9
+:10449C00DFF6AD58BD56F854F3311C7918F944FECB
+:1044AC00FFDD44D854F1010418F914A944FFFFDFCF
+:1044BC0004E6B9EF0BD854F1010418F914A9A1B909
+:1044CC00717BFAA005FCD505FCDF1CA006FCD5060B
+:1044DC00FCDF14A007FCD507FCDF0CCF05FCFFCFDD
+:1044EC0006FCFFCF07FCFFC6717AFAD7C716D85463
+:1044FC00F10744A800DC05716261EF1CF647DD187A
+:10450C00A4544A54A8DC05716261EF0CF854F331E1
+:10451C001CF67818F9B7EFE4C6D7C756A89666F01C
+:10452C00317E12F6B17818F966D1DFF1717BFAF5AC
+:10453C0005FCF506FCF507FCF454716361C6717A51
+:10454C00FAD7C72004FBF8FFD434DF178D549FE350
+:10455C00FC717BFA52069292694AFC68E4FCDFF625
+:10456C00717AFA4A3406DE0EE83409E4FC9C03A4A2
+:10457C00348C0372EF34F9E3FCF3311C7918F9BB7A
+:10458C00317261058B9C03EF128C019C03D5E3FC0B
+:10459C00DF06CFE3FCA7EF03B0E3FC71807177611A
+:1045AC0061DC61FB7171618C03721004C6D7C7208A
+:1045BC0008FBF8FF8F53FCFDC30F9C078F52FCFDCB
+:1045CC00C30F9C068F51FCFDC30F9C058F50FCFD47
+:1045DC00C30F9C048F54FC9C038F55FC9C028C06CF
+:1045EC00318E0112795222BB8C075C03D1DF098C0E
+:1045FC00064C0361C86179008C05318EB1610900EC
+:10460C00BB313D120103BB8B0E04708C011C00BB33
+:10461C008F0AFC4E03DC0E8C034F0AFCDC0B8C0265
+:10462C004F0BFCDC04AB12EF03ABB1121008C6D776
+:10463C00C7C3C12008FBF8FFF661490A61F861495C
+:10464C0008DF07F7340000EDD946E6BC04F6BC06DB
+:10465C00AC0ABC02AC08BBAC06614902AC0461F804
+:10466C00614900DE28AC04BDD8AC06BDDAE1FD69B9
+:10467C000FADDABC06ADD8BC04ABBDD8AC02BDDA0C
+:10468C00E1FD840FADDABC02ADD8BBEFCAAC06BC01
+:10469C0002AC04BBAC08BDD8AC0ABDDAAC04BDDCC2
+:1046AC00AC06FDE70EAC04BDDCAC06FD5A0FE1FD1B
+:1046BC00840FADDABC06ADD8BC04AC06614902ACC3
+:1046CC000461F8614900DCC5AC0214AB12100CC6D5
+:1046DC00D7C7C12004FBF8FF8F4DFCFDC30F9C0313
+:1046EC004E04DF1CAD564658DE07AD58265612EF69
+:1046FC0040F64658DF074656DD03E7EF34F7EF3157
+:10470C008C04318EB1128C03318E43DF1830382279
+:10471C0026560658BB8C045C0391DF05AB041800CD
+:10472C00BBAB12EF0C8C034E04DE0532A900EF017B
+:10473C00F71006C6D7717BFA31026209F6465ADDCC
+:10474C0004B65AEF7C710362717AFA4012F904DFF5
+:10475C0007715307F424EF69D9E5FBF1E724000056
+:10476C00DD0F23DD1A23DD1023DD5323DD2723DDAD
+:10477C0038715307F424EF49715207F424EF42D4F3
+:10478C0024DF07715207E424EF05715307F424C9A1
+:10479C005AFA00EF2CD424DF0B715207E424C95AC7
+:1047AC00FA00EF1DF5E5FBEF18D424DF0B7153076E
+:1047BC00E424C95AFA00EF09CFE5FB02EF03FDCE62
+:1047CC0047D7D91DFCF1E7240000DD0923DD2123A7
+:1047DC00DD0923EF1B715307F424D7D424DF0771B1
+:1047EC005207E424EF05715307F424C95A2D01D75D
+:1047FC00715207E424D731425F01D771635FD9E36B
+:10480C00FBF1E7240000DD1223DD1923DD1123DD8C
+:10481C002623DD3423DD3923DD3FFD8E48EF3DFDBE
+:10482C00AF48EF38D9E2FBC1AE6CFD082DC0F313D5
+:10483C00BE6C712304EF25F0C1AE6CFD082DC0F3E6
+:10484C0013BE6C712304EF14F6BE6C712204EF0CD2
+:10485C00CB6CFF00712304EF03FD23494012F905D3
+:10486C00DD064012F901DF0671230471635F3164C8
+:10487C005F0FF6BE64BE6A31220402EF02F690BEF0
+:10488C006ED7CD2647F45CAE6C317DBFF0FCFDF8E5
+:10489C0048D2DF0ED9E2FBC1AE6CFD082DC0F3137C
+:1048AC00BE6CD7FDF848D2DD0DCD2647F45CAE6C5E
+:1048BC00317DBFF0FCD7E85C096C225080D6BFEC90
+:1048CC00FC22F0FCBDD8304700FD0F0EBFEEFC30D3
+:1048DC00ECFCFD1E2DF313BE6CB426D426DF0CCDE0
+:1048EC002647A45C4A5C1F61C8F45CD740C5FB0B2F
+:1048FC00DC05712304F2D740C5FB0661D831225E7A
+:10490C0011F0C1AE6CFD082DC0F313BE6C71220406
+:10491C00EF03FD2349E2D771625FF0C1AE6CFD0875
+:10492C002DC0F313BE6CA0F2FC40F2FC40DC3DF554
+:10493C00F2FCD9F3FCF1313F041EFD14D9F3FCF168
+:10494C00BDD85008FD5E0E087208E6D2DD04019257
+:10495C00DFFC896158D1DD05712204EF037123045A
+:0D496C00A0F3FC40F3FC2061C8F5F3FCD77C
+:1049790061FC61FCC1C3C5C7520C929269D4FEC1E6
+:10498900DFF88EFD708EFCC1717AFA4012F903DFEF
+:104999000630042AFDF138C09EFC609EFD34D4FE29
+:1049A9005206C0B9A5A592DFF9C6C4C2C061FC61AF
+:1049B900DF520C929269D4FEC1DFF88EFD708EFC35
+:1049C900C18F4105775C04D1DD06675C01D1DD50FB
+:1049D900313460367162077133608FCAFB5FD2FB75
+:1049E900D1DF1B8FCBFB5FD3FBD1DF128FCCFB5FFA
+:1049F900D4FBD1DF098FCDFB5FD5FBD1DD0C316253
+:104A09000702EFFA716307716B27717361FD0E304D
+:104A1900F4227148500571605005717AFAED274BFF
+:104A2900675C02D1DD17D422DD134A2202DD0E00B4
+:104A3900F4227148500571605005717AFA717AFA59
+:104A49008D22318FE7240000DD0823DD1423DD31B9
+:104A5900EF50F4347140500571505005E422ED27B0
+:104A69004B8F40059F0EF9715050058F0EF99F101D
+:104A7900F9D90EF9FDE733629F0FF9CD2202ED272F
+:104A89004B675C02D1DD18675C10D1DD05CD2203CF
+:104A9900EF107148500571605005F422ED274BCD98
+:104AA90022044A2203DF138F0FF99F4005D90FF91A
+:104AB900C1D90EF9FD7634C0EF228F4005768F0EED
+:104AC900F901DC06400EF902DE0671605005EF4E71
+:104AD900C7D90EF9FD8E30C071505005D910F9F1C2
+:104AE900242900DD2A240400DD25242200DD2024D8
+:104AF9001100DD0C240100DD16241E00DD11EF0C70
+:104B0900400EF960DF09CF0EF961EF03A00EF94AF3
+:104B19002203DF0AD90EF9FDE733629F0FF9C09E20
+:104B2900FC609EFD34D4FE5206C0B9A5A592DFF9FA
+:104B390061FCC1C7717AFA714AE5717BBD51405F69
+:104B49000401D1DD06F616A747DFF2300400BF24C1
+:104B590001F6BF2A01300B0BBF280100000000003D
+:104B6900000000510FBF28010000000000000000F4
+:104B7900500FBF2801710AE671235FC6C061FCC1ED
+:104B8900C5717AFAD438DD0BEA36899E44A636B463
+:104B990038EF33710AE6300400BF2401F6BF2A0159
+:104BA900300B0BBF28010000000000000000510F6E
+:104BB900BF28010000000000000000500FBF2801BD
+:104BC90071135F71235FC4C061FC61EF520C929253
+:104BD90069D4FEC1DFF88EFD708EFCC12006FBF89A
+:104BE900FF71503002CEABACCC0100F6BC0231B241
+:104BF900E20F617902F6614902DFF371603002EF79
+:104C09007E8E519B713BE28B5C02D1DD1D8B5C0872
+:104C1900D1DF0971503002CC0100EFCF8C0570FD56
+:104C29004F35629E50CC0102EFC18B5C03D1DF404E
+:104C39008E509C04715030028C01D1DF0E8C0470AF
+:104C4900FD9535629C05CC0101EF318C014C02DFE9
+:104C59000671603002EF28CF34025A716030028C3D
+:104C69000470C18C0570FDF734C0CF34024AEF0FD0
+:104C79008B5C01D1DD0671603002EF03EDF44B105E
+:104C890006C09EFC609EFD34D4FE5206C0B9A5A59F
+:104C990092DFF961FCC1C3C5C7520C929269D4FE77
+:104CA900C1DFF88EFD708EFCC1710A9E31929E02A1
+:104CB900EFFA8FF4FB4F96FFDF198FF5FB4F97FF44
+:104CC900DF118FF6FB4F98FFDF095004C15011FD2A
+:104CD900A434C0710B9EC09EFC609EFD34D4FE526C
+:104CE90006C0B9A5A592DFF9C6C4C2C061FCA44437
+:104CF90061FCC1C3C5C7520C929269D4FEC1DFF8E9
+:104D09008EFD708EFCC1C1FBF8FF8D1F9C018E3199
+:104D1900318EE7240600DD0823DD0E23DD22EF4E68
+:104D2900717AFA8C019D3EEF45717AFA4015F901C5
+:104D3900DF068C019D3DEF3651FF2E019D3DEF2E83
+:104D4900717AFA4014FCFFDF068C019D28EF058F6C
+:104D590014FC9D288FC8FB5C01D1DF124012F903B6
+:104D6900DD064012F904DF06306C25FDF1384031CB
+:104D7900FF09DE05A031FFEF137158F000714260A1
+:104D8900A02BFC402BFC0361C8F52BFC710BE3C085
+:104D9900C09EFC609EFD34D4FE5206C0B9A5A59202
+:104DA900DFF9C6C4C2C061FC61FF520C929269D49A
+:104DB900FEC1DFF88EFD708EFCC1717AFA8FFAFBA5
+:104DC9005C03D1DD194012F903DD064012F904DF55
+:104DD9000D36100571D4DE0630233AFDF138C09E38
+:104DE900FC609EFD34D4FE5206C0B9A5A592DFF938
+:104DF90061FC61FC61FC61FC61FC61FC61FC61FCC2
+:104E090061FC61FC61FC61FC61FC61FC61FC61FCB1
+:104E190061FC61FC61FC61FC61FC61FC61FC61FCA1
+:0A4E290061FC61FC61FC61FC61FCAE
+:0A4E340000060C12181E242A303666
+:104E3E000000C2FB0000000042FE000000007C3BB0
+:104E4E00E2358C220248DF2D9A2E4147A23CFF0804
+:0E4E5E00BB3E0000983AF82AFF005555555506
+:084E6C00FF00000000004700F8
+:104E7400317503F7332312D714AEF8C716AC0612F4
+:104E8400C5AC0416F643DD078B99A7A5B3EFF5C2AD
+:024E9400C6D77F
+:024FF4000200B9
+:0A4FF60031343A32343A3238000008
+:00000001FF
+
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/bsr.lmf b/tags/SDK3.0(2.00)/bsr.lmf
new file mode 100644
index 0000000..b7a297f
Binary files /dev/null and b/tags/SDK3.0(2.00)/bsr.lmf differ
diff --git a/tags/SDK3.0(2.00)/bsr_k0r.map b/tags/SDK3.0(2.00)/bsr_k0r.map
new file mode 100644
index 0000000..35ee013
--- /dev/null
+++ b/tags/SDK3.0(2.00)/bsr_k0r.map
@@ -0,0 +1,707 @@
+
+
+
+78K0R Linker W1.33                            Date: 2 Aug 2011 Page:   1
+
+Command:   -yc:\program files (x86)\nec electronics tools\dev -_msgoff -
+           obsr.lmf ..\..\..\..\Program Files (x86)\NEC Electronics Tool
+           s\CC78K0R\W2.13\lib78k0r\s0rm.rel -gi1B339499E033F240BFAAh -p
+           bsr_k0r.map -nkd -gb7EFBFFh -bC:\Program Files (x86)\NEC Elec
+           tronics Tools\CC78K0R\W2.13\lib78k0r\fsl.lib -bcl0rdm.lib -bc
+           l0rm.lib -bcl0rmf.lib -iC:\Program Files (x86)\NEC Electronic
+           s Tools\CC78K0R\W2.13\lib78k0r -dbsr_mcu.dr -s -w0 loader.rel
+            pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2
+           c_twl.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel adc.rel r
+           enge.rel accero.rel self_flash.rel sw.rel task_debug.rel task
+           _misc.rel task_sys.rel pedo_alg_thre_det2.rel ini_VECT.rel ta
+           sk_status.rel led_cam.rel led_pow.rel hal.rel
+Para-file:
+Out-file:  bsr.lmf
+Map-file:  bsr_k0r.map
+Direc-file:bsr_mcu.dr
+
+
+*** Link information ***
+
+    67 output segment(s)
+ 3DE2H byte(s) real data
+  6164 symbol(s) defined
+
+
+*** Memory map ***
+
+
+  SPACE=REGULAR
+
+  MEMORY=BCL0
+  BASE ADDRESS=00000H   SIZE=01000H
+         OUTPUT   INPUT    INPUT      BASE      SIZE
+         SEGMENT  SEGMENT  MODULE     ADDRESS
+         @@VECT00                     00000H    00002H  CSEG AT
+                  @@VECT00 @cstart    00000H    00002H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL loader     00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL main       00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL WDT        00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL i2c_mcu    00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL self_flash
+                                      00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL task_debug
+                                      00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL task_status
+                                      00002H    00000H
+         LDR_CNSL                     00002H    00000H  CSEG PAGE64KP
+                  LDR_CNSL hal        00002H    00000H
+* gap *                               00002H    0000EH
+         @@VECT10                     00010H    00004H  CSEG AT
+                  @@VECT10 ini_VECT   00010H    00004H
+* gap *                               00014H    00008H
+         @@VECT1C                     0001CH    00002H  CSEG AT
+                  @@VECT1C ini_VECT   0001CH    00002H
+* gap *                               0001EH    00006H
+         @@VECT24                     00024H    00002H  CSEG AT
+                  @@VECT24 ini_VECT   00024H    00002H
+* gap *                               00026H    00004H
+         @@VECT2A                     0002AH    00002H  CSEG AT
+                  @@VECT2A i2c_twl    0002AH    00002H
+* gap *                               0002CH    00008H
+         @@VECT34                     00034H    00008H  CSEG AT
+                  @@VECT34 ini_VECT   00034H    00008H
+* gap *                               0003CH    0000EH
+         @@VECT4A                     0004AH    00002H  CSEG AT
+                  @@VECT4A ini_VECT   0004AH    00002H
+* gap *                               0004CH    0000EH
+         @@VECT5A                     0005AH    00002H  CSEG AT
+                  @@VECT5A i2c_ctr    0005AH    00002H
+* gap *                               0005CH    00006H
+         @@VECT62                     00062H    00002H  CSEG AT
+                  @@VECT62 accero     00062H    00002H
+* gap *                               00064H    0005CH
+         ?CSEGOB0                     000C0H    00004H  CSEG OPT_BYTE
+         @@CODE                       000C4H    00000H  CSEG BASE
+                  @@CODE   magic      000C4H    00000H
+                  @@CODE   ini_VECT   000C4H    00000H
+         LDR_CODL                     000C4H    00000H  CSEG
+                  LDR_CODL loader     000C4H    00000H
+                  LDR_CODL main       000C4H    00000H
+                  LDR_CODL WDT        000C4H    00000H
+                  LDR_CODL i2c_mcu    000C4H    00000H
+                  LDR_CODL self_flash
+                                      000C4H    00000H
+                  LDR_CODL task_debug
+                                      000C4H    00000H
+                  LDR_CODL task_status
+                                      000C4H    00000H
+                  LDR_CODL hal        000C4H    00000H
+         ?CSEGSI                      000C4H    0000AH  CSEG
+         LDR_CODE                     000CEH    00976H  CSEG
+                  LDR_CODE loader     000CEH    00196H
+                  LDR_CODE main       00264H    00054H
+                  LDR_CODE WDT        002B8H    00000H
+                  LDR_CODE i2c_mcu    002B8H    002D4H
+                  LDR_CODE self_flash
+                                      0058CH    00373H
+                  LDR_CODE task_debug
+                                      008FFH    00000H
+                  LDR_CODE task_status
+                                      008FFH    00077H
+                  LDR_CODE hal        00976H    000CEH
+         FSL_CODE                     00A44H    00322H  CSEG
+                  FSL_CODE fsl_block_cmd
+                                      00A44H    0002BH
+                  FSL_CODE fsl_block_check
+                                      00A6FH    00013H
+                  FSL_CODE fsl_common
+                                      00A82H    0014FH
+                  FSL_CODE fsl_reset
+                                      00BD1H    00001H
+                  FSL_CODE fsl_si_ibf
+                                      00BD2H    00064H
+                  FSL_CODE fsl_phySwap
+                                      00C36H    0004DH
+                  FSL_CODE fsl_si_common
+                                      00C83H    00061H
+                  FSL_CODE fsl_swap   00CE4H    00030H
+                  FSL_CODE fsl_write
+                                      00D14H    00052H
+         @@LCODE                      00D66H    00277H  CSEG
+                  @@LCODE  @cstart    00D66H    0006DH
+                  @@LCODE  @imul      00DD3H    00011H
+                  @@LCODE  @lumul     00DE4H    0002BH
+                  @@LCODE  @isdiv     00E0FH    00022H
+                  @@LCODE  @iudiv     00E31H    0002DH
+                  @@LCODE  @isrem     00E5EH    00021H
+                  @@LCODE  @iurem     00E7FH    0002FH
+                  @@LCODE  @lsdiv     00EAEH    00039H
+                  @@LCODE  @ludiv     00EE7H    0003FH
+                  @@LCODE  @divuw     00F26H    00034H
+                  @@LCODE  @ladd      00F5AH    0000FH
+                  @@LCODE  @llsh      00F69H    0001BH
+                  @@LCODE  @lursh     00F84H    0001FH
+                  @@LCODE  @iscmp     00FA3H    0000CH
+                  @@LCODE  @lband     00FAFH    00014H
+                  @@LCODE  @bcdtob    00FC3H    0001AH
+* gap *                               00FDDH    00019H
+         MGC_LOAD                     00FF6H    0000AH  CSEG AT
+                  MGC_LOAD magic      00FF6H    0000AH
+
+  MEMORY=ROM
+  BASE ADDRESS=02000H   SIZE=03000H
+         OUTPUT   INPUT    INPUT      BASE      SIZE
+         SEGMENT  SEGMENT  MODULE     ADDRESS
+         MGC_MIMI                     02000H    0000AH  CSEG AT
+                  MGC_MIMI magic      02000H    0000AH
+         @@CNST                       0200AH    00282H  CSEG
+                  @@CNST   @cstart    0200AH    00000H
+                  @@CNST   loader     0200AH    00000H
+                  @@CNST   pm         0200AH    001D0H
+                  @@CNST   i2c_ctr    021DAH    00000H
+                  @@CNST   main       021DAH    00000H
+                  @@CNST   magic      021DAH    00000H
+                  @@CNST   WDT        021DAH    00000H
+                  @@CNST   i2c_mcu    021DAH    00000H
+                  @@CNST   i2c_twl    021DAH    00000H
+                  @@CNST   led        021DAH    00000H
+                  @@CNST   rtc        021DAH    00000H
+                  @@CNST   vreg_ctr   021DAH    00000H
+                  @@CNST   vreg_twl   021DAH    00000H
+                  @@CNST   adc        021DAH    00048H
+                  @@CNST   renge      02222H    00000H
+                  @@CNST   accero     02222H    00000H
+                  @@CNST   self_flash
+                                      02222H    00002H
+                  @@CNST   sw         02224H    00000H
+                  @@CNST   task_debug
+                                      02224H    00000H
+                  @@CNST   task_misc
+                                      02224H    00000H
+                  @@CNST   task_sys   02224H    00000H
+                  @@CNST   pedo_alg_thre_det2
+                                      02224H    00048H
+                  @@CNST   ini_VECT   0226CH    00000H
+                  @@CNST   task_status
+                                      0226CH    00000H
+                  @@CNST   led_cam    0226CH    00000H
+                  @@CNST   led_pow    0226CH    00020H
+                  @@CNST   hal        0228CH    00000H
+         ROM_CODE                     0228CH    026EDH  CSEG
+                  ROM_CODE pm         0228CH    009BFH
+                  ROM_CODE i2c_ctr    02C4BH    0005FH
+                  ROM_CODE i2c_twl    02CAAH    0005EH
+                  ROM_CODE led        02D08H    00265H
+                  ROM_CODE rtc        02F6DH    000E0H
+                  ROM_CODE vreg_ctr   0304DH    0049CH
+                  ROM_CODE vreg_twl   034E9H    000F9H
+                  ROM_CODE adc        035E2H    002B7H
+                  ROM_CODE renge      03899H    0018AH
+                  ROM_CODE accero     03A23H    00159H
+                  ROM_CODE sw         03B7CH    00126H
+                  ROM_CODE task_misc
+                                      03CA2H    00219H
+                  ROM_CODE task_sys   03EBBH    00396H
+                  ROM_CODE pedo_alg_thre_det2
+                                      04251H    004F0H
+                  ROM_CODE led_cam    04741H    000C1H
+                  ROM_CODE led_pow    04802H    00177H
+         @@BASE                       04979H    004BAH  CSEG BASE
+                  @@BASE   loader     04979H    00000H
+                  @@BASE   pm         04979H    0003FH
+                  @@BASE   i2c_ctr    049B8H    00183H
+                  @@BASE   main       04B3BH    00000H
+                  @@BASE   magic      04B3BH    00000H
+                  @@BASE   WDT        04B3BH    00000H
+                  @@BASE   i2c_mcu    04B3BH    00098H
+                  @@BASE   i2c_twl    04BD3H    000CBH
+                  @@BASE   led        04C9EH    00000H
+                  @@BASE   rtc        04C9EH    0005DH
+                  @@BASE   vreg_ctr   04CFBH    00000H
+                  @@BASE   vreg_twl   04CFBH    00000H
+                  @@BASE   adc        04CFBH    000B6H
+                  @@BASE   renge      04DB1H    00000H
+                  @@BASE   accero     04DB1H    0004AH
+                  @@BASE   self_flash
+                                      04DFBH    00000H
+                  @@BASE   sw         04DFBH    00000H
+                  @@BASE   task_debug
+                                      04DFBH    00000H
+                  @@BASE   task_misc
+                                      04DFBH    00000H
+                  @@BASE   task_sys   04DFBH    00000H
+                  @@BASE   pedo_alg_thre_det2
+                                      04DFBH    00000H
+                  @@BASE   ini_VECT   04DFBH    00038H
+                  @@BASE   task_status
+                                      04E33H    00000H
+                  @@BASE   led_cam    04E33H    00000H
+                  @@BASE   led_pow    04E33H    00000H
+                  @@BASE   hal        04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  @cstart    04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  pm         04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  i2c_ctr    04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  i2c_twl    04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  led        04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  rtc        04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  vreg_ctr   04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  vreg_twl   04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  adc        04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  renge      04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  accero     04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  sw         04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  task_misc
+                                      04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  task_sys   04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  pedo_alg_thre_det2
+                                      04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  ini_VECT   04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  led_cam    04E33H    00000H
+         @@CNSTL                      04E33H    00000H  CSEG PAGE64KP
+                  @@CNSTL  led_pow    04E33H    00000H
+         @@CALT                       04E33H    00000H  CSEG
+                  @@CALT   @cstart    04E33H    00000H
+                  @@CALT   loader     04E33H    00000H
+                  @@CALT   pm         04E33H    00000H
+                  @@CALT   i2c_ctr    04E33H    00000H
+                  @@CALT   main       04E33H    00000H
+                  @@CALT   magic      04E33H    00000H
+                  @@CALT   WDT        04E33H    00000H
+                  @@CALT   i2c_mcu    04E33H    00000H
+                  @@CALT   i2c_twl    04E33H    00000H
+                  @@CALT   led        04E33H    00000H
+                  @@CALT   rtc        04E33H    00000H
+                  @@CALT   vreg_ctr   04E33H    00000H
+                  @@CALT   vreg_twl   04E33H    00000H
+                  @@CALT   adc        04E33H    00000H
+                  @@CALT   renge      04E33H    00000H
+                  @@CALT   accero     04E33H    00000H
+                  @@CALT   self_flash
+                                      04E33H    00000H
+                  @@CALT   sw         04E33H    00000H
+                  @@CALT   task_debug
+                                      04E33H    00000H
+                  @@CALT   task_misc
+                                      04E33H    00000H
+                  @@CALT   task_sys   04E33H    00000H
+                  @@CALT   pedo_alg_thre_det2
+                                      04E33H    00000H
+                  @@CALT   ini_VECT   04E33H    00000H
+                  @@CALT   task_status
+                                      04E33H    00000H
+                  @@CALT   led_cam    04E33H    00000H
+                  @@CALT   led_pow    04E33H    00000H
+                  @@CALT   hal        04E33H    00000H
+         @@RLINIT                     04E33H    00000H  CSEG UNIT64KP
+                  @@RLINIT loader     04E33H    00000H
+                  @@RLINIT pm         04E33H    00000H
+                  @@RLINIT i2c_ctr    04E33H    00000H
+                  @@RLINIT main       04E33H    00000H
+                  @@RLINIT magic      04E33H    00000H
+                  @@RLINIT WDT        04E33H    00000H
+                  @@RLINIT i2c_mcu    04E33H    00000H
+                  @@RLINIT i2c_twl    04E33H    00000H
+                  @@RLINIT led        04E33H    00000H
+                  @@RLINIT rtc        04E33H    00000H
+                  @@RLINIT vreg_ctr   04E33H    00000H
+                  @@RLINIT vreg_twl   04E33H    00000H
+                  @@RLINIT adc        04E33H    00000H
+                  @@RLINIT renge      04E33H    00000H
+                  @@RLINIT accero     04E33H    00000H
+                  @@RLINIT self_flash
+                                      04E33H    00000H
+                  @@RLINIT sw         04E33H    00000H
+                  @@RLINIT task_debug
+                                      04E33H    00000H
+                  @@RLINIT task_misc
+                                      04E33H    00000H
+                  @@RLINIT task_sys   04E33H    00000H
+                  @@RLINIT pedo_alg_thre_det2
+                                      04E33H    00000H
+                  @@RLINIT ini_VECT   04E33H    00000H
+                  @@RLINIT task_status
+                                      04E33H    00000H
+                  @@RLINIT led_cam    04E33H    00000H
+                  @@RLINIT led_pow    04E33H    00000H
+                  @@RLINIT hal        04E33H    00000H
+                  @@RLINIT @rom       04E33H    00000H
+         @@CODEL                      04E33H    00000H  CSEG
+                  @@CODEL  pm         04E33H    00000H
+                  @@CODEL  i2c_ctr    04E33H    00000H
+                  @@CODEL  magic      04E33H    00000H
+                  @@CODEL  i2c_twl    04E33H    00000H
+                  @@CODEL  led        04E33H    00000H
+                  @@CODEL  rtc        04E33H    00000H
+                  @@CODEL  vreg_ctr   04E33H    00000H
+                  @@CODEL  vreg_twl   04E33H    00000H
+                  @@CODEL  adc        04E33H    00000H
+                  @@CODEL  renge      04E33H    00000H
+                  @@CODEL  accero     04E33H    00000H
+                  @@CODEL  sw         04E33H    00000H
+                  @@CODEL  task_misc
+                                      04E33H    00000H
+                  @@CODEL  task_sys   04E33H    00000H
+                  @@CODEL  pedo_alg_thre_det2
+                                      04E33H    00000H
+                  @@CODEL  ini_VECT   04E33H    00000H
+                  @@CODEL  led_cam    04E33H    00000H
+                  @@CODEL  led_pow    04E33H    00000H
+* gap *                               04E33H    00001H
+         @@CNSTL                      04E34H    0000AH  CSEG PAGE64KP
+                  @@CNSTL  @bcdtob    04E34H    0000AH
+         @@R_INIT                     04E3EH    0002EH  CSEG UNIT64KP
+                  @@R_INIT @cstart    04E3EH    00000H
+                  @@R_INIT loader     04E3EH    00000H
+                  @@R_INIT pm         04E3EH    00002H
+                  @@R_INIT i2c_ctr    04E40H    00000H
+                  @@R_INIT main       04E40H    00000H
+                  @@R_INIT magic      04E40H    00000H
+                  @@R_INIT WDT        04E40H    00000H
+                  @@R_INIT i2c_mcu    04E40H    00000H
+                  @@R_INIT i2c_twl    04E40H    00000H
+                  @@R_INIT led        04E40H    00000H
+                  @@R_INIT rtc        04E40H    00000H
+                  @@R_INIT vreg_ctr   04E40H    00000H
+                  @@R_INIT vreg_twl   04E40H    00000H
+                  @@R_INIT adc        04E40H    0000CH
+                  @@R_INIT renge      04E4CH    00014H
+                  @@R_INIT accero     04E60H    00000H
+                  @@R_INIT self_flash
+                                      04E60H    00000H
+                  @@R_INIT sw         04E60H    00000H
+                  @@R_INIT task_debug
+                                      04E60H    00000H
+                  @@R_INIT task_misc
+                                      04E60H    00000H
+                  @@R_INIT task_sys   04E60H    00002H
+                  @@R_INIT pedo_alg_thre_det2
+                                      04E62H    00006H
+                  @@R_INIT ini_VECT   04E68H    00000H
+                  @@R_INIT task_status
+                                      04E68H    00000H
+                  @@R_INIT led_cam    04E68H    00000H
+                  @@R_INIT led_pow    04E68H    00004H
+                  @@R_INIT hal        04E6CH    00000H
+                  @@R_INIT @rom       04E6CH    00000H
+         @@R_INIS                     04E6CH    00008H  CSEG UNIT64KP
+                  @@R_INIS @cstart    04E6CH    00000H
+                  @@R_INIS loader     04E6CH    00000H
+                  @@R_INIS pm         04E6CH    00002H
+                  @@R_INIS i2c_ctr    04E6EH    00002H
+                  @@R_INIS main       04E70H    00000H
+                  @@R_INIS magic      04E70H    00000H
+                  @@R_INIS WDT        04E70H    00000H
+                  @@R_INIS i2c_mcu    04E70H    00000H
+                  @@R_INIS i2c_twl    04E70H    00000H
+                  @@R_INIS led        04E70H    00000H
+                  @@R_INIS rtc        04E70H    00000H
+                  @@R_INIS vreg_ctr   04E70H    00000H
+                  @@R_INIS vreg_twl   04E70H    00000H
+                  @@R_INIS adc        04E70H    00000H
+                  @@R_INIS renge      04E70H    00000H
+                  @@R_INIS accero     04E70H    00000H
+                  @@R_INIS self_flash
+                                      04E70H    00000H
+                  @@R_INIS sw         04E70H    00000H
+                  @@R_INIS task_debug
+                                      04E70H    00000H
+                  @@R_INIS task_misc
+                                      04E70H    00000H
+                  @@R_INIS task_sys   04E70H    00000H
+                  @@R_INIS pedo_alg_thre_det2
+                                      04E70H    00000H
+                  @@R_INIS ini_VECT   04E70H    00000H
+                  @@R_INIS task_status
+                                      04E70H    00000H
+                  @@R_INIS led_cam    04E70H    00002H
+                  @@R_INIS led_pow    04E72H    00002H
+                  @@R_INIS hal        04E74H    00000H
+                  @@R_INIS @rom       04E74H    00000H
+         @@LCODEL                     04E74H    00022H  CSEG
+                  @@LCODEL abs        04E74H    00008H
+                  @@LCODEL memcpy_n   04E7CH    0001AH
+* gap *                               04E96H    0015EH
+         MGC_VER                      04FF4H    00002H  CSEG AT
+                  MGC_VER  magic      04FF4H    00002H
+         MGC_TAIL                     04FF6H    0000AH  CSEG AT
+                  MGC_TAIL magic      04FF6H    0000AH
+
+  MEMORY=RAM
+  BASE ADDRESS=FF900H   SIZE=00500H
+         OUTPUT   INPUT    INPUT      BASE      SIZE
+         SEGMENT  SEGMENT  MODULE     ADDRESS
+         @@DATA                       FF900H    003F4H  DSEG BASEP
+                  @@DATA   @cstart    FF900H    00002H
+                  @@DATA   loader     FF902H    00000H
+                  @@DATA   pm         FF902H    0000CH
+                  @@DATA   i2c_ctr    FF90EH    00004H
+                  @@DATA   main       FF912H    0021EH
+                  @@DATA   magic      FFB30H    00000H
+                  @@DATA   WDT        FFB30H    00000H
+                  @@DATA   i2c_mcu    FFB30H    00006H
+                  @@DATA   i2c_twl    FFB36H    00000H
+                  @@DATA   led        FFB36H    0007CH
+                  @@DATA   rtc        FFBB2H    00008H
+                  @@DATA   vreg_ctr   FFBBAH    0005EH
+                  @@DATA   vreg_twl   FFC18H    00010H
+                  @@DATA   adc        FFC28H    00004H
+                  @@DATA   renge      FFC2CH    00014H
+                  @@DATA   accero     FFC40H    00002H
+                  @@DATA   self_flash
+                                      FFC42H    00002H
+                  @@DATA   sw         FFC44H    00002H
+                  @@DATA   task_debug
+                                      FFC46H    00000H
+                  @@DATA   task_misc
+                                      FFC46H    00002H
+                  @@DATA   task_sys   FFC48H    00002H
+                  @@DATA   pedo_alg_thre_det2
+                                      FFC4AH    000A0H
+                  @@DATA   ini_VECT   FFCEAH    00000H
+                  @@DATA   task_status
+                                      FFCEAH    00002H
+                  @@DATA   led_cam    FFCECH    00000H
+                  @@DATA   led_pow    FFCECH    00008H
+                  @@DATA   hal        FFCF4H    00000H
+                  @@DATA   @rom       FFCF4H    00000H
+         @@INIT                       FFCF4H    0002EH  DSEG BASEP
+                  @@INIT   @cstart    FFCF4H    00000H
+                  @@INIT   loader     FFCF4H    00000H
+                  @@INIT   pm         FFCF4H    00002H
+                  @@INIT   i2c_ctr    FFCF6H    00000H
+                  @@INIT   main       FFCF6H    00000H
+                  @@INIT   magic      FFCF6H    00000H
+                  @@INIT   WDT        FFCF6H    00000H
+                  @@INIT   i2c_mcu    FFCF6H    00000H
+                  @@INIT   i2c_twl    FFCF6H    00000H
+                  @@INIT   led        FFCF6H    00000H
+                  @@INIT   rtc        FFCF6H    00000H
+                  @@INIT   vreg_ctr   FFCF6H    00000H
+                  @@INIT   vreg_twl   FFCF6H    00000H
+                  @@INIT   adc        FFCF6H    0000CH
+                  @@INIT   renge      FFD02H    00014H
+                  @@INIT   accero     FFD16H    00000H
+                  @@INIT   self_flash
+                                      FFD16H    00000H
+                  @@INIT   sw         FFD16H    00000H
+                  @@INIT   task_debug
+                                      FFD16H    00000H
+                  @@INIT   task_misc
+                                      FFD16H    00000H
+                  @@INIT   task_sys   FFD16H    00002H
+                  @@INIT   pedo_alg_thre_det2
+                                      FFD18H    00006H
+                  @@INIT   ini_VECT   FFD1EH    00000H
+                  @@INIT   task_status
+                                      FFD1EH    00000H
+                  @@INIT   led_cam    FFD1EH    00000H
+                  @@INIT   led_pow    FFD1EH    00004H
+                  @@INIT   hal        FFD22H    00000H
+                  @@INIT   @rom       FFD22H    00000H
+         FSL_DATA                     FFD22H    00010H  DSEG UNITP
+                  FSL_DATA fsl_common
+                                      FFD22H    00010H
+         @@INITL                      FFD32H    00000H  DSEG UNIT64KP
+                  @@INITL  loader     FFD32H    00000H
+                  @@INITL  pm         FFD32H    00000H
+                  @@INITL  i2c_ctr    FFD32H    00000H
+                  @@INITL  main       FFD32H    00000H
+                  @@INITL  magic      FFD32H    00000H
+                  @@INITL  WDT        FFD32H    00000H
+                  @@INITL  i2c_mcu    FFD32H    00000H
+                  @@INITL  i2c_twl    FFD32H    00000H
+                  @@INITL  led        FFD32H    00000H
+                  @@INITL  rtc        FFD32H    00000H
+                  @@INITL  vreg_ctr   FFD32H    00000H
+                  @@INITL  vreg_twl   FFD32H    00000H
+                  @@INITL  adc        FFD32H    00000H
+                  @@INITL  renge      FFD32H    00000H
+                  @@INITL  accero     FFD32H    00000H
+                  @@INITL  self_flash
+                                      FFD32H    00000H
+                  @@INITL  sw         FFD32H    00000H
+                  @@INITL  task_debug
+                                      FFD32H    00000H
+                  @@INITL  task_misc
+                                      FFD32H    00000H
+                  @@INITL  task_sys   FFD32H    00000H
+                  @@INITL  pedo_alg_thre_det2
+                                      FFD32H    00000H
+                  @@INITL  ini_VECT   FFD32H    00000H
+                  @@INITL  task_status
+                                      FFD32H    00000H
+                  @@INITL  led_cam    FFD32H    00000H
+                  @@INITL  led_pow    FFD32H    00000H
+                  @@INITL  hal        FFD32H    00000H
+                  @@INITL  @rom       FFD32H    00000H
+         @@DATAL                      FFD32H    00000H  DSEG UNIT64KP
+                  @@DATAL  loader     FFD32H    00000H
+                  @@DATAL  pm         FFD32H    00000H
+                  @@DATAL  i2c_ctr    FFD32H    00000H
+                  @@DATAL  main       FFD32H    00000H
+                  @@DATAL  magic      FFD32H    00000H
+                  @@DATAL  WDT        FFD32H    00000H
+                  @@DATAL  i2c_mcu    FFD32H    00000H
+                  @@DATAL  i2c_twl    FFD32H    00000H
+                  @@DATAL  led        FFD32H    00000H
+                  @@DATAL  rtc        FFD32H    00000H
+                  @@DATAL  vreg_ctr   FFD32H    00000H
+                  @@DATAL  vreg_twl   FFD32H    00000H
+                  @@DATAL  adc        FFD32H    00000H
+                  @@DATAL  renge      FFD32H    00000H
+                  @@DATAL  accero     FFD32H    00000H
+                  @@DATAL  self_flash
+                                      FFD32H    00000H
+                  @@DATAL  sw         FFD32H    00000H
+                  @@DATAL  task_debug
+                                      FFD32H    00000H
+                  @@DATAL  task_misc
+                                      FFD32H    00000H
+                  @@DATAL  task_sys   FFD32H    00000H
+                  @@DATAL  pedo_alg_thre_det2
+                                      FFD32H    00000H
+                  @@DATAL  ini_VECT   FFD32H    00000H
+                  @@DATAL  task_status
+                                      FFD32H    00000H
+                  @@DATAL  led_cam    FFD32H    00000H
+                  @@DATAL  led_pow    FFD32H    00000H
+                  @@DATAL  hal        FFD32H    00000H
+                  @@DATAL  @rom       FFD32H    00000H
+* gap *                               FFD32H    000CEH
+
+  MEMORY=RAM2
+  BASE ADDRESS=FFE20H   SIZE=000C0H
+         OUTPUT   INPUT    INPUT      BASE      SIZE
+         SEGMENT  SEGMENT  MODULE     ADDRESS
+         @@INIS                       FFE20H    00008H  DSEG SADDRP
+                  @@INIS   @cstart    FFE20H    00000H
+                  @@INIS   loader     FFE20H    00000H
+                  @@INIS   pm         FFE20H    00002H
+                  @@INIS   i2c_ctr    FFE22H    00002H
+                  @@INIS   main       FFE24H    00000H
+                  @@INIS   magic      FFE24H    00000H
+                  @@INIS   WDT        FFE24H    00000H
+                  @@INIS   i2c_mcu    FFE24H    00000H
+                  @@INIS   i2c_twl    FFE24H    00000H
+                  @@INIS   led        FFE24H    00000H
+                  @@INIS   rtc        FFE24H    00000H
+                  @@INIS   vreg_ctr   FFE24H    00000H
+                  @@INIS   vreg_twl   FFE24H    00000H
+                  @@INIS   adc        FFE24H    00000H
+                  @@INIS   renge      FFE24H    00000H
+                  @@INIS   accero     FFE24H    00000H
+                  @@INIS   self_flash
+                                      FFE24H    00000H
+                  @@INIS   sw         FFE24H    00000H
+                  @@INIS   task_debug
+                                      FFE24H    00000H
+                  @@INIS   task_misc
+                                      FFE24H    00000H
+                  @@INIS   task_sys   FFE24H    00000H
+                  @@INIS   pedo_alg_thre_det2
+                                      FFE24H    00000H
+                  @@INIS   ini_VECT   FFE24H    00000H
+                  @@INIS   task_status
+                                      FFE24H    00000H
+                  @@INIS   led_cam    FFE24H    00002H
+                  @@INIS   led_pow    FFE26H    00002H
+                  @@INIS   hal        FFE28H    00000H
+                  @@INIS   @rom       FFE28H    00000H
+         @@DATS                       FFE28H    00036H  DSEG SADDRP
+                  @@DATS   @cstart    FFE28H    00000H
+                  @@DATS   loader     FFE28H    00000H
+                  @@DATS   pm         FFE28H    0000CH
+                  @@DATS   i2c_ctr    FFE34H    00002H
+                  @@DATS   main       FFE36H    00000H
+                  @@DATS   magic      FFE36H    00000H
+                  @@DATS   WDT        FFE36H    00000H
+                  @@DATS   i2c_mcu    FFE36H    00004H
+                  @@DATS   i2c_twl    FFE3AH    00000H
+                  @@DATS   led        FFE3AH    00000H
+                  @@DATS   rtc        FFE3AH    00000H
+                  @@DATS   vreg_ctr   FFE3AH    00002H
+                  @@DATS   vreg_twl   FFE3CH    00000H
+                  @@DATS   adc        FFE3CH    00008H
+                  @@DATS   renge      FFE44H    00002H
+                  @@DATS   accero     FFE46H    00000H
+                  @@DATS   self_flash
+                                      FFE46H    00000H
+                  @@DATS   sw         FFE46H    0000AH
+                  @@DATS   task_debug
+                                      FFE50H    00000H
+                  @@DATS   task_misc
+                                      FFE50H    00002H
+                  @@DATS   task_sys   FFE52H    00002H
+                  @@DATS   pedo_alg_thre_det2
+                                      FFE54H    00006H
+                  @@DATS   ini_VECT   FFE5AH    00000H
+                  @@DATS   task_status
+                                      FFE5AH    00000H
+                  @@DATS   led_cam    FFE5AH    00002H
+                  @@DATS   led_pow    FFE5CH    00002H
+                  @@DATS   hal        FFE5EH    00000H
+                  @@DATS   @rom       FFE5EH    00000H
+         @@BITS                       FFE5EH    00005H  BSEG
+                  @@BITS   @cstart    FFE5EH.0  00000H.0
+                  @@BITS   loader     FFE5EH.0  00000H.0
+                  @@BITS   pm         FFE5EH.0  00001H.0
+                  @@BITS   i2c_ctr    FFE5FH.0  00000H.0
+                  @@BITS   main       FFE5FH.0  00000H.1
+                  @@BITS   magic      FFE5FH.1  00000H.0
+                  @@BITS   WDT        FFE5FH.1  00000H.0
+                  @@BITS   i2c_mcu    FFE5FH.1  00000H.3
+                  @@BITS   i2c_twl    FFE5FH.4  00000H.0
+                  @@BITS   led        FFE5FH.4  00000H.4
+                  @@BITS   rtc        FFE60H.0  00000H.3
+                  @@BITS   vreg_ctr   FFE60H.3  00000H.1
+                  @@BITS   vreg_twl   FFE60H.4  00000H.0
+                  @@BITS   adc        FFE60H.4  00000H.4
+                  @@BITS   renge      FFE61H.0  00000H.3
+                  @@BITS   accero     FFE61H.3  00000H.0
+                  @@BITS   self_flash
+                                      FFE61H.3  00000H.0
+                  @@BITS   sw         FFE61H.3  00000H.1
+                  @@BITS   task_debug
+                                      FFE61H.4  00000H.0
+                  @@BITS   task_misc
+                                      FFE61H.4  00000H.2
+                  @@BITS   task_sys   FFE61H.6  00000H.0
+                  @@BITS   pedo_alg_thre_det2
+                                      FFE61H.6  00000H.2
+                  @@BITS   ini_VECT   FFE62H.0  00000H.0
+                  @@BITS   task_status
+                                      FFE62H.0  00000H.0
+                  @@BITS   led_cam    FFE62H.0  00000H.1
+                  @@BITS   led_pow    FFE62H.1  00000H.0
+                  @@BITS   hal        FFE62H.1  00000H.6
+* gap *                               FFE63H    00071H
+         @@SEGREG                     FFED4H    00004H  DSEG AT
+                  @@SEGREG @SEGREG    FFED4H    00004H
+         @@RTARG0                     FFED8H    00008H  DSEG AT
+                  @@RTARG0 @RTARG0    FFED8H    00008H
+
+
+ Target chip : uPD79F0104
+ Device file : E1.00b
+
\ No newline at end of file
diff --git a/tags/SDK3.0(2.00)/bsr_mcu.dr b/tags/SDK3.0(2.00)/bsr_mcu.dr
new file mode 100644
index 0000000..bd8099c
--- /dev/null
+++ b/tags/SDK3.0(2.00)/bsr_mcu.dr
@@ -0,0 +1,48 @@
+;;; �̈�̒�`
+;32kB = 0x7FFF
+MEMORY BCL0:     (00000H, 01000H )
+;MEMORY BCL1:    (01000H, 01000H )          ; �o�b�N�A�b�v�̈�
+MEMORY ROM :     (02000H, 03000H )
+;MEMORY ROM_BKUP:(05000H, 03000H )          ; �o�b�N�A�b�v�̈�
+;MEMORY OCD :(0FC00H, 00400H )          ; OCD���g���Ă���炵��
+
+
+;;; �Z�O�����g�̊�����ݒ�
+; �u�[�g�u���b�N0�Ɋ��蓖�Ă�
+MERGE LDR_CODE : =BCL0
+MERGE LDR_CODL : =BCL0
+MERGE FSL_CODE : =BCL0         ; =FSL ; �ސ��t���b�V�����C�u����
+MERGE @@LCODE  : =BCL0         ; �X�^�[�g�A�b�v���[�`��
+;MERGE @@LCODEL : =BCL0
+
+;MERGE LDR_RINT:=BCL0
+;MERGE LDR_CNST:=BCL0
+MERGE LDR_CNSL:=BCL0
+
+
+
+; �ʏ�̈�ɒu��
+MERGE ROM_CODE:=ROM
+MERGE @@CNST:    =ROM
+MERGE @@R_INIT:  =ROM        ; ROM�ȊO�ɒu�������Ȃ�X�^�[�g�A�b�v���[�`����v�C��
+
+
+
+
+
+
+; �}�W�b�N�i���o�[
+;; magic.c�̒��Ŏw��
+
+
+;--- RAM�̈� -------------------------------------------------------
+;
+; RAM1,RAM2�̈�̓��[�U�[�v���O�����Ŏg�p���Ă��ǂ��ł����A�Z���t�v���O��������
+; �Z���t�v���O�����̃��C�u�������g�p���邽�߁A�l�͔j�󂳂�܂��B
+;
+memory RAM2     : (0FFE20H, 00C0H)     ; �Z���t�v���O�������A�g�p�֎~�̈�
+;memory SLF_RAM : (0FFE00H, 0020H)     ; Slef Program�\��̈�[�g�p�֎~]
+memory RAM      : (0FF900H, 0500H)     ; ���[�U�[�q�`�l�̈�
+;memory SLF_RAM : (0FF900H, 0020H)     ; Slef Program�\��̈�[�g�p�֎~]
+
+
diff --git a/tags/SDK3.0(2.00)/bsr_system.h b/tags/SDK3.0(2.00)/bsr_system.h
new file mode 100644
index 0000000..54d2b75
--- /dev/null
+++ b/tags/SDK3.0(2.00)/bsr_system.h
@@ -0,0 +1,67 @@
+#ifndef __bsr_system__
+#define __bsr_system__
+
+// �C�x���g���[�v�̃X�e�[�g
+enum pwr_state_
+{
+  OFF_TRIG = 0,
+  ON_CHECK,
+  ON_TRIG,
+  ON,
+//  SLEEP_TRIG,
+  SLEEP,
+//  WAKE,
+  OFF,
+};
+
+enum poweron_reason_
+{
+  NONE = 0,
+  RSN_PWSW,
+  RSN_RTC_ALARM,
+  RSN_RSV3,
+  RSN_RSV4,
+  RSN_RSV5
+};
+
+
+enum model_
+{
+  MODEL_JIKKI,
+  MODEL_TS_BOARD,
+  MODEL_SHIROBAKO,
+  MODEL_JIKKI_NOBATT,
+  MODEL_CAPTURE_BOX,
+  MODEL_ISBAKO,         // �������Asystem_status.model�� MODEL_JIKKI �ɂ��Ă����̂Ŗ��g�p
+  MODEL_RESERVED3,
+};
+
+enum family_
+{
+  FAMILY_CTR,
+  FAMILY_SPFL,
+  FAMILY_SHRIMP
+};
+
+// �^�X�N�V�X�e���̏�ԏ��Ȃ�
+typedef struct _system_status_
+{
+  enum pwr_state_ pwr_state;
+  enum poweron_reason_ poweron_reason;
+  unsigned char reboot:1;
+//  unsigned char info_fullcolor:1;
+  unsigned char captureBox:1;         // �L���v�`���� SDK�ɂ͎��@�ƕԂ�
+  unsigned char taikendai:1;
+  unsigned char taikendai_nbd:1;
+  unsigned char is_dev:1;
+  enum model_   model;
+  enum family_  family;
+}system_status_;
+
+extern bit force_off;
+
+extern system_status_ system_status;
+
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/config.h b/tags/SDK3.0(2.00)/config.h
new file mode 100644
index 0000000..5335532
--- /dev/null
+++ b/tags/SDK3.0(2.00)/config.h
@@ -0,0 +1,89 @@
+#ifndef __config__
+#define __config__
+
+
+#define MCU_VER_MAJOR    0x02
+#define MCU_VER_MINOR    0x00
+
+
+// �f�o�b�O�����X�C�b�`
+
+//#define _debug_led_				// LED print �f�o�b�O���������Ƃ�
+//#define _ALLOW_NOBATT_			// ���@�d�r�Ȃ��i=�A�_�v�^�̂݁j�ł̋N��������
+//#define _DBG_PEDO_AUTO_ENABLE_	// �d�������̏u�Ԃ�������von
+//#define _DBG_LED_PRINT_			// LED print �f�o�b�O���������Ƃ�(���ȃA�b�v�f�[�g�p)
+//#define _ENABLE_WDT_TEST_
+//#define _FORCE_TAIKENDAI_
+//#define _FORCE_TAIKENDAI_NBD_
+//#define _DBG_CHK_OFF_LEAK_			// OFF�����[�N�d���̃`�F�b�N(�f�o�b�K�Ŋm�F)
+#define _DBG_NOP_					// �u���[�N��\�邽�߂�NOP()��L���ɂ������Ƃ�
+
+#define _I2C_ERR_ABORT_
+
+
+#ifdef  _DBG_NOP_
+# define dbg_nop()	NOP()
+#else
+# define dbg_nop()	;
+#endif
+
+
+// ����d�l�t�@�[��
+//#define _TAIKENDAI_
+//					home���j���[�ɓ���Ă��܂��̂�����������t�@�[�����‚���BROM������Ȃ��̂œd�r�p�����[�^������p�X����
+//#define _TAIKENDAI_SEISAN_SPECIAL_
+//					���Y���ɑ̌�������g�p�����ǂ���ƁA�A�_�v�^���Ȃ��Ɠd�������炸�Ɍ����Ɏx�Ⴊ����̂ňꎞ�t�@�[��
+//#define _RVD_
+//					�f�o�b�K�A�^�b�`���Ƀ^�[�Q�b�g���Z�b�g�œd�����؂�Ă��܂��̂����
+
+
+// �������̎��́��C���‚��Ȃ��Ƒ̌���̐��Y�ł��Ȃ�����ˁI
+#ifdef _TAIKENDAI_SEISAN_SPECIAL_
+#define MCU_VER_MINOR    0x80
+#endif
+
+
+#ifdef _TAIKENDAI_
+#define MCU_VER_MINOR    0x92
+// 0x90 1.31 �����@HOME�ɓ���Ă��܂��̂��X�C�b�`�̃}�X�N�ő΍�
+//                 ROM�s���̂��߁A�d�r�p�����[�^�폜
+
+#endif
+
+
+#define _firm_format_v3_
+
+//#define _MODEL_TEG2_
+      // ��TEG2 CPU �{ Type-T
+
+//#define _MODEL_WM0_
+//#define _MODEL_WM0_TEG2_CTRC_
+
+//#define _MODEL_TS0_
+      // ��TEG2 CPU �{ Type-C
+
+#define _MODEL_CTR_
+      // ��TS board, WM1,1 TS-CTRC, ���@
+
+
+// ---------------------------------- //
+#ifdef _MODEL_TEG2_
+unsupported!
+#endif
+
+
+#ifdef _MODEL_WM0_
+unsupported!
+#endif
+
+
+#ifdef _MODEL_TS0_
+unsupported!
+#endif
+
+#ifdef _MODEL_CTR_
+#define _PMIC_CTR_
+#define _MCU_BSR_
+#endif
+
+#endif
diff --git a/tags/SDK3.0(2.00)/fsl.h b/tags/SDK3.0(2.00)/fsl.h
new file mode 100644
index 0000000..0e806b5
--- /dev/null
+++ b/tags/SDK3.0(2.00)/fsl.h
@@ -0,0 +1,362 @@
+/*==============================================================================================*/
+/* Project      = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash    */
+/* Module       = fsl.h                                                                         */
+/* Version      = V1.01                                                                         */
+/* Date         = 28.03.2008 11:45:42                                                           */
+/*==============================================================================================*/
+/*                                  COPYRIGHT                                                   */
+/*==============================================================================================*/
+/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH,                                         */
+/*               a company of the NEC Electronics Corporation                                   */
+/*==============================================================================================*/
+/* Purpose:                                                                                     */
+/*              constant, type and function prototype definitions used by the FSL               */
+/*                                                                                              */
+/*==============================================================================================*/
+/*                                                                                              */
+/* Warranty Disclaimer                                                                          */
+/*                                                                                              */
+/* Because the Product(s) is licensed free of charge, there is no warranty of any kind          */
+/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied,        */
+/* including but not limited to those for non-infringement of intellectual property,            */
+/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
+/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
+/*                                                                                              */
+/* Each User is solely responsible for determining the appropriateness of using the Product(s)  */
+/* and assumes all risks associated with its exercise of rights under this Agreement,           */
+/* including, but not limited to the risks and costs of program errors, compliance with         */
+/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or     */
+/* interruption of operations.                                                                  */
+/*                                                                                              */
+/* Limitation of Liability                                                                      */
+/*                                                                                              */
+/* In no event shall NEC be liable to the User for any incidental, consequential, indirect,     */
+/* or punitive damage (including but not limited to lost profits) regardless of whether         */
+/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
+/* failure of essential purpose or otherwise and even if advised of the possibility of          */
+/* such damages. NEC shall not be liable for any services or products provided by third party   */
+/* vendors, developers or consultants identified or referred to the User by NEC in connection   */
+/* with the Product(s) and/or the Application.                                                  */
+/*                                                                                              */
+/*==============================================================================================*/
+/* Environment: PM plus (V6.30)                                                                 */
+/*              RA78K0(V1.20)                                                                   */
+/*              CC78K0(V2.00)                                                                   */
+/*==============================================================================================*/
+
+#ifndef __FSL_H_INCLUDED
+#define __FSL_H_INCLUDED
+
+
+/*==============================================================================================*/
+/* FSL type definitions                                                                         */
+/*==============================================================================================*/
+typedef unsigned char fsl_u08;
+typedef unsigned int fsl_u16;
+typedef unsigned long int fsl_u32;
+
+
+/*==============================================================================================*/
+/* constant definitions                                                                         */
+/*==============================================================================================*/
+
+/*status code definitions returned by the FSL functions                                         */
+#define   FSL_OK                    0x00
+#define   FSL_ERR_FLMD0             0x01
+#define   FSL_ERR_PARAMETER         0x05
+#define   FSL_ERR_PROTECTION        0x10
+#define   FSL_ERR_ERASE             0x1A
+#define   FSL_ERR_BLANKCHECK        0x1B
+#define   FSL_ERR_IVERIFY           0x1B
+#define   FSL_ERR_WRITE             0x1C
+#define   FSL_ERR_EEP_IVERIFY       0x1D
+#define   FSL_ERR_EEP_BLANKCHECK    0x1E
+#define   FSL_ERR_INTERRUPTION      0x1F
+
+
+/*==============================================================================================*/
+/* global function prototypes                                                                   */
+/*==============================================================================================*/
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      initialization of selfprogramming environment                                  */
+/*               After initialization:                                                          */
+/*               - the pointer to the data-buffer is stored                                     */
+/*               - all timing data are re-calculated according to the used system clock         */
+/*                                                                                              */
+/*               CAUTION:                                                                       */
+/*               The FSL_Init(&data_buffer) function is interruptible. Please use the           */
+/*               FSL_Init_cont(&data_buffer) to recall it as long return status is 0x1F.        */
+/*                                                                                              */
+/* Input:        data_buffer_pu08 - pointer to a data buffer of N...256 bytes                   */
+/*                                 (used for data exchange between firmware and application)    */
+/* Output:       -                                                                              */
+/* Returned:     u08, status_code                                                               */
+/*                    = 0x00(FSL_OK), normal and means initialization OK                        */
+/*                    = 0x1F(FSL_ERR_INTERRUPTION), initialization interrupted by user interrupt*/
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_Init( fsl_u08 * data_buffer_pu08 );
+extern fsl_u08 FSL_Init_cont( fsl_u08 * data_buffer_pu08 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      checks the voltage level (high or low) at FLMD0 pin                            */
+/* Input:        -                                                                              */
+/* Output:       -                                                                              */
+/* Returned:     fsl_u08, status_code                                                           */
+/*                    = 0x00(FSL_OK), normal and means FLMD0=HIGH                               */
+/*                    = 0x01(FSL_ERR_FLMD0), error, FLMD0=LOW                                   */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_ModeCheck( void );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      checks if specified block is blank                                             */
+/* Input:        block_u16 - block number has to be checked                                     */
+/* Output:       -                                                                              */
+/* Returned:     fsl_u08, status_code                                                           */
+/*                    = 0x00(FSL_OK), normal and means "block is blank"                         */
+/*                    = 0x05(FSL_ERR_PARAMETER), parameter error                                */
+/*                    = 0x1B(FSL_ERR_BLANKCHECK), blank-check error, means "block not blank"    */
+/*                    = 0x1F(FSL_ERR_INTERRUPTION), blank-check interrupted by user interrupt   */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_BlankCheck( fsl_u16 block_u16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/*  Block type:   FSL command function                                                          */
+/*----------------------------------------------------------------------------------------------*/
+/*  Purpose:      erase specified block                                                         */
+/*  Input:        block_u16 - block number has to be erase                                      */
+/*  Output:       -                                                                             */
+/*  Returned:     fsl_u08, status_code                                                          */
+/*                     = 0x00(FSL_OK), normal and means "block erased successfully"             */
+/*                     = 0x05(FSL_ERR_PARAMETER), parameter error                               */
+/*                     = 0x10(FSL_ERR_PROTECTION), tried to erase protected area                */
+/*                     = 0x1A(FSL_ERR_ERASE), erase error, retry up to max. 255 times           */
+/*                     = 0x1F(FSL_ERR_INTERRUPTION), erasing interrupted by user interrupt      */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_Erase( fsl_u16 block_u16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      performs internal verify on specified block                                    */
+/* Input:        block_u16 - block number has to be verified                                    */
+/* Output:       -                                                                              */
+/* Returned:     fsl_u08, status_code                                                           */
+/*                    = 0x00(FSL_OK), normal and means "block is verified"                      */
+/*                    = 0x05(FSL_ERR_PARAMETER), parameter error                                */
+/*                    = 0x1B(FSL_ERR_IVERIFY), internal verify error                            */
+/*                    = 0x1F(FSL_ERR_INTERRUPTION), verify interrupted by user interrupt        */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_IVerify( fsl_u16 block_u16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      writes N words from the data buffer into flash                                 */
+/* Input:        s_address_u32 - starting flash address the data has to be written              */
+/*                               See Condition  2) please.                                      */
+/*               my_wordcount_u08  - number of words (4 bytes) has to be written                */
+/* Output:       -                                                                              */
+/* Condition:   1) (s_address_u32 MOD 4 == 0)                                                   */
+/*              2) most significant byte (MSB) of  s_address_u32 has to be 0x00.                */
+/*                 Means: 0x00abcdef 24 bit flash address allowed                               */
+/*              3) (word_count_u08 <= sizeof(data buffer))  NOT CHECKED BY LIBRARY  !!!!!       */
+/* Changed:     -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                   = 0x00(FSL_OK), normal                                                     */
+/*                   = 0x05(FSL_ERR_PARAMETER), parameter error                                 */
+/*                   = 0x10(FSL_ERR_PROTECTION), protection error                               */
+/*                   = 0x1C(FSL_ERR_WRITE), write error                                         */
+/*                   = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt          */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_Write( fsl_u32 s_address_u32, fsl_u08 word_count_u08 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      writes N words from the data buffer into flash                                 */
+/*               Before "writing" a N-word blankcheck is performed.                             */
+/*               After "writing" a N-Word internal verify is performed.                         */
+/* Input:        s_address_u32 - starting destination address has to be written                 */
+/*               my_wordcount_u08  - number of words (4 bytes) has to be written                */
+/* Output:       -                                                                              */
+/* Condition:   1) (s_address_u32 MOD 4 == 0)                                                   */
+/*              2) (word_count_u08 <= sizeof(data buffer))  NOT CHECKED BY FIRMWARE !!!!!       */
+/* Changed:     -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                   = 0x00(FSL_OK), normal                                                     */
+/*                   = 0x05(FSL_ERR_PARAMETER), parameter error                                 */
+/*                   = 0x10(FSL_ERR_PROTECTION), protection error                               */
+/*                   = 0x1C(FSL_ERR_WRITE), write error                                         */
+/*                   = 0x1D(FSL_ERR_EEP_IVERIFY), verify error                                  */
+/*                   = 0x1E(FSL_ERR_EEP_BLANKCHECK), blankcheck error                           */
+/*                   = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt          */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_EEPROMWrite( fsl_u32 s_address_u32,
+                                fsl_u08 word_count_u08 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      reads the security information                                                 */
+/* Input:        destination_pu16 - destination address of the security info                    */
+/*               The format of the security info is: "unsigned short int"                       */
+/*                                                                                              */
+/*               Format of the security info:                                                   */
+/*               bit_0 = 0 -> chip erase command disabled, otherwise enabled                    */
+/*               bit_1 = 0 -> block erase command disabled, otherwise enabled                   */
+/*               bit_2 = 0 -> write command disabled, otherwise enabled                         */
+/*               bit_4 = 0 -> boot-area re-programming disabled, otherwise enabled              */
+/*               bit_8...bit_15 = 03H -> last block of the boot-area                            */
+/*               other bits = 1                                                                 */
+/* Output:       -                                                                              */
+/* Changed:      content of the data_buffer                                                     */
+/* Returned:     fsl_u08, status code                                                           */
+/*                  = 0x00(FSL_OK), normal                                                      */
+/*                  = 0x05(FSL_ERR_PARAMETER), parameter error                                  */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_GetSecurityFlags( fsl_u16 * destination_pu16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      read the boot flag i                                                           */
+/* Input:        destination_pu08 - destination address of the bootflag info                    */
+/*               The format of the boot-flag info is: "unsigned char"                           */
+/*               The value of the boot info is 0x00 for cluster 0 and 0x01 for cluster 1.       */
+/* Output:       -                                                                              */
+/* Changed:      content of the data_buffer                                                     */
+/* Returned:     fsl_u08, status code                                                           */
+/*                  = 0x00(FSL_OK), normal                                                      */
+/*                  = 0x05(FSL_ERR_PARAMETER), parameter error                                  */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_GetActiveBootCluster( fsl_u08 * destination_pu08 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:     puts the last address of the specified block into *destination_pu32             */
+/* Input:       *destination_pu32 - destination where the last-block-address                    */
+/*                                  should be stored                                            */
+/*              block_u16         - block number of the last address is needed                  */
+/* Changed:     -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                   = 0x00(FSL_OK), normal                                                     */
+/*                   = 0x05(FSL_ERR_PARAMETER), parameter error                                 */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_GetBlockEndAddr( fsl_u32 * destination_pu32,
+                                    fsl_u16 block_u16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:     puts the information about the protected flash area into the function parameter */
+/* Input:       *start_block_pu16 - destination where the FSW start block should be stored      */
+/*              *end_block_pu16   - destination where the FSW end block should be stored        */
+/* Changed:     -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                   = 0x00(FSL_OK), normal                                                     */
+/*                   = 0x05(FSL_ERR_PARAMETER), parameter error                                 */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_GetFlashShieldWindow( fsl_u16 * start_block_pu16,
+                                         fsl_u16 * end_block_pu16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:     defines a new Flash-Shield-Window area inside the flash memory                  */
+/* Input:       start_block_u16 - starting block of the Flash-Shield-Window (FSW)               */
+/*              end_block_u16   - ending block of the flash-Shield-Window (FSW)                 */
+/* Changed:     -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                    = 0x00(FSL_OK), normal                                                    */
+/*                    = 0x05(FSL_ERR_PARAMETER), parameter error                                */
+/*                    = 0x10(FSL_ERR_PROTECTION), protection error                              */
+/*                    = 0x1A(FSL_ERR_ERASE), erase error                                        */
+/*                    = 0x1B(FSL_ERR_IVERIFY), internal verify error                            */
+/*                    = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt         */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_SetFlashShieldWindow( fsl_u16 start_block_u16,
+                                         fsl_u16 end_block_u16 );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:     Swapping of bootcluster 0 and 1                                                 */
+/*                                                                                              */
+/*              CAUTION !!!!                                                                    */
+/*              After this function the boot cluster are immediately swapped                    */
+/* Input:       -                                                                               */
+/* Output:      -                                                                               */
+/* Returned:    fsl_u08, status code                                                            */
+/*                   = 0x00(FSL_OK), normal                                                     */
+/*                   = 0x05(FSL_ERR_PARAMETER), parameter error                                 */
+/*                   = 0x10(FSL_ERR_PROTECTION), protection error                               */
+/*                   = 0x1A(FSL_ERR_ERASE), erase error                                         */
+/*                   = 0x1B(FSL_ERR_IVERIFY), internal verify error                             */
+/*                   = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt          */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_SwapBootCluster( void );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL command function                                                           */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:      sets specified security flag by dedicated command-function.                    */
+/*                                                                                              */
+/*               There are following security levels:                                           */
+/*               a) chip-erase protection   (cannot be reset by programmer !!!)                 */
+/*               b) block-erase protection  (can be reset by chip-erase on programmer)          */
+/*               c) write protection        (can be reset by chip-erase on programmer)          */
+/*               d) boot-cluster protection (cannot be reset by programmer !!!)                 */
+/*                                                                                              */
+/*               CAUTION !!!!                                                                   */
+/*               Each security flag can be written by the application only once                 */
+/*                                                                                              */
+/* Input:        -                                                                              */
+/* Output:       -                                                                              */
+/* Returned:     fsl_u08, status code                                                           */
+/*                    = 0x00(FSL_OK), normal                                                    */
+/*                    = 0x05(FSL_ERR_PARAMETER), parameter error                                */
+/*                    = 0x10(FSL_ERR_PROTECTION), protection error                              */
+/*                    = 0x1A(FSL_ERR_ERASE), erase error                                        */
+/*                    = 0x1B(FSL_ERR_IVERIFY), internal verify error                            */
+/*                    = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt         */
+/*----------------------------------------------------------------------------------------------*/
+extern fsl_u08 FSL_SetChipEraseProtectFlag( void );
+extern fsl_u08 FSL_SetBlockEraseProtectFlag( void );
+extern fsl_u08 FSL_SetWriteProtectFlag( void );
+extern fsl_u08 FSL_SetBootClusterProtectFlag( void );
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* Block type:   FSL function                                                                   */
+/*----------------------------------------------------------------------------------------------*/
+/* Purpose:     defines the firmware operation method after interrupt service (ISR) execution.  */
+/* Input:       mode_u08 = 0x00,  after RETI the firmware is continuing the interrupted command.*/
+/*                       = other, after RETI the firmware is interrupted with status 0x1F.      */
+/* Changed:     -                                                                               */
+/* Returned:    -                                                                               */
+/*----------------------------------------------------------------------------------------------*/
+extern void FSL_SetInterruptMode( fsl_u08 mode_u08 );
+
+#endif
diff --git a/tags/SDK3.0(2.00)/fsl_user.h b/tags/SDK3.0(2.00)/fsl_user.h
new file mode 100644
index 0000000..60a41be
--- /dev/null
+++ b/tags/SDK3.0(2.00)/fsl_user.h
@@ -0,0 +1,113 @@
+/*==============================================================================================*/
+/* Project      = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash    */
+/* Module       = fsl_user.h                                                                    */
+/* Version      = V1.01                                                                         */
+/* Date         = 28.03.2008 11:45:55                                                           */
+/*==============================================================================================*/
+/*                                  COPYRIGHT                                                   */
+/*==============================================================================================*/
+/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH,                                         */
+/*               a company of the NEC Electronics Corporation                                   */
+/*==============================================================================================*/
+/* Purpose:                                                                                     */
+/*              user configurable constant/macros of the selfprogramming library                */
+/*                                                                                              */
+/*==============================================================================================*/
+/*                                                                                              */
+/* Warranty Disclaimer                                                                          */
+/*                                                                                              */
+/* Because the Product(s) is licensed free of charge, there is no warranty of any kind          */
+/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied,        */
+/* including but not limited to those for non-infringement of intellectual property,            */
+/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
+/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
+/*                                                                                              */
+/* Each User is solely responsible for determining the appropriateness of using the Product(s)  */
+/* and assumes all risks associated with its exercise of rights under this Agreement,           */
+/* including, but not limited to the risks and costs of program errors, compliance with         */
+/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or     */
+/* interruption of operations.                                                                  */
+/*                                                                                              */
+/* Limitation of Liability                                                                      */
+/*                                                                                              */
+/* In no event shall NEC be liable to the User for any incidental, consequential, indirect,     */
+/* or punitive damage (including but not limited to lost profits) regardless of whether         */
+/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
+/* failure of essential purpose or otherwise and even if advised of the possibility of          */
+/* such damages. NEC shall not be liable for any services or products provided by third party   */
+/* vendors, developers or consultants identified or referred to the User by NEC in connection   */
+/* with the Product(s) and/or the Application.                                                  */
+/*                                                                                              */
+/*==============================================================================================*/
+/* Environment: PM plus (V6.30)                                                                 */
+/*              RA78K0(V1.20)                                                                   */
+/*              CC78K0(V2.00)                                                                   */
+/*==============================================================================================*/
+
+
+#ifndef __FSL_USER_H_INCLUDED
+#define __FSL_USER_H_INCLUDED
+
+
+/*==============================================================================================*/
+/* constant definitions                                                                         */
+/*==============================================================================================*/
+
+
+/* specify the CPU frequency in [Hz], only 2MHz....20MHz allowed  */
+#define   FSL_SYSTEM_FREQUENCY      4000000
+
+/* define whether low-voltage mode is used or not                 */
+/* #define   FSL_LOW_VOLTAGE_MODE                                 */
+
+/* size of the common data buffer expressed in [bytes]                                          */
+/* the data buffer is used for data-exchange between the firmware and the selflib.              */
+//#define   FSL_DATA_BUFFER_SIZE    256
+#define   FSL_DATA_BUFFER_SIZE    0
+
+
+/* customizable interrupt controller configuration during selfprogramming period                */
+/* Bit     --7-------6-------5-------4-------3-------2-------1-------0----------------------    */
+/* MK0L:     PMK5    PMK4    PMK3    PMK2    PMK1    PMK0    LVIMK   WDTIMK                     */
+/* MK0H:     SREMK0  SRMK0*  STMK0*  DMAMK1  DMAMK0  SREMK3  SRMK3   STMK3                      */
+/* MK1L:     TMMK03  TMMK02  TMMK01  TMMK00  IICMK0  SREMK1  SRMK1   STMK1*                     */
+/* MK1H:     TMMK04  SREMK2  SRMK2   STMK2*  KRMK    RTCIMK  RTCMK   ADMK                       */
+/* MK2L:     PMK10   PMK9    PMK8    PMK7    PMK6    TMMK07  TMMK06  TMMK05                     */
+/* MK2H:     1       1       1       1       1       1       1       PMK11                      */
+/*------------------------------------------------------------------------------------------    */
+/*                                                                                              */
+/* Examples:                                                                                    */
+/* =========                                                                                    */
+/*#define   FSL_MK0L_MASK   0xF7   -> allow INTP1 interrupt during selfprogramming              */
+/*#define   FSL_MK0H_MASK   0xEF   -> allow DMA1 interrupt during selfprogramming               */
+/*#define   FSL_MK1L_MASK   0xBF   -> allow TM02 interrupt during selfprogramming               */
+/*#define   FSL_MK1H_MASK   0xFF   -> all interrupts disabled during selfprogramming            */
+/*#define   FSL_MK2L_MASK   0xF7   -> allow INTP6 interrupt during selfprogramming              */
+/*#define   FSL_MK2H_MASK   0xFF   -> all interrupts disabled during selfprogramming            */
+/*------------------------------------------------------------------------------------------    */
+#define   FSL_MK0L_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+#define   FSL_MK0H_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+#define   FSL_MK1L_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+#define   FSL_MK1H_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+#define   FSL_MK2L_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+#define   FSL_MK2H_MASK   0xFF  /* all interrupts disabled during selfprogramming              */
+
+
+/* FLMD0 control bit                        */
+#ifndef _WIN32
+#define  FSL_FLMD0_HIGH   {BECTL.7 = 1;}
+#define  FSL_FLMD0_LOW    {BECTL.7 = 0;}
+#else
+#define  FSL_FLMD0_HIGH   {BECTL_7 = 1;}
+#define  FSL_FLMD0_LOW    {BECTL_7 = 0;}
+#endif
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* switch interrupt backu functionality ON/OFF using #define/#undef                             */
+/*----------------------------------------------------------------------------------------------*/
+/* #define  FSL_INT_BACKUP */
+#undef  FSL_INT_BACKUP
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/hal.c b/tags/SDK3.0(2.00)/hal.c
new file mode 100644
index 0000000..101faf2
--- /dev/null
+++ b/tags/SDK3.0(2.00)/hal.c
@@ -0,0 +1,160 @@
+#ifndef _WIN32
+#pragma SFR
+#endif
+
+#include "incs_loader.h"
+
+
+#define WIFI_txLatch PIF21					// �d�g���M�p���X �{�� led.h �Œ�`
+
+
+// HAL�ł��Ԃ���� ////////////////////////////////////////
+// ����Ȏ�����Ȃ琳�_���ɂ�r...���≽�ł��Ȃ�
+bit PM_EXTDC_n;
+bit BT_IN_CHG_n;
+bit SW_POW_n;
+bit SW_HOME_n;
+bit SW_WIFI_n;
+bit SHELL_OPEN;
+
+/*
+#define REG_BIT_HAL0_PM_EXTDC_n     ( 1 << 7 )
+#define REG_BIT_HAL0_BT_IN_CHG_n    ( 1 << 6 )
+//#define REG_BIT_HAL0_PM_IRQ_n     ( 1 << 5 )  // �g��Ȃ�
+#define REG_BIT_HAL0_WL_TX          ( 1 << 4 )
+#define REG_BIT_HAL0_SHELL_OPEN     ( 1 << 3 )
+#define REG_BIT_HAL0_SW_WIFI_n      ( 1 << 2 )
+#define REG_BIT_HAL0_SW_HOME_n      ( 1 << 1 )
+#define REG_BIT_HAL0_SW_POW_n       ( 1 << 0 )
+
+#define REG_BIT_HAL1_DIPSW_1        ( 1 << 3 )
+#define REG_BIT_HAL1_DIPSW_0        ( 1 << 2 )
+#define REG_BIT_HAL1_HW_DET_1       ( 1 << 1 )
+#define REG_BIT_HAL1_HW_DET_0       ( 1 << 0 )
+*/
+
+
+// �ڂ��ւ�
+// �`���^�����O�����Ȃ炱���ł������(�������ԃJ�E���g�͕�)
+void hal_update()
+{
+    u8 temp_conf = vreg_ctr[ VREG_C_HAL_OVW_CONT0 ];
+    u8 temp_dat  = vreg_ctr[ VREG_C_HAL_OVW_DAT0 ];
+
+    // �A�_�v�^�L��
+    if( temp_conf & REG_BIT_HAL0_PM_EXTDC_n )
+    {
+        // �O�����͂Ȃ񂾂��傫���Ȃ肪��
+        if(( temp_dat & REG_BIT_HAL0_PM_EXTDC_n ) == 0 )
+        {
+            PM_EXTDC_n = 0;
+        }
+        else
+        {
+            PM_EXTDC_n = 1;
+        }
+    }
+    else
+    {
+        PM_EXTDC_n = PM_EXTDC_n_RAW;
+    }
+
+    // �[�d���H
+    if( temp_conf & REG_BIT_HAL0_BT_IN_CHG_n )
+    {
+        if(( temp_dat & REG_BIT_HAL0_BT_IN_CHG_n ) == 0 )
+        {
+            BT_IN_CHG_n = 0;
+        }
+        else
+        {
+            BT_IN_CHG_n = 1;
+        }
+    }
+    else
+    {
+        BT_IN_CHG_n = BT_IN_CHG_n_RAW;
+    }
+
+    // �d���t
+    if( temp_conf & REG_BIT_HAL0_SW_POW_n )
+    {
+        if(( temp_dat & REG_BIT_HAL0_SW_POW_n ) == 0 )
+        {
+            SW_POW_n = 0 ;
+        }
+        else
+        {
+            SW_POW_n = 1;
+        }
+    }
+    else
+    {
+        SW_POW_n = SW_POW_n_RAW;
+    }
+
+    // ���Ɩt
+    if( temp_conf & REG_BIT_HAL0_SW_HOME_n )
+    {
+        if(( temp_dat & REG_BIT_HAL0_SW_HOME_n ) == 0 )
+        {
+            SW_HOME_n = 0;
+        }
+        else
+        {
+            SW_HOME_n = 1;
+        }
+    }
+    else
+    {
+        if( system_status.model == MODEL_TS_BOARD )// �ڑ���̃|�[�g���Ⴄ����
+        {
+            SW_HOME_n = SW_HOME_n_TSBOARD_RAW;
+        }
+        else
+        {
+            SW_HOME_n = SW_HOME_n_JIKKI_RAW;  
+        }
+    }
+
+    // �����J��
+    if( temp_conf & REG_BIT_HAL0_SW_WIFI_n )
+    {
+        if(( temp_dat & REG_BIT_HAL0_SW_WIFI_n ) == 0 )
+        {
+            SW_WIFI_n = 0;
+        }
+        else
+        {
+            SW_WIFI_n = 1;
+        }
+    }
+    else
+    {
+        SW_WIFI_n = SW_WIFI_n_RAW;
+    }
+
+    // ����
+    if( temp_conf & REG_BIT_HAL0_SHELL_OPEN )
+    {
+        if(( temp_dat & REG_BIT_HAL0_SHELL_OPEN ) == 0 )
+        {
+            SHELL_OPEN = 0;
+        }
+        else
+        {
+            SHELL_OPEN = 1;
+        }
+    }
+    else
+    {
+        SHELL_OPEN = SHELL_OPEN_RAW;
+    }
+
+    // �����d�g����
+    if( temp_conf & REG_BIT_HAL0_WL_TX )
+    {
+        WIFI_txLatch = 1;
+    }
+
+}
diff --git a/tags/SDK3.0(2.00)/hal.h b/tags/SDK3.0(2.00)/hal.h
new file mode 100644
index 0000000..c6decf3
--- /dev/null
+++ b/tags/SDK3.0(2.00)/hal.h
@@ -0,0 +1,16 @@
+#ifndef _hal_h_
+#define _hal_h_
+
+
+extern bit PM_EXTDC_n;
+extern bit BT_IN_CHG_n;
+extern bit SW_POW_n;
+extern bit SW_HOME_n;
+extern bit SW_WIFI_n;
+extern bit SHELL_OPEN;
+
+
+// ========================================================
+void hal_update();
+
+#endif
diff --git a/tags/SDK3.0(2.00)/hoge.bin b/tags/SDK3.0(2.00)/hoge.bin
new file mode 100644
index 0000000..9673de6
Binary files /dev/null and b/tags/SDK3.0(2.00)/hoge.bin differ
diff --git a/tags/SDK3.0(2.00)/i2c_ctr.c b/tags/SDK3.0(2.00)/i2c_ctr.c
new file mode 100644
index 0000000..3359a67
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_ctr.c
@@ -0,0 +1,297 @@
+/* ========================================================
+  ��SoC �V�K�`�����l�� I2C�ʐM
+    ���c���J�Z.nintendo
+	'09 Apr
+ ======================================================== */
+
+#include "config.h"
+
+// TS�̓}�U�{�Ńe���R�AWM�͉�H�}���e���R�Ō��Lj�v�c
+
+#ifndef _WIN32
+#pragma interrupt INTIICA1	int_iic_ctr RB1
+#endif
+
+
+#include "incs.h"
+
+#ifdef _MCU_BSR_
+// #ifdef _MODEL_TS0_ || _MODEL_WM0_
+
+// ���[�L���O���f����I2C���t
+// TEG�͉�H�}�Ńe���R
+#define ACKD       ACKD1
+#define ACKE       ACKE1
+#define COI        COI1
+#define IICAEN     IICA1EN
+#define IICRSV     IICRSV1
+#define IICA       IICA1
+#define IICAIF     IICAIF1
+#define IICAMK     IICAMK1
+#define IICAPR0    IICAPR11
+#define IICAPR1    IICAPR01
+#define IICCTL0    IICCTL10
+#define IICE       IICE1
+#define IICF       IICF1
+#define IICS       IICS1
+#define IICWH      IICWH1
+#define IICWL      IICWL1
+#define LREL       LREL1
+#define SPD        SPD1
+#define SPIE       SPIE1
+#define STCEN      STCEN1
+#define STD        STD1
+#define SVA        SVA1
+#define WREL       WREL1
+#define WTIM       WTIM1
+#define TRC        TRC1
+#define SMC        SMC1
+#define DFC        DFC1
+
+#endif
+
+
+
+// ==============================================
+enum en_IIC_STATE
+{
+    IIC_IDLE = 0,
+    IIC_RCV_REG_ADRS,
+    IIC_TX_OR_RX,
+    IIC_TX,
+    IIC_RX
+};
+
+
+
+// ==============================================
+extern bit irq_readed;                 // �����ꂩ��IRQ���W�X�^���ǂ܂ꂽ
+
+u8 iic_burst_state;
+static enum en_IIC_STATE state = IIC_IDLE;
+
+#define bit_iics_spd	(i2c_stat & (1<<0))
+#define bit_iics_std	(i2c_stat & (1<<1))
+#define bit_iics_ackd	(i2c_stat & (1<<2))
+#define bit_iics_trc	(i2c_stat & (1<<3))
+#define bit_iics_coi	(i2c_stat & (1<<4))
+
+// ==============================================
+__interrupt void int_iic_ctr(  )
+{
+    static u8 reg_adrs;
+    static u8 tx_buf;
+    u8 rx_buf;
+    static u8 adrs_access_from;			// �o�[�X�g�A�N�Z�X�̎��Ɏg��
+
+	u8 i2c_stat = IICS1;				// volatile�̂���
+
+    // �ǂݏo���I��
+    if( !bit_iics_ackd                 // ���荞�ݗv����NAK�i�f�[�^���M�̍Ō�j
+		|| bit_iics_spd )              // �X�g�b�v�R���f�B�V����(!ACKD �ɗ����Ƃ��͊��荞�ݗ��Ȃ� (SPIE = 0))
+    {
+		/* 
+			I2C�̔������x���Ă��̃t���O����������O��STD�����Ă��܂����Ƃ�����
+			���ǁA���Ȃ����삷��‚���
+		*/
+
+        // ���W�X�^���[�h�ŁA���荞�݃s�����l�Q�[�g
+        // �܂��ǂ܂�ĂȂ����荞�݂�����΁A�ēx�A�T�[�g
+        if( irq_readed )
+        {
+            IRQ0_neg;
+            irq_readed = false;
+            if( !(  (( vreg_ctr[VREG_C_IRQ0] & vreg_ctr[VREG_C_IRQ_MASK0 ] ) == 0 )
+                    && (( vreg_ctr[VREG_C_IRQ1] & vreg_ctr[VREG_C_IRQ_MASK1 ] ) == 0 )
+                    && (( vreg_ctr[VREG_C_IRQ2] & vreg_ctr[VREG_C_IRQ_MASK2 ] ) == 0 )
+                    && (( vreg_ctr[VREG_C_IRQ3] & vreg_ctr[VREG_C_IRQ_MASK3 ] ) == 0 ) ))
+            {
+                while( !IRQ0 ){;}  // ���ԉ҂��s�v����
+                IRQ0_ast;
+            }
+        }
+
+        // I2C�I�����ɉ������镨 //
+        hosu_read_end(  );		// �����v�ǂݏo���I��
+        rtc_unlock(  );
+
+        state = IIC_IDLE;
+        SPIE = 0;
+        LREL = 1;
+        EI();
+        return;
+    }
+
+    if( bit_iics_std )                   // ���荞�ݗv���F�X�^�[�g�R���f�B�V����
+    {
+        if( !( state == IIC_IDLE || state == IIC_TX_OR_RX ))
+        {
+            // sp/nack ��葹�˂�
+            dbg_nop();          // ���Ȃ��͂�...
+/*
+            // �p�P�b�g�̐擪��st�ƌ��Ȃ��B
+            // ���ʂɑ��s
+            state = IIC_IDLE;
+/*/
+			// ���g���C���Ă��炤
+			state = IIC_IDLE;
+			SPIE = 0;
+			LREL = 1;
+			EI();
+//*/
+		}
+		// �ʏ�
+	}
+
+	EI();
+
+    switch ( state )
+    {
+    case ( IIC_IDLE ):
+        // ���njĂяo���ɉ����B
+        // �������Ȃ�
+        iic_burst_state = 0;
+        SPIE = 1;
+        WREL = 1;               // �E�F�C�g����
+        state = IIC_RCV_REG_ADRS;
+		return;
+
+    case ( IIC_RCV_REG_ADRS ):  // �Q�o�C�g�ځi���W�X�^�A�h���X�j��M��ɗ���
+        // ���W�X�^�A�h���X��M
+        reg_adrs = IICA;
+
+        WREL = 1;
+        adrs_access_from = reg_adrs;
+        tx_buf = vreg_ctr_read( reg_adrs );    // �f�[�^�̏��������Ă���
+        state = IIC_TX_OR_RX;
+		return;
+
+    case ( IIC_TX_OR_RX ):      // ���̎��ɗ��銄�荞�݁BST�Ȃ瑗�M�����A�f�[�^�������珑�����܂�
+  //    if( TRC )               // ���M�����t���O �ŋ�ʂ���̂́A���荞�ݒx�����ɕs����N���肦��
+        if( bit_iics_std )
+        {                       // �X�^�[�g�R���f�B�V�������o�t���O
+            // ���[�h�����
+            if( bit_iics_coi )
+            {                   // �A�h���X��v�t���O
+                state = IIC_TX;
+                // no break, no return //
+            }
+            else
+            {
+                // ���X�^�[�g�ňႤ�f�o�C�X���Ă΂ꂽ�I
+                SPIE = 0;
+                LREL = 1;       // �E�F�C�g����?
+                state = IIC_IDLE;       // �I������
+                return;
+            }
+        }
+        else
+        {
+            state = IIC_RX;     // �f�[�^1�o�C�g��M�̊��荞�݂�����
+            // no break, no return //
+        }
+        /* FALLTHROUGH */
+
+    default:                    // �o�[�X�g R/W �ł�����������Ă΂�邱�ƂɂȂ�
+        if( state == IIC_TX )
+        {                       // ���M
+            IICA = tx_buf;
+            vreg_ctr_after_read( reg_adrs, tx_buf );    // �ǂ񂾂�N���A�Ȃǂ̏���
+        }
+        else
+        {                       // ��M
+            rx_buf = IICA;
+
+#ifdef _I2C_ERR_ABORT_
+			if( reg_adrs >= 0x80 || reg_adrs <= 1 )
+            {
+                LREL = 1; // �Ȃ񂩃f�[�^�������̂ŒʐM�I�� nak���Ԃ�̂��Ȃ��c
+                return;
+            }
+#endif
+			vreg_ctr_write( reg_adrs, rx_buf );
+            WREL = 1;
+		}
+
+		// ���W�X�^�A�h���X�̃C���N�������g
+        /// �A�N�Z�X�|�C���^��i�߂Ȃ�����ȃ��W�X�^
+        switch( adrs_access_from )
+        {
+        case( VREG_C_ACC_HOSU_HIST ):
+        case( VREG_C_LED_NOTIFY_DATA ):
+        case( VREG_C_LED_POW ):
+        case( VREG_CX_INFO ):
+        case( VREG_CX_FREE_DATA ):
+            break;
+        case( VREG_CX_FREE_ADRS ):
+            if( reg_adrs == VREG_CX_FREE_ADRS )
+            {
+                reg_adrs = VREG_CX_FREE_DATA;
+            }
+            break;
+        default:
+	        reg_adrs ++;
+        }
+
+        if( state == IIC_TX )
+        {                       // ����ɂ‚��ɑ���f�[�^�̏��������V�e�I�N�BSP�����Ďg���Ȃ���������Ȃ�
+            tx_buf = vreg_ctr_read( reg_adrs );
+        }
+        break;
+    }
+}
+
+
+
+// ========================================================
+void IIC_ctr_Init( void )
+{
+
+    IICAEN = 1;
+
+    IICE = 0;                   /* IICA disable */
+
+    IICAMK = 1;                 /* INTIICA disable */
+    IICAIF = 0;                 /* clear INTIICA interrupt flag */
+
+//    IICAPR0 = 1;                /* set INTIICA high priority */
+    IICAPR1 = 0;                /* set INTIICA high priority */
+
+    P20 &= ~0x3;
+
+    SVA = IIC_C_SLAVEADDRESS;
+    IICF = 0x01;
+
+    STCEN = 1;                  // ���X�^�[�g�̋���
+    IICRSV = 1;                 // �ʐM�\��������Ȃ�:�X���[�u�ɓO����
+
+    SPIE = 0;                   // �X�g�b�v�R���f�B�V�����ł̊��荞�݂��֎~
+    WTIM = 1;                   // ������ACK��Ԃ�����clk��L�ɌŒ肷��
+    ACKE = 1;
+
+    IICWH = 5;
+    IICWL = 10;                 // L���Ԃ̒���
+
+    SMC = 1;                    // �������[�h
+    DFC = 1;                    // �f�W�^���t�B���^on (@fast mode)
+
+    IICAMK = 0;                 // ���荞�݂�����
+
+    IICE = 1;
+
+    PM20 &= ~0x3;                /* set clock pin for IICA */
+
+	state = IIC_IDLE;
+}
+
+
+
+// ========================================================
+void IIC_ctr_Stop( void )
+{
+    IICE = 0;                   /* IICA disable */
+    IICAEN = 0;
+}
+
+
+
diff --git a/tags/SDK3.0(2.00)/i2c_ctr.h b/tags/SDK3.0(2.00)/i2c_ctr.h
new file mode 100644
index 0000000..16234ff
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_ctr.h
@@ -0,0 +1,210 @@
+#ifndef _MDSERIAL_A_
+#define _MDSERIAL_A_
+
+
+/* IIC operation enable	(IICE0)	*/
+#define	IIC0_OPERATION				0x80
+#define	IIC0_OPERATION_DISABLE		0x00    /* stop operation */
+#define	IIC0_OPERATION_ENABLE		0x80    /* enable operation     */
+
+/* Exit	from communications	(LREL0)	*/
+#define	IIC0_COMMUNICATION			0x40
+#define	IIC0_COMMUNICATION_NORMAL	0x00    /* normal operation     */
+#define	IIC0_COMMUNICATION_EXIT		0x40    /* exit from current communication */
+
+/* Wait	cancellation (WREL0) */
+#define	IIC0_WAITCANCEL				0x20
+#define	IIC0_WAIT_NOTCANCEL			0x00    /* do not cancel wait */
+#define	IIC0_WAIT_CANCEL			0x20    /* cancel wait */
+
+/* Generation of interrupt when	stop condition (SPIE0) */
+#define	IIC0_STOPINT				0x10
+#define	IIC0_STOPINT_DISABLE		0x00    /* disable */
+#define	IIC0_STOPINT_ENABLE			0x10    /* enable */
+
+/* Wait	and	interrupt generation (WTIM0) */
+#define	IIC0_WAITINT				0x08
+#define	IIC0_WAITINT_CLK8FALLING	0x00    /* generate     at the eighth clocks falling edge       */
+#define	IIC0_WAITINT_CLK9FALLING	0x08    /* generated at the     ninth clocks falling edge       */
+
+/* Acknowledgement control (ACKE0) */
+#define	IIC0_ACK					0x04
+#define	IIC0_ACK_DISABLE			0x00    /* enable acknowledgement */
+#define	IIC0_ACK_ENABLE				0x04    /* disable acknowledgement */
+
+/* Start condition trigger (STT0) */
+#define	IIC0_STARTCONDITION			0x02
+#define	IIC0_START_NOTGENERATE		0x00    /* do not generate start condition */
+#define	IIC0_START_GENERATE			0x02    /* generate     start condition */
+
+/* Stop	condition trigger (SPT0) */
+#define	IIC0_STOPCONDITION			0x01
+#define	IIC0_STOP_NOTGENERATE		0x00    /* do not generate stop condition */
+#define	IIC0_STOP_GENERATE			0x01    /* generate     stop condition */
+
+/*
+	IIC	Status Register	0 (IICS0)
+*/
+/* Master device status	(MSTS0)	*/
+#define	IIC0_MASTERSTATUS			0x80
+#define	IIC0_STATUS_NOTMASTER		0x00    /* slave device status or communication standby status */
+#define	IIC0_STATUS_MASTER			0x80    /* master device communication status */
+
+/* Detection of	arbitration	loss (ALD0)	*/
+#define	IIC0_ARBITRATION			0x40
+#define	IIC0_ARBITRATION_NO			0x00    /* arbitration win or no arbitration */
+#define	IIC0_ARBITRATION_LOSS		0x40    /* arbitration loss     */
+
+/* Detection of	extension code reception (EXC0)	*/
+#define	IIC0_EXTENSIONCODE			0x20
+#define	IIC0_EXTCODE_NOT			0x00    /* extension code not received */
+#define	IIC0_EXTCODE_RECEIVED		0x20    /* extension code received */
+
+/* Detection of	matching addresses (COI0) */
+#define	IIC0_ADDRESSMATCH			0x10
+#define	IIC0_ADDRESS_NOTMATCH		0x00    /* addresses do not     match */
+#define	IIC0_ADDRESS_MATCH			0x10    /* addresses match */
+
+/* Detection of	transmit/receive status	(TRC0) */
+#define	IIC0_STATUS					0x08
+#define	IIC0_STATUS_RECEIVE			0x00    /* receive status */
+#define	IIC0_STATUS_TRANSMIT		0x08    /* transmit     status */
+
+/* Detection of	acknowledge	signal (ACKD0) */
+#define	IIC0_ACKDETECTION			0x04
+#define	IIC0_ACK_NOTDETECTED		0x00    /* ACK signal was not detected */
+#define	IIC0_ACK_DETECTED			0x04    /* ACK signal was detected */
+
+/* Detection of	start condition	(STD0) */
+#define	IIC0_STARTDETECTION			0x02
+#define	IIC0_START_NOTDETECTED		0x00    /* start condition not detected */
+#define	IIC0_START_DETECTED			0x02    /* start condition detected     */
+
+/* Detection of	stop condition (SPD0) */
+#define	IIC0_STOPDETECTION			0x01
+#define	IIC0_STOP_NOTDETECTED		0x00    /* stop condition not detected */
+#define	IIC0_STOP_DETECTED			0x01    /* stop condition detected */
+
+/*
+	IIC	Flag Register 0	(IICF0)
+*/
+/* STT0	clear flag (STCF) */
+#define	IIC0_STARTFLAG				0x80
+#define	IIC0_STARTFLAG_GENERATE		0x00    /* generate     start condition */
+#define	IIC0_STARTFLAG_UNSUCCESSFUL	0x80    /* start condition generation unsuccessful */
+
+/* IIC bus status flag (IICBSY)	*/
+#define	IIC0_BUSSTATUS				0x40
+#define	IIC0_BUS_RELEASE			0x00    /* bus release status */
+#define	IIC0_BUS_COMMUNICATION		0x40    /* bus communication status     */
+
+/* Initial start enable	trigger	(STCEN)	*/
+#define	IIC0_STARTWITHSTOP			0x02
+#define	IIC0_START_WITHSTOP			0x00    /* generation of a start condition without detecting a stop     condition */
+#define	IIC0_START_WITHOUTSTOP		0x02    /* generation of a start condition upon detection of a stop     condition */
+
+/* Communication reservation function disable bit (IICRSV) */
+#define	IIC0_RESERVATION			0x01
+#define	IIC0_RESERVATION_ENABLE		0x00    /* enable communication reservation     */
+#define	IIC0_RESERVATION_DISABLE	0x01    /* disable communication reservation */
+
+/*
+	IIC	clock selection	register 0 (IICCL0)
+*/
+#define IICCL0_INITIALVALUE   		0x00
+/* Detection of	SCL0 pin level (CLD0) */
+#define	IIC0_SCLLEVEL				0x20
+#define	IIC0_SCL_LOW				0x00    /* clock line at low level */
+#define	IIC0_SCL_HIGH				0x20    /* clock line at high level     */
+
+/* Detection of	SDA0 pin level (DAD0) */
+#define	IIC0_SDALEVEL				0x10
+#define	IIC0_SDA_LOW				0x00    /* data line at low     level */
+#define	IIC0_SDA_HIGH				0x10    /* data line at high level */
+
+/* Operation mode switching	(SMC0) */
+#define	IIC0_OPERATIONMODE			0x08
+#define	IIC0_MODE_STANDARD			0x00    /* operates     in standard     mode */
+#define	IIC0_MODE_HIGHSPEED			0x08    /* operates     in high-speed mode */
+
+/* Digital filter operation	control	(DFC0) */
+#define	IIC0_DIGITALFILTER			0x04
+#define	IIC0_FILTER_OFF				0x00    /* digital filter off */
+#define	IIC0_FILTER_ON				0x04    /* digital filter on */
+
+/* Operation mode switching	(CL01, CL00) */
+#define	IIC0_CLOCKSELECTION			0x03
+
+/*	Combine	of (SMC0, CL01,	CL00)*/
+#define	IIC0_CLOCK0					0x00
+#define	IIC0_CLOCK1					0x01
+#define	IIC0_CLOCK2					0x02
+#define	IIC0_CLOCK3					0x03
+#define	IIC0_CLOCK4					0x08
+#define	IIC0_CLOCK5					0x09
+#define	IIC0_CLOCK6					0x0a
+#define	IIC0_CLOCK7					0x0b
+
+/*
+	IIC	function expansion register	0 (IICX0)
+*/
+/* IIC clock expension (CLX0) */
+#define	IIC0_CLOCKEXPENSION			0x01
+#define	IIC0_EXPENSION0				0x00
+#define	IIC0_EXPENSION1				0x01
+
+/*  Operation clock (CLX0, SMC0, CL01, CL00)
+            |   IIC0_EXPENSION0 |   IIC0_EXPENSION1 |                                
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK0 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/88     |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK1 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/172    |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK2 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/344    |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK3 |prohibited/fexscl0 |       prohibited  |   selection clock(fw)
+            |       fw/66       |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK4 |       fprs/2      |       fprs/2      |   selection clock(fw)
+            |       fprs/48     |       fprs/24     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------            
+IIC0_CLOCK5 |       fprs/2      |       fprs/2      |   selection clock(fw)
+            |       fprs/48     |       fprs/24     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK6 |       fprs/4      |       fprs/4      |   selection clock(fw)
+            |       fprs/96     |       fprs/48     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK7 |prohibited/fexscl0 |       prohibited  |   selection clock(fw)
+            |       fw/18       |                   |   transfer clock
+            |     high speed    |                   |   mode
+------------|-------------------|-------------------|----------------------
+*/
+
+#define ADDRESS_COMPLETE   			0x80
+#define IIC_MASTER_FLAG_CLEAR 		0x00
+
+/******************************************************************************
+ *  Macro define
+ ******************************************************************************/
+
+
+
+/******************************************************************************
+ *  Function define
+ ******************************************************************************/
+
+void IIC_ctr_Init( void );
+void IIC_ctr_Stop( void );
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/i2c_mcu.c b/tags/SDK3.0(2.00)/i2c_mcu.c
new file mode 100644
index 0000000..aa2abd9
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_mcu.c
@@ -0,0 +1,655 @@
+/* ========================================================
+  �Ȉ�I2C�i�����y���t�F�����g�p�j�ʐM
+    de JHL ���c���J�Z
+    '09 Feb -
+ ======================================================== */
+#ifndef _WIN32
+#pragma sfr
+#pragma di
+#pragma ei
+#pragma nop
+#pragma inline                  // memcpy()���C�����C���W�J����(�̕����������I)
+#endif
+
+#include "incs_loader.h"
+#include "i2c_mcu.h"
+
+
+// ========================================================
+// ���W�X�^�̃r�b�g��
+// �v���t�B�b�N�Xb�����A�ꕔ�̃r�b�g�������W�X�^���ɂ��Ԃ邽��...
+// SMR0n
+#define bCKS0    ( 1 << 15 )
+#define bCCS0    ( 1 << 14 )
+#define bSTS0    ( 1 << 8 )
+#define bSIS0    ( 1 << 6 )
+#define bMD0n2   ( 1 << 2 )
+#define bMD0n1   ( 1 << 1 )
+#define bMD0n0   ( 1 << 0 )
+#define bSMR0n_FIXEDBIT  ( 1 << 5 )
+
+// SSR0n
+#define bit_TSF0   6
+#define PEF0       ( 1 << 1 )
+
+// SIR0n
+#define PECT0      ( 1 << 1 )
+
+// SCR0n
+#define TXE0       ( 1 << 15 )
+#define RXE0       ( 1 << 14 )
+#define SLC02      4
+#define DLS02      0
+#define TSF0       ( 1 << 6 )
+
+// SOn
+#define TAUS_MASK  0x0B0B;
+
+// DMCn
+#define DRS        ( 1 << 6 )
+
+
+
+// ========================================================
+static void iic_mcu_send_st(  );
+static void iic_mcu_send_re_st(  );
+static void iic_mcu_send_sp(  );
+static err iic_mcu_send_a_byte( u8 );
+static err iic_mcu_call_slave( u8 slave );
+
+
+
+// ========================================================
+bit     iic_mcu_wo_dma;
+volatile bit iic_mcu_busy;
+volatile bit iic_mcu_initialized;
+
+
+u8      iic_send_work[4];
+u8     *p_iic_send_wo_dma_dat;
+u8      iic_send_wo_dma_len;
+
+u8      iic_mcu_result;     // �ꕶ�����[�h�̎��̓f�[�^��Ԃ��B
+                                // �X�e�[�^�X���K�v�Ȃ炱�������Ă��
+
+#ifdef i2c_timeout_test
+extern bit i2c_mcu_time_out_error;
+#endif
+
+// ========================================================
+void nop8()
+{
+	// �����ɗ��� call ��3clk, return �� 6clk
+}
+
+
+static err iic_mcu_wait_free()
+{
+    u16 tot = 0;
+
+    iic_mcu_start(  );
+    while( 1 )
+    {
+        DI();
+        if( !iic_mcu_busy )
+        {
+            iic_mcu_busy = true;
+		    EI();
+            break;
+        }
+        EI();
+        if( ++tot == 0 )
+        {
+#ifdef i2c_timeout_test
+            i2c_mcu_time_out_error = true;
+#endif
+            return( ERR_ERR );
+        }
+    }
+    return( ERR_SUCCESS );
+}
+
+
+/* ========================================================
+  �X���[�u����� �w1�����x ���[�h
+  �Ԓl���f�[�^���̂��̂ł��B
+ ======================================================== */
+u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs )
+{
+    u8      dat;
+
+#if 1
+    // ���b�p�[
+    if( iic_mcu_read( SLA, adrs, 1, &dat ) == ERR_SUCCESS )
+    {
+        iic_mcu_result = ERR_OK;
+    }
+    else
+    {
+        iic_mcu_result = ERR_NOSLAVE;
+    }
+    return ( dat );
+
+#else
+    iic_mcu_wait_free();
+
+    // �X�^�[�g�R���f�B�V�����ƃX���[�u�̌Ăяo���A���W�X�^�A�h���X�̑��M
+    if( iic_mcu_call_slave( SLA ) != 0 )
+    {
+        iic_mcu_result = ERR_NOSLAVE;
+        iic_mcu_busy = false;
+        return ( 0 );
+    }
+
+    // ���W�X�^�A�h���X�̑��M
+    iic_mcu_send_a_byte( adrs );        // �I���܂ŋA���Ă��Ȃ�
+    // if( err != ERR_SUCCESS )�`
+
+    // �f�[�^��M //
+    iic_mcu_send_re_st(  );     // ���X�^�[�g�R���f�B�V����
+    iic_mcu_send_a_byte( SLA | 0x01 );  // ���M�����܂Ŗ߂��Ă��܂���B
+
+    ST0 = 0x0004;               // ��M���[�h�ɐݒ��ς���̂Ń��W�b�N��~
+    SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02;     // ��M�ݒ�
+    SS0 = 0x0004;               // �ʐM�ҋ@
+
+    SOE0 = 0x0000;              // 1�o�C�g���M�Ȃ̂ŁA�Ō��NAK�𑗂�
+    IICIF10 = 0;
+    SIO10 = 0xFF;               // �_�~�[�f�[�^�������Ǝ�M�J�n
+
+    while( IICIF10 == 0 )
+    {                           // ��M�����҂�
+        ;
+    }
+    dat = SIO10;
+
+    iic_mcu_send_sp(  );
+    IICIF10 = 0;                // �������Ȃ�����
+    iic_mcu_busy = false;
+    return ( dat );
+#endif
+}
+
+
+
+/* ========================================================
+  �X���[�u����̃��[�h
+  0 ����I��
+  1 �X���[�u���������Ȃ�
+  2 �o�X���N���ɐ�L����Ă��ă^�C���A�E�g
+  3 �Ӗ��s���G���[
+  �y���z
+  �X���[�u���E�F�C�g�R���f�B�V�������o�����Ƃ͋֎~�ł��B
+  ���̏ꍇ�ł��G���[���o�Ȃǂł��܂���
+ ======================================================== */
+err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8 * dest )
+{
+
+#if 1
+    if( iic_mcu_wait_free() != ERR_SUCCESS )
+    {
+        return( ERR_ERR );
+    }
+#else
+      // �g�p���Ȃ�A��
+#endif
+
+    // �X�^�[�g�R���f�B�V�����ƃX���[�u�̌Ăяo���A���W�X�^�A�h���X�̑��M
+    if( iic_mcu_call_slave( slave ) != 0 )
+    {
+        iic_mcu_busy = false;
+        return ( ERR_NOSLAVE );
+    }
+
+    // ���W�X�^�A�h���X�̑��M
+    iic_mcu_send_a_byte( adrs );        // �I���܂ŋA���Ă��Ȃ�
+    // if( err != ERR_SUCCESS )�`
+
+    // �f�[�^��M //
+    iic_mcu_send_re_st(  );     // ���X�^�[�g�R���f�B�V����
+    iic_mcu_send_a_byte( slave | 0x01 );        // ���M�����܂Ŗ߂��Ă��܂���B
+
+    // �f�[�^��M
+    ST0 = 0x0004;               // ��M���[�h�ɐݒ��ς���̂Ń��W�b�N��~
+    SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02;     // ��M�ݒ�
+    SS0 = 0x0004;               // �ʐM�ҋ@
+
+    do
+    {
+        if( len == 1 )
+        {
+            SOE0 = 0x0000;      // �Ō��NAK
+        }
+        IICIF10 = 0;
+        SIO10 = 0xFF;           // �_�~�[�f�[�^�������Ǝ�M�J�n
+        while( IICIF10 == 0 )
+        {;}                       // ��M�����҂�
+
+        *dest = SIO10;
+        dest++;
+        len--;
+    }
+    while( len != 0 );
+
+    iic_mcu_send_sp(  );
+
+    IICIF10 = 0;
+    iic_mcu_busy = false;
+    return ( ERR_SUCCESS );
+}
+
+
+
+
+/* ========================================================
+  �X���[�u�� �w�P�o�C�g�x ���C�g
+  �O�̓]�����I���̂�҂��āA���C�g���܂��B
+  �Ԓl�@iic_mcu_write�@�ɓ���
+ ======================================================== */
+err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat )
+{
+
+#if 0
+    static u8 temp;  // �������ςȂ��ŏI���������Ɋ֐��𔲂���i�”\���������j�̂�static
+
+    // ��������Ȃ��ƁA���đ����ɏ������Ƃ��ɑO�̃f�[�^��j�󂵂Ă��܂�
+    while( iic_mcu_busy )
+    {
+        NOP(  );
+    }
+
+    temp = dat;
+    iic_mcu_wo_dma = true;
+    return ( iic_mcu_write( SLA, adrs, 1, &temp ) );
+#else
+    // �P�����̎���DMA�Ƃ��N�����Ȃ��ł������ƏI��点��
+    if( iic_mcu_wait_free() != ERR_SUCCESS )
+    {
+        return( ERR_ERR );
+    }
+
+    // �X�^�[�g�R���f�B�V�����ƃX���[�u�̌Ăяo��...
+    IICMK10 = 1;
+    if( iic_mcu_call_slave( SLA ) != ERR_SUCCESS )
+    {
+        iic_mcu_busy = false;
+        return ( ERR_NOSLAVE );
+    }
+    iic_mcu_send_a_byte( adrs );
+    iic_mcu_send_a_byte( dat );
+    iic_mcu_send_sp(  );
+    iic_mcu_busy = false;
+    return ( ERR_SUCCESS );
+#endif
+}
+
+
+
+/* ========================================================
+  �X���[�u�փ��C�g
+ ���W�X�^ adrs ��擪�ɁA
+ *str����
+ len���������܂��B
+
+   0 ����I��
+   1 �X���[�u���������Ȃ�
+   2 �o�X���N���ɐ�L����Ă��ă^�C���A�E�g
+   3 �O�Ɏw�����ꂽ�ʐM���܂��I����ĂȂ�
+  �y���z
+  �X���[�u���E�F�C�g�R���f�B�V�������o�����Ƃ͋֎~�ł��B
+  ���̏ꍇ�ł��G���[���o�Ȃǂł��܂���
+  DMA1���g�p���܂��B
+ ******************************************************************************/
+err iic_mcu_write( u8 slave, u8 adrs, u8 len, void * src )
+{
+    if( iic_mcu_wait_free() != ERR_SUCCESS )
+    {
+        return( ERR_ERR );
+    }
+#if 0
+  // �g�p���Ȃ�A��
+#endif
+
+  // �X�^�[�g�R���f�B�V�����ƃX���[�u�̌Ăяo��...
+    IICMK10 = 1;
+    IICIF10 = 0;
+    if( iic_mcu_call_slave( slave ) != ERR_SUCCESS )
+    {
+        iic_mcu_busy = false;
+        return ( ERR_NOSLAVE );
+    }
+
+    IICIF10 = 0;
+    if( !iic_mcu_wo_dma )
+    {
+        // DMA���g�p����i�ʏ�j
+
+        // ���W�X�^�A�h���X�𑗂�A�f�[�^�̏���
+        memcpy( iic_send_work, src, 4 );        //�o�b�t�@�Ƃ���4�o�C�g�����p�ӂ��Ė������߁B
+        // DMA�Z�b�g
+        while( DST1 )
+        {;}
+
+        DEN1 = 1;
+        DSA1 = (u8)( &SIO10 );
+        DRA1 = (u16)( &iic_send_work[0] );
+        DBC1 = len;
+        DMC1 = DRS | 8;         // RAM -> SFR, 8bit, IRQ, IIC10
+
+        DMAIF1 = 0;
+        DMAMK1 = 0;
+        DST1 = 1;
+
+        SIO10 = adrs;           // �������ςȂ��I ���荞�݂���������DMA�X�^�[�g
+        // �c��͊��荞�݃��[�`������
+    }
+    else
+    {
+        // DMA���g�p���Ȃ� //
+
+        // ���W�X�^�A�h���X�̑��M
+        IICMK10 = 0;
+        SIO10 = adrs;
+
+        iic_send_wo_dma_len = len;
+        p_iic_send_wo_dma_dat = src;
+        // �c��͊��荞�݃��[�`������
+    }
+
+    return ( ERR_SUCCESS );
+}
+
+
+
+
+/* ========================================================
+  DMA�P�]���I�����荞��
+  IIC_mcu �̑��M�����R�[���o�b�N�֐��̂悤�Ȃ���
+  ���FDMA�]�����I����������ŁAI2C�̓]���͏I����Ă܂���
+�@  ���荞�ݒ��ȂǂŁADMA1�̏������x�������ꍇ�A
+  IIC10�̊��荞�݂̏������ł����ɁA���荞�݂𔭐��������Ȃ��Ȃ�
+  ���ꂪ����܂��B�܂��A�����@�����ɂ���܂���B
+  �@���̂��߁ADMA�d�l�̍��ق́A�Ō�̃o�C�g�͑��M������
+  �t���O�̃|�[�����O�Ŋm�F���܂��B
+ ======================================================== */
+__interrupt void int_dma1(  )
+{
+    EI();
+
+    DMAMK1 = 1;
+    DEN1 = 0;
+    while( ( SSR02L & TSF0 ) != 0 )
+    {
+	    u16 i = 0;
+        if( ++i == 0 )  // �^�C���A�E�g�H
+        {
+            break;
+        }
+    }
+
+//    iic_mcu_send_sp();    // ISR���ŊO�̊֐����ĂԂ͓̂s���������i�ėp���W�X�^�Ҕ�����������j�̂œW�J
+	{
+		ST0 = 0x0004;
+		SOE0 = 0;                   // ��M�̎��͂����ƑO�Ɂu���v�ݒ肵�Ă�B(NACK�o��)
+		SO0 = 0x0000 | TAUS_MASK;   // SCL
+//       nop8(); ����Ă񂶂Ⴞ��
+ 		 NOP(); NOP(); NOP(); NOP();
+		 NOP(); NOP(); NOP(); NOP();
+		SO0 = 0x0400 | TAUS_MASK;   // SCL
+		 NOP(); NOP(); NOP(); NOP();
+		 NOP(); NOP(); NOP(); NOP();
+		SO0 = 0x0404 | TAUS_MASK;
+	}
+
+	IICMK10 = 1;
+    iic_mcu_busy = false;
+}
+
+
+
+/* ========================================================
+  IIC MCU�̃o�C�g���o�������荞��
+  ��DMA�g�p���͎g�p����܂���B
+  �@���̊��荞�ݏ�������DMA�̊��荞�݂ɂ�����΂Ȃ��ꍇ�A
+  �@IIC���荞�݂̃Z�b�g���Ԃɍ��킸���邱�Ƃ�����܂��B
+ ======================================================== */
+__interrupt void int_iic10(  )
+{
+    EI();
+    if( iic_send_wo_dma_len != 0 )
+    {
+        SIO10 = *p_iic_send_wo_dma_dat;
+        p_iic_send_wo_dma_dat ++;
+        iic_send_wo_dma_len --;
+        return;
+    }
+
+    // �Ō�̃o�C�g���M����
+    IICMK10 = 1;
+//    iic_mcu_send_sp();    // ISR���ŊO�̊֐����ĂԂ͓̂s���������i�ėp���W�X�^�Ҕ�����������j�̂œW�J
+	{
+		ST0 = 0x0004;
+		SOE0 = 0;                   // ��M�̎��͂����ƑO�Ɂu���v�ݒ肵�Ă�B(NACK�o��)
+		SO0 = 0x0000 | TAUS_MASK;   // SCL
+ 		 NOP(); NOP(); NOP(); NOP();
+		 NOP(); NOP(); NOP(); NOP();
+		SO0 = 0x0400 | TAUS_MASK;   // SCL
+		 NOP(); NOP(); NOP(); NOP();
+		 NOP(); NOP(); NOP(); NOP();
+		SO0 = 0x0404 | TAUS_MASK;
+	}
+
+	iic_mcu_wo_dma = false;
+    iic_mcu_busy = false;
+}
+
+
+
+/* ========================================================
+  �X���[�u�̌Ăяo��
+�@�X���[�u�A�h���X���Ă�ŁAACK�̊m�F�B
+  ACK�@���@�@�@�@�@�@�@�@�@�@�@�@�@�@�@�@�@�ԁF0
+�@NACK ���@�X�g�b�v�R���f�B�V�������o���B�@�ԁF1
+ ======================================================== */
+static err iic_mcu_call_slave( u8 slave )
+{
+    iic_mcu_send_st(  );
+
+//  SIR02 = SSR02;              // NAK�G���[�̃t���O�N���A
+    if( iic_mcu_send_a_byte( slave ) != ERR_SUCCESS )
+    {
+        iic_mcu_send_sp(  );
+        return ( ERR_NAK );     // �w��̃X���[�u�����Ȃ� / busy
+    }
+
+    return ( ERR_SUCCESS );
+}
+
+
+
+/* ========================================================
+  �ق�ƂɂP�o�C�g�����̂�
+  �����I���܂ŋA��܂���
+ ======================================================== */
+static err iic_mcu_send_a_byte( u8 dat )
+{
+    IICMK10 = 1;
+    IICIF10 = 0;
+    SIO10 = dat;
+    while( IICIF10 == 0 )
+    {
+//        NOP(  );
+    }                           // �ʐM��
+    if( SSR02 != 0 )
+    {
+        SIR02 = SSR02;
+        return ( ERR_NAK );
+    }
+    return ( ERR_SUCCESS );
+}
+
+
+
+/* ========================================================
+  �X�^�[�g�R���f�B�V�����𔭍s
+  �\�t�g�E�F�A����
+ ======================================================== */
+static void iic_mcu_send_st(  )
+{
+    SO0 &= ~0x0004;             // SDA
+    nop8();
+
+    SO0 &= ~0x0400;             // SCL
+    SOE0 = 0x0004;              // �n�[�h�����
+
+    SCR02 = TXE0 | 1 << SLC02 | 7 << DLS02;     // ���M���A�f�[�^�͂W�r�b�g�P��
+    SS0 = 0x0004;               // �ʐM�ҋ@
+}
+
+
+
+/* ========================================================
+  ���X�^�[�g���s
+ ======================================================== */
+static void iic_mcu_send_re_st(  )
+{
+    ST0 |= 0x0004;
+    SO0 |= 0x0400 | TAUS_MASK;  // ( SDA = H ), SCL -> H
+    nop8();
+
+    SOE0 &= ~0x0004;            // ( SCL = H ), SDA -> L
+    nop8();
+
+    iic_mcu_send_st(  );
+}
+
+
+
+/* ========================================================
+  �X�g�b�v�R���f�B�V�������s
+  ���̑O�ɁA�u�Ō�̃o�C�g�̑���M�v�̎��ɑO�������K�v�ł��B
+ ======================================================== */
+static void iic_mcu_send_sp(  )
+{
+    ST0 = 0x0004;
+    SOE0 = 0;                   // ��M�̎��͂����ƑO�Ɂu���v�ݒ肵�Ă�B(NACK�o��)
+    SO0 = 0x0000 | TAUS_MASK;   // SCL
+    nop8();
+
+    SO0 = 0x0400 | TAUS_MASK;   // SCL
+    nop8();
+
+    SO0 = 0x0404 | TAUS_MASK;
+}
+
+
+
+
+/* ========================================================
+  �y���t�F�������W���[���̏�����
+ ======================================================== */
+void iic_mcu_start(  )
+{
+    if( iic_mcu_initialized )
+    {
+        return;
+    }
+
+	iic_mcu_busy = true;
+    DST1 = 0;
+    NOP(  );                    // 2clk�������́ADSTn==0���|�[�����O
+    NOP(  );
+    DEN1 = 0;
+
+    I2C_PU_on();
+    wait_ms( 10 );              // �����オ��̂�50us�ʂ�����
+
+    SAU0EN = 1;
+    nop8();
+
+    SPS0 = 0x0000;              // �V���A�����j�b�g�̃N���b�N�O�B(8M/2)/1
+    SMR02 = bSMR0n_FIXEDBIT | bMD0n2;	// �Ȉ�I2C�ɐݒ�
+    SDR02 = 10 << 9;             // �{�[���[�g�ݒ� 8M/1/(x+1)/2
+
+    SO0 = 0x0404 | TAUS_MASK;   // �ŏ���HH
+    iic_mcu_wo_dma = false;
+
+
+    // �o�X�̃��Z�b�g
+    IICIF10 = 0;
+    IICMK10 = 1;
+
+    iic_mcu_send_st();
+
+    SIO10 = 0xFF;
+    while( IICIF10 == 0 ){;}                           // �ʐM��
+    iic_mcu_send_sp();
+
+    SIR02 = SSR02;
+
+    iic_mcu_busy = false;
+    iic_mcu_initialized = true;
+}
+
+
+
+/* ========================================================
+  ���W���[���̒�~
+  �ēx�g���Ƃ��͏��������K�v
+ ======================================================== */
+void iic_mcu_stop(  )
+{
+    while( iic_mcu_busy )
+    {;}                         // DMA���쒆�͂��������҂�
+    iic_mcu_send_re_st(  );     // SCL,SDA��LL�ɂ���
+    I2C_PU_off();
+    SAU0EN = 0;
+    iic_mcu_initialized = false;
+}
+
+
+
+
+
+
+
+
+
+
+/* ========================================================
+  �R�[�f�b�N�� �w�P�o�C�g�x ���C�g
+  iic_mcu_write_a_byte CODEC�s����[�N�A���E���h
+ ======================================================== */
+err iic_mcu_write_a_byte_codec( u8 adrs, u8 dat )
+{
+    static u8 count;
+
+    // �P�����̎���DMA�Ƃ��N�����Ȃ��ł������ƏI��点��
+    if( iic_mcu_wait_free() != ERR_SUCCESS )
+    {
+        return( ERR_ERR );
+    }
+
+    // �X�^�[�g�R���f�B�V�����ƃX���[�u�̌Ăяo��...
+    IICMK10 = 1;
+    if( iic_mcu_call_slave( IIC_SLA_CODEC ) != ERR_SUCCESS )
+    {
+        iic_mcu_busy = false;
+        return ( ERR_NOSLAVE );
+    }
+    iic_mcu_send_a_byte( adrs );
+    iic_mcu_send_a_byte( dat );
+
+    // ���[�N�A���E���h��������
+    /// ���X�^�[�g�ɂ��ă_�~�[���C�g
+    iic_mcu_send_re_st(  );
+    iic_mcu_send_a_byte( IIC_SLA_CODEC ); // �_�~�[���C�g
+    iic_mcu_send_a_byte( 0x20 );
+    iic_mcu_send_a_byte( count );
+
+    count ++;
+
+    iic_mcu_send_sp(  );
+    iic_mcu_busy = false;
+    return ( ERR_SUCCESS );
+}
diff --git a/tags/SDK3.0(2.00)/i2c_mcu.h b/tags/SDK3.0(2.00)/i2c_mcu.h
new file mode 100644
index 0000000..af2b1d1
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_mcu.h
@@ -0,0 +1,36 @@
+#ifndef __ic2_mcu__
+#define __ic2_mcu__
+
+
+// ========================================================
+#define ERR_OK  0
+#define ERR_NAK 1
+#define ERR_NOSLAVE 2
+
+
+
+// ========================================================
+extern volatile bit iic_mcu_busy;
+extern bit iic_mcu_wo_dma;
+
+extern u8 iic_mcu_result;
+
+
+// ========================================================
+err iic_mcu_read( u8 SLA, u8 adrs, u8 len, u8 * dest );
+u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs );
+
+err iic_mcu_write( u8 SLA, u8 adrs, u8 len, void * src );
+err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat );
+
+err iic_mcu_write_a_byte_codec( u8 adrs, u8 dat );
+
+
+// �����̒ʐM�������������������܂��B
+#define iic_mcu_set_wo_dma()           { while( iic_mcu_busy ){;} iic_mcu_wo_dma = 1; }
+
+void iic_mcu_start(  );
+void iic_mcu_stop(  );
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/i2c_twl.c b/tags/SDK3.0(2.00)/i2c_twl.c
new file mode 100644
index 0000000..5971b37
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_twl.c
@@ -0,0 +1,228 @@
+#ifndef _WIN32
+
+#pragma sfr                     /* ����@�\���W�X�^�g�p */
+
+#endif
+
+
+/*============================================================================*/
+
+#include "config.h"
+
+#ifndef _WIN32
+
+#pragma interrupt INTIICA0	int_iic_twl RB2
+
+#endif
+
+#include "incs.h"
+#include "i2c_twl_defs.h"
+#include "i2c_twl.h"
+
+extern u8 vreg_twl[];
+
+#ifdef _MCU_BSR_
+//#ifdef _MODEL_TS0_ || _MODEL_WM0_
+
+// ���[�L���O���f����I2C���t
+#define ACKD       ACKD0
+#define ACKE       ACKE0
+#define COI        COI0
+#define IICAEN     IICA0EN
+#define IICRSV     IICRSV0
+#define IICA       IICA0
+#define IICAIF     IICAIF0
+#define IICAMK     IICAMK0
+#define IICAPR0    IICAPR00
+#define IICAPR1    IICAPR10
+#define IICCTL0    IICCTL00
+#define IICE       IICE0
+#define IICF       IICF0
+#define IICS       IICS0
+#define IICWH      IICWH0
+#define IICWL      IICWL0
+#define LREL       LREL0
+#define SPD        SPD0
+#define SPIE       SPIE0
+#define STCEN      STCEN0
+#define STD        STD0
+#define SVA        SVA0
+#define WREL       WREL0
+#define WTIM       WTIM0
+#define SMC        SMC0
+#define TRC        TRC0
+
+#endif
+
+#ifndef _MCU_BSR_
+
+// ke3�̎��̓_�~�[�֐�
+void IIC_twl_Stop( void )
+{
+}
+void IIC_twl_Init( void )
+{
+}
+#else
+
+
+
+enum IIC_TWL_STATE{
+    WAIT_ADRS = 0,
+    WAIT_DATA,
+    DATA_READED
+};
+
+
+
+
+/*============================================================================*/
+
+// ���I�@���̓}�N���Ȃ̂ŁAreturn�̓��C�����[�v�ɖ߂�܂��B
+#define wait_next {                                    \
+    tot = 0;                                           \
+  while( IICAIF != 1 ){                                \
+    tot ++;                                             \
+    if( tot == 0 ){                                    \
+      LREL = 1;                                        \
+      return;                                          \
+    }                                                  \
+  }                                                    \
+}
+
+
+__interrupt void int_iic_twl(  )
+{
+    u8      vreg_adrs;
+    u8      rcvd;
+    u16     tot;
+    u8      state;
+
+    // �@
+    WREL = 1;                   // �E�F�C�g�������Ď��̃o�C�g��҂�
+    WDT_Restart();
+    state = WAIT_ADRS;
+
+    while( 1 )
+    {
+        u8 my_iics;
+
+        wait_next;              // �P�o�C�g��M������҂�
+
+        my_iics = IICS;
+        IICAIF = 0;
+
+        if( my_iics & 0x02 )    // ( STD && !SPD )
+        {
+            // �X�^�[�g�R���f�B�V����������
+            if( ( my_iics & 0x08 ) == 0 ) // ( TRC ) ���M�����t���O 0:�}�C�R������M
+            {
+                // �@�f�}�C�R���������ł����ATWL�����g���C�����Ƃ��Ƃ�
+                // �����ɗ���̂̓X���[�u�Ăяo���̎� //
+                WREL = 1;
+                state = WAIT_ADRS;
+                /// ���W�X�^�A�h���X���������̂�҂�
+            }
+            else
+            {
+                // �BR R�ł̃X���[�u�Ăяo��(���X�^�[�g�R���f�B�V����) //
+                IICA = vreg_twl_read( vreg_adrs ); // �f�[�^���M
+                // �X�g�b�v�҂���ALREL = 1 �ɂ��Ȃ��ƁA���M�o�b�t�@���j�󂳂�邱�Ƃ�����
+                state = DATA_READED;
+            }
+        }
+        else if( ( my_iics & 0x03 ) == 0 ) // ( !STD && !SPD )
+        {
+            // ���炩��M
+            rcvd = IICA;
+            WREL = 1;
+
+            if( state == WAIT_ADRS )
+            {
+                // �A
+                vreg_adrs = adrs_table_twl_ext2int( rcvd );
+                /// �f�[�^��������邩�A���X�^�[�g�œǂݏo�����̂�҂�
+                state = WAIT_DATA;
+            }
+            else if( state == DATA_READED )
+            {
+                // �f�[�^1�o�C�g���M�㔭������
+                LREL = 1;
+                return;
+            }
+            else
+            {
+                // �BW
+                // �f�[�^�������܂�
+                SVA = 0x5A;     // �_�~�[
+                LREL = 1;       // �X�^�[�g�R���f�B�V�����҂���(�A���������ݖ��Ή��̂���)
+                vreg_twl_write( vreg_adrs, rcvd );
+                SVA = IIC_T_SLAVEADDRESS;
+                return;         // ��M�����܂� //
+            }
+        }
+        else if( my_iics & 0x01 ) // SPD
+        {
+            // �I��
+            LREL = 1;
+            return;
+        }
+        else
+        {
+            // NOP();
+        }
+    }
+}
+
+
+
+/*****************************************************/
+void IIC_twl_Init( void )
+{
+
+    IICAEN = 1;
+
+    IICE = 0;                   /* IICA disable */
+
+    IICAMK = 1;                 /* INTIICA disable */
+    IICAIF = 0;                 /* clear INTIICA interrupt flag */
+
+    IICAPR0 = 0;                /* set INTIICA high priority */
+    IICAPR1 = 0;                /* set INTIICA high priority */
+    P20 &= ~0x3;
+
+    SVA = IIC_T_SLAVEADDRESS;
+    IICF = 0x01;
+
+    STCEN = 1;                  // ���X�^�[�g�̋���
+    IICRSV = 1;                 // �ʐM�\��������Ȃ�:�X���[�u�ɓO����
+
+    SPIE = 0;                   // �X�g�b�v�R���f�B�V�����ł̊��荞�݂��֎~
+    WTIM = 1;                   // ������ACK��Ԃ�����clk��L�ɌŒ肷��
+    ACKE = 1;                   //  �_��CPU�͖������Ď��̒ʐM���͂��߂邩������Ȃ���ő���clk���J�����Ȃ��Ƃ����Ȃ�
+
+    IICWH = 5;
+    IICWL = 10;                 // L���Ԃ̒����i�H�j
+
+    SMC = 1;
+
+    IICAMK = 0;                 // ���荞�݂�����
+
+    IICE = 1;
+
+    PM20 &= ~0x3;               /* set clock pin for IICA */
+
+    LREL = 1;
+}
+
+
+
+//****************************************************************************
+void IIC_twl_Stop( void )
+{
+    IICE = 0;                   /* IICA disable */
+    IICAEN = 0;
+}
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/i2c_twl.h b/tags/SDK3.0(2.00)/i2c_twl.h
new file mode 100644
index 0000000..0f608b0
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_twl.h
@@ -0,0 +1,7 @@
+#ifndef _iic_twl_
+#define _iic_twl_
+
+void IIC_twl_Init( void );
+void IIC_twl_Stop( void );
+
+#endif
diff --git a/tags/SDK3.0(2.00)/i2c_twl_defs.h b/tags/SDK3.0(2.00)/i2c_twl_defs.h
new file mode 100644
index 0000000..be5d566
--- /dev/null
+++ b/tags/SDK3.0(2.00)/i2c_twl_defs.h
@@ -0,0 +1,196 @@
+#ifndef _MDSERIAL_
+#define _MDSERIAL_
+
+
+/* IIC operation enable	(IICE0)	*/
+#define	IIC0_OPERATION				0x80
+#define	IIC0_OPERATION_DISABLE		0x00    /* stop operation */
+#define	IIC0_OPERATION_ENABLE		0x80    /* enable operation     */
+
+/* Exit	from communications	(LREL0)	*/
+#define	IIC0_COMMUNICATION			0x40
+#define	IIC0_COMMUNICATION_NORMAL	0x00    /* normal operation     */
+#define	IIC0_COMMUNICATION_EXIT		0x40    /* exit from current communication */
+
+/* Wait	cancellation (WREL0) */
+#define	IIC0_WAITCANCEL				0x20
+#define	IIC0_WAIT_NOTCANCEL			0x00    /* do not cancel wait */
+#define	IIC0_WAIT_CANCEL			0x20    /* cancel wait */
+
+/* Generation of interrupt when	stop condition (SPIE0) */
+#define	IIC0_STOPINT				0x10
+#define	IIC0_STOPINT_DISABLE		0x00    /* disable */
+#define	IIC0_STOPINT_ENABLE			0x10    /* enable */
+
+/* Wait	and	interrupt generation (WTIM0) */
+#define	IIC0_WAITINT				0x08
+#define	IIC0_WAITINT_CLK8FALLING	0x00    /* generate     at the eighth clocks falling edge       */
+#define	IIC0_WAITINT_CLK9FALLING	0x08    /* generated at the     ninth clocks falling edge       */
+
+/* Acknowledgement control (ACKE0) */
+#define	IIC0_ACK					0x04
+#define	IIC0_ACK_DISABLE			0x00    /* enable acknowledgement */
+#define	IIC0_ACK_ENABLE				0x04    /* disable acknowledgement */
+
+/* Start condition trigger (STT0) */
+#define	IIC0_STARTCONDITION			0x02
+#define	IIC0_START_NOTGENERATE		0x00    /* do not generate start condition */
+#define	IIC0_START_GENERATE			0x02    /* generate     start condition */
+
+/* Stop	condition trigger (SPT0) */
+#define	IIC0_STOPCONDITION			0x01
+#define	IIC0_STOP_NOTGENERATE		0x00    /* do not generate stop condition */
+#define	IIC0_STOP_GENERATE			0x01    /* generate     stop condition */
+
+/*
+	IIC	Status Register	0 (IICS0)
+*/
+/* Master device status	(MSTS0)	*/
+#define	IIC0_MASTERSTATUS			0x80
+#define	IIC0_STATUS_NOTMASTER		0x00    /* slave device status or communication standby status */
+#define	IIC0_STATUS_MASTER			0x80    /* master device communication status */
+
+/* Detection of	arbitration	loss (ALD0)	*/
+#define	IIC0_ARBITRATION			0x40
+#define	IIC0_ARBITRATION_NO			0x00    /* arbitration win or no arbitration */
+#define	IIC0_ARBITRATION_LOSS		0x40    /* arbitration loss     */
+
+/* Detection of	extension code reception (EXC0)	*/
+#define	IIC0_EXTENSIONCODE			0x20
+#define	IIC0_EXTCODE_NOT			0x00    /* extension code not received */
+#define	IIC0_EXTCODE_RECEIVED		0x20    /* extension code received */
+
+/* Detection of	matching addresses (COI0) */
+#define	IIC0_ADDRESSMATCH			0x10
+#define	IIC0_ADDRESS_NOTMATCH		0x00    /* addresses do not     match */
+#define	IIC0_ADDRESS_MATCH			0x10    /* addresses match */
+
+/* Detection of	transmit/receive status	(TRC0) */
+#define	IIC0_STATUS					0x08
+#define	IIC0_STATUS_RECEIVE			0x00    /* receive status */
+#define	IIC0_STATUS_TRANSMIT		0x08    /* transmit     status */
+
+/* Detection of	acknowledge	signal (ACKD0) */
+#define	IIC0_ACKDETECTION			0x04
+#define	IIC0_ACK_NOTDETECTED		0x00    /* ACK signal was not detected */
+#define	IIC0_ACK_DETECTED			0x04    /* ACK signal was detected */
+
+/* Detection of	start condition	(STD0) */
+#define	IIC0_STARTDETECTION			0x02
+#define	IIC0_START_NOTDETECTED		0x00    /* start condition not detected */
+#define	IIC0_START_DETECTED			0x02    /* start condition detected     */
+
+/* Detection of	stop condition (SPD0) */
+#define	IIC0_STOPDETECTION			0x01
+#define	IIC0_STOP_NOTDETECTED		0x00    /* stop condition not detected */
+#define	IIC0_STOP_DETECTED			0x01    /* stop condition detected */
+
+/*
+	IIC	Flag Register 0	(IICF0)
+*/
+/* STT0	clear flag (STCF) */
+#define	IIC0_STARTFLAG				0x80
+#define	IIC0_STARTFLAG_GENERATE		0x00    /* generate     start condition */
+#define	IIC0_STARTFLAG_UNSUCCESSFUL	0x80    /* start condition generation unsuccessful */
+
+/* IIC bus status flag (IICBSY)	*/
+#define	IIC0_BUSSTATUS				0x40
+#define	IIC0_BUS_RELEASE			0x00    /* bus release status */
+#define	IIC0_BUS_COMMUNICATION		0x40    /* bus communication status     */
+
+/* Initial start enable	trigger	(STCEN)	*/
+#define	IIC0_STARTWITHSTOP			0x02
+#define	IIC0_START_WITHSTOP			0x00    /* generation of a start condition without detecting a stop     condition */
+#define	IIC0_START_WITHOUTSTOP		0x02    /* generation of a start condition upon detection of a stop     condition */
+
+/* Communication reservation function disable bit (IICRSV) */
+#define	IIC0_RESERVATION			0x01
+#define	IIC0_RESERVATION_ENABLE		0x00    /* enable communication reservation     */
+#define	IIC0_RESERVATION_DISABLE	0x01    /* disable communication reservation */
+
+/*
+	IIC	clock selection	register 0 (IICCL0)
+*/
+#define IICCL0_INITIALVALUE   		0x00
+/* Detection of	SCL0 pin level (CLD0) */
+#define	IIC0_SCLLEVEL				0x20
+#define	IIC0_SCL_LOW				0x00    /* clock line at low level */
+#define	IIC0_SCL_HIGH				0x20    /* clock line at high level     */
+
+/* Detection of	SDA0 pin level (DAD0) */
+#define	IIC0_SDALEVEL				0x10
+#define	IIC0_SDA_LOW				0x00    /* data line at low     level */
+#define	IIC0_SDA_HIGH				0x10    /* data line at high level */
+
+/* Operation mode switching	(SMC0) */
+#define	IIC0_OPERATIONMODE			0x08
+#define	IIC0_MODE_STANDARD			0x00    /* operates     in standard     mode */
+#define	IIC0_MODE_HIGHSPEED			0x08    /* operates     in high-speed mode */
+
+/* Digital filter operation	control	(DFC0) */
+#define	IIC0_DIGITALFILTER			0x04
+#define	IIC0_FILTER_OFF				0x00    /* digital filter off */
+#define	IIC0_FILTER_ON				0x04    /* digital filter on */
+
+/* Operation mode switching	(CL01, CL00) */
+#define	IIC0_CLOCKSELECTION			0x03
+
+/*	Combine	of (SMC0, CL01,	CL00)*/
+#define	IIC0_CLOCK0					0x00
+#define	IIC0_CLOCK1					0x01
+#define	IIC0_CLOCK2					0x02
+#define	IIC0_CLOCK3					0x03
+#define	IIC0_CLOCK4					0x08
+#define	IIC0_CLOCK5					0x09
+#define	IIC0_CLOCK6					0x0a
+#define	IIC0_CLOCK7					0x0b
+
+/*
+	IIC	function expansion register	0 (IICX0)
+*/
+/* IIC clock expension (CLX0) */
+#define	IIC0_CLOCKEXPENSION			0x01
+#define	IIC0_EXPENSION0				0x00
+#define	IIC0_EXPENSION1				0x01
+
+/*  Operation clock (CLX0, SMC0, CL01, CL00)
+            |   IIC0_EXPENSION0 |   IIC0_EXPENSION1 |                                
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK0 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/88     |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK1 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/172    |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK2 |       fprs/2      |       prohibited  |   selection clock(fw)
+            |       fprs/344    |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK3 |prohibited/fexscl0 |       prohibited  |   selection clock(fw)
+            |       fw/66       |                   |   transfer clock
+            |       normal      |                   |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK4 |       fprs/2      |       fprs/2      |   selection clock(fw)
+            |       fprs/48     |       fprs/24     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------            
+IIC0_CLOCK5 |       fprs/2      |       fprs/2      |   selection clock(fw)
+            |       fprs/48     |       fprs/24     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK6 |       fprs/4      |       fprs/4      |   selection clock(fw)
+            |       fprs/96     |       fprs/48     |   transfer clock
+            |     high speed    |       high speed  |   mode
+------------|-------------------|-------------------|----------------------
+IIC0_CLOCK7 |prohibited/fexscl0 |       prohibited  |   selection clock(fw)
+            |       fw/18       |                   |   transfer clock
+            |     high speed    |                   |   mode
+------------|-------------------|-------------------|----------------------
+*/
+
+#define ADDRESS_COMPLETE   			0x80
+#define IIC_MASTER_FLAG_CLEAR 		0x00
+
+#endif
diff --git a/tags/SDK3.0(2.00)/incs.h b/tags/SDK3.0(2.00)/incs.h
new file mode 100644
index 0000000..cd33a79
--- /dev/null
+++ b/tags/SDK3.0(2.00)/incs.h
@@ -0,0 +1,58 @@
+#ifndef _WIN32
+#pragma SFR
+#pragma di
+#pragma ei
+#pragma nop
+#pragma stop
+#pragma halt
+#endif
+
+#ifndef _WIN32
+#pragma section @@CODE ROM_CODE
+//#pragma section @@CNST ROM_CNST
+#endif
+
+#ifdef _WIN32
+// VC�̐Ԑ����ǂ��ɂ�����
+#include "sim/simOnWin.h"
+# endif
+
+
+
+//=========================================================
+#ifndef _incs_h_
+#define _incs_h_
+
+// �� �����v��_pc_�ƂŐ؂�ւ��Ă܂�
+#define _mcu_
+
+#include "jhl_defs.h"
+#include "user_define.h"
+
+#include "hal.h"
+
+#include "bsr_system.h"
+#include "renge\renge.h"
+#include "loader.h"
+
+#include "vreg_ctr.h"
+#include "vreg_twl.h"
+
+#include "i2c_mcu.h"
+#include "i2c_twl.h"
+
+#include "rtc.h"
+
+#include "accero.h"
+
+#include "pm.h"
+
+#include "sw.h"
+
+#include "adc.h"
+
+#include "wdt.h"
+
+//=========================================================
+
+#endif
diff --git a/tags/SDK3.0(2.00)/incs_loader.h b/tags/SDK3.0(2.00)/incs_loader.h
new file mode 100644
index 0000000..4bb13b5
--- /dev/null
+++ b/tags/SDK3.0(2.00)/incs_loader.h
@@ -0,0 +1,47 @@
+#ifndef _WIN32
+#pragma SFR
+#pragma di
+#pragma ei
+#pragma nop
+#pragma stop
+#pragma halt
+
+
+#pragma section @@CODE       LDR_CODE
+#pragma section @@CODEL      LDR_CODL
+
+//#pragma section @@R_INIT     FSL_RINT  // ������ƃX�^�[�g�A�b�v���[�`���������l��
+//#pragma section @@CNST       FSL_CNST  // �Z�b�g���Ă���Ȃ�
+#pragma section @@CNSTL      LDR_CNSL
+
+#endif
+
+# ifdef _WIN32
+// VC�̐Ԑ����ǂ��ɂ�����
+#include "sim/simOnWin.h"
+# endif
+
+
+//=========================================================
+#include "jhl_defs.h"
+#include "user_define.h"
+
+#include "hal.h"
+
+#include "bsr_system.h"
+#include "renge\renge.h"
+
+#include "vreg_ctr.h"
+#include "vreg_twl.h"
+
+#include "loader.h"
+
+#include "i2c_mcu.h"
+
+#include "WDT.h"
+
+
+
+//=========================================================
+void firm_update(  );
+void firm_restore(  );
diff --git a/tags/SDK3.0(2.00)/ini_VECT.c b/tags/SDK3.0(2.00)/ini_VECT.c
new file mode 100644
index 0000000..10ea9ea
--- /dev/null
+++ b/tags/SDK3.0(2.00)/ini_VECT.c
@@ -0,0 +1,383 @@
+#ifndef _WIN32
+
+#pragma nop
+
+#endif
+
+#include "config.h"
+
+#ifndef _WIN32
+//#pragma interrupt INTWDTI     fn_intwdti  // ���g�p
+//#pragma interrupt INTLVI      fn_intlvi   // ���g�p
+
+//#pragma interrupt INTP0		intp0_slp       // SLP (CPU���A�v��) �|�[�����O
+//#pragma interrupt INTP1               fn_intp1 // (I2C)
+//#pragma interrupt INTP2               fn_intp2 // (I2C)
+//#pragma interrupt INTP3               fn_intp3 // ������
+#pragma interrupt INTP4		intp4_extdc     // EXTDC, �������d��off����N�����̂݁B�ʏ�̓|�[�����O
+#pragma interrupt INTP5		intp5_shell     // SHELL_CLOSE, �������d��off����N�����̂݁B�ʏ�̓|�[�����O
+#pragma interrupt INTP6		intp6_PM_irq    // CODEC�o�R�ŋ�PMIC�ւ̃R�}���h��������
+
+//#ifdef _MCU_BSR_                          // ���荞�݂��̂��͎̂g���܂���
+//#pragma interrupt INTP21	intp21_RFTx     // �d�g���M�p���X
+//#else
+//#pragma interrupt INTP7		intp21_RFTx
+//#endif
+
+
+/*
+
+ accero��
+#ifdef _MCU_BSR_
+#pragma interrupt INTP23	intp23_ACC_ready RB3       // �����x�Z���T�A�f�[�^��������
+#endif
+*/
+
+//#pragma interrupt INTCMP0     fn_intcmp0
+//#pragma interrupt INTCMP1     fn_intcmp1
+//#pragma interrupt INTDMA0     fn_intdma0
+#pragma interrupt INTDMA1	int_dma1
+
+//#pragma interrupt INTST0      fn_intst0
+/* #pragma interrupt INTCSI00	fn_intcsi00 */
+//#pragma interrupt INTSR0      fn_intsr0
+/* #pragma interrupt INTCSI01	fn_intcsi01 */
+//#pragma interrupt INTSRE0     fn_intsre0
+
+//#pragma interrupt INTST1      fn_intst1
+/* #pragma interrupt INTCSI10	fn_intcsi10 */
+#pragma interrupt INTIIC10	int_iic10
+//#pragma interrupt INTSR1      fn_intsr1
+//#pragma interrupt INTSRE1     fn_intsre1
+
+
+/*
+// TS�̓}�U�{�Ńe���R�AWM�͉�H�}���e���R�Ō��Lj�v�c
+#pragma interrupt INTIICA1	int_iic_ctr RB1
+
+#pragma interrupt INTIICA0	int_iic_twl RB2
+*/
+
+//#pragma interrupt INTTM00     fn_inttm00
+//#pragma interrupt INTTM01     fn_inttm01
+//#pragma interrupt INTTM02     fn_inttm02
+//#pragma interrupt INTTM03     fn_inttm03
+
+#pragma interrupt INTAD		int_adc
+#pragma interrupt INTRTC	int_rtc
+#pragma interrupt INTRTCI	int_rtc_int
+#pragma interrupt INTKR		int_kr
+//#pragma interrupt INTMD               fn_intmd
+
+//#pragma interrupt INTTM04     fn_inttm04
+//#pragma interrupt INTTM05     fn_inttm05
+//#pragma interrupt INTTM06     fn_inttm06
+//#pragma interrupt INTTM07     fn_inttm07
+
+
+//#define _irq_debug_
+/****************************************************/
+/*  ���g�p���̃_�~�[�֐���`                        */
+/****************************************************/
+__interrupt void fn_intwdti(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intlvi(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intp0(){
+#ifdef _irq_debug_
+while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intp1(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}                               //
+__interrupt void fn_intp2(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+__interrupt void fn_intp3(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+
+__interrupt void intp21_RFTx(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+
+//__interrupt   void    fn_intp4(){ while(1){} } // pm.c
+//__interrupt   void    fn_intp5(){ while(1){} } // pm.c
+//__interrupt   void    fn_intp6(){ while(1){} } // pm.c
+//__interrupt   void    fn_intp7(){ while(1){} } // led.c
+//__interrupt   void    fn_intp21(){ while(1){} } // led.c
+
+__interrupt void fn_intcmp0(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intcmp1(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intdma0(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+//__interrupt   void    fn_intdma1(){}  // i2c_mcu.c�ɂ���
+
+__interrupt void fn_intst0(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+/* __interrupt	void	fn_intcsi00(){} */
+__interrupt void fn_intsr0(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+/* __interrupt	void	fn_intcsi01(){} */
+__interrupt void fn_intsre0(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intst1(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+/* __interrupt	void	fn_intcsi10(){} */
+//__interrupt   void    fn_intiic10(){ while(1){} }
+__interrupt void fn_intsr1(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_intsre1(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+//__interrupt   void    fn_intiica(){} // i2c.c�ɂ���
+/* __interrupt	void	fn_inttm00(){} *//* sub.c�ɂĒ�` */
+__interrupt void fn_inttm01(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_inttm02(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+__interrupt void fn_inttm03(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+//__interrupt   void    fn_intad(){ while(1){} }  // adc.c
+__interrupt void fn_intrtc(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+//__interrupt   void    int_rtcint(){} // rtc.c�ɂ���
+//__interrupt   void    fn_intkr(){}  // main.c
+__interrupt void fn_intmd(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_inttm04(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_inttm05(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_inttm06(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+__interrupt void fn_inttm07(  )
+{
+#ifdef _irq_debug_
+    while( 1 )
+    {
+        NOP();
+    }
+#endif
+}
+
+
+
+/* ========================================================
+  �L�[���^�[�����荞��
+ ======================================================== */
+__interrupt void int_kr(  )
+{
+    // �N���邾��
+}
+
+
+
+/* ========================================================
+  ext dc
+ ======================================================== */
+__interrupt void intp4(  )
+{
+    // �N���邾��
+}
+
+
+
+/* ========================================================
+ shell close
+ ======================================================== */
+__interrupt void intp5(  )
+{
+    // �N���邾��
+}
+
+
+#else
+
+#include "sim/sim_interrupt_decrare.c"
+
+#endif
+
diff --git a/tags/SDK3.0(2.00)/jhl_defs.h b/tags/SDK3.0(2.00)/jhl_defs.h
new file mode 100644
index 0000000..b0b36c6
--- /dev/null
+++ b/tags/SDK3.0(2.00)/jhl_defs.h
@@ -0,0 +1,29 @@
+#ifndef __jhl_defs_h__
+#define __jhl_defs_h__
+
+typedef unsigned char u8;
+typedef   signed char s8;
+typedef unsigned short u16;
+typedef   signed short s16;
+
+typedef unsigned short ux16;
+typedef   signed short sx16;
+
+#define true 1
+#define false 0
+
+
+// typedef unsigned char err;
+
+#include "config.h"
+
+#define set_bit( cond, reg, pos ) \
+{                                 \
+  if( cond ){                     \
+    reg |= pos;                   \
+  }else{                          \
+    reg &= ~pos;                  \
+  }                               \
+}
+
+#endif
diff --git a/tags/SDK3.0(2.00)/led.c b/tags/SDK3.0(2.00)/led.c
new file mode 100644
index 0000000..65d4bba
--- /dev/null
+++ b/tags/SDK3.0(2.00)/led.c
@@ -0,0 +1,350 @@
+/* ========================================================
+  LED.c
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma sfr
+
+#endif
+
+#include "incs.h"
+#include "led.h"
+
+
+
+// ========================================================
+// TPS0
+#define BIT_PRS012             ( 1 << 2 )
+#define BIT_PRS002             ( 1 << 6 )
+
+// TMR0
+#define BIT_CKS0             15
+#define BIT_CCS0             12
+#define BIT_MASTER0          11
+#define BIT_STS0              8
+#define BIT_CIS0              6
+#define BIT_MD123             1
+#define BIT_MD0               0
+
+
+
+// ========================================================
+bit ledInitialized;
+
+
+// ���m�点LED�̃p�^�[���f�[�^
+uni_info_LED info_LED;
+
+
+bit info_led_off;
+bit info_led_override;
+
+
+// �[�d�����ۂ�
+extern bit BT_IN_CHG_delayed_n;
+
+
+// ========================================================
+#define led_fade_to( now, goal )       now = fade_to( now, goal )
+
+/* ========================================================
+   reg_led��goal�ɂȂ�܂ŃO���f�[�V��������
+   �Ƃ肠�����A�X�e�b�v�Œ�
+   ====================================================== */
+u8 fade_to( u8 now, u8 goal )
+{
+    if( now != goal )
+    {
+        if( now > goal )
+        {
+            now --;
+        }
+        else
+        {
+            now ++;
+        }
+    }
+    return( now );
+}
+
+
+
+
+// ========================================================
+#define led_fade_to2( led, status )                      \
+    led = fade_to2( status )
+
+
+u8 fade_to2( st_LED_dim_status* status )
+{
+    if( status->now != status->to )
+    {
+        if( abs(( status->to - status->now )) > abs(status->delta) )
+        {
+            status->now += status->delta;
+        }
+        else
+        {
+            status->now = status->to;
+        }
+    }
+    return( status->now / 128 );
+}
+
+
+
+
+// ========================================================
+
+
+// ========================================================
+void LED_init(  )
+{
+/**
+  PWM�̃Z�b�g�A�Ƃ肠�����S������
+
+  �}�X�^�`���l���F�O�@(P01:/reset2)�@�}�X�^�[�͋����`���l�������ł��Ȃ�
+  �X���[�u�@�@�@�@�P�@�r�k�s�n�B(�R�c �k�d�c�H)
+  �@�@�@�@�@�@�@�@�Q�@�J����
+  �@�@�@�@�@�@�@�@�R�@WiFi
+  �@�@�@�@�@�@�@�@�S�@(�s���͂q�s�b32kHz out �Ɏg�p)
+  �@�@�@�@�@�@�@�@�T�@�[�d
+  �@�@�@�@�@�@�@�@�U�@�d�� �k
+  �@�@�@�@�@�@�@�@�V�@�d�� �g
+ */
+    TAU0EN = 1;
+    TPS0 = BIT_PRS012 | BIT_PRS002;     // �}�X�^�[�N���b�N��CK01,8M/2 /2^4 = 250kHz
+
+    TMR00 =
+        1 << BIT_CKS0 | 0 << BIT_CCS0 | 1 << BIT_MASTER0 | 0 << BIT_STS0 | 0
+        << BIT_CIS0 | 0 << BIT_MD123 | 1 << BIT_MD0;
+    TMR01 = TMR02 = TMR03 = TMR04 = TMR05 = TMR06 = TMR07 =
+        1 << BIT_CKS0 | 0 << BIT_CCS0 | 0 << BIT_MASTER0 | 4 << BIT_STS0 | 0
+        << BIT_CIS0 | 4 << BIT_MD123 | 1 << BIT_MD0;
+    ISC = 0;
+    TOM0 = 0x00FE; // �o�̓��[�h�B4��PWM�o�͂��Ȃ���1�ɂ��Ȃ���TO5�ȍ~�ɃN���b�N���͂��Ȃ�
+
+    TOL0 = 0x0000; // �o�͂𔽓]�����邩�t���O
+
+    TO0 = 0x0000;                    // �^�C�}�[���쒆�ŁA�^�C�}�[�o�͂ɂ��ĂȂ��Ƃ��̃s���̃��b�`�B�^�C�}�[�o�͂��g��Ȃ��Ȃ�O
+    TOE0 = 0x00EE; // TOx���^�C�}�[���W���[��������H
+
+    TS0 = 0x00EF;  // ����J�n
+
+    TDR00 = LED_BRIGHT_MAX - 1; // ���� 10bit
+
+//    system_status.info_fullcolor = 1;
+
+    LED_duty_notify_red = 0;
+    LED_duty_notify_blu = 0;
+    LED_duty_notify_grn = 0;
+    LED_pow_red = 0;
+    LED_CAM     = 0;
+
+	if( system_status.reboot )
+    {
+        vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO;
+        LED_duty_pow_blu = LED_BRIGHT_MAX;
+    }
+    info_led_off = false;
+	ledInitialized = true;
+}
+
+
+
+void LED_stop(  )
+{
+    TT0 = 0x00EF;  // ��Ē�~�i���Ȃ��Ƃ��߁j
+    TOE0 = 0x0000; // TOx���^�C�}�[���W���[��������H(GPIO�ɂȂ�)
+    TAU0EN = 0;
+    LED_pow_red = 0;
+    LED_CAM     = 0;
+	ledInitialized = false;
+}
+
+
+
+
+
+
+
+/* ========================================================
+  * ���荞�݂��̂��͎̂g���܂��� *
+  LED_Wifi           3
+ ======================================================== */
+void tsk_led_wifi(  )
+{
+    static u8 task_interval;
+    static u8 state_wifi_tx;
+    static u8 flag_wifi_TX;
+
+    if( task_interval-- != 0 )
+    {
+        return;
+    }
+
+    // ���M�p���X�̃��b�`
+    if( WIFI_txLatch )         // ���荞�݃t���O���̂��̂��g���Ă��܂�
+    {
+        WIFI_txLatch = 0;
+        flag_wifi_TX = 1;
+    }
+
+    if( flag_wifi_TX != 0 )
+    {
+        vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_WIFI_TX;
+        // ���M�p�^�[��
+        switch ( state_wifi_tx )
+        {
+          case ( 1 ):
+          case ( 3 ):
+          case ( 5 ):
+            LED_duty_WiFi = 0;
+            break;
+          default:
+            LED_duty_WiFi = vreg_ctr[VREG_C_LED_BRIGHT];
+        }
+        state_wifi_tx ++;
+        if( state_wifi_tx == 32 )  // ���_�Ō�A�_�����Ă�����Ԃ̒���
+        {
+            state_wifi_tx = 0;
+            flag_wifi_TX --;
+        }
+        task_interval = 25;
+        return;
+    }
+    else
+    {
+        task_interval = 30;
+        // ���M�t���O�҂�
+        vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_WIFI_TX;
+        if( vreg_ctr[VREG_C_LED_WIFI] == WIFI_LED_OFF )
+        {
+            LED_duty_WiFi = 0;
+            return;
+        }
+        else
+        {
+            if( LED_duty_WiFi == vreg_ctr[VREG_C_LED_BRIGHT] )
+            {
+                return;
+            }
+            else if( LED_duty_WiFi < vreg_ctr[VREG_C_LED_BRIGHT] )
+            {
+                LED_duty_WiFi ++;
+            }
+            else
+            {
+                LED_duty_WiFi --;
+            }
+        }
+        task_interval = 3;
+        return;
+    }
+}
+
+
+
+
+
+bit info_led_pattern_updated;
+/* ========================================================
+ ���m�点LED
+ ======================================================== */
+// �O���f�[�V�����v�Z�Ȃ�
+void calc_info_led_fade_out( st_LED_dim_status* tgt_led )
+{
+    tgt_led -> to = 0;
+    tgt_led -> delta = ( 0 - tgt_led -> now ) / 64;
+}
+
+
+void calc_info_led_next_frame( st_LED_dim_status* tgt_led, u8 color )
+{
+    tgt_led -> to = color * 128;
+    // �O���f�[�V�����̃f���^���v�Z
+    tgt_led -> delta = (( tgt_led -> to - tgt_led -> now ) ) / info_LED.info_LED.fade_time;
+}
+
+
+// �{��
+void tsk_led_notify(  )
+{
+    static u8 time_to_next_frame;
+    static u8 frame;
+    static u8 loops;
+    static st_LED_dim_status LED_dim_status_info_R, LED_dim_status_info_G, LED_dim_status_info_B;
+
+    if( info_led_override )
+    {
+        // �d�r�؂ꂪ�D�悷��
+        return;
+    }
+
+    if( system_status.pwr_state == ON_TRIG )
+    {
+        LED_duty_notify_blu = 0;
+        LED_duty_notify_red = 0;
+        LED_duty_notify_grn = 0;
+        LED_dim_status_info_R.now = 0;
+        LED_dim_status_info_G.now = 0;
+        LED_dim_status_info_B.now = 0;
+    }
+
+    if( info_led_off )  // ���d��off���ȂNj���off
+    {
+        // �t�F�[�h�A�E�g������
+        calc_info_led_fade_out( &LED_dim_status_info_R );
+        calc_info_led_fade_out( &LED_dim_status_info_G );
+        calc_info_led_fade_out( &LED_dim_status_info_B );
+    }
+    else
+    {
+        // �ʏ�^�]
+        if( info_led_pattern_updated )
+        {
+            info_led_pattern_updated = false;
+            vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] &= ~REG_BIT_IN_LOOP;
+            frame = 0;                      // �����Ə�����
+            time_to_next_frame = 0;
+        }
+        else
+        {
+            // ���̃t���[���ɐi�߂�H
+            if( time_to_next_frame == 0 )
+            {
+                time_to_next_frame = info_LED.info_LED.term;
+
+                if( frame >= NOTIFY_LED_TERM -1 )
+                {
+                    vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] |= REG_BIT_IN_LOOP;
+                    if( info_LED.info_LED.last_loop != 255 )  // 255:�������[�v
+                    {
+                        loops ++;
+                        if( loops > info_LED.info_LED.last_loop )
+                        {
+                            frame = 0;
+                        }
+                    }
+                }
+                else
+                {
+                    frame = (( frame + 1 ) & 0x1F ); // �������Ń}�X�N�������Ă����Ȃ��ƍŏI�t���[���`�擪�Ԃ̃O���f�������Ȃ�
+                    vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] &= ~REG_BIT_IN_LOOP;
+                    loops = 0;
+                }
+
+                // �O���f�[�V�����v�Z
+                calc_info_led_next_frame( &LED_dim_status_info_R, info_LED.info_LED.red[frame] );
+                calc_info_led_next_frame( &LED_dim_status_info_G, info_LED.info_LED.grn[frame] );
+                calc_info_led_next_frame( &LED_dim_status_info_B, info_LED.info_LED.blu[frame] );
+                
+            }
+            time_to_next_frame --;
+        }
+    }
+
+    led_fade_to2( LED_duty_notify_red, &LED_dim_status_info_R );
+    led_fade_to2( LED_duty_notify_grn, &LED_dim_status_info_G );
+    led_fade_to2( LED_duty_notify_blu, &LED_dim_status_info_B );
+}
diff --git a/tags/SDK3.0(2.00)/led.h b/tags/SDK3.0(2.00)/led.h
new file mode 100644
index 0000000..e92d209
--- /dev/null
+++ b/tags/SDK3.0(2.00)/led.h
@@ -0,0 +1,146 @@
+#ifndef __led__
+#define __led__
+
+
+
+// ====================================
+
+//#define LED_CHARGE           P2.4  // PM�Œ�`
+
+// LED_DUTY
+#define LED_duty_pow_blu     TDR06
+#define LED_duty_WiFi        TDR03
+
+#define LED_duty_3d          TDR01
+#define LED_duty_notify_red  TDR07
+#define LED_duty_notify_grn  TDR05
+#define LED_duty_notify_blu  TDR02
+
+// ������duty�ς����܂���
+#ifndef _WIN32
+#define LED_pow_red          P4.2
+#define LED_CAM              P7.5
+#else
+#define LED_pow_red          mcuRegP[ _P4_2 ]
+#define LED_CAM              mcuRegP[ _P7_5 ]
+#endif
+
+#define NOTIFY_LED_TERM     32
+
+
+#define LED_BRIGHT_MAX      0x00FF
+
+// ====================================
+#define WIFI_txLatch PIF21					// �d�g���M�p���X
+
+
+
+// ====================================
+enum LED_ILUM_MODE
+{
+  LED_POW_ILM_AUTO = 0,
+  LED_POW_ILM_ON,
+  LED_POW_ILM_SLEEP,
+  LED_POW_ILM_OFF,
+  LED_POW_ILM_ONLY_RED,
+  LED_POW_ILM_ONLY_BLUE,
+  LED_POW_ILM_FORCE_BT_EMPTY
+};
+
+
+enum LED_MODE_3D
+{
+  LED_3D_ILM_OFF = 0,
+  LED_3D_ILM_ON
+};
+
+
+// VREG_C_WIFI_LED
+enum WIFI_LED_MODE
+{
+  WIFI_LED_OFF = 0,
+  WIFI_LED_ON
+};
+
+
+// VREG_C_WIFI_NOTIFY
+enum NOTIFY_LED_MODE
+{
+  NOTIFY_LED_OFF = 0,
+  NOTIFY_LED_ON,
+  NOTIFY_LED_PTN0,
+  NOTIFY_LED_PTN1,
+  NOTIFY_LED_PTN2
+};
+
+
+// VREG_C_CAM_LED
+enum CAM_LED_MODE
+{
+  CAM_LED_OFF = 0,
+  CAM_LED_BLINK,
+  CAM_LED_ON,
+  CAM_LED_BY_TWL,
+  CAM_LED_ON_PLUSE,
+  CAM_LED_OFF_PLUSE
+};
+
+
+
+// ���m�点LED�����֌W //
+typedef struct _st_info_LED
+{
+    u8 term;                    // 1�t���[�����`�b�N�H
+    u8 fade_time;               // ���`�b�N�Ŏ��̃t���[���̐F�ɒB���邩
+    u8 last_loop;               // �ŏI�t���[�����J��Ԃ��H
+    u8 resv1;
+    u8 red[32];
+    u8 grn[32];
+    u8 blu[32];
+}st_info_LED;
+
+typedef union _uni_info_LED
+{
+    st_info_LED info_LED;
+    u8 bindata[ sizeof( st_info_LED ) ];
+}uni_info_LED;
+
+extern uni_info_LED info_LED;
+
+
+// ��LED �_�Ō��� //
+typedef struct _st_led_red_batt_empty
+{
+    u8 dats[4];
+}st_led_red_batt_empty;
+
+extern st_led_red_batt_empty led_red_batt_empty;
+
+
+/*
+   ���m�点LED
+*/
+typedef struct _st_LED_dim_status
+{
+    sx16 to;
+    sx16 delta;
+    sx16 now;                   // �����_�ȉ����o���Ă����Ȃ��Ă͂Ȃ�Ȃ�����
+}st_LED_dim_status;
+
+
+
+// ====================================
+void LED_init(  );
+void LED_stop(  );
+
+
+extern void tsk_led_cam();
+
+
+
+// ====================================
+extern bit ledInitialized;
+extern bit info_led_override;
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/led_cam.c b/tags/SDK3.0(2.00)/led_cam.c
new file mode 100644
index 0000000..5e1c76e
--- /dev/null
+++ b/tags/SDK3.0(2.00)/led_cam.c
@@ -0,0 +1,145 @@
+/******************************************************//**
+  LED_Cam          TO02
+\n  BLINK,*_PLUSE �̎��́A1�������͕K�����̏�ԂɂȂ�܂��B
+\n  ���̊Ԃ� OFF��BLINK �Ȃǂ����ƁAOFF����������܂��B
+ *********************************************************/
+#ifndef _WIN32
+
+#pragma sfr
+
+#endif
+
+#include "incs.h"
+#include "led.h"
+
+
+
+// ========================================================
+static u8 state_led_cam = 0;
+static u16 task_interval;
+
+bit cam_led_update;
+
+
+
+// ========================================================
+static void cam_led_twl();
+
+
+
+// ========================================================
+void tsk_led_cam(  )
+{
+	DI();                    // ���W�X�^�ւ̏������݂ŋ����N���������邱�Ƃ����邽��
+    if( !cam_led_update )
+    {
+        if( task_interval != 0 )
+        {
+            task_interval --;
+            return;
+        }
+    }
+    cam_led_update = false;  // TWL �̃u�����N�ݒ�i�ꔭ�����_���j�̂���
+	EI();
+
+	if( system_status.pwr_state == SLEEP )  // sleep���A��������
+	{
+        LED_CAM = 0;
+        state_led_cam = 0;
+	}
+	else
+	{
+		// �u�����N�̂悤�ɑ҂��������Ƃ��ȊO�͖��T�N������
+		//  (���W�X�^�̕ύX�ɂ����ɔ�������)
+		switch ( vreg_ctr[VREG_C_LED_CAM] )
+		{
+		case ( CAM_LED_OFF ):
+		default:
+			LED_CAM = 0;
+			state_led_cam = 0;
+			break;
+
+		case ( CAM_LED_ON ):
+			LED_CAM = 1;
+			state_led_cam = 0;
+			break;
+
+		case ( CAM_LED_BLINK ):
+			if( state_led_cam == 0 )
+			{
+				LED_CAM = 1;
+				state_led_cam = 1;
+			}
+			else
+			{
+				LED_CAM = 0;
+				state_led_cam = 0;
+			}
+			task_interval = 250;
+			break;
+
+		case ( CAM_LED_ON_PLUSE ):
+			if( state_led_cam == 0 )
+			{
+				LED_CAM = 1;
+				state_led_cam = 1;
+				task_interval = 250;
+			}
+			else
+			{
+				vreg_ctr[VREG_C_LED_CAM] = CAM_LED_OFF;
+			}
+			break;
+
+		case ( CAM_LED_OFF_PLUSE ):
+			if( state_led_cam == 0 )
+			{
+				LED_CAM = 0;
+				state_led_cam = 1;
+				task_interval = 250;
+			}
+			else
+			{
+				vreg_ctr[VREG_C_LED_CAM] = CAM_LED_ON;
+			}
+			break;
+
+		case( CAM_LED_BY_TWL ):
+			cam_led_twl();
+		}
+	} // if( system_status.pwr_state == sleep ) ... else ...
+}
+
+
+
+void cam_led_twl()
+{
+	// TWL�݊� //
+	switch ( vreg_twl[ REG_TWL_INT_ADRS_CAM ] ){
+	case( TWL_CAMLED_OFF ):
+		LED_CAM = 0;
+		state_led_cam = 0;
+		break;
+
+	case( TWL_CAMLED_BLINK ):
+		if( state_led_cam == 0 )
+		{
+			LED_CAM = 1;
+			state_led_cam = 1;
+		}
+		else
+		{
+			LED_CAM = 0;
+			state_led_cam = 0;
+		}
+		task_interval = (u8)( 600 / SYS_INTERVAL_TICK ) + 250;
+		break;
+
+	case( TWL_CAMLED_ON ):
+	case( TWL_CAMLED_DEF_ON ):
+	default:
+		LED_CAM = 1;
+		state_led_cam = 1;
+		break;
+	}
+}
diff --git a/tags/SDK3.0(2.00)/led_pow.c b/tags/SDK3.0(2.00)/led_pow.c
new file mode 100644
index 0000000..08afc5c
--- /dev/null
+++ b/tags/SDK3.0(2.00)/led_pow.c
@@ -0,0 +1,269 @@
+/* ========================================================
+  // �d��LED
+  LED_POW_B,R         6,7
+
+  TDR00�@����(0x03FF�BTPS0��250kHz�ŃJ�E���g�A�b�v�B10bit�Ȃ�250Hz�ʂɂȂ�)
+  TDR0x�@Duty 0�ŏ����ATDR00(���� =0x03FF�ȏ�)�œ_���ł��B
+
+  enum pwr_state_{
+  OFF_TRIG = 0,
+  ON_CHECK,
+  ON_TRIG,
+  ON,
+  SLEEP
+};
+
+enum LED_ILUM_MODE{
+  LED_POW_ILM_AUTO,
+  LED_POW_ILM_ON,
+  LED_POW_ILM_SLEEP,
+  LED_POW_ILM_CEOFF
+};
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma sfr
+
+#endif
+
+#include "incs.h"
+#include "led.h"
+
+
+// ========================================================
+// �X���[�v�����ł̃e�[�u���B�}�W���B
+const u8 LED_PTN_SLEEP[] = {
+     25,  38,  52,  68,  83,  98, 110, 119,
+    125, 128, 128, 125, 119, 110,  98,  83,
+     68,  52,  38,  25,  16,  10,   8,   8,
+      8,   8,   8,   8,   8,   8,  10,  16
+      };
+
+
+// ��LED�̓d�r�c��LED�̓_�Ńp�^�[��
+st_led_red_batt_empty led_red_batt_empty = { 0x55, 0x55, 0x55, 0x55 };
+#define LED_SLEEP_FRAME_LEN 71
+#define LED_SLEEP_DIM_LEN   71
+#define LED_SLEEP_FRAME_NUM 32
+
+
+
+// ========================================================
+static void led_pow_normal(  );
+static void led_pow_sleep(  );
+static void led_pow_bt_empty();
+static u8 led_pow_batt_low();
+
+#define led_fade_to( now, goal )       now = fade_to( now, goal )
+extern u8 fade_to( u8 now, u8 goal );
+
+#define led_fade_to2( led, status )    led = fade_to2( status )
+extern u8 fade_to2( st_LED_dim_status* status );
+
+
+
+// ========================================================
+// �d��LED�̃X���[�v�p�^�[���̃X�e�[�^�X��
+u8 time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN;
+u8 frame_sleep;
+st_LED_dim_status LED_dim_status_sleep;
+
+extern bit ledInitialized;
+extern bit BT_IN_CHG_delayed_n; 
+
+
+
+// ========================================================
+void tsk_led_pow(  )
+{
+	if( ! ledInitialized )
+	{
+		return;
+		// �����܂�
+	}
+
+    info_led_override = false;
+
+    switch ( vreg_ctr[VREG_C_LED_POW] )
+    {
+    case ( LED_POW_ILM_AUTO ):
+    default:
+        led_pow_normal(  );
+        break;
+
+    case ( LED_POW_ILM_SLEEP ):
+        led_pow_sleep(  );
+        break;
+
+    case ( LED_POW_ILM_ON ):
+        led_fade_to( LED_duty_pow_blu, vreg_ctr[VREG_C_LED_BRIGHT] );
+        LED_pow_red = 0;
+        break;
+
+    case ( LED_POW_ILM_OFF ):
+        led_fade_to( LED_duty_pow_blu, 0 );
+        LED_pow_red = 0;
+        break;
+
+    case ( LED_POW_ILM_ONLY_RED ):
+        LED_duty_pow_blu = 0;
+        LED_pow_red = 1;
+        break;
+
+    case ( LED_POW_ILM_ONLY_BLUE ):
+        LED_duty_pow_blu = LED_BRIGHT_MAX;
+        LED_pow_red = 0;
+        break;
+
+    case ( LED_POW_ILM_FORCE_BT_EMPTY ):
+        led_pow_bt_empty();
+        break;
+    }
+
+	if( system_status.pwr_state == OFF || system_status.pwr_state == ON_CHECK )
+	{
+        LED_pow_red = 0;
+	    info_led_override = false;
+    }
+
+    if( info_led_override )
+    {
+        LED_duty_notify_blu = 0;
+        LED_duty_notify_grn = 0;
+		LED_duty_notify_red = ( LED_pow_red == 0 )? 0 : 255;
+    }
+}
+
+
+
+/* ========================================================
+  �d�r�c�ʂŁA�@���ԁ��ԓ_��
+ ======================================================== */
+static void led_pow_normal(  )
+{
+    time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN;
+    frame_sleep = 0;
+    LED_dim_status_sleep.now = (sx16)LED_duty_pow_blu * 128;
+
+    if( led_pow_batt_low() != 0 )  // �Ԃ̓_�������ł���Ă��܂�
+    {
+        return;
+        // �����܂�
+    }
+
+    // �“_��
+    led_fade_to( LED_duty_pow_blu, vreg_ctr[VREG_C_LED_BRIGHT] );
+}
+
+
+
+/* ========================================================
+  �z�^���p�^�[��
+   �d�r�c�ʂŐԁ��ԓ_�łɂ���
+ ======================================================== */
+static void led_pow_sleep(  )
+{
+    if( led_pow_batt_low() != 0 )		// �Ԃ̓_�������ł���Ă��܂�
+    {
+        time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN;
+        frame_sleep = 0;
+        LED_dim_status_sleep.now = (sx16)LED_duty_pow_blu * 128;
+        return;
+        // �����܂�
+    }
+
+    LED_dim_status_sleep.to = LED_PTN_SLEEP[frame_sleep] * 128;
+
+    // �O���f�[�V�����̃f���^���v�Z
+    LED_dim_status_sleep.delta = (( LED_dim_status_sleep.to - LED_dim_status_sleep.now ) ) / LED_SLEEP_DIM_LEN;
+    led_fade_to2( LED_duty_pow_blu, &LED_dim_status_sleep );
+
+    // ���̃t���[���ɐi�߂�H
+    time_to_next_frame_sleep --;
+    if( time_to_next_frame_sleep == 0 )
+    {
+        time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN;
+
+        frame_sleep ++;
+        if( frame_sleep >= LED_SLEEP_FRAME_NUM -1 )
+        {
+            frame_sleep = 0;
+        }
+    }
+}
+
+
+
+/* ========================================================
+  �d�r�����Ȃ��Ƃ��̋���
+�@�Ԓl�F�@0�@�d�r�����Ȃ��Ȃ�����
+�@�@�@�@�@1�@�@�@�@���Ȃ������̂ŋ��ʃp�^�[���ɂ���
+ ======================================================== */
+static u8 led_pow_batt_low()
+{
+    if( vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_LO )
+    {
+        LED_pow_red = 0;
+        return 0;
+        // �����܂�
+    }
+
+    if(( vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_EMPTY ) || !BT_IN_CHG_delayed_n )
+		// �d�r�c�ʂ�5%�i�`10%�j�@�܂��́A���ꖢ���ł��[�d��
+    {
+        // �ԓ_��
+        led_fade_to( LED_duty_pow_blu, 0 );
+		{
+	        LED_pow_red = 1;
+		}
+
+    }
+    else // �d�r��5%�����@���@�A�_�v�^�Ȃ�
+    {
+        led_pow_bt_empty();
+    }
+    return 1;
+}
+
+
+
+
+/* ========================================================
+�@�d�r���Ȃ��p�^�[��
+�@�@�w��p�^�[���𗬂�
+�@�@���m�点���㏑�������肷��
+ ======================================================== */
+static void led_pow_bt_empty()
+{
+    static u8 delay;
+    static u8 red_blink_poi;
+
+    info_led_override = true;
+
+    // �ԓ_��
+    led_fade_to( LED_duty_pow_blu, 0 );
+
+    // �Ԃ̓_�Ńp�^�[�����w��ł���
+    delay ++;
+    if( delay < 64 ) // �t���[���̕ێ����ԉ҂�
+    {
+        return;
+    }
+    delay = 0;
+
+    if( led_red_batt_empty.dats[ red_blink_poi / 8 ] & ( 1 << ( red_blink_poi % 8 )) )
+    {
+        LED_pow_red = 1;
+    }
+    else
+    {
+        LED_pow_red = 0;
+    }
+    red_blink_poi ++;
+    if( red_blink_poi >= 32 )
+    {
+        red_blink_poi = 0;
+    }
+}
+
+
diff --git a/tags/SDK3.0(2.00)/loader.c b/tags/SDK3.0(2.00)/loader.c
new file mode 100644
index 0000000..403ab61
--- /dev/null
+++ b/tags/SDK3.0(2.00)/loader.c
@@ -0,0 +1,382 @@
+/* ========================================================
+  MCU CTR BSR
+  2009/03/30
+  �J���Z�p�� ���c
+
+  �u�[�g���[�_�[��
+  �z�X�g�̒ʐM�ƁA���ȏ��������A�t�@�[���̃`�F�b�N���s���B
+
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma SFR
+#pragma di
+#pragma ei
+#pragma nop
+#pragma stop
+#pragma halt
+#pragma opc
+
+#endif
+#include "incs_loader.h"
+
+#include <fsl.h>
+#include "fsl_user.h"
+
+#include "i2c_ctr.h"
+#include "i2c_mcu.h"
+#include "pm.h"
+#include "rtc.h"
+
+#include "reboot.h"
+
+#include "magic.h"
+
+
+
+#define REG_BIT_RESF_WDT     0x10
+#define REG_BIT_RESF_TRAP    0x80
+#define REG_BIT_RESF_LVI     0x01
+
+
+
+// ========================================================
+#if (FSL_DATA_BUFFER_SIZE>0)
+fsl_u08 fsl_data_buffer[FSL_DATA_BUFFER_SIZE];
+#endif
+
+
+
+#ifdef   FSL_INT_BACKUP
+static fsl_u08 fsl_MK0L_bak_u08;        /*    if (interrupt backup required)            */
+static fsl_u08 fsl_MK0H_bak_u08;        /*    {                                         */
+static fsl_u08 fsl_MK1L_bak_u08;        /*      reserve space for backup information    */
+static fsl_u08 fsl_MK1H_bak_u08;        /*      of interrupt mask flags                 */
+static fsl_u08 fsl_MK2L_bak_u08;        /*                                              */
+static fsl_u08 fsl_MK2H_bak_u08;        /*    }                                         */
+#endif
+
+
+
+// ========================================================
+void    FSL_Open( void );
+void    FSL_Close( void );
+void    hdwinit( void );
+static void hdwinit2(  );
+static void chk_platform_type();
+static void chk_firm_broke();
+
+
+extern void main_loop(  );
+
+
+
+// ========================================================
+void main(  )
+{
+    while( 1 )
+    {
+        WDT_Restart(  );
+
+        if( RTCEN )  // �����TRAP(����update)�ɂ����g���Ȃ��BWDT���ł͗����Ȃ�
+        {
+            system_status.reboot = true;
+        }
+
+        {
+            volatile u8 my_resf = RESF;         // ���ǂނƏ�����
+            if( ( my_resf & REG_BIT_RESF_WDT ) != 0 )
+            {
+                vreg_ctr[ VREG_C_MCU_STATUS ] |= REG_BIT_STATUS_WDT_RESET;
+                // set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET );
+                // ��I2C�̏�������ɍs��
+                system_status.reboot = true;
+            }
+            else if( ( my_resf & REG_BIT_RESF_TRAP ) != 0 ) // ( FSL_ForceReset, 'r' )
+            {
+                system_status.reboot = true;
+            }
+/*
+            else if(( my_resf & REG_BIT_RESF_LVI ) != 0 )
+            {
+                    vreg_ctr[ VREG_C_MCU_STATUS ] |= ( 1 << 2 );
+            }
+*/
+        }
+
+        if( !system_status.reboot )
+        {
+            // �ʏ�̓d������
+            // �d�r�ڑ����A������Ƒ҂��Ă݂�(�`���^�����O�΍�)
+            u16      pwup_delay0;
+            for( pwup_delay0 = 0xFFFF; pwup_delay0 != 0; pwup_delay0 -- ){;};
+        }
+
+        hdwinit2(  );
+
+#ifndef _WIN32
+        // �t�@�[���̐������`�F�b�N //
+        chk_firm_broke();
+#endif
+
+        // ���V�䔻�� 
+		chk_platform_type();
+
+		// �ʏ�^�]
+        main_loop(  );
+    }
+}
+
+
+
+void chk_firm_broke()
+{
+    u8      i;
+    u8      comp = 0;
+
+    // ���[�_�[�Ɩ{�͓̂����o�[�W�������H
+    /// ���ւ̃A�b�v�f�[�g�̓r���ŏI����ĂȂ����H
+    for( i = 0; i < sizeof( __TIME__ ); i++ )      // sizeof( __TIME__ ) = 8 �炵
+    {
+        comp += ( *( __far u8 * )( MGC_LOAD + i ) == *( u8 * )( MGC_FOOT + i ) ) ? 0 : 1;
+        comp += ( *( u8 * )( MGC_HEAD + i ) == *( u8 * )( MGC_FOOT + i ) ) ? 0 : 1;
+    }
+
+    if( *( u8 * )( MGC_FOOT +2 ) != ':' )  // �����ς̂܂�
+    {
+        comp ++;
+    }
+
+    if( comp != 0 )
+    {
+        // �t�@�[�����X�g�A�����݂�
+        firm_restore(  );
+        // �A���Ă��Ȃ��B���Z�b�g��������B
+    }
+}
+
+
+/* ========================================================
+  �f�o�b�K�‚Ȃ��ł�Ə��ɔ���ł��Ȃ����Ƃ�����܂��B
+��CTR�t�@�~��
+ DEV_DET(P12.[2:1])
+  
+��CTR�����̊J���@��
+ P40,41                   !����! �f�o�b�O�L����P40��L����MCU���N�����܂���I
+ HH ���@
+ HL NBD���V��
+ LH �X�^���h�A�������V��
+ LL IS�f�o�b�K
+======================================================== */
+void chk_platform_type()
+{
+    // ��CTR�t�@�~�� //
+	system_status.family = (enum _family)( DEV_DET >> 1 );  /// ����...
+	if( system_status.family == FAMILY_SPFL )
+	{
+		pm_reg_bit_vddlcd = PM_REG_BIT_VDDLCD_AMO;
+	}
+	else
+	{
+		pm_reg_bit_vddlcd = PM_REG_BIT_VDDLCD_CGS;
+	}
+
+	// ��CTR�����̊J���@�� //
+	// �ꉞ������
+	system_status.is_dev = false;
+	system_status.taikendai = false;
+	system_status.taikendai_nbd = false;
+
+	switch( DIPSW )
+	{
+		case DIPSW_TAIKENDAI:
+			system_status.taikendai = true;
+			break;
+
+		case DIPSW_TAIKENDAI_NBD:
+			system_status.taikendai_nbd = true;
+			break;
+
+		case DIPSW_ISDEV:
+	        system_status.is_dev = true;
+			break;
+	}
+#ifdef _FORCE_TAIKENDAI_
+	system_status.taikendai = true;
+#endif
+
+#ifdef _FORCE_TAIKENDAI_NBD_
+	system_status.taikendai_nbd = true;
+#endif
+}
+
+
+
+
+// ========================================================
+void hdwinit( void )
+{                               // �X�^�[�g�A�b�v���[�`��������ɌĂт܂�
+    DI(  );                     /* �}�X�^���荞�݋֎~ */
+
+    CMC = bits8(0,0,0,1, 0,0,0,0);          /* X1���U����(���̓|�[�g)�AXT1�g�p�A����d�͔��U�͕s����ɕt���ʏ�� */
+    CSC = bits8(1,0,0,0, 0,0,0,0);          /* X1���U�Ȃ��AXT1���U����A�����������U���� */
+    OSMC = 0x01;               /* �B�����W�X�^ */
+    CKC = bits8(0,0,0,0, 1,0,0,0);          /* CPU/���ӃN���b�N=fMAIN�AfMAIN=fMX�AfCLK=fMX */
+
+    /*--- ��d�����o��H�̐ݒ� ---*/
+    /* ���Z�b�g�������̃f�t�H���g�́A�I�v�V�����E�o�C�g�ɂĎw�肳��� */
+    LVIS = 0x00;         /* VLVI = 4.22�}0.1V */
+//  LVIM = 0x00;         /* LVI����֎~ */
+    /* �d���d��(VDD)�����o�d��(VLVI)���Ɋ������� */
+    /* �d���d��(VDD)�����o�d��<VLVI)�A�܂��͓���֎~���ɒ�d�����o */
+}
+
+
+
+/* ********************************************************
+ ���u�[�g���Ƃœ������Ⴄ����
+********************************************************** */
+void hdwinit2(  )
+{
+// ���Z�b�g��̏����l���ۏ؂���Ă���̂͏ȗ�
+    // �|�[�g�ݒ� //
+    if( system_status.reboot )  // ���Z�b�g�s�������͂����ɃZ�b�g����
+    {
+        P0  = bits8(0,0,0,0, 0,0,1,1);
+        P3  = bits8(0,0,0,0, 0,1,1,1);  // �Ȉ�I2C�͏o�̓��b�`��1�ɂ���
+    }
+    else
+    {
+//      P0  = bits8(0,0,0,0, 0,0,0,0);  // -,-,-,-, -,-,/reset2,/reset1
+        P3  = bits8(0,0,0,0, 1,1,1,0);  // -,-,-,-, i2c_pu,scl_m,sda_m,/fcr_rst		// �Ȉ�I2C�͏o�̓��b�`��1�ɂ���
+    }
+
+//  PM0  = bits8(1,1,1,1, 1,1,1,1);     // BSR�}�C�R���ł́Areset1�͊Ď��݂̂ɂȂ�B
+    PM3  = bits8(1,1,1,1, 1,0,0,0);     // P31,32�͊Ȉ�I2C
+
+    if( !system_status.reboot )
+    {
+		// ���Z�b�g��̏����l0���ۏ؂���Ă���̂͏ȗ�
+//      P1  = bits8(0,0,0,0, 0,0,0,0);  // bt_temp_p,bt_det_p,led_info_r,led_pow_b led_info_g,32khz_o,led_wifi,led_info_b
+//      P2  = bits8(0,0,0,0, 0,0,0,0);  // ad_vol,ad_3d,acc_int1,led_chg, (sw_sel),(rbr_flight),(/rbr_rst),(ext_vdd33)
+        P4  = bits8(0,0,0,0, 1,0,0,0);  // -,-,-,-, /chg_en, led_pow_r, dipsw[1,0]
+        P5  = bits8(0,0,0,0, 1,0,0,0);  // -,-,-,-, i2c_pu,led_3d,/chg,/gyro_cs
+//      P6  = bits8(0,0,0,0, 0,0,0,0);  // -,-,-,-, -,-,sda2,scl2
+//      P7  = bits8(0,0,0,0, 0,0,0,0);  // slp_o,/irq,led_cam,sw_wifi, sw_pow,pm_irw,shell_close,/extdc
+//      P12 = bits8(0,0,0,0, 0,0,0,0);  // -,-,-,xtal, xtal,dip(�@�픻��)[1,0],slp_i
+//      P14 = bits8(0,0,0,0, 0,0,0,0);  // -,-,-,-, -,-,i2c_pu,i2c_pu				// i2c_pu�̃|�[�g�ݒ�͂����Ɛ�p�֐����g���ď��ԂɁB
+//      P15 = bits8(0,0,0,0, 0,0,0,0);  // -,-,-,-, -,-,ad_bt_det,ad_bt_temp		// AD�͂ǂ����ł�
+//      P20 = bits8(0,0,0,0, 0,0,0,0);  // -,-,accel2,sw_home, wl_tx,amoled_hv,sda1,sda2�B	// spfl reboot���̉t���d���̃P�A�͌�ق�
+
+        /*--- �^�C�}�E�A���C�E���j�b�g�̓����~ ---*/
+//      TAU0EN = 0;                 /* �^�C�}�E�A���C�E���j�b�g�ւ̃N���b�N������~ */
+        TT0 = 0x00ff;               /* �S�^�C�}�E�`���l���̓����~ */
+
+        /*--- RTC�̓����~ ---*/
+        // �ʓr�������֐�
+    }
+
+    /*--- ���荞�ݐݒ� ---------*/
+//    IF0 = 0x0000;               /* ���荞�ݗv���t���O�N���A */
+//    IF1 = 0x0000;
+//    IF2 = 0x0000;
+//    MK0 = 0xFFFF;               /* ���荞�݋֎~ */
+//    MK1 = 0xFFFF;
+//    MK2 = 0xFFFF;
+
+
+    PM20 = bits8(1,1,1,1, 1,0,0,0);  // p20.2�͂�������O��L�ɂ��Ă�������
+    PM1  = bits8(0,0,0,0, 0,0,0,0);
+    PM2  = bits8(1,1,1,0, 1,0,0,1);
+
+    PM4  = bits8(1,1,1,1, 0,0,1,1);
+    PM5  = bits8(1,1,1,1, 1,0,1,0);
+    PM6  = bits8(1,1,1,1, 1,1,0,0);  // I2C�̃��C����L�o�͂ɂȂ��Ă��܂����A�V�X�e����OFF�Ȃ̂ł��܂�Ȃ�
+    PM7  = bits8(0,1,0,1, 1,1,1,1);
+//    PM12 = bits8(1,1,1,1, 1,1,1,1);  // 32kHz�N���b�N�̃s���ݒ�͂ǂ����ł��悢
+    PM14 = bits8(1,1,1,1, 1,1,0,0);
+//    PM15 = bits8(1,1,1,1, 1,1,1,1);
+
+    PU20 = bits8(0,0,0,1, 0,0,0,1);
+//  PU0  = bits8(0,0,0,0, 0,0,0,0);  // �o�b�e���F�،�ɂ��ꂼ��Z�b�g
+//  PU1  = bits8(0,0,0,0, 0,0,0,0);
+//  PU3  = bits8(0,0,0,0, 0,0,0,0);  // �O���Ńv���A�b�v���Ȃ��Ƌ�������BCPU���v���A�b�v����
+//  PU4  = bits8(0,0,0,0, 0,0,0,0);  // �O���Ńv���A�b�v���Ăق���tool0,1)
+    PU5  = bits8(0,0,0,0, 0,0,1,0);
+    PU7  = bits8(0,0,0,1, 1,0,0,1);  // irq(7.6)cpu��pu
+//  PU12 = bits8(0,0,0,0, 0,0,0,0);
+//  PU14 = bits8(0,0,0,0, 0,0,0,0);
+
+    // �|�[�g���̓��[�h�E���W�X�^�ݒ� /////////////////////
+    // [0:�ʏ���̓o�b�t�@ 1:TTL���̓o�b�t�@]
+//  PIM3 = bits8(0,0,0,0, 0,0,0,0);
+//  PIM7 = bits8(0,0,0,0, 0,0,0,0);
+
+    // �|�[�g�o�̓��[�h�E���W�X�^�ݒ�
+    // [0:�ʏ�o�̓��[�h 1:N-ch�I�[�v���E�h���[���o��]
+    POM3 = bits8(0,0,0,0, 0,1,1,0);
+//  POM7 = bits8(0,0,0,0, 0,0,0,0);
+
+    /* ���荞�ݗD�揇�ʁA�S�Ē��(LV3) */
+//  PR00 = 0xFFFF;
+//  PR01 = 0xFFFF;
+//  PR10 = 0xFFFF;
+    PR11 = 0xFFFE;
+//  PR02 = 0xFFFF;
+//  PR12 = 0xFFFF;
+
+    /*--- �O�������̗L���G�b�W�ݒ� ---*/
+    EGP0 = bits8(0,0,1,1, 0,0,0,1);
+    EGN0 = bits8(0,1,1,1, 0,0,0,0);
+    EGP2 = bits8(0,0,0,0, 1,0,1,0);
+//    EGN2 = bits8(0,0,0,0, 0,0,0,0);
+
+    /*--- �L�[���荞�ݐݒ� ---*/
+//  KRM = bits8(0,0,0,0, 0,0,0,0);          /* �S�L�[���荞�ݐM�������o���Ȃ� */
+
+    /*--- ADC�̓����~ ---*/
+//  ADCEN = 0;                  /* ADC�ւ̃N���b�N������~ */
+//  ADM  = bits8(0,0,0,0, 0,0,0,0);          /* �ϊ������~ */
+
+    /*--- �V���A���E�A���C�E���j�b�g�̓����~ ---*/
+//  SAU0EN = 0;                 /* �V���A���E�A���C�E���j�b�g0�ւ̃N���b�N������~ */
+    SCR00 = 0x0087;             /* �e�`�����l���̒ʐM�֎~ */
+    SCR01 = 0x0087;
+    SCR02 = 0x0087;
+    SCR03 = 0x0087;
+
+    // IIC�̓����~
+//  IICA0EN = 0;                /* IICA0(CTR)�ւ̃N���b�N������~ */
+//  IICCTL00 = 0x00;            /* IICA1�����~ */
+//  IICA1EN = 0;                // IICA1(TWL)�ւ̃N���b�N������~
+//  IICCTL01 = 0x00;            // IICA1�����~
+
+    /*--- DMA�̓����~ ---*/
+//  DRC0 = bits8(0,0,0,0, 0,0,0,0);         /* DMA�`���l��0�̓���֎~ */
+//  DRC1 = bits8(0,0,0,0, 0,0,0,0);         /* DMA�`���l��1�̓���֎~ */
+
+    /*--- �N���b�N�o��/�u�U�[�o�͒�~ ---*/
+//  CKS0 = bits8(0,0,0,0, 0,0,0,0);
+//  CKS1 = bits8(0,0,0,0, 0,0,0,0);
+}
+
+
+
+/******************************************************************************
+  �P�ʂ� ms
+  NOP���񂷂����A�w�莞��CPU�� *��L���܂�* �B
+  ���荞�݂Ƃ�����Ƃ��̕��x��܂��B
+  �����덷����܂��B
+ *****************************************************************************/
+void wait_ms( u8 ms ){
+  u16 fine;
+
+  WDT_Restart();
+  while( ms != 0 ){
+    ms--;
+    fine = 860;
+    while( fine != 0 ){
+      fine --;
+    }
+  }
+}
diff --git a/tags/SDK3.0(2.00)/loader.h b/tags/SDK3.0(2.00)/loader.h
new file mode 100644
index 0000000..3b9faa6
--- /dev/null
+++ b/tags/SDK3.0(2.00)/loader.h
@@ -0,0 +1,7 @@
+#ifndef _loader_h_
+#define _loader_h_
+
+void wait_ms( u8 );
+
+#endif
+
diff --git a/tags/SDK3.0(2.00)/magic.c b/tags/SDK3.0(2.00)/magic.c
new file mode 100644
index 0000000..607677a
--- /dev/null
+++ b/tags/SDK3.0(2.00)/magic.c
@@ -0,0 +1,29 @@
+/*****************************************************************************
+�r���h�����𖄂ߍ��݂܂��B
+�r���h�̓x�ɍX�V�����悤�ɂ���K�v������܂��B
+(touch����)
+ ****************************************************************************/
+#include "config.h"
+#include "magic.h"
+
+#ifndef _WIN32
+
+#pragma section @@CNSTL MGC_LOAD AT 0x0FF6
+__far const unsigned char MGC_LOADd[] = __TIME__;
+
+#ifdef _firm_format_v3_
+#pragma section @@CNST MGC_MIMI AT 0x2000
+const unsigned char MGC_HEADdN[] = __TIME__;
+
+#else
+#pragma section @@CNST MGC_MIM2 AT 0x2100
+const unsigned char MGC_HEADd[] = __TIME__;
+#endif
+
+#pragma section @@CNST MGC_TAIL AT 0x4FF6
+const unsigned char MGC_TAILd[] = __TIME__;
+
+#pragma section @@CNST MGC_VER AT 0x4FF4
+const unsigned char MCU_VER[2] = { MCU_VER_MAJOR, MCU_VER_MINOR };
+
+#endif
diff --git a/tags/SDK3.0(2.00)/magic.h b/tags/SDK3.0(2.00)/magic.h
new file mode 100644
index 0000000..b80bfb2
--- /dev/null
+++ b/tags/SDK3.0(2.00)/magic.h
@@ -0,0 +1,24 @@
+#ifndef _magic_h_
+
+#define _magic_h_
+
+// magic.c �̋L�q�ƈ��Ȃ��悤�ɒ��ӁI
+#define MGC_LOAD   0x0FF6
+#define MGC_FOOT   0x4FF6
+
+#ifdef _firm_format_v3_
+#define MGC_HEAD   0x2000
+#else
+#define MGC_HEAD   0x2100
+#endif
+
+#define MGC_LOAD_BKUP   0x1FF6
+#define MGC_FOOT_BKUP   0x7FF6
+
+#ifdef _firm_format_v3_
+#define MGC_HEAD_BKUP  0x5000
+#else
+#define MGC_HEAD_BKUP   0x5100
+#endif
+
+#endif
diff --git a/tags/SDK3.0(2.00)/main.c b/tags/SDK3.0(2.00)/main.c
new file mode 100644
index 0000000..98344b2
--- /dev/null
+++ b/tags/SDK3.0(2.00)/main.c
@@ -0,0 +1,93 @@
+/* ========================================================
+  MCU CTR BSR
+                                       2008,2009 nintendo
+                                       �J���Z�p���@���c
+ ======================================================== */
+
+
+// ========================================================
+#include "incs_loader.h"
+
+#include "WDT.h"
+#include "rtc.h"
+#include "pm.h"
+#include "accero.h"
+#include "led.h"
+#include "adc.h"
+
+#include "pool.h"
+
+
+// ========================================================
+system_status_ system_status;
+uni_pool pool;
+bit force_off;
+
+#ifdef i2c_timeout_test
+bit i2c_mcu_time_out_error;      // I2C�����炩�ŋl�܂����B���I�ȂNJ܂ށB
+extern void i2c_mcu_error_monitor();
+#endif
+
+
+/* ========================================================
+ �{���̃G���g���֐��� loader.c �ɂ���܂�
+ ======================================================== */
+void main_loop( void )
+{
+#ifdef i2c_timeout_test
+    i2c_mcu_time_out_error = false;
+#endif
+
+	// HAL�f�o�b�O���Z�b�g
+	vreg_ctr[ VREG_C_HAL_OVW_CONT0 ] = 0;
+	vreg_ctr[ VREG_C_HAL_OVW_CONT1 ] = 0;
+	vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ] = 0xFF;
+	vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ] = 0xFF;
+	vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ] = 0xFF;
+
+
+	// �d�r�������A�t�@�[���A�b�v�f�[�g��̂�
+    RTC_init(  );               // �����Ń��u�[�g�����肵�Ă��܂�
+
+    renge_init(  );
+
+    iic_mcu_start(  );
+    EI(  );
+
+    BT_chk();
+
+    system_status.pwr_state = OFF_TRIG;
+    if( system_status.reboot )
+    {
+        // ���u�[�g���͓d��on�ɏ㏑��
+        if( PM_chk_LDSW() != 0 )
+        {
+            system_status.pwr_state = ON_TRIG;
+        }
+        vreg_ctr[VREG_C_BT_REMAIN] = 100;
+    }
+
+    vreg_ctr_init(  );
+
+    clear_hosu_hist(); // �����N���A
+
+    renge_task_interval_run_force = true;
+
+    RTCIMK = 0;                 /* ���荞��(�A���[��&�C���^�[�o��)���� */
+
+    // ���C�����[�v //
+    while( 1 )
+    {                           // �V�X�e��tick�A�܂��͊��荞�݂ʼn��܂��B
+        renge_task_interval_run(  );    // �����ŁA�V�X�e��tick�܂��͋����N�����܂�
+        renge_task_immed_run();
+#ifdef i2c_timeout_test
+        if( i2c_mcu_time_out_error )
+        {
+            i2c_mcu_error_monitor();
+        }
+#endif
+        HALT(  );
+    }
+}
+
+
diff --git a/tags/SDK3.0(2.00)/nec_s_2_bsrbin2.rb b/tags/SDK3.0(2.00)/nec_s_2_bsrbin2.rb
new file mode 100755
index 0000000..c4c33fa
--- /dev/null
+++ b/tags/SDK3.0(2.00)/nec_s_2_bsrbin2.rb
@@ -0,0 +1,82 @@
+#!/usr/bin/ruby
+$KCODE = "S"
+=begin
+
+�@NEC�̊‹����f��������SREC���A
+�@�@�����w�蕔���ɂ�0xFF�p�f�B���O���A
+�@�@��BSR�̃A�b�v�f�[�g�p�ɕK�v�ȕ��������؂�o���܂��B
+�@�@�@�@�@�@�@�@�@�@�@�@�i0x0000 - 0x0FFF, 0x2000-0x47FF�j
+
+=end
+
+
+=begin
+if( ARGV[0] == nil )
+  print( "input file name is nessesary!\nabort.\n" )
+  exit(1)
+end
+
+
+unless(File.exist?( ARGV[0] ))
+  print( "file" << ARGV[0] << " not found.\nabort.\n" )
+  exit(1)
+end
+=end
+
+src = File.open( 'bsr.hex' )
+
+dest = File.new( "hoge.bin","wb" )
+
+
+dest.write( 'jhl' )
+
+### get data ##########################
+src_in = Hash.new 
+tempA = Array.new
+dataTemp = Array.new
+
+offset = Numeric.new
+bindata = Array.new( 32*1024, 0xFF )
+
+while(src.readline)
+  tempA = $_.scan(/(\:)(\w\w)(\w\w\w\w)(\w\w)(\w+)(\w\w)/)
+
+  break if( tempA.size == 0 )
+  
+  src_in = { "len" => tempA[0][1], "offset" => tempA[0][2], "type" => tempA[0][3], "data" => tempA[0][4], "CRC" => tempA[0][5] }
+
+  break if src_in["type"].hex == 01
+  break if src_in["len"].hex == 00
+  #  next if  src_in["type"].hex != 00
+  if( src_in["type"].hex != 00 )
+#    p dat
+    next
+  end
+
+  offset = src_in["offset"].hex
+  next if(( 0x1000 <= offset ) && ( offset < 0x2000 ))
+
+  dataTemp = src_in["data"].scan(/\w\w/)
+
+  ( 0...(src_in["len"].to_s.hex) ).each{|i|
+    bindata[ offset + i ] = ( dataTemp[ i ] ).to_s.hex
+  }
+end
+
+### debug enable bit check #############
+# �f�o�b�O���‚ɂȂ��Ă����IS�f�o�b�K�ŋN�����Ȃ��iMCU�����삵�Ȃ��j
+p bindata[0xC3]
+if( bindata[0xC3] != 0x04 )
+  print( "!E debug enable!!" )
+  exit( 1 )
+end
+
+
+### format data and output #############
+4096.times{
+  bindata.delete_at(4096)
+}
+dest.write( bindata[0..(0x4FFF - 0x1000)].pack("c*") )
+dest.close
+
+printf( "intel-HEX to bsr bin converter\n file converted!\n\n" )
diff --git a/tags/SDK3.0(2.00)/pedo_alg_thre_det2.c b/tags/SDK3.0(2.00)/pedo_alg_thre_det2.c
new file mode 100644
index 0000000..8a136b0
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pedo_alg_thre_det2.c
@@ -0,0 +1,569 @@
+/* ********************************************************
+ �����v
+ 3�������x�̃��A���^�C���f�[�^����A�x�N�g���̃m�������o���A
+ 臒l�𒴂��鎞�ԁA�Ԋu�A�m�����̑傫����臒l��؂�ւ���Ȃ�
+********************************************************* */
+#ifndef _WIN32
+
+#pragma mul
+#pragma div
+#pragma bcd
+
+#endif
+
+#include "incs.h"
+
+#ifndef _WIN32
+#include <math.h>
+#endif
+
+#include "accero.h"
+#include "pedometer.h"
+
+#include "pedo_lpf_coeff.h"
+#include "pool.h"
+
+// ========================================================
+// �����̍ŏI�L�^����
+//  ���̏��Ԃ̓��O�ǂݏo���̏��Ԃł�����̂ł�����Ȃ��ł�
+//  ���ԂɃA�h���X�̎Ⴂ�̂���m�ۂ����̂����҂��Ă܂�...
+typedef struct{
+    u8 hour_bcd;
+    u8 day_bcd;
+	u8 month_bcd;
+	u8 year_bcd;
+	u8 min_bcd;
+	u8 sec_bcd;
+}st_calender;
+
+
+
+// ========================================================
+static u16 get_long_hour();
+static u16 calc_hours_spend( u8 );
+
+
+
+// ========================================================
+bit pedolog_overflow;           // 192���ԋL�^�ς݃t���O(i2c�œǂ߂�)
+extern uni_pool pool;           // �������O�͂��̍\���̂̒�
+static u8 p_record;             // ���O�̏������݈ʒu
+static st_calender cal_log_latest; // �Ō�ɕ������X�V��������
+static u16 last_hour_fny;       // fny:from new year
+static st_calender cal_temp;
+static u16 now_longhour;
+
+
+
+
+
+
+// ========================================================
+#define _use_my_sqrt_
+#ifdef _use_my_sqrt_
+unsigned long my_sqrt();
+#endif
+
+// ���N�͉[�N�H
+#define is_leapyear( y )  (( y & 0x03 ) == 0 )
+// �u���N�v�͉[�N�H
+#define is_firstyear( y ) (( y & 0x03 ) == 1 )
+
+
+
+/*=========================================================
+�@�����v
+ ========================================================*/
+void pedometer()
+{
+    static s16 th_H = 15000; // 臒l�B���I�ύX���܂�
+    static s16 th_L = 11000;
+    static u16 acc_norm[3]; // �����x�̑傫���̃q�X�g���B�������傫�������Â�
+    static u16 acc_norm_temp;
+    static u8 interval_hh = 0xFF;  // �R-�R�Ԃ̎��ԁB�Z�߂�����͂����B
+    static u8 time_l;       // �O��̋ɏ�����̌o�ߎ���
+    static u16 peak_l;      // �J�̐[��
+    static u16 norm_hist[TAP];
+
+    static u8 hist_indx;
+
+    signed long filterd;
+
+    u8 i;
+
+    u16 sx16,sy16,sz16;
+
+	DI();
+	sx16 = abs( (u16)vreg_ctr[VREG_C_ACC_XH] * 256 + vreg_ctr[VREG_C_ACC_XL] );
+    sy16 = abs( (u16)vreg_ctr[VREG_C_ACC_YH] * 256 + vreg_ctr[VREG_C_ACC_YL] );
+    sz16 = abs( (u16)vreg_ctr[VREG_C_ACC_ZH] * 256 + vreg_ctr[VREG_C_ACC_ZL] );
+	EI();
+
+    // �x�N�g���̃m����
+#ifdef _mcu_
+# ifndef _use_my_sqrt_
+    norm_hist[ hist_indx & TAP-1 ] = sqrt( (long)sx16 * ( sx16 / 2 ) +
+                                           (long)sy16 * ( sy16 / 2 ) +
+                                           (long)sz16 * ( sz16 / 2 )
+                                           );
+# else
+    norm_hist[ hist_indx & TAP-1 ] = my_sqrt( (long)sx16 * ( sx16 / 2 ) +
+                                              (long)sy16 * ( sy16 / 2 ) +
+                                              (long)sz16 * ( sz16 / 2 )
+                                              );
+# endif
+#endif
+
+#ifdef _pc_
+    norm_hist[ hist_indx & TAP-1 ] = normh * 256 + norml;
+#endif
+
+    hist_indx ++;
+
+    // �q�X�g���Ƀt�B���^(fir)���|���āA����̒l�����߂� //
+    filterd = 0;
+//    for( i = 8; i != 55; i++ )  // �W�����O�΂���̂���
+    for( i = 0; i != 46; i++ )  // �W���e�[�u����������܂����B�p�����[�^����������
+    {
+        filterd += (signed long)norm_hist[ ( hist_indx + i ) & TAP-1 ] * lpf_coeff[ i ];
+    }
+
+    filterd += (4096)*512;      // DC�����Z...�������Ǝv��
+    acc_norm_temp = (s16)( filterd /1024 & 0xFFFF ); // ��FIL_COEFF_QUANT���琳�K��
+/*
+    if( acc_norm[0] < acc_norm_temp )
+    {
+        t_rise ++;
+        if( t_rise == 0 )
+            t_rise == 254;
+    }
+    else
+    {
+        t_rise = 0;
+    }
+*/
+    if( acc_norm[0] != acc_norm_temp )
+    {
+        acc_norm[2] = acc_norm[1];  // �q�X�g��
+        acc_norm[1] = acc_norm[0];
+        acc_norm[0] = acc_norm_temp;
+    }
+
+    if( acc_norm[2] <= acc_norm[1] && acc_norm[1] > acc_norm[0]
+        && acc_norm[0] > th_H )
+        // �ɑ�ŁA臒l�𒴂��Ă���
+    {
+        if( 21 < interval_hh )
+            // �O��̋ɑ傩��̊Ԋu���قǂ悢
+        {
+            if(( interval_hh < 160 ) && ( time_l < interval_hh ))
+                // �J������ł���
+            {
+                if( acc_norm[0] - peak_l > 4200 ){
+                    // ����������܂���
+                    hosu_increment_if_necessary();
+                }
+            }
+            interval_hh = 0;
+        }
+        // �Ȃ񂿂����臒l�̓��I�ύX
+        if( acc_norm[0] > 18000 )
+        {
+            th_L = acc_norm[0] - 10000;
+        }
+        else
+        {
+            th_L = 11000;
+        }
+    }
+    else
+    {
+		if( interval_hh != 255 )	 // �O�a���Z���Ċy�ɏ������炢���̂�
+		{
+			interval_hh ++;
+		}
+    }
+
+    // (2) ���߂̋ɏ�����̎���
+    if( acc_norm[2] >= acc_norm[1] && acc_norm[1] < acc_norm[0]
+        && acc_norm[0] < th_L )
+    {
+        // �ɏ������o
+        time_l = 0;
+        peak_l = acc_norm[0];
+    }
+    else
+    {
+		if( time_l != 255 )
+		{
+			time_l ++;
+		}
+    }
+}
+
+
+/*=========================================================
+�@�����{�P
+�@�@�ݐς��C���N�������g
+  �@�������X�V
+   *2011/01/20
+	�d�l�ύX�@���O�������ς��ɂȂ����炻���Ŏ~�߂�
+ ========================================================*/
+
+
+#define HOSU_NODATA 0xFFFF
+#define HOSU_MAX    0xFFFE
+
+void hosu_increment_if_necessary()
+{
+    u8 year_compd;               // hour���E�␳�ς݌��ݔN�Bcomp(ensation -ed)
+
+	// ���ݎ����擾
+    DI();
+    RWAIT = 1;
+    while( !RWST ){;}
+
+    cal_temp.hour_bcd  = HOUR;
+    cal_temp.day_bcd   = DAY;
+    cal_temp.month_bcd = MONTH;
+    cal_temp.year_bcd  = YEAR;
+    cal_temp.min_bcd   = MIN;
+    cal_temp.sec_bcd   = SEC;
+    
+    RWAIT = 0;
+    EI();
+    
+    year_compd = bcdtob( cal_temp.year_bcd );
+
+    now_longhour = get_long_hour();
+
+	// �������݃|�C���^�̍X�V
+    if( ! ( vreg_ctr[ VREG_C_ACC_HOSU_L ] == 0 &&  // �����von��A�ŏ��̈���܂ł͑O�񂩂�̌o�ߎ��Ԃ��v�Z���Ȃ�
+            vreg_ctr[ VREG_C_ACC_HOSU_M ] == 0 &&
+            vreg_ctr[ VREG_C_ACC_HOSU_H ] == 0 ))  //. �S�r�b�gOR�Ń[�����肷��̂̓f�W�^����H���̕����݂���
+	{
+		// �����v���~�܂��Ă������Ԃ��l�����ĕK�v�Ȃ�i�߂�
+        // �␳�v�Z�@���U�뎞��ō�������ɂȂ����ꍇ�A��A����23����ɏ㏑��
+        if( now_longhour == (u16)-1 ) // �}�W�b�N�i���o�[�Ƃ��ł͂Ȃ��Ď��ۂɌv�Z���ʂ�-1
+        {
+            now_longhour = 365 * 24 -1;
+			if( is_firstyear(year_compd) )
+			{
+				now_longhour += 24;
+			}
+            year_compd --;
+        }
+        fill_hosu_hist_hours( calc_hours_spend( year_compd ) );  // ���������݃|�C���^�̍X�V���s��
+
+		// ���O���ӂ�ŋL�^��~�H
+		if( pedolog_overflow )
+		{
+			return;
+            // �����܂��B���O�̍X�V���Ȃ��B
+		}
+	}
+
+	// �C���N�������g���ėǂ�
+    cal_log_latest = cal_temp;  // �����O�����X�V
+    last_hour_fny  = now_longhour;
+
+	// �������O�@�C���N�������g
+	if( pool.vreg_c_ext.pedo_log[ p_record ] == HOSU_MAX )
+	{
+		// �������Ȃ��ł����܂�
+		//. ���v�̍��v�Ɨ݌v������Ȃ��Ȃ�̂�����邽�߂��낤���ǁA�ǂ��Ȃ́H
+		return;
+	}
+	else if( pool.vreg_c_ext.pedo_log[ p_record ] == HOSU_NODATA )   // ���̎��ԑэŏ��̃J�E���g�̎�
+    {															//  ���ꂵ�Ȃ���1������Ȃ�
+        pool.vreg_c_ext.pedo_log[ p_record ] = 1;
+    }
+    else 
+	{
+		// �ʏ�p�X
+        pool.vreg_c_ext.pedo_log[ p_record ] ++;
+	}
+
+	// �ݐς̍X�V //
+	DI();
+	if( ++vreg_ctr[ VREG_C_ACC_HOSU_L ] == 0 )		// �J���X�g�`�F�b�N
+	{
+		if( ++vreg_ctr[ VREG_C_ACC_HOSU_M ] == 0 )
+		{
+			if( ++vreg_ctr[ VREG_C_ACC_HOSU_H ] == 0 ){
+				vreg_ctr[ VREG_C_ACC_HOSU_L ] = 255; //. ���낢�뎸�s��������...
+				vreg_ctr[ VREG_C_ACC_HOSU_M ] = 255;
+				vreg_ctr[ VREG_C_ACC_HOSU_H ] = 255;
+			}
+		}
+    }
+	EI();
+}
+
+
+
+/* ========================================================
+�󔒂̎��Ԃ�K�؂�0�ɂ��āA
+�����܂ނP���Ԃ̃f�[�^�������ʒu�Ƀ|�C���^�H��i�߂�
+======================================================== */
+static void fill_hosu_hist_hours( u16 hours )
+{
+	// ���O���ӂ�H
+	if( (u16)p_record + hours >= PEDOMETER_LOG_SIZE ) 
+	{
+		pedolog_overflow = true;
+		return;
+	}
+
+	// �󔒂̐����Ԃ̐ݒ�
+    while( hours != 0 )
+    {
+		// �V�d�l�@�����ς��Œ�~
+	    p_record ++;
+#if 1	// debug
+		if( p_record >= PEDOMETER_LOG_SIZE )
+        {
+			pedolog_overflow = true;
+//			dbg_nop();  // �����ɗ���悤���ƃo�O
+			break;
+        }
+		else
+#endif
+		{
+	        pool.vreg_c_ext.pedo_log[ p_record ] = 0;
+		}
+        hours --;
+    }
+
+	return;
+}
+
+
+
+/* ========================================================
+�󔒂̎��Ԃ�K�؂�0�ɂ��āA
+�����܂ނP���Ԃ̃f�[�^�������ʒu�Ƀ|�C���^�H��i�߂�
+======================================================== */
+void clear_hosu_hist()
+{
+    u8 hours = PEDOMETER_LOG_SIZE;
+    do
+    {
+        hours --;
+        pool.vreg_c_ext.pedo_log[ hours ] = 0xFFFF;
+    }
+    while( hours != 0 );
+
+	DI();
+	vreg_ctr[ VREG_C_ACC_HOSU_L ] = 0;
+    vreg_ctr[ VREG_C_ACC_HOSU_M ] = 0;
+    vreg_ctr[ VREG_C_ACC_HOSU_H ] = 0;
+    p_record = 0;
+	pedolog_overflow = false;
+	EI();
+}
+
+
+extern u8 iic_burst_state;
+bit pedolog_read_msb;
+/* ========================================================
+  �����v�q�X�g���ǂݏo���̌㏈��(������)
+  �ǂݏo���|�C���^�̃N���A
+======================================================== */
+/*	�}�N���ɂ��܂���
+void hosu_read_end(  )
+{
+    pedolog_read_msb = 0;
+}
+*/
+
+
+
+/* ========================================================
+  �����v�̃q�X�g����Ԃ��B
+  �P��Ăԓx�ɁA�q�X�g���̉��ʁA��ʁA�ꎞ�ԑk���ĉ��ʏ��...
+======================================================== */
+u8 hosu_read(  )
+{
+    u8 rv;
+    static u8 p_record_buffer;
+    static st_calender cal_buff;	// �ꉞ�A�A�g�~�b�N������
+
+    if( iic_burst_state == 0 )
+    {
+		p_record_buffer = p_record;
+		DI();
+		cal_buff = cal_log_latest;
+		EI();
+    }
+
+    if( iic_burst_state <= 5 )
+    {
+        rv = *( (u8*)&cal_buff + iic_burst_state );  // ��������
+        iic_burst_state ++;
+        return( rv );
+    }
+    else
+    {
+        u16 temp;
+        // 16�r�b�g�ŋL�^���Ă���̂ł΂炵�đ��� /// �����Ɗy������@������񂶂�
+        temp = pool.vreg_c_ext.pedo_log[ p_record_buffer ];
+        if( !pedolog_read_msb  )
+        {
+            rv = (u8)( temp & 0x00FF );
+        }
+        else
+        {
+            rv = (u8)(( temp >> 8 ) & 0x00FF );
+            if( p_record_buffer == 0 )
+            {
+                p_record_buffer = PEDOMETER_LOG_SIZE-1;
+            }
+            else
+            {
+                p_record_buffer --;
+            }
+        }
+        pedolog_read_msb ^= 1;
+        return( rv );
+    }
+
+}
+
+
+
+/* ========================================================
+  ���N�̌��U����̌o�ߎ���(hour)��Ԃ��B
+  ����  ����
+  �Ԓl  u16 long_hour
+======================================================== */
+const u16 DAYS_FROM_HNY[] = {
+    0,
+    31,
+    31+28,  // =59�B�@�c�R���O���͂P���T�X��
+    31+28+31,
+    31+28+31+30,
+    31+28+31+30+31,
+    31+28+31+30+31+30,
+    31+28+31+30+31+30+31,
+    31+28+31+30+31+30+31+31,
+    31+28+31+30+31+30+31+31+30,
+    31+28+31+30+31+30+31+31+30+31,
+    31+28+31+30+31+30+31+31+30+31+30
+    };
+
+static u16 get_long_hour()
+{
+    u8 year    = bcdtob( cal_temp.year_bcd );
+    u8 month   = bcdtob( cal_temp.month_bcd );
+    u8 day     = bcdtob( cal_temp.day_bcd );
+    u8 hour    = bcdtob( cal_temp.hour_bcd );
+    u8 min_bcd = cal_temp.min_bcd; // �召��r�������Ȃ��̂�bcd�̂܂܂ł悢
+    u8 sec_bcd = cal_temp.sec_bcd;
+    u16 long_hour;
+
+    // �܂������̕���
+    long_hour = DAYS_FROM_HNY[ month -1 ]; // -1�̓C���f�b�N�X���킹
+    if( is_leapyear(year) && ( 3 <= month ))
+    {
+        // �[�N�ŁA�[������
+        long_hour ++;
+    }
+    long_hour += day - 1;
+    long_hour *= 24; // ����������
+
+    long_hour += hour;
+
+    // ���E�����E�̑O�H��H
+    if( ( min_bcd > vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY ] )
+        || ( ( min_bcd >= vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY ] )
+                && ( sec_bcd >= vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY_SEC ] ))
+        )
+    {
+        return( long_hour );
+    }
+    else
+    {
+        return( long_hour -1 );  // 1���ԑO�Ɋ܂߂� ���ӁF���U�ō�N�����ɂ���Ƃ��B-1 �ɂȂ�
+    }
+}
+
+
+
+/* ========================================================
+�@�y�ʕ������B
+�@�K�v�\���Ȑ��x�őł��؂�
+   pc��ŃV�~�����[�V�������đ��v����
+======================================================== */
+static unsigned long my_sqrt(unsigned long x)
+{
+    unsigned long s, t;
+
+    if (x <= 0) return 0;
+
+    s = 1;
+    t = x;
+    while (s < t)
+    {
+        s <<= 1;
+        t >>= 1;
+    }
+    do
+    {
+        t = s;
+        s = (x / s + s) >> 1;
+    } while (s < t);
+
+  return t;
+}
+
+
+
+
+/* ========================================================
+�@��‚� �O��Ă΂ꂽ�����ƁA���ݎ����̍��������߂�B�Ԃ�̂�fill_hosu_hist_hours �ɂ��̂܂ܓn����
+ //. ������year_bcd �Ȃ̂�������Ƃ��₾����...
+======================================================== */
+static u16 calc_hours_spend( u8 year )
+{
+	u8 cal_log_latest_year = bcdtob( cal_log_latest.year_bcd );
+
+	// �����N�̓�
+    if( cal_log_latest_year == year )
+    {
+        if( now_longhour > last_hour_fny )
+        {
+            return( now_longhour - last_hour_fny );
+        }
+		else if( now_longhour == 0 && last_hour_fny != 0 )
+		{
+			// �N�������΂���ŁA���E���z�������ځB������Ȃ��ƍ�N�Ō�ɉ��Z���Ă��܂��B
+			return( 1 );
+		}
+		else
+		{
+			return( 0 );  // �������ԑ�(�ƁA�����߂�B�@�ǂ��Ȃ��Ă��m��Ȃ�)
+		}
+    }
+    else if( cal_log_latest_year == ( year -1 ) )
+    {
+        // �N���܂����ł���Ƃ�
+		u16 temp = 365 * 24 - last_hour_fny + now_longhour;
+		if( is_firstyear(year) )
+		{
+			temp += 24;
+		}
+		return( temp );
+    }
+    else if( cal_log_latest_year < year )
+    {
+        // ���N���u
+        return( PEDOMETER_LOG_SIZE +1 );
+    }
+    else
+    {
+        // �J�����_�[�������߂�Ȃ�
+        // �m�[�P�A�ł悢�c���A�s��l�Ƃ����킯�ɂ������Ȃ�
+        return( 0 );
+    }
+}
diff --git a/tags/SDK3.0(2.00)/pedo_lpf_coeff.h b/tags/SDK3.0(2.00)/pedo_lpf_coeff.h
new file mode 100644
index 0000000..f81d6c2
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pedo_lpf_coeff.h
@@ -0,0 +1,84 @@
+#ifndef _pedo_coeff_h_
+#define _pedo_coeff_h_
+
+// =========================================================
+#define TAP 64
+#define FIL_COEFF_QUANT 10
+const s8 lpf_coeff[]={
+/*
+Window Function Algorithm LPF
+Sampling Frequency =     100.0
+cutoff1 =   6.0000000
+Tap Count =64
+Kaiser Constant =  7.000000
+Quantized by 11 [bits]
+ */
+/*         0,// [0]
+         0,
+         0,
+         0,
+         0,
+         0,
+         0,
+         0,
+*/
+         1,// 8
+         2,
+         2,
+         3,
+         3,
+         2,
+         0,
+        -2,
+        -5,// 16
+        -9,
+       -13,
+       -16,
+       -16,
+       -13,
+        -6,
+         4,
+        18,// 24
+        37,
+        56,
+        77,
+        95,
+       110,
+       119,
+       122,
+       119,// 32
+       110,
+        95,
+        77,
+        56,
+        37,
+        18,
+         4,
+        -6,// 40
+       -13,
+       -16,
+       -16,
+       -13,
+        -9,
+        -5,
+        -2,
+         0,// 48
+         2,
+         3,
+         3,
+         2,
+         2,
+         1,
+/*
+         0,
+         0,// 56
+         0,
+         0,
+         0,
+         0,
+         0,
+         0,
+         0
+*/
+};
+#endif
diff --git a/tags/SDK3.0(2.00)/pedometer.h b/tags/SDK3.0(2.00)/pedometer.h
new file mode 100644
index 0000000..8760308
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pedometer.h
@@ -0,0 +1,36 @@
+#ifndef _pedo_
+#define _pedo_
+
+#ifdef WIN32
+typedef unsigned char bit;
+typedef unsigned char u8;
+typedef unsigned short u16;
+
+
+#endif
+
+
+// =========================================================
+extern bit pedolog_read_msb;
+
+
+
+// =========================================================
+//void hosu_read_end(  );	�}�N����
+#define hosu_read_end()		pedolog_read_msb = 0
+
+u8   hosu_read(  );
+void hosu_increment_if_necessary();
+void fill_hosu_hist_hours( u16 );
+void clear_hosu_hist();
+void pedometer();
+
+
+
+// =========================================================
+#define PEDOMETER_LOG_SIZE ( 24 * 7 )
+
+
+
+// =========================================================
+#endif
diff --git a/tags/SDK3.0(2.00)/pm.c b/tags/SDK3.0(2.00)/pm.c
new file mode 100644
index 0000000..d86e7e1
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pm.c
@@ -0,0 +1,1387 @@
+/* ========================================================
+  ��PMIC
+    ���c���J�Z
+    nintendo
+    '08 Dec
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma nop
+
+#endif
+
+#include "incs.h"
+#include "adc.h"
+#include "led.h"
+#include "pm.h"
+#include "renge\renge.h"
+
+#include "batt_params.h"
+
+#include <fsl.h>
+#include "fsl_user.h"
+
+
+
+// ========================================================
+u8 raw_adc_temperature;
+BT_VENDER battery_manufacturer = BT_VENDER_NOT_CHECKED;
+static u8  ntr_pm_reg_shadow;                 // NTR PMIC ���W�X�^�~���[
+bit bt_authorized;               // �o�b�e���p�����[�^���M�ρB�[�d�J�n����
+u8  chg_led_override;           // �A�_�v�^�������Ƃ��A�[�d���邵�Ȃ��Ɋւ�炸���΂炭�_��������
+
+static u16 bt_volt16;
+
+static bit ntr_pm_bt_low_old;
+bit BT_IN_CHG_delayed_n; 
+
+bit temp_zone_charge_disable;    // ���x�ŏ[�d��~���鎞�Ƀq�X�e���V�X��t���邽��
+
+u8 pmic_version;
+u8 mgic_version[2];
+
+static bt_param_* p_bt_param;
+
+static err send_cmd_mgic_2B( u8 reg, u16 dat );
+static err read_mgic_2B( u8 reg, u8* dat );
+
+static err read_BT_SOC( u8* dest );
+static err read_BT_voltage( u8* dest );
+
+static u8 conv_ctr_bt_to_twl_bt();
+
+u8 pm_reg_bit_vddlcd;
+
+
+// ========================================================
+static void BT_model_detect();
+static void BT_mgic_quick_start();
+static void BT_mgic_init();
+static void bt_chk_temparature();
+static void bt_get_charge_status();
+static void bt_param_select();
+static void bt_batt_update_twl();
+static void bt_batt_update_ntr();
+
+
+
+// ========================================================
+#define swap_endian_16( x ) (unsigned int)(( x << 8 ) | ( x >> 8 ))
+
+
+
+// ========================================================
+const u8 BT_MANUF_BORDER[] = {
+    5, 33, 79, 123, 158, 197, 233
+    };
+
+
+/* ========================================================
+  �d�r�̊Ǘ�
+
+  �ȉ��̃s���͎�ɂ����ő���E�Ď�����܂��B
+  �EPM_BT_AUTH		����AGPI                  in
+  �EPM_CHARGE_n		CCIC /CHG                  in
+  �EPM_CHARGE_ERR_n      /FLT                  in
+  �EPM_EXTDC_n           /DOK          INTP4   in
+  �EPM_CHARGE_EN_n	     /CEN                  out
+
+  �ȉ��̕��͊֌W���肻���ł����ʂ̂Ƃ���Ŏ�ɊĎ�����Ă��܂��B
+  �ELED_Pow R, B, Charge	tsk_LED
+  �EBT_TEMP,_P				tsk_ADC
+
+  PM_EXTDC�͊��荞�݃��C���ɂ��邩��
+ ======================================================== */
+#define INTERVAL_TSK_BATT  60
+// ��100���Ə[�d�G���[���ɂ��܂��_�ł��Ȃ��̂�
+
+void tsk_batt(  )
+{
+    static u8 task_interval = 0;
+
+    if( system_status.pwr_state == OFF_TRIG )  // OFF_TRIG�͈�񂵂����Ȃ��̂�
+	{											// ���[�d�̂Ɏh�����u�ԓd���؂�ƁA5sec�d���ē����ł����s�ցB�������Ⴄ
+		chg_led_override = 0;					
+	}
+	else
+	{
+        if( task_interval -- != 0 )
+        {
+            return;
+        }
+        else
+        {
+            task_interval = (u8)( INTERVAL_TSK_BATT / SYS_INTERVAL_TICK );
+        }
+    }
+
+    // �A�_�v�^�X�e�[�^�X�X�V //
+    pm_chk_adapter();
+
+    // �[�d //
+    bt_chk_temparature();       // ���x�`�F�b�N
+    if( !temp_zone_charge_disable && bt_authorized && !PM_EXTDC_n )
+    {
+        BT_CHG_ENABLE(); // ���x�͈�OK�ŏ[�d�ĊJ
+    }
+    else
+    {
+        BT_CHG_DISABLE(); // ���x�댯�I�@�[�d��~
+    }
+
+    bt_get_charge_status();  // CCIC����
+
+    if( ! BT_IN_CHG_delayed_n )         // LED�ɔ��f
+	{
+	    LED_CHARGE = 1;
+	}
+	else
+	{
+	    LED_CHARGE = 0;
+	}
+
+    // �A�_�v�^�‚Ȃ����u�ԁA���[�d�ł����b�킴�Ɠ_��������B���d���Ă邱�Ƃ��킩�点�邽�߁B
+    if( chg_led_override != 0 ){ // �����猩��΂킩�邪�A�u��(���N���b�N)�����鎖������B�C���‚��l���邩�ȁc�H
+        chg_led_override --;
+        LED_CHARGE = 1;
+    }
+
+    // ���W�X�^�̏[�d���r�b�g��LED�ɓ�������
+    set_bit( LED_CHARGE, vreg_ctr[VREG_C_STATUS], REG_BIT_BATT_CHARGE );  // set_bit�̂݁B
+
+    // ���荞��
+    //  tsk_misc�������󂯂�
+
+    // �d�r�c�� //
+    if( system_status.pwr_state != ON_CHECK )
+    {
+        BT_get_left();
+    }
+}
+
+
+#define RAW_TEMP_LH    75	// 50 [degC]
+#define RAW_TEMP_LL    61	// 55
+#define RAW_TEMP_HL    184  //  1
+#define RAW_TEMP_HH    189  // -1
+#define AVG_COUNT      40
+
+/* *******************************************************
+ ���x�`�F�b�N
+  ���x�t���q�X�e���V�X
+ ******************************************************* */
+void bt_chk_temparature()
+{
+    static u8 heikinka_h,heikinka_l;
+
+    if(( RAW_TEMP_LH <= raw_adc_temperature )
+       && ( raw_adc_temperature <= RAW_TEMP_HL ))
+    {
+        if( heikinka_h < AVG_COUNT )
+        {
+            heikinka_h++;
+        }
+        else
+        {
+            temp_zone_charge_disable = false;         // �[�d����
+        }
+    }
+    else if(( raw_adc_temperature <= RAW_TEMP_LL )
+       || ( RAW_TEMP_HH <= raw_adc_temperature ))
+    {
+        if( heikinka_l < AVG_COUNT )
+        {
+            heikinka_l++;
+        }
+        else
+        {
+            temp_zone_charge_disable = true;         // �[�d�֎~
+        }
+    }
+    else
+    {
+        // temp_zone_charge_disable ���̂܂�
+        heikinka_h = 0;
+        heikinka_l = 0;
+    }
+}
+
+
+
+void bt_get_charge_status()
+{
+    // CCIC�̕s�����̂��߁A/CHG�̃l�Q�[�g��������ƒ��J�ɒx��������
+    static u8 anti_chatter;
+
+    if( !BT_IN_CHG_n )
+    {
+        // ����Ƀ`���^�����O����
+        if( anti_chatter < 2 )  // �d�r�����ŃA�_�v�^�����āA�d�ɂ����킳��
+        {                       //  ����Ə[�dLED��������������̂�
+            anti_chatter++;
+        }
+        else
+        {
+            BT_IN_CHG_delayed_n = 0;  // �[�d��
+        }
+    }
+    else
+    {
+        // "���J�ɒx��" todo:�����Ƃ������@�H
+        if( !BT_CHG_Ena_n && vreg_ctr[ VREG_C_BT_REMAIN ] < 60 ) 
+        {
+            BT_IN_CHG_delayed_n = 0;  // �[�d���ƈ����B�[�d���I����Ă���͂����Ȃ�
+        }
+        else
+        {
+            BT_IN_CHG_delayed_n = 1;
+            anti_chatter = 0;
+        }
+    }
+}
+
+
+
+/********************************************************
+�A�_�v�^�̗L���`�F�b�N
+ �d��off���̃A�_�v�^���������ŊO����Ă΂�邽�ߕ���
+ ***********************************************************/
+void pm_chk_adapter()
+{
+    static bit pm_extdc_old;
+
+    if( pm_extdc_old != PM_EXTDC_n )	// HAL ��ʂ����߁A PM_EXTDC_n �� volatile �ɂ���S�z�Ȃ�
+    {
+        pm_extdc_old = PM_EXTDC_n;
+        if( !PM_EXTDC_n )
+        {
+            // �h������
+            set_bit( 1, vreg_ctr[VREG_C_STATUS], REG_BIT_POW_SUPPLY );
+            set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_CONNECT );
+            chg_led_override = (u8)( 3000 / INTERVAL_TSK_BATT );
+        }
+        else
+        {
+            u8 temp_v[2];
+
+            // ������
+            set_bit( 0, vreg_ctr[VREG_C_STATUS], REG_BIT_POW_SUPPLY );
+            set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_DISC );
+            chg_led_override = 0;
+
+            // �d�r�c�ʂ�1%��ŁA�A�_�v�^�L��̎��ɂ͖{�̂��N�����A�Q�[����������
+            //  1%��ɉ񕜂���O�ɃA�_�v�^���������Ƃ��A���荞�݂����Ȃ��Ɗ��Ғʂ��
+            //  ����łȂ��B���ʑΉ��̂��߂�����
+            if( read_mgic_2B( BT_GAUGE_REG_VCELL, temp_v ) == ERR_SUCCESS )
+            {
+                bt_volt16 = ( temp_v[0] * 256 + temp_v[1] );
+            }
+
+            if(( bt_volt16 < V_TH_ZERO ) || ( vreg_ctr[ VREG_C_BT_REMAIN ] == 0 ))
+            {
+                set_irq( VREG_C_IRQ1, REG_BIT_BT_REMAIN );
+            }
+        }
+    }
+}
+
+
+
+/********************************************************
+�d�r�֌W�̏�����
+
+�@�@�@�Q�[�W�@�@�b�@�L��@�@�@�@�@�b�@����
+�@�@�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[
+�@�@�@�d�r�@�L��b�@���@�@�@�@�@�@�b�@�H
+�@�@�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[
+�@�@�@�@�@�@�����b�@�����@�@�@�@�@�b�@�s�r
+�@�@�@�@�@�@�@�@�b�@���@�d�r�����@�b
+�@�@�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[�[
+
+�@�@�Q�[�W�L��A�d�r�����@�̔����^���@���ʂ́A
+�@�d�r���x�Ŕ��肷��
+
+ �Ԓl�F�@�d�r����               0xFF
+         �d�r�ς���ĂȂ�       0
+         �d�r���           1
+
+***********************************************************/
+bit bt_force_update;
+
+void BT_chk()
+{
+    BT_VENDER battery_manufacturer_old;
+
+    battery_manufacturer_old = battery_manufacturer;
+
+    BT_model_detect();
+	bt_param_select();  // �o�b�e���c�ʕ␳�p�����[�^�ȂǃZ�b�g ����@�ł��A�Ƃ肠�����̒l(�p�i)�w��ɂ��Ă����B
+						//  ���ʂ�rcomp�v�Z�����邪�A���������|�C���^���Q�Ƃ���̂��₾���A����@�Ȃ�v�Z���Ȃ��Ƃ��ʓ|
+
+    if( system_status.model != MODEL_JIKKI )
+    {
+        bt_authorized = false;
+        return;
+        // �����܂�
+    }
+
+    if(( battery_manufacturer_old != battery_manufacturer ) ||
+           bt_force_update )
+    {
+        bt_force_update = false;
+        iic_mcu_start(  ); // ���ŏ������t���O�������Ă�̂ŌĂт܂����ėǂ��@����ȂƂ���Ɂcorz
+        if( (( battery_manufacturer_old == BT_VENDER_OPEN ) ||
+             ( battery_manufacturer_old == BT_VENDER_NOT_CHECKED )) &&
+              !system_status.reboot )
+        {
+            BT_mgic_quick_start();
+        }
+        BT_mgic_init();          // �@�픻����s���܂�
+    }
+    bt_authorized = true;
+    renge_task_immed_add( tski_BT_temp_update ); // �d�r���x���X�^�[�g
+}
+
+
+
+
+void BT_model_detect()
+{
+    u8 temp;
+
+    BT_DET_P = 1;
+    BT_TEMP_P = 1;
+    wait_ms( 5 );                 // �d�����オ��̂Ɏ��Ԃ��|����
+
+    raw_adc_temperature = get_adc( ADC_SEL_BATT_TEMP );
+    temp = get_adc( ADC_SEL_BATT_DET );
+    BT_DET_P = 0;
+
+    system_status.captureBox = 0;
+    // �v���b�g�t�H�[������ //
+    if( raw_adc_temperature > 0xF0 )
+    {
+        // TS //
+        system_status.model = MODEL_TS_BOARD;
+    }
+    else if( raw_adc_temperature < 4 )
+    {
+        // ���� //
+        system_status.model = MODEL_SHIROBAKO;
+
+        // ���������āF�L���v�`���{�[�h //
+        if(( iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_VERSION ) == 0x01 ) &&
+            ( iic_mcu_result == ERR_OK ))
+        {
+            system_status.captureBox = 1;
+        }
+    }
+    else
+    {
+        // ���@�A�c��IC NACK( �o�b�e�������܂��͎c��IC�̏� )
+        system_status.model = MODEL_JIKKI;  // �o�b�e�������̎��́��ŏ㏑������
+    }
+
+	// TS��home�{�^���A���@�͖��ڑ��Ȃ̂ŗv�[�q���� /// gnd�ɂ��Ƃ��΂悩�����c
+	if( system_status.model == MODEL_TS_BOARD )
+	{
+		PM_SW_HOME_n_TSBOARD = 1;
+	}
+	else
+	{
+		PM_SW_HOME_n_TSBOARD = 0;
+		SW_HOME_n_TSBOARD_RAW = 0;				/// ���@open �ǂ����ł������񂾂���
+	}
+
+    // �d�r���[�J�[�̎��� //
+    {
+        u8 i;
+
+        battery_manufacturer = BT_VENDER_OPEN;  // �f�t�H���g�l
+        for(i=0; i<=7; i++)
+        {
+            if( temp <= BT_MANUF_BORDER[ i ] )
+            {
+                battery_manufacturer = (BT_VENDER)i;
+                break;
+                /*
+                   BT_VENDER_MAXELL;  // = 0
+                   BT_VENDER_1;
+                   BT_VENDER_2;
+                   BT_VENDER_3;
+                   BT_VENDER_4;
+                   BT_VENDER_PANA;
+                   BT_VENDER_6;
+
+                   BT_VENDER_OPEN;
+                 */
+            }
+        }
+    }
+
+
+    if( ( battery_manufacturer == BT_VENDER_OPEN ) &&
+        ( system_status.model == MODEL_JIKKI ) )
+    {
+        system_status.model = MODEL_JIKKI_NOBATT;
+    }
+}
+
+
+
+static void BT_mgic_quick_start()
+{
+    wait_ms( 10 );  // MGIC�̋N���Ɋ|����
+
+    // 0. �o�b�e���c��IC �N�C�b�N�X�^�[�g
+    send_cmd_mgic_2B( BT_GAUGE_REG_MODE, swap_endian_16( 0x4000 ) );
+
+    wait_ms( 150 );
+}
+
+
+#define MGIC_CMD_UNLOCK_KEY      0x4A57
+#define MGIC_CMD_RESET           0x5400
+static void BT_mgic_init()
+{
+    u8      temp;
+    u8      origParam[4];
+
+    /*
+    // -1. ���Z�b�g�������Ă݂�
+    �������Ⴞ��!
+    i2c_send_buff_2B._u16 = swap_endian_16( MGIC_CMD_RESET );
+    send_cmd_mgic_2B( BT_GAUGE_REG_COMMAND );  // �����‚�NACK��Ԃ�
+    */
+
+    if( system_status.model != MODEL_JIKKI )
+    {
+        return;
+        // �����܂�
+    }
+
+    // 1. ���b�N����
+    if( send_cmd_mgic_2B( BT_GAUGE_REG_LOCK, swap_endian_16( MGIC_CMD_UNLOCK_KEY ) ) != ERR_SUCCESS )
+    {
+        // �c��IC NACK
+        vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_MGIC_ERR;
+        return;
+        // �����܂�
+    }
+
+    vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_MGIC_ERR;
+
+    //        wait_ms( 5 + 1 ); �O�ɃE�F�C�g����Ă�̂ŕs�v
+
+    // 2. �����p�����[�^���ꎞ�ۑ�
+    iic_mcu_read( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4, origParam );
+
+    // 3. �ꎞ�I��OCV��ύX
+    send_cmd_mgic_2B( BT_GAUGE_REG_OCV, swap_endian_16( p_bt_param->ocv )); // �}�W�b�N�i���o�[�I�Ȃ��́B���[�J�[�w��
+
+    // 4. �ꎞ�I��RCOMP��ύX
+    send_cmd_mgic_2B( BT_GAUGE_REG_RCOMP, swap_endian_16( 0xFF00 ) );
+
+    // 5.���[�J�[�ʃp�����[�^�̃��[�h
+    {
+        u8 loop;
+
+        // 16�o�C�g���Ƃɋ�؂�Ƃ̂��Ɓ@�i�m�C�Y�΍�Ƃ������񂾂��ǁA�Ӗ�����񂩁H�j
+        for( loop = 0; loop < 4; loop ++ )
+        {
+            iic_mcu_set_wo_dma(  );
+            iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_BT_PARAM + loop*16, 16, p_bt_param->mg_param + loop*16 );
+        }
+    }
+
+    // 6. 150ms�ȏ�҂�
+    wait_ms( 150 + 15 );
+
+    // 7. OCV�Ɂu�Ƃ���l�v������
+    send_cmd_mgic_2B( BT_GAUGE_REG_OCV, swap_endian_16( p_bt_param->ocv ) ); // �}�W�b�N�i���o�[�I�Ȃ��́B���[�J�[�w��
+
+    // 8. 150�`600ms�҂B600ms�͌���
+    wait_ms( 150 + 15 );
+
+    // 9. SOC��ǂށB�x���t�@�C�̂��߁B
+    temp = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC );
+
+    if(( p_bt_param->verify.low <= temp ) && ( temp <= p_bt_param->verify.hi ))
+    {
+        // �J�X�^�����f����������OK�I
+    }else{
+        // ���s�������烊�g���C����̂��H
+//        dbg_nop();
+    }
+
+    // 10.����RCOMP��OCV�������߂�
+    iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4, origParam );
+
+    // 11. ���b�N
+    send_cmd_mgic_2B( BT_GAUGE_REG_LOCK, swap_endian_16( 0x0000 ) ); // lock key
+}
+
+
+
+extern u16 _dbg_rcomp;
+/* ========================================================
+  raw_adc_temperature�ɓ����Ă���l�����ɕϊ�����ƂƂ��ɁA
+  �E���W�X�^�ɃZ�b�g
+  �E�c��IC�ɃZ�b�g
+ ======================================================== */
+task_status_immed tski_BT_temp_update(  )
+{
+    static u8 rawdat_old;
+    static s8 temperature;
+    s16       newrcomp;
+    static u8 heikinka;
+
+/*
+	�T�[�~�X�^ - 10k�������_�̎��A
+	��p���x�ł͕�����̃J�[�u���قڃ��j�A�ŁA
+	���c T[��] = 81.48  - 111.97 x ratio
+	TDK  T     = 81.406 - 111.81 x ratio
+*/
+
+    if( rawdat_old != raw_adc_temperature )
+    {
+        if( heikinka < 40 )
+        {
+            heikinka ++;
+        }
+        else
+        {
+            heikinka = 0;
+            rawdat_old = raw_adc_temperature;
+            //        temperature = 81.45 - 111.9 * raw_adc_temperature/256.0;
+            // ���ꂼ��256�{���Ă���
+            temperature = (u8)(( 20851 - 112 * raw_adc_temperature + (256/2) ) /256);
+            vreg_ctr[VREG_C_BT_TEMP] = (u8)temperature;
+
+            newrcomp = 0;
+            if( temperature > 20 )
+            {
+                newrcomp = ( ( temperature - 20 ) * p_bt_param->rcomp.up )/256;
+            }
+            else
+            {
+                newrcomp = ( ( temperature - 20 ) * p_bt_param->rcomp.down )/256;
+            }
+            newrcomp = p_bt_param->rcomp.rcomp + newrcomp;
+
+            if( newrcomp > 255 )
+            {
+                newrcomp = 255;
+            }
+            if( newrcomp < 0 )
+            {
+                newrcomp = 0;
+            }
+            _dbg_rcomp = newrcomp;
+
+            if( send_cmd_mgic_2B( BT_GAUGE_REG_RCOMP, newrcomp ) == ERR_SUCCESS )  // swap�s�v
+            {
+                rawdat_old = raw_adc_temperature;
+            }
+            else
+            {
+                vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_MGIC_ERR;
+            }
+        }
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+/**********************************************************
+ �d�r�c��IC����c�ʂ��擾���A���W�X�^�ɏ������ށB
+ �@�d�r�c��IC�������E�̏�Ȃǂ̎��͂Ƃ肠�����c��99%�Ƃ���B
+ �@�@�@�@�@�@�@�@���� status_1�Ŋm�F�”\�B�d���������Ƀ`�F�b�N���Ă��܂��B
+ �@BT_chk()�����s����Ă���K�v������܂��B
+**********************************************************/
+void BT_get_left(){
+    u8 temp[2];
+    u8 reg_volatile_temp_bt_remain,reg_volatile_temp_bt_remain_fine;  // I2C�̔񓯊��ǂݍ��݂ł̂���‚��h�~ �L���b�v�����̏���
+    u8 fuel_cap_by_voltage;	// �d���ŃL���b�v�Ɏg��
+
+    // �d�r�c��
+    if( system_status.model == MODEL_TS_BOARD
+        || system_status.model == MODEL_SHIROBAKO )
+    {
+        // TS & ���� //
+        if( read_BT_SOC( temp ) == ERR_SUCCESS )
+        {
+            reg_volatile_temp_bt_remain = temp[0];
+            reg_volatile_temp_bt_remain_fine = temp[1];
+        }
+        else
+        {
+            // �G�~�����[�V�����@�\����������
+            // �@����œd���f�͕s�ւ����邾�낤
+            reg_volatile_temp_bt_remain = 99; 
+            reg_volatile_temp_bt_remain_fine = 0;
+        }
+    }
+    else
+    {
+        // ���@ //
+        // �c�ʃ��[�h
+        if( read_BT_SOC( temp ) != ERR_SUCCESS )
+        {
+            // �c��IC��NACK �c�o�b�e���͂��ꂽ
+            vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_MGIC_ERR;
+            bt_authorized = false;
+            reg_volatile_temp_bt_remain = 0;
+            force_off = true;
+        }
+        else
+        {
+            u16 temp_u16;
+
+            // �o�b�e���p�����[�^�̊֌W�Ńr�b�g�V�t�g���K�v
+            temp_u16 = temp[0] * 256 + temp[1];
+            temp_u16 /= p_bt_param->v_scale;
+            reg_volatile_temp_bt_remain = (u8)(( temp_u16 >> 8 ) & 0xFF );
+            if( reg_volatile_temp_bt_remain == 0 )
+            {
+                // 0%��̎���1.00%�ɏグ��
+                //  �[�d�J�n������΂炭�͓d�r�c�ʂ�����̂�
+                //  0%�ɓ��B���Ă��܂����Ƃ�����̂�
+                reg_volatile_temp_bt_remain = 1;
+				reg_volatile_temp_bt_remain_fine = 0;
+            }
+            else
+            {
+                reg_volatile_temp_bt_remain_fine = (u8)(temp_u16 & 0xFF);
+            }
+        }
+    }
+
+    // �d�r�d��
+    {
+        if( read_BT_voltage( temp ) != ERR_SUCCESS )  // 2byte read
+        {
+			temp[0] = (u8)( V_BT_4000MV / 256 );	// �d�r�d���ǂ߂Ȃ�������4000mV���������Ƃɂ��Ă����B
+            temp[1] = 0;
+        }
+        vreg_ctr[ VREG_C_BT_VOLTAGE ] = temp[0];
+        bt_volt16 = ( temp[0] * 256 + temp[1] );
+    }
+
+
+    // �d���ŃL���b�v...�̏���
+    {
+        static u16 hysteresis;
+
+        if( bt_volt16 > V_TH_30 )
+        {
+            fuel_cap_by_voltage = 100;
+            hysteresis = 0;
+        }
+        else if( bt_volt16 - hysteresis > V_TH_LO )
+        {
+            fuel_cap_by_voltage = 30;
+            hysteresis = 0;
+        }
+        else if( bt_volt16 > V_TH_EMPTY )
+        {
+            fuel_cap_by_voltage = BATT_TH_LO;  // ���������
+            hysteresis = 500;
+        }
+        else if( bt_volt16 > V_TH_ZERO )
+        {
+            fuel_cap_by_voltage = BATT_TH_EMPTY;
+            hysteresis = 500;
+        }
+        else if( bt_volt16 > V_TH_FORCE_OFF )
+        {
+            fuel_cap_by_voltage = 0;
+            hysteresis = 500;
+        }
+        else
+        {
+            force_off = true;
+            hysteresis = 500;
+        }
+    }
+    
+
+    // �[�d���i���A�_�v�^���h�����Ă�j�̂ɏ[�d���ĂȂ�
+    //     ���A�i���Ȃ��Ƃ��j�f�̓d�r�c�ʂ�60%�ȏ�iCCIC�o�O����j
+    // = �[�d�����B�d�r���ւ����Ă����MGIC��100%��Ԃ��Ȃ�
+    if( !BT_CHG_Ena_n && BT_IN_CHG_delayed_n ){
+        reg_volatile_temp_bt_remain = 100;
+        reg_volatile_temp_bt_remain_fine = 0;
+    }
+    else
+    {   // �d���ł̃L���b�v���|���邩�H
+        if( fuel_cap_by_voltage < reg_volatile_temp_bt_remain )
+        {
+            reg_volatile_temp_bt_remain = fuel_cap_by_voltage;
+            reg_volatile_temp_bt_remain_fine = 0;
+        }
+    }
+
+	/*
+	�\���ɖ��Ȃ��d������������Ă�炵���̂ŃP�A�����ł悵
+	if( system_status.taikendai_nbd && system_status.model != MODEL_TS_BOARD )	// �d�r�[�q�ɓd�����‚Ȃ����ĂĒl���s���Ȃ��ߏ㏑���B
+    {
+        reg_volatile_temp_bt_remain = 100;
+    }
+	*/
+
+	vreg_ctr[ VREG_C_BT_REMAIN ]      = reg_volatile_temp_bt_remain;
+	vreg_ctr[ VREG_C_BT_REMAIN_FINE ] = reg_volatile_temp_bt_remain_fine;
+
+    // twl�̃��W�X�^�X�V�@(CTR�Ɋ��荞�ݓ����O�ɍX�V���Ȃ��Ɗ��荞�݂̃^�C�~���O���܂�����������Ȃ�)
+    bt_batt_update_twl();
+
+    // �c�ʂŊ��荞�݁B�}���Ɍ���Ɣ�Ԃ��Ƃ����� //
+    {
+        static u8 bt_remain_old_ctr;
+
+        if( bt_remain_old_ctr != reg_volatile_temp_bt_remain )
+        // CTR�ɒʒm
+        {
+            if( (( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO )    && ( BATT_TH_LO    < bt_remain_old_ctr ))||
+                (( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_EMPTY ) && ( BATT_TH_EMPTY < bt_remain_old_ctr ))||
+                (( vreg_ctr[ VREG_C_BT_REMAIN ] == 0 )             && ( bt_remain_old_ctr != 0 )) )
+            {
+                set_irq( VREG_C_IRQ1, REG_BIT_BT_REMAIN );
+            }
+        }
+        bt_remain_old_ctr = vreg_ctr[ VREG_C_BT_REMAIN ];
+    }
+
+    // PMIC-NTR�ɓd�r�c�ʂ������Ă�����
+    bt_batt_update_ntr();
+}
+
+
+
+/* ========================================================
+  �t���n�̓d������
+  �@�X�e�[�^�X�t���O�͂����ɗ��ĂĂ��܂��B
+   �@�s�������Ԃ����邵�A
+     �N�����s�ł���Γd����������
+     �ʂ̃^�X�N�œd�������͊Ď����Ă��āA�X�e�[�^�X���N���A����
+ ======================================================== */
+// BSR //
+err PM_LCD_on(  )
+{
+    u8 rv;
+
+    PM_VDDLCD_on(  );
+
+    if( system_status.family == FAMILY_SPFL )
+    {
+        SPFL_LCD_AMOL_HV_CONT = 1;
+    }
+
+    wait_ms( DELAY_PM_TSS_50B_AND_TCOM );
+
+    PM_TCOM_on(  );
+
+    wait_ms( DELAY_PM_TCOM_TO_VCS );
+
+    PM_VCS_on(  );
+
+    wait_ms( DELAY_PM_VCS_TO_BL );
+
+    rv = (u8)PM_chk_LDSW(  );
+
+    if( rv != 0 ) // ����p�X
+    {
+        // �d���N���G���[�Ȃ�d�����؂�Ă��܂��B�����ł̓P�A���Ȃ�
+        vreg_ctr[VREG_C_STATUS] |= REG_BIT_LCD_POW;
+        set_irq( VREG_C_IRQ3, REG_BIT_LCD_ON );
+        return ( ERR_SUCCESS );
+    }
+
+    return ( ERR_ERR );
+}
+
+// BSR //
+void PM_LCD_off()
+{
+    // BL�‚��Ă�������B// �`�F�b�N����̂͊��荞�݂̊֌W
+    if( ( read_pmic( PM_REG_ADRS_BL ) & 0x03 ) != 0 )
+    {
+        u8 tot;
+
+        PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF );
+        vreg_ctr[VREG_C_STATUS] &= bits8(1,0,0,1, 1,1,1,1);
+
+        if( (( REG_BIT_BL_U_OFF | REG_BIT_BL_L_OFF ) & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ) != 0 )
+        {
+            vreg_ctr[ VREG_C_IRQ3 ] |= ( ( REG_BIT_BL_U_OFF | REG_BIT_BL_L_OFF ) & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] );
+            IRQ0_neg;
+            tot = 0;
+            while( !IRQ0 && ( ++tot != 0 ) ){;}
+            IRQ0_ast;
+        }
+        vreg_ctr[VREG_C_COMMAND2] &= ~( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF );
+    }
+
+
+    // �t���d���؂� //
+    SPFL_LCD_AMOL_HV_CONT = 0;	// ���̃t�@�~���ł�L����Ȃ̂ŕ��Q�Ȃ�
+
+    // 50ms�Ƃ��҂‚��A�m�F���܂��傤���ˁc
+    if( read_pmic( PM_REG_ADRS_VDD_LCD ) != 0 )
+    {
+        if( system_status.family == FAMILY_SPFL )
+        {
+            wait_ms( 10 );  // �A�����t�@�X15V��؂����Ƃ��̃E�F�C�g�B
+        }
+
+        PM_TCOM_off();
+        wait_ms( 1 );
+        PM_TCOM_VCS_off(  );
+        wait_ms( DELAY_PM_LCD_OFF );
+
+        PM_VDDLCD_off(  ); // �c���Ă��̑S���~�߂܂��B
+        vreg_ctr[VREG_C_STATUS] &= ~REG_BIT_LCD_POW;
+    }
+
+    set_irq( VREG_C_IRQ3, REG_BIT_LCD_OFF );  // �������ɔ����B�}�X�N������΁B
+}
+
+
+
+/* ========================================================
+�@�o�b�N���C�g�̌•�on/off
+�@���󂩂�@on/off/�ێ��@�̃t���O�Ȃ̂Ŗʓ|
+�@�@�Ⴆ�΁ABL on/on �̏�ԂŁAon/on�ɂ���ƌ����Ă��Aon/on���荞�݂����܂��B
+======================================================== */
+err PM_BL_set( u8 dat )
+{
+    u8 blset;
+    u8 intset = 0;
+    // RMW���s��
+
+    // Read
+    blset = read_pmic( PM_REG_ADRS_BL );
+
+    // Modify
+    // ue
+    if(( dat & REG_BIT_CMD_BL_U_ON ) != 0 )
+    {
+        blset |= PM_REG_BIT_BL_U;
+        intset |= REG_BIT_BL_U_ON;
+    }
+    else if(( dat & REG_BIT_CMD_BL_U_OFF ) != 0 )
+    {
+        blset &= ~PM_REG_BIT_BL_U;
+        intset |= REG_BIT_BL_U_OFF;
+    }
+
+    // shita
+    if(( dat & REG_BIT_CMD_BL_L_ON ) != 0 )
+    {
+        blset |= PM_REG_BIT_BL_L;
+        intset |= REG_BIT_BL_L_ON;
+    }
+    else if(( dat & REG_BIT_CMD_BL_L_OFF ) != 0 )
+    {
+        blset &= ~PM_REG_BIT_BL_L;
+        intset |= REG_BIT_BL_L_OFF;
+    }
+
+    if( blset != 0 )  // BL��t����ꍇ�̓E�F�C�g�����܂Ȃ���PWM�����Ă��炸
+                      //  �V���b�g�_�E�����邱�Ƃ�����
+    {
+        wait_ms( 16 + 10 );
+    }
+    send_cmd_pmic(  PM_REG_ADRS_BL, blset );
+
+#if 0
+//    SoC��PWM���o���悤���W�X�^���Z�b�g���Ă���x�����L�邽�߁A�X�e�[�^�X����
+//    �X�V���Ă��܂��B
+#endif
+    // PMIC��BL�̃r�b�g�ƁAMCU��STATUS���W�X�^�̃r�b�g�ʒu���t�Ȃ��ߓ���ւ�
+    vreg_ctr[VREG_C_STATUS] = (( vreg_ctr[VREG_C_STATUS] & bits8(1,0,0,1, 1,1,1,1) )
+                              | ( (( blset << 6 ) | ( blset << 4 )) & bits8(0,1,1,0, 0,0,0,0) ));
+
+    // ���荞��
+    /// �����r�b�g�܂Ƃ߂čs���̂ŁA���‚��̊֐��g�p�s��
+    {
+        u8 tot;
+
+        if( ( intset & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ) != 0 )
+        {
+            vreg_ctr[ VREG_C_IRQ3 ] |= ( intset & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] );
+            IRQ0_neg;
+            tot = 0;
+            while( !IRQ0 && ( ++tot != 0 ) ){;}
+            IRQ0_ast;
+        }
+    }
+
+    return( ERR_SUCCESS );         // �����łُ͈�`�F�b�N�s�v
+}
+
+
+
+/* ========================================================
+  �t���̑Ό��d���̐ݒ���s���܂��B
+  ���z���W�X�^�̓��e�𑗂邾��
+ ======================================================== */
+void PM_LCD_vcom_set(  )
+{
+    send_cmd_pmic(  PM_REG_ADRS_POW_DAC1, vreg_ctr[VREG_C_VCOM_T] );   // ��������Ȃ��ƂɁAPMIC�̓o�[�X�g�������ݕs��
+    send_cmd_pmic(  PM_REG_ADRS_POW_DAC2, vreg_ctr[VREG_C_VCOM_B] );
+    return;
+}
+
+
+
+/* ========================================================
+  ���ŁA���W�X�^�������݂���Ăяo����鎞�̂���
+  �@I2C�̎�荇���̊֌W�ł�������Ă�
+ ======================================================== */
+task_status_immed tski_vcom_set(  )
+{
+    PM_LCD_vcom_set(  );
+    return ( ERR_FINISED );
+}
+
+
+
+/* ========================================================
+  �V�[�P���X�̒ʂ�d���𗧂��グ�Ă䂫�܂��B
+  �Ԓl 0 �Ō�܂Ő���Ɋ��������B
+       1 �V���[�g�Ȃǂœd���������肫��Ȃ�����
+
+  �ȉ��̃s���͎�ɂ����ő���E�Ď�����܂��B
+  �EPOW_CONT1,2    TEG�d���̂�
+ ======================================================== */
+err PM_sys_pow_on(  )
+{
+    // �d�����������グ
+//    PM_reset_ast(  );       �s�v PM_LDSW_on�܂���
+    RESET2_ast;
+    FCRAM_RST_ast;
+    GYRO_DISABLE();
+
+    PM_LDSW_on(  );
+
+    wait_ms( 1 + DELAY_PM_TW_PWUP );
+
+    PM_VDD_normMode();
+    PM_VDD_on(  );
+//    wait_ms( DELAY_PM_TW_PWUP );   // GYRO�����ނ���
+    wait_ms( 10 );
+    GYRO_ENABLE();
+    wait_ms( DELAY_PM_TW_PWUP - 10 );
+
+    PM_VDD50A_on(  );  // �t���d���ł͂Ȃ��Aled�Ƃ��Ɏg�����̂ł�
+
+    wait_ms( DELAY_PM_TW_PWUP );
+
+    // �����d�����N���������`�F�b�N�B
+    if( !PM_chk_LDSW() )
+    {
+        return ( ERR_ERR );  // reset1�͂ق��Ƃ��ėǂ�
+    }
+
+    // �d������IC���
+    pmic_version = read_pmic( PM_REG_ADRS_VER );
+    read_mgic_2B( BT_GAUGE_REG_VERSION, mgic_version );
+
+    // ���Z�b�g�����ȂǁB�V�X�e���N���I
+    PM_reset_neg();
+    FCRAM_RST_neg;
+    RESET2_neg;
+
+    codec_reg_init();        // CODEC �s�背�W�X�^������(reset2�̌�łȂ��Ƃ����Ȃ��̂�)
+    ntr_pm_reg_shadow = 0;          // �@�V�@����ȂƂ����...
+
+    return ( ERR_SUCCESS );
+}
+
+
+
+
+/* ========================================================
+  �d��OFF�V�[�P���X
+ ======================================================== */
+void PM_sys_pow_off(  )
+{
+//    if( RESET1_n )
+    if( PM_chk_LDSW() )
+    {
+        // �ُ펞�͌Ă΂Ȃ�
+        PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF );
+        PM_LCD_off();             //     TCOM,VCS OFF �������Ă��܂��B
+        wait_ms( 20 );
+
+        PM_reset_ast();
+    }
+
+    RESET2_ast;
+    FCRAM_RST_ast;
+
+    wait_ms( 20 );
+
+    PM_off(  );
+    PM_LDSW_off(  );
+
+    return;
+}
+
+
+
+/*=========================================================
+  extDC���荞��
+  �d��OFF����N�����i�[�d�̉��x�Ď��̂��߁j�̂�
+  ���i�̓|�[�����O(pm)
+ =========================================================*/
+__interrupt void intp4_extdc(  )
+{
+//    chg_led_override = (u8)( 1000 / INTERVAL_TSK_BATT / SYS_INTERVAL_TICK );
+//    chg_led_override = 4;
+}
+
+
+
+/*=========================================================
+  �t�^�J���‚ߊ��荞��
+  ���i�̓|�[���O(misc)
+ =========================================================*/
+__interrupt void intp5_shell(  )
+{
+    ;
+}
+
+
+/*=========================================================
+  ��PMIC�ւ̃R�}���h��������
+ =========================================================*/
+__interrupt void intp6_PM_irq(  )
+{
+    EI();
+    if( system_status.pwr_state == ON )
+    {
+        renge_task_immed_add( tski_ntr_pmic_comm );
+    }
+}
+
+
+/* ========================================================
+ PMIC����̊��荞�݂��󂯂āANTR PMIC�݊����W�X�^���烊�[�h
+ ======================================================== */
+task_status_immed tski_ntr_pmic_comm(  )
+{
+    u8        reg1_old;
+    u8        irq_work = 0;
+
+    reg1_old = ntr_pm_reg_shadow;
+    ntr_pm_reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_PM );
+    if( iic_mcu_result != ERR_SUCCESS )
+    {
+        return ( ERR_FINISED );
+    }
+
+//    DI(  );
+
+    // �o�b�N���C�g �� ////////////////////////////////////
+    if( ( ( reg1_old ^ ntr_pm_reg_shadow ) & REG_BIT_TWL_REQ_BL_U ) != 0 )
+    {
+        if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_BL_U ) == 0 )             // ������
+        {
+            irq_work = REG_BIT_TWL_BL_U_OFF;
+        }
+        else
+        {
+            irq_work = REG_BIT_TWL_BL_U_ON;
+        }
+    }
+
+    // �o�b�N���C�g ��
+    if( ( ( reg1_old ^ ntr_pm_reg_shadow ) & REG_BIT_TWL_REQ_BL_L ) != 0 )
+    {
+        if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_BL_L ) == 0 )             // ������
+        {
+            irq_work |= REG_BIT_TWL_BL_L_OFF;
+        }
+        else
+        {
+            irq_work |= REG_BIT_TWL_BL_L_ON;
+        }
+    }
+
+//    EI();
+
+    vreg_ctr[ VREG_C_STATUS_1 ] = ( vreg_ctr[ VREG_C_STATUS_1 ] & ~0x0C ) | ( ntr_pm_reg_shadow & 0x0C );  // TWL�o�b�N���C�g���̃~���[
+
+    irq_work &= ~vreg_ctr[ VREG_C_IRQ_MASK2 ];
+    // set_irq �����i
+    if( irq_work != 0 )
+    {
+        u8 tot;
+
+        vreg_ctr[ VREG_C_IRQ2 ] |= irq_work;
+        IRQ0_neg;  // ��u�グ�ăp���X�𑗂蒼��
+        tot = 0;
+        while( !IRQ0 && ( ++tot != 0 ) ){;}  // O.D�Ȃ̂ł����Ƃ�����̂�҂� �� IRQ_mcu ��L�ɔ����Ă�ƍ���(��•s��)
+        IRQ0_ast;
+    }
+
+#if 0
+    // �o�b�N���C�g�ݒ�
+    // ����ɏ����Ă���
+    /// ���̂Ƃ��낳��ɍׂ����͕����Ȃ����ǁc
+    if( ( ntr_pm_reg_shadow & ( REG_BIT_TWL_REQ_BL_U | REG_BIT_TWL_REQ_BL_U ) ) == 0 )
+    {
+        vreg_ctr[ VREG_C_COMMAND2 ] = ( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_U_OFF );
+        renge_task_immed_add( tski_PM_BL_set );
+    }
+#endif
+
+    // off���N�G�X�g //////////////////////////////////////
+    if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_OFF_REQ ) != 0 )
+    {
+        set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ );
+    }
+
+    // ���Z�b�g���N�G�X�g /////////////////////////////////
+    if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_RST_REQ ) != 0 )
+    {
+#if 0
+        // CODEC�o�O���
+        // ���Z�b�g�P�i�łȂ������疳��
+        if( ( reg1_old ^ ntr_pm_reg_shadow ) == REG_BIT_TWL_REQ_RST_REQ )
+#endif
+        {
+            set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ );
+        }
+    }
+
+    // �o�b�N���C�g���}�X�N���ď����߂�
+    EI(  );
+    if( ( ntr_pm_reg_shadow & ( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_REQ_RST_REQ )) != 0 )
+    {
+        ntr_pm_reg_shadow &= ~( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_REQ_RST_REQ );
+        iic_mcu_write_a_byte_codec( CODEC_REG_PM, ntr_pm_reg_shadow );
+    }
+    return ( ERR_FINISED );
+}
+
+
+
+/**********************************************************
+    command2 �t���n
+�@  ���b�p�[�I�ȕ��BERR_SUCCESS�����Ԃ��Ȃ����c
+**********************************************************/
+task_status_immed tski_PM_LCD_on()
+{
+    PM_LCD_on();
+    return( ERR_FINISED );
+}
+
+task_status_immed tski_PM_LCD_off()
+{
+    PM_LCD_off();
+    return( ERR_FINISED );
+}
+
+task_status_immed tski_PM_BL_set()
+{
+    u8 cmd_BL;                  // ��volatile�Ƃ��t���Ȃ��Ă����v�݂���
+
+    do
+    {
+        cmd_BL = vreg_ctr[VREG_C_COMMAND2];
+        PM_BL_set( cmd_BL ); // �}�X�N�ς�
+    }
+    while( cmd_BL != vreg_ctr[VREG_C_COMMAND2] );  // <- PM_BL_set���X�V����
+    vreg_ctr[VREG_C_COMMAND2] = 0;
+
+    return( ERR_FINISED );
+}
+
+
+
+/**********************************************************
+�@reset2 �� CODEC �Ƀ��Z�b�g��������A���W�X�^���s��ɂȂ邽��
+**********************************************************/
+void codec_reg_init()
+{
+    wait_ms( 100 );
+
+    ntr_pm_bt_low_old = conv_ctr_bt_to_twl_bt();
+
+    iic_mcu_write_a_byte_codec( CODEC_REG_BT, (u8)ntr_pm_bt_low_old ); // SoC ���珑����
+
+    vol_reset();
+//    renge_task_immed_add( tski_vol_update ); �|�[�����O����̂ŁB
+    vol_polling = 3;
+}
+
+
+/* ============================================================
+  �w���p�[�Ƃ��������b�p�[�Ƃ������H
+  ROM�ߖ�̂���
+ ============================================================ */
+err send_cmd_mgic_2B( u8 reg, u16 dat )  // ���M�o�b�t�@
+{
+    u16 temp = dat;
+    return iic_mcu_write( IIC_SLA_BT_GAUGE, reg, 2, &temp ); // DMA�]������̂ő��M�f�[�^�o�b�t�@�̃|�C���^���ǂ����K�v
+}
+
+err read_mgic_2B( u8 reg, u8* dat )  // ���M�o�b�t�@�͌Œ�
+{
+    return iic_mcu_read( IIC_SLA_BT_GAUGE, reg, 2, dat );
+}
+
+err send_cmd_pmic( u8 reg, u8 dat )
+{
+	return iic_mcu_write_a_byte( IIC_SLA_PMIC, reg, dat );
+}
+
+u8 read_pmic( u8 reg )
+{
+	return iic_mcu_read_a_byte( IIC_SLA_PMIC, reg );
+}
+
+
+/* ============================================================
+  �d�r���[�J�[�ƃ��f������A�g���d�r�p�����[�^�̌���
+ ============================================================ */
+void bt_param_select()
+{
+    BT_TYPE bt_type_temp;
+    // �Ή��������Ă����番��R�[�h���������‚����
+    if( battery_manufacturer <= BT_VENDER_3 )
+    {
+        bt_type_temp = BT_PARAM_CTR_MAXELL;
+    }
+    else
+    {
+        bt_type_temp = BT_PARAM_CTR_PANA;
+    }
+
+    if( system_status.family == FAMILY_SPFL )
+    {
+        bt_type_temp += BT_PARAM_SPFL_MAXELL;  // �I�t�Z�b�g �c�O�Ȏ����Łc�B
+    }
+    else if( system_status.family == FAMILY_SHRIMP )
+    {
+        bt_type_temp += BT_PARAM_SHRIMP_MAXELL;
+    }
+    p_bt_param = &bt_param[ bt_type_temp ];
+}
+
+
+
+/* ============================================================
+  TWL�ɓd�r�c�ʂ������Ă�����
+ ============================================================ */
+static void bt_batt_update_twl()
+{
+    if (vreg_ctr[VREG_C_BT_REMAIN] > 80)
+    {
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x0F;
+    }
+    else if (vreg_ctr[VREG_C_BT_REMAIN] > 50)
+    {
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x0B;
+    }
+    else if (vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_LO)
+    {
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x07;
+    }
+    else if (( vreg_ctr[ VREG_C_BT_REMAIN ] > BATT_TH_EMPTY )||
+             !BT_CHG_Ena_n )
+    { // �A�_�v�^�̗L���Œ�グ
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x03;
+    }
+    else if (vreg_ctr[VREG_C_BT_REMAIN] > 0)
+    {
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x01;
+    }
+    else
+    {
+        vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x00;
+    }
+}
+
+
+/* ============================================================
+  NTR�ɓd�r�c�ʂ������Ă�����
+ ============================================================ */
+static void bt_batt_update_ntr()
+{
+    static bit initialized;
+    static bit flag;  // ����Hstatic�łȂ��ƃR���p�C���ɓ{����
+
+    if( system_status.pwr_state == OFF_TRIG )
+    {
+        initialized = false;
+    }
+    else
+    {
+
+        flag = conv_ctr_bt_to_twl_bt();
+
+        if(( ntr_pm_bt_low_old != flag ) || !initialized )
+        {
+            initialized = true;
+            ntr_pm_bt_low_old = flag;
+            iic_mcu_write_a_byte_codec( CODEC_REG_BT, (u8)flag );
+        }
+    }
+}
+
+
+/* ========================================================
+========================================================= */
+static err read_BT_SOC( u8* dest )
+{
+    if( vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ] != 0xFF )
+    {
+        *dest = vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ];
+        *(dest+1) = 0x00;
+        return ERR_SUCCESS;
+    }
+    else
+    {
+        return( read_mgic_2B( BT_GAUGE_REG_SOC, dest ) );
+    }
+}
+
+
+/* ========================================================
+========================================================= */
+static err read_BT_voltage( u8* dest )
+{
+    if( vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ] != 0xFF )
+    {
+        *dest = vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ];
+//        *(dest+1) = 0x00;            // �g��Ȃ���@���ǂQ�o�C�g���[�h�֐������p�ӂ��ĂȂ��̂ł�
+        return ERR_SUCCESS;
+    }
+    else
+    {
+        return( read_mgic_2B( BT_GAUGE_REG_VCELL, dest ) );
+    }
+}
+
+
+/* ========================================================
+ �d�r�c�ʂ�twl�Ƀt���O�ɂ��ĕԂ�
+========================================================= */
+static u8 conv_ctr_bt_to_twl_bt()
+{
+//    ntr_pm_bt_low_old = ( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO )? NTR_PM_BT_EMPTY: NTR_PM_BT_ENOUGH;  // 1�œd�r�؂�
+    if( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO )
+    {
+        return NTR_PM_BT_EMPTY;
+    }
+    else
+    {
+        return NTR_PM_BT_ENOUGH;
+    }
+}
diff --git a/tags/SDK3.0(2.00)/pm.h b/tags/SDK3.0(2.00)/pm.h
new file mode 100644
index 0000000..423d771
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pm.h
@@ -0,0 +1,216 @@
+#ifndef __PM__
+#define __PM__
+
+
+
+#define IIC_SLA_PMIC              0x84
+#define IIC_SLA_BT_GAUGE          0x6C
+
+#define VCOM_DEFAULT_T  92
+#define VCOM_DEFAULT_B  95
+
+
+
+#define BATT_TH_LO           10
+#define BATT_TH_EMPTY        5
+
+// �d�����W�X�^�ƒ��ڔ�r�ł���p�ɃI�t�Z�b�g
+#define V_BT_4000MV          (u16)( 4000 * 12.8 )		// �d���ǂݏo�����s�p 4000mV�ݒ�
+#define V_TH_30              (u16)( 3300 * 12.8 )		// 30%
+#define V_TH_LO              (u16)( 3200 * 12.8 )		// 10%
+#define V_TH_EMPTY           (u16)( 3150 * 12.8 )		//  5%
+#define V_TH_ZERO            (u16)( 3100 * 12.8 )		//  0%
+#define V_TH_FORCE_OFF       (u16)( 2900 * 12.8 )		// 2.9V �ŏI�����f
+
+
+//=========================================================
+#ifdef _WIN32
+#define LED_CHARGE           mcuRegP[ _P2_4 ]
+#else
+#define LED_CHARGE           P2.4
+#endif
+
+
+//=========================================================
+enum PMIC_REG_ADRS
+{
+  PM_REG_ADRS_VER = 0x00,       // verinfo �Ȃ�
+  PM_REG_ADRS_VDD_SYS,          // �V�X�e�����g�p����d��
+  PM_REG_ADRS_VDD_LCD,          // �t���d��
+  PM_REG_ADRS_CONT,             // /RESET1, LoadSwitch
+  PM_REG_ADRS_BL,               // �o�b�N���C�g on/off
+  PM_REG_ADRS_POW_SAVE,         // �ȓd�͐ݒ�
+  PM_REG_ADRS_POW_DAC1,
+  PM_REG_ADRS_POW_DAC2
+};
+
+enum BT_GAUGE_REG_ADRS
+{
+  BT_GAUGE_REG_VCELL    = 0x02,    // ���ꂼ��16�r�b�g�̂���
+  BT_GAUGE_REG_SOC      = 0x04,
+  BT_GAUGE_REG_MODE     = 0x06,
+  BT_GAUGE_REG_VERSION  = 0x08,
+  BT_GAUGE_REG_OCV      = 0x0E,
+  BT_GAUGE_REG_RCOMP    = 0x0C,
+  BT_GAUGE_REG_LOCK     = 0x3E,
+  BT_GAUGE_REG_BT_PARAM = 0x40,
+  BT_GAUGE_REG_COMMAND  = 0xFE
+};
+
+
+typedef enum BT_VENDER
+{
+    BT_VENDER_MAXELL = 0,               // �V���[�g
+    BT_VENDER_1,                       // 120
+    BT_VENDER_2,                       // 360
+    BT_VENDER_3,                       // 750
+    BT_VENDER_4,                       // 1.3k
+    BT_VENDER_PANA   = 5,              // 2.7k
+    BT_VENDER_6,                       // 8.2k
+    BT_VENDER_OPEN = 7,                // open
+    BT_VENDER_NOT_CHECKED = 0xFF,
+}BT_VENDER;
+
+
+
+enum NTR_PM_BT_STATUS{
+    NTR_PM_BT_ENOUGH,
+    NTR_PM_BT_EMPTY,
+    NTR_PM_BT_NOT_INITIALIZED = 0xFF
+};
+
+
+
+//=========================================================
+// CODEC���PMIC�݊����W�X�^
+#define CODEC_REG_PM 0x10
+#define CODEC_REG_BL 0x11
+#define CODEC_REG_BT 0x12
+//#define CODEC_REG_VOL 0x13   // ...�s���ɂ��Aadc.h�Œ�`
+
+// TWL��SPI��PMIC�ɓ������R�}���h
+#define REG_BIT_TWL_REQ_OFF_REQ  ( 1 << 6 )
+#define REG_BIT_TWL_REQ_RST_REQ  ( 1 << 0 )
+#define REG_BIT_TWL_REQ_BL       ( 3 << 2 )
+
+
+
+
+// 0x03 pw cnt3
+#define PM_REG_BIT_LDSW      ( 1 << 0 )
+#define PM_REG_BIT_nRST1     ( 1 << 1 )
+
+// 0x01 pw cnt1
+#define PM_REG_BIT_VDD        0x0F
+#define PM_REG_BIT_VDD50A    ( 1 << 4 )
+
+// 0x02 pw cnt2
+#define PM_REG_BIT_VDDLCD_CGS    0x07
+#define PM_REG_BIT_VDDLCD_AMO    0x05
+#define PM_REG_BIT_LCD_VCS   ( 0x01 << 4 )
+#define PM_REG_BIT_LCD_TCOM  ( 0x01 << 3 )
+
+// 0x04 bl cnt
+#define PM_REG_BIT_BL_U         0x01
+#define PM_REG_BIT_BL_L         0x02
+
+
+// 0x05 pow save
+#define PM_REG_BIT_VDD1P_1R15   bits8(0,0,0,0, 0,0,0,0)
+#define PM_REG_BIT_VDD1P_1R05   bits8(0,0,0,0, 1,0,0,0)
+#define PM_REG_BIT_VDD1P_0R90   bits8(0,0,1,0, 0,0,0,0)
+#define PM_REG_BIT_VDD_AUTO     bits8(0,0,0,0, 0,1,1,1)
+#define PM_REG_BIT_VDD_PWM      bits8(0,0,0,0, 0,0,0,0)
+
+
+#define DELAY_PM_TW_PWUP               16 + 2
+#define DELAY_PM_TSS_50B_AND_TCOM      17 + 1
+#define DELAY_PM_5V_TO_TCOM            17 + 1
+#define DELAY_PM_TCOM_TO_VCS           3
+#define DELAY_PM_VCS_TO_BL             ( 17 + 5 )
+#define DELAY_PM_LCD_OFF               ( 50 + 1 )
+
+
+//=========================================================
+extern u8 raw_adc_temperature;
+extern BT_VENDER battery_manufacturer;
+extern bit bt_force_update;
+
+extern u8 pmic_version;
+extern u8 mgic_version[];
+
+extern u8 pm_reg_bit_vddlcd;  // �A�����t�@�X�Ή�(�d���V�[�P���X���Ⴄ)
+
+
+//=========================================================
+err PM_sys_pow_on(  );
+void PM_sys_pow_off(  );
+//err PM_bt_auth(  );
+void PM_LCD_vcom_set(  );
+
+err PM_LCD_on(  );
+void PM_LCD_off(  );
+err PM_BL_set( u8 );
+
+
+void BT_chk();
+void BT_get_left();
+void pm_chk_adapter();
+
+void codec_reg_init();
+
+
+task_status_immed tski_BT_temp_update(  );
+task_status_immed tski_vcom_set(  );
+task_status_immed tski_PM_LCD_on();
+task_status_immed tski_PM_LCD_off();
+task_status_immed tski_PM_BL_set();
+
+
+err send_cmd_pmic( u8 reg, u8 dat );
+u8 read_pmic( u8 reg );
+
+
+#define PM_Chg_Stop()  { BT_TEMP_P = 0; BT_CHG_DISABLE(); LED_CHARGE = 0; bt_authorized = false; }
+//  �@������ĂԑO�ɁA���݉��x�������Ă����K�v������܂��B
+#define PM_reset()     ( send_cmd_pmic(  PM_REG_ADRS_CONT, 0x00 ) )
+
+
+//=========================================================
+
+
+// ���� //
+#define PM_LDSW_on()	( send_cmd_pmic(  PM_REG_ADRS_CONT, PM_REG_BIT_LDSW ))
+#define PM_LDSW_off()	( send_cmd_pmic(  PM_REG_ADRS_CONT, 0 ))
+
+
+// �V�X�e���d�� //
+#define PM_VDD_on()		( send_cmd_pmic(  PM_REG_ADRS_VDD_SYS, PM_REG_BIT_VDD ))
+#define PM_VDD50A_on()	( send_cmd_pmic(  PM_REG_ADRS_VDD_SYS, ( PM_REG_BIT_VDD | PM_REG_BIT_VDD50A )))
+#define PM_VDD_off()	( send_cmd_pmic(  PM_REG_ADRS_VDD_SYS, 0 ))
+#define PM_off()		PM_VDD_off()
+
+#define PM_VDD_normMode()   ( send_cmd_pmic(  PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_1R15 | PM_REG_BIT_VDD_PWM ))
+#define PM_VDD_ecoMode()    ( send_cmd_pmic(  PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_0R90 | PM_REG_BIT_VDD_AUTO ))
+// todo Y�ŃR�A�d�����ς�邩������Ȃ�
+
+// �ق� //
+#define PM_reset_neg()	( send_cmd_pmic(  PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW | PM_REG_BIT_nRST1 )))
+#define PM_reset_ast()	( send_cmd_pmic(  PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW )))
+#define PM_chk_LDSW()	( read_pmic( PM_REG_ADRS_CONT ) & PM_REG_BIT_LDSW )
+// �� 0 ���ƈُ�
+
+// �t���n�d�� //
+#define PM_VDDLCD_on()	( send_cmd_pmic(  PM_REG_ADRS_VDD_LCD, pm_reg_bit_vddlcd ))
+#define PM_TCOM_on()	( send_cmd_pmic(  PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_TCOM )))
+#define PM_VCS_on()		( send_cmd_pmic(  PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_VCS | PM_REG_BIT_LCD_TCOM )))
+#define PM_TCOM_off()   ( send_cmd_pmic(  PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_VCS )))
+#define PM_TCOM_VCS_off() PM_VDDLCD_on()
+#define PM_VDDLCD_off() ( send_cmd_pmic(  PM_REG_ADRS_VDD_LCD, 0 ) )
+
+#define PM_set_BL( dat )	( send_cmd_pmic(  PM_REG_ADRS_BL, dat ) )
+#define PM_set_adc1( dat )	( send_cmd_pmic(  PM_REG_ADRS_POW_DAC1, dat ) )
+#define PM_set_adc2( dat )	( send_cmd_pmic(  PM_REG_ADRS_POW_DAC2, dat ) )
+
+
+#endif // __PM__
diff --git a/tags/SDK3.0(2.00)/pool.h b/tags/SDK3.0(2.00)/pool.h
new file mode 100644
index 0000000..81c8091
--- /dev/null
+++ b/tags/SDK3.0(2.00)/pool.h
@@ -0,0 +1,24 @@
+#ifndef _pool_h_
+#define _pool_h_
+
+
+#include "pedometer.h"
+
+#define VREG_C_FREE_SIZE     200
+
+// �󂢂Ă郁����
+typedef struct _st_vreg_c_ext{
+    unsigned short pedo_log[ PEDOMETER_LOG_SIZE ];
+    unsigned char vreg_c_free[ VREG_C_FREE_SIZE ];
+}st_vreg_c_ext;
+
+typedef union _uni_pool
+{
+    st_vreg_c_ext vreg_c_ext;
+    u8 self_update_work[ 256 ]; // 256�ȏ�͂܂Ƃߏ����ł��Ȃ�
+}uni_pool;
+
+extern uni_pool pool;
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/reboot.c b/tags/SDK3.0(2.00)/reboot.c
new file mode 100644
index 0000000..b784f15
--- /dev/null
+++ b/tags/SDK3.0(2.00)/reboot.c
@@ -0,0 +1,24 @@
+/********************************************************//*
+
+  �ނ��胊�u�[�g
+
+  �t�@�C�����ɃC�����C���A�Z���u��������ƁA
+  ���̃��W���[���S���œK���������Ȃ��Ȃ邽�ߒǂ��o����
+
+ **********************************************************/
+#pragma SFR
+
+#include "incs_loader.h"
+
+
+void my_reboot(){
+#asm
+
+    MOV     PSW,#06H                ; �_�~�[��PSW���Z�b�g
+    MOVW    AX,#000d0h              ; ���Z�b�g�̃x�N�^�l����荞��ł��܂��B
+    PUSH    PSW
+    PUSH    AX                      ; �����RETI�̂��߂̃X�^�b�N������
+    RETI                            ; ����Ń��Z�b�g�E�x�N�^�ɕ���
+
+#endasm
+}
diff --git a/tags/SDK3.0(2.00)/reboot.h b/tags/SDK3.0(2.00)/reboot.h
new file mode 100644
index 0000000..c20e11e
--- /dev/null
+++ b/tags/SDK3.0(2.00)/reboot.h
@@ -0,0 +1,6 @@
+#ifndef __MYREBOOT__
+#define __MYREBOOT__
+
+void my_reboot();
+
+#endif
diff --git a/tags/SDK3.0(2.00)/renge/renge.c b/tags/SDK3.0(2.00)/renge/renge.c
new file mode 100644
index 0000000..1c7562a
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge.c
@@ -0,0 +1,315 @@
+#ifndef _WIN32
+
+#pragma section @@CODE ROM_CODE
+#pragma nop
+#pragma ei
+#pragma di
+#pragma sfr
+
+#endif
+
+
+#ifdef _WIN32
+typedef unsigned char bit;
+typedef unsigned char u8;
+#endif
+
+/******************************************************************************
+ �^�X�N�V�X�e���H
+  �Ȃ�قǁAiTRON�ɂ̓R���t�B�M�����[�^������͂����B
+  �����܂���
+  ctr_mcu_config.rb �Q�ƁB task_config.h���쐬����܂��B
+ *****************************************************************************/
+#include "renge.h"
+#include "renge_task_intval.h"
+#include "renge_task_immediate.h"
+#include "..\WDT.h"
+#include "..\config.h"
+#include "..\user_define.h"
+
+#ifdef _WIN32
+#include "../sim/simOnWin.h"
+#endif
+//#define _renge_test_
+
+#define true 1
+#define false 0
+
+//******************************************************************************
+u8 renge_flg_interval;
+bit renge_task_interval_run_force;
+bit renge_task_immediate_not_empty;
+
+bit renge_task_interval_in_force;
+
+
+#include "..\bsr_system.h"
+extern system_status_ system_status;
+
+
+//******************************************************************************
+static void renge_task_immed_init();
+static void renge_task_immed_del();
+
+
+
+//******************************************************************************
+task_status_immed ( *tasks_immed[ TASK_IMMED_RUN_LIST_MAX ] )();
+
+
+
+/******************************************************************************
+  ������
+�E�^�X�N�V�X�e���̓��I�����̏�����
+�E�C���^�[�o���^�C�}
+ *****************************************************************************/
+void renge_init(){
+  renge_task_immed_init();
+  /*
+    �C�x���g�^�C�}�̃Z�b�g�Ȃ�
+    �����RTC�𗬗p���Ă���̂ŃR�����g�A�E�g
+    #define renge_tick 19xxxxxxx [ms]
+    renge_interval_init(); �� RTC_init();
+   */
+}
+
+
+
+/******************************************************************************
+ �V�X�e���`�b�N��i�߂�
+ *****************************************************************************/
+/*
+void renge_interval(){
+// RTC����������
+��__interrupt void int_rtc_int();
+}
+*/
+
+
+
+/******************************************************************************
+ �R���p�C�����Ɍ��܂��Ă���A�C���^�[�o���N���̃^�X�N
+  ���̂����A�����N���ƍ����邩������Ȃ��B
+ *****************************************************************************/
+err renge_task_interval_run(){
+  u8 i;
+
+  // �C���^�[�o���N��
+    DI();
+  if(( renge_flg_interval != 0 ) ||
+     ( renge_task_interval_run_force )) /// ���������������ȁc
+  {
+      renge_task_interval_in_force = renge_task_interval_run_force;
+      renge_task_interval_run_force = false;  // ������N������^�X�N�A���荞�ރ^�X�N�Ńt���O�����‚����Ȃ̂�
+      if( renge_flg_interval != 0 )
+      {
+          renge_flg_interval --;
+          WDT_Restart(  );
+      }
+      EI();
+      for( i = 0; i != TSK_LAST; i ++ )
+      {
+          tasks[ i ]();
+          // �����N���^�X�N����������Ԃɋ���
+          renge_task_immed_run();
+      }
+  }
+  EI();
+  return( ERR_SUCCESS );
+}
+
+
+
+/*****************************************************************************
+ ������N���^�X�N��
+
+ ��task_immed ��Ԃ��֐��B
+ ���V�X�e��tick�A���炩�̊��荞�݁iI2C�ʐM�����Ȃǁj��
+ �X���[�v���畜�A�����^�C�~���O�Ŏ��s����܂��B
+
+���Ԓl�@ERR_FINISED�@�^�X�N���폜
+�@�@�@�@����ȊO     ���̃^�C�~���O�ł܂����s
+
+ *****************************************************************************/
+
+
+/**************************************
+ **************************************/
+void renge_task_immed_init(){
+    u8 i;
+
+    for( i = 0; i < TASK_IMMED_RUN_LIST_MAX; i++ ){
+        tasks_immed[ i ] = TSK_IMM_EMPTY_;
+    }
+}
+
+
+
+/**************************************
+  �������s�^�X�N�̓o�^
+  ���荞�݋֎~ 36us ��
+ **************************************/
+err renge_task_immed_add( task_status_immed (*new_task)() ){
+    u8 i;
+
+    // ���X�g�̋󂫂̐擪�ɓo�^
+    // �폜�����΂���̃^�X�N�́A�폜�}�[�N(TSK_IMM_DELETED_)�ƂȂ�A�󂫂Ƃ͖����I�ɋ�ʂ����
+    // �d���o�^�������
+    for( i = 0; i < TASK_IMMED_RUN_LIST_MAX; i ++ )
+    {
+        DI();
+        if( tasks_immed[ i ] == TSK_IMM_EMPTY_ )
+        {
+            // �󂫂����‚���
+            tasks_immed[ i ] = new_task;
+            EI();
+            return( ERR_SUCCESS );
+        }
+        else
+        {
+            // �d���o�^�`�F�b�N
+            /// �������ɂȂ��ĂȂ��A�O�l�߂���Ă�O��
+            if( tasks_immed[ i ] == new_task )
+            {
+                // �d���o�^�͂��Ȃ�
+                EI();
+                return( ERR_ERR );
+            }
+        }
+        EI();
+    }
+    // �^�X�N�o�^������(�����͂�
+    return( ERR_ERR );
+}
+
+
+
+/**************************************
+  �������s�^�X�N�̎��s
+ **************************************/
+err renge_task_immed_run(){
+    u8 list_id;
+
+//    while( tasks_immed[ 0 ] != TSK_IMM_EMPTY_ )
+    if( tasks_immed[ 0 ] != TSK_IMM_EMPTY_ )
+    {
+        DI();
+        for( list_id = 0; list_id < TASK_IMMED_RUN_LIST_MAX; list_id ++ ){
+            if( tasks_immed[ list_id ] == TSK_IMM_EMPTY_ ){
+                // ���X�g����
+                EI();
+                break;
+            }
+#ifdef _renge_test_
+            else if( tasks_immed[ list_id ] == TSK_IMM_DELETED_ )
+            {
+                EI();
+                NOP();
+                // �^�X�N�Ǘ��̕s��
+                // ���݂��Ȃ��^�X�N�����s���悤�Ƃ���
+                // �^�X�N�̍폜��̏������܂���
+                // �\�����Ȃ��^�C�~���O�� immed_run ���Ă΂ꂽ
+            }
+#endif
+            else
+            {
+                u8 rv;
+
+                EI();
+                rv = tasks_immed[ list_id ]();
+                if( rv == ERR_SUCCESS )
+                {
+                    tasks_immed[ list_id ] = TSK_IMM_DELETED_;
+                }
+            }
+            DI();
+        }
+        // ���X�g��̃^�X�N����ʂ���s����
+
+        // �^�X�N�폜 //
+        {
+            u8 i = 0; // ���X�g�̕��בւ���
+            u8 j = 1;
+
+            // �K�� i < j�Aj < TASK_IMMED_RUN_LIST_MAX (�łȂ��ƃ^�X�N���ӂ�)
+            while( 1 )
+            {
+                if( tasks_immed[ i ] == TSK_IMM_EMPTY_ )
+                {
+                    // �O�l�ߊ��� && ���X�g�����
+                    // break;
+                    goto imm_list_sort_fin;
+                }
+                else if( tasks_immed[ i ] == TSK_IMM_DELETED_ )
+                {
+                    for( ; j < TASK_IMMED_RUN_LIST_MAX; j++ )
+                    {
+                        if( tasks_immed[ j ] == TSK_IMM_DELETED_ )
+                        {
+                            // �ׁi�H�j���폜�Ώۂ�����
+                            // next j
+                        }
+                        else
+                        {
+                            DI();
+                            if( tasks_immed[ j ] == TSK_IMM_EMPTY_ )
+                            {
+                                do{
+                                    j --;
+                                    tasks_immed[ j ] = TSK_IMM_EMPTY_;
+                                    // ���X�g�O�l�ߊ���
+                                }while( i < j );
+                                EI();
+                                goto imm_list_sort_fin;
+                            }
+                            else
+                            {
+                                // �O�l�߂��ׂ��^�X�N�����‚���
+                                tasks_immed[ i ] = tasks_immed[ j ];
+                                tasks_immed[ j ] = TSK_IMM_DELETED_;
+                                i ++;
+                                EI();
+                            }
+                        }
+                    }
+                }
+                else
+                {
+                    // ���̃^�X�N�A�ؗ�
+                }
+                i ++;
+            }
+        }
+    }
+
+imm_list_sort_fin:
+        // �����܂łŊ��S�ɑO�l�߂���Ă���
+#ifdef _renge_test_
+        /// �ق��?
+        {
+            u8 a,b;
+
+            a = 0;
+            for( b = 0 ; b < TASK_IMMED_RUN_LIST_MAX; b++ )
+            {
+                if( tasks_immed[ b ] == TSK_IMM_EMPTY_ )
+                {
+                    a = 1;
+                }
+                else
+                {
+                    if( a != 0 )
+                    {
+                        NOP();    // EMPTY�����Ƀ^�X�N��deleted���L��
+                    }
+                }
+            }
+        }
+#else
+        NOP();  // �Ȃ񂩖����ƃ����J���{��
+#endif
+//  }
+    return( ERR_SUCCESS );
+}
+
+
diff --git a/tags/SDK3.0(2.00)/renge/renge.h b/tags/SDK3.0(2.00)/renge/renge.h
new file mode 100644
index 0000000..ee1d9f9
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge.h
@@ -0,0 +1,28 @@
+#ifndef __renge__
+#define __renge__
+
+//******************************************************************************
+
+
+
+//******************************************************************************
+#include "renge_defs.h"
+#include "renge_task_immediate.h"
+// #include "renge_task_interval_run.h" // �O���狭���N���֎~�I
+
+//******************************************************************************
+void renge_init();
+void renge_task_immed_init();
+err renge_task_immed_run();
+err renge_task_immed_add( task_status_immed (*p_task_func)() );
+// static err renge_task_immed_del( u8 );
+
+
+
+//******************************************************************************
+err renge_task_interval_run();
+extern u8 renge_flg_interval;
+extern bit renge_task_interval_run_force;  // �^�X�N�������s�t���O
+extern bit renge_task_interval_in_force;   // �������s���t���O
+
+#endif
diff --git a/tags/SDK3.0(2.00)/renge/renge_defs.h b/tags/SDK3.0(2.00)/renge/renge_defs.h
new file mode 100644
index 0000000..0199d76
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge_defs.h
@@ -0,0 +1,55 @@
+#ifndef __renge_defs__
+#define __renge_defs__
+/******************************************************************************
+  Renge Ver.0      (2009/04/09)
+  2009- 7k4jhl R.Fujita @ RED.nintendo
+
+  OS�ɂ͂قlj����A�ȈՓI�ȃ^�X�N�V�X�e���B
+  Range �� Typo �ł͂Ȃ��ł��B�����Q�ł��B
+
+  �Ȃ�� �����Q �͑��̂œ��{���� �Q���Q
+  ���������ǖ��ɗ��–𑐂ł��B
+  �傫������ĂˁI
+ ******************************************************************************/
+
+typedef unsigned char u8;
+typedef signed char s8;
+typedef unsigned short u16;
+typedef signed short s16;
+
+
+// ************************************
+#define SYS_INTERVAL_TICK 1.953
+
+
+
+// ************************************
+typedef enum _ERR
+{
+  ERR_SUCCESS = 0,
+  ERR_ERR
+}err;
+
+
+typedef enum _IMMED_TASK_ERR
+{
+  ERR_FINISED = 0,
+  ERR_CONTINUE
+}IMMED_TASK_ERR;
+
+
+
+/**************************************
+ �C���^�[�o���N��
+ *************************************/
+typedef void task_status;
+
+
+/**************************************
+ ����N���̃^�X�N���X�g
+ �p�~�ɂȂ邩������Ȃ���
+ *************************************/
+typedef IMMED_TASK_ERR task_status_immed;
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/renge/renge_task_config.rb b/tags/SDK3.0(2.00)/renge/renge_task_config.rb
new file mode 100644
index 0000000..c2de509
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge_task_config.rb
@@ -0,0 +1,59 @@
+#!/usr/bin/ruby -Ks
+
+tasklist = Array.new
+
+
+if( ARGV[0] == nil )
+  printf( "����t�@�C�� renge_tasks.txt ���g�p���܂�" )
+  datfile = "renge_tasks.txt"
+else
+  datfile = ARGV[0]
+end
+
+if( !File.exist?( datfile ) )
+  printf("�ݒ�t�@�C�������‚���܂���B")
+  exit( 1 )
+end
+  
+
+setting = File.open( datfile )
+
+setting.each{|dat|
+  dat.chomp!
+  if( dat != nil )
+    tasklist << dat
+  end
+}
+
+tasklist.each{|dat|
+  printf( "\n%s" , dat )
+}
+printf( "\n----------\n�^�X�N�� %d \n", tasklist.size )
+
+
+#----- �ÓI�^�X�N�̗� -------------------------------------------------------
+conf = File.new( "renge_task_intval.h", "w+" )
+
+conf << "/*�X�N���v�g�ɂ�鎩�������ł��B�蓮�ŏ��������Ȃ������悢�ł�*/\n\n"
+conf << "#ifndef __renge_task__\n#define __renge_task__\n\n"
+conf << "#include \"renge_defs.h\"\n\n"
+
+conf << "enum {\n  "
+tasklist.each{|dat|
+  conf << "TSK_" << dat.upcase << ", "
+}
+conf << "TSK_LAST \n  };\n\n"
+
+
+tasklist.each{|dat|
+  conf << "extern void tsk_" << dat << "();\n"
+}
+conf << "\n"
+
+conf << "const void ( *tasks[ TSK_LAST ] )() = {\n"
+tasklist.each{|dat|
+  conf << "  tsk_" << dat << ",\n"
+}
+conf << "  };\n"
+
+conf << "\n#endif\n"
diff --git a/tags/SDK3.0(2.00)/renge/renge_task_immediate.h b/tags/SDK3.0(2.00)/renge/renge_task_immediate.h
new file mode 100644
index 0000000..7c5016d
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge_task_immediate.h
@@ -0,0 +1,25 @@
+#ifndef __tasks__
+#define __tasks__
+
+#include "renge_defs.h"
+
+// *************************************
+#define TASK_IMMED_RUN_LIST_MAX 10
+
+
+extern task_status_immed tski_do_command0(  );
+extern task_status_immed tski_ntr_pmic_comm();
+extern task_status_immed tski_acc_read();
+extern task_status_immed tski_acc_write();
+//extern task_status_immed tski_acc_hosu_set();  // accero.h
+extern task_status_immed tski_mcu_reset();
+extern task_status_immed tski_vol_update();
+
+
+// *************************************
+#define TSK_IMM_EMPTY_ ( void * )( 0x0000 )
+#define TSK_IMM_DELETED_ ( void * )( 0x0001 )
+
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/renge/renge_task_intval.h b/tags/SDK3.0(2.00)/renge/renge_task_intval.h
new file mode 100644
index 0000000..9b0d9ea
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge_task_intval.h
@@ -0,0 +1,37 @@
+/*�X�N���v�g�ɂ�鎩�������ł��B�蓮�ŏ��������Ȃ������悢�ł�*/
+
+#ifndef __renge_task__
+#define __renge_task__
+
+#include "renge_defs.h"
+
+enum TSK
+{
+  TSK_SW, TSK_ADC, TSK_BATT, TSK_LED_POW, TSK_LED_WIFI, TSK_LED_NOTIFY, TSK_LED_CAM, TSK_MISC, TSK_STATUS, TSK_SYS, TSK_LAST 
+  };
+
+extern void tsk_sw();
+extern void tsk_adc();
+extern void tsk_batt();
+extern void tsk_led_pow();
+extern void tsk_led_wifi();
+extern void tsk_led_notify();
+extern void tsk_led_cam();
+extern void tsk_misc();
+extern void tsk_status();
+extern void tsk_sys();
+
+const void ( *tasks[ TSK_LAST ] )() = {
+  tsk_sw,
+  tsk_adc,
+  tsk_batt,
+  tsk_led_pow,
+  tsk_led_wifi,
+  tsk_led_notify,
+  tsk_led_cam,
+  tsk_misc,
+  tsk_status,
+  tsk_sys,
+  };
+
+#endif
diff --git a/tags/SDK3.0(2.00)/renge/renge_tasks.txt b/tags/SDK3.0(2.00)/renge/renge_tasks.txt
new file mode 100644
index 0000000..73af545
--- /dev/null
+++ b/tags/SDK3.0(2.00)/renge/renge_tasks.txt
@@ -0,0 +1,11 @@
+sw
+adc
+batt
+led_pow
+led_wifi
+led_notify
+led_cam
+misc
+status
+debug
+sys
diff --git a/tags/SDK3.0(2.00)/rtc.c b/tags/SDK3.0(2.00)/rtc.c
new file mode 100644
index 0000000..69b4050
--- /dev/null
+++ b/tags/SDK3.0(2.00)/rtc.c
@@ -0,0 +1,175 @@
+/* ========================================================
+  RTC
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma sfr
+#pragma inline
+
+#endif
+
+#include "incs.h"
+
+
+
+// ========================================================
+u8      rtc_work[7];
+bit     rtc_lock;
+bit     rtc_dirty;
+bit     rtc_alarm_dirty;
+
+
+/* ========================================================
+ �y���t�F�����̏�����
+ ���W�X�^�̓d�r�����r�b�g�̃Z�b�g
+ ======================================================== */
+void RTC_init( void )
+{
+
+    if( !RTCEN )            // �r�b�g�������Ă����烊�u�[�g
+    {
+        RTCEN = 1;              // ���W���[��ON
+
+        // RTC�ݒ�
+        RTCC0 = bits8(0,0,0,0, 1,0,0,0);    /* �����~�A24���Ԑ��A32k�o�́u�܂��Ȃ��v�A��������荞�݂Ȃ� */
+											// (RTCE 0 RCLOE1 RCLOE0 AMPM CT2 CT1 CT0)
+        RTCC1 = bits8(1,1,0,0, 0,0,0,0);    /* �A���[�����荞�ݗL��������J�n */
+											// (WALE WALIE 0 WAFG RIFG 0 RWST RWAIT)
+        RTCC2 = bits8(1,0,0,0, 0,0,0,0);    /* �C���^�[�o��:32k/2^6=2ms�ARTCDIV�o�͂Ȃ� */
+											// (RINTE RCLOE2 RCKDIV 0 0 ICT2 ICT1 ICT0)
+
+        HOUR  = 0x00;
+        MIN   = 0x00;
+        SEC   = 0x00;
+        MONTH = 0x01;
+        DAY   = 0x01;
+        WEEK  = 0x01;           // Mon
+        YEAR  = 0x01;
+
+        ALARMWW = 0x7F;
+
+        vreg_ctr[VREG_C_MCU_STATUS] |= REG_BIT_RTC_BLACKOUT;
+    }
+    // ���荞�ݐݒ�
+    RTCIF = 0;
+    RTCIIF = 0;
+    RTCMK = 1;                  /* ���荞��(�����)�֎~ */
+    RTCIMK = 0;                 /* ���荞��(�A���[��&�C���^�[�o��)���� */
+
+    RTCE = 1;                   /* ����J�n */
+
+    RWAIT = 1;
+    while( !RWST )
+    {;}
+    RWAIT = 0;
+
+    rtc_lock = false;
+    rtc_dirty = false;
+    rtc_alarm_dirty = false;
+}
+
+
+
+/* ========================================================
+ RTC �A���[�����荞��
+ ======================================================== */
+__interrupt void int_rtc(  )
+{
+    RWAIT = 1;
+    while( !RWST )
+    {;}
+    // ���t���w�����
+    if( ( vreg_ctr[VREG_C_RTC_ALARM_DAY] == DAY )
+        && ( vreg_ctr[VREG_C_RTC_ALARM_MONTH] == MONTH )
+        && ( vreg_ctr[VREG_C_RTC_ALARM_YEAR] == YEAR ) )
+    {
+        set_irq( VREG_C_IRQ1, REG_BIT_RTC_ALARM );
+    }
+    RWAIT = 0;
+}
+
+
+
+/* ========================================================
+ RTC �̃��[�h
+  ���W�X�^�́Asec,min,hour,week,day,month,year �̏�
+ ======================================================== */
+void rtc_buf_refresh(  )
+{
+    if( !rtc_lock )
+    {
+        rtc_lock = true;
+        RWAIT = 1;
+        while( !RWST )
+        {;}
+
+        memcpy( &vreg_ctr[VREG_C_RTC_SEC], &SEC, 7 );
+        RWAIT = 0;
+//    renge_task_immed_add( tski_rtc_close );
+    }
+}
+
+
+
+/* ========================================================
+ RTC �̃��C�g
+  set_rtc_close �Ƒ΂Ŏg���ĉ������B
+  �����‚̓o�b�t�@�ɃR�s�[���邾���ŁA
+  ���ۂ�RTC�ɃZ�b�g����̂�set_rtc_close()�ł��B
+ ======================================================== */
+void set_rtc( u8 adrs, u8 data )
+{
+    if( !rtc_dirty )
+    {
+        rtc_dirty = true;
+        memcpy( rtc_work, &SEC, 7 );
+//    renge_task_immed_add( tski_rtc_close );  // I2C�I�����ɍs��
+    }
+    rtc_work[adrs] = data;
+}
+
+
+
+/* ========================================================
+ �K�v�Ȃ�΁ARTC���W�X�^�̍X�V
+ ======================================================== */
+// task_status_immed tski_rtc_close(){
+void rtc_unlock(  )
+{
+    // ���[�h���b�N
+    rtc_lock = false;
+
+    // ���C�g���b�N
+    if( rtc_dirty )
+    {
+        rtc_dirty = false;
+        RWAIT = 1;
+        while( !RWST )
+        {;}
+        memcpy( &SEC, rtc_work, 7 );
+        RWAIT = 0;
+    }
+
+    // �A���[���Z�b�g
+    if( rtc_alarm_dirty )
+    {
+        rtc_alarm_dirty = false;
+        WALE = 0;
+        ALARMWM = vreg_ctr[VREG_C_RTC_ALARM_MIN];
+        ALARMWH = vreg_ctr[VREG_C_RTC_ALARM_HOUR];
+        WALE = 1;
+    }
+}
+
+
+
+
+
+/* ========================================================
+ RTC �V�X�e���`�b�N�^�C�}���荞�݃x�N�^
+  2^6/fXT�i1.953125 ms�j
+ ======================================================== */
+__interrupt void int_rtc_int(  )
+{
+    renge_flg_interval ++;  // �C���N�������g/�f�N�������g���߂��g���̂� DI()�s�v
+}
diff --git a/tags/SDK3.0(2.00)/rtc.h b/tags/SDK3.0(2.00)/rtc.h
new file mode 100644
index 0000000..6b2d9f8
--- /dev/null
+++ b/tags/SDK3.0(2.00)/rtc.h
@@ -0,0 +1,21 @@
+#ifndef __rtc_h__
+#define __rtc_h__
+
+
+void RTC_init( void );
+void rtc_buf_refresh(  );
+void set_rtc( u8 adrs, u8 data );
+
+//task_status_immed tski_rtc_close();
+void rtc_unlock(  );
+
+// ------------------------------------
+#define RTC_32k_on()         { RCLOE0 = 1; }
+#define RTC_32k_off()        { RCLOE0 = 0; }
+
+
+// ------------------------------------
+extern bit rtc_alarm_dirty;
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/self_flash.c b/tags/SDK3.0(2.00)/self_flash.c
new file mode 100644
index 0000000..d1ff4dd
--- /dev/null
+++ b/tags/SDK3.0(2.00)/self_flash.c
@@ -0,0 +1,608 @@
+/* ========================================================
+  ���ȃA�b�v�f�[�^
+ ======================================================== */
+#ifndef _WIN32
+
+#pragma SFR
+#pragma di
+#pragma ei
+#pragma nop
+#pragma stop
+#pragma halt
+
+#endif
+
+#include "incs_loader.h"
+
+#include <fsl.h>
+#include "fsl_user.h"
+#include "i2c_ctr.h"
+
+#include "pool.h"
+#include "magic.h"
+
+#include "pm.h"
+
+// ========================================================
+const u8 fsl_fx_MHz_u08 = 8;
+const u8 fsl_low_voltage_u08 = 1;
+
+
+// ���ȃt���b�V���p�����[�^
+#define SAM_BLOCK_SIZE                 1024
+ // ��256�o�C�g�ȏ�͂܂Ƃ߂Ă����܂���B
+#define SELF_UPDATE_BUFF_SIZE          256
+#define SELF_UPDATE_SPLIT_WRITE_NUM    ( SAM_BLOCK_SIZE / SELF_UPDATE_BUFF_SIZE )
+#define SAM_WORD_SIZE                  4
+
+//                                    ���u���b�N�ԍ��i1�u���b�N��1kB�j
+#define INACTIVE_BOOTSECT_TOP          4
+#define FIRM_TOP                       8
+#define FIRM_SIZE                     12
+#define ALTERNATE_FIRMTOP             20
+
+
+#ifdef _MCU_BSR_
+#define ACKD       ACKD1
+#define ACKE       ACKE1
+#define COI        COI1
+#define IICAEN     IICA1EN
+#define IICAPR0    IICAPR10
+#define IICRSV     IICRSV1
+#define IICA       IICA1
+#define IICAIF     IICAIF1
+#define IICAMK     IICAMK1
+#define IICAPR1    IICAPR11
+#define IICCTL0    IICCTL01
+#define IICE       IICE1
+#define IICF       IICF1
+#define IICS       IICS1
+#define IICWH      IICWH1
+#define IICWL      IICWL1
+#define LREL       LREL1
+#define SPD        SPD1
+#define SPIE       SPIE1
+#define STCEN      STCEN1
+#define STD        STD1
+#define SVA        SVA1
+#define WREL       WREL1
+#define WTIM       WTIM1
+#endif
+
+#ifndef _WIN32
+#define LED_POW1 P1.5
+#define LED_PM_POW1 PM1.5
+#else
+#define LED_POW1	mcuRegP[ _P1_5 ]
+#define LED_PM_POW1 mcuRegPM[ _P1_5 ]
+#endif
+
+// ========================================================
+static void FSL_Open( void );
+static void FSL_Close( void );
+void     firm_restore(  );
+
+static err my_FSL_Init();
+static err firm_duplicate( u8 block_src, u8 block_dest );
+
+#ifdef _DBG_LED_PRINT_
+void alert( u8 );
+void led_print( u8 );
+#else
+# define alert( x )         ;
+# define led_print( x )     ;
+#endif
+
+
+// ========================================================
+extern uni_pool pool;
+
+
+// 0.D�ȍ~ �V�A�b�v�f�[�^����
+// �V�t�@�[���͑��v�H
+#define N_MGC_L   0x1FF6
+#define N_MGC_T   0x4FF6
+
+
+
+/* ========================================================
+  I2C�Ŏ�M���āA
+  �������݁A
+  �`�F�b�NOK�@���@�V�t�@�[���ɐ؂�ւ��čċN��
+  �@�@�@�@NG�@���@���i���j�t�@�[���ɖ߂��čċN��
+  �i���̊֐�����͖߂�܂���j
+ ======================================================== */
+void firm_update(  )
+{
+    u8      target_block;
+    u8      split_write_count;  // �u���b�N�ւ��܂��܏������ރJ�E���^
+
+    // �����ւ��O���� /////////////////////////////////////
+    my_FSL_Init();
+
+    /* �t�@�[���̃o�b�N�A�b�v
+    �J�n�A�h���X�A�������ݐ�̐擪�h�u���b�N�ԍ��h (�T�C�Y�� FIRM_SIZE)
+       0x2000 - 0x4FFF ��
+       0x5000 - 0x7FFF (�u���b�N 20 - 31) �ɃR�s�[
+     */
+    firm_duplicate( FIRM_TOP,
+                    ALTERNATE_FIRMTOP );
+
+    // �S�u���b�N�폜 /////////////////////////////////////
+    // �d���f�𔻒肷�邽�߁A�ŏ��ɑS�N���X�^��������
+    //�i�V�t�@�[�����������Ƃ���Ɏc���Ă�A�ȑO�̃t�@�[���̃t�b�^�����������j
+    for( target_block = INACTIVE_BOOTSECT_TOP;
+         target_block < ALTERNATE_FIRMTOP;
+         target_block ++ )
+    {
+        FSL_Erase( target_block );
+    }
+
+
+    // �����ւ� ///////////////////////////////////////////
+    // ���X�g�b�v�R���f�B�V����������܂ő�����
+    // ���I�������A�X�^�[�g�A�b�v���[�`���ɔ��
+    for( target_block = INACTIVE_BOOTSECT_TOP;
+         target_block < ALTERNATE_FIRMTOP;
+         target_block ++ )
+    {
+            u8      my_spd;
+
+/* ���łɏ����Ă���B�łȂ��ƒ��f���ꂽ�Ƃ��I�����Ă邩���ʏo���Ȃ�
+//          // �V�t�@�[���̈�폜
+//        FSL_Erase( target_block );
+*/
+        // ������������
+        for( split_write_count = 0;
+             split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM;
+             split_write_count ++ )
+        {
+            u8*     p_buffer = &pool.self_update_work[0];
+            u16     buff_written_size = 0;
+
+            WDT_Restart(  );
+
+            // I2C���珑�����݃f�[�^���o�b�t�@�ɂ��߂�
+            do
+            {
+                while( !IICAIF && !SPD )
+                {;}
+                my_spd = SPD;
+                IICAIF = 0;
+                *p_buffer = IICA;
+                WREL = 1;
+                p_buffer ++;
+                buff_written_size ++;
+            }
+            while( ( buff_written_size != SELF_UPDATE_BUFF_SIZE )
+                   && !SPD );
+
+            my_spd += SPD;
+
+            // ��������
+            // �Ōゾ�ƁA�S�~���p�f�B���O���邪�ʂɂ��܂�Ȃ�
+            if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE
+                                         + split_write_count * SELF_UPDATE_BUFF_SIZE ),
+                           ( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) )
+
+                != FSL_OK )
+            {
+                alert(1);
+                // �������݌�̃`�F�b�N�G���[
+                // ���X�g�A
+                firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP );
+                FSL_ForceReset(); // ���Z�b�g
+                // FSL_SwapBootCluster(  );  // �u�[�g�X���b�v�u�����Ɂv�ċN�����ďo���Ȃ��炵��
+                // �߂��Ă��Ȃ� //
+            }
+
+            if( my_spd != 0 )
+            {
+                break;
+            }
+        }
+
+        // 1�u���b�N�������݊����B�����x���t�@�C���s��
+        if( FSL_IVerify( target_block ) != FSL_OK ){
+            alert(2);
+            // �ēx�������������� �x���t�@�C���J��Ԃ���������_���ł���... /// �ď������݂��ׂ��H
+            // ���X�g�A
+            firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP );
+            FSL_ForceReset(); // ���Z�b�g
+            // FSL_SwapBootCluster(  );  // �u�[�g�X���b�v�u�����Ɂv�ċN�����ďo���Ȃ��炵��
+            // �߂��Ă��Ȃ� //
+        }
+
+        if( my_spd != 0 )
+        {
+            break;
+        }
+    }
+
+    LREL = 1;
+
+    // �������񂾃t�@�[���̃`�F�b�N //
+    {
+        u8      i;
+        u8      comp = 0;
+
+        // ���[�_�[�̃}�W�b�N�ƁA�{���̖����̃}�W�b�N�͓������m�F
+        for( i = 0; i < sizeof( __TIME__ ); i++ )
+        {
+            comp += (u8)(( (*( __far u8 * ) ( N_MGC_L + i )) == (*( u8 * ) ( N_MGC_T + i ) )) ? 0 : 1);
+        }
+        if( *( __far u8 * )( N_MGC_L +2 ) != ':' )  // �����ς̂܂�
+        {
+            comp ++;
+        }
+
+        if( comp == 0 )
+        {
+            // OK!
+            FSL_InvertBootFlag(  );
+            FSL_SwapBootCluster(  );  // ���Z�b�g�����ɓ�����BFSL_Close�͕s�v
+        }
+        else
+        {
+            // �f�[�^(�}�W�b�N�i���o�[�������ĂȂ�)�G���[
+            // ���X�g�A
+            alert(3);
+
+            firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP );
+            FSL_ForceReset(); // ���Z�b�g
+            // FSL_SwapBootCluster(  );  // �u�[�g�X���b�v�u�����Ɂv�ċN�����ďo���Ȃ��炵��
+        }
+        // �߂��Ă��Ȃ� //
+    }
+}
+
+
+
+
+/* ========================================================
+  �@���t�@�[�����o�b�N�A�b�v�̈悩�烊�X�g�A���܂��B
+  �@�`�F�b�N��A�Ō�̍Ō�Ńu�[�g�X���b�v����̂ŁA
+�@�����ł̓u�[�g�X���b�v�͕s�v�ł��B
+
+ ======================================================== */
+void firm_restore(  )
+{
+    DBG_LED_on;
+    LED_PM_POW1 = 0;
+
+    // �o�b�N�A�b�v�͐���H //
+    {
+        u16      i;
+        u8      comp = 0;
+
+        for( i = 0; i < sizeof( __TIME__ ); i++ )      // sizeof( __TIME__ ) = 8 �炵
+        {
+            comp += ( *( __far u8 * )( MGC_LOAD + i ) == *( u8 * )( MGC_HEAD_BKUP + i ) ) ? 0 : 1;
+            comp += ( *( u8 * )( MGC_HEAD_BKUP + i ) == *( u8 * )( MGC_FOOT_BKUP + i ) ) ? 0 : 1;
+        }
+        if( *( u8 * )( MGC_FOOT_BKUP ) == 0xFF )
+        {
+            comp ++;
+        }
+
+        if( comp != 0 )
+        {
+            // �o�b�N�A�b�v�̈����ꂽ...
+            comp = 0;
+
+            // 3.3V���オ��Ȃ��ƍ���
+            EI(  );
+            iic_mcu_start(  );
+            RESET2_ast;
+            FCRAM_RST_ast;
+            GYRO_DISABLE();
+            PM_LDSW_on();
+            wait_ms( 1 + DELAY_PM_TW_PWUP );
+            PM_VDD_on(  );
+
+            while(1)
+            {
+                WDT_Restart();
+
+                {
+                    // ��LED �s�R�s�R
+                    comp++;
+                    LED_POW1 = ( comp == 1 || comp == 3 )? 1: 0;
+                    if( comp == 8 )
+                    {
+                        comp = 0;
+                    }
+                }
+
+                {
+                    // �d���{�^���œd��off
+                    static u8 sw_hold_count;
+
+                    if( !SW_POW_n_RAW )
+                    {
+                        sw_hold_count++;
+                    }
+                    else
+                    {
+                        sw_hold_count = 0;
+                    }
+
+                    if( sw_hold_count > 16 )
+                    {
+                        sw_hold_count = 0;
+                        // �d��off
+                        PM_LDSW_off(  );
+                        break;
+                    }
+                }
+
+                // �E�F�C�g
+                for( i = 1; i != 0; i++ )
+                {
+                    NOP();
+                    NOP();
+                    NOP();
+                    NOP();
+                }
+            }
+            {
+                // �ǁA�ǂ����悤�c�B
+
+                KRM = ( KR_SW_POW );    // Mask �ł͂Ȃ��AMode�Ȃ̂��������B����킵��
+                MK0 = 0xFFFF;
+                MK1 = ~( INT_MSK1_KR );
+                MK2L = 0xFF;
+
+                // PU5 ���̂܂�
+                PU7  = bits8(0,0,0,0, 1,0,0,0);   // PWSWI
+                PU20 = bits8(0,0,0,0, 0,0,0,0);;        // SW_HOME ��~
+
+                STOP(  );
+
+                mcu_wdt_reset;
+            }
+        }
+    }
+
+
+    if( my_FSL_Init() != ERR_SUCCESS ){
+        alert(1);
+    }
+
+    /* �t�@�[���̃��X�g�A
+       0x4800 - 0x7FFF (�u���b�N 18 - 27) ����
+       0x2000 - 0x47FF (�u���b�N  8 - 17) �փR�s�[
+     */
+    if( firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP ) != ERR_SUCCESS )
+    {
+        alert(2);
+    }
+    DBG_LED_off;
+
+    // todo ���X�g�A���s������ALED���������Ƃ������āA�T�[�r�X����ɂ��Ă��炤�H
+
+/*
+// ���u�[�g
+    if( FSL_InvertBootFlag() != ERR_SUCCESS )
+    {
+        alert(3);
+    }
+*/
+    FSL_ForceReset(); // ���Z�b�g
+    // FSL_SwapBootCluster(  );  // �u�[�g�X���b�v�u�����Ɂv�ċN�����ďo���Ȃ��炵��
+}
+
+
+
+// ========================================================
+static void FSL_Open( void )
+{
+    /* save the configuration of the interrupt controller and set */
+#ifdef   FSL_INT_BACKUP
+    fsl_MK0L_bak_u08 = MK0L;    /* if (interrupt backup required)                 */
+    fsl_MK0H_bak_u08 = MK0H;    /* {                                              */
+    fsl_MK1L_bak_u08 = MK1L;    /*                                                */
+    fsl_MK1H_bak_u08 = MK1H;    /*        save interrupt controller               */
+    fsl_MK2L_bak_u08 = MK2L;    /*        configuration                           */
+    fsl_MK2H_bak_u08 = MK2H;    /*                                                */
+    MK0L = FSL_MK0L_MASK;       /*                                                */
+    MK0H = FSL_MK0H_MASK;       /*                                                */
+    MK1L = FSL_MK1L_MASK;       /*        prepare interrupt controller            */
+    MK1H = FSL_MK1H_MASK;       /*        for selfprogramming                     */
+    MK2L = FSL_MK2L_MASK;       /*                                                */
+    MK2H = FSL_MK2H_MASK;       /* }                                              */
+#endif
+
+    while( DST1 ){;}            // DMA��~
+    DEN1 = 0;
+
+    MK0 = 0xFFFF;
+    MK1 = 0xFFFF;
+    MK2 = 0xFFFF;
+/*
+    LVIM = bits8(0,0,0,0, 0,0,1,0);
+    LVIS = bits8(0,0,0,0, 1,0,0,0);
+    LVIM = bits8(1,0,0,0, 0,0,1,0);
+*/
+    FSL_FLMD0_HIGH;             // �t���b�V�������ւ�����
+}
+
+
+
+/*----------------------------------------------------------------------------------------------*/
+/* leave the "user room" and restore previous conditions                                        */
+/*----------------------------------------------------------------------------------------------*/
+static void FSL_Close( void )
+{
+    // ������n���H
+
+    FSL_FLMD0_LOW;              // �t���b�V�����C�g�v���e�N�g
+
+#ifdef   FSL_INT_BACKUP
+    MK0L = fsl_MK0L_bak_u08;    /*   do{                                          */
+    MK0H = fsl_MK0H_bak_u08;    /*        restore interrupt controller            */
+    MK1L = fsl_MK1L_bak_u08;    /*        configuration                           */
+    MK1H = fsl_MK1H_bak_u08;    /*                                                */
+    MK2L = fsl_MK2L_bak_u08;    /*                                                */
+    MK2H = fsl_MK2H_bak_u08;    /*   }                                            */
+#endif
+}
+
+
+
+/* ========================================================
+�@�}�C�R�����Ńt�@�[�����R�s�[���܂��B
+  __far u8 * p_rom  �R�s�[���̐擪�A�h���X
+  block_dest        �R�s�[��̐擪�u���b�N
+
+  �R�s�[��ɏ�����悤��my_FSL_Init�����炩���ߎ��s����K�v������܂��B
+ ======================================================== */
+//static err firm_duplicate( __far u8 * p_rom,
+//                           u8 block_dest )
+static err firm_duplicate( u8 block_src,
+                           u8 block_dest )
+{
+    u8      target_block;
+    u8      split_write_count;  // �u���b�N�ւ��܂��܏������ރJ�E���^
+    __far u8* p_src = ( __far u8* )( block_src * 0x400 );
+    u8      retry_error;
+
+    led_print(1);
+
+    // �������ݐ�u���b�N�̐������J��Ԃ�
+    for( target_block = block_dest;
+         target_block < ( block_dest + FIRM_SIZE );
+         target_block ++ )
+    {
+        led_print(2);
+        WDT_Restart(  );
+        // �u���b�N����
+        retry_error = 5 + 1;
+        while( FSL_BlankCheck( target_block ) != FSL_OK )
+        {
+            led_print(3);
+            FSL_Erase( target_block );
+            if( -- retry_error == 0 )
+            {
+                // �t���b�V�������H
+                FSL_Close(  );
+                return ( ERR_ERR );  // ���Z�b�g�����A�����݂�@�ǂ��Ȃ邩�m���
+            }
+        }
+
+        led_print(4);
+        // �����������ݕ��J��Ԃ�
+        for( split_write_count = 0;
+             split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM;
+             split_write_count ++ )
+        {
+            u16     buff_written_size;
+            u8*     p_buff;
+
+            // �������݃f�[�^���o�b�t�@�ɂ��߂�
+            buff_written_size = 0;
+            p_buff = &pool.self_update_work[0];
+            do
+            {
+                *p_buff = *p_src;
+                p_src ++;
+                p_buff ++;
+                buff_written_size ++;
+            }
+            while( buff_written_size != SELF_UPDATE_BUFF_SIZE );
+
+            // ��������
+            if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE
+                                         + split_write_count * SELF_UPDATE_BUFF_SIZE ),
+                           ( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) )
+                != FSL_OK )
+            {
+                // ���J�o���̓��u�[�g�� //
+                FSL_Close(  );
+                led_print(5);
+//                while(1){}
+                return ( ERR_ERR );
+            }
+        }
+        led_print(6);
+
+        // 1�u���b�N�������݊����B�����d���`�F�b�N���s��
+        while( FSL_IVerify( target_block ) != FSL_OK )
+        {
+            // ���J�o���̓��u�[�g�� //
+            led_print(7);
+            return ( ERR_ERR );
+        }
+    }
+    return( ERR_SUCCESS );
+
+}
+
+
+
+/* ========================================================
+ ======================================================== */
+static err my_FSL_Init()
+{
+    u8 rv;
+
+    RTCE = 0;
+
+    // �����ւ��O���� //
+    DI(  );
+    FSL_Open(  );               // ���荞�݋֎~�Ȃ�
+
+    FSL_Init( &pool.self_update_work[0] );      // ���C�u�����������B���荞�ݒ��f�l������
+    rv = FSL_ModeCheck(  );   // ���C�g�v���e�N�g�`�F�b�N�B���s���邱�Ƃ��l������
+
+    return( (err)rv );
+}
+
+
+task_status_immed tski_mcu_reset()
+{
+    // ���ʂɍċN��
+    my_FSL_Init();
+
+    FSL_ForceReset();           // ���Z�b�g
+    FSL_Close(  );
+
+    // �ی��H //
+    mcu_wdt_reset;
+    return( ERR_SUCCESS );      // no reach
+}
+
+
+#ifdef _DBG_LED_PRINT_
+// P1.5 = led_pow_red_old
+void alert( u8 num )
+{
+    u8 i;
+
+    while(1)
+    {
+        WDT_Restart();
+        LED_POW1 = 1;
+        for( i = 0; i < num; i++ )
+        {
+            DBG_LED_on;
+            DBG_LED_off;
+        }
+        LED_POW1 = 0;
+    }
+}
+
+
+void led_print( u8 num )
+{
+    u8 i;
+
+    DBG_LED_on;
+    for( i = 0; i < num; i++ )
+    {
+        LED_POW1 = 1;
+        LED_POW1 = 0;
+    }
+    DBG_LED_off;
+}
+#endif
diff --git a/tags/SDK3.0(2.00)/self_flash.h b/tags/SDK3.0(2.00)/self_flash.h
new file mode 100644
index 0000000..768565e
--- /dev/null
+++ b/tags/SDK3.0(2.00)/self_flash.h
@@ -0,0 +1,9 @@
+#ifndef _self_flash_h_
+#define _self_flash_h_
+
+
+void firm_update();
+
+
+#endif
+
diff --git a/tags/SDK3.0(2.00)/sim/sfrAlias.h b/tags/SDK3.0(2.00)/sim/sfrAlias.h
new file mode 100644
index 0000000..1e77313
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sim/sfrAlias.h
@@ -0,0 +1,200 @@
+#ifndef _sfrAlias_
+#define _sfrAlias_
+
+#include "../config.h"
+
+#ifdef _debug_led_
+# define DBG_LED_on      { mcuRegPM[ _P2_1 ] = 0; mcuRegP[ _P2_1 ] = 1; }
+# define DBG_LED_off     { mcuRegP[ _P2_1 ] = 0; }
+# define DBG_LED_toggle  ( mcuRegP[ _P2_1 ] ^= 1 )
+# define DBG_LED2_on      { mcuRegPM[ _P2_2 ] = 0; mcuRegP[ _P2_2 ] = 1; }
+# define DBG_LED2_off     { mcuRegP[ _P2_2 ] = 0; }
+# define DBG_LED2_toggle  ( mcuRegP[ _P2_2 ] ^= 1 )
+
+#else
+# define DBG_LED_on      ;
+# define DBG_LED_off     ;
+# define DBG_LED_toggle  ;
+# define DBG_LED2_on      ;
+# define DBG_LED2_off     ;
+# define DBG_LED2_toggle  ;
+#endif
+
+#ifdef _PMIC_CTR_
+# define SLP_ACK         mcuRegP[ _P7_7 ]
+#endif
+
+
+#define IIC_SLA_CODEC   0xA4
+#define IIC_SLA_ACCEL   0x30           // ST LIS331DLH
+
+
+// PMx��0�ŏo�̓��[�h
+
+// SoC
+#define IRQ0_ast            { mcuRegP[ _P7_6 ] = 0; mcuRegPM[ _P7_6 ] = 0; }
+#define IRQ0_neg            { mcuRegP[ _P7_6 ] = 1; }
+#define IRQ0_enable         { mcuRegPM[ _P7_6 ] = 0; }
+#define IRQ0_disable        { mcuRegPM[ _P7_6 ] = 1; }
+#define IRQ0              ( mcuRegP[ _P7_6 ] )
+
+// �������h�~
+#define RESET1_n             ( mcuRegP[ _P0_0 ] )
+
+#if 0 // PM_RESET1�`���g��
+#define RESET1_ast           { mcuRegP[ _P0_0 ] = 0; mcuRegPM[ _P0_0 ] = 0; }
+#define RESET1_neg           { mcuRegPM[ _P0_0 ] = 1; }
+#endif
+
+#define RESET2_ast           { mcuRegP[ _P0_1 ] = 0; mcuRegPM[ _P0_1 ] = 0; }
+#define RESET2_neg           { mcuRegPM[ _P0_1 ] = 1; }
+
+#define SLP_REQ              mcuRegP[ _P12_0 ]
+
+// CTR,SPFL,�܂����ʔh���@����
+#define DEV_DET              ( P12 & 0x00000110 )
+#define DEV_CTR              ( 0 << 1 )
+#define DEV_SPFL             ( 1 << 1 )
+#define DEV_SHRIMP           ( 2 << 1 )
+#define DEV_RSV2             ( 3 << 1 )
+
+// FCRAM
+#define FCRAM_RST            mcuRegP[ _P3_0 ]
+#define FCRAM_RST_ast        { mcuRegP[ _P3_0 ] = 0; }
+#define FCRAM_RST_neg        { mcuRegP[ _P3_0 ] = 1; }
+
+// CODEC
+#define PM_IRQ_n             mcuRegP[ _P7_2 ]
+// INTP6
+
+// PM
+#define PM_EXTDC_n_RAW       mcuRegP[ _P7_0 ]
+// INTP7
+//#define BT_TEMP              mcuRegP[ _P15_0 ]
+// ANI8
+//#define BT_DET               mcuRegP[ _P15_1 ]
+// ANI9
+#define BT_DET_P             mcuRegP[ _P1_6 ]
+#define BT_TEMP_P            mcuRegP[ _P1_7 ]
+
+
+// SPFL�̃A�����t�@�XLCD�ŕK�v�ȁ}15V�̓d���B
+#define SPFL_LCD_AMOL_HV_CONT mcuRegP[ _P20_2 ]
+
+
+// �[�d����(out)
+// ���_���ł��B���ӁB
+#define BT_CHG_ENABLE()      ( mcuRegP[ _P4_3 ] = 0 )
+#define BT_CHG_DISABLE()     ( mcuRegP[ _P4_3 ] = 1 )
+#define BT_CHG_Ena_n         ( mcuRegP[ _P4_3 ] )
+
+// �[�d��(in)
+#define BT_IN_CHG_n_RAW      mcuRegP[ _P5_1 ]
+#define PU_BT_IN_CHG_n       mcuRegPU[ _P5_1 ]
+
+#define SW_WIFI_n_RAW        mcuRegP[ _P7_4 ]
+#define PM_SW_WIFI_n         mcuRegPM[ _P7_4 ]
+// KR4
+#define SW_POW_n_RAW         mcuRegP[ _P7_3 ]
+// KR3
+#define SW_SEL_n             mcuRegP[ _P2_3 ]
+#define PM_SW_SEL_n          mcuRegPM[ _P2_3 ]
+//#define VOL                  mcuRegP[ _P2_7 ]
+// ANI7
+
+#define SW_HOME_n_JIKKI_RAW  mcuRegP[ _P20_4 ]
+#define PM_SW_HOME_n_JIKKI   mcuRegPM[ _P20_4 ]
+#define PU_SW_HOME_n_JIKKI   mcuRegPU[ _P20_4 ]
+
+// INTP22
+#define SW_HOME_n_TSBOARD_RAW mcuRegP[ _P2_0 ]
+#define PM_SW_HOME_n_TSBOARD mcuRegPM[ _P2_0 ]
+
+// WiFi
+#define WL_TX                mcuRegP[ _P20_3 ]      // INTP21
+#define PM_WL_TX             mcuRegPM[ _P20_3 ]      // INTP21
+
+// RBR����
+#define RBR_RESET_n          mcuRegP[ _P2_1 ]
+#define RBR_FLIGHT           mcuRegP[ _P2_2 ]
+
+//#define LED_CAM            mcuRegP[ _P1_0 ]      // TO02
+//#define LED_WIFI           mcuRegP[ _P1_1 ]      // TO03
+//#define LED_NOTIFY         mcuRegP[ _P1_3 ]      // TO05
+//#define LED_3D           mcuRegP[ _P5_2 ]      // SLTO �� TO01
+//#define LED_POW2           mcuRegP[ _P1_4 ]      // TO06 ( �� )
+//#define LED_POW1           mcuRegP[ _P1_5 ]      // TO07 ( �� )
+//#define LED_CHARGE         mcuRegP[ _P2_4 ]
+
+
+#ifdef _MODEL_CTR_
+// mcuRegP[ _P5_3 ] �ɉ����AmcuRegP[ _P5_5 ], P140 P141
+// P140���o�͐�p�Ȃ̂�...
+#define I2C_PU_on()          { P14 |= 0x03; mcuRegPM[ _P5_3 ] = 0; mcuRegPM[ _P3_3 ] = 0; }
+#define I2C_PU_off()         { mcuRegPM[ _P5_3 ] = 1; mcuRegPM[ _P3_3 ] = 1; P14 &= ~0x03; }
+#endif
+
+#define GYRO_ENABLE()     mcuRegP[ _P5_0 ] = 0
+#define GYRO_DISABLE()    mcuRegP[ _P5_0 ] = 1
+
+//#define I2C_M_SDA            mcuRegP[ _P3_1 ]      // SDA10
+//#define I2C_M_SCL            mcuRegP[ _P3_2 ]      // SCL10
+
+//#define I2C_0_SCL            mcuRegP[ _P6_0 ]        // IIC_TWL SCL0
+//#define I2C_0_SDA            mcuRegP[ _P6_1 ]        //         SDA0
+
+//#define I2C_1_SCL            mcuRegP[ _P20_0 ]       // IIC CTR SCL1
+//#define I2C_1_SDA            mcuRegP[ _P20_1 ]       //         SDA1
+
+//#define 32kHz_O              mcuRegP[ _P1_2 ]        // RTCCL
+//#define 32k_I1               mcuRegP[ _P12_3 ]       // XT1
+//#define 32k_I2               mcuRegP[ _P12_4 ]       // XT2
+
+// ���@�A�J���@�A���V�䔻�ʁB
+#define DIPSW                ( P4 & bits8(0,0,0,0, 0,0,1,1) )  // mini cube & �\�t�g�E�F�A�f�B�b�v�X�C�b�` TOOL0,1�B mcuRegP[ _P4_0 ]�� L ���ӁI
+#define DIPSW_CTR            3  // ���g�p
+#define DIPSW_ISDEV          0  // KuC��BattGauge�Ŕ���
+#define DIPSW_TAIKENDAI      2
+#define DIPSW_TAIKENDAI_NBD  1
+
+
+#define SHELL_OPEN_RAW         mcuRegP[ _P7_1 ]       // INTP5 �ӂ��J�� (�‚����L)
+
+//#define DBG_VR               mcuRegP[ _P2_6 ]
+// ANI6
+
+#define ACC_VALID            mcuRegP[ _P20_5 ]
+#define PM_ACC_VALID         mcuRegPM[ _P20_5 ]
+#define ACCEL_INT1           mcuRegP[ _P2_5 ]		// todo P2.5��ʖړI�Ŏg��Ȃ���Ȏ���(AIN5)���ꂢ�ɂ���
+#define PM_ACCEL_INT1        mcuRegPM[ _P2_5 ]
+
+#define KR_SW_POW            ( 1 << 3 )
+#define KR_SW_WIFI           ( 1 << 4 )
+
+
+///////////////////////////////////////////////////////////
+
+#define INT_MSK0_IIC_M_DMA    1<<12
+#define INT_MSK0_SHELL        1<<7
+#define INT_MSK0_EXTDC        1<<6
+//#define INT_MSK0_SLP        1<<2
+#define INT_MSK0_RSV          ~( INT_MSK0_IIC_M_DMA | INT_MSK0_SHELL | INT_MSK0_EXTDC )
+
+#define INT_MSK1_KR           1<<11
+#define INT_MSK1_RTCINTVAL    1<<10
+#define INT_MSK1_RTCALARM     1<<9
+#define INT_MSK1_ADC          1<<8
+#define INT_MSK1_IIC_CTR      1<<3
+#define INT_MSK1_IIC_MCU      1<<0
+#define INT_MSK1_RSV          ~( INT_MSK1_KR | INT_MSK1_RTCINTVAL | INT_MSK1_RTCALARM | INT_MSK1_ADC \
+                                 | INT_MSK1_IIC_CTR | INT_MSK1_IIC_MCU )
+
+#define INT_MSK2_WIFI_TX_KE3  1<<4
+#define INT_MSK2L_RSV         ~( INT_MSK2_WIFI_TX_KE3 )
+
+#define INT_MSK2_IIC_TWL      1<<8
+#define INT_MSK2_WIFI_TX_BSR  1<<10
+#define INT_MSK2_CODEC_PMIRQ  1<<3
+#define INT_MSK2_RSV          ~( INT_MSK2_IIC_TWL | INT_MSK2_WIFI_TX_BSR | INT_MSK2_CODEC_PMIRQ )
+
+#endif // dupe include guard
diff --git a/tags/SDK3.0(2.00)/sim/simFixture.c b/tags/SDK3.0(2.00)/sim/simFixture.c
new file mode 100644
index 0000000..847b119
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sim/simFixture.c
@@ -0,0 +1,149 @@
+#ifdef _WIN32
+
+#include <fsl.h>
+
+void EI(){;}
+void DI(){;}
+void HALT(){;}
+void NOP(){;}
+void STOP(){;}
+
+unsigned char bcdtob( unsigned char arg )
+{
+    return 0;	// �v���[�X�z���_
+}
+
+
+/*
+typedef unsigned char       fsl_u08;
+typedef unsigned int        fsl_u16;
+typedef unsigned long int   fsl_u32;
+*/
+/*
+#define   FSL_OK                    0x00
+#define   FSL_ERR_FLMD0             0x01
+#define   FSL_ERR_PARAMETER         0x05
+#define   FSL_ERR_PROTECTION        0x10
+#define   FSL_ERR_ERASE             0x1A
+#define   FSL_ERR_BLANKCHECK        0x1B
+#define   FSL_ERR_IVERIFY           0x1B
+#define   FSL_ERR_WRITE             0x1C
+#define   FSL_ERR_EEP_IVERIFY       0x1D
+#define   FSL_ERR_EEP_BLANKCHECK    0x1E
+#define   FSL_ERR_INTERRUPTION      0x1F
+*/
+fsl_u08  FSL_Init(fsl_u08* data_buffer_pu08)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_Init_cont(fsl_u08* data_buffer_pu08)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_ModeCheck(void)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_BlankCheck(fsl_u16 block_u16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_Erase(fsl_u16 block_u16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_IVerify(fsl_u16 block_u16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_Write(fsl_u32 s_address_u32, fsl_u08 word_count_u08)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_EEPROMWrite(fsl_u32 s_address_u32, fsl_u08 word_count_u08)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_GetSecurityFlags(fsl_u16* destination_pu16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_GetActiveBootCluster(fsl_u08* destination_pu08)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_GetBlockEndAddr(fsl_u32* destination_pu32, fsl_u16 block_u16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_GetFlashShieldWindow(fsl_u16* start_block_pu16, fsl_u16* end_block_pu16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_InvertBootFlag(void)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_SetFlashShieldWindow(fsl_u16 start_block_u16, fsl_u16 end_block_u16)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_SetChipEraseProtectFlag(void)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_SetBlockEraseProtectFlag(void)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_SetWriteProtectFlag(void)
+{
+    return FSL_OK;
+}
+
+fsl_u08  FSL_SetBootClusterProtectFlag(void)
+{
+    return FSL_OK;
+}
+
+void FSL_SwapBootCluster(void)
+{
+    ;
+}
+
+fsl_u08 FSL_SwapActiveBootCluster(void)
+{
+    return FSL_OK;
+}
+
+void FSL_ForceReset(void)
+{
+    ;
+}
+
+void  FSL_SetInterruptMode(void)
+{
+    ;
+}
+
+
+
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/sim/simOnWin.h b/tags/SDK3.0(2.00)/sim/simOnWin.h
new file mode 100644
index 0000000..d6349b8
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sim/simOnWin.h
@@ -0,0 +1,701 @@
+#ifndef _sim_on_win_
+#define _sim_on_win_
+//#pragma warning(disable:4068)
+
+
+// �g�ݍ��݊֐� ///////////////////////////////////////////
+void HALT();
+void STOP();
+void NOP();
+void EI();
+void DI();
+
+unsigned char bcdtob( unsigned char );
+
+
+
+// pragma�I�ȕ�
+#define __interrupt
+#define __far 
+
+
+enum // sfr
+{
+    sfr_ADCRH = 0,
+    sfr_ADM,
+    sfr_ADS,
+	sfr_KRM,
+	sfr_EGP0,
+	sfr_EGN0,
+	sfr_ISC,
+	sfr_TIS0,
+	sfr_IICA0,
+	sfr_IICS0,
+	sfr_IICF0,
+	sfr_SEC,
+	sfr_MIN,
+	sfr_HOUR,
+	sfr_WEEK,
+	sfr_DAY,
+	sfr_MONTH,
+	sfr_YEAR,
+	sfr_SUBCUD,
+	sfr_ALARMWM,
+	sfr_ALARMWH,
+	sfr_ALARMWW,
+	sfr_RTCC0,
+	sfr_RTCC1,
+	sfr_RTCC2,
+	sfr_CMC,
+	sfr_CSC,
+	sfr_OSTC,
+	sfr_OSTS,
+	sfr_CKC,
+	sfr_CKS0,
+	sfr_CKS1,
+	sfr_RESF,
+	sfr_LVIM,
+	sfr_LVIS,
+	sfr_WDTE,
+	sfr_DSA0,
+	sfr_DSA1,
+	sfr_DMC0,
+	sfr_DMC1,
+	sfr_DRC0,
+	sfr_DRC1,
+	sfr_BECTL,
+	sfr_PFCMD,
+	sfr_PFS,
+	sfr_FLPMC,
+	sfr_PMC,
+	sfr_TXD0_SIO00,
+	sfr_RXD0_SIO01,
+	sfr_TDR00,
+	sfr_TDR01,
+	sfr_TXD1,
+	sfr_SIO10,
+	sfr_RXD1,
+	sfr_TDR03,
+	sfr_TDR04,
+	sfr_TDR05,
+	sfr_TDR06,
+	sfr_TDR07,
+	sfr_RSUBC,
+	sfr_DRA0L,
+	sfr_DRA0H,
+	sfr_DRA1L,
+	sfr_DRA1H,
+	sfr_DBC0L,
+	sfr_DBC0H,
+	sfr_DBC1L,
+	sfr_DBC1H,
+	sfr_IF2L,
+	sfr_IF2H,
+	sfr_MK2L,
+	sfr_MK2HL,
+	sfr_PR02L,
+	sfr_PR02H,
+	sfr_PR12L,
+	sfr_PR12H,
+	sfr_IF0,
+//	sfr_IF0L,
+//	sfr_IF0H,
+	sfr_IF1,
+//	sfr_IF1L,
+//	sfr_IF1H,
+	sfr_MK0,
+//	sfr_MK0L,
+//	sfr_MK0H,
+	sfr_MK1,
+//	sfr_MK1L,
+//	sfr_MK1H,
+	sfr_PR00,
+//	sfr_PR00L,
+//	sfr_PR00H,
+	sfr_PR01,
+//	sfr_PR01L,
+//	sfr_PR01H,
+	sfr_PR10,
+//	sfr_PR10L,
+//	sfr_PR10H,
+	sfr_PR11,
+//	sfr_PR11L,
+//	sfr_PR11H,
+	sfr_MDAL_MULA,
+	sfr_MDAH_MULB,
+	sfr_MDBH_MULOH,
+	sfr_MDBL_MULOL,
+
+    sfr_P0,
+	sfr_PM0,
+	sfr_PM1,
+	sfr_P1,
+	sfr_P2,
+	sfr_PM2,
+	sfr_P3,
+	sfr_PM3,
+	sfr_P4,
+	sfr_PM4,
+	sfr_P5,
+	sfr_PM5,
+	sfr_P6,
+	sfr_PM6,
+	sfr_P7,
+	sfr_PM7,
+	sfr_P12,
+	sfr_PM12,
+	sfr_P14,
+	sfr_PM14,
+	sfr_P15,
+	sfr_PM15,
+	sfr_PM20,
+	sfr_P20,
+    _MCU_SFR_MAX_
+};
+
+
+enum  // 2nd sfr
+{
+	sfr_ADPC,
+	sfr_PU0,
+	sfr_PU1,
+	sfr_PU3,
+	sfr_PU4,
+	sfr_PU5,
+	sfr_PU7,
+	sfr_PU12,
+	sfr_PU14,
+	sfr_PIM3,
+	sfr_PIM7,
+	sfr_POM3,
+	sfr_POM7,
+	sfr_NFEN0,
+	sfr_NFEN1,
+	sfr_NFEN2,
+	sfr_MDCL,
+	sfr_MDCH,
+	sfr_MDUC,
+	sfr_PER0,
+	sfr_PER2,
+	sfr_OSMC,
+	sfr_BCDADJ,
+	sfr_SSR00L,
+	sfr_SSR00,
+	sfr_SSR01L,
+	sfr_SSR01,
+	sfr_SSR02L,
+	sfr_SSR02,
+	sfr_SSR03L,
+	sfr_SSR03,
+	sfr_SIR00L,
+	sfr_SIR00,
+	sfr_SIR01L,
+	sfr_SIR02L,
+	sfr_SIR01,
+	sfr_SIR02,
+	sfr_SIR03L,
+	sfr_SIR03,
+	sfr_SMR00,
+	sfr_SMR01,
+	sfr_SMR02,
+	sfr_SMR03,
+	sfr_SCR00,
+	sfr_SCR01,
+	sfr_SCR02,
+	sfr_SCR03,
+	sfr_SE0L,
+	sfr_SE0,
+	sfr_SS0L,
+	sfr_SS0,
+	sfr_ST0L,
+	sfr_ST0,
+	sfr_SPS0L,
+	sfr_SPS0,
+	sfr_SO0,
+	sfr_SOE0L,
+	sfr_SOE0,
+	sfr_SOL0L,
+	sfr_SOL0,
+	sfr_TCR00,
+	sfr_TCR01,
+	sfr_TCR02,
+	sfr_TCR07,
+	sfr_TO0L,
+	sfr_TOL0L,
+	sfr_TPS0L,
+	sfr_TSR07L,
+	sfr_TMR00,
+	sfr_TMR02,
+	sfr_TMR04,
+	sfr_TMR06,
+	sfr_TSR00L,
+	sfr_TOE0L,
+	sfr_TMR01,
+	sfr_TMR03,
+	sfr_TMR05,
+	sfr_TMR07,
+	sfr_TT0L,
+	sfr_TOM0L,
+	sfr_TE0L,
+	sfr_TS0L,
+	sfr_IICCTL01,
+	sfr_IICCTL11,
+	sfr_IICS1,
+	sfr_PER3,
+	sfr_PU20,
+	sfr_TCR04,
+	sfr_TCR06,
+	sfr_EGN2,
+	sfr_EGP2,
+	sfr_IICWH0,
+	sfr_IICWH1,
+	sfr_IICWL0,
+	sfr_IICWL1,
+	sfr_SVA0,
+	sfr_SVA1,
+	sfr_IICA1,
+	sfr_IICCTL00,
+	sfr_IICCTL10,
+	sfr_IICF1,
+	sfr_TCR03,
+	sfr_TCR05,
+	sfr_TSR01L,
+	sfr_TSR02L,
+	sfr_TSR03L,
+	sfr_TSR04L,
+	sfr_TSR05L,
+	sfr_TSR06L,
+	sfr_TE0,
+	sfr_TO0,
+	sfr_TOE0,
+	sfr_TOL0,
+	sfr_TOM0,
+	sfr_TPS0,
+	sfr_TS0,
+	sfr_TSR07,
+	sfr_TT0,
+	sfr_TSR00,
+	sfr_TSR01,
+	sfr_TSR02,
+	sfr_TSR03,
+	sfr_TSR04,
+	sfr_TSR05,
+	sfr_TSR06,
+    _MCU_SFR2_MAX_
+};
+
+
+
+enum
+{
+    _P0_0 = 0,	_P0_1,
+    _P1_0,	_P1_1,	_P1_2,	_P1_3,	_P1_4,	_P1_5,	_P1_6,	_P1_7,
+    _P2_0,	_P2_1,	_P2_2,	_P2_3,	_P2_4,	_P2_5,	_P2_6,	_P2_7,
+    _P3_0,	_P3_1,	_P3_2,	_P3_3,
+    _P4_0,	_P4_1,	_P4_2,	_P4_3,
+    _P5_0,	_P5_1,	_P5_2,	_P5_3,
+    _P6_0,	_P6_1,
+    _P7_0,	_P7_1,	_P7_2,	_P7_3,	_P7_4,	_P7_5,	_P7_6,	_P7_7,
+    _P12_0,	_P12_1,	_P12_2,	_P12_3,	_P12_4,
+    _P14_0,	_P14_1,
+    _P15_0,	_P15_1,
+    _P20_0,	_P20_1,	_P20_2,	_P20_3,	_P20_4,	_P20_5,
+	_MCU_PORTS_MAX_
+};
+
+unsigned char mcuRegPM[ _MCU_PORTS_MAX_ ];
+unsigned char mcuRegP[ _MCU_PORTS_MAX_ ];
+unsigned char mcuRegPU[ _MCU_PORTS_MAX_ ];
+
+/*
+typedef struct 
+{
+	unsigned _7 :1;
+	unsigned _6 :1;
+	unsigned _5 :1;
+	unsigned _4 :1;
+	unsigned _3 :1;
+	unsigned _2 :1;
+	unsigned _1 :1;
+	unsigned _0 :1;
+}mcu_reg;
+*/
+/*
+typedef unsigned char mcu_reg;
+
+mcu_reg P0;
+mcu_reg PM0;
+mcu_reg PM1;
+mcu_reg P1;
+mcu_reg P2;
+mcu_reg PM2;
+mcu_reg PM3;
+mcu_reg P3;
+mcu_reg P4;
+mcu_reg P5;
+mcu_reg PM5;
+//mcu_reg PU5;
+mcu_reg P6;
+mcu_reg PM6;
+mcu_reg P7;
+mcu_reg PM7;
+mcu_reg P12;
+mcu_reg PM12;
+mcu_reg P14;
+mcu_reg PM14;
+mcu_reg P15;
+mcu_reg PM15;
+//mcu_reg PU20;
+mcu_reg PM20;
+mcu_reg P20;
+
+*/
+
+
+unsigned short mcuSfr[ _MCU_SFR_MAX_ ];
+unsigned short mcuSfr2[ _MCU_SFR2_MAX_ ];
+
+
+// sfr
+#define	 ADCRH	mcuSfr[ sfr_ADCRH ]
+#define	 ADM	mcuSfr[ sfr_ADM ]
+#define	 ADS	mcuSfr[ sfr_ADS ]
+#define	 KRM	mcuSfr[ sfr_KRM ]
+#define	 EGP0	mcuSfr[ sfr_EGP0 ]
+#define	 EGN0	mcuSfr[ sfr_EGN0 ]
+#define	 ISC	mcuSfr[ sfr_ISC ]
+#define	 TIS0	mcuSfr[ sfr_TIS0 ]
+#define	 IICA0	mcuSfr[ sfr_IICA0 ]
+#define	 IICS0	mcuSfr[ sfr_IICS0 ]
+#define	 IICF0	mcuSfr[ sfr_IICF0 ]
+#define	 SEC	mcuSfr[ sfr_SEC ]
+#define	 MIN	mcuSfr[ sfr_MIN ]
+#define	 HOUR	mcuSfr[ sfr_HOUR ]
+#define	 WEEK	mcuSfr[ sfr_WEEK ]
+#define	 DAY	mcuSfr[ sfr_DAY ]
+#define	 MONTH	mcuSfr[ sfr_MONTH ]
+#define	 YEAR	mcuSfr[ sfr_YEAR ]
+#define	 SUBCUD	mcuSfr[ sfr_SUBCUD ]
+#define	 ALARMWM	mcuSfr[ sfr_ALARMWM ]
+#define	 ALARMWH	mcuSfr[ sfr_ALARMWH ]
+#define	 ALARMWW	mcuSfr[ sfr_ALARMWW ]
+#define	 RTCC0	mcuSfr[ sfr_RTCC0 ]
+#define	 RTCC1	mcuSfr[ sfr_RTCC1 ]
+#define	 RTCC2	mcuSfr[ sfr_RTCC2 ]
+#define	 CMC	mcuSfr[ sfr_CMC ]
+#define	 CSC	mcuSfr[ sfr_CSC ]
+#define	 OSTC	mcuSfr[ sfr_OSTC ]
+#define	 OSTS	mcuSfr[ sfr_OSTS ]
+#define	 CKC	mcuSfr[ sfr_CKC ]
+#define	 CKS0	mcuSfr[ sfr_CKS0 ]
+#define	 CKS1	mcuSfr[ sfr_CKS1 ]
+#define	 RESF	mcuSfr[ sfr_RESF ]
+#define	 LVIM	mcuSfr[ sfr_LVIM ]
+#define	 LVIS	mcuSfr[ sfr_LVIS ]
+#define	 WDTE	mcuSfr[ sfr_WDTE ]
+#define	 DSA0	mcuSfr[ sfr_DSA0 ]
+#define	 DSA1	mcuSfr[ sfr_DSA1 ]
+#define	 DMC0	mcuSfr[ sfr_DMC0 ]
+#define	 DMC1	mcuSfr[ sfr_DMC1 ]
+#define	 DRC0	mcuSfr[ sfr_DRC0 ]
+#define	 DRC1	mcuSfr[ sfr_DRC1 ]
+#define	 BECTL	mcuSfr[ sfr_BECTL ]
+#define	 PFCMD	mcuSfr[ sfr_PFCMD ]
+#define	 PFS	mcuSfr[ sfr_PFS ]
+#define	 FLPMC	mcuSfr[ sfr_FLPMC ]
+#define	 PMC	mcuSfr[ sfr_PMC ]
+#define	 TXD0_SIO00	mcuSfr[ sfr_TXD0_SIO00 ]
+#define	 RXD0_SIO01	mcuSfr[ sfr_RXD0_SIO01 ]
+#define	 TDR00	mcuSfr[ sfr_TDR00 ]
+#define	 TDR01	mcuSfr[ sfr_TDR01 ]
+#define	 TXD1	mcuSfr[ sfr_TXD1 ]
+#define	 SIO10	mcuSfr[ sfr_SIO10 ]
+#define	 RXD1	mcuSfr[ sfr_RXD1 ]
+#define	 TDR03	mcuSfr[ sfr_TDR03 ]
+#define	 TDR04	mcuSfr[ sfr_TDR04 ]
+#define	 TDR05	mcuSfr[ sfr_TDR05 ]
+#define	 TDR06	mcuSfr[ sfr_TDR06 ]
+#define	 TDR07	mcuSfr[ sfr_TDR07 ]
+#define	 RSUBC	mcuSfr[ sfr_RSUBC ]
+#define	 DRA0L	mcuSfr[ sfr_DRA0L ]
+#define	 DRA0H	mcuSfr[ sfr_DRA0H ]
+#define	 DRA1L	mcuSfr[ sfr_DRA1L ]
+#define	 DRA1H	mcuSfr[ sfr_DRA1H ]
+#define	 DBC0L	mcuSfr[ sfr_DBC0L ]
+#define	 DBC0H	mcuSfr[ sfr_DBC0H ]
+#define	 DBC1L	mcuSfr[ sfr_DBC1L ]
+#define	 DBC1H	mcuSfr[ sfr_DBC1H ]
+#define	 IF2L	mcuSfr[ sfr_IF2L ]
+#define	 IF2H	mcuSfr[ sfr_IF2H ]
+#define	 MK2L	mcuSfr[ sfr_MK2L ]
+#define	 MK2HL	mcuSfr[ sfr_MK2HL ]
+#define	 PR02L	mcuSfr[ sfr_PR02L ]
+#define	 PR02H	mcuSfr[ sfr_PR02H ]
+#define	 PR12L	mcuSfr[ sfr_PR12L ]
+#define	 PR12H	mcuSfr[ sfr_PR12H ]
+//#define	 IF0L	mcuSfr[ sfr_IF0L ]
+//#define	 IF0H	mcuSfr[ sfr_IF0H ]
+#define	 IF0	mcuSfr[ sfr_IF0 ]
+//#define	 IF1L	mcuSfr[ sfr_IF1L ]
+//#define	 IF1H	mcuSfr[ sfr_IF1H ]
+#define	 IF1H	mcuSfr[ sfr_IF1 ]
+//#define	 MK0L	mcuSfr[ sfr_MK0L ]
+//#define	 MK0H	mcuSfr[ sfr_MK0H ]
+#define	 MK0L	mcuSfr[ sfr_MK0 ]
+//#define	 MK1L	mcuSfr[ sfr_MK1L ]
+//#define	 MK1H	mcuSfr[ sfr_MK1H ]
+#define	 MK1H	mcuSfr[ sfr_MK1 ]
+#define	 PR00	mcuSfr[ sfr_PR00 ]
+//#define	 PR00L	mcuSfr[ sfr_PR00L ]
+//#define	 PR00H	mcuSfr[ sfr_PR00H ]
+#define	 PR01	mcuSfr[ sfr_PR01 ]
+//#define	 PR01L	mcuSfr[ sfr_PR01L ]
+//#define	 PR01H	mcuSfr[ sfr_PR01H ]
+#define	 PR10	mcuSfr[ sfr_PR10 ]
+//#define	 PR10L	mcuSfr[ sfr_PR10L ]
+//#define	 PR10H	mcuSfr[ sfr_PR10H ]
+#define	 PR11	mcuSfr[ sfr_PR11 ]
+//#define	 PR11L	mcuSfr[ sfr_PR11L ]
+//#define	 PR11H	mcuSfr[ sfr_PR11H ]
+#define	 MDAL_MULA	mcuSfr[ sfr_MDAL_MULA ]
+#define	 MDAH_MULB	mcuSfr[ sfr_MDAH_MULB ]
+#define	 MDBH_MULOH	mcuSfr[ sfr_MDBH_MULOH ]
+#define	 MDBL_MULOL	mcuSfr[ sfr_MDBL_MULOL ]
+#define	 P0	mcuSfr[ sfr_P0 ]
+#define	 PM0	mcuSfr[ sfr_PM0 ]
+#define	 PM1	mcuSfr[ sfr_PM1 ]
+#define	 P1	mcuSfr[ sfr_P1 ]
+#define	 P2	mcuSfr[ sfr_P2 ]
+#define	 PM2	mcuSfr[ sfr_PM2 ]
+#define	 PM3	mcuSfr[ sfr_PM3 ]
+#define	 P3	mcuSfr[ sfr_P3 ]
+#define	 P4	mcuSfr[ sfr_P4 ]
+#define	 PM4	mcuSfr[ sfr_PM4 ]
+#define	 P5	mcuSfr[ sfr_P5 ]
+#define	 PM5	mcuSfr[ sfr_PM5 ]
+#define	 P6	mcuSfr[ sfr_P6 ]
+#define	 PM6	mcuSfr[ sfr_PM6 ]
+#define	 P7	mcuSfr[ sfr_P7 ]
+#define	 PM7	mcuSfr[ sfr_PM7 ]
+#define	 P12	mcuSfr[ sfr_P12 ]
+#define	 PM12	mcuSfr[ sfr_PM12 ]
+#define	 P14	mcuSfr[ sfr_P14 ]
+#define	 PM14	mcuSfr[ sfr_PM14 ]
+#define	 P15	mcuSfr[ sfr_P15 ]
+#define	 PM15	mcuSfr[ sfr_PM15 ]
+
+
+
+
+
+// 2nd sfr
+#define	ADPC	mcuSfr2[ sfr_ADPC ]
+#define	PU0	mcuSfr2[ sfr_PU0 ]
+#define	PU1	mcuSfr2[ sfr_PU1 ]
+#define	PU3	mcuSfr2[ sfr_PU3 ]
+#define	PU4	mcuSfr2[ sfr_PU4 ]
+#define	PU5	mcuSfr2[ sfr_PU5 ]
+#define	PU7	mcuSfr2[ sfr_PU7 ]
+#define	PU12	mcuSfr2[ sfr_PU12 ]
+#define	PU14	mcuSfr2[ sfr_PU14 ]
+#define	PIM3	mcuSfr2[ sfr_PIM3 ]
+#define	PIM7	mcuSfr2[ sfr_PIM7 ]
+#define	POM3	mcuSfr2[ sfr_POM3 ]
+#define	POM7	mcuSfr2[ sfr_POM7 ]
+#define	NFEN0	mcuSfr2[ sfr_NFEN0 ]
+#define	NFEN1	mcuSfr2[ sfr_NFEN1 ]
+#define	NFEN2	mcuSfr2[ sfr_NFEN2 ]
+#define	MDCL	mcuSfr2[ sfr_MDCL ]
+#define	MDCH	mcuSfr2[ sfr_MDCH ]
+#define	MDUC	mcuSfr2[ sfr_MDUC ]
+#define	PER0	mcuSfr2[ sfr_PER0 ]
+#define	PER2	mcuSfr2[ sfr_PER2 ]
+#define	OSMC	mcuSfr2[ sfr_OSMC ]
+#define	BCDADJ	mcuSfr2[ sfr_BCDADJ ]
+#define	SSR00L	mcuSfr2[ sfr_SSR00L ]
+#define	SSR00	mcuSfr2[ sfr_SSR00 ]
+#define	SSR01L	mcuSfr2[ sfr_SSR01L ]
+#define	SSR01	mcuSfr2[ sfr_SSR01 ]
+#define	SSR02L	mcuSfr2[ sfr_SSR02L ]
+#define	SSR02	mcuSfr2[ sfr_SSR02 ]
+#define	SSR03L	mcuSfr2[ sfr_SSR03L ]
+#define	SSR03	mcuSfr2[ sfr_SSR03 ]
+#define	SIR00L	mcuSfr2[ sfr_SIR00L ]
+#define	SIR00	mcuSfr2[ sfr_SIR00 ]
+#define	SIR01L	mcuSfr2[ sfr_SIR01L ]
+#define	SIR02L	mcuSfr2[ sfr_SIR02L ]
+#define	SIR01	mcuSfr2[ sfr_SIR01 ]
+#define	SIR02	mcuSfr2[ sfr_SIR02 ]
+#define	SIR03L	mcuSfr2[ sfr_SIR03L ]
+#define	SIR03	mcuSfr2[ sfr_SIR03 ]
+#define	SMR00	mcuSfr2[ sfr_SMR00 ]
+#define	SMR01	mcuSfr2[ sfr_SMR01 ]
+#define	SMR02	mcuSfr2[ sfr_SMR02 ]
+#define	SMR03	mcuSfr2[ sfr_SMR03 ]
+#define	SCR00	mcuSfr2[ sfr_SCR00 ]
+#define	SCR01	mcuSfr2[ sfr_SCR01 ]
+#define	SCR02	mcuSfr2[ sfr_SCR02 ]
+#define	SCR03	mcuSfr2[ sfr_SCR03 ]
+#define	SE0L	mcuSfr2[ sfr_SE0L ]
+#define	SE0	mcuSfr2[ sfr_SE0 ]
+#define	SS0L	mcuSfr2[ sfr_SS0L ]
+#define	SS0	mcuSfr2[ sfr_SS0 ]
+#define	ST0L	mcuSfr2[ sfr_ST0L ]
+#define	ST0	mcuSfr2[ sfr_ST0 ]
+#define	SPS0L	mcuSfr2[ sfr_SPS0L ]
+#define	SPS0	mcuSfr2[ sfr_SPS0 ]
+#define	SO0	mcuSfr2[ sfr_SO0 ]
+#define	SOE0L	mcuSfr2[ sfr_SOE0L ]
+#define	SOE0	mcuSfr2[ sfr_SOE0 ]
+#define	SOL0L	mcuSfr2[ sfr_SOL0L ]
+#define	SOL0	mcuSfr2[ sfr_SOL0 ]
+#define	TCR00	mcuSfr2[ sfr_TCR00 ]
+#define	TCR01	mcuSfr2[ sfr_TCR01 ]
+#define	TCR02	mcuSfr2[ sfr_TCR02 ]
+#define	TCR07	mcuSfr2[ sfr_TCR07 ]
+#define	TO0L	mcuSfr2[ sfr_TO0L ]
+#define	TOL0L	mcuSfr2[ sfr_TOL0L ]
+#define	TPS0L	mcuSfr2[ sfr_TPS0L ]
+#define	TSR07L	mcuSfr2[ sfr_TSR07L ]
+#define	TMR00	mcuSfr2[ sfr_TMR00 ]
+#define	TMR02	mcuSfr2[ sfr_TMR02 ]
+#define	TMR04	mcuSfr2[ sfr_TMR04 ]
+#define	TMR06	mcuSfr2[ sfr_TMR06 ]
+#define	TSR00L	mcuSfr2[ sfr_TSR00L ]
+#define	TOE0L	mcuSfr2[ sfr_TOE0L ]
+#define	TMR01	mcuSfr2[ sfr_TMR01 ]
+#define	TMR03	mcuSfr2[ sfr_TMR03 ]
+#define	TMR05	mcuSfr2[ sfr_TMR05 ]
+#define	TMR07	mcuSfr2[ sfr_TMR07 ]
+#define	TT0L	mcuSfr2[ sfr_TT0L ]
+#define	TOM0L	mcuSfr2[ sfr_TOM0L ]
+#define	TE0L	mcuSfr2[ sfr_TE0L ]
+#define	TS0L	mcuSfr2[ sfr_TS0L ]
+#define	IICCTL01	mcuSfr2[ sfr_IICCTL01 ]
+#define	IICCTL11	mcuSfr2[ sfr_IICCTL11 ]
+#define	IICS1	mcuSfr2[ sfr_IICS1 ]
+#define	PER3	mcuSfr2[ sfr_PER3 ]
+#define	PU20	mcuSfr2[ sfr_PU20 ]
+#define	TCR04	mcuSfr2[ sfr_TCR04 ]
+#define	TCR06	mcuSfr2[ sfr_TCR06 ]
+#define	EGN2	mcuSfr2[ sfr_EGN2 ]
+#define	EGP2	mcuSfr2[ sfr_EGP2 ]
+#define	IICWH0	mcuSfr2[ sfr_IICWH0 ]
+#define	IICWH1	mcuSfr2[ sfr_IICWH1 ]
+#define	IICWL0	mcuSfr2[ sfr_IICWL0 ]
+#define	IICWL1	mcuSfr2[ sfr_IICWL1 ]
+#define	SVA0	mcuSfr2[ sfr_SVA0 ]
+#define	SVA1	mcuSfr2[ sfr_SVA1 ]
+#define	IICA1	mcuSfr2[ sfr_IICA1 ]
+#define	IICCTL00	mcuSfr2[ sfr_IICCTL00 ]
+#define	IICCTL10	mcuSfr2[ sfr_IICCTL10 ]
+#define	IICF1	mcuSfr2[ sfr_IICF1 ]
+#define	P20	mcuSfr2[ sfr_P20 ]
+#define	PM20	mcuSfr2[ sfr_PM20 ]
+#define	TCR03	mcuSfr2[ sfr_TCR03 ]
+#define	TCR05	mcuSfr2[ sfr_TCR05 ]
+#define	TSR01L	mcuSfr2[ sfr_TSR01L ]
+#define	TSR02L	mcuSfr2[ sfr_TSR02L ]
+#define	TSR03L	mcuSfr2[ sfr_TSR03L ]
+#define	TSR04L	mcuSfr2[ sfr_TSR04L ]
+#define	TSR05L	mcuSfr2[ sfr_TSR05L ]
+#define	TSR06L	mcuSfr2[ sfr_TSR06L ]
+#define	TE0	mcuSfr2[ sfr_TE0 ]
+#define	TO0	mcuSfr2[ sfr_TO0 ]
+#define	TOE0	mcuSfr2[ sfr_TOE0 ]
+#define	TOL0	mcuSfr2[ sfr_TOL0 ]
+#define	TOM0	mcuSfr2[ sfr_TOM0 ]
+#define	TPS0	mcuSfr2[ sfr_TPS0 ]
+#define	TS0	mcuSfr2[ sfr_TS0 ]
+#define	TSR07	mcuSfr2[ sfr_TSR07 ]
+#define	TT0	mcuSfr2[ sfr_TT0 ]
+#define	TSR00	mcuSfr2[ sfr_TSR00 ]
+#define	TSR01	mcuSfr2[ sfr_TSR01 ]
+#define	TSR02	mcuSfr2[ sfr_TSR02 ]
+#define	TSR03	mcuSfr2[ sfr_TSR03 ]
+#define	TSR04	mcuSfr2[ sfr_TSR04 ]
+#define	TSR05	mcuSfr2[ sfr_TSR05 ]
+#define	TSR06	mcuSfr2[ sfr_TSR06 ]
+
+
+
+typedef unsigned char bit;
+
+bit ACKD1;
+bit ACKE0;
+bit ACKE1;
+bit ADCEN;
+bit ADCS;
+bit ADIF;
+bit ADMK;
+bit COI1;
+bit DBC1;
+bit DEN1;
+bit DFC1;
+bit DMAIF1;
+bit DMAMK1;
+bit DRA1;
+bit DST1;
+bit IF1;
+bit IF2;
+bit IICA0EN;
+bit IICA1EN;
+bit IICAIF0;
+bit IICAIF1;
+bit IICAMK0;
+bit IICAMK1;
+bit IICAPR00;
+bit IICAPR01;
+bit IICAPR10;
+bit IICAPR11;
+bit IICE0;
+bit IICE1;
+bit IICIF10;
+bit IICMK10;
+bit IICRSV0;
+bit IICRSV1;
+bit LREL0;
+bit LREL1;
+bit MK0;
+bit MK1;
+bit MK2;
+bit PIF0;
+bit PIF21;
+bit PMK23;
+bit PMK6;
+bit RCLOE0;
+bit RTCE;
+bit RTCEN;
+bit RTCIF;
+bit RTCIIF;
+bit RTCIMK;
+bit RTCMK;
+bit RWAIT;
+bit RWST;
+bit SAU0EN;
+bit SDR02;
+bit SLP_ACK;
+bit SMC0;
+bit SMC1;
+bit SPD1;
+bit SPIE0;
+bit SPIE1;
+bit STCEN0;
+bit STCEN1;
+bit STD1;
+bit TAU0EN;
+bit TDR02;
+bit WALE;
+bit WREL0;
+bit WREL1;
+bit WTIM0;
+bit WTIM1;
+
+bit BECTL_7;
+
+
+
+#include "sfrAlias.h"
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/sim/sim_interrupt_decrare.c b/tags/SDK3.0(2.00)/sim/sim_interrupt_decrare.c
new file mode 100644
index 0000000..68f4359
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sim/sim_interrupt_decrare.c
@@ -0,0 +1,74 @@
+#ifndef _WIN32
+
+// �����A�������Ȃ��͂�
+void fn_intwdti(  ){}
+void fn_intlvi(  ){}
+void fn_intp0(){}
+void fn_intp1(  ){}
+void fn_intp2(  ){}
+void fn_intp3(  ){}
+void intp21_RFTx(  ){}
+//  void    fn_intp4(){ while(1){} } // pm.c
+//  void    fn_intp5(){ while(1){} } // pm.c
+//  void    fn_intp6(){ while(1){} } // pm.c
+//  void    fn_intp7(){ while(1){} } // led.c
+//  void    fn_intp21(){ while(1){} } // led.c
+
+void fn_intcmp0(  ){}
+void fn_intcmp1(  ){}
+void fn_intdma0(  ){}
+//  void    fn_intdma1(){}  // i2c_mcu.c�ɂ���
+void fn_intst0(  ){}
+void fn_intsr0(  ){}
+void fn_intsre0(  ){}
+void fn_intst1(  ){}
+/* __interrupt	void	fn_intcsi10(){} */
+//  void    fn_intiic10(){ while(1){} }
+void fn_intsr1(  ){}
+void fn_intsre1(  ){}
+//  void    fn_intiica(){} // i2c.c�ɂ���
+/* __interrupt	void	fn_inttm00(){} *//* sub.c�ɂĒ�` */
+void fn_inttm01(  ){}
+void fn_inttm02(  ){}
+void fn_inttm03(  ){}
+//  void    fn_intad(){ while(1){} }  // adc.c
+void fn_intrtc(  ){}
+//  void    int_rtcint(){} // rtc.c�ɂ���
+//  void    fn_intkr(){}  // main.c
+void fn_intmd(  ){}
+void fn_inttm04(  ){}
+void fn_inttm05(  ){}
+void fn_inttm06(  ){}
+void fn_inttm07(  ){}
+
+
+/* ========================================================
+  �L�[���^�[�����荞��
+ ======================================================== */
+void int_kr(  )
+{
+    // �N���邾��
+}
+
+
+
+/* ========================================================
+  ext dc
+ ======================================================== */
+void intp4(  )
+{
+    // �N���邾��
+}
+
+
+
+/* ========================================================
+ shell close
+ ======================================================== */
+void intp5(  )
+{
+    // �N���邾��
+}
+
+#endif
+
diff --git a/tags/SDK3.0(2.00)/sw.c b/tags/SDK3.0(2.00)/sw.c
new file mode 100644
index 0000000..caf5c9b
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sw.c
@@ -0,0 +1,183 @@
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+
+#endif
+
+#include "incs.h"
+
+#include "i2c_twl.h"
+#include "i2c_ctr.h"
+#include "led.h"
+#include "pm.h"
+#include "rtc.h"
+#include "sw.h"
+
+
+//=========================================================
+/*
+ vreg_ctr����ǂ݂����̂Ńw�b�_��
+#define INTERVAL_TSK_SW  8
+#define CLICK_THRESHOLD  2
+
+#define HOLD_THREASHOLD     (u8)( 2000 / INTERVAL_TSK_SW )
+#define FORCEOFF_THREASHOLD (u8)( 4000 / INTERVAL_TSK_SW )
+*/
+#define TIME_MUKAN			(u8)( 300 / INTERVAL_TSK_SW )
+#define TIME_MUKAN_PWSW_RED_TRIAL	(u16)( 15000 / INTERVAL_TSK_SW )	// ���V��Ahome�}�X�N����
+
+//=========================================================
+u16     SW_pow_count;
+bit     SW_pow_mask;
+
+u8      SW_home_count, SW_wifi_count, SW_home_count_rel;
+u8      sw_wifi_mukan_time;
+
+u16     off_timeout_timer;
+
+u16     sw_pwsw_mukan_time;
+
+//=========================================================
+// ���������Ԃ𐔂���B�������ςȂ��ł�0�ɖ߂�Ȃ�
+// mask����0�̎��́A��x�����܂Ŗ�������
+#define count_sw_n( sw, counter, mask )   \
+  {                                       \
+    if( sw ){                             \
+      mask = 0;                           \
+      counter = 0;                        \
+    }else{                                \
+      if( mask != 0 ){                    \
+        counter = 0;                      \
+      }else{                              \
+        counter ++;                       \
+        if( counter == 0 ) counter = -1;  \
+      }                                   \
+    }                                     \
+  }
+
+
+#define chk_clicked( button, count, irq_bit_name )    \
+    if( !button )                                     \
+    {                                                 \
+        if( count < CLICK_THRESHOLD )                 \
+        {                                             \
+            count ++;                                 \
+			if( count == CLICK_THRESHOLD )            \
+			{                                         \
+	            count ++;                             \
+				set_irq( VREG_C_IRQ0, irq_bit_name ); \
+			}                                         \
+        }                                             \
+    }                                                 \
+    else                                              \
+    {                                                 \
+        count = 0;                                    \
+    }                                             
+
+
+
+/* ========================================================
+ �X�C�b�`�̊Ď�
+  �@�`���^�����O���͂˂���A��������A�������g���K�Ȃǂ̌��o�Ȃ�
+ ======================================================== */
+void tsk_sw(  )
+{
+    static u8 task_interval;
+
+	if( system_status.pwr_state == OFF_TRIG )
+    {
+        SW_pow_count = 0;  // �d�������ɔ����ăN���A
+		task_interval = 0;
+    }
+
+    if( task_interval != 0 )
+    {
+		task_interval--;
+        return;
+		// �����܂�
+    }
+
+	task_interval = (u8)( INTERVAL_TSK_SW / SYS_INTERVAL_TICK );// �v���X�P�[������Ɏg���Ă܂��ˁc
+
+    // 8ms ���ɂ��܂�
+    switch ( system_status.pwr_state )
+    {
+    case ( ON ):
+    case ( SLEEP ):
+    case ( OFF ):
+    case ( ON_CHECK ):
+		// ���@�̏ꍇ
+        if( ! system_status.taikendai )
+        {
+            
+            // �d���X�C�b�`�̊Ď� //
+            if( SW_pow_count == ( TIME_PWSW_CLICK ) )  // �N���b�N���Ԃɓ��B
+            {
+                set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_CLICK );
+            }
+            else if( SW_pow_count == ( HOLD_THREASHOLD ) )  // �������ɓ��B
+            {
+                set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_HOLD );
+                if( off_timeout_timer == 0 ) // �����d���f�J�E���g�_�E���J�n�A���x���������Ȃ��悤�ɁB
+                {
+                    off_timeout_timer = vreg_ctr[ VREG_C_OFF_DELAY ] * 16;
+                }
+            }
+
+            if( off_timeout_timer != 0 )   // ���������荞�݌�A�^�C���A�E�g�ŋ����I�t�B
+            {
+                off_timeout_timer --;
+                if( off_timeout_timer == 0 )
+                {
+                    force_off = true;
+                }
+            }
+        
+        }else{
+			// �X�^���h�A�������V��
+            // �d���X�C�b�`�̊Ď� //
+            if( SW_pow_count == ( TIME_PWSW_CLICK ) )
+            {
+                if( sw_pwsw_mukan_time == 0 )
+                {
+                    set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_CLICK );
+                    // ����ȃ^�C�~���O��PWSW��������HOME���j���[�ɓ���Ă��܂��̂�������邽�߂̃}�X�N�^�C�}�[
+                    sw_pwsw_mukan_time = TIME_MUKAN_PWSW_RED_TRIAL;
+                }
+            }
+            else if( SW_pow_count == ( HOLD_THREASHOLD ) )
+            {
+                force_off = true;
+            }
+            
+            if( sw_pwsw_mukan_time != 0 )
+            {
+                sw_pwsw_mukan_time--;
+            }
+        }
+
+        count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask );        // �{�^���������Ԃ̃J�E���g
+
+        // HOME sw //
+        chk_clicked(  SW_HOME_n, SW_home_count,     REG_BIT_SW_HOME_CLICK );
+        chk_clicked( !SW_HOME_n, SW_home_count_rel, REG_BIT_SW_HOME_RELEASE );
+                
+        // wifi sw //
+        /// �ň��Ȏ����Ȃ̂͂킩���Ă��邪�A�s��ɏo�Ă��܂����s�ǃX�C�b�`���~������
+        if( sw_wifi_mukan_time != 0 )
+        {
+            sw_wifi_mukan_time--;
+        }
+        else
+        {
+            chk_clicked( SW_WIFI_n, SW_wifi_count, REG_BIT_SW_WIFI_CLICK );
+            if( SW_wifi_count == CLICK_THRESHOLD +1 ) // ���������蔭���I
+            {
+                sw_wifi_mukan_time = TIME_MUKAN;
+            }
+        }
+    }
+}
diff --git a/tags/SDK3.0(2.00)/sw.h b/tags/SDK3.0(2.00)/sw.h
new file mode 100644
index 0000000..abe9715
--- /dev/null
+++ b/tags/SDK3.0(2.00)/sw.h
@@ -0,0 +1,20 @@
+#ifndef _sw_
+#define _sw_
+
+#include "config.h"
+
+extern u16     SW_pow_count;
+extern bit     SW_pow_mask;
+
+#define INTERVAL_TSK_SW  8
+#define CLICK_THRESHOLD  5
+
+#define HOLD_THREASHOLD     (u16)( 3000 /INTERVAL_TSK_SW )
+#define TIME_PWSW_CLICK     (u8)(   220 /INTERVAL_TSK_SW )
+#define FORCEOFF_THREASHOLD (u8)( 12000 /INTERVAL_TSK_SW /16 )
+
+
+extern u16 off_timeout_timer;
+#define clear_pow_off_countdown(){ off_timeout_timer = 0; force_off = false; }
+
+#endif
diff --git a/tags/SDK3.0(2.00)/task_debug.c b/tags/SDK3.0(2.00)/task_debug.c
new file mode 100644
index 0000000..54b594b
--- /dev/null
+++ b/tags/SDK3.0(2.00)/task_debug.c
@@ -0,0 +1,120 @@
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+
+#endif
+
+#include "incs_loader.h"
+//#include "incs.h"
+#include "renge\renge.h"
+#include "pm.h"
+#include "accero.h"
+
+
+/* ========================================================
+ ======================================================== */
+
+// 7�Z�O 4�o�C�g��
+# define IIC_SLA_DBG_MONITOR   0x44
+
+
+#if 0 
+
+���ӁI�@�^�X�N���X�g������O���Ă܂��̂ŁA�g���Ȃ畜�������ĉ������I
+
+void tsk_debug(  )
+{
+//    u8      temp;
+
+#ifdef _DBG_PEDO_AUTO_ENABLE_
+    if( system_status.pwr_state == ON_TRIG ){
+        // �����v���N������on�ɂ���
+        vreg_ctr[ VREG_C_ACC_CONFIG ] = 0x03;
+        renge_task_immed_add( tski_acc_hosu_set );
+    }
+#endif
+
+    /*
+    if( system_status.pwr_state == ON_TRIG ){
+    {
+    static u8 count = 0;
+    // �f�o�b�OLED�i8bit�j�̏�����
+       temp = iic_mcu_read_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO );
+       count ++;
+       iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, count );
+       iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, count );
+    }
+    }
+     */
+
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_IRQ1 ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_SND_VOL ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_3D ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_3D ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_SND_VOL ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_STATUS ] );
+//    iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
+
+    /*
+    {
+        u8      str[4];
+        
+        if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) )
+        {
+            str[3] = vreg_ctr[ VREG_C_FREE0 ];
+            str[2] = vreg_ctr[ VREG_C_FREE1 ];
+            str[1] = vreg_ctr[ VREG_C_STATUS ];
+            str[0] = vreg_ctr[ VREG_C_RTC_SEC ];
+
+            str[3] = vreg_ctr[ VREG_C_SND_VOL ];
+            str[2] = vreg_ctr[ VREG_C_3D ];
+            str[1] = vreg_ctr[ VREG_C_ACC_CONFIG ];
+            str[0] = SEC;
+            iic_mcu_write( IIC_SLA_DBG_MONITOR, 0x03, 4, &str );
+        }
+    }
+     */
+}
+
+#endif
+
+
+#if 0
+/* ========================================================
+ �^�X�N�ЂȌ`
+ ======================================================== */
+task_interval tsk_hina(  )
+{
+    switch ( system_status.pwr_state )
+    {
+    case ON_CHECK:
+    case ON_TRIG:
+    case ON:
+    case SLEEP:
+    case OFF_TRIG:
+    default:
+    }
+
+    return;  // �� tic �Ă΂�邱�ƂɂȂ�܂�
+}
+
+
+// �|�C���^�ʼn������炤�̂͊댯�ȋC�����Ă���
+/* ���̂悤�Ɏg��
+      renge_task_immed_add( �^�X�N�֐��ւ̃|�C���^ );
+*/
+task_status_immed tski_hina( u8 * arg )
+{
+    return ( ERR_FINISED );
+    // ERR_FINISED �^�X�N���폜
+    // ERR_CONTINUE ���ɂȂ񂩊��荞�݂Ȃ�A���[�U�[����Ȃ�A�V�X�e���`�b�N��
+    //             �����Ƃ��ɍēx���s
+}
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/task_misc.c b/tags/SDK3.0(2.00)/task_misc.c
new file mode 100644
index 0000000..f2551f1
--- /dev/null
+++ b/tags/SDK3.0(2.00)/task_misc.c
@@ -0,0 +1,346 @@
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+
+#endif
+
+#include "incs.h"
+#include "renge\renge.h"
+#include "pm.h"
+
+#include "accero.h"
+#include "adc.h"
+#include "i2c_mcu.h"
+#include "led.h"
+#include "vreg_twl.h"
+
+
+
+#ifdef _MCU_BSR_
+#define ACKD       ACKD1
+#define ACKE       ACKE1
+#define COI        COI1
+#define IICAEN     IICA1EN
+#define IICRSV     IICRSV1
+#define IICA       IICA1
+#define IICAIF     IICAIF1
+#define IICAMK     IICAMK1
+#define IICAPR0    IICAPR11
+#define IICAPR1    IICAPR01
+#define IICCTL0    IICCTL10
+#define IICE       IICE1
+#define IICF       IICF1
+#define IICS       IICS1
+#define IICWH      IICWH1
+#define IICWL      IICWL1
+#define LREL       LREL1
+#define SPD        SPD1
+#define SPIE       SPIE1
+#define STCEN      STCEN1
+#define STD        STD1
+#define SVA        SVA1
+#define WREL       WREL1
+#define WTIM       WTIM1
+#define TRC        TRC1
+#define SMC        SMC1
+#define DFC        DFC1
+#endif
+
+
+
+// ========================================================
+bit twl_ver_read;
+bit going_to_sleep;
+
+
+void update_LED_3D();
+void check_twl_vol_irq();
+
+
+/* ========================================================
+ �X�e�[�^�X���W�X�^�Ȃ�
+ ======================================================== */
+void tsk_misc(  )
+{
+    /* ========================================================
+       �����x�Z���T���荞�݃s�����I���W�i���}�C�R���ɂ͖����̂�
+       �|�[�����O����B
+       �����v�p
+       BSR�}�C�R����accero.c�Ŋ��荞�݃��[�`������^�X�N�o�^���܂��B
+       ======================================================== */
+    // ���荞�݂̎�肱�ڂ��H
+    if( ACC_VALID )
+    {
+        if( renge_task_immed_add( tski_cbk_accero ) == ERR_SUCCESS ){
+            // dbg_nop();
+        }
+    }
+
+    if( system_status.pwr_state == ON )
+    {
+        /* ========================================================
+            PM�݊����W�X�^�ւ̏�������
+            �|�[�����O�������ĂȂ��B���荞�݁H
+            ======================================================== */
+        if( !PM_IRQ_n )
+		{
+            renge_task_immed_add( tski_ntr_pmic_comm );
+            // dbg_nop();
+        }
+
+        /* ========================================================
+            TWL�����`���[���N���������Ƃ�CTR���m�肽���炵��
+            ======================================================== */
+        if( twl_ver_read )
+        {
+            twl_ver_read = false;
+            set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ );
+        }
+
+		// TWL �̉��ʕω����荞�݃`�F�b�N //
+		check_twl_vol_irq();
+	}
+
+	// 3D �����v�X�V //
+	update_LED_3D();
+}
+
+
+
+/* ========================================================
+    TWL��Vol�������̂ƁA�X���C�_�̑��삪�o�b�e�B���O�����
+    �s�������N���鎖������A�����h��
+        TWL�ł�8�ʏ펞�A�����{�^����8�i�K�������B����ɍ��킹�Ċ��荞�݂���ꂽ��
+    ======================================================== */
+void check_twl_vol_irq()
+{
+	static u8 vol_level_twl_sent;
+    static u8 mabiki;
+
+    if( !is_TWL )
+	{
+		return;
+		// �����܂�
+	}
+
+    if( mabiki != 0 )
+    {
+        mabiki--;
+		return;
+		// �����܂�
+	}
+
+	mabiki = 9;  // 1�t���[���͊J����
+    if( vol_level_twl != vol_level_twl_sent )
+    {
+		vol_level_twl_sent = vol_level_twl;
+        set_irq( VREG_C_IRQ2, REG_BIT_SLIDE_VOL_ACROSS_TWL_BOUNDARY );
+    }
+}
+
+
+
+// 3D_LED /////////////////////////////////////
+void update_LED_3D()
+{
+    if( system_status.pwr_state != ON )
+    {
+        LED_duty_3d = 0;
+		return;
+		// �����܂� //
+    }
+
+    if( vreg_ctr[VREG_C_LED_3D] == LED_3D_ILM_OFF )
+    {
+        if( LED_duty_3d != 0 )
+        {
+            LED_duty_3d --;
+        }
+    }
+    else
+    {
+        if( LED_duty_3d != vreg_ctr[VREG_C_LED_BRIGHT] )
+        {
+            if( LED_duty_3d < vreg_ctr[VREG_C_LED_BRIGHT] )
+            {
+            	LED_duty_3d ++;
+        	}
+        	else
+        	{
+        		LED_duty_3d --;
+        	}
+        }
+    }
+}
+
+
+
+/* ========================================================
+ ����N���^�X�N
+ ======================================================== */
+
+/* ========================================================
+  COMMAND���W�X�^�ւ̏�������
+�@  0�Ȃ�Ă΂�܂���B�P�A�s�v
+ ======================================================== */
+task_status_immed tski_do_command0(  )
+{
+    u8 temp_command;
+
+	// command0 �{�̓d���Ȃ�
+	DI();
+    temp_command = vreg_ctr[VREG_C_COMMAND0];
+    vreg_ctr[VREG_C_COMMAND0] = 0;
+	EI();
+
+    if( temp_command & REG_BIT_GOING_TO_SLEEP )
+    {
+        going_to_sleep = true;
+    }
+
+    if( ( temp_command & ( REG_BIT_OFF_REQ | REG_BIT_RESET1_REQ | REG_BIT_FCRAM_RESET_REQ | REG_BIT_RESET2_REQ )) != 0x00 )
+    {
+        if( temp_command & REG_BIT_OFF_REQ )
+        {
+            system_status.pwr_state = OFF_TRIG;
+        }
+        else
+        {
+            if( temp_command & REG_BIT_RESET1_REQ )
+            {
+                PM_reset_ast(  );
+                RESET2_ast;
+                FCRAM_RST_ast;
+            }
+            if( temp_command & REG_BIT_RESET2_REQ )
+            {
+                RESET2_ast;
+                if( vreg_twl[ REG_TWL_INT_ADRS_MODE ] == 0 )
+                {
+                    FCRAM_RST_ast;         // twl��ntr���[�h�œ��삵�Ă�
+                }
+                // TWL���[�h����DS���[�h�ւ̐؂�ւ����Ƀ��Z�b�g�����
+                // IRQ���ǂ܂�Ȃ��ꍇ������̂�TWL���W�X�^������������
+                vreg_twl_init();
+            }
+            if( temp_command & REG_BIT_FCRAM_RESET_REQ )
+            {
+                FCRAM_RST_ast;
+            }
+            wait_ms( 5 );
+            FCRAM_RST_neg;
+            PM_reset_neg();
+            RESET2_neg;
+
+            // CODEC �s�背�W�X�^������ //
+            codec_reg_init();
+        }
+    }
+/*
+    �X���[�v�v������ɓd��OFF�E���Z�b�g�R�}���h�͗��܂�
+    if( vreg_ctr[VREG_C_COMMAND0] != 0 )
+    {
+        return ( ERR_CONTINUE );
+    }
+*/
+    return ( ERR_FINISED );
+}
+
+
+
+/* ========================================================
+�@�݊������ATWL�A�v���ւ̊��荞��
+ ���z���W�X�^�̏������ݎ��ɍs���܂��B
+ ======================================================== */
+
+u16 _dbg_rcomp;
+extern u8 raw_adc_temperature;
+
+extern u8 iic_burst_state;
+extern bit temp_zone_charge_disable;
+extern bit bt_authorized;
+
+
+/* ========================================================
+�@�f�o�b�O�p�ɂ��낢��ǂ�ł��܂��B
+�@�Ԓl�̓f�[�^���̂���
+ �o�Ă��鏇��́A
+ 1) �v���b�g�t�H�[��
+ 2) PMIC �o�[�W����
+ 3) �d�r���[�J�[
+ 4) �K�X�Q�[�W�o�[�W����
+ 5)        �V
+ 6) ( rcomp & 0xFF )
+ 7) raw_adc_temperature
+ 8) ( !temp_zone_charge_disable | ( bt_authorized << 1 ) )
+ 9) ���m�点LED�̓t���J���[�H
+ 10) system_status.family
+  ======================================================== */
+
+#define KOUMOKU 18
+u8 extinfo_read()
+{
+    u8 infos[ KOUMOKU +1 ];
+
+    if( iic_burst_state > KOUMOKU )
+    {
+        return( 0xFF );
+    }
+
+	// static �łƂ�قǂ̂��̂łȂ��̂Ŗ���X�^�b�N����Ƃ��Ă���
+    //  switch�Ƃ��ɂ����rom������... �Ȃ񂾂��Ȃ��B
+    infos[0] = system_status.captureBox? MODEL_CAPTURE_BOX
+		: ( system_status.is_dev? MODEL_ISBAKO: (u8)system_status.model );
+    infos[1] = pmic_version;
+    infos[2] = battery_manufacturer; 
+    infos[3] = mgic_version[0]; 
+    infos[4] = mgic_version[1]; 
+    infos[5] = (u8)( _dbg_rcomp & 0xFF ); 
+    infos[6] = raw_adc_temperature; 
+    infos[7] = ( !temp_zone_charge_disable | ( bt_authorized << 1 ) ); 
+    infos[8] = 1; // system_status.info_fullcolor; 
+	infos[9] = system_status.family;
+
+	infos[10] = LED_pow_red;
+	infos[11] = LED_duty_pow_blu;
+	infos[12] = LED_duty_3d;
+	infos[13] = LED_duty_notify_red;
+	infos[14] = LED_duty_notify_grn;
+	infos[15] = LED_duty_notify_blu;
+	infos[16] = LED_CAM;
+	infos[17] = LED_duty_WiFi;
+    infos[18] = 0
+//			  | ( PM_EXTDC_n  ? REG_BIT_HAL0_PM_EXTDC_n  : 0 )	// status0�ɂ���
+			  | ( RBR_RESET_n ? REG_BIT_HAL0_PM_EXTDC_n  : 0 )	// ���󂫂��g�킹�Ă��炤
+              | ( BT_IN_CHG_n ? REG_BIT_HAL0_BT_IN_CHG_n : 0 )   
+              | ( BT_CHG_Ena_n ? REG_BIT_HAL0_RSV_5      : 0 )  // �󂫃r�b�g�g�p,out pin
+			  | 0												// WL_TX �g���Ȃ�
+//            | ( SHELL_OPEN  ? REG_BIT_HAL0_SHELL_OPEN  : 0 )  // status0�ɂ���
+              | ( RBR_FLIGHT  ? REG_BIT_HAL0_SHELL_OPEN  : 0 )  // ���󂫂��g�킹�Ă��炤
+              | ( SW_WIFI_n   ? REG_BIT_HAL0_SW_WIFI_n   : 0 )
+              | ( SW_HOME_n   ? REG_BIT_HAL0_SW_HOME_n   : 0 )
+              | ( SW_POW_n    ? REG_BIT_HAL0_SW_POW_n    : 0 );
+
+
+	// ���ڑ����Ƃ��͋C���‚��Ă�!! //
+
+	iic_burst_state ++;
+	return( infos[ iic_burst_state -1 ] );
+}
+
+#ifdef i2c_timeout_test
+void i2c_mcu_error_monitor()
+{
+    LED_duty_pow_blu = 0xff;
+    LED_duty_3d         = 0xff;
+    LED_duty_notify_red = 0xff;
+    LED_duty_notify_grn = 0xff;
+    LED_duty_notify_blu = 0xff;
+    LED_pow_red         = 1;
+    LED_CAM             = 1;
+}
+#endif
+
diff --git a/tags/SDK3.0(2.00)/task_status.c b/tags/SDK3.0(2.00)/task_status.c
new file mode 100644
index 0000000..0d07510
--- /dev/null
+++ b/tags/SDK3.0(2.00)/task_status.c
@@ -0,0 +1,84 @@
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+
+#endif
+
+#include "incs_loader.h"
+#include "renge\renge.h"
+#include "hal.h"
+
+#include "pm.h"
+
+#include "accero.h"
+#include "adc.h"
+#include "i2c_mcu.h"
+#include "led.h"
+
+
+// ========================================================
+#define INTERVAL_TSK_STATUS 4
+
+
+/* ========================================================
+ �X�e�[�^�X���W�X�^�Ȃ�
+ ======================================================== */
+void tsk_status(  )
+{
+    static u8 state_old;        // �X�e�[�^�X�ω����o�����荞�� �̈�
+    u8      diff;
+
+	// �W�J���`�F�b�N
+    set_bit( SHELL_OPEN, vreg_ctr[VREG_C_STATUS], REG_BIT_ST_SHELL_OPEN );
+
+    // �X�e�[�^�X���W�X�^�֌W �� ���荞�� //
+    // pm.c �ŁA���̏�ōs���܂��B
+    // REG_BIT_LCD_ON/OFF
+    // REG_BIT_BL_ON/OFF
+    // REG_BIT_BT_DC_CONNECT/DISC
+
+    diff = (u8)( vreg_ctr[VREG_C_STATUS] ^ state_old );
+    if( diff != 0 )
+    {
+        state_old = vreg_ctr[VREG_C_STATUS];
+
+        if( system_status.pwr_state == ON )
+        {
+            if( diff & REG_BIT_BATT_CHARGE )
+            {
+				// �[�d��ԂɈȉ���
+				if( vreg_ctr[VREG_C_STATUS] & REG_BIT_BATT_CHARGE )
+                {
+                    set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_START );
+                }
+                else
+                {
+                    set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_STOP );
+                }
+			}
+        }
+
+        if(( system_status.pwr_state == ON ) ||
+           ( system_status.pwr_state == SLEEP )
+           )
+        {
+            if( diff & REG_BIT_ST_SHELL_OPEN )
+            {
+                // �W�̊J���‚�
+                if( vreg_ctr[VREG_C_STATUS] & REG_BIT_ST_SHELL_OPEN )
+                {
+                    set_irq( VREG_C_IRQ0, REG_BIT_SHELL_OPEN );
+                }
+                else
+                {
+                    set_irq( VREG_C_IRQ0, REG_BIT_SHELL_CLOSE );
+                }
+            }
+        }
+    }
+    return;
+}
+
diff --git a/tags/SDK3.0(2.00)/task_sys.c b/tags/SDK3.0(2.00)/task_sys.c
new file mode 100644
index 0000000..e970137
--- /dev/null
+++ b/tags/SDK3.0(2.00)/task_sys.c
@@ -0,0 +1,637 @@
+#ifndef _WIN32
+
+#pragma SFR
+#pragma NOP
+#pragma HALT
+#pragma STOP
+
+#endif
+
+#include "incs.h"
+
+#include "i2c_twl.h"
+#include "i2c_ctr.h"
+#include "led.h"
+#include "accero.h"
+#include "pm.h"
+#include "rtc.h"
+#include "sw.h"
+#include "adc.h"
+#include "self_flash.h"
+
+
+//=========================================================
+#define WAIT_SHIROBAKO_POW_CONTROL 240
+
+
+//=========================================================
+extern void nop8();
+
+
+static void chk_emergencyExit();
+static void force_off_check();
+static void send_getup_to_soc();
+
+
+//=========================================================
+extern bit info_led_off;
+extern bit going_to_sleep;
+extern bit bt_authorized;
+
+static u8 timeout_sleep;
+extern u8 chg_led_override;
+
+#ifdef i2c_timeout_test
+extern bit i2c_mcu_time_out_error;
+#endif
+
+
+//=========================================================
+#define PWSW_POWON_TIME		(u8)( 50 / INTERVAL_TSK_SW )	// [ms]
+
+/* ========================================================
+ �}�C�R�������ŕK�v�Ȃ���
+�E�ȓd�͂ɓ����
+  �@system_status.pwr_state == OFF_TRIG �ŁA���̃^�X�N���Ă΂��ƁA
+  �ȓd�̓��[�h�ɓ���܂�
+ ======================================================== */
+void tsk_sys(  )
+{
+    static u8 pwsw_timeout = 0;	// �d���{�^���`���^�����O����B�@�^�C���A�E�g����܂łɓd�������m�肵�Ȃ���off�ɖ߂�
+
+	hal_update();
+
+	switch ( system_status.pwr_state )
+    {
+    case ON_CHECK:                  //-------------------------------------------------------
+		// pwsw���A���̊��荞�݂ŃX���[�v�����������Ɨ��܂��B
+
+        if( system_status.poweron_reason == RSN_PWSW )	// �A�_�v�^�Ȃ��œd���X�C�b�`�������Ƃ��������Ȃ�
+        {
+            // �X�C�b�`�œd��on
+            if( SW_pow_count != 0 )
+            {
+                pwsw_timeout = 0;
+            }
+            else
+            {
+                pwsw_timeout ++;
+            }
+
+            if( pwsw_timeout > 100 )
+            {
+		        SW_pow_count = 0;
+                system_status.pwr_state = OFF_TRIG;     // �X�C�b�`�̓m�C�Y�������B�Q��B
+                renge_task_interval_run_force = true;
+                return;
+            }
+
+            if( SW_pow_count < PWSW_POWON_TIME )
+            {
+                // ���������X�C�b�`�̗l�q������
+                return;
+            }
+        }
+
+        SW_pow_mask = true;
+
+        // �d������ //
+        iic_mcu_start(  );
+
+        bt_force_update = false;
+        BT_chk();            // ���@��o�b�e���̔���A�d�r�c��IC�̐ݒ�
+
+#ifndef _ALLOW_NOBATT_
+        if( system_status.model == MODEL_JIKKI_NOBATT )
+        {
+            renge_task_interval_run_force = true;
+            system_status.pwr_state = OFF_TRIG;
+            return;
+        }
+#endif
+
+        // �c�ʃ`�F�b�N
+        BT_get_left();         // ��ɁABT_chk()�����s����Ă���K�v������܂��B
+        if(
+//            ( vreg_ctr[VREG_C_BT_REMAIN] < 1 )  // �������Ŕ��肷��Ɠd�r���قƂ�ǖ����Ƃ���
+//            &&                                  // �A�_�v�^�����Ă������N���ł��Ȃ��Ȃ����Ⴄ
+            ( vreg_ctr[VREG_C_BT_VOLTAGE] < ( V_TH_ZERO / 256 ) )
+            )
+        {
+            // �d�r�����Ȃ��̂ŋN�������Ȃ�(�d���`�F�b�N������Ă�)
+            renge_task_interval_run_force = true;
+            system_status.pwr_state = OFF_TRIG;
+            return;
+        }
+
+        // �|�[�g�̕����ݒ�@�d�������O�ɁB
+        PM_SW_WIFI_n  = 1;
+        PM_SW_HOME_n_JIKKI = 1;
+        PM_WL_TX      = 1;
+        PM_SW_SEL_n   = 1;
+        PM_ACCEL_INT1 = 1;
+		PM_ACC_VALID  = 1;
+
+        if( PM_sys_pow_on(  ) != ERR_SUCCESS )  // ���Z�b�g���������Ă��܂�
+        {                       // �d���N���s�ƒG���[
+            renge_task_interval_run_force = true;
+            system_status.pwr_state = OFF_TRIG;
+            return;
+        }
+
+        // �����܂ŗ���ƁA�d�������m�� //
+		// �v���A�b�von
+        PU_BT_IN_CHG_n = 1;
+        PU7 = bits8(0,0,0,1, 1,1,0,1);       // 4:SW_WIFI 3:SW_PWSW 2:PM_IRQ 0:PM_EXTDC_n
+        PU_SW_HOME_n_JIKKI = 1;            // SW_HOME
+
+        if( system_status.poweron_reason == RSN_PWSW )
+        {
+            // �d���{�^���ł�on�̎��́ALED��_��������
+            vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO;
+        }
+        else
+        {
+            // �Ƃ肠�����ALED������ԂŋN��������
+            vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_OFF;
+        }
+
+        system_status.pwr_state = ON_TRIG;
+
+        PM_LCD_vcom_set(  );    // LCD�̑Ό��d���l�ȂǏ�������
+
+        break;
+
+    case ON_TRIG:              //-------------------------------------------------------
+#ifdef i2c_timeout_test
+        LED_duty_pow_blu = 0;     // debug
+        LED_duty_3d         = 0;
+        LED_duty_notify_red = 0;
+        LED_duty_notify_grn = 0;
+        LED_duty_notify_blu = 0;
+        LED_pow_red         = 0;
+        LED_CAM             = 0;
+        i2c_mcu_time_out_error = false;
+#endif
+        IIC_ctr_Init(  );
+        IIC_twl_Init(  );
+        RTC_32k_on(  );
+
+        vreg_twl_init(  );
+        vreg_ctr_reset(  );
+
+        KRM  = bits8(0,0,0,0, 0,0,0,0);
+        PIF0 = 0;
+
+        system_status.poweron_reason = NONE;
+        renge_task_interval_run_force = true;
+
+        MK0 = INT_MSK0_RSV;
+        MK1 = INT_MSK1_RSV;
+
+        iic_mcu_start();
+
+//        MK2 = ~( INT_MSK2_IIC_TWL | INT_MSK2_WIFI_TX_BSR | INT_MSK2_CODEC_PMIRQ );
+//        PMK21 = 0;  // wifi  �g��Ȃ�
+        PMK6 = 0;   // pm_irq
+
+		// todo �����I�ɂ͊��S�Ƀ��W�X�^�����
+		RBR_RESET_n = 1;
+		RBR_FLIGHT  = 0;
+
+        // ���u�[�g���A�X�e�[�^�X�����ƂȂ��X�V
+        if( system_status.reboot )
+        {
+            u8 bl_status_temp;
+
+            bl_status_temp = read_pmic( PM_REG_ADRS_BL );
+            vreg_ctr[ VREG_C_STATUS ] |= (( bl_status_temp & 0x03 ) << 5 );
+            set_bit( ( read_pmic( PM_REG_ADRS_VDD_LCD ) != 0 ),
+                    vreg_ctr[ VREG_C_STATUS ], REG_BIT_LCD_POW );
+            BT_chk();
+        }
+
+        LED_init(  );  // reboot���́�BT_Chk,BT_chk��ɍs������
+
+        system_status.reboot = 0;
+        system_status.pwr_state = ON;
+
+        // WDT���Z�b�g���AI2C�̏������܂Ŋ��荞�ݕۗ�
+        //  �ق�Ƃ͂����ɂׂ������������Ȃ���...
+        if( ( vreg_ctr[ VREG_C_MCU_STATUS ] & REG_BIT_STATUS_WDT_RESET ) != 0 )
+        {
+            set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET );
+        }
+
+        break;
+
+    case ON:                   //---------------------------------------------
+        // PMIC�ɂ�鋭���d���f�`�F�b�N
+        // �f�o�b�K��reset1���A�T�[�g���邱�Ƃ�����B���̂Ƃ��͑S�����Z�b�g
+        chk_emergencyExit();
+
+        // SLP��
+        if( going_to_sleep )          // ��΂� SLP_REQ �̑O�ɗ\��������
+        {
+            timeout_sleep ++;
+            if( timeout_sleep == 0 ||  // �I�[�o�[�t���[�����ҁBsleep������Č��������Lj�u�ŋN���ċC���‚��Ȃ�����
+                ( PIF0 && !SLP_REQ ))  // slp���荞�݂��������C���������A�����N���Ă��܂���
+            {
+                PIF0 = 0;
+                send_getup_to_soc();
+            }
+            if( PIF0 && SLP_REQ ){
+                PIF0 = 0;
+                PM_VDD_ecoMode();
+                system_status.pwr_state = SLEEP;
+                renge_task_interval_run_force = true;
+            }
+        }
+
+        // ����off�J�E���g
+        force_off_check();
+
+#ifndef _TAIKENDAI_SEISAN_SPECIAL_
+        if( system_status.taikendai )		// �A�_�v�^���������玩���œd��off
+        {
+            if( PM_EXTDC_n )
+            {
+                system_status.pwr_state = OFF_TRIG;
+            }
+        }
+#endif
+
+        break;
+
+    case SLEEP:                //------------------------------------------
+        chk_emergencyExit();
+        // �X���[�v���畜�A
+        if( !SLP_REQ ){
+            PM_VDD_normMode();
+            wait_ms( 5 );  // tdly_sw
+            send_getup_to_soc();
+            system_status.pwr_state = ON;
+        }
+
+        force_off_check();
+
+#ifndef _TAIKENDAI_SEISAN_SPECIAL_
+        if( system_status.taikendai )		// �A�_�v�^���h�����Ă����玩���œd��on
+        {
+            if( PM_EXTDC_n )
+            {
+                system_status.pwr_state = OFF_TRIG;
+            }
+        }
+        break;
+#endif
+
+    default:                   //---------------------------------------
+        system_status.pwr_state = OFF_TRIG;  // ���蓾�Ȃ��X�e�[�g�B�f�o�b�O�p
+		/* FALLTHROUGH */
+
+	case OFF_TRIG:             //---------------------------------------
+        // LED������҂�
+        vreg_ctr[ VREG_C_LED_POW ] = LED_POW_ILM_OFF;
+        vreg_ctr[ VREG_C_LED_WIFI ] = WIFI_LED_OFF;
+        vreg_ctr[ VREG_C_LED_3D ] = LED_3D_ILM_OFF;
+        info_led_off = true;
+        if( LED_duty_pow_blu != 0 )
+        {
+            return;
+        }
+
+		clear_pow_off_countdown();
+
+        vreg_ctr[ VREG_C_ACC_CONFIG ] = 0x00;
+        tski_acc_hosu_set();
+
+        LED_stop(  );
+        IIC_ctr_Stop(  );
+        IIC_twl_Stop(  );
+        RTC_32k_off();
+
+		// todo �}�N���ɂł������
+		RBR_RESET_n = 0;
+		RBR_FLIGHT  = 0;
+
+		vreg_ctr[VREG_C_IRQ0] = 0;
+        vreg_ctr[VREG_C_IRQ1] = 0;
+        vreg_ctr[VREG_C_IRQ2] = 0;
+        vreg_ctr[VREG_C_IRQ3] = 0;
+
+//  �d���I�������̊��荞�݃Z�b�g
+// PWSW        KR3   ������L
+// BG24        KR4
+// �ӂ��J��    INTP5 �‚����L
+// AC�A�_�v�^  INTP4 �A�_�v�^�����L
+// RTC
+        while( iic_mcu_busy )
+        {;}
+
+        KRM = ( KR_SW_POW );    // Mask �ł͂Ȃ��AMode�Ȃ̂��������B����킵��
+        MK0 = ~( INT_MSK0_EXTDC );
+        MK1 = ~( INT_MSK1_KR | INT_MSK1_RTCINTVAL );  // INT_MSK1_RTCALARM | RTC�A���[������
+        MK2L = 0xFF;
+
+        // PU5 ���̂܂�
+        PU7 = bits8(0,0,0,0, 1,0,0,1);   // PWSWI,PM_EXTTDC,( IRQ0_deactive(), PM_IRQ_deactive )
+        PU_SW_HOME_n_JIKKI = 0;          // SW_HOME ��~
+
+        IF0 = 0;
+        IF1 = 0;
+        IF2 = 0;
+
+        IRQ0_disable;
+
+        PM_sys_pow_off(  );
+
+		// �|�[�g�ނ��~���[�h�ɁB����������H�ł��AL�o�͂ɂ��Ȃ��Ⴞ�߂������ȁB
+        SW_WIFI_n_RAW = 0;
+        PM_SW_WIFI_n = 0;
+
+        SW_HOME_n_JIKKI_RAW = 0;
+        PM_SW_HOME_n_JIKKI = 0;
+
+        WL_TX = 0;
+        PM_WL_TX = 0;
+
+        SW_SEL_n = 0;
+        PM_SW_SEL_n = 0;
+
+		ACCEL_INT1 = 0;
+        PM_ACCEL_INT1 = 0;
+        ACC_VALID = 0;
+        PM_ACC_VALID = 0;
+
+        system_status.pwr_state = OFF;
+        SW_pow_mask = true;
+        SW_pow_count = 0;
+
+		// HAL�f�o�b�O���Z�b�g�@�Y���Ɠd��on�o���Ȃ��Ȃ邱�Ƃ��c
+		vreg_ctr[ VREG_C_HAL_OVW_CONT0 ] = 0;
+		vreg_ctr[ VREG_C_HAL_OVW_CONT1 ] = 0;
+		vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ] = 0xFF;
+		vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ] = 0xFF;
+		vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ] = 0xFF;
+		/* FALLTHROUGH */
+
+    case OFF:
+        system_status.poweron_reason = NONE;
+		pwsw_timeout = 0;
+
+		if( !PM_EXTDC_n )
+        {
+            // �A�_�v�^�L�� ///////////////////////////////
+            BT_chk(); // �v�|�[�����O�i�d�r�����ꌟ�o�̂��߁j
+                         // ���̒��ŕK�v��������I2C_m_init�Ă�ł܂�
+
+            // �A�_�v�^�L��F�[�d���x��
+            if( SW_pow_count > PWSW_POWON_TIME ) // �d���X�C�b�`���������̂�҂�
+            {
+                // �d������
+                system_status.pwr_state = ON_CHECK;  // �����ɉ������ԃ`�F�b�N�͍��i���ēd�������ɓ���
+            }
+
+            if( system_status.model != MODEL_JIKKI )
+            {
+                iic_mcu_stop(  );
+            }
+
+            if( system_status.taikendai )
+            {
+                vreg_ctr[ VREG_C_HAL_OVW_CONT0 ] = vreg_ctr[ VREG_C_HAL_OVW_CONT1 ] = 0;
+                // �d������
+                wait_ms(46);    // pmic�̓d���ē����d�l�̂���
+                system_status.poweron_reason = RSN_PWSW;
+                system_status.pwr_state = ON_CHECK;
+            }
+        }
+        else
+        {
+            // �A�_�v�^�Ȃ� ///////////////////////////////
+            u8 irq_mask_original_1;		// RTC�A���[���ŋN�����Ȃ��悤�ɁB�@����A���̊��荞�݂ł͋N���Ȃ�
+
+            if( chg_led_override != 0 )  // ���ꂪ�[���ɂȂ�܂ő҂� todo
+            {
+                return;
+            };
+
+            // �ȓd�͂ֈڍs
+            iic_mcu_stop(  );
+            pm_chk_adapter();
+            PM_Chg_Stop();
+            bt_force_update = true;
+
+            while( RWST )
+            {;}
+
+            // ���荞�ݑ҂��ŐQ�� //
+            RTCIMK = 1;		// systick�p�C���^�[�o���^�C�}�[���荞�݃}�X�N
+
+            CKC = bits8(0,0,0,0, 1,0,0,1);
+            OSMC = 0x00;
+#ifdef _DBG_CHK_OFF_LEAK_
+			{
+                // off����pin�ݒ�~�X�`�F�b�N
+				volatile u8 ports_i[12];
+				volatile u8 ports_o[12];
+
+				ports_i[0]  = ( PM0  & PU0  & ~P0  );	// �v���A�b�v�؂�Y��H
+				ports_i[1]  = ( PM1  & PU1  & ~P1  );
+				ports_i[2]  = 0;
+				ports_i[3]  = ( PM3  & PU3  & ~P3  );
+				ports_i[4]  = ( PM4  & PU4  & ~P4  );
+				ports_i[5]  = ( PM5  & PU5  & ~P5  );
+				ports_i[6]  = 0;
+				ports_i[7]  = ( PM7  & PU7  & ~P7  );
+				ports_i[8]  = ( PM12 & PU12 & ~P12 );
+				ports_i[9]  = ( PM14 & PU14 & ~P14 );
+				ports_i[10] = 0;
+				ports_i[11] = ( PM20 & PU20 & ~P20 );
+
+				ports_o[0]  = ( ~PM0  & P0  );			// H �o�͂�������Ă邩��
+				ports_o[1]  = ( ~PM1  & P1  );
+				ports_o[2]  = ( ~PM2  & P2  );
+				ports_o[3]  = ( ~PM3  & P3  & ~POM3 );
+				ports_o[4]  = ( ~PM4  & P4  ); // bit3��chg_en�Ȃ̂�1�ł��悢
+				ports_o[5]  = ( ~PM5  & P5  );
+				ports_o[6]  = ( ~PM6  & P6  );
+				ports_o[7]  = ( ~PM7  & P7  );
+				ports_o[8]  = ( ~PM12 & P12 );
+				ports_o[9]  = ( ~PM14 & P14 );
+				ports_o[10] = ( ~PM15 & P15 );
+				ports_o[11] = ( ~PM20 & P20 );
+				NOP();          // ���u���[�N�u������
+			}
+
+#endif
+			if( PM_EXTDC_n )  // ����ǂ��^�C�~���O�ő}�����N���邱�Ƃ�����
+			{
+				STOP();
+			}
+
+			// �N���� //
+            // �N���������
+            // �EKeyReturn���荞�݁i�d���{�^���j
+            // �ERTC�A���[���i���ݕ���j
+
+			renge_flg_interval = 0;
+			hal_update();
+
+			OSMC = 0x01;
+            CKC = bits8(0,0,0,0, 1,0,0,0);
+
+			// �N�������R�́H
+			if( !PM_EXTDC_n ){
+	            system_status.pwr_state = OFF;	// OFF������ď[�d�Ď�
+			}
+/*			// RTC�A���[���B����
+			else if( vreg_ctr[ VREG_C_IRQ1 ] & REG_BIT_RTC_ALARM )
+			{
+		        system_status.poweron_reason = RSN_RTC_ALARM;
+	            system_status.pwr_state = ON_CHECK;
+			}
+			// else if( ���̊��荞�݂œd��on ){
+			//		����ȊO�̋��Š��荞�݂ŋN���Ȃ��񂾂��ǁA������ł����
+			// }
+*/
+			else // if( !SW_POW_n )	// �i����ȊO�Ȃ�j�d���{�^���ŋN����
+            {
+                SW_pow_mask = false;
+		        system_status.poweron_reason = RSN_PWSW;
+	            system_status.pwr_state = ON_CHECK;
+            }
+
+            RTCIMK = 0;
+            if( system_status.taikendai )
+            {
+                system_status.pwr_state = OFF_TRIG;
+            }
+
+        }
+        return;
+
+#if 0
+    default:
+        NOP(  );    // ���蓾�Ȃ��X�e�[�g
+#endif
+
+    }
+}
+
+
+
+/*******************************************************//**
+    PMIC���d���ُ�Ŏ~�߂����m�F
+ **********************************************************/
+static void chk_emergencyExit(){
+    static u8 shirobako_power_control_count;
+
+    if( shirobako_power_control_count == 0 )
+    {
+        if( !RESET1_n )         // PM_chk_LDSW() ��I2C_m���g�p���A���R�X�g
+        {
+            if( PM_chk_LDSW(  ) == 0 )
+            {
+                // ���Z�b�g����������
+                /// PMIC���ُ�I�����f������
+                system_status.pwr_state = OFF_TRIG;
+                renge_task_interval_run_force = true;
+            }
+            else
+            {
+                // �����̎d��
+                shirobako_power_control_count = 1;
+            }
+        }
+    }
+    else
+    {
+        if( shirobako_power_control_count == WAIT_SHIROBAKO_POW_CONTROL ) // �}�W�b�N�i���o�[
+        // �f�o�b�K�����������Breset1����������܂ł͖���
+        {
+            if( RESET1_n )      // ���Z�b�g�l�Q�[�g�҂�
+            {
+                shirobako_power_control_count = 0;
+            }
+            else
+            {
+                // nothing to do
+            }
+        }
+        else if( shirobako_power_control_count == 200 ) // * (sys_tick)[ms]
+        // �f�o�b�K�������������炵��
+        {
+#ifndef _RVD_
+            // �����͓d����؂肽���炵��
+            system_status.pwr_state = OFF_TRIG;
+            renge_task_interval_run_force = true;
+            shirobako_power_control_count = WAIT_SHIROBAKO_POW_CONTROL;
+#endif
+        }
+        else
+        {
+            if( !RESET1_n )
+            {
+                if( shirobako_power_control_count != 255 )
+                    shirobako_power_control_count ++;
+            }
+            else
+            {
+                // (TS�{�[�h�Ŏ蓮��/�f�o�b�K��)���Z�b�g���������炵��
+                send_cmd_pmic(  PM_REG_ADRS_BL, 0 );
+                vreg_ctr[VREG_C_STATUS] = ( vreg_ctr[VREG_C_STATUS] & bits8(1,0,0,1, 1,1,1,1) );
+                vreg_ctr[VREG_C_COMMAND0] |= REG_BIT_RESET1_REQ;
+                renge_task_immed_add( tski_do_command0 );
+                shirobako_power_control_count = WAIT_SHIROBAKO_POW_CONTROL;
+            }
+        }
+    }
+}
+
+
+
+/* ========================================================
+  �E�d���{�^��������
+  �E�d�r�؂�
+  �E�d�r����
+  �ł̋���OFF�B��������Ɖ����s�\
+ ======================================================== */
+static void force_off_check()
+{
+    if( force_off )
+    {
+        system_status.pwr_state = OFF_TRIG;
+        renge_task_interval_run_force = true;
+    }
+}
+
+
+
+/* ========================================================
+  SoC���N����
+�@�@�d�����ʏ�ɖ߂��Ă���Ă�ʼn������B
+ ======================================================== */
+void send_getup_to_soc()
+{
+    going_to_sleep = false;
+    timeout_sleep  = 0;
+#ifdef _MODEL_CTR_
+    SLP_ACK = 1;
+    nop8();
+    SLP_ACK = 0;
+#endif
+}
+
+
+
+
+/* ========================================================
+  firm_update()�� task_status_immed�^ ��Ԃ��悤�ɂ���΂����̂ł���...
+ ======================================================== */
+task_status_immed tski_firm_update(){
+    firm_update();
+    return( ERR_SUCCESS );
+}
+
diff --git a/tags/SDK3.0(2.00)/user_define.h b/tags/SDK3.0(2.00)/user_define.h
new file mode 100644
index 0000000..8f11573
--- /dev/null
+++ b/tags/SDK3.0(2.00)/user_define.h
@@ -0,0 +1,214 @@
+#ifndef _USER_DEF_
+#define _USER_DEF_
+
+
+#define IIC_T_SLAVEADDRESS	0x4A
+#define IIC_C_SLAVEADDRESS	0x4A
+#define IIC_C_SLAVEADDRESS_DMY	0x4C
+
+//#define IIC_SLA_DCP     0x50
+
+#define bits8(a,b,c,d,e,f,g,h) ( a<<7 | b<<6 | c<<5 | d<<4 | e<<3 | f<<2 | g<<1 | h )
+
+#ifndef _WIN32
+// ���@�‹�
+
+#ifdef _debug_led_
+/*spfl�Ή��ȍ~�Anc�łȂ��Ȃ�̂Ŏg���܂���
+# define DBG_LED_on      { PM2.1 = 0; P2.1 = 1; }
+# define DBG_LED_off     { P2.1 = 0; }
+# define DBG_LED_toggle  ( P2.1 ^= 1 )
+# define DBG_LED2_on      { PM2.2 = 0; P2.2 = 1; }
+# define DBG_LED2_off     { P2.2 = 0; }
+# define DBG_LED2_toggle  ( P2.2 ^= 1 )
+*/
+#else
+# define DBG_LED_on      ;
+# define DBG_LED_off     ;
+# define DBG_LED_toggle  ;
+# define DBG_LED2_on      ;
+# define DBG_LED2_off     ;
+# define DBG_LED2_toggle  ;
+#endif
+
+#define IIC_SLA_CODEC   0xA4
+#define IIC_SLA_ACCEL   0x30           // ST LIS331DLH
+
+
+#define SLP_ACK         P7.7
+
+
+// PMx��0�ŏo�̓��[�h
+
+// SoC
+#define IRQ0_ast            { P7.6 = 0; PM7.6 = 0; }
+#define IRQ0_neg            { P7.6 = 1; }
+#define IRQ0_enable         { PM7.6 = 0; }
+#define IRQ0_disable        { PM7.6 = 1; }
+#define IRQ0              ( P7.6 )
+
+
+// �������h�~
+#define RESET1_n             ( P0.0 )
+
+#if 0 // PM_RESET1�`���g��
+#define RESET1_ast           { P0.0 = 0; PM0.0 = 0; }
+#define RESET1_neg           { PM0.0 = 1; }
+#endif
+
+#define RESET2_ast           { P0.1 = 0; PM0.1 = 0; }
+#define RESET2_neg           { PM0.1 = 1; }
+
+#define SLP_REQ              P12.0
+
+// CTR,SPFL,�܂����ʔh���@����
+#define DEV_DET              ( P12 & 0x00000110 )
+#define DEV_CTR              ( 0b00 << 1 )
+#define DEV_SPFL             ( 0b01 << 1 )
+#define DEV_SHRIMP           ( 0b10 << 1 )
+#define DEV_RSV2             ( 0b11 << 1 )
+
+// FCRAM
+#define FCRAM_RST            P3.0
+#define FCRAM_RST_ast        { P3.0 = 0; }
+#define FCRAM_RST_neg        { P3.0 = 1; }
+
+// CODEC
+#define PM_IRQ_n             P7.2
+// INTP6
+
+// PM
+#define PM_EXTDC_n_RAW       P7.0
+// INTP7
+//#define BT_TEMP              P15.0
+// ANI8
+//#define BT_DET               P15.1
+// ANI9
+#define BT_DET_P             P1.6
+#define BT_TEMP_P            P1.7
+
+
+// SPFL�̃A�����t�@�XLCD�ŕK�v�ȁ}15V�̓d���B
+#define SPFL_LCD_AMOL_HV_CONT P20.2
+
+
+// �[�d����(out)
+// ���_���ł��B���ӁB
+#define BT_CHG_ENABLE()      ( P4.3 = 0 )
+#define BT_CHG_DISABLE()     ( P4.3 = 1 )
+#define BT_CHG_Ena_n         ( P4.3 )
+
+// �[�d��(in)
+#define BT_IN_CHG_n_RAW       P5.1
+#define PM_BT_IN_CHG_n       PM5.1
+#define PU_BT_IN_CHG_n       PU5.1
+
+#define SW_WIFI_n_RAW         P7.4
+#define PM_SW_WIFI_n         PM7.4
+// KR4
+#define SW_POW_n_RAW          P7.3
+// KR3
+#define SW_SEL_n              P2.3
+#define PM_SW_SEL_n          PM2.3
+//#define VOL                  P2.7
+// ANI7
+
+#define SW_HOME_n_JIKKI_RAW   P20.4
+#define PM_SW_HOME_n_JIKKI   PM20.4
+#define PU_SW_HOME_n_JIKKI   PU20.4
+
+// INTP22
+#define SW_HOME_n_TSBOARD_RAW P2.0	// TS�}�U�[���pull up(P2�͓���p.u.����)
+#define PM_SW_HOME_n_TSBOARD PM2.0
+
+// WiFi
+#define WL_TX                P20.3      // INTP21
+#define PM_WL_TX             PM20.3      // INTP21
+
+// RBR����
+#define RBR_RESET_n          P2.1
+#define RBR_FLIGHT           P2.2
+
+//#define LED_CAM            P1.0      // TO02
+//#define LED_WIFI           P1.1      // TO03
+//#define LED_NOTIFY         P1.3      // TO05
+//#define LED_3D           P5.2      // SLTO �� TO01
+//#define LED_POW2           P1.4      // TO06 ( �� )
+//#define LED_POW1           P1.5      // TO07 ( �� )
+//#define LED_CHARGE         P2.4
+
+// P5.3 �ɉ����AP5.5, P140 P141
+// P140���o�͐�p�Ȃ̂�...
+#define I2C_PU_on()          { P14 |= 0x03; PM5.3 = 0; PM3.3 = 0; }
+#define I2C_PU_off()         { PM5.3 = 1; PM3.3 = 1; P14 &= ~0x03; }
+
+#define GYRO_ENABLE()     P5.0 = 0
+#define GYRO_DISABLE()    P5.0 = 1
+
+//#define I2C_M_SDA            P3.1      // SDA10
+//#define I2C_M_SCL            P3.2      // SCL10
+
+//#define I2C_0_SCL            P6.0        // IIC_TWL SCL0
+//#define I2C_0_SDA            P6.1        //         SDA0
+
+//#define I2C_1_SCL            P20.0       // IIC CTR SCL1
+//#define I2C_1_SDA            P20.1       //         SDA1
+
+//#define 32kHz_O              P1.2        // RTCCL
+//#define 32k_I1               P12.3       // XT1
+//#define 32k_I2               P12.4       // XT2
+
+// ���@�A�J���@�A���V�䔻�ʁB
+#define DIPSW                ( P4 & 0b00000011 )  // mini cube & �\�t�g�E�F�A�f�B�b�v�X�C�b�` TOOL0,1�B P4.0�� L ���ӁI
+#define DIPSW_CTR            0b11  // ���g�p
+#define DIPSW_ISDEV          0b00  // KuC��BattGauge�Ŕ���
+#define DIPSW_TAIKENDAI      0b10
+#define DIPSW_TAIKENDAI_NBD  0b01
+
+
+#define SHELL_OPEN_RAW        P7.1       // INTP5 �ӂ��J�� (�‚����L)
+
+#define ACC_VALID             P20.5
+#define PM_ACC_VALID         PM20.5
+#define ACCEL_INT1            P2.5
+#define PM_ACCEL_INT1        PM2.5
+
+
+#define KR_SW_POW            ( 1 << 3 )
+#define KR_SW_WIFI           ( 1 << 4 )
+
+
+///////////////////////////////////////////////////////////
+
+#define INT_MSK0_IIC_M_DMA    0b0001000000000000
+#define INT_MSK0_SHELL        0b0000000010000000
+#define INT_MSK0_EXTDC        0b0000000001000000
+//#define INT_MSK0_SLP          0b0000000000000100 )
+//#define INT_MSK0_RSV          0b1110111100111011 )
+#define INT_MSK0_RSV          0b1110111100111111
+
+#define INT_MSK1_KR           0b0000100000000000
+#define INT_MSK1_RTCINTVAL    0b0000010000000000
+#define INT_MSK1_RTCALARM     0b0000001000000000
+#define INT_MSK1_ADC          0b0000000100000000
+#define INT_MSK1_IIC_CTR      0b0000000000001000
+#define INT_MSK1_IIC_MCU      0b0000000000000001
+#define INT_MSK1_RSV          0b1111000011110110
+
+#define INT_MSK2_WIFI_TX_KE3  0b00010000
+#define INT_MSK2L_RSV         0b11101111
+
+#define INT_MSK2_IIC_TWL      ( 0b0000000100000000 )
+#define INT_MSK2_WIFI_TX_BSR  ( 0b0000010000000000 )
+#define INT_MSK2_CODEC_PMIRQ  ( 0b0000000000001000 )
+#define INT_MSK2_RSV          0b1111101111110111
+
+#endif
+
+
+
+#else
+// win32�V�~�����[�V�����‹�
+
+
+#endif
diff --git a/tags/SDK3.0(2.00)/voltable.h b/tags/SDK3.0(2.00)/voltable.h
new file mode 100644
index 0000000..6ff34ab
--- /dev/null
+++ b/tags/SDK3.0(2.00)/voltable.h
@@ -0,0 +1,57 @@
+#ifdef _10db_
+// max -10db
+/*
+const u8 slider_to_codec[64] =
+{
+    127, 127, 127, 127, 126, 125, 123, 122,
+    121, 120, 118, 117, 116, 115, 113, 112,
+    111, 110, 108, 107, 106, 105, 103, 102,
+    101, 100,  98,  97,  96,  95,  93,  92,
+     91,  90,  88,  87,  86,  85,  83,  82,
+     81,  80,  78,  77,  76,  75,  73,  72,
+     72,  71,  70,  68,  67,  66,  64,  63,
+     62,  61,  59,  58,  57,  56,  55,  55
+     };
+*/
+const u8 slider_to_codec[64] =
+{
+    127, 126, 125, 124, 122, 121, 120, 119,
+    118, 117, 116, 114, 113, 112, 111, 110,
+    109, 108, 106, 105, 104, 103, 102, 101,
+    100, 98, 97, 96, 95, 94, 93, 92,
+    90, 89, 88, 87, 86, 85, 83, 82,
+    81, 80, 79, 78, 77, 75, 74, 73,
+    73, 72, 71, 70, 69, 67, 66, 65,
+    64, 63, 62, 61, 59, 58, 57, 56
+    };
+#endif
+
+#ifdef _15db_
+// max -15db
+const u8 slider_to_codec[64] =
+{
+    127,	127,	127,	127,	127,	126,	125,	123,
+    122,	121,	120,	119,	118,	117,	116,	115,
+    114,	113,	112,	110,	109,	108,	107,	106,
+    105,	104,	103,	102,	101,	100,	99,	97,
+     96,	95,	94,	93,	92,	91,	90,	89,
+     88,	87,	86,	85,	84,	83,	82,	81,
+     80,	79,	78,	77,	76,	75,	74,	73,
+     71,	70,	69,	68,	67,	66,	66,	66
+};
+#endif
+
+#ifdef _4db_
+// max -4db
+const u8 slider_to_codec[64] =
+{
+    127,	127,	126,	125,	123,	122,	121,	119,
+    118,	117,	115,	114,	112,	111,	110,	108,
+    107,	106,	104,	103,	101,	100,	99,	97,
+     96,	94,	93,	92,	90,	89,	88,	86,
+     85,	83,	82,	81,	79,	78,	77,	75,
+     74,	72,	71,	70,	68,	67,	66,	64,
+     64,	63,	61,	60,	59,	57,	56,	54,
+     53,	52,	50,	49,	48,	46,	44,	44
+};
+#endif
diff --git a/tags/SDK3.0(2.00)/vreg_ctr.c b/tags/SDK3.0(2.00)/vreg_ctr.c
new file mode 100644
index 0000000..073ca5d
--- /dev/null
+++ b/tags/SDK3.0(2.00)/vreg_ctr.c
@@ -0,0 +1,570 @@
+/* ========================================================
+
+CTR MCU I2C���W�X�^
+
+  ====================================================== */
+#include "incs.h"
+#include "vreg_ctr.h"
+#include "rtc.h"
+#include "led.h"
+#include "accero.h"
+#include "pm.h"
+#include "pool.h"
+
+#include <fsl.h>
+
+#include "fsl_user.h"
+
+
+extern u8 extinfo_read();   // task_misc.c
+
+extern u8 iic_burst_state;  // ����o�[�X�g�A�N�Z�X���鎞�̃J�E���^
+extern bit info_led_pattern_updated;  // ���m�点LED�̃p�^�[����擪�ɖ߂�
+
+extern bit pedolog_overflow;
+
+
+
+// ********************************************************
+#ifdef _DBG_PEDO_AUTO_ENABLE_
+u8      vreg_ctr[VREG_C_ENDMARK_ + 16];
+#else
+u8      vreg_ctr[VREG_C_ENDMARK_];
+#endif
+
+static u8      vreg_free_adrs;         // �A�h���X���ł�̂ł��΂炭�͂����
+bit     irq_readed;  // AAA�^�̂��߁B
+
+
+
+// ********************************************************
+extern task_status_immed tski_firm_update();
+extern task_status_immed tski_mcu_reset();
+
+
+
+// ********************************************************
+#ifdef _MCU_BSR_
+#define IICAMK     IICAMK1
+#endif
+
+
+// ********************************************************
+// ��[���̏����l�̎w�肪�K�v�ȃA�h���X
+// �}�C�R�����Z�b�g���ɌĂ΂�܂�
+void vreg_ctr_init(  )
+{
+    vreg_ctr[ VREG_C_VCOM_T ] = VCOM_DEFAULT_T;
+    vreg_ctr[ VREG_C_VCOM_B ] = VCOM_DEFAULT_B;
+
+    vreg_ctr[ VREG_C_OFF_DELAY ] = FORCEOFF_THREASHOLD;
+
+    vreg_ctr[ VREG_C_VOL_CAL_MIN ] = 0x36;
+    vreg_ctr[ VREG_C_VOL_CAL_MAX ] = 0xFF - 0x36;
+
+	vreg_ctr[ VREG_C_RBR_CONTROL ] = REG_BIT_RESET_n; // todo | REG_BIT_FLIGHT;
+}
+
+
+// ********************************************************
+// �{�̂̓d���������ɃZ�b�g����܂�
+void vreg_ctr_reset(  )
+{
+    vreg_ctr[ VREG_C_MCU_VER_MAJOR ] = MCU_VER_MAJOR | 0x10;
+    vreg_ctr[ VREG_C_MCU_VER_MINOR ] = MCU_VER_MINOR;
+
+    vreg_ctr[ VREG_C_LED_BRIGHT ] = 0xFF;
+    vreg_ctr[ VREG_C_LED_POW ] = 0;
+    vreg_ctr[ VREG_C_LED_WIFI ] = 0;
+    vreg_ctr[ VREG_C_LED_CAM ] = 0;
+    vreg_ctr[ VREG_C_LED_3D ] = 0;
+//    vreg_ctr[ VREG_C_VOL_CAL_MIN ] = 0x36;            �����ŏ�������_���I
+//    vreg_ctr[ VREG_C_VOL_CAL_MAX ] = 0xFF - 0x36;     �d������邽�тɃf�t�H���g�l�ɂȂ��Ă��܂�
+    {
+        u8 i;
+        for( i = 0; i < sizeof( uni_info_LED ); i++ )
+        {
+            info_LED.bindata[ i ] = 0;
+        }
+    }
+}
+
+
+
+// ********************************************************
+// I2C���z���W�X�^�ɏ����܂��B
+//�@���� adrs �͓����A�h���X
+//  �@�����Ȃ��A�h���X�ɃA�N�Z�X�����ꍇ�A�������܂���B
+// ���������񂾌��ʁAI2C_mcu�ʐM����������ꍇ�Arenge_task_immed_add()
+//  ���g�p���Ȃ��ƁAI2C_mcu�g�p���ŃG���[�I�������ꍇ�Ƀ��g���C���܂���B
+void vreg_ctr_write( u8 adrs, u8 data )
+{
+    switch ( adrs )
+    {
+
+    case ( VREG_C_MCU_STATUS ):
+//        vreg_twl[ REG_TWL_INT_ADRS_MODE ] = (u8)( ( data >> 6 ) & 0x03 ); R�ł悢�B���̑��胊�Z�b�g�ŃN���A
+        vreg_ctr[ VREG_C_MCU_STATUS ] &= data;  // bit�N���A�͂��邪�Z�b�g�͂��Ȃ��B
+												// ��̕���twl���W�X�^�~���[�͓ǂݏo���ꎞ�ɍ���
+        break;
+
+    case ( VREG_C_VCOM_T ):
+    case ( VREG_C_VCOM_B ):
+        renge_task_immed_add( tski_vcom_set );
+        vreg_ctr[adrs] = data;
+        break;
+
+    case ( VREG_C_DBG03 ):
+        if( ( vreg_ctr[VREG_C_DBG01] == 'j' )
+            && ( vreg_ctr[VREG_C_DBG02] == 'h' )
+            && ( data == 'l' ) )
+        {
+            renge_task_immed_add( tski_firm_update );
+            IICAMK = 1;
+        }
+        vreg_ctr[ VREG_C_DBG03 ] = data;
+        break;
+
+    case ( VREG_C_COMMAND0 ):
+        if( data != 0 )
+        {
+            renge_task_immed_add( tski_do_command0 );
+	        vreg_ctr[ VREG_C_COMMAND0 ] |= data;
+        }
+        break;
+
+    case ( VREG_C_COMMAND2 ):
+        // �����炩��̊������荞�݂�҂��Ă���Ȃ������ł��B #-��-) ���̂��߂̊��荞�݂�
+        // �t���d��
+        if(( data & REG_BIT_CMD_LCD_ON ) != 0 )
+        {
+            renge_task_immed_add( tski_PM_LCD_on );
+        }
+        else if(( data & REG_BIT_CMD_LCD_OFF ) != 0 )
+        {
+            renge_task_immed_add( tski_PM_LCD_off );
+        }
+
+        // �o�b�N���C�g�ݒ�
+        /// ���̂Ƃ��낳��ɍׂ����͕����Ȃ����ǁc
+        if(( data & REG_BITS_CMD_BL ) != 0 )
+        {
+            renge_task_immed_add( tski_PM_BL_set );
+            vreg_ctr[adrs] = (u8)( data & REG_BITS_CMD_BL );
+        }
+        break;
+
+    case ( VREG_C_COMMAND1 ):
+        if( data != 0 )
+        {
+            // u8 temp; ���ԕϐ��g������΂��ł����Ȃ���...
+            // TWL�Ɋ��荞�݂�����
+            /// ���ۂɊ��荞�݂�����̂�SoC
+            /// �r�b�g�̕��т��Ⴄ����ʓ|
+            vreg_twl[ REG_TWL_INT_ADRS_IRQ ]  = ( ( data & REG_BIT_SEND_TWL_PWSW_DET )   != 0 ) ? REG_BIT_TWL_IRQ_PWSW_DET : 0x00;  //pwsw_det
+            vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_RESET_DET )  != 0 ) ? REG_BIT_TWL_IRQ_RESET : 0x00;     //reset_req
+
+            vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_OFF_DET )    != 0 ) ? REG_BIT_TWL_IRQ_OFF : 0x00;       //off_req
+
+            vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_BATT_LOW )   != 0 ) ? REG_BIT_TWL_IRQ_BT_LOW : 0x00;    //batt_low
+            vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_BATT_EMPTY ) != 0 ) ? REG_BIT_TWL_IRQ_BT_EMPTY : 0x00;  //batt_empty
+
+            if(( data & REG_BIT_SEND_TWL_VOL_CLICK ) != 0 )
+            {
+                vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= REG_BIT_TWL_IRQ_VOL_CHANGE; //vol_changed
+            }
+        }
+        break;
+
+    case ( VREG_C_LED_POW ):
+        if( iic_burst_state == 0 )
+        {
+            vreg_ctr[ VREG_C_LED_POW ] = data;
+            iic_burst_state ++;
+        }
+        else if( iic_burst_state < 5 )
+        {
+            led_red_batt_empty.dats[ iic_burst_state -1 ] = data;
+            iic_burst_state ++;
+        }
+        break;
+
+    case ( VREG_C_LED_WIFI ):
+    case ( VREG_C_LED_CAM ):
+    case ( VREG_C_LED_3D ):
+        vreg_ctr[adrs] = (u8)( data & 0x0F );
+        break;
+
+    case ( VREG_C_LED_NOTIFY_DATA ):
+        if( iic_burst_state < sizeof( uni_info_LED ) )
+        {
+            if(( iic_burst_state == 1 ) && ( data == 0 ))  // fade_time == 0 �֎~
+            {
+                data = 1;
+            }
+            info_LED.bindata[ iic_burst_state ] = data;
+            iic_burst_state ++;
+            if( iic_burst_state > 4 )             // �p�^�[����1�����ł�������
+            {
+                info_led_pattern_updated = true;
+            }
+        }
+        break;
+
+    /// �񓯊��œ����Ă��邽�߂����ł͏����Ȃ��B
+    // �\�񂷂邾����stop�ŏ���
+    case ( VREG_C_RTC_SEC ):
+    case ( VREG_C_RTC_MIN ):
+        set_rtc( adrs - VREG_C_RTC_SEC, data & 0x7F );
+        break;
+
+    case ( VREG_C_RTC_DAY ):
+    case ( VREG_C_RTC_HOUR ):
+        set_rtc( adrs - VREG_C_RTC_SEC, data & 0x3F );
+        break;
+
+    case ( VREG_C_RTC_YOBI ):
+        set_rtc( adrs - VREG_C_RTC_SEC, data & 0x07 );
+        break;
+
+    case ( VREG_C_RTC_MONTH ):
+        set_rtc( adrs - VREG_C_RTC_SEC, data & 0x1F );
+        break;
+
+    case ( VREG_C_RTC_YEAR ):
+        set_rtc( adrs - VREG_C_RTC_SEC, data );
+        break;
+
+    case ( VREG_C_RTC_COMP ):
+        WDT_Restart();
+        while(1)
+        {
+            RWAIT = 1;
+            while( !RWST ){}
+            if( SEC != 0 )
+            {
+                break;
+            }
+            RWAIT = 0;
+        }
+        SUBCUD = data;
+        RWAIT = 0;
+        vreg_ctr[ VREG_C_RTC_COMP ] = data;
+        break;
+
+    case ( VREG_C_RTC_ALARM_MIN ):
+        rtc_alarm_dirty = true;
+        vreg_ctr[ VREG_C_RTC_ALARM_MIN ] = (u8)( data & 0x7F );
+        break;
+
+    case ( VREG_C_RTC_ALARM_HOUR ):
+        rtc_alarm_dirty = true;
+        vreg_ctr[ VREG_C_RTC_ALARM_HOUR ] = (u8)( data & 0x3F );
+        break;
+
+        // ���������ł悢
+    case ( VREG_C_RTC_ALARM_DAY ):
+        vreg_ctr[ VREG_C_RTC_ALARM_DAY ] = (u8)( data & 0x3F );
+        break;
+
+    case ( VREG_C_RTC_ALARM_MONTH ):
+        vreg_ctr[ VREG_C_RTC_ALARM_MONTH ] = (u8)( data & 0x1F );
+        break;
+
+    case ( VREG_C_ACC_CONFIG ):
+        renge_task_immed_add( tski_acc_hosu_set );
+        vreg_ctr[ VREG_C_ACC_CONFIG ] = data;
+        break;
+
+    case ( VREG_C_ACC_R_ADRS ):
+        renge_task_immed_add( tski_acc_read );
+        vreg_ctr[ VREG_C_ACC_R_ADRS ] = data;
+        break;
+
+    case ( VREG_C_ACC_W_BUF ):
+        renge_task_immed_add( tski_acc_write );
+        vreg_ctr[ VREG_C_ACC_W_BUF ] = data;
+        break;
+
+    case ( VREG_C_ACC_HOSU_SETTING ):
+        if( ( data & 0x01 ) != 0 )
+        {
+            clear_hosu_hist(); // �����N���A
+        }
+        break;
+
+    case ( VREG_CX_FREE_DATA ):
+        if( vreg_free_adrs < VREG_C_FREE_SIZE )
+        {
+            pool.vreg_c_ext.vreg_c_free[ vreg_free_adrs ] = data;
+            vreg_free_adrs ++;
+        }
+        break;
+
+    case ( VREG_CX_FREE_ADRS ):
+        vreg_free_adrs = data;
+        break;
+
+
+    case ( VREG_C_COMMAND3 ):
+        switch ( data )
+        {
+        case ( 'r' ):
+            // ���荞�݃��[�`������FSL���C�u�������ĂԂ̂͋֎~
+            // �}�C�R�����ċN���B�@���W�X�^�ނ������������B
+            renge_task_immed_add( tski_mcu_reset );
+            break;
+
+#ifdef _ENABLE_WDT_TEST_
+        case ( 'w' ):
+            // WDT�ōċN���i�e�X�g�����j
+            while(1)
+            {
+                NOP();
+            }
+//            mcu_wdt_reset;  // ���̃R�}���h�g������Ӗ��Ȃ��ł���I
+            break;
+#endif
+		case( 'p' ):
+			hosu_increment_if_necessary();		// ���A���������
+			break;
+        }
+
+//        vreg_ctr[ VREG_C_COMMAND3 ] = data;	// �����K�v�Ȃ�
+        break;
+
+    case ( VREG_C_RBR_CONTROL ):
+        if(( data & REG_BIT_RESET_n ) != 0 )
+        {
+            RBR_RESET_n = 1;
+        }
+        else
+        {
+            RBR_RESET_n = 0;
+        }
+        if(( data & REG_BIT_FLIGHT ) != 0 )
+        {
+            RBR_FLIGHT  = 1;
+        }
+        else
+        {
+            RBR_FLIGHT  = 0;
+        }
+        vreg_ctr[ VREG_C_RBR_CONTROL ] = data;
+        break;
+
+    // read only //////////////////////////////////////////
+    case VREG_C_MCU_VER_MAJOR:
+    case VREG_C_MCU_VER_MINOR:
+	case VREG_C_3D:             // �����Ƀ��t���b�V�������
+    case VREG_C_SND_VOL:		// �����Ƀ��t���b�V�������
+    case VREG_C_BT_TEMP:		// �����Ƀ��t���b�V�������
+    case VREG_C_BT_REMAIN:      // �����Ƀ��t���b�V�������
+    case VREG_C_BT_REMAIN_FINE:	// �����Ƀ��t���b�V�������
+    case VREG_C_BT_VOLTAGE:     // �����Ƀ��t���b�V�������
+	case VREG_C_STATUS_1:		// �K���Ƀ��t���b�V�������
+    case VREG_C_STATUS:			// �K���Ƀ��t���b�V�������
+    case VREG_C_IRQ0:			// ���̂‚��łɊ��荞�݋N�����Ăق����Ȃ�...
+    case VREG_C_IRQ1:
+    case VREG_C_IRQ2:
+    case VREG_C_IRQ3:
+    case VREG_C_IRQ4:
+    case VREG_C_LED_NOTIFY_FLAG: // �������t���b�V�������
+    case VREG_C_RTC_SEC_FINE_L:	// �������t���b�V�������
+    case VREG_C_RTC_SEC_FINE_H:	// �������t���b�V�������
+        //  VREG_C_ACC_RESERVE,	// �����N���Ȃ�
+        //  VREG_C_ACC_HOSU_HIST = 0x4F,
+	case VREG_C_ACC_XH:				// �������t���b�V�������
+	case VREG_C_ACC_XL:
+	case VREG_C_ACC_YH:
+	case VREG_C_ACC_YL:
+	case VREG_C_ACC_ZH:
+	case VREG_C_ACC_ZL:
+        dbg_nop();
+        break;
+
+	case VREG_C_ACC_HOSU_L:	// �����Ă��������ǁA�f�o�b�O�p�B(�A�h���X0x4B == mcu sla(r))
+        dbg_nop();
+        /* FALLTHROUGH */
+
+    // ���ʂɏ�����邾�� /////////////////////////////////
+	default:
+        /*
+    case VREG_C_IRQ_MASK0:
+    case VREG_C_IRQ_MASK1:
+    case VREG_C_IRQ_MASK2:
+    case VREG_C_IRQ_MASK3:
+    case VREG_C_IRQ_MASK4:
+    case VREG_C_DBG01:
+    case VREG_C_DBG02:
+    case VREG_C_LED_BRIGHT:
+    case VREG_C_ACC_HOSU_L:
+    case VREG_C_ACC_HOSU_M:
+    case VREG_C_ACC_HOSU_H:
+    case VREG_C_ACC_HOSU_HOUR_BOUNDARY:
+    case VREG_C_FREE_ADRS:
+    case VREG_C_RTC_ALARM_YEAR:
+    case VREG_C_ACC_W_ADRS:
+    case VREG_C_OFF_DELAY:
+    case VREG_C_HAL_OVW_CONT0:
+    case VREG_C_HAL_OVW_DAT0:
+    case VREG_C_HAL_OVW_CONT1:
+    case VREG_C_HAL_OVW_DAT1:
+        */
+        if( adrs < VREG_C_ENDMARK_ )
+        {
+            vreg_ctr[adrs] = data;
+            break;
+        }
+        else
+        {
+            dbg_nop();		// read only�̏��ɏ������B�Ȃ񂩃o�O���ĂȂ��H
+            break;
+        }
+    }
+    return;
+}
+
+
+
+// ********************************************************
+// I2C���z���W�X�^����ǂ݂܂��B
+// �߂�F xx �f�[�^
+// ���ӁF���̃A�h���X�̏����ŌĂ΂�� �̂ŁA
+//       ���[�h���ꂽ��N���A�Ȃǂ͋C���‚���
+//       ( ��vreg_ctr_after_read( u8 adrs ) )
+u8 vreg_ctr_read( u8 adrs )
+{
+    static u16 rsub_temp;
+    u8 temp;
+
+    // RTC�͓ǂݏo���r���ɌJ��オ��̂�����邽��
+    if( ( VREG_C_RTC_SEC <= adrs ) && ( adrs <= VREG_C_RTC_YEAR ) )
+    {
+        rtc_buf_refresh(  );
+    }
+    else if( adrs == VREG_C_MCU_STATUS )
+    {
+        return( ( vreg_ctr[ VREG_C_MCU_STATUS ] & 0x03 ) |
+            ( ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x03 ) << 6 ) |  // sys_mode
+            ( ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x80 ) >> 2 ));   // vol32
+    }
+    else if( adrs == VREG_C_RTC_SEC_FINE_L )
+    {
+        rsub_temp = RSUBC;
+        return( (u8)( rsub_temp & 0xFF ) );
+    }
+    else if( adrs == VREG_C_RTC_SEC_FINE_H )
+    {
+        return( (u8)( ( rsub_temp >> 8 ) & 0xFF ) );
+    }
+/*
+	// debug �I��
+	else if( adrs == VREG_C_IRQ_MASK0 )
+    {
+        return( vreg_ctr[ VREG_C_IRQ_MASK0 ] & 0x7F );  // ���`��������MSB��0�B1�Ȃ�ʐM�G���[
+    }
+*/
+	else if( adrs == VREG_C_ACC_HOSU_HIST )
+    {
+        return( hosu_read() );
+    }
+    else if( adrs == VREG_CX_FREE_DATA )
+    {
+        temp = pool.vreg_c_ext.vreg_c_free[ vreg_free_adrs ];
+        // vreg_free_adrs ++;  // �����ʼn��Z���Ă��܂��ƃC���f�b�N�X�������
+        return( temp );
+    }
+    else if( adrs == VREG_CX_INFO )
+    {
+        return( extinfo_read() );
+    }
+    else if( adrs == VREG_C_ACC_HOSU_SETTING )
+    {
+        if( pedolog_overflow )
+        {
+            return( 0x10 );
+        }
+        else
+        {
+            return( 0 );
+        }
+    }
+
+    if( adrs >= VREG_C_ENDMARK_ )
+    {
+        // VREG_C_INFO > VREG_C_ENDMARK_ �Ȃ̂ł�����Ƃ�����
+        return( 0xFF );
+    }
+    return ( vreg_ctr[adrs] );
+}
+
+
+
+// ********************************************************
+// I2C���z���W�X�^����ǂ܂�ĉ������郌�W�X�^
+void vreg_ctr_after_read( u8 adrs, u8 data )
+{
+    // ���荞�݃t���O�̓��[�h�ŃN���A
+    switch( adrs )
+    {
+    case VREG_C_IRQ0:
+    case VREG_C_IRQ1:
+    case VREG_C_IRQ2:
+    case VREG_C_IRQ3:
+    case VREG_C_IRQ4:
+        DI();
+        vreg_ctr[ adrs ] ^= data;
+        EI();
+        irq_readed = true;
+        break;
+
+    case VREG_CX_FREE_DATA:
+        vreg_free_adrs ++;
+        break;
+
+    default:
+        break;
+    }
+}
+
+
+
+
+
+
+/******************************************************************************
+  ���荞�݂�����
+  ���荞�݃}�X�N���K�v�ƌ������Ƃł���Ȏ�������H�ڂɂȂ�܂���
+ *****************************************************************************/
+#if 0
+// �}�X�N����Ă���A�t���O�͗��Ă邪�A���荞�݂͓���Ȃ��B
+#define set_irq( irqreg, bitpos )               \
+{                                               \
+  vreg_ctr[ irqreg ] |= bitpos;                 \
+  if( ( vreg_ctr[ irqreg+8 ] & bitpos ) == 0 ){ \
+    IRQ0_ast;                                   \
+  }                                             \
+}
+#endif
+
+// �}�X�N����Ă���A�t���O�u���ĂȂ��v�A���荞�ݓ���Ȃ��B
+void set_irq( u8 irqreg, u8 irq_flg )
+{
+    u8 tot;
+
+    if(( system_status.pwr_state == ON ) ||
+       ( system_status.pwr_state == SLEEP ))
+    {
+    //    DI();
+        if( ( vreg_ctr[ irqreg + 8 ] & irq_flg ) == 0 ){
+            vreg_ctr[ irqreg ] |= irq_flg;
+            IRQ0_neg;   // ��u�グ��...
+    //        EI();
+            tot = 0;
+            while( !IRQ0 && ( ++tot != 0 ) ){;}   // O.D.�Ȃ̂ł����Ƃ�����̂�҂� �� IRQ_mcu ��L�ɔ����Ă�ƍ���(��•s��)
+            IRQ0_ast;   // ���Ƃ������B
+        }
+    }
+//    EI();
+}
diff --git a/tags/SDK3.0(2.00)/vreg_ctr.h b/tags/SDK3.0(2.00)/vreg_ctr.h
new file mode 100644
index 0000000..2340bc2
--- /dev/null
+++ b/tags/SDK3.0(2.00)/vreg_ctr.h
@@ -0,0 +1,299 @@
+#ifndef __vreg_ctr__
+#define __vreg_ctr__
+
+
+#include "config.h"
+
+// VREG_C_MCU_STATUS
+// bit[7.6] twl.sys_mode��[1.0]     ctr���珑���Ȃ����Afcr_reset���ɓK���Ƀ��Z�b�g
+// bit[5]         �V      [7]       ctr���珑���Ȃ����Afcr_reset���ɓK���Ƀ��Z�b�g
+#define REG_BIT_STATUS_WDT_RESET    ( 1 << 1 )
+#define REG_BIT_RTC_BLACKOUT        ( 1 << 0 )
+
+
+//  VREG_C_STATUS,
+#define REG_BIT_LCD_POW             ( 1 << 7 )
+#define REG_BIT_BL_U                ( 1 << 6 )
+#define REG_BIT_BL_L                ( 1 << 5 )
+#define REG_BIT_BATT_CHARGE         ( 1 << 4 )
+#define REG_BIT_POW_SUPPLY          ( 1 << 3 )
+//                           ���g�p ( 1 << 2 )
+#define REG_BIT_ST_SHELL_OPEN       ( 1 << 1 )
+//                           ���g�p ( 1 << 0 )
+
+
+//  VREG_C_STATUS_X
+//                           ���g�p ( 1 << 6 )
+//                           ���g�p ( 1 << 5 )
+#define REG_BIT_WIFI_TX             ( 1 << 4 )
+//               twl bl �̃~���[[1: ( 1 << 3 )
+//                                0]( 1 << 2 )
+#define REG_BIT_ACCERO_ERR          ( 1 << 1 )
+#define REG_BIT_MGIC_ERR            ( 1 << 0 )
+
+//  VREG_C_IRQ0
+#define REG_BIT_IRQ_WDT_RESET       ( 1 << 7 )
+#define REG_BIT_SHELL_OPEN          ( 1 << 6 )
+#define REG_BIT_SHELL_CLOSE         ( 1 << 5 )
+#define REG_BIT_SW_WIFI_CLICK       ( 1 << 4 )
+#define REG_BIT_SW_HOME_RELEASE     ( 1 << 3 )
+#define REG_BIT_SW_HOME_CLICK       ( 1 << 2 )
+#define REG_BIT_SW_POW_HOLD         ( 1 << 1 )
+#define REG_BIT_SW_POW_CLICK        ( 1 << 0 )
+
+//  VREG_C_IRQ1
+#define REG_BIT_BT_CHG_START        ( 1 << 7 )
+#define REG_BIT_BT_CHG_STOP         ( 1 << 6 )
+#define REG_BIT_BT_REMAIN           ( 1 << 5 )
+#define REG_BIT_ACC_DAT_RDY         ( 1 << 4 )
+#define REG_BIT_ACC_ACK             ( 1 << 3 )
+#define REG_BIT_RTC_ALARM           ( 1 << 2 )
+#define REG_BIT_BT_DC_CONNECT       ( 1 << 1 )
+#define REG_BIT_BT_DC_DISC          ( 1 << 0 )
+
+//  VREG_C_IRQ2
+#define REG_BIT_TWL_VER_READ        ( 1 << 7 )
+//#define REG_BIT_TWL_SNDVOL_CHANGE   ( 1 << 6 ) �p�~
+#define REG_BIT_SLIDE_VOL_ACROSS_TWL_BOUNDARY   ( 1 << 6 )
+#define REG_BIT_TWL_BL_U_ON         ( 1 << 5 )
+#define REG_BIT_TWL_BL_U_OFF        ( 1 << 4 )
+#define REG_BIT_TWL_BL_L_ON         ( 1 << 3 )
+#define REG_BIT_TWL_BL_L_OFF        ( 1 << 2 )
+#define REG_BIT_TWL_OFF_REQ         ( 1 << 1 )
+#define REG_BIT_TWL_RESET_REQ       ( 1 << 0 )
+
+//  VREG_C_IRQ3
+#define REG_BIT_BL_U_ON             ( 1 << 5 )
+#define REG_BIT_BL_U_OFF            ( 1 << 4 )
+#define REG_BIT_BL_L_ON             ( 1 << 3 )
+#define REG_BIT_BL_L_OFF            ( 1 << 2 )
+#define REG_BIT_LCD_ON              ( 1 << 1 )
+#define REG_BIT_LCD_OFF             ( 1 << 0 )
+
+
+// ���̂����ǂ�����...
+//#define REG_BIT_VR_3D_CHANGE      ( 1 << 7 )
+
+
+
+// VREG_C_COMMAND0
+//#define REG_BIT_CMD_LCD_ON              ( 1 << 7 )
+//#define REG_BIT_CMD_LCD_OFF             ( 1 << 6 )
+//#define REG_BIT_CMD_BL_ON               ( 1 << 5 )
+//#define REG_BIT_CMD_BL_OFF              ( 1 << 4 )
+#define REG_BIT_GOING_TO_SLEEP      ( 1 << 4 )
+#define REG_BIT_FCRAM_RESET_REQ     ( 1 << 3 )
+#define REG_BIT_RESET2_REQ          ( 1 << 2 )
+#define REG_BIT_RESET1_REQ          ( 1 << 1 )
+#define REG_BIT_OFF_REQ             ( 1 << 0 )
+
+// VREG_C_COMMAND1 (TWL�Ɋ��荞�݂�����)
+//                           ���g�p ( 1 << 7 )
+//                           ���g�p ( 1 << 6 )
+#define REG_BIT_SEND_TWL_VOL_CLICK  ( 1 << 5 )
+#define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 )
+#define REG_BIT_SEND_TWL_BATT_LOW   ( 1 << 3 )
+#define REG_BIT_SEND_TWL_OFF_DET    ( 1 << 2 )
+#define REG_BIT_SEND_TWL_RESET_DET  ( 1 << 1 )
+#define REG_BIT_SEND_TWL_PWSW_DET   ( 1 << 0 )
+
+// VREG_C_COMMAND2 �t���֌W
+#define REG_BIT_CMD_BL_U_ON         ( 1 << 5 )
+#define REG_BIT_CMD_BL_U_OFF        ( 1 << 4 )
+#define REG_BIT_CMD_BL_L_ON         ( 1 << 3 )
+#define REG_BIT_CMD_BL_L_OFF        ( 1 << 2 )
+#define REG_BIT_CMD_LCD_ON          ( 1 << 1 )
+#define REG_BIT_CMD_LCD_OFF         ( 1 << 0 )
+#define REG_BITS_CMD_BL             ( REG_BIT_CMD_BL_U_ON | REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_ON | REG_BIT_CMD_BL_L_OFF )
+
+
+// ��TWL�ɒʒm����IRQ���W�X�^
+#define REG_BIT_TWL_IRQ_PWSW_DET 0x08
+#define REG_BIT_TWL_IRQ_RESET    0x01
+#define REG_BIT_TWL_IRQ_OFF      0x02
+#define REG_BIT_TWL_IRQ_BT_LOW   0x20
+#define REG_BIT_TWL_IRQ_BT_EMPTY 0x10
+#define REG_BIT_TWL_IRQ_VOL_CHANGE 0x40
+
+
+// CODEC���PMIC NTR �̑㗝���W�X�^
+#define REG_BIT_TWL_REQ_OFF            ( 1 << 6 )
+#define REG_BIT_TWL_REQ_BL_U           ( 1 << 3 )
+#define REG_BIT_TWL_REQ_BL_L           ( 1 << 2 )
+#define REG_BIT_TWL_REQ_RESET          ( 1 << 0 )
+
+
+// VREG_C_LED_NOTIFY_FLAG
+#define REG_BIT_IN_LOOP                ( 1 << 0 )
+
+// RBR control (0x57)
+#define REG_BIT_FLIGHT              ( 1 << 1 )
+#define REG_BIT_RESET_n             ( 1 << 0 )
+
+
+// HAL bitfields 0
+#define REG_BIT_HAL0_PM_EXTDC_n     ( 1 << 7 )
+#define REG_BIT_HAL0_BT_IN_CHG_n    ( 1 << 6 )
+//#define REG_BIT_HAL0_PM_IRQ_n                 // �g��Ȃ�
+#define REG_BIT_HAL0_RSV_5          ( 1 << 5 ) 
+#define REG_BIT_HAL0_WL_TX          ( 1 << 4 )
+#define REG_BIT_HAL0_SHELL_OPEN     ( 1 << 3 )            // status�ɂ���܂�
+#define REG_BIT_HAL0_SW_WIFI_n      ( 1 << 2 )
+#define REG_BIT_HAL0_SW_HOME_n      ( 1 << 1 )
+#define REG_BIT_HAL0_SW_POW_n       ( 1 << 0 )
+
+
+// HAL bitfields 1
+#define REG_BIT_HAL1_DIPSW_1        ( 1 << 3 )
+#define REG_BIT_HAL1_DIPSW_0        ( 1 << 2 )
+#define REG_BIT_HAL1_HW_DET_1       ( 1 << 1 )
+#define REG_BIT_HAL1_HW_DET_0       ( 1 << 0 )
+
+/*
+  �e���v��
+#define REG_BIT_                    ( 1 << 7 )
+#define REG_BIT_                    ( 1 << 6 )
+#define REG_BIT_                    ( 1 << 5 )
+#define REG_BIT_                    ( 1 << 4 )
+#define REG_BIT_                    ( 1 << 3 )
+#define REG_BIT_                    ( 1 << 2 )
+#define REG_BIT_                    ( 1 << 1 )
+#define REG_BIT_                    ( 1 << 0 )
+*/
+
+
+
+/*============================================================================*/
+extern u8 vreg_ctr[];
+
+/*============================================================================*/
+enum VREG_C_ADRS
+{                               // ����`�A�h���X�֏������񂾍ۂ̓���͕s��
+  VREG_C_MCU_VER_MAJOR = 0x00,
+  VREG_C_MCU_VER_MINOR,
+  VREG_C_MCU_STATUS,
+
+  VREG_C_VCOM_T = 0x03,
+  VREG_C_VCOM_B,
+
+  VREG_C_DBG01 = 0x05,
+  VREG_C_DBG02,
+  VREG_C_DBG03,
+
+  VREG_C_3D = 0x08,
+  VREG_C_SND_VOL,
+  VREG_C_BT_TEMP,
+  VREG_C_BT_REMAIN,
+  VREG_C_BT_REMAIN_FINE,
+  VREG_C_BT_VOLTAGE,
+
+  VREG_C_STATUS_1 = 0x0E,
+  VREG_C_STATUS = 0x0F,
+
+  VREG_C_IRQ0 = 0x10,
+  VREG_C_IRQ1,
+  VREG_C_IRQ2,
+  VREG_C_IRQ3,
+  VREG_C_IRQ4,
+
+  VREG_C_IRQ_MASK0 = 0x18,
+  VREG_C_IRQ_MASK1,
+  VREG_C_IRQ_MASK2,
+  VREG_C_IRQ_MASK3,
+  VREG_C_IRQ_MASK4,
+
+  VREG_C_COMMAND0 = 0x20,
+  VREG_C_COMMAND1,
+  VREG_C_COMMAND2,
+  VREG_C_COMMAND3,  // 'r' �Ń}�C�R�����Z�b�g�A 'w' ��WDT���Z�b�g
+
+  VREG_C_OFF_DELAY = 0x24,
+//  VREG_C_VOL_DIGITAL = 0x25,  // todo ������
+//  VREG_C_VOL_OPTION,
+  VREG_C_VOL_ADC_RAW = 0x27,
+
+  VREG_C_LED_BRIGHT = 0x28,
+  VREG_C_LED_POW,
+  VREG_C_LED_WIFI,
+  VREG_C_LED_CAM,
+  VREG_C_LED_3D,
+  VREG_C_LED_NOTIFY_DATA,
+  VREG_C_LED_NOTIFY_FLAG,
+
+  VREG_C_RBR_CONTROL = 0x2F,
+
+  VREG_C_RTC_SEC = 0x30,
+  VREG_C_RTC_MIN,
+  VREG_C_RTC_HOUR,
+  VREG_C_RTC_YOBI,
+  VREG_C_RTC_DAY,
+  VREG_C_RTC_MONTH,
+  VREG_C_RTC_YEAR,
+
+  VREG_C_RTC_COMP,
+
+  VREG_C_RTC_ALARM_MIN = 0x38,
+  VREG_C_RTC_ALARM_HOUR,
+  VREG_C_RTC_ALARM_DAY,
+  VREG_C_RTC_ALARM_MONTH,
+  VREG_C_RTC_ALARM_YEAR,
+
+  VREG_C_RTC_SEC_FINE_L,
+  VREG_C_RTC_SEC_FINE_H,
+
+  VREG_C_ACC_CONFIG = 0x40,
+  VREG_C_ACC_R_ADRS,
+  VREG_C_ACC_RESERVE,
+  VREG_C_ACC_W_ADRS,
+  VREG_C_ACC_W_BUF,
+
+  VREG_C_ACC_XL = 0x45,
+  VREG_C_ACC_XH,
+  VREG_C_ACC_YL,
+  VREG_C_ACC_YH,
+  VREG_C_ACC_ZL,
+  VREG_C_ACC_ZH,
+
+  VREG_C_ACC_HOSU_L = 0x4B,
+  VREG_C_ACC_HOSU_M,
+  VREG_C_ACC_HOSU_H,
+  VREG_C_ACC_HOSU_SETTING,
+  VREG_C_ACC_HOSU_HIST = 0x4F,
+  
+  VREG_C_ACC_HOSU_HOUR_BOUNDARY = 0x50,
+  VREG_C_ACC_HOSU_HOUR_BOUNDARY_SEC,
+
+  VREG_C_HAL_OVW_CONT0 = 0x52,
+  VREG_C_HAL_OVW_DAT0,
+  VREG_C_HAL_OVW_CONT1,
+  VREG_C_HAL_OVW_DAT1,
+
+  VREG_C_HAL_OVW_BT_FUEL = 0x56,
+  VREG_C_HAL_OVW_BT_VOLTAGE,
+
+  VREG_C_VOL_CAL_MIN = 0x58,
+  VREG_C_VOL_CAL_MAX,
+
+  VREG_C_HAL_OVW_TEMPERATURE = 0x5A,
+
+  VREG_C_ENDMARK_
+};
+
+// ���Ԃ͔����ɂ��āA���������m�ۂ��Ȃ����߂� �ʂ� define ���Ă�
+#define VREG_CX_INFO 0x7F
+#define VREG_CX_FREE_ADRS 0x60
+#define VREG_CX_FREE_DATA 0x61
+//  VREG_C_AMBIENT_BRIGHTNESS = 0xXX,
+
+
+
+
+/*============================================================================*/
+void vreg_ctr_init(  );
+void vreg_ctr_reset(  );
+void vreg_ctr_write( u8 adrs, u8 data );
+u8 vreg_ctr_read( u8 phy_adrs );
+void vreg_ctr_after_read( u8 adrs, u8 data );
+void set_irq( u8 irqreg, u8 irq_flg );
+
+#endif
diff --git a/tags/SDK3.0(2.00)/vreg_twl.c b/tags/SDK3.0(2.00)/vreg_twl.c
new file mode 100644
index 0000000..0bd0caa
--- /dev/null
+++ b/tags/SDK3.0(2.00)/vreg_twl.c
@@ -0,0 +1,150 @@
+/* ========================================================
+
+TWL�݊�����I2C���W�X�^
+
+ ======================================================== */
+#include "incs.h"
+#include "jhl_defs.h"
+#include "led.h"
+
+#include "vreg_twl.h"
+#include "vreg_ctr.h"
+
+// ========================================================
+#define TWL_REG_VER_INFO               0x35
+#define NON_EXIST_REG                  0xFF
+
+// ========================================================
+u8      vreg_twl[_REG_TWL_INT_ADRS_ENDMARK];
+
+extern bit twl_ver_read;
+extern bit cam_led_update;
+
+extern bit vol_changed_by_twl;
+
+
+/* ========================================================
+  ���z���W�X�^�̏�����
+ ======================================================== */
+void vreg_twl_init(  )
+{
+    vreg_twl[ REG_TWL_INT_ADRS_MODE ] = 0x03;
+    vreg_twl[ REG_TWL_INT_ADRS_IRQ ] = 0;
+    vreg_twl[ REG_TWL_INT_ADRS_CAM ] = 0;
+    vreg_twl[ REG_TWL_INT_ADRS_TEMP0 ] = 0;
+}
+
+// ========================================================
+// I2C���z���W�X�^�ɏ����E�����A�N�V��������
+//�@���� adrs �͓����A�h���X
+//  �@���݂��Ȃ��A�h���X�ɃA�N�Z�X�����ꍇ�A�������܂���B
+void vreg_twl_write( u8 adrs, u8 data )
+{
+    switch ( adrs )
+    {
+      case ( REG_TWL_INT_ADRS_VOL ):
+        {
+            vol_changed_by_twl = true;
+            vreg_twl[ REG_TWL_INT_ADRS_VOL ] = data;
+            //renge_task_immed_add( tski_vol_update );
+            vol_polling = 3;
+            break;
+        }
+
+      case ( REG_TWL_INT_ADRS_MODE ):
+        vreg_twl[ REG_TWL_INT_ADRS_MODE ] = ( data & 0x83 );  // [8]vol32 [1:0]nand
+        break;
+
+      case ( REG_TWL_INT_ADRS_CAM ):
+        vreg_twl[ REG_TWL_INT_ADRS_CAM ] = ( data & 0x03 );
+        if( ( data & 0x03 ) == TWL_CAMLED_BLINK )
+        {
+        	cam_led_update = true;        	// �����łȂ��ƈꔭ�������ɕs������邽��
+        }
+	    tsk_led_cam();
+        break;
+
+      case ( REG_TWL_INT_ADRS_TEMP0 ):
+        vreg_twl[ REG_TWL_INT_ADRS_TEMP0 ] = data;
+        break;
+
+      case ( REG_TWL_INT_ADRS_COMMAND ):
+/*
+        if( data <= 2 ){
+            if( ( data & REG_BIT_TWL_OFF_REQ ) != 0 )
+            {
+                set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ );      // OFF���������Ă����炵���B
+                break;
+            }
+            else if( ( data & REG_BIT_TWL_RESET_REQ ) != 0 )
+            {
+                set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ );      //���Z�b�g�����Ȃ��B���̂́ASPI���痈�܂��B
+                break;
+            }
+          }
+*/
+        if( data == REG_BIT_TWL_RESET_REQ )
+        {
+            set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ );      //���Z�b�g�����Ȃ��B���̂́ASPI���痈�܂��B
+            break;
+        }
+    }
+    return;
+}
+
+
+
+// ========================================================
+// I2C���z���W�X�^����ǂ݂܂��B
+//�@���� adrs �O���猩���Ƃ��́A�A�h���X
+//�@�߂�   xx �f�[�^
+//  �@���݂��Ȃ��A�h���X�ɃA�N�Z�X�����ꍇ�A�߂�l��0x5A
+u8 vreg_twl_read( u8 phy_adrs )
+{
+    u8 temp;
+
+    switch( phy_adrs ){
+        // 10%�ȉ��ŐԂɂȂ�
+      case( REG_TWL_INT_ADRS_POWER_INFO ):
+          // ���x���̃Z�b�g�� get_batt_left()���i�������x���Ė����ł����j
+          return( vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] | ( !PM_EXTDC_n ? 0x80: 0x00 ) );  // �A�_�v�^bit(�A�_�v�^�L��)
+
+      case( REG_TWL_INT_ADRS_IRQ ):
+          temp = vreg_twl[ REG_TWL_INT_ADRS_IRQ ];
+          vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0;
+          return( temp );
+
+      case( REG_TWL_INT_ADRS_VER_INFO ):
+//          set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ );  // ���x�I�ɖ����Ȃ̂�
+          twl_ver_read = true;
+          return( TWL_REG_VER_INFO );
+
+      case( REG_TWL_ADRS_NON_EXIST ):
+          return( 0x00 );
+
+      default:
+          return( vreg_twl[ phy_adrs ] );
+    }
+}
+
+
+
+// ========================================================
+// �O�����猩���钎�H���A�h���X���A�����̘A���A�h���X�ɓǂݑւ���
+// 0xFF�͑��݂��Ȃ��A�h���X�B
+u8 adrs_table_twl_ext2int( u8 img )
+{
+    switch( img ){
+      case( REG_TWL_ADRS_IRQ ):        return( REG_TWL_INT_ADRS_IRQ );
+      case( REG_TWL_ADRS_COMMAND ):    return( REG_TWL_INT_ADRS_COMMAND );
+      case( REG_TWL_ADRS_POWER_INFO ): return( REG_TWL_INT_ADRS_POWER_INFO );
+      case( REG_TWL_ADRS_VOL ):        return( REG_TWL_INT_ADRS_VOL );
+      case( REG_TWL_ADRS_CAM ):        return( REG_TWL_INT_ADRS_CAM );
+      case( REG_TWL_ADRS_TEMP0 ):      return( REG_TWL_INT_ADRS_TEMP0 );
+      case( REG_TWL_ADRS_VER_INFO ):   return( REG_TWL_INT_ADRS_VER_INFO );
+      case( REG_TWL_ADRS_MODE ):       return( REG_TWL_INT_ADRS_MODE );
+      default:                         return( REG_TWL_ADRS_NON_EXIST );
+//      0���ǂ߂�΂悢�A�����Ȃ��ėǂ�
+//      case( REG_TWL_ADRS_WIFI ):       return( REG_TWL_INT_ADRS_WIFI );
+    }
+}
diff --git a/tags/SDK3.0(2.00)/vreg_twl.h b/tags/SDK3.0(2.00)/vreg_twl.h
new file mode 100644
index 0000000..63cdd94
--- /dev/null
+++ b/tags/SDK3.0(2.00)/vreg_twl.h
@@ -0,0 +1,127 @@
+#ifndef __vreg_twl__
+#define __vreg_twl__
+/* ========================================================================= */
+extern u8 vreg_twl[];
+
+
+/*
+ * �O���猩���Ƃ��̃}�C�R�����W�X�^�A�h���X�B
+ * �g�����Ȃǂ��l���Ĕ�є�тɂ��Ă���B
+ */
+/*
+ * ���荞�ݗv���t���O��
+ * MSB:�O���d�������L��/�Ȃ��ω� �i�������j
+ *   6:Vol�L�[����i�ύX�Ɍ��炸�BMAX���Ɂ{�ł��B�j
+ *   5:�d�r�d�� �� ���o
+ *   4:         ��
+ *   3:�d���X�C�b�` �����ꌟ�o
+ *   2:�i���ݒ�j
+ *   1:�d���X�C�b�` OFF      ���ԉ����ꌟ�o
+ * LSB:             ���Z�b�g
+ */
+enum REG_TWL_ADRS
+{                               // ����`�A�h���X�֏������񂾍ۂ͖���
+  REG_TWL_ADRS_VER_INFO = 0x00,
+  REG_TWL_ADRS_PMIC_INFO,
+  REG_TWL_ADRS_BATT_INFO,
+  REG_TWL_ADRS_IRQ = 0x10,
+  REG_TWL_ADRS_COMMAND,
+  REG_TWL_ADRS_MODE,
+  REG_TWL_ADRS_POWER_INFO = 0x20,
+  REG_TWL_ADRS_POWER_SAVE,
+  REG_TWL_ADRS_WIFI = 0x30,
+  REG_TWL_ADRS_CAM,
+  REG_TWL_ADRS_VOL = 0x40,
+  REG_TWL_ADRS_BL,
+  REG_TWL_ADRS_CODEC_MIC_GAIN = 0x50,
+  REG_TWL_ADRS_ADC_CALIB = 0x60,
+  REG_TWL_ADRS_ADC_CALIB_STATUS,
+  REG_TWL_ADRS_ADC_CALIB_VALUE,
+  REG_TWL_ADRS_POWER_LED,
+  REG_TWL_ADRS_TEMP0 = 0x70,
+  REG_TWL_ADRS_TEMP1,
+  REG_TWL_ADRS_TEMP2,
+  REG_TWL_ADRS_TEMP3,
+  REG_TWL_ADRS_TEMP4,
+  REG_TWL_ADRS_TEMP5,
+  REG_TWL_ADRS_TEMP6,
+  REG_TWL_ADRS_TEMP7,
+  REG_TWL_ADRS_TIME_PWSW_DELAY = 0x80,
+  REG_TWL_ADRS_TIME_PWSW_THRESHOLD
+};
+
+#define REG_TWL_ADRS_NON_EXIST 0xFF
+
+/*
+ * �}�C�R�������ł̃��W�X�^�̎���
+ * �������‚߂Ă���
+ */
+enum REG_TWL_ADRS_INT
+{
+  REG_TWL_INT_ADRS_VER_INFO = 0x00,
+//  REG_TWL_INT_ADRS_PMIC_INFO,
+//  REG_TWL_INT_ADRS_BATT_INFO,
+  REG_TWL_INT_ADRS_IRQ,         // 0x10,
+  REG_TWL_INT_ADRS_COMMAND,
+  REG_TWL_INT_ADRS_MODE,
+  REG_TWL_INT_ADRS_POWER_INFO,  // 0x20,
+//  REG_TWL_INT_ADRS_POWER_SAVE,
+//  REG_TWL_INT_ADRS_WIFI,        // 0x30,
+  REG_TWL_INT_ADRS_CAM,
+  REG_TWL_INT_ADRS_VOL,         // 0x40,
+//  REG_TWL_INT_ADRS_BL,
+//  REG_TWL_INT_ADRS_CODEC_MIC_GAIN,      // 0x50,
+//  REG_TWL_INT_ADRS_CODEC_MIC_GAIN_RELOAD,
+//  REG_TWL_INT_ADRS_ADC_CALIB,   // 0x60,
+//  REG_TWL_INT_ADRS_ADC_CALIB_STATUS,
+//  REG_TWL_INT_ADRS_ADC_CALIB_VALUE,
+//  REG_TWL_INT_ADRS_POWER_LED,
+    REG_TWL_INT_ADRS_TEMP0,       // 0x70 - 0x77
+  REG_TWL_INT_ADRS_TEMP1,
+  REG_TWL_INT_ADRS_TEMP2,
+  REG_TWL_INT_ADRS_TEMP3,
+  REG_TWL_INT_ADRS_TEMP4,
+  REG_TWL_INT_ADRS_TEMP5,
+  REG_TWL_INT_ADRS_TEMP6,
+  REG_TWL_INT_ADRS_TEMP7,
+//  REG_TWL_INT_ADRS_TIME_PWSW_DELAY,
+//  REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD
+  _REG_TWL_INT_ADRS_ENDMARK,
+};
+
+
+
+/* ========================================================================= */
+#define is_TWL               ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x01 )
+#define with_NAND            ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x02 )
+#define volSteps32           ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x80 )
+
+#define reg_wifi_led         ( vreg_twl[ REG_TWL_INT_ADRS_WIFI ] & 0x01 )
+#define reg_wifi_led_blink   ( vreg_twl[ REG_TWL_INT_ADRS_WIFI ] & 0x02 )
+
+#define REG_TWL_ADRS_MODE__VOL32 ( 1 << 7 )
+
+typedef enum CAM_LED_TWL_MODE
+{
+  TWL_CAMLED_OFF,
+  TWL_CAMLED_ON,
+  TWL_CAMLED_BLINK,
+  TWL_CAMLED_DEF_ON
+}twl_camLed_mode;
+
+
+/* ========================================================================= */
+void vreg_twl_init(  );
+void vreg_twl_write( u8 adrs, u8 data );
+u8 adrs_table_twl_ext2int( u8 img );
+u8 vreg_twl_read( u8 phy_adrs );
+
+
+// �ǂ񂾂�N���A�Ȃǂ̏���
+#define vreg_twl_after_read( reg_adrs );    \
+    if( reg_adrs == REG_TWL_INT_ADRS_IRQ )  \
+    {                                       \
+        vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0;\
+    }
+
+#endif
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.plg b/tags/SDK3.0(2.00)/yav_mcu_bsr.plg
new file mode 100644
index 0000000..8f5ffe3
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.plg
@@ -0,0 +1,175 @@
+C:\Windows\system32\cmd.exe /c c:\cygwin\bin\touch magic.c
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no loader.c
+loader.c(141) : CC78K0R warning W0401: Conversion may lose significant digits
+loader.c(142) : CC78K0R warning W0401: Conversion may lose significant digits
+loader.c(174) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    3 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\loader.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no pm.c
+pm.c(493) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(784) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(788) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(818) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(839) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(905) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(914) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(1117) : CC78K0R warning W0401: Conversion may lose significant digits
+pm.c(1119) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    9 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\pm.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no i2c_ctr.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\i2c_ctr.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no main.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\main.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no magic.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\magic.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no WDT.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\WDT.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no i2c_mcu.c
+i2c_mcu.c(210) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    1 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\i2c_mcu.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no i2c_twl.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\i2c_twl.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no led.c
+led.c(82) : CC78K0R warning W0745: Expected function prototype
+led.c(332) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    2 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\led.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no rtc.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\rtc.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no vreg_ctr.c
+vreg_ctr.c(164) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(165) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(167) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(169) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(170) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(218) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(218) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(223) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(223) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(227) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(227) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(231) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(231) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_ctr.c(235) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and   14 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\vreg_ctr.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no vreg_twl.c
+vreg_twl.c(55) : CC78K0R warning W0401: Conversion may lose significant digits
+vreg_twl.c(59) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    2 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\vreg_twl.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no adc.c
+adc.c(101) : CC78K0R warning W0401: Conversion may lose significant digits
+adc.c(182) : CC78K0R warning W0401: Conversion may lose significant digits
+adc.c(228) : CC78K0R warning W0401: Conversion may lose significant digits
+adc.c(352) : CC78K0R warning W0401: Conversion may lose significant digits
+adc.c(474) : CC78K0R warning W0745: Expected function prototype
+adc.c(503) : CC78K0R warning W0401: Conversion may lose significant digits
+adc.c(508) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    7 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\adc.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no renge\renge.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\renge.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no accero.c
+accero.c(105) : CC78K0R warning W0745: Expected function prototype
+Compilation complete,    0 error(s) and    1 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\accero.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no self_flash.c
+self_flash.c(280) : CC78K0R warning W0401: Conversion may lose significant digits
+self_flash.c(281) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    2 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\self_flash.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no sw.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\sw.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no task_debug.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\task_debug.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no task_misc.c
+task_misc.c(296) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(303) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(308) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(309) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(310) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(311) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(312) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(314) : CC78K0R warning W0401: Conversion may lose significant digits
+task_misc.c(325) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    9 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\task_misc.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no task_sys.c
+task_sys.c(208) : CC78K0R warning W0401: Conversion may lose significant digits
+task_sys.c(584) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    2 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\task_sys.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no pedo_alg_thre_det2.c
+pedo_alg_thre_det2.c(97) : CC78K0R warning W0745: Expected function prototype
+pedo_alg_thre_det2.c(113) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    2 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\pedo_alg_thre_det2.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no ini_VECT.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\ini_VECT.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no task_status.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\task_status.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no led_cam.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\led_cam.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no led_pow.c
+led_pow.c(99) : CC78K0R warning W0401: Conversion may lose significant digits
+led_pow.c(104) : CC78K0R warning W0401: Conversion may lose significant digits
+led_pow.c(155) : CC78K0R warning W0401: Conversion may lose significant digits
+led_pow.c(215) : CC78K0R warning W0401: Conversion may lose significant digits
+led_pow.c(244) : CC78K0R warning W0401: Conversion may lose significant digits
+Compilation complete,    0 error(s) and    5 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\led_pow.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2 -qvjl2w -sainter_asm -zpb -no hal.c
+Compilation complete,    0 error(s) and    0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff inter_asm\hal.asm
+Assembly complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\lk78k0r.exe" -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -obsr.lmf "..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r\s0rm.rel"  -gi1B339499E033F240BFAAh -pbsr_k0r.map -nkd -gb7EFBFFh -b"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r\fsl.lib" -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r" -dbsr_mcu.dr -s -w0  loader.rel pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_twl.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel adc.rel renge.rel accero.rel self_flash.rel sw.rel task_debug.rel task_misc.rel task_sys.rel pedo_alg_thre_det2.rel ini_VECT.rel task_status.rel led_cam.rel led_pow.rel hal.rel 
+Link complete,     0 error(s) and     0 warning(s) found.
+"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\oc78k0r.exe" -y"c:\program files (x86)\nec electronics tools\dev" -_msgoff -o.\bsr.hex -nu -ki  bsr.lmf
+Object Conversion Complete,      0 error(s) and     0 warning(s) found.
+C:\Windows\system32\cmd.exe /c ruby nec_s_2_bsrbin2.rb bsr.hex
+4
+intel-HEX to bsr bin converter
+ file converted!
+
+
+Build Total error(s) : 0  Total warning(s) : 59 
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.pri b/tags/SDK3.0(2.00)/yav_mcu_bsr.pri
new file mode 100644
index 0000000..d15dfe8
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.pri
@@ -0,0 +1,1066 @@
+[Project.ID]
+Ver=200
+Target=IDK0R32G
+[Configuration]
+Chip=uPD79F0104
+Internal Rom=32KB
+Internal Ram=1536B
+Clock=Target
+Sub Clock=Target
+Peripheral Break=0x3
+Firm Clock=System
+Flash Programming=Permit
+Low-voltage Flash Rewriting=On
+Fail Safe Break=0x2000
+Port=1
+NMI=OFF
+TRESET=OFF
+IRESET=OFF
+WAIT=OFF
+SysClock=None
+SubClock=None
+[Mapping]
+Count=0
+[Main]
+Geometry=198, 198, 960, 728
+Window=Max
+MDI_MAX=OFF
+Button=ON
+Mode=Auto
+Trace=Uncond ON
+Trace2=Non Stop
+Coverage=OFF
+Timer=OFF
+Tracer=OFF
+[Load File]
+Dir=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\
+SaveFilter=0
+Start=0
+End=0
+LoadFilter=5
+Offset=0
+Object=ON
+Symbol=ON
+Erase=OFF
+HighSpeed=OFF
+Symbol Reset=ON
+CPU Reset=ON
+File1=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\bsr.lmf
+LoadFilter1=5
+Offset1=0
+Object1=ON
+Symbol1=ON
+Erase1=OFF
+HighSpeed1=OFF
+CPU Reset1=ON
+Symbol Reset1=ON
+[View File]
+Dir=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\
+Filter=Source
+[Debugger Option]
+Source Path="\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\renge"
+Symbol Size=Byte
+Symbol Format=Hex
+Register Name=Func
+Offset Label=OFF
+Offset Mnemonic=ON
+Tab Count=4
+Tab Size1=*.*, 8
+Tab Size2=*.c, 8
+Tab Size3=*.s, 8
+Tab Size4=*.asm, 8
+Default Source=*.c;*.s;*.asm
+Default Module=*.lnk;*.lmf
+Startup Start=_@cstart
+Startup End=_@cend
+Main Symbol=_main
+Symbol Type=OFF
+Language=C
+Kanji=SJIS
+[Source]
+Geometry=29, 167, 923, 884
+Window=Normal
+DispStart=75
+CaretPos=76,0
+Mode=Normal
+DispFile=
+Address1=
+Address2=
+Address3=
+Address4=
+Address5=
+Address6=
+Address7=
+Address8=
+Address9=
+Address10=
+Address11=
+Address12=
+Address13=
+Address14=
+Address15=
+Address16=
+Data1=
+Data2=
+Data3=
+Data4=
+Data5=
+Data6=
+Data7=
+Data8=
+Data9=
+Data10=
+Data11=
+Data12=
+Data13=
+Data14=
+Data15=
+Data16=
+Option=0
+Case=ON
+Direction=Down
+File1=
+File2=
+File3=
+File4=
+File5=
+File6=
+File7=
+File8=
+File9=
+File10=
+File11=
+File12=
+File13=
+File14=
+File15=
+File16=
+SaveRange=Screen
+SaveStart=
+SaveEnd=
+Accumulative=ON
+[Source1]
+Geometry=230, 86, 923, 884
+Window=Normal
+DispStart=85
+CaretPos=420,0
+Mode=Normal
+DispFile=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\vreg_ctr.c
+Accumulative=ON
+[Source2]
+Geometry=426, 148, 923, 884
+Window=Normal
+DispStart=183
+CaretPos=244,0
+Mode=Normal
+DispFile=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\i2c_ctr.c
+Accumulative=ON
+[Assemble]
+Geometry=75, 75, 712, 548
+Window=Normal
+DispStart=6880
+CaretPos=3440,0
+Address1=
+Address2=
+Address3=
+Address4=
+Address5=
+Address6=
+Address7=
+Address8=
+Address9=
+Address10=
+Address11=
+Address12=
+Address13=
+Address14=
+Address15=
+Address16=
+Data1=
+Data2=
+Data3=
+Data4=
+Data5=
+Data6=
+Data7=
+Data8=
+Data9=
+Data10=
+Data11=
+Data12=
+Data13=
+Data14=
+Data15=
+Data16=
+Case=ON
+Scan=OFF
+Direction=Down
+FindStart=
+FindEnd=
+SaveRange=Screen
+SaveStart=
+SaveEnd=
+[Memory]
+Geometry=672, -2, 665, 836
+Window=Normal
+Boundary=163
+Format=Hex
+Mode=Byte
+Endian=Little
+Ascii=OFF
+Idtag=OFF
+Address=
+DispStart=000FFAE0
+CaretPosData=44, 65490
+CaretPosAscii=0, 65424
+Address1=
+Address2=
+Address3=
+Address4=
+Address5=
+Address6=
+Address7=
+Address8=
+Address9=
+Address10=
+Address11=
+Address12=
+Address13=
+Address14=
+Address15=
+Address16=
+Data1=
+Data2=
+Data3=
+Data4=
+Data5=
+Data6=
+Data7=
+Data8=
+Data9=
+Data10=
+Data11=
+Data12=
+Data13=
+Data14=
+Data15=
+Data16=
+Binary=ON
+Scan=OFF
+Direction=DOWN
+FindStart=
+FindEnd=
+Unit=Byte
+SaveRange=Screen
+SaveStart=
+SaveEnd=
+Accumulative=ON
+[Memory fill]
+Scope=0, 0
+Code=0
+[Memory copy]
+Scope=0, 0
+To=0
+[Memory compare]
+Source=0, 0
+Destination=0
+[I/O Port]
+Line=0
+[Stack]
+Geometry=0, 0, 400, 300
+Window=Normal
+Boundary=13762687
+Mode=Proper
+[Sfr]
+Geometry=0, 0, 0, 0
+Window=Hide
+Address1=
+Address2=
+Address3=
+Address4=
+Address5=
+Address6=
+Address7=
+Address8=
+Address9=
+Address10=
+Address11=
+Address12=
+Address13=
+Address14=
+Address15=
+Address16=
+Boundary=0, 0
+Mode=Hex
+Attribute=Show
+Sort=Address
+Pickup=OFF
+SelectSort=Address
+Last Name=
+Line=531
+L1=P0
+L2=P1
+L3=P2
+L4=P3
+L5=P4
+L6=P5
+L7=P6
+L8=P7
+L9=P12
+L10=P14
+L11=P15
+L12=SDR00
+L13=SIO00
+L14=TXD0
+L15=SDR01
+L16=RXD0
+L17=SIO01
+L18=TDR00
+L19=TDR01
+L20=ADCRH
+L21=PM0
+L22=PM1
+L23=PM2
+L24=PM3
+L25=PM4
+L26=PM5
+L27=PM6
+L28=PM7
+L29=PM12
+L30=PM14
+L31=PM15
+L32=ADM
+L33=ADCE
+L34=ADCS
+L35=ADS
+L36=KRM
+L37=EGP0
+L38=EGN0
+L39=ISC
+L40=TIS0
+L41=SDR02
+L42=SIO10
+L43=TXD1
+L44=SDR03
+L45=RXD1
+L46=IICA0
+L47=IICS0
+L48=SPD0
+L49=STD0
+L50=ACKD0
+L51=TRC0
+L52=COI0
+L53=EXC0
+L54=ALD0
+L55=MSTS0
+L56=IICF0
+L57=IICRSV0
+L58=STCEN0
+L59=IICBSY0
+L60=STCF0
+L61=TDR02
+L62=TDR03
+L63=TDR04
+L64=TDR05
+L65=TDR06
+L66=TDR07
+L67=RSUBC
+L68=SEC
+L69=MIN
+L70=HOUR
+L71=WEEK
+L72=DAY
+L73=MONTH
+L74=YEAR
+L75=SUBCUD
+L76=ALARMWM
+L77=ALARMWH
+L78=ALARMWW
+L79=RTCC0
+L80=RCLOE0
+L81=RCLOE1
+L82=RTCE
+L83=RTCC1
+L84=RWAIT
+L85=RWST
+L86=RIFG
+L87=WAFG
+L88=WALIE
+L89=WALE
+L90=RTCC2
+L91=RCKDIV
+L92=RCLOE2
+L93=RINTE
+L94=CMC
+L95=CSC
+L96=HIOSTOP
+L97=XTSTOP
+L98=MSTOP
+L99=OSTC
+L100=OSTS
+L101=CKC
+L102=MCM0
+L103=MCS
+L104=CSS
+L105=CLS
+L106=CKS0
+L107=PCLOE0
+L108=CKS1
+L109=PCLOE1
+L110=RESF
+L111=LVIM
+L112=LVIF
+L113=LVIMD
+L114=LVISEL
+L115=LVION
+L116=LVIS
+L117=WDTE
+L118=DSA0
+L119=DSA1
+L120=DRA0
+L121=DRA0L
+L122=DRA0H
+L123=DRA1
+L124=DRA1L
+L125=DRA1H
+L126=DBC0
+L127=DBC0L
+L128=DBC0H
+L129=DBC1
+L130=DBC1L
+L131=DBC1H
+L132=DMC0
+L133=DWAIT0
+L134=DS0
+L135=DRS0
+L136=STG0
+L137=DMC1
+L138=DWAIT1
+L139=DS1
+L140=DRS1
+L141=STG1
+L142=DRC0
+L143=DST0
+L144=DEN0
+L145=DRC1
+L146=DST1
+L147=DEN1
+L148=BECTL
+L149=FLMDPUP
+L150=PFCMD
+L151=PFS
+L152=FPRERR
+L153=FLPMC
+L154=BFAEN
+L155=FWEPR
+L156=BRAMEN
+L157=IF2
+L158=IF2L
+L159=TMIF05
+L160=TMIF06
+L161=TMIF07
+L162=PIF6
+L163=IF2H
+L164=IICAIF1
+L165=PIF20
+L166=PIF21
+L167=PIF22
+L168=PIF23
+L169=MK2
+L170=MK2L
+L171=TMMK05
+L172=TMMK06
+L173=TMMK07
+L174=PMK6
+L175=MK2H
+L176=IICAMK1
+L177=PMK20
+L178=PMK21
+L179=PMK22
+L180=PMK23
+L181=PR02
+L182=PR02L
+L183=TMPR005
+L184=TMPR006
+L185=TMPR007
+L186=PPR06
+L187=PR02H
+L188=IICAPR01
+L189=PPR020
+L190=PPR021
+L191=PPR022
+L192=PPR023
+L193=PR12
+L194=PR12L
+L195=TMPR105
+L196=TMPR106
+L197=TMPR107
+L198=PPR16
+L199=PR12H
+L200=IICAPR11
+L201=PPR120
+L202=PPR121
+L203=PPR122
+L204=PPR123
+L205=IF0
+L206=IF0L
+L207=WDTIIF
+L208=LVIIF
+L209=PIF0
+L210=PIF1
+L211=PIF2
+L212=PIF4
+L213=PIF5
+L214=IF0H
+L215=DMAIF0
+L216=DMAIF1
+L217=CSIIF00
+L218=STIF0
+L219=CSIIF01
+L220=SRIF0
+L221=SREIF0
+L222=IF1
+L223=IF1L
+L224=CSIIF10
+L225=IICIF10
+L226=STIF1
+L227=SRIF1
+L228=SREIF1
+L229=IICAIF0
+L230=TMIF00
+L231=TMIF01
+L232=TMIF02
+L233=TMIF03
+L234=IF1H
+L235=ADIF
+L236=RTCIF
+L237=RTCIIF
+L238=KRIF
+L239=MDIF
+L240=TMIF04
+L241=MK0
+L242=MK0L
+L243=WDTIMK
+L244=LVIMK
+L245=PMK0
+L246=PMK1
+L247=PMK2
+L248=PMK4
+L249=PMK5
+L250=MK0H
+L251=DMAMK0
+L252=DMAMK1
+L253=CSIMK00
+L254=STMK0
+L255=CSIMK01
+L256=SRMK0
+L257=SREMK0
+L258=MK1
+L259=MK1L
+L260=CSIMK10
+L261=IICMK10
+L262=STMK1
+L263=SRMK1
+L264=SREMK1
+L265=IICAMK0
+L266=TMMK00
+L267=TMMK01
+L268=TMMK02
+L269=TMMK03
+L270=MK1H
+L271=ADMK
+L272=RTCMK
+L273=RTCIMK
+L274=KRMK
+L275=MDMK
+L276=TMMK04
+L277=PR00
+L278=PR00L
+L279=WDTIPR0
+L280=LVIPR0
+L281=PPR00
+L282=PPR01
+L283=PPR02
+L284=PPR04
+L285=PPR05
+L286=PR00H
+L287=DMAPR00
+L288=DMAPR01
+L289=CSIPR000
+L290=STPR00
+L291=CSIPR001
+L292=SRPR00
+L293=SREPR00
+L294=PR01
+L295=PR01L
+L296=CSIPR010
+L297=IICPR010
+L298=STPR01
+L299=SRPR01
+L300=SREPR01
+L301=IICAPR00
+L302=TMPR000
+L303=TMPR001
+L304=TMPR002
+L305=TMPR003
+L306=PR01H
+L307=ADPR0
+L308=RTCPR0
+L309=RTCIPR0
+L310=KRPR0
+L311=MDPR0
+L312=TMPR004
+L313=PR10
+L314=PR10L
+L315=WDTIPR1
+L316=LVIPR1
+L317=PPR10
+L318=PPR11
+L319=PPR12
+L320=PPR14
+L321=PPR15
+L322=PR10H
+L323=DMAPR10
+L324=DMAPR11
+L325=CSIPR100
+L326=STPR10
+L327=CSIPR101
+L328=SRPR10
+L329=SREPR10
+L330=PR11
+L331=PR11L
+L332=CSIPR110
+L333=IICPR110
+L334=STPR11
+L335=SRPR11
+L336=SREPR11
+L337=IICAPR10
+L338=TMPR100
+L339=TMPR101
+L340=TMPR102
+L341=TMPR103
+L342=PR11H
+L343=ADPR1
+L344=RTCPR1
+L345=RTCIPR1
+L346=KRPR1
+L347=MDPR1
+L348=TMPR104
+L349=MDAL
+L350=MULA
+L351=MDAH
+L352=MULB
+L353=MDBH
+L354=MULOH
+L355=MDBL
+L356=MULOL
+L357=PMC
+L358=MAA
+L359=ADPC
+L360=PU0
+L361=PU1
+L362=PU3
+L363=PU4
+L364=PU5
+L365=PU7
+L366=PU12
+L367=PU14
+L368=PIM3
+L369=PIM7
+L370=POM3
+L371=POM7
+L372=NFEN0
+L373=NFEN1
+L374=NFEN2
+L375=MDCL
+L376=MDCH
+L377=MDUC
+L378=DIVST
+L379=DIVMODE
+L380=PER0
+L381=SAU0EN
+L382=IICA0EN
+L383=ADCEN
+L384=RTCEN
+L385=PER2
+L386=TAU0EN
+L387=OSMC
+L388=BCDADJ
+L389=SSR00
+L390=SSR00L
+L391=SSR01
+L392=SSR01L
+L393=SSR02
+L394=SSR02L
+L395=SSR03
+L396=SSR03L
+L397=SIR00
+L398=SIR00L
+L399=SIR01
+L400=SIR01L
+L401=SIR02
+L402=SIR02L
+L403=SIR03
+L404=SIR03L
+L405=SMR00
+L406=SMR01
+L407=SMR02
+L408=SMR03
+L409=SCR00
+L410=SCR01
+L411=SCR02
+L412=SCR03
+L413=SE0
+L414=SE0L
+L415=SS0
+L416=SS0L
+L417=ST0
+L418=ST0L
+L419=SPS0
+L420=SPS0L
+L421=SO0
+L422=SOE0
+L423=SOE0L
+L424=SOL0
+L425=SOL0L
+L426=TCR00
+L427=TCR01
+L428=TCR02
+L429=TCR03
+L430=TCR04
+L431=TCR05
+L432=TCR06
+L433=TCR07
+L434=TMR00
+L435=TMR01
+L436=TMR02
+L437=TMR03
+L438=TMR04
+L439=TMR05
+L440=TMR06
+L441=TMR07
+L442=TSR00
+L443=TSR00L
+L444=TSR01
+L445=TSR01L
+L446=TSR02
+L447=TSR02L
+L448=TSR03
+L449=TSR03L
+L450=TSR04
+L451=TSR04L
+L452=TSR05
+L453=TSR05L
+L454=TSR06
+L455=TSR06L
+L456=TSR07
+L457=TSR07L
+L458=TE0
+L459=TE0L
+L460=TS0
+L461=TS0L
+L462=TT0
+L463=TT0L
+L464=TPS0
+L465=TPS0L
+L466=TO0
+L467=TO0L
+L468=TOE0
+L469=TOE0L
+L470=TOL0
+L471=TOL0L
+L472=TOM0
+L473=TOM0L
+L474=IICCTL00
+L475=SPT0
+L476=STT0
+L477=ACKE0
+L478=WTIM0
+L479=SPIE0
+L480=WREL0
+L481=LREL0
+L482=IICE0
+L483=IICCTL10
+L484=DFC0
+L485=SMC0
+L486=DAD0
+L487=CLD0
+L488=WUP0
+L489=IICWL0
+L490=IICWH0
+L491=SVA0
+L492=PER3
+L493=IICA1EN
+L494=P20
+L495=PM20
+L496=PU20
+L497=EGP2
+L498=EGN2
+L499=IICA1
+L500=IICS1
+L501=SPD1
+L502=STD1
+L503=ACKD1
+L504=TRC1
+L505=COI1
+L506=EXC1
+L507=ALD1
+L508=MSTS1
+L509=IICF1
+L510=IICRSV1
+L511=STCEN1
+L512=IICBSY1
+L513=STCF1
+L514=IICCTL01
+L515=SPT1
+L516=STT1
+L517=ACKE1
+L518=WTIM1
+L519=SPIE1
+L520=WREL1
+L521=LREL1
+L522=IICE1
+L523=IICCTL11
+L524=DFC1
+L525=SMC1
+L526=DAD1
+L527=CLD1
+L528=WUP1
+L529=IICWL1
+L530=IICWH1
+L531=SVA1
+[Local Variable]
+Geometry=0, 0, 0, 0
+Window=Hide
+Boundary=0
+Mode=Proper
+[Trace View]
+Geometry=0, 0, 0, 0
+Window=Hide
+Mode=Normal
+Frame=Show
+Timetag=Clock
+Address=Show
+Data=Hex
+Status=Show
+Address2=Show
+Data2=Hex
+Status2=Show
+Disasm=Show
+Pick Up=Off
+Synchronize=0 0 0 0
+Frameno=
+Frameno1=
+Frameno2=
+Frameno3=
+Frameno4=
+Frameno5=
+Frameno6=
+Frameno7=
+Frameno8=
+Frameno9=
+Frameno10=
+Frameno11=
+Frameno12=
+Frameno13=
+Frameno14=
+Frameno15=
+Frameno16=
+ScanStatus=ALL
+Access Size=B
+ScanAddress=<>-<>
+Mask Address=
+ScanData=
+Mask Data=
+ScanExternal=
+Mask External=
+Scan=OFF
+Direction=Down
+FindStart=
+FindEnd=
+SaveRange=Screen
+SaveStart=
+SaveEnd=
+[Register]
+Geometry=1328, 14, 250, 303
+Window=Normal
+Mode=Hex
+Boundary=110
+Pickup=OFF
+Name=Functional
+Register Bank=0
+RP0=3
+RP1=3
+RP2=3
+RP3=3
+PC=3
+SP=3
+PSW=3
+ES=3
+CS=3
+[Event Manager]
+Geometry=0, 0, 0, 0
+Window=Hide
+Sort by=Unsort
+Detail=OFF
+[Event Set]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Event Link]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Break]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Trace]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Delay Count0=2
+Count=0
+[Snap]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Stub]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Timer]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+TimerRateRunBreak=0011
+TimerBreakOutRunBreak=OFF
+Count=0
+[Timer Monitor]
+Count=0
+[Dmm]
+Geometry=0, 0, 0, 0
+Window=Hide
+Manager=ON
+Sort by=Unsort
+Detail=OFF
+Last Name=
+Count=0
+[Variable]
+Geometry=1097, 414, 440, 666
+Window=Normal
+Boundary=13762700
+0=.pwsw_timeout,D,N,A,+,1
+1=.krmk,P,S,A,+,1
+2=.0xffd32,P,L,A,+,1
+3=.task_interval,P,N,A,+,1
+4=.SW_pow_count,P,N,A,+,1
+5=+system_status,.,N,A,-,1
+Line=6
+[Quick Watch]
+0=system_status,P,A,1
+1=tasks,P,A,1
+2=0xFD32,P,A,1
+3=0fd32h,P,A,1
+4=0xffd32,P,A,1
+5=mrmk,P,A,1
+6=krmk,P,A,1
+7=pwsw_timeout,P,A,1
+8=SW_pow_count,P,A,1
+9=task_interval,P,A,1
+10=
+11=
+12=
+13=
+14=
+15=
+[Software Break]
+Geometry=0, 0, 0, 0
+Window=Hide
+Width=150 30 200 100
+Name0=Swb00001
+Address0=task_sys.c#_tsk_sys+0x2e2
+Window0=ASM
+Status0=ON
+Name1=Swb00002
+Address1=task_sys.c#_tsk_sys+0xa7
+Window1=ASM
+Status1=ON
+Name2=Swb00003
+Address2=task_sys.c#_tsk_sys+0x83
+Window2=ASM
+Status2=ON
+Name3=Swb00004
+Address3=task_sys.c#_tsk_sys+0x49
+Window3=ASM
+Status3=ON
+Name4=Swb00007
+Address4=task_sys.c#_tsk_sys+0x5f
+Window4=ASM
+Status4=ON
+Name5=Swb00005
+Address5=vreg_ctr.c#_vreg_ctr_write+0x353
+Window5=ASM
+Status5=ON
+Name6=Swb00006
+Address6=vreg_ctr.c#_vreg_ctr_write+0x343
+Window6=ASM
+Status6=ON
+Count=7
+[Reset]
+Debugger=ON
+Symbol=OFF
+Target CPU=OFF
+[Symbol]
+Data1=9F  , 16
+[Extended Option]
+OnClick Software Break=ON
+TraceTimetag=x1
+Redraw=500
+Break When Access Function=OFF
+Break When Access Whole=Select
+Verify=ON
+Break Sound=ON
+TraceAutoClear=OFF
+RRM Clock=Internal
+CKC Register Value=0x09
+RRM Internal Clock Frequency=8.000
+[About]
+Version=Program
+[Pseudo Emulation]
+Geometry=0, 0, 0, 0
+Window=Hide
+[Data Flash Option]
+Data Flash Emulation=OFF
+[List]
+Geometry=0, 0, 0, 0
+Window=Hide
+[Console]
+Geometry=0, 0, 0, 0
+Window=Hide
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.prj b/tags/SDK3.0(2.00)/yav_mcu_bsr.prj
new file mode 100644
index 0000000..85b660b
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.prj
@@ -0,0 +1,1062 @@
+[ProjectManager]
+Version=6.00
+Path=C:\78k_data\yav-mcu-basara\branches\sim\
+Title=yav-mcu
+Series=78K0R.PM
+Device=uPD79F0104
+DeviceVer=E1.00b
+DebugMode=1
+Target=bsr.lmf
+[BuildMode0]
+BuildModeName=Debug Build
+TargetFile=0
+[BuildMode1]
+BuildModeName=Release Build
+TargetFile=0
+[Tools]
+MakeFile=yav_mcu_bsr.mak
+Debugger=C:\Program Files (x86)\NEC Electronics Tools\ID78K0R-QB\V3.61\BIN\IDK0R32G.EXE
+DebOption=
+DebCpuReset=1
+DebSymReset=1
+MuitiLoad=0
+LoadPrjNum=0
+CheckVersion=CC78K0R|W2.13;RA78K0R|W1.33
+[Option.IDK0R32G]
+File=\\tsclient\C\78k_data\yav-mcu-basara\branches\sim\yav_mcu_bsr.pri
+[BuildMode2]
+BuildModeName=K0R_dbg
+TargetFile=0
+[BuildMode3]
+BuildModeName=BSR_dbg
+TargetFile=0
+[BuildMode4]
+BuildModeName=BSR_rel
+TargetFile=0
+[BuildMode5]
+BuildModeName=BSR_WM0
+TargetFile=0
+[Options.OC78K0R 0]
+Version=100
+O0=.\bsr.hex
+O1=bsr.hex
+UC=1
+UN=FF
+UST=
+USZ=
+K=1
+ZF=0
+S=1
+E=0
+CommandFile=0
+[Options.OC78K0R 1]
+Version=100
+UC=1
+UN=FF
+UST=
+USZ=
+K=1
+ZF=0
+S=1
+E=0
+CommandFile=0
+[Options.OC78K0R 2]
+Version=100
+O0=.\bsr.hex
+O1=bsr.hex
+UC=0
+UN=FF
+UST=
+USZ=
+K=0
+ZF=0
+S=1
+E=0
+CommandFile=0
+[Options.OC78K0R 3]
+Version=100
+O0=.\bsr.hex
+O1=bsr.hex
+UC=1
+UN=FF
+UST=
+USZ=
+K=1
+ZF=0
+S=1
+E=0
+CommandFile=0
+[Options.OC78K0R 4]
+Version=100
+O0=.\bsr.hex
+O1=bsr.hex
+UC=1
+UN=FF
+UST=
+USZ=
+K=1
+ZF=0
+S=1
+E=0
+CommandFile=0
+[Options.OC78K0R 5]
+Version=100
+O0=.\bsr.hex
+O1=bsr.hex
+UC=1
+UN=FF
+UST=
+USZ=
+K=1
+ZF=0
+S=1
+E=0
+CommandFile=0
+[BuildBefore-AfterCmd]
+Before1=c:\cygwin\bin\touch magic.c
+After1=ruby nec_s_2_bsrbin2.rb bsr.hex
+[Options.RA78K0R 0]
+Version=100
+G=1
+GA=1
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[Options.RA78K0R 1]
+Version=100
+G=0
+GA=0
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[Options.RA78K0R 2]
+Version=100
+O0=
+O1=obj
+G=1
+GA=1
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[Options.RA78K0R 3]
+Version=100
+G=1
+GA=1
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[Options.RA78K0R 4]
+Version=100
+G=1
+GA=1
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[Options.RA78K0R 5]
+Version=100
+G=1
+GA=1
+E=0
+COMMON=0
+COMPATI=0
+P=1
+KA=1
+KS=0
+KX=0
+LF=0
+LW=132
+LL=0
+LT=8
+Z=0
+CommandFile=0
+RA_OPT=
+[ToolSet]
+ToolSetName=(�ύX)78K0R Software Package V1.10
+Tool1=CC78K0R|W2.13
+Tool2=RA78K0R|W1.33
+Tool3=SK78K0R|V3.10
+Tool4=ID78K0R-QB|V3.61
+[SrcFile]
+Source1=loader.c
+Source2=pm.c
+Source3=i2c_ctr.c
+Source4=main.c
+Source5=magic.c
+Source6=WDT.c
+Source7=i2c_mcu.c
+Source8=i2c_twl.c
+Source9=led.c
+Source10=rtc.c
+Source11=vreg_ctr.c
+Source12=vreg_twl.c
+Source13=adc.c
+Source14=renge\renge.c
+Source15=accero.c
+Source16=self_flash.c
+Source17=sw.c
+Source18=task_debug.c
+Source19=task_misc.c
+Source20=task_sys.c
+Source21=pedo_alg_thre_det2.c
+Source22=ini_VECT.c
+Source23=task_status.c
+Source24=led_cam.c
+Source25=led_pow.c
+Source26=hal.c
+[IncFile]
+Include1=incs_loader.h
+Include2=jhl_defs.h
+Include3=config.h
+Include4=user_define.h
+Include5=bsr_system.h
+Include6=renge\renge.h
+Include7=renge\renge_defs.h
+Include8=renge\renge_task_immediate.h
+Include9=vreg_ctr.h
+Include10=vreg_twl.h
+Include11=loader.h
+Include12=i2c_mcu.h
+Include13=WDT.h
+Include14=fsl_user.h
+Include15=i2c_ctr.h
+Include16=pm.h
+Include17=rtc.h
+Include18=reboot.h
+Include19=magic.h
+Include20=incs.h
+Include21=i2c_twl.h
+Include22=accero.h
+Include23=pedometer.h
+Include24=sw.h
+Include25=adc.h
+Include26=led.h
+Include27=batt_params.h
+Include28=pool.h
+Include29=i2c_twl_defs.h
+Include30=voltable.h
+Include31=renge\renge_task_intval.h
+Include32=self_flash.h
+Include33=pedo_lpf_coeff.h
+Include34=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h
+Include35=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\math.h
+Include36=sim\simOnWin.h
+Include37=sim\sfrAlias.h
+Include38=hal.h
+Include39=sim\sim_interrupt_decrare.c
+[Options.CC78K0R 0]
+Version=210
+Include0=renge,C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Include1=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Memorymodel=1
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=0
+Saddrglobal=1066
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=1
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=0
+Librarycall=1129
+Aggressivechk=1
+Relativebranchchk=1
+Debugoptchk=0
+Outdebugchk=1
+Outdebug=1153
+Outasmsrccmb0=inter_asm
+Outasmsrccmb1=bsr.asm
+Outasmsrcchk=1
+Outasmsrc=1158
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1174
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=0
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=1
+Commentnest=0
+Intunexpand=0
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=0
+Startupchk=1
+Fixation=1
+FarROMization=0
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rml.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VfiFileBoot0=
+VfiFileBoot1=boot.vfi
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.CC78K0R 1]
+Version=210
+Memorymodel=2
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=0
+Saddrglobal=1066
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=1
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=1
+Librarycall=1128
+Aggressivechk=1
+Relativebranchchk=0
+Debugoptchk=0
+Outdebugchk=0
+Outdebug=1153
+Outasmsrcchk=0
+Outasmsrc=1157
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1173
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=0
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=0
+Commentnest=0
+Intunexpand=0
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=1
+Startupchk=1
+Fixation=1
+FarROMization=1
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rll.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.CC78K0R 2]
+Version=210
+Define0=
+Define1=_debug_,_TEG_,proc_is_ke3
+Define2=_debug_,_TEG_,proc_is_ke3,%time%
+Define3=_TEG_,proc_is_ke3
+Define4=proc_is_ke3
+Include0=renge,C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r
+Include1=renge,C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Include2=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Memorymodel=1
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=1
+Saddrglobal=1063
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=0
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=1
+Librarycall=1129
+Aggressivechk=1
+Relativebranchchk=0
+Debugoptchk=0
+Outdebugchk=1
+Outdebug=1153
+Outobjectcmb0=
+Outobjectcmb1=obj
+Outasmsrccmb0=inter_asm
+Outasmsrccmb1=bsr.asm
+Outasmsrcchk=1
+Outasmsrc=1158
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1174
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=1
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=1
+Commentnest=0
+Intunexpand=1
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=1
+Startupchk=1
+Fixation=0
+FarROMization=0
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rm.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VfiFileBoot0=
+VfiFileBoot1=boot.vfi
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.CC78K0R 3]
+Version=210
+Define0=_debug_,proc_is_bsr,_TEG_
+Define1=_debug_,proc_is_bsr
+Define2=proc_is_bsr
+Define3=_TEG_,proc_is_ke3
+Define4=proc_is_ke3
+Include0=renge,C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Include1=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Memorymodel=1
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=0
+Saddrglobal=1066
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=1
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=0
+Librarycall=1129
+Aggressivechk=1
+Relativebranchchk=1
+Debugoptchk=0
+Outdebugchk=1
+Outdebug=1153
+Outasmsrccmb0=inter_asm
+Outasmsrccmb1=bsr.asm
+Outasmsrcchk=1
+Outasmsrc=1158
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1174
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=0
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=1
+Commentnest=0
+Intunexpand=0
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=0
+Startupchk=1
+Fixation=1
+FarROMization=0
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rml.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VfiFileBoot0=
+VfiFileBoot1=boot.vfi
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.CC78K0R 4]
+Version=210
+Define0=proc_is_bsr
+Include0=renge,C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Include1=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Memorymodel=1
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=0
+Saddrglobal=1066
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=1
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=0
+Librarycall=1129
+Aggressivechk=1
+Relativebranchchk=1
+Debugoptchk=0
+Outdebugchk=1
+Outdebug=1153
+Outasmsrccmb0=inter_asm
+Outasmsrccmb1=bsr.asm
+Outasmsrcchk=1
+Outasmsrc=1158
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1174
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=0
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=1
+Commentnest=0
+Intunexpand=0
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=0
+Startupchk=1
+Fixation=1
+FarROMization=0
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rml.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VfiFileBoot0=
+VfiFileBoot1=boot.vfi
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.CC78K0R 5]
+Version=210
+Define0=
+Define1=_debug_,proc_is_bsr,_TEG_,_WM0_
+Define2=_debug_,proc_is_bsr,_TEG_,_WM0
+Define3=_debug_,proc_is_bsr,_TEG_
+Define4=_debug_,proc_is_bsr
+Include0=renge,C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Include1=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r
+Memorymodel=1
+Flashobj=0
+FlashStartadr=
+FlashBranchStartadr=
+Mirror=0
+Saddrglobalchk=0
+Saddrglobal=1066
+Saddrstaticchk=0
+Saddrstatic=1072
+Bitfieldmsb=0
+Onebytechk=0
+Pacstructchk=0
+AssignROMchk=0
+AssignROM=0
+Maxoptimizechk=0
+Maxoptimize=1104
+Charunexpandchk=1
+Unsignedchar=0
+Usesaddrchk=0
+Autoallocationchk=1
+Jumpoptimize=1
+Librarycallchk=0
+Librarycall=1129
+Aggressivechk=1
+Relativebranchchk=1
+Debugoptchk=0
+Outdebugchk=1
+Outdebug=1153
+Outasmsrccmb0=inter_asm
+Outasmsrccmb1=bsr.asm
+Outasmsrcchk=1
+Outasmsrc=1158
+Outasmoptall=1
+Common=0
+Outerrlistchk=0
+Outerrlist=1174
+Xreference=0
+Preprocess=0
+Prenocomment=0
+Predefine=0
+Preifdef=1
+Preinclude=0
+Preline=1
+Prenumber=1
+Formfeed=0
+Columns=132
+Lines=0
+Tablength=8
+Ansi=0
+Cpraspras=1
+Commentnest=0
+Intunexpand=0
+Kanjicode=1210
+Verbose=0
+CommandFile=0
+Warninglevel=0
+Startupchk=1
+Fixation=1
+FarROMization=0
+Objectsel=1305
+Librarychk=1
+Floatingpoint=0
+Muldivunit=1
+Mulunit=1
+Startup=s0rml.rel
+Library1=cl0rdm.lib
+Library2=cl0rm.lib
+Library3=cl0rmf.lib
+VfiFileBoot0=
+VfiFileBoot1=boot.vfi
+VF78K0Rchk=0
+VF78K0Rvs=
+[Options.LK78K0R 0]
+Version=100
+O0=bsr_k0r.lmf
+O1=bsr.lmf
+O2=flash.lmf
+O3=a.lmf
+G=1
+E=0
+E0=flash.elk
+E1=a.elk
+GO=1
+GOValue=85
+GOStart=FC00
+GOSizeValue=1024
+GI=1
+GIValue=FFFFFFFFFFFFFFFFFFFF
+CCZA=0
+MemInfoCheck=1
+P=1
+P0=bsr_k0r.map
+P1=bsr.map
+P2=flash.map
+P3=a.map
+MI=0
+GB=1
+GBValue=6EFBFF
+KM=1
+KD=0
+KP=1
+KL=0
+LF=0
+LL=0
+B0=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib
+D0=bsr_mcu.dr
+D1=user_area.dr
+S=1
+W=0
+SELFCheck=1
+SELF=0
+ZB=
+Etcetera0=
+Etcetera1=boot.lmf
+CommandFile=0
+[Options.LK78K0R 1]
+Version=100
+O0=a.lmf
+G=0
+E=0
+E0=a.elk
+GO=0
+GOValue=
+GOStart=FC00
+GOSizeValue=1024
+GI=0
+GIValue=FFFFFFFFFFFFFFFFFFFF
+CCZA=1
+MemInfoCheck=0
+P=1
+P0=a.map
+MI=0
+GB=0
+GBValue=
+KM=1
+KD=1
+KP=0
+KL=0
+LF=0
+LL=0
+S=0
+W=1
+SELFCheck=0
+SELF=0
+ZB=
+CommandFile=0
+[Options.LK78K0R 2]
+Version=100
+O0=bsr.lmf
+O1=bsr_k0r.lmf
+O2=flash.lmf
+O3=a.lmf
+G=1
+E=0
+E0=flash.elk
+E1=a.elk
+GO=0
+GOValue=85
+GOStart=FC00
+GOSizeValue=1024
+GI=1
+GIValue=1B339499E033F240BFAA
+CCZA=0
+MemInfoCheck=1
+P=1
+P0=bsr_k0r.map
+P1=bsr.map
+P2=flash.map
+P3=a.map
+MI=0
+GB=1
+GBValue=7EFBFF
+KM=1
+KD=0
+KP=0
+KL=0
+LF=0
+LL=0
+B0=C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r\fsl.lib
+B1=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib
+D0=bsr_mcu.dr
+D1=user_area.dr
+S=1
+W=0
+SELFCheck=0
+SELF=0
+ZB=
+Etcetera0=
+Etcetera1=boot.lmf
+CommandFile=0
+OFILE=C:\78k_data\yav-mcu-basara\branches\sim\bsr.lmf
+[Options.LK78K0R 3]
+Version=100
+O0=bsr_bsr.lmf
+O1=bsr_k0r.lmf
+O2=bsr.lmf
+O3=flash.lmf
+O4=a.lmf
+G=1
+E=0
+E0=flash.elk
+E1=a.elk
+GO=1
+GOValue=85
+GOStart=FC00
+GOSizeValue=1024
+GI=1
+GIValue=FFFFFFFFFFFFFFFFFFFF
+CCZA=0
+MemInfoCheck=1
+P=1
+P0=bsr_bsr.map
+P1=bsr_k0r.map
+P2=bsr.map
+P3=flash.map
+P4=a.map
+MI=0
+GB=1
+GBValue=6EFBFF
+KM=1
+KD=0
+KP=1
+KL=0
+LF=0
+LL=0
+B0=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib
+D0=bsr_mcu.dr
+D1=user_area.dr
+S=1
+W=2
+SELFCheck=0
+SELF=0
+ZB=
+Etcetera0=
+Etcetera1=boot.lmf
+CommandFile=0
+[Options.LK78K0R 4]
+Version=100
+O0=bsr_k0r.lmf
+O1=bsr.lmf
+O2=flash.lmf
+O3=a.lmf
+G=1
+E=0
+E0=flash.elk
+E1=a.elk
+GO=1
+GOValue=85
+GOStart=FC00
+GOSizeValue=1024
+GI=1
+GIValue=FFFFFFFFFFFFFFFFFFFF
+CCZA=0
+MemInfoCheck=1
+P=1
+P0=bsr_k0r.map
+P1=bsr.map
+P2=flash.map
+P3=a.map
+MI=0
+GB=1
+GBValue=6EFBFF
+KM=1
+KD=0
+KP=1
+KL=0
+LF=0
+LL=0
+B0=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib
+D0=bsr_mcu.dr
+D1=user_area.dr
+S=1
+W=0
+SELFCheck=1
+SELF=0
+ZB=
+Etcetera0=
+Etcetera1=boot.lmf
+CommandFile=0
+[Options.LK78K0R 5]
+Version=100
+O0=bsr_bsr.lmf
+O1=bsr_k0r.lmf
+O2=bsr.lmf
+O3=flash.lmf
+O4=a.lmf
+G=1
+E=0
+E0=flash.elk
+E1=a.elk
+GO=1
+GOValue=85
+GOStart=FC00
+GOSizeValue=1024
+GI=1
+GIValue=FFFFFFFFFFFFFFFFFFFF
+CCZA=0
+MemInfoCheck=1
+P=1
+P0=bsr_bsr.map
+P1=bsr_k0r.map
+P2=bsr.map
+P3=flash.map
+P4=a.map
+MI=0
+GB=1
+GBValue=6EFBFF
+KM=1
+KD=0
+KP=1
+KL=0
+LF=0
+LL=0
+B0=C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib
+D0=bsr_mcu.dr
+D1=user_area.dr
+S=1
+W=2
+SELFCheck=0
+SELF=0
+ZB=
+Etcetera0=
+Etcetera1=boot.lmf
+CommandFile=0
+[Options.LCNV78K0R 0]
+Version=100
+LCNV_GO=0
+E=0
+CommandFile=0
+[Options.LCNV78K0R 1]
+Version=100
+LCNV_GO=0
+E=0
+CommandFile=0
+[Options.LCNV78K0R 2]
+Version=100
+LCNV_GO=0
+O0=inter_asm
+E=0
+CommandFile=0
+[Options.LCNV78K0R 3]
+Version=100
+LCNV_GO=0
+E=0
+CommandFile=0
+[Options.LCNV78K0R 4]
+Version=100
+LCNV_GO=0
+E=0
+CommandFile=0
+[Options.LCNV78K0R 5]
+Version=100
+LCNV_GO=0
+E=0
+CommandFile=0
+[Options.78K0R]
+BuildMode=2
+BuildMode2=K0R_dbg
+BuildMode3=BSR_dbg
+BuildMode4=BSR_rel
+BuildMode5=BSR_WM0
+DefaultMode2=1
+DefaultMode3=1
+DefaultMode4=1
+DefaultMode5=1
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.prk b/tags/SDK3.0(2.00)/yav_mcu_bsr.prk
new file mode 100644
index 0000000..6c71169
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.prk
@@ -0,0 +1,15 @@
+[ProjectManager]
+FrameMax=0
+FrameX=402
+FrameY=228
+FrameCX=1440
+FrameCY=895
+OpenFile1=ProjectWindow
+PrjPos=0,0,706,0,291
+OpenFile2=task_sys.c,0,225,225,1395,726,0,369,0,0
+OpenFile3=config.h,0,0,0,1170,501,24,24,24,0
+OpenFile4=OutputWindow
+OutputPos=0,16,707,587,1440
+ActivePRJ=yav_mcu_bsr.prj
+[ProjectWindow]
+ProjectWindowDispType=0
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.prw b/tags/SDK3.0(2.00)/yav_mcu_bsr.prw
new file mode 100644
index 0000000..7c0bbd6
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.prw
@@ -0,0 +1,8 @@
+[System]
+System1=default
+[default]
+Project1=yav_mcu_bsr.prj
+[BATCH_BUILD]
+Build1=yav_mcu_bsr.prj,Debug Build,1
+Build2=yav_mcu_bsr.prj,Release Build,0
+Build3=yav_mcu_bsr.prj,BSR_WM0,0
diff --git a/tags/SDK3.0(2.00)/yav_mcu_bsr.sdb b/tags/SDK3.0(2.00)/yav_mcu_bsr.sdb
new file mode 100644
index 0000000..72a55dd
--- /dev/null
+++ b/tags/SDK3.0(2.00)/yav_mcu_bsr.sdb
@@ -0,0 +1,298 @@
+[SdbInfo]
+Ver=5
+[loader.c]
+T=4e0a86c1
+1=incs_loader.h
+2=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h
+3=fsl_user.h
+4=i2c_ctr.h
+5=i2c_mcu.h
+6=pm.h
+7=rtc.h
+8=reboot.h
+9=magic.h
+[pm.c]
+T=4e1c1434
+1=incs.h
+2=adc.h
+3=led.h
+4=pm.h
+5=renge\renge.h
+6=batt_params.h
+7=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h
+8=fsl_user.h
+[i2c_ctr.c]
+T=4e1d54ae
+1=config.h
+2=incs.h
+[main.c]
+T=4e0af952
+1=incs_loader.h
+2=WDT.h
+3=rtc.h
+4=pm.h
+5=accero.h
+6=led.h
+7=adc.h
+8=pool.h
+[magic.c]
+T=4e1d56d9
+1=config.h
+2=magic.h
+[WDT.c]
+T=4dfae637
+1=incs_loader.h
+[i2c_mcu.c]
+T=4e1d47dd
+1=incs_loader.h
+2=i2c_mcu.h
+[i2c_twl.c]
+T=4e0c1e90
+1=config.h
+2=incs.h
+3=i2c_twl_defs.h
+4=i2c_twl.h
+[led.c]
+T=4dfafb99
+1=incs.h
+2=led.h
+[rtc.c]
+T=4dfb0204
+1=incs.h
+[vreg_ctr.c]
+T=4e1a3d56
+1=incs.h
+2=vreg_ctr.h
+3=rtc.h
+4=led.h
+5=accero.h
+6=pm.h
+7=pool.h
+8=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h
+9=fsl_user.h
+[vreg_twl.c]
+T=4df868b8
+1=incs.h
+2=jhl_defs.h
+3=led.h
+4=vreg_twl.h
+5=vreg_ctr.h
+[adc.c]
+T=4e1c11e5
+1=incs.h
+2=adc.h
+3=pm.h
+4=led.h
+5=vreg_twl.h
+6=voltable.h
+[renge\renge.c]
+T=4e093f8f
+1=renge\renge.h
+2=renge\renge_task_intval.h
+3=renge\renge_task_immediate.h
+4=WDT.h
+5=config.h
+6=user_define.h
+7=sim\simOnWin.h
+8=bsr_system.h
+[accero.c]
+T=4dff0001
+1=config.h
+2=incs.h
+3=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\math.h
+[self_flash.c]
+T=4e166b67
+1=incs_loader.h
+2=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h
+3=fsl_user.h
+4=i2c_ctr.h
+5=pool.h
+6=magic.h
+7=pm.h
+[sw.c]
+T=4e166bf3
+1=incs.h
+2=i2c_twl.h
+3=i2c_ctr.h
+4=led.h
+5=pm.h
+6=rtc.h
+7=sw.h
+[task_debug.c]
+T=4dfae637
+1=incs_loader.h
+2=renge\renge.h
+3=pm.h
+4=accero.h
+[task_misc.c]
+T=4e1c12df
+1=incs.h
+2=renge\renge.h
+3=pm.h
+4=accero.h
+5=adc.h
+6=i2c_mcu.h
+7=led.h
+8=vreg_twl.h
+[task_sys.c]
+T=4e1a935d
+1=incs.h
+2=i2c_twl.h
+3=i2c_ctr.h
+4=led.h
+5=accero.h
+6=pm.h
+7=rtc.h
+8=sw.h
+9=adc.h
+10=self_flash.h
+[pedo_alg_thre_det2.c]
+T=4e1a3cda
+1=incs.h
+2=..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\math.h
+3=accero.h
+4=pedometer.h
+5=pedo_lpf_coeff.h
+6=pool.h
+[ini_VECT.c]
+T=4dfaf66c
+1=config.h
+[task_status.c]
+T=4e1abbad
+1=incs_loader.h
+2=renge\renge.h
+3=hal.h
+4=pm.h
+5=accero.h
+6=adc.h
+7=i2c_mcu.h
+8=led.h
+[led_cam.c]
+T=4dfae24c
+1=incs.h
+2=led.h
+[led_pow.c]
+T=4dfae637
+1=incs.h
+2=led.h
+[hal.c]
+T=4e1d5591
+1=incs_loader.h
+[incs_loader.h]
+T=4e156766
+1=sim\simOnWin.h
+2=jhl_defs.h
+3=user_define.h
+4=hal.h
+5=bsr_system.h
+6=renge\renge.h
+7=vreg_ctr.h
+8=vreg_twl.h
+9=loader.h
+10=i2c_mcu.h
+11=WDT.h
+[jhl_defs.h]
+T=4df868b8
+1=config.h
+[config.h]
+T=4e16b88c
+[user_define.h]
+T=4e169edd
+[bsr_system.h]
+T=4df868b8
+[renge\renge.h]
+T=4df868b6
+1=renge\renge_defs.h
+2=renge\renge_task_immediate.h
+[renge\renge_defs.h]
+T=4dfae85a
+[renge\renge_task_immediate.h]
+T=4df868b6
+1=renge\renge_defs.h
+[vreg_ctr.h]
+T=4e1c100c
+1=config.h
+[vreg_twl.h]
+T=4df868b8
+[loader.h]
+T=4df868b8
+[i2c_mcu.h]
+T=4df868b8
+[WDT.h]
+T=4df868b8
+[fsl_user.h]
+T=4dfea7e9
+[i2c_ctr.h]
+T=4df868b9
+[pm.h]
+T=4dfef02d
+[rtc.h]
+T=4df868b9
+[reboot.h]
+T=4df868b8
+[magic.h]
+T=4df868b8
+[incs.h]
+T=4e15675d
+1=sim\simOnWin.h
+2=jhl_defs.h
+3=user_define.h
+4=hal.h
+5=bsr_system.h
+6=renge\renge.h
+7=loader.h
+8=vreg_ctr.h
+9=vreg_twl.h
+10=i2c_mcu.h
+11=i2c_twl.h
+12=rtc.h
+13=accero.h
+14=pm.h
+15=sw.h
+16=adc.h
+17=WDT.h
+[i2c_twl.h]
+T=4df868b8
+[accero.h]
+T=4df868b8
+1=jhl_defs.h
+2=pedometer.h
+[pedometer.h]
+T=4e1a3cda
+[sw.h]
+T=4df868b8
+1=config.h
+[adc.h]
+T=4df868b8
+1=jhl_defs.h
+[led.h]
+T=4e169c84
+[batt_params.h]
+T=4df868b9
+1=jhl_defs.h
+[pool.h]
+T=4df868b8
+1=pedometer.h
+[i2c_twl_defs.h]
+T=4df868b8
+[voltable.h]
+T=4df868b8
+[renge\renge_task_intval.h]
+T=4df868b6
+1=renge\renge_defs.h
+[self_flash.h]
+T=4df868b8
+[pedo_lpf_coeff.h]
+T=4df868b9
+[..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\fsl.h]
+T=49a3bd4e
+[..\..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r\math.h]
+T=45f12258
+[sim\simOnWin.h]
+T=4e0014e7
+1=sim\sfrAlias.h
+[sim\sfrAlias.h]
+T=4e169edd
+1=config.h
+[hal.h]
+T=4e16a2b4
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