mirror of
https://github.com/rvtr/ctr_mcu.git
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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@136 013db118-44a6-b54f-8bf7-843cb86687b1
This commit is contained in:
parent
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commit
65a94ef852
@ -1,5 +0,0 @@
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#pragma sfr
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#include "incs_loader.h"
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20
trunk/WDT.h
20
trunk/WDT.h
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#ifndef _WDT_
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#define _WDT_
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//=========================================================
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#define WDT_RESTART_MAGIC 0xAC
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//=========================================================
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// ウォッチドッグタイマのリスタート
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// void WDT_Restart( void );
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#define WDT_Restart() WDTE = WDT_RESTART_MAGIC
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// 規定値以外を書くと例外でリセットがかかる
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#define mcu_reset WDTE = 0xFF
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#endif
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265
trunk/accero.c
265
trunk/accero.c
@ -1,265 +0,0 @@
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/* ========================================================
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加速度センサ関係
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・データ更新完了でデータを吸い上げ手レジスタを更新、CPUに割り込み
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・フラグが立っていれば歩数カウント
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・加速度センサ割り込みからタスクを登録して下さい。(I2Cの競合回避などがあるので)
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======================================================== */
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#pragma SFR
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#pragma NOP
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#pragma HALT
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#pragma STOP
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#pragma ROT
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// rorb, rolb, rorw, rolw
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#pragma MUL
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#pragma BCD
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#include "config.h"
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#ifdef _MCU_BSR_
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#pragma interrupt INTP23 intp23_ACC_ready RB3 // 加速度センサ、データ準備完了
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#endif
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#include "incs.h"
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#include <math.h>
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// ========================================================
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// レジスタ名
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#define ACC_REG_WHOAMI 0x0F
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#define ACC_REG_CTRL1 0x20
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#define ACC_REG_CTRL5 0x24
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#define ACC_REG_X 0x28
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// ビット位置
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#define ACC_bP_PM0 5
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#define ACC_bP_DR0 3
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// ビット設定値
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#define ACC_BITS_PM_PDN 0
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#define ACC_BITS_PM_NORM 1
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#define ACC_BITS_PM_LP0R5 2
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#define ACC_BITS_PM_LP1 3
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#define ACC_BITS_PM_LP2 4
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#define ACC_BITS_PM_LP5 5
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#define ACC_BITS_PM_LP10 6
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#define ACC_BITS_DR_50Hz 0
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#define ACC_BITS_DR_100Hz 1
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#define ACC_BITS_DR_400Hz 2
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#define ACC_BITS_DR_1000Hz 3
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#define ACC_BITS_ALL_AXIS_ON 7
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#define VREG_BITMASK_ACC_CONF_ACQ ( 1 << 0 )
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#define VREG_BITMASK_ACC_CONF_HOSU ( 1 << 1 )
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// ========================================================
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task_status tsk_soft_int( );
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/* ========================================================
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・割り込みを確認してデータを吸い上げ、レジスタに書き出します
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・本当であればコールバック関数を登録しておけばいいじゃんとなるのですが、
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I2Cが使用中だったら?とか考えると私ではそこまでできないのです。
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・自動歩数計とかでも結局
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======================================================== */
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task_status_immed tsk_cbk_accero( )
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{ // (疑似)isrから登録されます
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// 加速度センサデータレジスタへの反映
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if( iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, &vreg_ctr[VREG_C_ACC_XL] )
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!= ERR_SUCCESS )
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{
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// 加速度センサが異常になったので止める
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vreg_ctr[ VREG_C_ACC_CONFIG ] &= ~( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ );
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acc_hosu_set();
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vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR;
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return ( ERR_SUCCESS ); // タスクの削除は必要
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}
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else
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{
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// 正常時パス //
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// 加速度更新&割り込み
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if( (( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_ACQ ) != 0 ) &&
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( system_status.pwr_state == ON )
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)
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{
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set_irq( VREG_C_IRQ1, REG_BIT_ACC_DAT_RDY );
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// ゴミデータのカラ読み
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if( ACC_VALID == 1 )
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{
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u8 temp[6];
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iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, temp );
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}
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}
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if(( system_status.pwr_state != OFF ) &&
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( system_status.pwr_state != BT_CHARGE ) &&
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( ( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_HOSU ) != 0 )
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)
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{
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DBG_LED_WIFI_2_on;
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pedometer(); // 歩数計
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DBG_LED_WIFI_2_off;
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}
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}
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return ( ERR_SUCCESS );
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}
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/*=======================================================
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加速度センサ透過アクセス リード
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========================================================*/
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task_status_immed acc_read( )
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{
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vreg_ctr[VREG_C_ACC_W_BUF] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
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// vreg_ctr[ VREG_C_ACC_R_BUF ] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] );
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vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK;
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if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 )
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{
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IRQ0_ast;
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}
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return ( ERR_SUCCESS );
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}
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/*=========================================================
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加速度センサ透過アクセス ライト
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========================================================*/
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task_status_immed acc_write( )
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{
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iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] );
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vreg_ctr[VREG_C_IRQ1] |= REG_BIT_ACC_ACK;
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if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_ACC_ACK ) == 0 )
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{
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IRQ0_ast;
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}
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return ( ERR_SUCCESS );
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}
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/*=========================================================
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加速度センサの設定
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========================================================*/
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task_status_immed acc_hosu_set( )
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{
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u8 str_send_buf[4];
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iic_mcu_read_a_byte( IIC_SLA_ACCEL, ACC_REG_WHOAMI );
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if( iic_mcu_bus_status == ERR_NOSLAVE )
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{
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vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR;
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#ifdef _MCU_BSR_
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// PMK23 = 1;
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#endif
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return ( ERR_SUCCESS ); // とりあえず、タスクは削除しなくてはならない
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}else{
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vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_ACCERO_ERR;
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}
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str_send_buf[1] = 0x00; // ctrl2 HPF:normal, filterd, HPF for IRQ : dis/dis, HPF coeff:norm
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#ifdef _MODEL_WM0_
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# ifdef _MODEL_WM0_TEG2_CTRC_
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str_send_buf[2] = 0x02; // 回路が一部違う
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# else
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str_send_buf[2] = 0x10; // 3 IRQ pol :Active HI, Drive:Pushpull,
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/// IRQ2flg latch: auto clear after read, IRQ2 conf: IRQ( fall,shock,...)
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/// 1 : auto clear after read, conf: data ready
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# endif
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#else
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# ifdef _MODEL_CTR_
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/*
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if( system_status.model == MODEL_TS_BOARD )
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{
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// TS Final SoC
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str_send_buf[2] = 0x02; // 3 IRQ pol :Active HI, Drive:Pushpull,
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}
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else
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{
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// 実機&派生種、白箱
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str_send_buf[2] = 0x10; // 3 IRQ pol :Active HI, Drive:Pushpull,
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}
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*/
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str_send_buf[2] = 0x12; // 面倒なので両方...。
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# else
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// TS( type T )
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str_send_buf[2] = 0x02; // 3 IRQ pol :Active HI, Drive:Pushpull,
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/// IRQ2flg latch: auto clear after read, IRQ2 conf: IRQ( fall,shock,...)
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/// 1 : auto clear after read, conf: data ready
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# endif
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#endif
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str_send_buf[3] = 0x80; // ctrl3 block update:enable, MSB first, scale: +-2G(default), selftest: dis
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if( ( vreg_ctr[VREG_C_ACC_CONFIG] &
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( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ ) ) == 0 )
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{
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#ifdef _MCU_BSR_
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PMK23 = 1;
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#endif
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// 完全停止
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str_send_buf[0] =
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( ACC_BITS_PM_PDN << ACC_bP_PM0 | 0 << ACC_bP_DR0 | ACC_BITS_ALL_AXIS_ON );
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}
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else
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{
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#ifdef _MCU_BSR_
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PMK23 = 0;
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#endif
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// 100Hz 自動取り込み
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str_send_buf[0] =
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( ACC_BITS_PM_NORM << ACC_bP_PM0
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| ACC_BITS_DR_100Hz << ACC_bP_DR0
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| ACC_BITS_ALL_AXIS_ON );
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}
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iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | 0x80 ), 4, str_send_buf );
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// カラ読み
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if( ACC_VALID == 1 )
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{
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if( system_status.pwr_state == ON )
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{
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u8 temp[6];
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iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | 0x80 ), 6, temp );
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}
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}
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return ( ERR_SUCCESS );
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}
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/* ========================================================
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加速度センサ割り込み
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I2Cが使用中かもしれないので、読み出しタスクの登録を行うのみ
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======================================================== */
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__interrupt void intp23_ACC_ready( )
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{
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EI();
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if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 0x03 ) != 0x00 )
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{
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if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) )
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{
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if( ACC_VALID == 1 )
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{
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// todo
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// renge_task_immed_add( tsk_cbk_accero );
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}
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}
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}
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}
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@ -1,14 +0,0 @@
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#ifndef _accero_
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#define _accero_
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#include "jhl_defs.h"
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#include "pedometer.h"
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///////////////////////////////////////////////////////////
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task_status_immed tsk_cbk_accero( );
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task_status_immed acc_hosu_set( );
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#endif
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346
trunk/adc.c
346
trunk/adc.c
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/* ========================================================
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藤田@開技
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nintendo
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'09 Apr
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======================================================== */
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#include "incs.h"
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#include "adc.h"
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#include "pm.h"
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#include "led.h"
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//#define _4db_
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#define _15db_
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// ===================================================== //
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bit adc_updated;
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u8 adc_raw_vol;
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u8 adc_raw_dep;
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// ===================================================== //
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extern void nop8();
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// ===================================================== //
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#define INTERVAL_TSK_ADC 3
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/* ========================================================
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ADC設定と、開始
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以下のピンは主にここで操作・監視されます。
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・BT_TEMP,_P
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・ADIN1
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・VOL
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関係ありそうですが別のところで管理しています
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・PM_BT_DET,_P BT_init
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・8tics毎に呼ばれ、3チャンネル分取り込むとADCを停止します。
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タスク起動時、レジスタには前回の取り込み値が入っています。
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======================================================== */
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#ifdef _15db_
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// max -15db
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const u8 slider_to_codec[64] =
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{
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127, 127, 127, 126, 125, 124, 123, 122,
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121, 120, 119, 118, 117, 116, 115, 114,
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113, 112, 111, 110, 109, 108, 107, 106,
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105, 104, 103, 102, 101, 100, 99, 98,
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97, 96, 95, 94, 93, 92, 91, 90,
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89, 88, 87, 86, 85, 84, 83, 82,
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81, 80, 79, 78, 77, 76, 75, 74,
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73, 72, 71, 70, 69, 68, 67, 66
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};
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#endif
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#ifdef _4db_
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// max -4db
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const u8 slider_to_codec[64] =
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{
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127, 127, 126, 125, 123, 122, 121, 119,
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118, 117, 115, 114, 112, 111, 110, 108,
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107, 106, 104, 103, 101, 100, 99, 97,
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96, 94, 93, 92, 90, 89, 88, 86,
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85, 83, 82, 81, 79, 78, 77, 75,
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74, 72, 71, 70, 68, 67, 66, 64,
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64, 63, 61, 60, 59, 57, 56, 54,
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53, 52, 50, 49, 48, 46, 44, 44
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};
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#endif
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void tsk_adc( )
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{
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static u8 task_interval = 0;
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static u8 old_tune;
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static u8 sndvol_codec;
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static u8 bt_temp_old;
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if( task_interval-- != 0 )
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{
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return;
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}
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else
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{
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task_interval = (u8)( INTERVAL_TSK_ADC / SYS_INTERVAL_TICK );
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}
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if( adc_updated )
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{
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if( system_status.pwr_state == ON )
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{
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// Tune ///////////////////////////////////////
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{
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// 似非ヒステリシス V2
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// ガリオームには適さない
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#define KIKAN 32
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static u8 old_value;
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static s8 diffs;
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u8 temp;
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if( abs( adc_raw_dep - old_value ) >= 2 )
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{
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// 大きく離れた
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vreg_ctr[ VREG_C_TUNE ] = adc_raw_dep;
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old_value = adc_raw_dep;
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#if 0
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割り込み入れない;
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割り込みを入れるようであれば、ちゃんと変化チェックする;
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set_irq( VREG_C_IRQ0, REG_BIT_VR_TUNE_CHANGE );
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#endif
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diffs = 0;
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}
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else
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{
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// 近所の値でも、ある期間でいっぱい偏っていたらそっちに寄せる
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static u8 kikan_count = KIKAN;
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if( old_value < adc_raw_dep )
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{
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diffs += 1;
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}
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else if( old_value > adc_raw_dep )
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{
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diffs -= 1;
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}
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if( --kikan_count == 0 )
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{
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if( diffs >= KIKAN && ( diffs < 64 ))
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{
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old_value += 1;
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}
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else if( ( diffs <= ( 256 - KIKAN )) && ( diffs > ( 128 + 64 ) )) // あらー?
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{
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old_value -= 1;
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}
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vreg_ctr[ VREG_C_TUNE ] = old_value;
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kikan_count = KIKAN;
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diffs = 0;
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}
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}
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}
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// Volume /////////////////////////////////////
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{
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static u8 vol_old;
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static u8 force_update_vol;
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|
||||
if( ( abs( adc_raw_vol - vol_old ) >= 2 ) // 生値でこれくらいずれたら更新(似非ヒステリシス)
|
||||
|| ( --force_update_vol == 0 ) ) // ポーリング
|
||||
{
|
||||
vol_old = adc_raw_vol;
|
||||
// レジスタ更新
|
||||
vreg_twl[ REG_TWL_INT_ADRS_VOL ] = vol_old / ( 256 / 32 ); // ←adc値でよい
|
||||
vreg_ctr[ VREG_C_SND_VOL ] = ( vol_old / 4 ); // 64段
|
||||
|
||||
// codecに伝える
|
||||
iic_mcu_write_a_byte( IIC_SLA_CODEC, CODEC_REG_VOL, slider_to_codec[ vol_old / 4 ] );
|
||||
#ifndef _MODEL_CTR_
|
||||
iic_mcu_write_a_byte( IIC_SLA_DCP, 0, slider_to_codec[ ( 255 - vol_old ) / 4 ] );
|
||||
#endif
|
||||
// set_irq( VREG_C_IRQ0, REG_BIT_VR_SNDVOL_CHANGE ); // 割り込み廃止
|
||||
force_update_vol = 200;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// TUNE_LED ///////////////////////////////////
|
||||
// ここで?仕様?
|
||||
{
|
||||
switch ( vreg_ctr[VREG_C_LED_TUNE] )
|
||||
{
|
||||
case LED_TUNE_ILM_ON:
|
||||
LED_duty_3d = vreg_ctr[VREG_C_LED_BRIGHT];
|
||||
break;
|
||||
|
||||
case LED_TUNE_ILM_SVR:
|
||||
LED_duty_3d = vreg_ctr[VREG_C_TUNE] / 16;
|
||||
break;
|
||||
|
||||
case LED_TUNE_ILM_OFF:
|
||||
default:
|
||||
LED_duty_3d = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
adc_updated = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
ADCEN = 1;
|
||||
ADM = 0b00001011; // セレクトモード、昇圧、fCLK/6 ///ここから ↓
|
||||
|
||||
ADPC = 0x06; // ADCポートのセレクト
|
||||
ADS = ADC_SEL_TUNE;
|
||||
nop8();
|
||||
ADCS = 1; // AD開始。 /// ここまで ↑ までに1us=8clk以上開ける
|
||||
|
||||
ADIF = 0;
|
||||
ADMK = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/* ========================================================
|
||||
過去3つのminでもMAXでもない値を返す
|
||||
突発的なノイズを除く。
|
||||
根本対策ではないが、これはこれで使い道がある。
|
||||
======================================================== */
|
||||
static u8 getmean3( u8 * hist )
|
||||
{
|
||||
if( *hist > *( hist + 1 ) )
|
||||
{
|
||||
if( *hist > *( hist + 2 ) )
|
||||
{
|
||||
return( ( *( hist + 1 ) > *( hist + 2 ) ) ? *( hist + 1 ) : *( hist + 2 ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
return( *hist );
|
||||
}
|
||||
}else{
|
||||
if( *hist > *( hist + 2 ) )
|
||||
{
|
||||
return( *hist );
|
||||
}
|
||||
else
|
||||
{
|
||||
return( ( *( hist + 1 ) < *( hist + 2 ) ) ? *( hist + 1 ) : *( hist + 2 ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
自前で次のチャンネル
|
||||
一通り終わったら止める
|
||||
// todo 値が飛ぶことがある?
|
||||
======================================================== */
|
||||
__interrupt void int_adc( )
|
||||
{
|
||||
static u8 hist_tune[3];
|
||||
static u8 hist_snd_vol[3];
|
||||
static u8 hist_bt_temp[3];
|
||||
static u8 index;
|
||||
|
||||
EI( );
|
||||
switch ( ADS )
|
||||
{
|
||||
/*
|
||||
case ( ADC_SEL_AMB_BRIT ): // 環境明るさ
|
||||
vreg_ctr[ VREG_C_AMBIENT_BRIGHTNESS ] = ADCRH;
|
||||
break;
|
||||
*/
|
||||
|
||||
case ( ADC_SEL_TUNE ):
|
||||
hist_tune[index] = ADCRH;
|
||||
#ifdef _MODEL_WM0_
|
||||
adc_raw_dep = 255 - getmean3( hist_tune );
|
||||
#else
|
||||
adc_raw_dep = getmean3( hist_tune );
|
||||
#endif
|
||||
break;
|
||||
|
||||
case ( ADC_SEL_VOL ):
|
||||
hist_snd_vol[index] = ADCRH;
|
||||
#ifdef _MODEL_CTR_
|
||||
if( system_status.model == MODEL_TS_BOARD )
|
||||
{
|
||||
adc_raw_vol = getmean3( hist_snd_vol );
|
||||
}
|
||||
else
|
||||
{
|
||||
adc_raw_vol = ( 255 - getmean3( hist_snd_vol ));
|
||||
}
|
||||
#else
|
||||
adc_raw_vol = getmean3( hist_snd_vol );
|
||||
#endif
|
||||
break;
|
||||
|
||||
case ( ADC_SEL_BATT_TEMP ):
|
||||
hist_bt_temp[index] = ADCRH;
|
||||
raw_adc_temperature = getmean3( hist_bt_temp );
|
||||
renge_task_immed_add( BT_temp_update );
|
||||
break;
|
||||
|
||||
case ( ADC_SEL_BATT_DET ):
|
||||
// 呼ばれない
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// もっとまともな書き方がありそうだ
|
||||
// if( ADS == ADC_SEL_BATT_DET ){
|
||||
if( ADS != ADC_SEL_BATT_TEMP )
|
||||
{ // 電池判別は電源投入の一回のみ
|
||||
ADS += 1; // 次のチャンネル
|
||||
}
|
||||
else
|
||||
{
|
||||
ADCEN = 0; // 止めてしまう
|
||||
adc_updated = 1;
|
||||
index = ( index == 2 ) ? 0 : ( index + 1 );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
tsk_adcと競合することを考慮していません。
|
||||
======================================================== */
|
||||
u8 get_adc( u8 ch )
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
ADMK = 1;
|
||||
ADIF = 0;
|
||||
|
||||
ADCEN = 1;
|
||||
ADM = 0b00001011; // セレクトモード、昇圧、fCLK/6 ///ここから↓
|
||||
|
||||
ADPC = 0x06; // ADCポートのセレクト
|
||||
ADS = ch;
|
||||
|
||||
nop8();
|
||||
|
||||
ADCS = 1; // AD開始。 /// ここまで↑ に、1us以上開ける
|
||||
|
||||
while( ADIF == 0 ){;}
|
||||
temp = ADCRH;
|
||||
ADCEN = 0;
|
||||
|
||||
ADMK = 0;
|
||||
return ( temp );
|
||||
}
|
||||
43
trunk/adc.h
43
trunk/adc.h
@ -1,43 +0,0 @@
|
||||
#ifndef __adc__
|
||||
#define __adc__
|
||||
|
||||
#include "jhl_defs.h"
|
||||
|
||||
///////////////////////////////////////
|
||||
// ANI2 P22
|
||||
#define ADC_SEL_AMB_BRIT 0x02
|
||||
|
||||
/*
|
||||
// ANI3 P23
|
||||
#define ADC_SEL_GYRO_YAW 0x03
|
||||
// ANI4 P24
|
||||
#define ADC_SEL_GYRO_PITCH 0x04
|
||||
// ANI5 P25
|
||||
#define ADC_SEL_GYRO_ROLL 0x05
|
||||
*/
|
||||
|
||||
// ANI6 P26
|
||||
#define ADC_SEL_TUNE 0x06
|
||||
// ANI7 P27
|
||||
#define ADC_SEL_VOL 0x07
|
||||
|
||||
// ANI8 P150
|
||||
#define ADC_SEL_BATT_TEMP 0x08
|
||||
// ANI9 P151
|
||||
#define ADC_SEL_BATT_DET 0x09
|
||||
|
||||
|
||||
|
||||
///////////////////////////////////////
|
||||
#define CODEC_REG_VOL 0x13
|
||||
|
||||
|
||||
|
||||
///////////////////////////////////////
|
||||
|
||||
|
||||
///////////////////////////////////////
|
||||
u8 get_adc( u8 ch );
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,76 +0,0 @@
|
||||
#ifndef _bt_params_h_
|
||||
#define _bt_params_h_
|
||||
|
||||
/* ========================================================
|
||||
各社バッテリーパラメータ
|
||||
======================================================== */
|
||||
const u8 BT_PARAM[][64] = {
|
||||
// ID = 0 GND マクセル
|
||||
{
|
||||
0xAD, 0x30, 0xAE, 0x70, 0xB0, 0x00, 0xB3, 0x00,
|
||||
0xB4, 0x70, 0xB5, 0xA0, 0xB7, 0x80, 0xBA, 0x00,
|
||||
|
||||
0xBB, 0x90, 0xBD, 0x00, 0xBE, 0x00, 0xBF, 0xF0,
|
||||
0xC3, 0x00, 0xC5, 0xC0, 0xC8, 0x00, 0xCA, 0xC0,
|
||||
|
||||
0x04, 0x00, 0x12, 0x00, 0x0C, 0x10, 0x24, 0x00,
|
||||
0x10, 0xD0, 0x1B, 0xF0, 0x0A, 0xF0, 0x08, 0xE0,
|
||||
|
||||
0x0C, 0xF0, 0x08, 0xC0, 0x08, 0xB0, 0x07, 0xF0,
|
||||
0x0B, 0x00, 0x05, 0xD0, 0x02, 0x00, 0x09, 0x00
|
||||
},
|
||||
{ // ID = 1 120 ohm
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
},
|
||||
{ // ID = 2 360 hom
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
},
|
||||
{ // ID = 3 750 ohm
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
},
|
||||
{ // ID = 4 1.3kohm
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
},
|
||||
{ // ID = 5 2.7kohm パナ
|
||||
0xAD, 0x30, 0xAE, 0x70, 0xB0, 0x00, 0xB3, 0x00,
|
||||
0xB4, 0x70, 0xB5, 0xA0, 0xB7, 0x80, 0xBA, 0x00,
|
||||
|
||||
0xBB, 0x90, 0xBD, 0x00, 0xBE, 0x00, 0xBF, 0xF0,
|
||||
0xC3, 0x00, 0xC5, 0xC0, 0xC8, 0x00, 0xCA, 0xC0,
|
||||
|
||||
0x04, 0x00, 0x12, 0x00, 0x0C, 0x10, 0x24, 0x00,
|
||||
0x10, 0xD0, 0x1B, 0xF0, 0x0A, 0xF0, 0x08, 0xE0,
|
||||
|
||||
0x0C, 0xF0, 0x08, 0xC0, 0x08, 0xB0, 0x07, 0xF0,
|
||||
0x0B, 0x00, 0x05, 0xD0, 0x02, 0x00, 0x09, 0x00
|
||||
},
|
||||
{ // ID = 6 8.2kohm
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
}
|
||||
// ID = 7 白箱
|
||||
/// パラメータ無し
|
||||
};
|
||||
|
||||
const unsigned char BT_PANA_RCOMP = 135;
|
||||
// static const float BT_PANA_TEMPCOUP = 0.3;
|
||||
// static const float BT_PANA_TEMPCODN = 0.5;
|
||||
// 256倍してある
|
||||
const unsigned char BT_PANA_TEMPCOUP = 77;
|
||||
const unsigned char BT_PANA_TEMPCODN = 128;
|
||||
|
||||
#endif
|
||||
@ -1,48 +0,0 @@
|
||||
;;; 領域の定義
|
||||
;32kB = 0x7FFF
|
||||
MEMORY BCL0: (00000H, 01000H )
|
||||
;MEMORY BCL1: (01000H, 01000H ) ; バックアップ領域
|
||||
MEMORY ROM : (02000H, 03000H )
|
||||
;MEMORY ROM_BKUP:(05000H, 03000H ) ; バックアップ領域
|
||||
;MEMORY OCD :(0FC00H, 00400H ) ; OCDが使っているらしい
|
||||
|
||||
|
||||
;;; セグメントの割当先設定
|
||||
; ブートブロック0に割り当てる
|
||||
MERGE LDR_CODE : =BCL0
|
||||
MERGE LDR_CODL : =BCL0
|
||||
MERGE @@LCODE : =BCL0 ; スタートアップルーチン
|
||||
MERGE FSL_CODE : =BCL0 ; =FSL ; 謹製フラッシュライブラリ
|
||||
;MERGE @@LCODEL : =BCL0
|
||||
|
||||
;MERGE LDR_RINT:=BCL0
|
||||
;MERGE LDR_CNST:=BCL0
|
||||
MERGE LDR_CNSL:=BCL0
|
||||
|
||||
|
||||
|
||||
; 通常領域に置く
|
||||
MERGE ROM_CODE:=ROM
|
||||
MERGE @@CNST: =ROM
|
||||
MERGE @@R_INIT: =ROM ; ROM以外に置きたいならスタートアップルーチンを要修正
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; マジックナンバー
|
||||
;; magic.cの中で指定
|
||||
|
||||
|
||||
;--- RAM領域 -------------------------------------------------------
|
||||
;
|
||||
; RAM1,RAM2領域はユーザープログラムで使用しても良いですが、セルフプログラム時は
|
||||
; セルフプログラムのライブラリが使用するため、値は破壊されます。
|
||||
;
|
||||
memory RAM2 : (0FFE20H, 00C0H) ; セルフプログラム時、使用禁止領域
|
||||
;memory SLF_RAM : (0FFE00H, 0020H) ; Slef Program予約領域[使用禁止]
|
||||
memory RAM : (0FF900H, 0500H) ; ユーザーRAM領域
|
||||
;memory SLF_RAM : (0FF900H, 0020H) ; Slef Program予約領域[使用禁止]
|
||||
|
||||
|
||||
@ -1,55 +0,0 @@
|
||||
#ifndef __bsr_system__
|
||||
#define __bsr_system__
|
||||
|
||||
// イベントループのステート
|
||||
enum pwr_state_
|
||||
{
|
||||
OFF_TRIG = 0,
|
||||
OFF,
|
||||
ON_TRIG,
|
||||
ON,
|
||||
SLEEP_TRIG,
|
||||
SLEEP,
|
||||
// WAKE,
|
||||
BT_CHARGE,
|
||||
};
|
||||
|
||||
enum poweron_reason_
|
||||
{
|
||||
NONE = 0,
|
||||
PWSW,
|
||||
RTC_ALARM,
|
||||
EXT_POWER
|
||||
};
|
||||
|
||||
|
||||
enum model_
|
||||
{
|
||||
MODEL_JIKKI = 0,
|
||||
MODEL_TS_BOARD,
|
||||
MODEL_SHIROBAKO,
|
||||
MODEL_JIKKI_NOBATT,
|
||||
MODEL_RESERVED1,
|
||||
MODEL_RESERVED2,
|
||||
MODEL_RESERVED3,
|
||||
};
|
||||
|
||||
// タスクシステムの状態情報など
|
||||
typedef struct
|
||||
{
|
||||
enum pwr_state_ pwr_state;
|
||||
enum poweron_reason_ poweron_reason;
|
||||
unsigned char dipsw0:1;
|
||||
unsigned char dipsw1:1;
|
||||
unsigned char dipsw2:1;
|
||||
unsigned char reboot:1;
|
||||
enum model_ model;
|
||||
}
|
||||
system_status_;
|
||||
|
||||
|
||||
extern system_status_ system_status;
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,70 +0,0 @@
|
||||
#ifndef __config__
|
||||
#define __config__
|
||||
|
||||
//#define _debug_
|
||||
//#define _debug_led_
|
||||
|
||||
|
||||
#define MCU_VER_MAJOR 0x00
|
||||
#define MCU_VER_MINOR 0x11
|
||||
|
||||
#define _OVERCLOCK_
|
||||
|
||||
//#define PM_CCIC_TIM
|
||||
|
||||
|
||||
//#define _MODEL_TEG2_
|
||||
// ↑TEG2 CPU + Type-T
|
||||
|
||||
//#define _MODEL_WM0_
|
||||
//#define _MODEL_WM0_TEG2_CTRC_
|
||||
|
||||
//#define _MODEL_TS0_
|
||||
// ↑TEG2 CPU + Type-C
|
||||
|
||||
#define _MODEL_CTR_
|
||||
// ↑TS board, WM1,1 TS-CTRC
|
||||
|
||||
//#define _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
// ↑TS board, WM1,1 TS-CTRC
|
||||
|
||||
|
||||
// 特殊仕様 //
|
||||
//#define _SW_HOME_ENABLE_
|
||||
//#define _PARRADIUM_ 廃止
|
||||
//#define _PM_BUG_ // バグ持ち CTR PMIC 廃止
|
||||
#define _FOR_E3_
|
||||
|
||||
// ---------------------------------- //
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define _PMIC_TWL_
|
||||
#define _MCU_KE3_
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
#define _PMIC_TWL_
|
||||
#define _MCU_BSR_
|
||||
#define _SW_HOME_ENABLE_
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _MODEL_TS0_
|
||||
#define _PMIC_CTR_
|
||||
#define _MCU_BSR_
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
#define _PMIC_CTR_
|
||||
#define _MCU_BSR_
|
||||
#define _SW_HOME_ENABLE_
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
#define _MODEL_CTR_
|
||||
#define _PMIC_CTR_
|
||||
#define _MCU_BSR_
|
||||
#define _SW_HOME_ENABLE_
|
||||
#endif
|
||||
|
||||
#endif
|
||||
362
trunk/fsl.h
362
trunk/fsl.h
@ -1,362 +0,0 @@
|
||||
/*==============================================================================================*/
|
||||
/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */
|
||||
/* Module = fsl.h */
|
||||
/* Version = V1.01 */
|
||||
/* Date = 28.03.2008 11:45:42 */
|
||||
/*==============================================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*==============================================================================================*/
|
||||
/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */
|
||||
/* a company of the NEC Electronics Corporation */
|
||||
/*==============================================================================================*/
|
||||
/* Purpose: */
|
||||
/* constant, type and function prototype definitions used by the FSL */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */
|
||||
/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */
|
||||
/* including but not limited to those for non-infringement of intellectual property, */
|
||||
/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
|
||||
/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of using the Product(s) */
|
||||
/* and assumes all risks associated with its exercise of rights under this Agreement, */
|
||||
/* including, but not limited to the risks and costs of program errors, compliance with */
|
||||
/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */
|
||||
/* or punitive damage (including but not limited to lost profits) regardless of whether */
|
||||
/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
|
||||
/* failure of essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. NEC shall not be liable for any services or products provided by third party */
|
||||
/* vendors, developers or consultants identified or referred to the User by NEC in connection */
|
||||
/* with the Product(s) and/or the Application. */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* Environment: PM plus (V6.30) */
|
||||
/* RA78K0(V1.20) */
|
||||
/* CC78K0(V2.00) */
|
||||
/*==============================================================================================*/
|
||||
|
||||
#ifndef __FSL_H_INCLUDED
|
||||
#define __FSL_H_INCLUDED
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* FSL type definitions */
|
||||
/*==============================================================================================*/
|
||||
typedef unsigned char fsl_u08;
|
||||
typedef unsigned int fsl_u16;
|
||||
typedef unsigned long int fsl_u32;
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* constant definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
/*status code definitions returned by the FSL functions */
|
||||
#define FSL_OK 0x00
|
||||
#define FSL_ERR_FLMD0 0x01
|
||||
#define FSL_ERR_PARAMETER 0x05
|
||||
#define FSL_ERR_PROTECTION 0x10
|
||||
#define FSL_ERR_ERASE 0x1A
|
||||
#define FSL_ERR_BLANKCHECK 0x1B
|
||||
#define FSL_ERR_IVERIFY 0x1B
|
||||
#define FSL_ERR_WRITE 0x1C
|
||||
#define FSL_ERR_EEP_IVERIFY 0x1D
|
||||
#define FSL_ERR_EEP_BLANKCHECK 0x1E
|
||||
#define FSL_ERR_INTERRUPTION 0x1F
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* global function prototypes */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: initialization of selfprogramming environment */
|
||||
/* After initialization: */
|
||||
/* - the pointer to the data-buffer is stored */
|
||||
/* - all timing data are re-calculated according to the used system clock */
|
||||
/* */
|
||||
/* CAUTION: */
|
||||
/* The FSL_Init(&data_buffer) function is interruptible. Please use the */
|
||||
/* FSL_Init_cont(&data_buffer) to recall it as long return status is 0x1F. */
|
||||
/* */
|
||||
/* Input: data_buffer_pu08 - pointer to a data buffer of N...256 bytes */
|
||||
/* (used for data exchange between firmware and application) */
|
||||
/* Output: - */
|
||||
/* Returned: u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means initialization OK */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), initialization interrupted by user interrupt*/
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Init( fsl_u08 * data_buffer_pu08 );
|
||||
extern fsl_u08 FSL_Init_cont( fsl_u08 * data_buffer_pu08 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: checks the voltage level (high or low) at FLMD0 pin */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means FLMD0=HIGH */
|
||||
/* = 0x01(FSL_ERR_FLMD0), error, FLMD0=LOW */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_ModeCheck( void );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: checks if specified block is blank */
|
||||
/* Input: block_u16 - block number has to be checked */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block is blank" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x1B(FSL_ERR_BLANKCHECK), blank-check error, means "block not blank" */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), blank-check interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_BlankCheck( fsl_u16 block_u16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: erase specified block */
|
||||
/* Input: block_u16 - block number has to be erase */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block erased successfully" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), tried to erase protected area */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error, retry up to max. 255 times */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), erasing interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Erase( fsl_u16 block_u16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: performs internal verify on specified block */
|
||||
/* Input: block_u16 - block number has to be verified */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status_code */
|
||||
/* = 0x00(FSL_OK), normal and means "block is verified" */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), verify interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_IVerify( fsl_u16 block_u16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: writes N words from the data buffer into flash */
|
||||
/* Input: s_address_u32 - starting flash address the data has to be written */
|
||||
/* See Condition 2) please. */
|
||||
/* my_wordcount_u08 - number of words (4 bytes) has to be written */
|
||||
/* Output: - */
|
||||
/* Condition: 1) (s_address_u32 MOD 4 == 0) */
|
||||
/* 2) most significant byte (MSB) of s_address_u32 has to be 0x00. */
|
||||
/* Means: 0x00abcdef 24 bit flash address allowed */
|
||||
/* 3) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY LIBRARY !!!!! */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1C(FSL_ERR_WRITE), write error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_Write( fsl_u32 s_address_u32, fsl_u08 word_count_u08 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: writes N words from the data buffer into flash */
|
||||
/* Before "writing" a N-word blankcheck is performed. */
|
||||
/* After "writing" a N-Word internal verify is performed. */
|
||||
/* Input: s_address_u32 - starting destination address has to be written */
|
||||
/* my_wordcount_u08 - number of words (4 bytes) has to be written */
|
||||
/* Output: - */
|
||||
/* Condition: 1) (s_address_u32 MOD 4 == 0) */
|
||||
/* 2) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY FIRMWARE !!!!! */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1C(FSL_ERR_WRITE), write error */
|
||||
/* = 0x1D(FSL_ERR_EEP_IVERIFY), verify error */
|
||||
/* = 0x1E(FSL_ERR_EEP_BLANKCHECK), blankcheck error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_EEPROMWrite( fsl_u32 s_address_u32,
|
||||
fsl_u08 word_count_u08 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: reads the security information */
|
||||
/* Input: destination_pu16 - destination address of the security info */
|
||||
/* The format of the security info is: "unsigned short int" */
|
||||
/* */
|
||||
/* Format of the security info: */
|
||||
/* bit_0 = 0 -> chip erase command disabled, otherwise enabled */
|
||||
/* bit_1 = 0 -> block erase command disabled, otherwise enabled */
|
||||
/* bit_2 = 0 -> write command disabled, otherwise enabled */
|
||||
/* bit_4 = 0 -> boot-area re-programming disabled, otherwise enabled */
|
||||
/* bit_8...bit_15 = 03H -> last block of the boot-area */
|
||||
/* other bits = 1 */
|
||||
/* Output: - */
|
||||
/* Changed: content of the data_buffer */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetSecurityFlags( fsl_u16 * destination_pu16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: read the boot flag i */
|
||||
/* Input: destination_pu08 - destination address of the bootflag info */
|
||||
/* The format of the boot-flag info is: "unsigned char" */
|
||||
/* The value of the boot info is 0x00 for cluster 0 and 0x01 for cluster 1. */
|
||||
/* Output: - */
|
||||
/* Changed: content of the data_buffer */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetActiveBootCluster( fsl_u08 * destination_pu08 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: puts the last address of the specified block into *destination_pu32 */
|
||||
/* Input: *destination_pu32 - destination where the last-block-address */
|
||||
/* should be stored */
|
||||
/* block_u16 - block number of the last address is needed */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetBlockEndAddr( fsl_u32 * destination_pu32,
|
||||
fsl_u16 block_u16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: puts the information about the protected flash area into the function parameter */
|
||||
/* Input: *start_block_pu16 - destination where the FSW start block should be stored */
|
||||
/* *end_block_pu16 - destination where the FSW end block should be stored */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_GetFlashShieldWindow( fsl_u16 * start_block_pu16,
|
||||
fsl_u16 * end_block_pu16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: defines a new Flash-Shield-Window area inside the flash memory */
|
||||
/* Input: start_block_u16 - starting block of the Flash-Shield-Window (FSW) */
|
||||
/* end_block_u16 - ending block of the flash-Shield-Window (FSW) */
|
||||
/* Changed: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SetFlashShieldWindow( fsl_u16 start_block_u16,
|
||||
fsl_u16 end_block_u16 );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Swapping of bootcluster 0 and 1 */
|
||||
/* */
|
||||
/* CAUTION !!!! */
|
||||
/* After this function the boot cluster are immediately swapped */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SwapBootCluster( void );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL command function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: sets specified security flag by dedicated command-function. */
|
||||
/* */
|
||||
/* There are following security levels: */
|
||||
/* a) chip-erase protection (cannot be reset by programmer !!!) */
|
||||
/* b) block-erase protection (can be reset by chip-erase on programmer) */
|
||||
/* c) write protection (can be reset by chip-erase on programmer) */
|
||||
/* d) boot-cluster protection (cannot be reset by programmer !!!) */
|
||||
/* */
|
||||
/* CAUTION !!!! */
|
||||
/* Each security flag can be written by the application only once */
|
||||
/* */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Returned: fsl_u08, status code */
|
||||
/* = 0x00(FSL_OK), normal */
|
||||
/* = 0x05(FSL_ERR_PARAMETER), parameter error */
|
||||
/* = 0x10(FSL_ERR_PROTECTION), protection error */
|
||||
/* = 0x1A(FSL_ERR_ERASE), erase error */
|
||||
/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */
|
||||
/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern fsl_u08 FSL_SetChipEraseProtectFlag( void );
|
||||
extern fsl_u08 FSL_SetBlockEraseProtectFlag( void );
|
||||
extern fsl_u08 FSL_SetWriteProtectFlag( void );
|
||||
extern fsl_u08 FSL_SetBootClusterProtectFlag( void );
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Block type: FSL function */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: defines the firmware operation method after interrupt service (ISR) execution. */
|
||||
/* Input: mode_u08 = 0x00, after RETI the firmware is continuing the interrupted command.*/
|
||||
/* = other, after RETI the firmware is interrupted with status 0x1F. */
|
||||
/* Changed: - */
|
||||
/* Returned: - */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
extern void FSL_SetInterruptMode( fsl_u08 mode_u08 );
|
||||
|
||||
#endif
|
||||
108
trunk/fsl_user.h
108
trunk/fsl_user.h
@ -1,108 +0,0 @@
|
||||
/*==============================================================================================*/
|
||||
/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */
|
||||
/* Module = fsl_user.h */
|
||||
/* Version = V1.01 */
|
||||
/* Date = 28.03.2008 11:45:55 */
|
||||
/*==============================================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*==============================================================================================*/
|
||||
/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */
|
||||
/* a company of the NEC Electronics Corporation */
|
||||
/*==============================================================================================*/
|
||||
/* Purpose: */
|
||||
/* user configurable constant/macros of the selfprogramming library */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */
|
||||
/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */
|
||||
/* including but not limited to those for non-infringement of intellectual property, */
|
||||
/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */
|
||||
/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of using the Product(s) */
|
||||
/* and assumes all risks associated with its exercise of rights under this Agreement, */
|
||||
/* including, but not limited to the risks and costs of program errors, compliance with */
|
||||
/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */
|
||||
/* or punitive damage (including but not limited to lost profits) regardless of whether */
|
||||
/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */
|
||||
/* failure of essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. NEC shall not be liable for any services or products provided by third party */
|
||||
/* vendors, developers or consultants identified or referred to the User by NEC in connection */
|
||||
/* with the Product(s) and/or the Application. */
|
||||
/* */
|
||||
/*==============================================================================================*/
|
||||
/* Environment: PM plus (V6.30) */
|
||||
/* RA78K0(V1.20) */
|
||||
/* CC78K0(V2.00) */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
#ifndef __FSL_USER_H_INCLUDED
|
||||
#define __FSL_USER_H_INCLUDED
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* constant definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
/* specify the CPU frequency in [Hz], only 2MHz....20MHz allowed */
|
||||
#define FSL_SYSTEM_FREQUENCY 4000000
|
||||
|
||||
/* define whether low-voltage mode is used or not */
|
||||
/* #define FSL_LOW_VOLTAGE_MODE */
|
||||
|
||||
/* size of the common data buffer expressed in [bytes] */
|
||||
/* the data buffer is used for data-exchange between the firmware and the selflib. */
|
||||
//#define FSL_DATA_BUFFER_SIZE 256
|
||||
#define FSL_DATA_BUFFER_SIZE 0
|
||||
|
||||
|
||||
/* customizable interrupt controller configuration during selfprogramming period */
|
||||
/* Bit --7-------6-------5-------4-------3-------2-------1-------0---------------------- */
|
||||
/* MK0L: PMK5 PMK4 PMK3 PMK2 PMK1 PMK0 LVIMK WDTIMK */
|
||||
/* MK0H: SREMK0 SRMK0* STMK0* DMAMK1 DMAMK0 SREMK3 SRMK3 STMK3 */
|
||||
/* MK1L: TMMK03 TMMK02 TMMK01 TMMK00 IICMK0 SREMK1 SRMK1 STMK1* */
|
||||
/* MK1H: TMMK04 SREMK2 SRMK2 STMK2* KRMK RTCIMK RTCMK ADMK */
|
||||
/* MK2L: PMK10 PMK9 PMK8 PMK7 PMK6 TMMK07 TMMK06 TMMK05 */
|
||||
/* MK2H: 1 1 1 1 1 1 1 PMK11 */
|
||||
/*------------------------------------------------------------------------------------------ */
|
||||
/* */
|
||||
/* Examples: */
|
||||
/* ========= */
|
||||
/*#define FSL_MK0L_MASK 0xF7 -> allow INTP1 interrupt during selfprogramming */
|
||||
/*#define FSL_MK0H_MASK 0xEF -> allow DMA1 interrupt during selfprogramming */
|
||||
/*#define FSL_MK1L_MASK 0xBF -> allow TM02 interrupt during selfprogramming */
|
||||
/*#define FSL_MK1H_MASK 0xFF -> all interrupts disabled during selfprogramming */
|
||||
/*#define FSL_MK2L_MASK 0xF7 -> allow INTP6 interrupt during selfprogramming */
|
||||
/*#define FSL_MK2H_MASK 0xFF -> all interrupts disabled during selfprogramming */
|
||||
/*------------------------------------------------------------------------------------------ */
|
||||
#define FSL_MK0L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK0H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK1L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK1H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK2L_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
#define FSL_MK2H_MASK 0xFF /* all interrupts disabled during selfprogramming */
|
||||
|
||||
|
||||
/* FLMD0 control bit */
|
||||
#define FSL_FLMD0_HIGH {BECTL.7 = 1;}
|
||||
#define FSL_FLMD0_LOW {BECTL.7 = 0;}
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* switch interrupt backu functionality ON/OFF using #define/#undef */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* #define FSL_INT_BACKUP */
|
||||
#undef FSL_INT_BACKUP
|
||||
|
||||
|
||||
#endif
|
||||
278
trunk/i2c_ctr.c
278
trunk/i2c_ctr.c
@ -1,278 +0,0 @@
|
||||
/* ========================================================
|
||||
対SoC 新規チャンネル I2C通信
|
||||
藤田@開技.nintendo
|
||||
'09 Apr
|
||||
======================================================== */
|
||||
|
||||
#include "config.h"
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
#pragma interrupt INTIICA int_iic_ctr // CTR側
|
||||
#else
|
||||
// TSはマザボでテレコ、WMは回路図がテレコで結局一致…
|
||||
#pragma interrupt INTIICA1 int_iic_ctr RB1
|
||||
#endif
|
||||
|
||||
|
||||
#include "incs.h"
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
// #ifdef _MODEL_TS0_ || _MODEL_WM0_
|
||||
|
||||
// ワーキングモデルはI2Cが逆
|
||||
// TEGは回路図でテレコ
|
||||
#define ACKD ACKD1
|
||||
#define ACKE ACKE1
|
||||
#define COI COI1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICRSV IICRSV1
|
||||
#define IICA IICA1
|
||||
#define IICAIF IICAIF1
|
||||
#define IICAMK IICAMK1
|
||||
#define IICAPR0 IICAPR11
|
||||
#define IICAPR1 IICAPR01
|
||||
#define IICCTL0 IICCTL10
|
||||
#define IICE IICE1
|
||||
#define IICF IICF1
|
||||
#define IICS IICS1
|
||||
#define IICWH IICWH1
|
||||
#define IICWL IICWL1
|
||||
#define LREL LREL1
|
||||
#define SPD SPD1
|
||||
#define SPIE SPIE1
|
||||
#define STCEN STCEN1
|
||||
#define STD STD1
|
||||
#define SVA SVA1
|
||||
#define WREL WREL1
|
||||
#define WTIM WTIM1
|
||||
#define TRC TRC1
|
||||
#define SMC SMC1
|
||||
#define DFC DFC1
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
// ==============================================
|
||||
extern bit irq_readed; // いずれかのIRQレジスタが読まれた
|
||||
|
||||
u8 iic_burst_state;
|
||||
|
||||
|
||||
/* ========================================================
|
||||
======================================================== */
|
||||
enum
|
||||
{
|
||||
IIC_IDLE = 0,
|
||||
IIC_RCV_REG_ADRS,
|
||||
IIC_TX_OR_RX,
|
||||
IIC_TX,
|
||||
IIC_RX
|
||||
};
|
||||
|
||||
|
||||
// 1バイト送受の度に割り込みが発生するバージョン
|
||||
__interrupt void int_iic_ctr( )
|
||||
{
|
||||
static u8 state = IIC_IDLE;
|
||||
static u8 reg_adrs;
|
||||
static u8 reg_adrs_internal;
|
||||
static u8 tx_buf;
|
||||
u8 rx_buf;
|
||||
|
||||
EI();
|
||||
|
||||
// 読み出し終了
|
||||
if( !ACKD ) // 割り込み要因はNAK(データ送信の最後)
|
||||
{
|
||||
state = IIC_IDLE;
|
||||
SPIE = 0;
|
||||
LREL = 1;
|
||||
|
||||
// レジスタリードで、割り込みピンをネゲート
|
||||
// まだ読まれてない割り込みがあれば、再度アサート
|
||||
if( irq_readed )
|
||||
{
|
||||
IRQ0_neg;
|
||||
irq_readed = 0;
|
||||
if( !( ( vreg_ctr[VREG_C_IRQ0] == 0 )
|
||||
&& ( vreg_ctr[VREG_C_IRQ1] == 0 )
|
||||
&& ( vreg_ctr[VREG_C_IRQ2] == 0 )
|
||||
&& ( vreg_ctr[VREG_C_IRQ3] == 0 ) ) )
|
||||
{
|
||||
while( !IRQ0 ){;} // 時間稼ぎ不要かも
|
||||
IRQ0_ast;
|
||||
}
|
||||
}
|
||||
|
||||
// 歩数計読み出し終了
|
||||
hosu_read_end( );
|
||||
rtc_unlock( );
|
||||
iic_burst_state = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
if( SPD ) // 割り込み要因はストップコンディション
|
||||
// 通信の最後。↑の !ACKD に来たときは割り込み来ない (SPIE = 0 のため )
|
||||
{
|
||||
state = IIC_IDLE;
|
||||
SPIE = 0;
|
||||
// I2C終了時に何かする物 //
|
||||
rtc_unlock( );
|
||||
return;
|
||||
}
|
||||
|
||||
if( STD ) // 割り込み要因:スタートコンディション
|
||||
{
|
||||
if( ( state == IIC_TX ) || ( state == IIC_RX )
|
||||
|| ( state == IIC_RCV_REG_ADRS )
|
||||
)
|
||||
{
|
||||
state = IIC_IDLE;
|
||||
// no break //
|
||||
}
|
||||
}
|
||||
|
||||
switch ( state )
|
||||
{
|
||||
case ( IIC_IDLE ):
|
||||
// 自局呼び出しに応答。
|
||||
// 初期化など
|
||||
SPIE = 1;
|
||||
state = IIC_RCV_REG_ADRS;
|
||||
WREL = 1; // ウェイト解除
|
||||
break;
|
||||
|
||||
case ( IIC_RCV_REG_ADRS ): // 2バイト目(レジスタアドレス)受信後に来る
|
||||
// レジスタアドレス受信
|
||||
reg_adrs = IICA;
|
||||
tx_buf = vreg_ctr_read( reg_adrs ); // データの準備をしておく
|
||||
if( reg_adrs != VREG_C_INFO )
|
||||
{
|
||||
state = IIC_TX_OR_RX;
|
||||
}
|
||||
else
|
||||
{
|
||||
state = IIC_IDLE;
|
||||
}
|
||||
WREL = 1;
|
||||
break;
|
||||
|
||||
case ( IIC_TX_OR_RX ): // ↑の次に来る割り込み。STなら送信準備、データが来たら書き込まれ
|
||||
// if( TRC ){ // 送信方向フラグ で区別するのは、割り込み遅延時に不具合が起こりえる
|
||||
if( STD )
|
||||
{ // スタートコンディション検出フラグ
|
||||
// リードされる
|
||||
if( COI )
|
||||
{ // アドレス一致フラグ
|
||||
state = IIC_TX;
|
||||
// no break, no return //
|
||||
}
|
||||
else
|
||||
{
|
||||
// リスタートで違うデバイスが呼ばれた!
|
||||
state = IIC_IDLE; // 終了処理
|
||||
SPIE = 0;
|
||||
LREL = 1; // ウェイト解除?
|
||||
return;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
state = IIC_RX; // データ1バイト受信の割り込みだった
|
||||
// no break, no return //
|
||||
}
|
||||
|
||||
default: // バースト R/W でここが何回も呼ばれることになる
|
||||
if( state == IIC_TX )
|
||||
{ // 送信
|
||||
IICA = tx_buf;
|
||||
vreg_ctr_after_read( reg_adrs ); // 読んだらクリアなどの処理
|
||||
}
|
||||
else
|
||||
{ // 受信
|
||||
rx_buf = IICA;
|
||||
vreg_ctr_write( reg_adrs, rx_buf );
|
||||
WREL = 1;
|
||||
}
|
||||
|
||||
// レジスタアドレスのインクリメント
|
||||
/// アクセスポインタを進めない特殊なレジスタ
|
||||
switch( reg_adrs )
|
||||
{
|
||||
case( VREG_C_ACC_HOSU_HIST ):
|
||||
case( VREG_C_INFO ):
|
||||
case( VREG_C_FREE_DATA ):
|
||||
case( VREG_C_LED_NOTIFY_DATA ):
|
||||
break;
|
||||
default:
|
||||
reg_adrs += 1;
|
||||
}
|
||||
|
||||
if( state == IIC_TX )
|
||||
{ // さらにつぎに送るデータの準備だけシテオク。SPが来て使われないかもしれない
|
||||
tx_buf = vreg_ctr_read( reg_adrs );
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void IIC_ctr_Init( void )
|
||||
{
|
||||
|
||||
IICAEN = 1;
|
||||
|
||||
IICE = 0; /* IICA disable */
|
||||
|
||||
IICAMK = 1; /* INTIICA disable */
|
||||
IICAIF = 0; /* clear INTIICA interrupt flag */
|
||||
|
||||
IICAPR0 = 1; /* set INTIICA high priority */
|
||||
IICAPR1 = 0; /* set INTIICA high priority */
|
||||
|
||||
#ifdef _MODEL_TEG2_
|
||||
P6 &= ~0x3;
|
||||
#else
|
||||
P20 &= ~0x3;
|
||||
#endif
|
||||
|
||||
SVA = IIC_C_SLAVEADDRESS;
|
||||
IICF = 0x01;
|
||||
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
|
||||
SPIE = 0; // ストップコンディションでの割り込みを禁止
|
||||
WTIM = 1; // 自動でACKを返した後clkをLに固定する
|
||||
ACKE = 1; // ダメCPUは無視して次の通信をはじめるかもしれないんで早くclkを開放しないといけない
|
||||
|
||||
IICWH = 5;
|
||||
IICWL = 10; // L期間の長さ
|
||||
|
||||
SMC = 1; // 高速モード
|
||||
DFC = 1; // デジタルフィルタon (@fast mode)
|
||||
|
||||
IICAMK = 0; // 割り込みを許可
|
||||
|
||||
IICE = 1;
|
||||
|
||||
#ifdef _MODEL_TEG2_
|
||||
PM6 &= ~0x3; /* set clock pin for IICA */
|
||||
#else
|
||||
PM20 &= ~0x3; /* set clock pin for IICA */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void IIC_ctr_Stop( void )
|
||||
{
|
||||
IICE = 0; /* IICA disable */
|
||||
IICAEN = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
210
trunk/i2c_ctr.h
210
trunk/i2c_ctr.h
@ -1,210 +0,0 @@
|
||||
#ifndef _MDSERIAL_A_
|
||||
#define _MDSERIAL_A_
|
||||
|
||||
|
||||
/* IIC operation enable (IICE0) */
|
||||
#define IIC0_OPERATION 0x80
|
||||
#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */
|
||||
#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */
|
||||
|
||||
/* Exit from communications (LREL0) */
|
||||
#define IIC0_COMMUNICATION 0x40
|
||||
#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */
|
||||
#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */
|
||||
|
||||
/* Wait cancellation (WREL0) */
|
||||
#define IIC0_WAITCANCEL 0x20
|
||||
#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */
|
||||
#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */
|
||||
|
||||
/* Generation of interrupt when stop condition (SPIE0) */
|
||||
#define IIC0_STOPINT 0x10
|
||||
#define IIC0_STOPINT_DISABLE 0x00 /* disable */
|
||||
#define IIC0_STOPINT_ENABLE 0x10 /* enable */
|
||||
|
||||
/* Wait and interrupt generation (WTIM0) */
|
||||
#define IIC0_WAITINT 0x08
|
||||
#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */
|
||||
#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */
|
||||
|
||||
/* Acknowledgement control (ACKE0) */
|
||||
#define IIC0_ACK 0x04
|
||||
#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */
|
||||
#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */
|
||||
|
||||
/* Start condition trigger (STT0) */
|
||||
#define IIC0_STARTCONDITION 0x02
|
||||
#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */
|
||||
#define IIC0_START_GENERATE 0x02 /* generate start condition */
|
||||
|
||||
/* Stop condition trigger (SPT0) */
|
||||
#define IIC0_STOPCONDITION 0x01
|
||||
#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */
|
||||
#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */
|
||||
|
||||
/*
|
||||
IIC Status Register 0 (IICS0)
|
||||
*/
|
||||
/* Master device status (MSTS0) */
|
||||
#define IIC0_MASTERSTATUS 0x80
|
||||
#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */
|
||||
#define IIC0_STATUS_MASTER 0x80 /* master device communication status */
|
||||
|
||||
/* Detection of arbitration loss (ALD0) */
|
||||
#define IIC0_ARBITRATION 0x40
|
||||
#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */
|
||||
#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */
|
||||
|
||||
/* Detection of extension code reception (EXC0) */
|
||||
#define IIC0_EXTENSIONCODE 0x20
|
||||
#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */
|
||||
#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */
|
||||
|
||||
/* Detection of matching addresses (COI0) */
|
||||
#define IIC0_ADDRESSMATCH 0x10
|
||||
#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */
|
||||
#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */
|
||||
|
||||
/* Detection of transmit/receive status (TRC0) */
|
||||
#define IIC0_STATUS 0x08
|
||||
#define IIC0_STATUS_RECEIVE 0x00 /* receive status */
|
||||
#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */
|
||||
|
||||
/* Detection of acknowledge signal (ACKD0) */
|
||||
#define IIC0_ACKDETECTION 0x04
|
||||
#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */
|
||||
#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */
|
||||
|
||||
/* Detection of start condition (STD0) */
|
||||
#define IIC0_STARTDETECTION 0x02
|
||||
#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */
|
||||
#define IIC0_START_DETECTED 0x02 /* start condition detected */
|
||||
|
||||
/* Detection of stop condition (SPD0) */
|
||||
#define IIC0_STOPDETECTION 0x01
|
||||
#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */
|
||||
#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */
|
||||
|
||||
/*
|
||||
IIC Flag Register 0 (IICF0)
|
||||
*/
|
||||
/* STT0 clear flag (STCF) */
|
||||
#define IIC0_STARTFLAG 0x80
|
||||
#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */
|
||||
#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */
|
||||
|
||||
/* IIC bus status flag (IICBSY) */
|
||||
#define IIC0_BUSSTATUS 0x40
|
||||
#define IIC0_BUS_RELEASE 0x00 /* bus release status */
|
||||
#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */
|
||||
|
||||
/* Initial start enable trigger (STCEN) */
|
||||
#define IIC0_STARTWITHSTOP 0x02
|
||||
#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */
|
||||
#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */
|
||||
|
||||
/* Communication reservation function disable bit (IICRSV) */
|
||||
#define IIC0_RESERVATION 0x01
|
||||
#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */
|
||||
#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */
|
||||
|
||||
/*
|
||||
IIC clock selection register 0 (IICCL0)
|
||||
*/
|
||||
#define IICCL0_INITIALVALUE 0x00
|
||||
/* Detection of SCL0 pin level (CLD0) */
|
||||
#define IIC0_SCLLEVEL 0x20
|
||||
#define IIC0_SCL_LOW 0x00 /* clock line at low level */
|
||||
#define IIC0_SCL_HIGH 0x20 /* clock line at high level */
|
||||
|
||||
/* Detection of SDA0 pin level (DAD0) */
|
||||
#define IIC0_SDALEVEL 0x10
|
||||
#define IIC0_SDA_LOW 0x00 /* data line at low level */
|
||||
#define IIC0_SDA_HIGH 0x10 /* data line at high level */
|
||||
|
||||
/* Operation mode switching (SMC0) */
|
||||
#define IIC0_OPERATIONMODE 0x08
|
||||
#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */
|
||||
#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */
|
||||
|
||||
/* Digital filter operation control (DFC0) */
|
||||
#define IIC0_DIGITALFILTER 0x04
|
||||
#define IIC0_FILTER_OFF 0x00 /* digital filter off */
|
||||
#define IIC0_FILTER_ON 0x04 /* digital filter on */
|
||||
|
||||
/* Operation mode switching (CL01, CL00) */
|
||||
#define IIC0_CLOCKSELECTION 0x03
|
||||
|
||||
/* Combine of (SMC0, CL01, CL00)*/
|
||||
#define IIC0_CLOCK0 0x00
|
||||
#define IIC0_CLOCK1 0x01
|
||||
#define IIC0_CLOCK2 0x02
|
||||
#define IIC0_CLOCK3 0x03
|
||||
#define IIC0_CLOCK4 0x08
|
||||
#define IIC0_CLOCK5 0x09
|
||||
#define IIC0_CLOCK6 0x0a
|
||||
#define IIC0_CLOCK7 0x0b
|
||||
|
||||
/*
|
||||
IIC function expansion register 0 (IICX0)
|
||||
*/
|
||||
/* IIC clock expension (CLX0) */
|
||||
#define IIC0_CLOCKEXPENSION 0x01
|
||||
#define IIC0_EXPENSION0 0x00
|
||||
#define IIC0_EXPENSION1 0x01
|
||||
|
||||
/* Operation clock (CLX0, SMC0, CL01, CL00)
|
||||
| IIC0_EXPENSION0 | IIC0_EXPENSION1 |
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/88 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/172 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/344 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/66 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw)
|
||||
| fprs/96 | fprs/48 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/18 | | transfer clock
|
||||
| high speed | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
*/
|
||||
|
||||
#define ADDRESS_COMPLETE 0x80
|
||||
#define IIC_MASTER_FLAG_CLEAR 0x00
|
||||
|
||||
/******************************************************************************
|
||||
* Macro define
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function define
|
||||
******************************************************************************/
|
||||
|
||||
void IIC_ctr_Init( void );
|
||||
void IIC_ctr_Stop( void );
|
||||
|
||||
|
||||
#endif
|
||||
616
trunk/i2c_mcu.c
616
trunk/i2c_mcu.c
@ -1,616 +0,0 @@
|
||||
/* ========================================================
|
||||
簡易I2C(内蔵ペリフェラル使用)通信
|
||||
de JHL 藤田@開技
|
||||
'09 Feb -
|
||||
======================================================== */
|
||||
#pragma sfr
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma inline // memcpy()をインライン展開する(の方が小さい!)
|
||||
|
||||
#include "incs.h"
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
// レジスタのビット名
|
||||
// プリフィックスbだが、一部のビット名がレジスタ名にかぶるため...
|
||||
// SMR0n
|
||||
#define bCKS0 ( 1 << 15 )
|
||||
#define bCCS0 ( 1 << 14 )
|
||||
#define bSTS0 ( 1 << 8 )
|
||||
#define bSIS0 ( 1 << 6 )
|
||||
#define bMD0n2 ( 1 << 2 )
|
||||
#define bMD0n1 ( 1 << 1 )
|
||||
#define bMD0n0 ( 1 << 0 )
|
||||
#define bSMR0n_FIXEDBIT ( 1 << 5 )
|
||||
|
||||
// SSR0n
|
||||
#define bit_TSF0 6
|
||||
#define PEF0 ( 1 << 1 )
|
||||
|
||||
// SIR0n
|
||||
#define PECT0 ( 1 << 1 )
|
||||
|
||||
// SCR0n
|
||||
#define TXE0 ( 1 << 15 )
|
||||
#define RXE0 ( 1 << 14 )
|
||||
#define SLC02 4
|
||||
#define DLS02 0
|
||||
#define TSF0 ( 1 << 6 )
|
||||
|
||||
// SOn
|
||||
#define TAUS_MASK 0b0000101100001011;
|
||||
|
||||
// DMCn
|
||||
#define DRS ( 1 << 6 )
|
||||
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
static void iic_mcu_send_st( );
|
||||
static void iic_mcu_send_re_st( );
|
||||
static void iic_mcu_send_sp( );
|
||||
static err iic_mcu_send_a_byte( u8 );
|
||||
static err iic_mcu_call_slave( u8 slave );
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
bit iic_mcu_wo_dma;
|
||||
volatile bit iic_mcu_busy;
|
||||
volatile bit iic_mcu_initialized;
|
||||
|
||||
|
||||
u8 iic_send_work[4];
|
||||
u8 *p_iic_send_wo_dma_dat;
|
||||
u8 iic_send_wo_dma_len;
|
||||
|
||||
u8 iic_mcu_bus_status; // 一文字リードの時はデータを返す。
|
||||
// ステータスが必要ならこっちを呼んで
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void nop8()
|
||||
{
|
||||
// 実は nop11 位なのだが
|
||||
}
|
||||
|
||||
|
||||
static err iic_mcu_is_ready()
|
||||
{
|
||||
if( iic_mcu_initialized == 0 )
|
||||
{
|
||||
#ifdef _debug_
|
||||
iic_mcu_start( );
|
||||
#else
|
||||
return( ERR_ERR );
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
while( iic_mcu_busy )
|
||||
{
|
||||
NOP( );
|
||||
}
|
||||
iic_mcu_busy = 1;
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スレーブからの 『1文字』 リード
|
||||
返値がデータそのものです。
|
||||
======================================================== */
|
||||
u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs )
|
||||
{
|
||||
u8 dat;
|
||||
|
||||
#if 1
|
||||
// ラッパー
|
||||
if( iic_mcu_read( SLA, adrs, 1, &dat ) == ERR_SUCCESS )
|
||||
{
|
||||
iic_mcu_bus_status = ERR_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
iic_mcu_bus_status = ERR_NOSLAVE;
|
||||
}
|
||||
return ( dat );
|
||||
|
||||
#else
|
||||
iic_mcu_is_ready();
|
||||
|
||||
// スタートコンディションとスレーブの呼び出し、レジスタアドレスの送信
|
||||
if( iic_mcu_call_slave( SLA ) != 0 )
|
||||
{
|
||||
iic_mcu_bus_status = ERR_NOSLAVE;
|
||||
iic_mcu_busy = 0;
|
||||
return ( 0 );
|
||||
}
|
||||
|
||||
// レジスタアドレスの送信
|
||||
iic_mcu_send_a_byte( adrs ); // 終わるまで帰ってこない
|
||||
// if( err != ERR_SUCCESS )~
|
||||
|
||||
// データ受信 //
|
||||
iic_mcu_send_re_st( ); // リスタートコンディション
|
||||
iic_mcu_send_a_byte( SLA | 0x01 ); // 送信完了まで戻ってきません。
|
||||
|
||||
ST0 = 0x0004; // 受信モードに設定を変えるのでロジック停止
|
||||
SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02; // 受信設定
|
||||
SS0 = 0x0004; // 通信待機
|
||||
|
||||
SOE0 = 0x0000; // 1バイト送信なので、最後のNAKを送る
|
||||
IICIF10 = 0;
|
||||
SIO10 = 0xFF; // ダミーデータを書くと受信開始
|
||||
|
||||
while( IICIF10 == 0 )
|
||||
{ // 受信完了待ち
|
||||
;
|
||||
}
|
||||
dat = SIO10;
|
||||
|
||||
iic_mcu_send_sp( );
|
||||
IICIF10 = 0; // 後を濁さないこと
|
||||
iic_mcu_busy = 0;
|
||||
return ( dat );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スレーブからのリード
|
||||
0 正常終了
|
||||
1 スレーブが応答しない
|
||||
2 バスが誰かに占有されていてタイムアウト
|
||||
3 意味不明エラー
|
||||
【注】
|
||||
スレーブがウェイトコンディションを出すことは禁止です。
|
||||
その場合でもエラー検出などできません
|
||||
======================================================== */
|
||||
err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8 * dest )
|
||||
{
|
||||
|
||||
#if 1
|
||||
if( iic_mcu_is_ready() != ERR_SUCCESS )
|
||||
{
|
||||
return( ERR_ERR );
|
||||
}
|
||||
;
|
||||
#else
|
||||
// 使用中なら帰る
|
||||
if( iic_mcu_initialized == 0 ){
|
||||
return(0x80);
|
||||
}
|
||||
if( iic_mcu_busy != 0 ){
|
||||
return( 3 );
|
||||
}
|
||||
#endif
|
||||
|
||||
// スタートコンディションとスレーブの呼び出し、レジスタアドレスの送信
|
||||
if( iic_mcu_call_slave( slave ) != 0 )
|
||||
{
|
||||
iic_mcu_busy = 0;
|
||||
return ( ERR_NOSLAVE );
|
||||
}
|
||||
|
||||
// レジスタアドレスの送信
|
||||
iic_mcu_send_a_byte( adrs ); // 終わるまで帰ってこない
|
||||
// if( err != ERR_SUCCESS )~
|
||||
|
||||
// データ受信 //
|
||||
iic_mcu_send_re_st( ); // リスタートコンディション
|
||||
iic_mcu_send_a_byte( slave | 0x01 ); // 送信完了まで戻ってきません。
|
||||
|
||||
// データ受信
|
||||
ST0 = 0x0004; // 受信モードに設定を変えるのでロジック停止
|
||||
SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02; // 受信設定
|
||||
SS0 = 0x0004; // 通信待機
|
||||
|
||||
do
|
||||
{
|
||||
if( len == 1 )
|
||||
{
|
||||
SOE0 = 0x0000; // 最後のNAK
|
||||
}
|
||||
IICIF10 = 0;
|
||||
SIO10 = 0xFF; // ダミーデータを書くと受信開始
|
||||
while( IICIF10 == 0 )
|
||||
{ // 受信完了待ち
|
||||
;
|
||||
}
|
||||
*dest = SIO10;
|
||||
dest++;
|
||||
len--;
|
||||
}
|
||||
while( len != 0 );
|
||||
|
||||
iic_mcu_send_sp( );
|
||||
|
||||
IICIF10 = 0;
|
||||
iic_mcu_busy = 0;
|
||||
return ( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スレーブへ 『1バイト』 ライト
|
||||
前の転送が終わるのを待って、ライトします。
|
||||
返値 iic_mcu_write に同じ
|
||||
======================================================== */
|
||||
err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat )
|
||||
{
|
||||
// ラッパー
|
||||
static u8 temp; // 書きっぱなしで終了を見ずに関数を抜ける(可能性が高い)のでstatic
|
||||
|
||||
#if 0
|
||||
|
||||
// これをしないと、立て続けに書いたときに前のデータを破壊してしまう
|
||||
while( iic_mcu_busy )
|
||||
{
|
||||
NOP( );
|
||||
}
|
||||
|
||||
temp = dat;
|
||||
iic_mcu_wo_dma = 1;
|
||||
return ( iic_mcu_write( SLA, adrs, 1, &temp ) );
|
||||
#else
|
||||
// 1文字の時はDMAとか起動しないでさっさと終わらせる
|
||||
iic_mcu_is_ready();
|
||||
|
||||
// スタートコンディションとスレーブの呼び出し...
|
||||
IICMK10 = 1;
|
||||
if( iic_mcu_call_slave( SLA ) != 0 )
|
||||
{
|
||||
iic_mcu_busy = 0;
|
||||
return ( ERR_NAK );
|
||||
}
|
||||
iic_mcu_send_a_byte( adrs );
|
||||
iic_mcu_send_a_byte( dat );
|
||||
iic_mcu_send_sp( );
|
||||
iic_mcu_busy = 0;
|
||||
return ( ERR_SUCCESS );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スレーブへライト
|
||||
レジスタ adrs を先頭に、
|
||||
*strから
|
||||
len文字書きます。
|
||||
|
||||
0 正常終了
|
||||
1 スレーブが応答しない
|
||||
2 バスが誰かに占有されていてタイムアウト
|
||||
3 前に指示された通信がまだ終わってない
|
||||
【注】
|
||||
スレーブがウェイトコンディションを出すことは禁止です。
|
||||
その場合でもエラー検出などできません
|
||||
DMA1を使用します。
|
||||
******************************************************************************/
|
||||
err iic_mcu_write( u8 slave, u8 adrs, u8 len, void * src )
|
||||
{
|
||||
if( iic_mcu_is_ready() != ERR_SUCCESS )
|
||||
{
|
||||
return( ERR_ERR );
|
||||
}
|
||||
#if 0
|
||||
// 使用中なら帰る
|
||||
if( iic_mcu_initialized == 0 ){
|
||||
return(0x80);
|
||||
}
|
||||
if( iic_mcu_busy != 0 ){
|
||||
return( 3 );
|
||||
}
|
||||
#endif
|
||||
|
||||
// スタートコンディションとスレーブの呼び出し...
|
||||
IICMK10 = 1;
|
||||
IICIF10 = 0;
|
||||
if( iic_mcu_call_slave( slave ) != 0 )
|
||||
{
|
||||
iic_mcu_busy = 0;
|
||||
EI( );
|
||||
return ( ERR_NAK );
|
||||
}
|
||||
|
||||
IICIF10 = 0;
|
||||
if( !iic_mcu_wo_dma )
|
||||
{
|
||||
// DMAを使用する(通常)
|
||||
|
||||
// レジスタアドレスを送り、データの準備
|
||||
memcpy( iic_send_work, src, 4 ); //バッファとして4バイトしか用意して無いため。
|
||||
// DMAセット
|
||||
while( DST1 )
|
||||
{;
|
||||
}
|
||||
|
||||
DEN1 = 1;
|
||||
DSA1 = ( u8 ) ( &SIO10 );
|
||||
DRA1 = &iic_send_work[0];
|
||||
DBC1 = len;
|
||||
DMC1 = DRS | 8; // RAM -> SFR, 8bit, IRQ, IIC10
|
||||
|
||||
DMAIF1 = 0;
|
||||
DMAMK1 = 0;
|
||||
DST1 = 1;
|
||||
|
||||
SIO10 = adrs; // 書きっぱなし! 割り込みが発生してDMAスタート
|
||||
// 残りは割り込みルーチン内で
|
||||
}
|
||||
else
|
||||
{
|
||||
// DMAを使用しない //
|
||||
|
||||
// レジスタアドレスの送信
|
||||
IICMK10 = 0;
|
||||
SIO10 = adrs;
|
||||
|
||||
iic_send_wo_dma_len = len;
|
||||
p_iic_send_wo_dma_dat = src;
|
||||
// 残りは割り込みルーチン内で
|
||||
}
|
||||
|
||||
return ( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
DMA1転送終了割り込み
|
||||
IIC_mcu の送信完了コールバック関数のようなもの
|
||||
注:DMA転送が終わっただけで、I2Cの転送は終わってません
|
||||
割り込み中などで、DMA1の処理が遅延した場合、
|
||||
IIC10の割り込みの準備ができずに、割り込みを発生させられなくなる
|
||||
恐れがあります。また、回避方法も特にありません。
|
||||
そのため、DMA仕様の差異は、最後のバイトは送信完了を
|
||||
フラグのポーリングで確認します。
|
||||
======================================================== */
|
||||
__interrupt void int_dma1( )
|
||||
{
|
||||
u16 i = 0;
|
||||
|
||||
EI();
|
||||
|
||||
DMAMK1 = 1;
|
||||
DEN1 = 0;
|
||||
while( ( SSR02L & TSF0 ) != 0 )
|
||||
{
|
||||
if( ++i == 0 ) // タイムアウト?
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// iic_mcu_send_sp(); // ISR中で外の関数を呼ぶのは都合が悪いので展開
|
||||
{
|
||||
ST0 = 0x0004;
|
||||
SOE0 = 0; // 受信の時はもっと前に「も」設定してる。(NACK出力)
|
||||
SO0 = 0x0000 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0400 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0404 | TAUS_MASK;
|
||||
}
|
||||
IICMK10 = 1;
|
||||
iic_mcu_busy = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
IIC MCUのバイト送出完了割り込み
|
||||
※DMA使用時は使用されません。
|
||||
他の割り込み処理中でDMAの割り込みにすぐ飛ばない場合、
|
||||
IIC割り込みのセットが間に合わず困ることがあります。
|
||||
======================================================== */
|
||||
__interrupt void int_iic10( )
|
||||
{
|
||||
EI();
|
||||
if( iic_send_wo_dma_len != 0 )
|
||||
{
|
||||
SIO10 = *p_iic_send_wo_dma_dat;
|
||||
p_iic_send_wo_dma_dat++;
|
||||
iic_send_wo_dma_len--;
|
||||
return;
|
||||
}
|
||||
|
||||
// 最後のバイト送信完了
|
||||
IICMK10 = 1;
|
||||
// iic_mcu_send_sp(); // ISR中で外の関数を呼ぶのは都合が悪いので展開
|
||||
{
|
||||
ST0 = 0x0004;
|
||||
SOE0 = 0; // 受信の時はもっと前に「も」設定してる。(NACK出力)
|
||||
SO0 = 0x0000 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0400 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0404 | TAUS_MASK;
|
||||
}
|
||||
iic_mcu_wo_dma = 0;
|
||||
iic_mcu_busy = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スレーブの呼び出し
|
||||
スレーブアドレスを呼んで、ACKの確認。
|
||||
ACK → 返:0
|
||||
NACK → ストップコンディションを出す。 返:1
|
||||
======================================================== */
|
||||
static err iic_mcu_call_slave( u8 slave )
|
||||
{
|
||||
iic_mcu_send_st( );
|
||||
|
||||
// SIR02 = SSR02; // NAKエラーのフラグクリア
|
||||
if( iic_mcu_send_a_byte( slave ) != ERR_SUCCESS )
|
||||
{
|
||||
iic_mcu_send_sp( );
|
||||
return ( ERR_NAK ); // 指定のスレーブがいない / busy
|
||||
}
|
||||
|
||||
return ( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ほんとに1バイト書くのみ
|
||||
書き終わるまで帰りません
|
||||
======================================================== */
|
||||
static err iic_mcu_send_a_byte( u8 dat )
|
||||
{
|
||||
IICMK10 = 1;
|
||||
IICIF10 = 0;
|
||||
SIO10 = dat;
|
||||
while( IICIF10 == 0 )
|
||||
{
|
||||
NOP( );
|
||||
} // 通信中
|
||||
if( SSR02 != 0 )
|
||||
{
|
||||
SIR02 = SSR02;
|
||||
return ( ERR_NAK );
|
||||
}
|
||||
return ( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スタートコンディションを発行
|
||||
ソフトウェア制御
|
||||
======================================================== */
|
||||
static void iic_mcu_send_st( )
|
||||
{
|
||||
SO0 &= ~0x0004; // SDA
|
||||
nop8();
|
||||
|
||||
SO0 &= ~0x0400; // SCL
|
||||
SOE0 = 0x0004; // ハード制御へ
|
||||
|
||||
SCR02 = TXE0 | 1 << SLC02 | 7 << DLS02; // 送信許可、データは8ビット単位
|
||||
SS0 = 0x0004; // 通信待機
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
リスタート発行
|
||||
======================================================== */
|
||||
static void iic_mcu_send_re_st( )
|
||||
{
|
||||
ST0 |= 0x0004;
|
||||
SO0 |= 0x0400 | TAUS_MASK; // ( SDA = H ), SCL -> H
|
||||
nop8();
|
||||
|
||||
SOE0 &= ~0x0004; // ( SCL = H ), SDA -> L
|
||||
nop8();
|
||||
|
||||
iic_mcu_send_st( );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ストップコンディション発行
|
||||
この前に、「最後のバイトの送受信」の時に前準備が必要です。
|
||||
======================================================== */
|
||||
static void iic_mcu_send_sp( )
|
||||
{
|
||||
ST0 = 0x0004;
|
||||
SOE0 = 0; // 受信の時はもっと前に「も」設定してる。(NACK出力)
|
||||
SO0 = 0x0000 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0400 | TAUS_MASK; // SCL
|
||||
nop8();
|
||||
|
||||
SO0 = 0x0404 | TAUS_MASK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ペリフェラルモジュールの初期化
|
||||
======================================================== */
|
||||
void iic_mcu_start( )
|
||||
{
|
||||
DST1 = 0;
|
||||
NOP( ); // 2clkもしくは、DSTn==0をポーリング
|
||||
NOP( );
|
||||
DEN1 = 0;
|
||||
|
||||
I2C_PU_on();
|
||||
wait_ms( 10 ); // 立ち上がるのに50us位かかる
|
||||
|
||||
SAU0EN = 1;
|
||||
nop8();
|
||||
|
||||
SPS0 = 0x0000; // シリアルユニットのクロック0。(8M/2)/1
|
||||
SMR02 = bSMR0n_FIXEDBIT | bMD0n2; // 簡易I2Cに設定
|
||||
#ifdef _OVERCLOCK_
|
||||
// todo
|
||||
// SDR02 = 12 << 9; // ボーレート設定 8M/1/(x+1)/2
|
||||
SDR02 = 13 << 9; // ボーレート設定 (8M/2)/1/(x+1)/2
|
||||
#else
|
||||
SDR02 = 5 << 9; // ボーレート設定 (8M/2)/1/(x+1)/2
|
||||
#endif
|
||||
|
||||
SO0 = 0x0404 | TAUS_MASK; // 最初はHH
|
||||
iic_mcu_busy = 0;
|
||||
iic_mcu_wo_dma = 0;
|
||||
|
||||
|
||||
// バスのリセット
|
||||
IICIF10 = 0;
|
||||
IICMK10 = 1;
|
||||
|
||||
iic_mcu_send_st();
|
||||
|
||||
SIO10 = 0xFF;
|
||||
while( IICIF10 == 0 ){} // 通信中
|
||||
iic_mcu_send_sp();
|
||||
|
||||
SIR02 = SSR02;
|
||||
|
||||
iic_mcu_initialized = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
モジュールの停止
|
||||
再度使うときは初期化が必要
|
||||
======================================================== */
|
||||
void iic_mcu_stop( )
|
||||
{
|
||||
while( iic_mcu_busy )
|
||||
{;
|
||||
} // DMA動作中はもう少し待つ
|
||||
iic_mcu_send_re_st( ); // SCL,SDAをLLにする
|
||||
I2C_PU_off();
|
||||
SAU0EN = 0;
|
||||
iic_mcu_initialized = 0;
|
||||
}
|
||||
@ -1,34 +0,0 @@
|
||||
#ifndef __ic2_mcu__
|
||||
#define __ic2_mcu__
|
||||
|
||||
|
||||
// ========================================================
|
||||
#define ERR_OK 0
|
||||
#define ERR_NAK 1
|
||||
#define ERR_NOSLAVE 2
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
extern volatile bit iic_mcu_busy;
|
||||
extern bit iic_mcu_wo_dma;
|
||||
|
||||
extern u8 iic_mcu_bus_status;
|
||||
|
||||
|
||||
// ========================================================
|
||||
err iic_mcu_read( u8 SLA, u8 adrs, u8 len, u8 * dest );
|
||||
u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs );
|
||||
|
||||
err iic_mcu_write( u8 SLA, u8 adrs, u8 len, void * src );
|
||||
err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat );
|
||||
|
||||
|
||||
// ↓その通信が完了したら解除されます。
|
||||
#define iic_mcu_set_wo_dma() { while( iic_mcu_busy ){;} iic_mcu_wo_dma = 1; }
|
||||
|
||||
void iic_mcu_start( );
|
||||
void iic_mcu_stop( );
|
||||
|
||||
|
||||
#endif
|
||||
213
trunk/i2c_twl.c
213
trunk/i2c_twl.c
@ -1,213 +0,0 @@
|
||||
#pragma sfr /* 特殊機能レジスタ使用 */
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
|
||||
#include "config.h"
|
||||
#ifdef _MCU_KE3_
|
||||
#else
|
||||
#pragma interrupt INTIICA0 int_iic_twl RB2
|
||||
#endif
|
||||
|
||||
#include "incs.h"
|
||||
#include "i2c_twl_defs.h"
|
||||
|
||||
|
||||
extern u8 vreg_twl[];
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
//#ifdef _MODEL_TS0_ || _MODEL_WM0_
|
||||
|
||||
// ワーキングモデルはI2Cが逆
|
||||
#define ACKD ACKD0
|
||||
#define ACKE ACKE0
|
||||
#define COI COI0
|
||||
#define IICAEN IICA0EN
|
||||
#define IICRSV IICRSV0
|
||||
#define IICA IICA0
|
||||
#define IICAIF IICAIF0
|
||||
#define IICAMK IICAMK0
|
||||
#define IICAPR0 IICAPR00
|
||||
#define IICAPR1 IICAPR10
|
||||
#define IICCTL0 IICCTL00
|
||||
#define IICE IICE0
|
||||
#define IICF IICF0
|
||||
#define IICS IICS0
|
||||
#define IICWH IICWH0
|
||||
#define IICWL IICWL0
|
||||
#define LREL LREL0
|
||||
#define SPD SPD0
|
||||
#define SPIE SPIE0
|
||||
#define STCEN STCEN0
|
||||
#define STD STD0
|
||||
#define SVA SVA0
|
||||
#define WREL WREL0
|
||||
#define WTIM WTIM0
|
||||
#define SMC SMC0
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef _MCU_BSR_
|
||||
|
||||
// ke3の時はダミー関数
|
||||
void IIC_twl_Stop( void )
|
||||
{
|
||||
}
|
||||
void IIC_twl_Init( void )
|
||||
{
|
||||
}
|
||||
#else
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
u8 vreg_adrs;
|
||||
u8 pre_dat;
|
||||
|
||||
|
||||
u16 tot;
|
||||
|
||||
|
||||
// 注! ↓はマクロなので、returnはメインループに戻ります。
|
||||
#define wait_next { \
|
||||
tot = 0; \
|
||||
while( IICAIF != 1 ){ \
|
||||
if( SPD ){ \
|
||||
LREL = 1; \
|
||||
return; \
|
||||
} \
|
||||
tot++; \
|
||||
if( tot == 0 ){ \
|
||||
LREL = 1; \
|
||||
return; \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
__interrupt void int_iic_twl( )
|
||||
{
|
||||
u8 temp;
|
||||
u16 tot;
|
||||
|
||||
// WDT_Restart();
|
||||
// フラグ1回目 スレーブアドレス,R/W
|
||||
/* COI != 1 なら、割り込みはいらない
|
||||
if( COI != 1 ){ // 被呼び出し?
|
||||
LREL = 1; // 呼ばれたのは他のID
|
||||
return;
|
||||
}else{
|
||||
ACKE0 = 1; // 自動でackを返すようにする
|
||||
WREL = 1; // ウェイト解除して次のバイトを待つ
|
||||
}
|
||||
*/
|
||||
WREL = 1; // ウェイト解除して次のバイトを待つ
|
||||
wait_next; // 1バイト受信完了を待つ
|
||||
|
||||
// 2回目 R/W レジスタアドレス
|
||||
temp = IICA;
|
||||
IICAIF = 0;
|
||||
WREL = 1;
|
||||
|
||||
vreg_adrs = adrs_table_twl_ext2int( temp );
|
||||
|
||||
// 3回目
|
||||
// スタートコンディションか、データ受信完了フラグ待ち
|
||||
|
||||
while( 1 )
|
||||
{
|
||||
u8 my_iics = IICS;
|
||||
|
||||
if( my_iics & 0x01 ) // SPD
|
||||
{ // 強制終了
|
||||
LREL = 1;
|
||||
return;
|
||||
}
|
||||
else if( my_iics & 0x02 ) // ( STD && !SPD )
|
||||
{
|
||||
// 送信 // (スタートコンディション検出)
|
||||
pre_dat = vreg_twl_read( vreg_adrs ); // mcu内部アドレスを渡す。一バイト目の準備 IICBに書き込むとウェイト解除
|
||||
|
||||
// 自局をRで呼ばれるのを待つ
|
||||
wait_next;
|
||||
IICAIF = 0;
|
||||
if( COI != 1 )
|
||||
{ // 被呼び出し?
|
||||
LREL = 1; // 呼ばれたのは他のID(あれ?)
|
||||
return;
|
||||
}
|
||||
IICA = pre_dat; // データを送る。ウェイトも解除される。
|
||||
|
||||
wait_next;
|
||||
// 4回目。(送信データ後の、ACK/NACK後) どうしても発生してしまう。
|
||||
IICAIF = 0; // おしまい
|
||||
LREL = 1;
|
||||
return;
|
||||
}
|
||||
else if( IICAIF && (( my_iics & 0x03 ) == 0 )) // !STD && !SPD )
|
||||
{
|
||||
// 受信 //
|
||||
IICAIF = 0;
|
||||
temp = IICA;
|
||||
WREL = 1;
|
||||
|
||||
// 通常アクセス(ライト) //
|
||||
LREL = 1; // スタートコンディション待ちへ(連続書き込み未対応のため)
|
||||
vreg_twl_write( vreg_adrs, temp );
|
||||
return; // 受信おしまい //
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*****************************************************/
|
||||
void IIC_twl_Init( void )
|
||||
{
|
||||
|
||||
IICAEN = 1;
|
||||
|
||||
IICE = 0; /* IICA disable */
|
||||
|
||||
IICAMK = 1; /* INTIICA disable */
|
||||
IICAIF = 0; /* clear INTIICA interrupt flag */
|
||||
|
||||
IICAPR0 = 0; /* set INTIICA high priority */
|
||||
IICAPR1 = 0; /* set INTIICA high priority */
|
||||
P20 &= ~0x3;
|
||||
|
||||
SVA = IIC_T_SLAVEADDRESS;
|
||||
IICF = 0x01;
|
||||
|
||||
STCEN = 1; // リスタートの許可
|
||||
IICRSV = 1; // 通信予約をさせない:スレーブに徹する
|
||||
|
||||
SPIE = 0; // ストップコンディションでの割り込みを禁止
|
||||
WTIM = 1; // 自動でACKを返した後clkをLに固定する
|
||||
ACKE = 1; // ダメCPUは無視して次の通信をはじめるかもしれないんで早くclkを開放しないといけない
|
||||
|
||||
IICWH = 5;
|
||||
IICWL = 10; // L期間の長さ(?)
|
||||
|
||||
SMC = 1;
|
||||
|
||||
IICAMK = 0; // 割り込みを許可
|
||||
|
||||
IICE = 1;
|
||||
|
||||
PM20 &= ~0x3; /* set clock pin for IICA */
|
||||
|
||||
LREL = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//****************************************************************************
|
||||
void IIC_twl_Stop( void )
|
||||
{
|
||||
IICE = 0; /* IICA disable */
|
||||
IICAEN = 0;
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,7 +0,0 @@
|
||||
#ifndef _iic_twl_
|
||||
#define _iic_twl_
|
||||
|
||||
void IIC_twl_Init( void );
|
||||
void IIC_twl_Stop( void );
|
||||
|
||||
#endif
|
||||
@ -1,196 +0,0 @@
|
||||
#ifndef _MDSERIAL_
|
||||
#define _MDSERIAL_
|
||||
|
||||
|
||||
/* IIC operation enable (IICE0) */
|
||||
#define IIC0_OPERATION 0x80
|
||||
#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */
|
||||
#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */
|
||||
|
||||
/* Exit from communications (LREL0) */
|
||||
#define IIC0_COMMUNICATION 0x40
|
||||
#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */
|
||||
#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */
|
||||
|
||||
/* Wait cancellation (WREL0) */
|
||||
#define IIC0_WAITCANCEL 0x20
|
||||
#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */
|
||||
#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */
|
||||
|
||||
/* Generation of interrupt when stop condition (SPIE0) */
|
||||
#define IIC0_STOPINT 0x10
|
||||
#define IIC0_STOPINT_DISABLE 0x00 /* disable */
|
||||
#define IIC0_STOPINT_ENABLE 0x10 /* enable */
|
||||
|
||||
/* Wait and interrupt generation (WTIM0) */
|
||||
#define IIC0_WAITINT 0x08
|
||||
#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */
|
||||
#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */
|
||||
|
||||
/* Acknowledgement control (ACKE0) */
|
||||
#define IIC0_ACK 0x04
|
||||
#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */
|
||||
#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */
|
||||
|
||||
/* Start condition trigger (STT0) */
|
||||
#define IIC0_STARTCONDITION 0x02
|
||||
#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */
|
||||
#define IIC0_START_GENERATE 0x02 /* generate start condition */
|
||||
|
||||
/* Stop condition trigger (SPT0) */
|
||||
#define IIC0_STOPCONDITION 0x01
|
||||
#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */
|
||||
#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */
|
||||
|
||||
/*
|
||||
IIC Status Register 0 (IICS0)
|
||||
*/
|
||||
/* Master device status (MSTS0) */
|
||||
#define IIC0_MASTERSTATUS 0x80
|
||||
#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */
|
||||
#define IIC0_STATUS_MASTER 0x80 /* master device communication status */
|
||||
|
||||
/* Detection of arbitration loss (ALD0) */
|
||||
#define IIC0_ARBITRATION 0x40
|
||||
#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */
|
||||
#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */
|
||||
|
||||
/* Detection of extension code reception (EXC0) */
|
||||
#define IIC0_EXTENSIONCODE 0x20
|
||||
#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */
|
||||
#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */
|
||||
|
||||
/* Detection of matching addresses (COI0) */
|
||||
#define IIC0_ADDRESSMATCH 0x10
|
||||
#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */
|
||||
#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */
|
||||
|
||||
/* Detection of transmit/receive status (TRC0) */
|
||||
#define IIC0_STATUS 0x08
|
||||
#define IIC0_STATUS_RECEIVE 0x00 /* receive status */
|
||||
#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */
|
||||
|
||||
/* Detection of acknowledge signal (ACKD0) */
|
||||
#define IIC0_ACKDETECTION 0x04
|
||||
#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */
|
||||
#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */
|
||||
|
||||
/* Detection of start condition (STD0) */
|
||||
#define IIC0_STARTDETECTION 0x02
|
||||
#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */
|
||||
#define IIC0_START_DETECTED 0x02 /* start condition detected */
|
||||
|
||||
/* Detection of stop condition (SPD0) */
|
||||
#define IIC0_STOPDETECTION 0x01
|
||||
#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */
|
||||
#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */
|
||||
|
||||
/*
|
||||
IIC Flag Register 0 (IICF0)
|
||||
*/
|
||||
/* STT0 clear flag (STCF) */
|
||||
#define IIC0_STARTFLAG 0x80
|
||||
#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */
|
||||
#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */
|
||||
|
||||
/* IIC bus status flag (IICBSY) */
|
||||
#define IIC0_BUSSTATUS 0x40
|
||||
#define IIC0_BUS_RELEASE 0x00 /* bus release status */
|
||||
#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */
|
||||
|
||||
/* Initial start enable trigger (STCEN) */
|
||||
#define IIC0_STARTWITHSTOP 0x02
|
||||
#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */
|
||||
#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */
|
||||
|
||||
/* Communication reservation function disable bit (IICRSV) */
|
||||
#define IIC0_RESERVATION 0x01
|
||||
#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */
|
||||
#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */
|
||||
|
||||
/*
|
||||
IIC clock selection register 0 (IICCL0)
|
||||
*/
|
||||
#define IICCL0_INITIALVALUE 0x00
|
||||
/* Detection of SCL0 pin level (CLD0) */
|
||||
#define IIC0_SCLLEVEL 0x20
|
||||
#define IIC0_SCL_LOW 0x00 /* clock line at low level */
|
||||
#define IIC0_SCL_HIGH 0x20 /* clock line at high level */
|
||||
|
||||
/* Detection of SDA0 pin level (DAD0) */
|
||||
#define IIC0_SDALEVEL 0x10
|
||||
#define IIC0_SDA_LOW 0x00 /* data line at low level */
|
||||
#define IIC0_SDA_HIGH 0x10 /* data line at high level */
|
||||
|
||||
/* Operation mode switching (SMC0) */
|
||||
#define IIC0_OPERATIONMODE 0x08
|
||||
#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */
|
||||
#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */
|
||||
|
||||
/* Digital filter operation control (DFC0) */
|
||||
#define IIC0_DIGITALFILTER 0x04
|
||||
#define IIC0_FILTER_OFF 0x00 /* digital filter off */
|
||||
#define IIC0_FILTER_ON 0x04 /* digital filter on */
|
||||
|
||||
/* Operation mode switching (CL01, CL00) */
|
||||
#define IIC0_CLOCKSELECTION 0x03
|
||||
|
||||
/* Combine of (SMC0, CL01, CL00)*/
|
||||
#define IIC0_CLOCK0 0x00
|
||||
#define IIC0_CLOCK1 0x01
|
||||
#define IIC0_CLOCK2 0x02
|
||||
#define IIC0_CLOCK3 0x03
|
||||
#define IIC0_CLOCK4 0x08
|
||||
#define IIC0_CLOCK5 0x09
|
||||
#define IIC0_CLOCK6 0x0a
|
||||
#define IIC0_CLOCK7 0x0b
|
||||
|
||||
/*
|
||||
IIC function expansion register 0 (IICX0)
|
||||
*/
|
||||
/* IIC clock expension (CLX0) */
|
||||
#define IIC0_CLOCKEXPENSION 0x01
|
||||
#define IIC0_EXPENSION0 0x00
|
||||
#define IIC0_EXPENSION1 0x01
|
||||
|
||||
/* Operation clock (CLX0, SMC0, CL01, CL00)
|
||||
| IIC0_EXPENSION0 | IIC0_EXPENSION1 |
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/88 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/172 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw)
|
||||
| fprs/344 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/66 | | transfer clock
|
||||
| normal | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw)
|
||||
| fprs/48 | fprs/24 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw)
|
||||
| fprs/96 | fprs/48 | transfer clock
|
||||
| high speed | high speed | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw)
|
||||
| fw/18 | | transfer clock
|
||||
| high speed | | mode
|
||||
------------|-------------------|-------------------|----------------------
|
||||
*/
|
||||
|
||||
#define ADDRESS_COMPLETE 0x80
|
||||
#define IIC_MASTER_FLAG_CLEAR 0x00
|
||||
|
||||
#endif
|
||||
37
trunk/incs.h
37
trunk/incs.h
@ -1,37 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
|
||||
#pragma section @@CODE ROM_CODE
|
||||
//#pragma section @@CNST ROM_CNST
|
||||
|
||||
//=========================================================
|
||||
#ifndef _incs_h_
|
||||
#define _incs_h_
|
||||
|
||||
// ↓ 歩数計で_pc_とで切り替えてます
|
||||
#define _mcu_
|
||||
|
||||
#include "jhl_defs.h"
|
||||
#include "user_define.h"
|
||||
|
||||
#include "bsr_system.h"
|
||||
#include "renge.h"
|
||||
|
||||
#include "vreg_ctr.h"
|
||||
#include "vreg_twl.h"
|
||||
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
#include "rtc.h"
|
||||
|
||||
#include "accero.h"
|
||||
|
||||
#include "pm.h"
|
||||
|
||||
//=========================================================
|
||||
|
||||
#endif
|
||||
@ -1,38 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
|
||||
|
||||
#pragma section @@CODE LDR_CODE
|
||||
#pragma section @@CODEL LDR_CODL
|
||||
|
||||
//#pragma section @@R_INIT FSL_RINT // これやるとスタートアップルーチンが初期値を
|
||||
//#pragma section @@CNST FSL_CNST // セットしてくれない
|
||||
#pragma section @@CNSTL LDR_CNSL
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
#include "jhl_defs.h"
|
||||
#include "user_define.h"
|
||||
|
||||
#include "bsr_system.h"
|
||||
#include "renge.h"
|
||||
|
||||
#include "vreg_ctr.h"
|
||||
#include "vreg_twl.h"
|
||||
|
||||
#include "loader.h"
|
||||
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
#include "WDT.h"
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
void firm_update( );
|
||||
void firm_restore( );
|
||||
381
trunk/ini_VECT.c
381
trunk/ini_VECT.c
@ -1,381 +0,0 @@
|
||||
#pragma nop
|
||||
|
||||
|
||||
#include "config.h"
|
||||
|
||||
//#pragma interrupt INTWDTI fn_intwdti // 未使用
|
||||
//#pragma interrupt INTLVI fn_intlvi // 未使用
|
||||
|
||||
//#pragma interrupt INTP0 intp0_slp // SLP (CPUより、要求) ポーリング
|
||||
//#pragma interrupt INTP1 fn_intp1 // (I2C)
|
||||
//#pragma interrupt INTP2 fn_intp2 // (I2C)
|
||||
//#pragma interrupt INTP3 fn_intp3 // 未搭載
|
||||
#pragma interrupt INTP4 intp4_extdc // EXTDC, ただし電源offから起こすのみ。通常はポーリング
|
||||
#pragma interrupt INTP5 intp5_shell // SHELL_CLOSE, ただし電源offから起こすのみ。通常はポーリング
|
||||
#pragma interrupt INTP6 intp6_PM_irq // CODEC経由で旧PMICへのコマンド書き込み
|
||||
|
||||
//#ifdef _MCU_BSR_ // 割り込みそのものは使いません
|
||||
//#pragma interrupt INTP21 intp21_RFTx // 電波送信パルス
|
||||
//#else
|
||||
//#pragma interrupt INTP7 intp21_RFTx
|
||||
//#endif
|
||||
|
||||
|
||||
/*
|
||||
|
||||
acceroへ
|
||||
#ifdef _MCU_BSR_
|
||||
#pragma interrupt INTP23 intp23_ACC_ready RB3 // 加速度センサ、データ準備完了
|
||||
#endif
|
||||
*/
|
||||
|
||||
//#pragma interrupt INTCMP0 fn_intcmp0
|
||||
//#pragma interrupt INTCMP1 fn_intcmp1
|
||||
//#pragma interrupt INTDMA0 fn_intdma0
|
||||
#pragma interrupt INTDMA1 int_dma1
|
||||
|
||||
//#pragma interrupt INTST0 fn_intst0
|
||||
/* #pragma interrupt INTCSI00 fn_intcsi00 */
|
||||
//#pragma interrupt INTSR0 fn_intsr0
|
||||
/* #pragma interrupt INTCSI01 fn_intcsi01 */
|
||||
//#pragma interrupt INTSRE0 fn_intsre0
|
||||
|
||||
//#pragma interrupt INTST1 fn_intst1
|
||||
/* #pragma interrupt INTCSI10 fn_intcsi10 */
|
||||
#pragma interrupt INTIIC10 int_iic10
|
||||
//#pragma interrupt INTSR1 fn_intsr1
|
||||
//#pragma interrupt INTSRE1 fn_intsre1
|
||||
|
||||
|
||||
/*
|
||||
それぞれの .c へ
|
||||
#ifdef _MCU_KE3_
|
||||
#pragma interrupt INTIICA int_iic_ctr RB1 // CTR側
|
||||
#else
|
||||
// TSはマザボでテレコ、WMは回路図がテレコで結局一致…
|
||||
#pragma interrupt INTIICA1 int_iic_ctr RB1
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _MCU_KE3_
|
||||
#else
|
||||
#pragma interrupt INTIICA0 int_iic_twl RB2
|
||||
#endif
|
||||
*/
|
||||
|
||||
//#pragma interrupt INTTM00 fn_inttm00
|
||||
//#pragma interrupt INTTM01 fn_inttm01
|
||||
//#pragma interrupt INTTM02 fn_inttm02
|
||||
//#pragma interrupt INTTM03 fn_inttm03
|
||||
|
||||
#pragma interrupt INTAD int_adc
|
||||
#pragma interrupt INTRTC int_rtc
|
||||
#pragma interrupt INTRTCI int_rtc_int
|
||||
#pragma interrupt INTKR int_kr
|
||||
//#pragma interrupt INTMD fn_intmd
|
||||
|
||||
//#pragma interrupt INTTM04 fn_inttm04
|
||||
//#pragma interrupt INTTM05 fn_inttm05
|
||||
//#pragma interrupt INTTM06 fn_inttm06
|
||||
//#pragma interrupt INTTM07 fn_inttm07
|
||||
|
||||
//#define _irq_debug_
|
||||
/****************************************************/
|
||||
/* 未使用時のダミー関数定義 */
|
||||
/****************************************************/
|
||||
__interrupt void fn_intwdti( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
__interrupt void fn_intlvi( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intp0(){
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intp1( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
} //
|
||||
__interrupt void fn_intp2( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
__interrupt void fn_intp3( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
__interrupt void intp21_RFTx( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//__interrupt void fn_intp4(){ while(1){} } // pm.c
|
||||
//__interrupt void fn_intp5(){ while(1){} } // pm.c
|
||||
//__interrupt void fn_intp6(){ while(1){} } // pm.c
|
||||
//__interrupt void fn_intp7(){ while(1){} } // led.c
|
||||
//__interrupt void fn_intp21(){ while(1){} } // led.c
|
||||
|
||||
__interrupt void fn_intcmp0( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intcmp1( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intdma0( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//__interrupt void fn_intdma1(){} // i2c_mcu.cにある
|
||||
|
||||
__interrupt void fn_intst0( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* __interrupt void fn_intcsi00(){} */
|
||||
__interrupt void fn_intsr0( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* __interrupt void fn_intcsi01(){} */
|
||||
__interrupt void fn_intsre0( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intst1( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* __interrupt void fn_intcsi10(){} */
|
||||
//__interrupt void fn_intiic10(){ while(1){} }
|
||||
__interrupt void fn_intsr1( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_intsre1( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//__interrupt void fn_intiica(){} // i2c.cにある
|
||||
/* __interrupt void fn_inttm00(){} *//* sub.cにて定義 */
|
||||
__interrupt void fn_inttm01( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_inttm02( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
__interrupt void fn_inttm03( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//__interrupt void fn_intad(){ while(1){} } // adc.c
|
||||
__interrupt void fn_intrtc( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//__interrupt void int_rtcint(){} // rtc.cにある
|
||||
//__interrupt void fn_intkr(){} // main.c
|
||||
__interrupt void fn_intmd( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_inttm04( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_inttm05( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_inttm06( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
__interrupt void fn_inttm07( )
|
||||
{
|
||||
#ifdef _irq_debug_
|
||||
while( 1 )
|
||||
{
|
||||
NOP();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
キーリターン割り込み
|
||||
======================================================== */
|
||||
__interrupt void int_kr( )
|
||||
{
|
||||
// 起きるだけ
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ext dc
|
||||
======================================================== */
|
||||
__interrupt void intp4( )
|
||||
{
|
||||
// 起きるだけ
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
shell close
|
||||
======================================================== */
|
||||
__interrupt void intp5( )
|
||||
{
|
||||
// 起きるだけ
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -1,29 +0,0 @@
|
||||
#ifndef __jhl_defs_h__
|
||||
#define __jhl_defs_h__
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
|
||||
typedef unsigned short ux16;
|
||||
typedef signed short sx16;
|
||||
|
||||
typedef unsigned char err;
|
||||
|
||||
|
||||
#include "config.h"
|
||||
|
||||
|
||||
|
||||
#define set_bit( cond, reg, pos ) \
|
||||
{ \
|
||||
if( cond ){ \
|
||||
reg |= pos; \
|
||||
}else{ \
|
||||
reg &= ~pos; \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
653
trunk/led.c
653
trunk/led.c
@ -1,653 +0,0 @@
|
||||
/* ========================================================
|
||||
LED.c
|
||||
|
||||
======================================================== */
|
||||
#pragma sfr
|
||||
|
||||
|
||||
#include "incs.h"
|
||||
#include "led.h"
|
||||
|
||||
|
||||
#ifdef _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
|
||||
|
||||
// ========================================================
|
||||
// TPS0
|
||||
#define BIT_PRS012 ( 1 << 2 )
|
||||
#define BIT_PRS002 ( 1 << 6 )
|
||||
|
||||
// TMR0
|
||||
#define BIT_CKS0 15
|
||||
#define BIT_CCS0 12
|
||||
#define BIT_MASTER0 11
|
||||
#define BIT_STS0 8
|
||||
#define BIT_CIS0 6
|
||||
#define BIT_MD123 1
|
||||
#define BIT_MD0 0
|
||||
|
||||
// ========================================================
|
||||
static void led_pow_normal( );
|
||||
static void led_pow_hotaru( );
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
// お知らせLEDのパターンデータ
|
||||
uni_info_LED info_LED = {
|
||||
32, // 1フレームの長さ
|
||||
32, // グラデーション時間
|
||||
0, // 最終フレームをn回繰り返す
|
||||
0, // 予備
|
||||
{
|
||||
{255, 0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
|
||||
{0,255,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
|
||||
{0,0,255},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
|
||||
{255,255,255},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
{0,0,0},
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
//調光可能LEDのワークというか
|
||||
st_LED_dim_status LED_dim_status_pow_B;
|
||||
st_LED_dim_status LED_dim_status_3D;
|
||||
st_LED_dim_status LED_dim_status_WiFi;
|
||||
|
||||
|
||||
// 赤LEDの電池残量LEDの点滅パターン
|
||||
uni_led_red_batt_empty led_red_batt_empty;
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
#define led_fade_to( now, goal ) now = fade_to( now, goal )
|
||||
|
||||
|
||||
/* ========================================================
|
||||
reg_ledをgoalになるまでグラデーションする
|
||||
とりあえず、ステップ固定
|
||||
====================================================== */
|
||||
u8 fade_to( u8 now, u8 goal )
|
||||
{
|
||||
if( now != goal )
|
||||
{
|
||||
if( now > goal )
|
||||
{
|
||||
now -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
now += 1;
|
||||
}
|
||||
}
|
||||
return( now );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
#define led_fade_to2( led, status ) \
|
||||
led = fade_to2( status )
|
||||
|
||||
|
||||
u8 fade_to2( st_LED_dim_status* status )
|
||||
{
|
||||
if( status->now != status->to )
|
||||
{
|
||||
if( abs(( status->to - status->now )) > abs(status->delta) )
|
||||
{
|
||||
status->now += status->delta;
|
||||
}
|
||||
else
|
||||
{
|
||||
status->now = status->to;
|
||||
}
|
||||
}
|
||||
return( status->now / 128 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
|
||||
|
||||
// ========================================================
|
||||
void LED_init( )
|
||||
{
|
||||
/**
|
||||
PWMのセット、とりあえず全部消灯
|
||||
|
||||
マスタチャネル:0 (P01:/reset2) マスターは偶数チャネルしかできない
|
||||
スレーブ 1 SLTO。(3D LED?)
|
||||
2 カメラ
|
||||
3 WiFi
|
||||
4 (ピンはRTC32kHz out に使用)
|
||||
5 充電
|
||||
6 電源 L
|
||||
7 電源 H
|
||||
*/
|
||||
TAU0EN = 1;
|
||||
TPS0 = BIT_PRS012 | BIT_PRS002; // マスタークロックはCK01,8M/2 /2^4 = 250kHz
|
||||
|
||||
TMR00 =
|
||||
1 << BIT_CKS0 | 0 << BIT_CCS0 | 1 << BIT_MASTER0 | 0 << BIT_STS0 | 0
|
||||
<< BIT_CIS0 | 0 << BIT_MD123 | 1 << BIT_MD0;
|
||||
TMR01 = TMR02 = TMR03 = TMR04 = TMR05 = TMR06 = TMR07 =
|
||||
1 << BIT_CKS0 | 0 << BIT_CCS0 | 0 << BIT_MASTER0 | 4 << BIT_STS0 | 0
|
||||
<< BIT_CIS0 | 4 << BIT_MD123 | 1 << BIT_MD0;
|
||||
ISC = 0;
|
||||
TOM0 = 0b0000000011111110; // 出力モード。4はPWM出力しないが1にしないとTO5以降にクロックが届かない
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
TOL0 = 0b0000000000000000; // 出力を反転させるかフラグ
|
||||
#else
|
||||
TOL0 = 0b0000000000000100; // 出力を反転させるかフラグ
|
||||
#endif
|
||||
|
||||
TO0 = 0; // タイマー動作中で、タイマー出力にしてないときのピンのラッチ。タイマー出力を使わないなら0
|
||||
TOE0 = 0b0000000011101110; // TOxをタイマーモジュールが制御?
|
||||
TS0 = 0b0000000011101111; // 動作開始
|
||||
|
||||
TDR00 = LED_BRIGHT_MAX - 1; // 10bit, 周期
|
||||
|
||||
if( system_status.reboot )
|
||||
{
|
||||
vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO;
|
||||
LED_duty_pow_blu = LED_BRIGHT_MAX;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void LED_stop( )
|
||||
{
|
||||
TT0 = 0b0000000011101111; // 一斉停止(しないとだめ)
|
||||
TOE0 = 0b0000000000000000; // TOxをタイマーモジュールが制御?(GPIOになる)
|
||||
TAU0EN = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
// 電源LED
|
||||
LED_POW_B,R 6,7
|
||||
|
||||
TDR00 周期(0x03FF。TPS0で250kHzでカウントアップ。10bitなら250Hz位になる)
|
||||
TDR0x Duty 0で消灯、TDR00(より大 =0x03FF以上)で点灯です。
|
||||
|
||||
enum pwr_state_{
|
||||
OFF_TRIG = 0,
|
||||
OFF,
|
||||
ON_TRIG,
|
||||
ON,
|
||||
SLEEP_TRIG,
|
||||
SLEEP
|
||||
};
|
||||
|
||||
enum LED_ILUM_MODE{
|
||||
LED_POW_ILM_AUTO,
|
||||
LED_POW_ILM_ON,
|
||||
LED_POW_ILM_HOTARU,
|
||||
LED_POW_ILM_CEOFF
|
||||
};
|
||||
======================================================== */
|
||||
void tsk_led_pow( )
|
||||
{
|
||||
switch ( vreg_ctr[VREG_C_LED_POW] )
|
||||
{
|
||||
// 自動切り替え
|
||||
case ( LED_POW_ILM_AUTO ):
|
||||
switch ( system_status.pwr_state )
|
||||
{
|
||||
case SLEEP:
|
||||
led_pow_hotaru( );
|
||||
break;
|
||||
|
||||
case ON:
|
||||
led_pow_normal( );
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
// 強制
|
||||
case ( LED_POW_ILM_OFF ):
|
||||
led_fade_to( LED_duty_pow_blu, 0 );
|
||||
LED_pow_red = 0;
|
||||
break;
|
||||
|
||||
case ( LED_POW_ILM_HOTARU ):
|
||||
led_pow_hotaru( );
|
||||
break;
|
||||
|
||||
case ( LED_POW_ILM_ON ):
|
||||
default:
|
||||
led_pow_normal( );
|
||||
break;
|
||||
|
||||
case ( LED_POW_ILM_ONLY_RED ):
|
||||
led_fade_to( LED_duty_pow_blu, 0 );
|
||||
LED_pow_red = 1;
|
||||
break;
|
||||
|
||||
case ( LED_POW_ILM_ONLY_BLUE ):
|
||||
led_fade_to( LED_duty_pow_blu, LED_BRIGHT_MAX );
|
||||
LED_pow_red = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
電池残量で、 青→赤→赤点滅
|
||||
======================================================== */
|
||||
static void led_pow_normal( )
|
||||
{
|
||||
static u8 state;
|
||||
static u8 red_blink_poi;
|
||||
|
||||
u8 temp;
|
||||
|
||||
if( vreg_ctr[VREG_C_BT_REMAIN] <= BATT_TH_EMPTY )
|
||||
{
|
||||
// 赤点滅
|
||||
led_fade_to( LED_duty_pow_blu, 0 );
|
||||
#if 0
|
||||
state++;
|
||||
if( state < 127 )
|
||||
{
|
||||
LED_pow_red = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_pow_red = 1;
|
||||
}
|
||||
return;
|
||||
#endif
|
||||
led_fade_to( LED_duty_notify_grn, 0 );
|
||||
led_fade_to( LED_duty_notify_blu, 0 );
|
||||
|
||||
state += 1;
|
||||
if( state < 16 )
|
||||
{
|
||||
return;
|
||||
}
|
||||
state = 0;
|
||||
|
||||
if( ( led_red_batt_empty.bits & ( 1 << red_blink_poi )) != 1 )
|
||||
{
|
||||
LED_pow_red = 1;
|
||||
LED_duty_notify_red = 255;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_pow_red = 0;
|
||||
LED_duty_notify_red = 0;
|
||||
}
|
||||
|
||||
red_blink_poi += 1;
|
||||
if( red_blink_poi >= 32 )
|
||||
{
|
||||
red_blink_poi = 0;
|
||||
}
|
||||
}
|
||||
else if( vreg_ctr[VREG_C_BT_REMAIN] <= BATT_TH_LO )
|
||||
{
|
||||
// 赤点灯
|
||||
led_fade_to( LED_duty_pow_blu, 0 );
|
||||
LED_pow_red = 1;
|
||||
return;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
// 青点灯
|
||||
led_fade_to( LED_duty_pow_blu, vreg_ctr[VREG_C_LED_BRIGHT] );
|
||||
LED_pow_red = 0;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ホタルパターン
|
||||
======================================================== */
|
||||
static void led_pow_hotaru( )
|
||||
{
|
||||
static u8 delay;
|
||||
static u8 state;
|
||||
static u16 blue_to;
|
||||
|
||||
if( delay != 0 )
|
||||
{
|
||||
delay -= 1;
|
||||
return;
|
||||
}
|
||||
|
||||
delay = 10;
|
||||
|
||||
switch ( state )
|
||||
{
|
||||
// フェードイン
|
||||
case ( 0 ):
|
||||
case ( 2 ):
|
||||
case ( 4 ):
|
||||
if( vreg_ctr[VREG_C_BT_REMAIN] <= BATT_TH_LO )
|
||||
{
|
||||
blue_to = 0;
|
||||
LED_pow_red = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
blue_to = vreg_ctr[VREG_C_LED_BRIGHT];
|
||||
LED_pow_red = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
// フェードアウト
|
||||
if( vreg_ctr[VREG_C_BT_REMAIN] <= BATT_TH_LO )
|
||||
{
|
||||
LED_pow_red = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
blue_to = 2;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
// LED更新
|
||||
if( LED_duty_pow_blu != blue_to )
|
||||
{
|
||||
if( LED_duty_pow_blu > blue_to )
|
||||
{
|
||||
LED_duty_pow_blu -= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_duty_pow_blu += 2;
|
||||
}
|
||||
}
|
||||
|
||||
if( LED_duty_pow_blu == blue_to )
|
||||
{
|
||||
state += 1;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
* 割り込みそのものは使いません *
|
||||
LED_Wifi 3
|
||||
todo .old からのマージ
|
||||
======================================================== */
|
||||
void tsk_led_wifi( )
|
||||
{
|
||||
static u8 task_interval;
|
||||
static u8 remain_wifi_tx;
|
||||
static u8 state_wifi_tx;
|
||||
static u8 flag_wifi_TX;
|
||||
|
||||
|
||||
if( task_interval-- != 0 )
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
// 送信パルスのラッチ
|
||||
if( WIFI_txLatch ) // 割り込みフラグそのものを使ってしまう
|
||||
{
|
||||
WIFI_txLatch = 0;
|
||||
flag_wifi_TX = 2;
|
||||
}
|
||||
|
||||
if( flag_wifi_TX != 0 )
|
||||
{
|
||||
vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_WIFI_TX;
|
||||
// 送信パターン
|
||||
switch ( state_wifi_tx )
|
||||
{
|
||||
case ( 1 ):
|
||||
case ( 3 ):
|
||||
case ( 5 ):
|
||||
LED_duty_WiFi = 0;
|
||||
break;
|
||||
default:
|
||||
LED_duty_WiFi = vreg_ctr[VREG_C_LED_BRIGHT];
|
||||
}
|
||||
state_wifi_tx++;
|
||||
if( state_wifi_tx == 32 )
|
||||
{
|
||||
state_wifi_tx = 0;
|
||||
flag_wifi_TX -= 1;
|
||||
}
|
||||
task_interval = 22;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 送信フラグ待ち
|
||||
vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_WIFI_TX;
|
||||
if( vreg_ctr[VREG_C_LED_WIFI] == WIFI_LED_OFF )
|
||||
{
|
||||
LED_duty_WiFi = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_duty_WiFi = vreg_ctr[VREG_C_LED_BRIGHT];
|
||||
}
|
||||
task_interval = 100;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
お知らせLED
|
||||
======================================================== */
|
||||
void tsk_led_notify( )
|
||||
{
|
||||
// static u8 task_interval;
|
||||
static u8 time_to_next_frame;
|
||||
static u8 frame;
|
||||
static st_LED_dim_status LED_dim_status_info_R, LED_dim_status_info_G, LED_dim_status_info_B;
|
||||
|
||||
if( vreg_ctr[VREG_C_BT_REMAIN] <= BATT_TH_EMPTY )
|
||||
{
|
||||
// 電池切れが優先する
|
||||
return;
|
||||
}
|
||||
|
||||
// 次のフレームに進める?
|
||||
if( time_to_next_frame == 0 )
|
||||
{
|
||||
st_info_LED_ptn temp;
|
||||
|
||||
time_to_next_frame = info_LED.info_LED.term;
|
||||
|
||||
frame += 1;
|
||||
// 最後のフレームリピート
|
||||
if( frame > NOTIFY_LED_TERM + info_LED.info_LED.last_loop )
|
||||
{
|
||||
frame = 0;
|
||||
}
|
||||
|
||||
if( frame < NOTIFY_LED_TERM )
|
||||
{
|
||||
temp = info_LED.info_LED.ptn[ frame ];
|
||||
|
||||
LED_dim_status_info_R.to = temp.red * 128;
|
||||
LED_dim_status_info_G.to = temp.grn * 128;
|
||||
LED_dim_status_info_B.to = temp.blu * 128;
|
||||
|
||||
// グラデーションのデルタを計算
|
||||
LED_dim_status_info_R.delta = (( LED_dim_status_info_R.to - LED_dim_status_info_R.now ) ) / info_LED.info_LED.fade_time;
|
||||
LED_dim_status_info_G.delta = (( LED_dim_status_info_G.to - LED_dim_status_info_G.now ) ) / info_LED.info_LED.fade_time;
|
||||
LED_dim_status_info_B.delta = (( LED_dim_status_info_B.to - LED_dim_status_info_B.now ) ) / info_LED.info_LED.fade_time;
|
||||
}
|
||||
|
||||
}
|
||||
time_to_next_frame -= 1;
|
||||
|
||||
led_fade_to2( LED_duty_notify_red, &LED_dim_status_info_R );
|
||||
led_fade_to2( LED_duty_notify_grn, &LED_dim_status_info_G );
|
||||
led_fade_to2( LED_duty_notify_blu, &LED_dim_status_info_B );
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************//**
|
||||
LED_Cam TO02
|
||||
\n BLINK,*_PLUSE の時は、1周期分は必ずその状態になります。
|
||||
\n その間に OFF→BLINK などされると、OFFが無視されます。
|
||||
*********************************************************/
|
||||
void tsk_led_cam( )
|
||||
{
|
||||
static u8 state_led_cam = 0;
|
||||
static u8 task_interval;
|
||||
static u8 state_led_cam_twl;
|
||||
|
||||
if( task_interval != 0 )
|
||||
{
|
||||
task_interval -= 1;
|
||||
return;
|
||||
}
|
||||
|
||||
// ブリンクのように待たせたいとき以外は毎週起動する
|
||||
// (レジスタの変更にすぐに反応する)
|
||||
|
||||
switch ( vreg_ctr[VREG_C_LED_CAM] )
|
||||
{
|
||||
case ( CAM_LED_OFF ):
|
||||
default:
|
||||
LED_CAM = 0;
|
||||
state_led_cam = 0;
|
||||
break;
|
||||
|
||||
case ( CAM_LED_ON ):
|
||||
LED_CAM = 1;
|
||||
state_led_cam = 0;
|
||||
break;
|
||||
|
||||
case ( CAM_LED_BLINK ):
|
||||
if( state_led_cam == 0 )
|
||||
{
|
||||
LED_CAM = 1;
|
||||
state_led_cam = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_CAM = 0;
|
||||
state_led_cam = 0;
|
||||
}
|
||||
task_interval = 250;
|
||||
break;
|
||||
|
||||
case ( CAM_LED_ON_PLUSE ):
|
||||
if( state_led_cam == 0 )
|
||||
{
|
||||
LED_CAM = 1;
|
||||
state_led_cam = 1;
|
||||
task_interval = 250;
|
||||
}
|
||||
else
|
||||
{
|
||||
vreg_ctr[VREG_C_LED_CAM] = CAM_LED_OFF;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( CAM_LED_OFF_PLUSE ):
|
||||
if( state_led_cam == 0 )
|
||||
{
|
||||
LED_CAM = 0;
|
||||
state_led_cam = 1;
|
||||
task_interval = 250;
|
||||
}
|
||||
else
|
||||
{
|
||||
vreg_ctr[VREG_C_LED_CAM] = CAM_LED_ON;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( CAM_LED_BY_TWL ):
|
||||
switch ( vreg_twl[ REG_TWL_INT_ADRS_CAM ] ){ // switchのネストとか…
|
||||
case( TWL_CAMLED_OFF ):
|
||||
LED_CAM = 0;
|
||||
state_led_cam = 0;
|
||||
break;
|
||||
|
||||
case( TWL_CAMLED_BLINK ):
|
||||
if( state_led_cam == 0 )
|
||||
{
|
||||
LED_CAM = 1;
|
||||
state_led_cam = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_CAM = 0;
|
||||
state_led_cam = 0;
|
||||
}
|
||||
task_interval = 250;
|
||||
break;
|
||||
|
||||
case( TWL_CAMLED_ON ):
|
||||
case( TWL_CAMLED_DEF_ON ):
|
||||
default:
|
||||
LED_CAM = 1;
|
||||
state_led_cam = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
#endif
|
||||
154
trunk/led.h
154
trunk/led.h
@ -1,154 +0,0 @@
|
||||
#ifndef __led__
|
||||
#define __led__
|
||||
|
||||
// ====================================
|
||||
|
||||
|
||||
#ifdef _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
|
||||
// LED_DUTY
|
||||
#define LED_duty_pow_blu TDR06
|
||||
#define LED_duty_WiFi TDR03
|
||||
#define LED_duty_3d TDR01
|
||||
#define LED_duty_notify_red TDR07
|
||||
#define LED_duty_notify_grn TDR05
|
||||
#define LED_duty_notify_blu TDR02
|
||||
|
||||
// これらはduty変えられません
|
||||
#define LED_pow_red P7.5
|
||||
#define LED_CAM P4.2
|
||||
|
||||
#else
|
||||
|
||||
// LED_DUTY
|
||||
#define LED_duty_pow_L TDR07
|
||||
#define LED_duty_pow_blu TDR06
|
||||
#define LED_duty_WiFi TDR03
|
||||
#define LED_duty_NOTIFY TDR05
|
||||
#define LED_duty_CAM TDR02
|
||||
#define LED_duty_3d TDR01
|
||||
// wifi2はPWMできません。
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define NOTIFY_LED_TERM 32
|
||||
|
||||
|
||||
#define LED_BRIGHT_MAX 0x0100
|
||||
|
||||
// ====================================
|
||||
#ifdef _MCU_BSR_ // 電波送信パルス
|
||||
#define WIFI_txLatch PIF21
|
||||
#else
|
||||
#define WIFI_txLatch PIF7
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
// ====================================
|
||||
enum LED_ILUM_MODE
|
||||
{
|
||||
LED_POW_ILM_AUTO = 0,
|
||||
LED_POW_ILM_ON,
|
||||
LED_POW_ILM_HOTARU,
|
||||
LED_POW_ILM_OFF,
|
||||
LED_POW_ILM_ONLY_RED,
|
||||
LED_POW_ILM_ONLY_BLUE
|
||||
};
|
||||
|
||||
|
||||
enum LED_MODE_TUNE
|
||||
{
|
||||
LED_TUNE_ILM_OFF = 0,
|
||||
LED_TUNE_ILM_ON,
|
||||
LED_TUNE_ILM_SVR
|
||||
};
|
||||
|
||||
|
||||
// VREG_C_WIFI_LED
|
||||
enum
|
||||
{
|
||||
WIFI_LED_OFF = 0,
|
||||
WIFI_LED_ON
|
||||
};
|
||||
|
||||
|
||||
// VREG_C_WIFI_NOTIFY
|
||||
enum
|
||||
{
|
||||
NOTIFY_LED_OFF = 0,
|
||||
NOTIFY_LED_ON,
|
||||
NOTIFY_LED_PTN0,
|
||||
NOTIFY_LED_PTN1,
|
||||
NOTIFY_LED_PTN2
|
||||
};
|
||||
|
||||
|
||||
// VREG_C_CAM_LED
|
||||
enum
|
||||
{
|
||||
CAM_LED_OFF = 0,
|
||||
CAM_LED_BLINK,
|
||||
CAM_LED_ON,
|
||||
CAM_LED_BY_TWL,
|
||||
CAM_LED_ON_PLUSE,
|
||||
CAM_LED_OFF_PLUSE
|
||||
};
|
||||
|
||||
|
||||
|
||||
// お知らせLED調光関係 //
|
||||
typedef struct{
|
||||
u8 red;
|
||||
u8 grn;
|
||||
u8 blu;
|
||||
}st_info_LED_ptn;
|
||||
|
||||
typedef struct{
|
||||
u8 term; // 1フレーム何チック?
|
||||
u8 fade_time; // 何チックで次のフレームの色に達するか
|
||||
u8 last_loop; // 最終フレームを
|
||||
u8 resv1;
|
||||
st_info_LED_ptn ptn[ NOTIFY_LED_TERM ];
|
||||
}st_info_LED;
|
||||
|
||||
typedef union{
|
||||
st_info_LED info_LED;
|
||||
u8 bindata[ sizeof( st_info_LED ) ];
|
||||
}uni_info_LED;
|
||||
|
||||
extern uni_info_LED info_LED;
|
||||
|
||||
|
||||
|
||||
typedef struct{
|
||||
u8 dats[4];
|
||||
}st_u8s4;
|
||||
|
||||
typedef union{
|
||||
unsigned long bits;
|
||||
st_u8s4 dats;
|
||||
}uni_led_red_batt_empty;
|
||||
|
||||
|
||||
extern uni_led_red_batt_empty led_red_batt_empty;
|
||||
|
||||
|
||||
/*
|
||||
お知らせLED
|
||||
*/
|
||||
typedef struct{
|
||||
sx16 to;
|
||||
sx16 delta;
|
||||
sx16 now; // 小数点以下を覚えておかなくてはならないため
|
||||
}st_LED_dim_status;
|
||||
|
||||
// ====================================
|
||||
void LED_init( );
|
||||
void LED_stop( );
|
||||
|
||||
extern void tsk_led_cam();
|
||||
|
||||
#endif
|
||||
390
trunk/loader.c
390
trunk/loader.c
@ -1,390 +0,0 @@
|
||||
/* ========================================================
|
||||
MCU CTR BSR
|
||||
2009/03/30
|
||||
開発技術部 藤田
|
||||
|
||||
ブートローダー部
|
||||
ホストの通信と、自己書き換え、ファームのチェックを行う。
|
||||
|
||||
======================================================== */
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
#pragma opc
|
||||
|
||||
|
||||
#include "incs_loader.h"
|
||||
|
||||
#include "fsl.h"
|
||||
#include "fsl_user.h"
|
||||
|
||||
#include "i2c_ctr.h"
|
||||
#include "i2c_mcu.h"
|
||||
#include "pm.h"
|
||||
#include "rtc.h"
|
||||
|
||||
#include "reboot.h"
|
||||
|
||||
|
||||
// ========================================================
|
||||
#if (FSL_DATA_BUFFER_SIZE>0)
|
||||
fsl_u08 fsl_data_buffer[FSL_DATA_BUFFER_SIZE];
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef FSL_INT_BACKUP
|
||||
static fsl_u08 fsl_MK0L_bak_u08; /* if (interrupt backup required) */
|
||||
static fsl_u08 fsl_MK0H_bak_u08; /* { */
|
||||
static fsl_u08 fsl_MK1L_bak_u08; /* reserve space for backup information */
|
||||
static fsl_u08 fsl_MK1H_bak_u08; /* of interrupt mask flags */
|
||||
static fsl_u08 fsl_MK2L_bak_u08; /* */
|
||||
static fsl_u08 fsl_MK2H_bak_u08; /* } */
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
// magic.c の記述と違わないように注意!
|
||||
#define MGC_LOAD 0x0FF6
|
||||
#define MGC_FOOT 0x4FF6
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void FSL_Open( void );
|
||||
void FSL_Close( void );
|
||||
void hdwinit( void );
|
||||
static void hdwinit2( );
|
||||
|
||||
extern void main_loop( );
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void main( )
|
||||
{
|
||||
while( 1 )
|
||||
{
|
||||
WDT_Restart( );
|
||||
if( RTCEN ) // これは書き替えたときにしか使えない
|
||||
{
|
||||
system_status.reboot = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
u8 my_resf = RESF; // ←読むと消え、生存区間の関係
|
||||
if( ( my_resf & ( 0x10 | 0x80 ) ) != 0 )
|
||||
// 0x10 : WDRF,WDTでリセット
|
||||
// 0x80 : TRAP
|
||||
{
|
||||
if( ( my_resf & 0x10 ) != 0 )
|
||||
{
|
||||
IRQ0_neg; // 一瞬上げて落とし直す。
|
||||
#ifdef _PMIC_TWL_
|
||||
// 暴走してしまうので再起動させる
|
||||
PM_reset_ast();
|
||||
/// hdwinit2 内で解除する
|
||||
#endif
|
||||
vreg_ctr[ VREG_C_MCU_STATUS ] |= REG_BIT_STATUS_WDT_RESET;
|
||||
// set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET );
|
||||
// ↑I2Cの初期化後に行う
|
||||
}
|
||||
system_status.reboot = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 通常の電源投入
|
||||
u8 pwup_delay0 = 0;
|
||||
u8 pwup_delay1 = 0;
|
||||
|
||||
do
|
||||
{ // 電池接続時、16ms待ってみる(チャタリング対策)
|
||||
pwup_delay0 += 1;
|
||||
do
|
||||
{
|
||||
pwup_delay1 += 1;
|
||||
}
|
||||
while( pwup_delay1 != 0 ); // u16にするとコンパイラが怒るんだが…。
|
||||
}
|
||||
while( pwup_delay0 != 0 );
|
||||
}
|
||||
hdwinit2( );
|
||||
}
|
||||
|
||||
// ファームの整合性チェック //
|
||||
{
|
||||
u8 i;
|
||||
u8 comp = 0;
|
||||
|
||||
// ローダーと本体は同じバージョンか?
|
||||
/// 次へのアップデートの途中で終わってないか?
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ ) // sizeof( __TIME__ ) = 8 らし
|
||||
{
|
||||
comp += ( *( __far u8 * )( MGC_LOAD + i ) == *( u8 * )( MGC_FOOT + i ) ) ? 0 : 1;
|
||||
}
|
||||
|
||||
if( *( u8 * )( MGC_FOOT ) == 0xFF ) // 消去済のまま
|
||||
{
|
||||
comp += 1;
|
||||
}
|
||||
|
||||
if( comp != 0 )
|
||||
{
|
||||
DBG_LED_WIFI_2_on
|
||||
// ファームリストアを試みる
|
||||
firm_restore( );
|
||||
// 帰ってこない。リセットをかける。
|
||||
}
|
||||
}
|
||||
|
||||
// 通常運転
|
||||
main_loop( );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
void hdwinit( void )
|
||||
{ // スタートアップルーチンが勝手に呼びます
|
||||
DI( ); /* マスタ割り込み禁止 */
|
||||
|
||||
CMC = 0b00010110; /* X1発振せず(入力ポート)、XT1使用、推奨の推奨で超低電力発振 */
|
||||
CSC = 0b10000000; /* X1発振なし、XT1発振あり、高速内蔵発振動作 */
|
||||
#ifdef _MCU_BSR_
|
||||
OSMC = 0x01; /* 隠しレジスタ */
|
||||
#endif
|
||||
#ifdef _OVERCLOCK_
|
||||
CKC = 0b00001000; /* CPU/周辺クロック=fMAIN、fMAIN=fMX、fCLK=fMX */
|
||||
#else
|
||||
// CKC デフォルトでよい
|
||||
#endif
|
||||
|
||||
/*--- 低電圧検出回路の設定 ---*/
|
||||
/* リセット解除時のデフォルトは、オプション・バイトにて指定される */
|
||||
LVIS = 0b00000000; /* VLVI = 4.22±0.1V */
|
||||
LVIM = 0b00000000; /* LVI動作禁止 */
|
||||
/* 電源電圧(VDD)<検出電圧(VLVI)時に割込発生 */
|
||||
/* 電源電圧(VDD)≧検出電圧<VLVI)、または動作禁止時に低電圧検出 */
|
||||
}
|
||||
|
||||
|
||||
void hdwinit2( )
|
||||
{
|
||||
// ポート設定 /////////////////////////////////////////
|
||||
if( system_status.reboot ) // リセットピンだけはすぐにセットする
|
||||
{
|
||||
#ifdef _MODEL_TEG2_
|
||||
P0 = 0b00000011;
|
||||
P3 = 0b00000110; // 簡易I2Cは出力ラッチを1にする
|
||||
P14 = 0b00000001;
|
||||
#endif
|
||||
#ifdef _MODEL_WM0_
|
||||
P0 = 0b00000011;
|
||||
P3 = 0b00000110; // 簡易I2Cは出力ラッチを1にする
|
||||
P14 = 0b00000001;
|
||||
#endif
|
||||
#ifdef _MODEL_TS0_
|
||||
P0 = 0b00000011;
|
||||
P3 = 0b00000111; // 簡易I2Cは出力ラッチを1にする
|
||||
P14 = 0b00000000;
|
||||
#endif
|
||||
#ifdef _MODEL_CTR_
|
||||
P0 = 0b00000011;
|
||||
P3 = 0b00000111; // 簡易I2Cは出力ラッチを1にする
|
||||
P14 = 0b00000000;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
P0 = 0b00000000;
|
||||
P3 = 0b00000110; // 簡易I2Cは出力ラッチを1にする
|
||||
P14 = 0b00000000;
|
||||
}
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
PM0 = 0b11111111; // BSRマイコンでは、reset1は監視のみになる。
|
||||
#else
|
||||
PM0 = 0b00000000; // 0で出力
|
||||
#endif
|
||||
PM3 = 0b11110000; // P31,32は簡易I2C
|
||||
PM14 = 0b11111100; // debugger[1] とりあえず出力
|
||||
|
||||
P1 = 0b00000000;
|
||||
P2 = 0b00000000;
|
||||
P4 = 0b00000000;
|
||||
P5 = 0b00000000;
|
||||
P6 = 0b00000000;
|
||||
P7 = 0b01000000;
|
||||
P12 = 0b00000000;
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
P20 = 0b00000000;
|
||||
#else
|
||||
P8 = 0b00000000;
|
||||
#endif
|
||||
|
||||
P15 = 0b00000000;
|
||||
|
||||
|
||||
PM1 = 0b00000000;
|
||||
PM2 = 0b11101001;
|
||||
|
||||
#ifdef _PMIC_CTR_
|
||||
# ifdef _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
PM4 = 0b11110011;
|
||||
# else
|
||||
PM4 = 0b11110111;
|
||||
# endif
|
||||
#else
|
||||
PM4 = 0b11111011;
|
||||
#endif
|
||||
|
||||
PM5 = 0b11110010;
|
||||
PM6 = 0b11111100; // I2CのラインがL出力になってしまうが、システムがOFFなのでかまわない
|
||||
#ifdef _PMIC_CTR_
|
||||
PM7 = 0b01011111;
|
||||
#else
|
||||
PM7 = 0b00011111;
|
||||
#endif
|
||||
PM12 = 0b11111111; // 32kHzクロックのピン設定はどっちでもよい
|
||||
PM15 = 0b11111111;
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
PM20 = 0b11111100;
|
||||
#else
|
||||
PM8 = 0b11111111;
|
||||
#endif
|
||||
|
||||
// プルアップ /////////////////////////////////////////
|
||||
PU0 = 0b00000000; // バッテリ認証後にそれぞれセット
|
||||
PU1 = 0b00000000;
|
||||
PU3 = 0b00000000; // 外部でプルアップしないと具合が悪い。CPUがプルアップする
|
||||
PU4 = 0b00000000; // 外部でプルアップしてほしいtool0,1)
|
||||
PU5 = 0b00000011;
|
||||
PU7 = 0b00011001;
|
||||
PU12 = 0b00000000;
|
||||
PU14 = 0b00000000;
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
# ifdef _MODEL_CTR_
|
||||
# ifdef _SW_HOME_ENABLE_
|
||||
PU20 = 0b00010001;
|
||||
# else
|
||||
PU20 = 0b00000001;
|
||||
# endif
|
||||
# else
|
||||
PU20 = 0b00000000;
|
||||
# endif
|
||||
#endif
|
||||
|
||||
// ポート入力モード・レジスタ設定 /////////////////////
|
||||
// [0:通常入力バッファ 1:TTL入力バッファ]
|
||||
#if 0
|
||||
// デフォルト値
|
||||
PIM3 = 0b00000000;
|
||||
PIM7 = 0b00000000;
|
||||
#endif
|
||||
|
||||
// ポート出力モード・レジスタ設定
|
||||
// [0:通常出力モード 1:N-chオープン・ドレーン出力]
|
||||
POM3 = 0b00000110;
|
||||
POM7 = 0b00000000;
|
||||
|
||||
/*--- 割り込み設定 ---------*/
|
||||
IF0 = 0x0000; /* 割り込み要求フラグクリア */
|
||||
IF1 = 0x0000;
|
||||
#ifdef _MCU_BSR_
|
||||
IF2 = 0x0000;
|
||||
#else
|
||||
IF2L = 0x00;
|
||||
#endif
|
||||
|
||||
MK0 = 0xFFFF; /* 割り込み禁止 */
|
||||
MK1 = 0xFFFF;
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
MK2 = 0xFFFF;
|
||||
#else
|
||||
MK2L = 0xFF;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
// デフォルト値
|
||||
PR00 = 0xFFFF; /* 割り込み優先順位、全て低位(LV3) */
|
||||
PR01 = 0xFFFF;
|
||||
PR10 = 0xFFFF;
|
||||
PR11 = 0xFFFE;
|
||||
// PR11H = 0b11111111;
|
||||
// PR11L = 0b11111110;
|
||||
PR02L = 0xFF;
|
||||
PR12L = 0xFF;
|
||||
#endif
|
||||
|
||||
/*--- 外部割込の有効エッジ設定 ---*/
|
||||
#ifdef _MCU_BSR_
|
||||
EGP0 = 0b00110001;
|
||||
EGN0 = 0b01110001;
|
||||
EGP2 = 0b00001010;
|
||||
EGN2 = 0b00000000;
|
||||
#else
|
||||
EGP0 = 0b10110001;
|
||||
EGN0 = 0b01110001;
|
||||
#endif
|
||||
/*--- キー割り込み設定 ---*/
|
||||
KRM = 0b00000000; /* 全キー割り込み信号を検出しない */
|
||||
|
||||
/*--- タイマ・アレイ・ユニットの動作停止 ---*/
|
||||
TAU0EN = 0; /* タイマ・アレイ・ユニットへのクロック供給停止 */
|
||||
TT0 = 0x00ff; /* 全タイマ・チャネルの動作停止 */
|
||||
|
||||
/*--- RTCの動作停止 ---*/
|
||||
// RTCEN = 0; /* RTCへのクロック供給停止 */
|
||||
// RTCC0 = 0b00000000; /* カウンタ動作停止 */
|
||||
// 別途初期化関数
|
||||
|
||||
#ifndef _MCU_BSR_
|
||||
/*--- コンパレータ/プログラマブル・ゲイン・アップの動作停止 ---*/
|
||||
OACMPEN = 0; /* クロック供給停止 */
|
||||
OAM = 0x00; /* プログラマブル・ゲイン・アップの動作停止 */
|
||||
C0CTL = 0x00; /* コンパレータ0動作停止 */
|
||||
C1CTL = 0x00; /* コンパレータ1動作停止 */
|
||||
#endif
|
||||
|
||||
/*--- クロック出力/ブザー出力停止 ---*/
|
||||
CKS0 = 0b00000000;
|
||||
CKS1 = 0b00000000;
|
||||
|
||||
/*--- ADCの動作停止 ---*/
|
||||
ADCEN = 0; /* ADCへのクロック供給停止 */
|
||||
ADM = 0b00000000; /* 変換動作停止 */
|
||||
|
||||
/*--- シリアル・アレイ・ユニットの動作停止 ---*/
|
||||
SAU0EN = 0; /* シリアル・アレイ・ユニット0へのクロック供給停止 */
|
||||
SCR00 = 0x0087; /* 各チャンネルの通信禁止 */
|
||||
SCR01 = 0x0087;
|
||||
SCR02 = 0x0087;
|
||||
SCR03 = 0x0087;
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
// IICの動作停止
|
||||
IICA0EN = 0; /* IICA0(CTR)へのクロック供給停止 */
|
||||
IICCTL00 = 0x00; /* IICA1動作停止 */
|
||||
IICA1EN = 0; // IICA1(TWL)へのクロック供給停止
|
||||
IICCTL01 = 0x00; // IICA1動作停止
|
||||
|
||||
#else
|
||||
/*--- IICAの動作停止 ---*/
|
||||
IICAEN = 0; /* IICAへのクロック供給停止 */
|
||||
IICCTL0 = 0x00; /* IICA動作停止 */
|
||||
#endif
|
||||
|
||||
/*--- DMAの動作停止 ---*/
|
||||
DRC0 = 0b00000000; /* DMAチャネル0の動作禁止 */
|
||||
DRC1 = 0b00000000; /* DMAチャネル1の動作禁止 */
|
||||
}
|
||||
@ -1,65 +0,0 @@
|
||||
/*****************************************************************************
|
||||
ビルド時刻を埋め込みます。
|
||||
ビルドの度に更新されるようにする必要があります。
|
||||
(touchしてね)
|
||||
****************************************************************************/
|
||||
#include "config.h"
|
||||
|
||||
// V0.5 (ニセ0.1改)
|
||||
#pragma section @@CNSTL MGC_LOAD AT 0x0FF6
|
||||
__far const unsigned char MGC_LOAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_MIMI AT 0x2100
|
||||
const unsigned char MGC_HEAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_TAIL AT 0x4FF6
|
||||
const unsigned char MGC_TAIL[] = __TIME__;
|
||||
|
||||
|
||||
// 0Dまでこれを使用
|
||||
// #define SIG { 0x30, 0x38, 0x3A, 0x34, 0x35, 0x3A, 0x33, 0x39, 0x00, 0x00 }
|
||||
|
||||
|
||||
// あーあ。
|
||||
/*
|
||||
// V0.5 (ニセ0.1改)
|
||||
#define SIG { 0x30, 0x38, 0x3A, 0x34, 0x35, 0x3A, 0x33, 0x39, 0x00, 0x00 }
|
||||
*/
|
||||
|
||||
/*
|
||||
メモ
|
||||
(未使用)
|
||||
V0.2の署名 31 34 3A 33 35 3A 33 35 00 00
|
||||
#define SIG { 0x31, 0x34, 0x3A, 0x33, 0x35, 0x3A, 0x33, 0x35, 0x00, 0x00 };
|
||||
|
||||
ctr_wm0
|
||||
31373A30353A32310000
|
||||
#define SIG { 0x31, 0x37, 0x3A, 0x30, 0x35, 0x3A, 0x32, 0x31, 0x00, 0x00 };
|
||||
|
||||
ctr_wm0_2
|
||||
31303A34393A35390000
|
||||
#define SIG { 0x31, 0x30, 0x3A, 0x34, 0x39, 0x3A, 0x35, 0x39, 0x00, 0x00 };
|
||||
|
||||
bsr_V0.2_090828_WM2
|
||||
31323A35393A32350000
|
||||
#define SIG { 0x31, 0x32, 0x3A, 0x35, 0x39, 0x3A, 0x32, 0x35, 0x00, 0x00 };
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
// V0.1の署名(日付) 30 38 3A 34 35 3A 33 39 00 00
|
||||
#pragma section @@CNSTL MGC_LOAD AT 0x0FF6
|
||||
__far static const unsigned char MGC_LOAD[] =
|
||||
#define SIG { 0x30, 0x38, 0x3A, 0x34, 0x35, 0x3A, 0x33, 0x39, 0x00, 0x00 }
|
||||
|
||||
|
||||
// V0.4以降
|
||||
#pragma section @@CNSTL MGC_LOAD AT 0x0FF6
|
||||
__far const unsigned char MGC_LOAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_MIMI AT 0x2100
|
||||
const unsigned char MGC_HEAD[] = __TIME__;
|
||||
|
||||
#pragma section @@CNST MGC_TAIL AT 0x47F6
|
||||
const unsigned char MGC_TAIL[] = __TIME__;
|
||||
*/
|
||||
99
trunk/main.c
99
trunk/main.c
@ -1,99 +0,0 @@
|
||||
/* ========================================================
|
||||
MCU CTR BSR
|
||||
2008,2009 nintendo
|
||||
開発技術部 藤田
|
||||
======================================================== */
|
||||
|
||||
|
||||
// ========================================================
|
||||
#include "incs_loader.h"
|
||||
|
||||
#include "WDT.h"
|
||||
#include "rtc.h"
|
||||
#include "pm.h"
|
||||
#include "accero.h"
|
||||
#include "led.h"
|
||||
#include "adc.h"
|
||||
|
||||
#include "pool.h"
|
||||
|
||||
|
||||
// ========================================================
|
||||
static void read_dipsw( );
|
||||
|
||||
|
||||
// ========================================================
|
||||
system_status_ system_status;
|
||||
uni_pool pool;
|
||||
|
||||
|
||||
/* ========================================================
|
||||
本当のエントリ関数は loader.c にあります
|
||||
======================================================== */
|
||||
void main_loop( void )
|
||||
{
|
||||
|
||||
// 電池投入時、ファームアップデート後のみ
|
||||
RTC_init( ); // 内部でリブートか判定しています
|
||||
|
||||
renge_init( );
|
||||
|
||||
iic_mcu_start( );
|
||||
EI( );
|
||||
|
||||
if( system_status.reboot )
|
||||
{
|
||||
#ifdef _PMIC_TWL_
|
||||
if( RESET1_n )
|
||||
#else
|
||||
if( PM_chk_LDSW() != 0 )
|
||||
#endif
|
||||
{
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// リブート時は実行されない
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
}
|
||||
|
||||
vreg_ctr_init( );
|
||||
vreg_twl_init( );
|
||||
|
||||
read_dipsw( ); // 特定スイッチで何かするか?
|
||||
|
||||
clear_hosu_hist(); // 履歴クリア
|
||||
|
||||
renge_task_interval_run_force = 1;
|
||||
|
||||
RTCIMK = 0; /* 割り込み(アラーム&インターバル)許可 */
|
||||
|
||||
// メインループ //
|
||||
while( 1 )
|
||||
{ // システムtick、または割り込みで廻ります。
|
||||
WDT_Restart( );
|
||||
renge_task_interval_run( ); // 内部で、システムtickまたは強制起動します
|
||||
while( renge_task_interval_run_force != 0 )
|
||||
{
|
||||
renge_task_interval_run( );
|
||||
}
|
||||
WDT_Restart( );
|
||||
while( renge_task_immed_run( ) != ERR_SUCCESS ); // ここのループが廻る度に実行されます
|
||||
HALT( );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ========================================================
|
||||
======================================================== */
|
||||
static void read_dipsw( )
|
||||
{
|
||||
// ソフトディップスイッチ読み込み
|
||||
// PU4 |= 0x03; // dip sw 0,1
|
||||
system_status.dipsw0 = ( DIPSW_0 == 0 ) ? 0 : 1;
|
||||
system_status.dipsw1 = ( DIPSW_1 == 0 ) ? 0 : 1;
|
||||
// PU4 &= ~0x03;
|
||||
}
|
||||
|
||||
|
||||
@ -1,74 +0,0 @@
|
||||
#!/usr/bin/ruby
|
||||
$KCODE = "S"
|
||||
=begin
|
||||
|
||||
NECの環境が吐きだしたSRECを、
|
||||
●未指定部分には0xFFパディングし、
|
||||
●BSRのアップデート用に必要な部分だけ切り出します。
|
||||
(0x0000 - 0x0FFF, 0x2000-0x47FF)
|
||||
|
||||
=end
|
||||
|
||||
|
||||
=begin
|
||||
if( ARGV[0] == nil )
|
||||
print( "input file name is nessesary!\nabort.\n" )
|
||||
exit(1)
|
||||
end
|
||||
|
||||
|
||||
unless(File.exist?( ARGV[0] ))
|
||||
print( "file" << ARGV[0] << " not found.\nabort.\n" )
|
||||
exit(1)
|
||||
end
|
||||
=end
|
||||
|
||||
#src = File.open( '/cygdrive/c/78k_data/yav-mcu-basara/bsr.hex' )
|
||||
src = File.open( 'bsr.hex' )
|
||||
|
||||
dest = File.new( "hoge.bin","wb" )
|
||||
|
||||
|
||||
dest.write( 'jhl' )
|
||||
|
||||
### get data ##########################
|
||||
src_in = Hash.new
|
||||
tempA = Array.new
|
||||
dataTemp = Array.new
|
||||
|
||||
offset = Numeric.new
|
||||
bindata = Array.new( 32*1024, 0xFF )
|
||||
|
||||
while(src.readline)
|
||||
tempA = $_.scan(/(\:)(\w\w)(\w\w\w\w)(\w\w)(\w+)(\w\w)/)
|
||||
|
||||
break if( tempA.size == 0 )
|
||||
|
||||
src_in = { "len" => tempA[0][1], "offset" => tempA[0][2], "type" => tempA[0][3], "data" => tempA[0][4], "CRC" => tempA[0][5] }
|
||||
|
||||
break if src_in["type"].hex == 01
|
||||
break if src_in["len"].hex == 00
|
||||
# next if src_in["type"].hex != 00
|
||||
if( src_in["type"].hex != 00 )
|
||||
# p dat
|
||||
next
|
||||
end
|
||||
|
||||
offset = src_in["offset"].hex
|
||||
next if(( 0x1000 <= offset ) && ( offset < 0x2000 ))
|
||||
|
||||
dataTemp = src_in["data"].scan(/\w\w/)
|
||||
|
||||
( 0...(src_in["len"].to_s.hex) ).each{|i|
|
||||
bindata[ offset + i ] = ( dataTemp[ i ] ).to_s.hex
|
||||
}
|
||||
end
|
||||
|
||||
### format data and output #############
|
||||
4096.times{
|
||||
bindata.delete_at(4096)
|
||||
}
|
||||
dest.write( bindata[0..(0x4FFF - 0x1000)].pack("c*") )
|
||||
dest.close
|
||||
|
||||
printf( "intel-HEX to bsr bin converter\n file converted!\n\n" )
|
||||
@ -1,551 +0,0 @@
|
||||
/* ********************************************************
|
||||
歩数計
|
||||
3軸加速度のリアルタイムデータから、ベクトルのノルムを出し、
|
||||
閾値を超える時間、間隔、ノルムの大きさで閾値を切り替えるなど
|
||||
********************************************************* */
|
||||
#pragma mul
|
||||
#pragma div
|
||||
#pragma bcd
|
||||
|
||||
#include "incs.h"
|
||||
#include <math.h>
|
||||
|
||||
#include "accero.h"
|
||||
#include "pedometer.h"
|
||||
|
||||
#include "pedo_lpf_coeff.h"
|
||||
#include "pool.h"
|
||||
|
||||
// ========================================================
|
||||
static void hosu_increment();
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
u16 get_long_hour();
|
||||
extern uni_pool pool;
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
#define _use_my_sqrt_
|
||||
#ifdef _use_my_sqrt_
|
||||
unsigned long my_sqrt();
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*=========================================================
|
||||
歩数計
|
||||
========================================================*/
|
||||
void pedometer()
|
||||
{
|
||||
static s16 th_H = 15000; // 閾値。暫定。動的変更とかしたい…ので変数
|
||||
static s16 th_L = 11000;
|
||||
static u16 acc_norm[3]; // 加速度の大きさのヒストリ。数字が大きい方が古い
|
||||
static u16 acc_norm_temp;
|
||||
static u8 interval_hh; // 山-山間の時間。短過ぎたらはじく。
|
||||
static u8 time_l; // 前回の極小からの経過時間
|
||||
static u16 peak_l; // 谷の深さ
|
||||
static u16 peak_h; // 山の高さ
|
||||
static u16 norm_hist[TAP];
|
||||
|
||||
static u8 hist_indx;
|
||||
static u8 t_rise;
|
||||
|
||||
signed long filterd;
|
||||
|
||||
u8 i;
|
||||
|
||||
u16 sx16 = abs( (u16)vreg_ctr[VREG_C_ACC_XH] * 256 + vreg_ctr[VREG_C_ACC_XL] );
|
||||
u16 sy16 = abs( (u16)vreg_ctr[VREG_C_ACC_YH] * 256 + vreg_ctr[VREG_C_ACC_YL] );
|
||||
u16 sz16 = abs( (u16)vreg_ctr[VREG_C_ACC_ZH] * 256 + vreg_ctr[VREG_C_ACC_ZL] );
|
||||
|
||||
// ベクトルのノルム
|
||||
#ifdef _mcu_
|
||||
# ifndef _use_my_sqrt_
|
||||
norm_hist[ hist_indx & TAP-1 ] = sqrt( (long)sx16 * ( sx16 / 2 ) +
|
||||
(long)sy16 * ( sy16 / 2 ) +
|
||||
(long)sz16 * ( sz16 / 2 )
|
||||
);
|
||||
# else
|
||||
norm_hist[ hist_indx & TAP-1 ] = my_sqrt( (long)sx16 * ( sx16 / 2 ) +
|
||||
(long)sy16 * ( sy16 / 2 ) +
|
||||
(long)sz16 * ( sz16 / 2 )
|
||||
);
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef _pc_
|
||||
norm_hist[ hist_indx & TAP-1 ] = normh * 256 + norml;
|
||||
#endif
|
||||
|
||||
hist_indx += 1;
|
||||
|
||||
// ヒストリにフィルタを掛けて、今回の値を求める
|
||||
filterd = 0;
|
||||
// for( i = 8; i != 55; i++ ) // 係数が0ばかりのため
|
||||
for( i = 0; i != 46; i++ ) // 係数テーブルをいじりました。パラメータ調整時注意
|
||||
{
|
||||
filterd += (signed long)norm_hist[ ( hist_indx + i ) & TAP-1 ] * lpf_coeff[ i ];
|
||||
}
|
||||
|
||||
filterd += (4096)*512;
|
||||
acc_norm_temp = (s16)( filterd /1024 & 0xFFFF ); // ←FIL_COEFF_QUANTから正規化
|
||||
/*
|
||||
if( acc_norm[0] < acc_norm_temp )
|
||||
{
|
||||
t_rise += 1;
|
||||
if( t_rise == 0 )
|
||||
t_rise == 254;
|
||||
}
|
||||
else
|
||||
{
|
||||
t_rise = 0;
|
||||
}
|
||||
*/
|
||||
if( acc_norm[0] != acc_norm_temp )
|
||||
{
|
||||
acc_norm[2] = acc_norm[1]; // ヒストリ
|
||||
acc_norm[1] = acc_norm[0];
|
||||
acc_norm[0] = acc_norm_temp;
|
||||
}
|
||||
|
||||
if( acc_norm[2] <= acc_norm[1] && acc_norm[1] > acc_norm[0]
|
||||
&& acc_norm[0] > th_H )
|
||||
// 極大で、閾値を超えていた
|
||||
{
|
||||
if( 21 < interval_hh )
|
||||
// 前回の極大からの間隔がほどよい
|
||||
{
|
||||
if(( interval_hh < 160 ) && ( time_l < interval_hh ))
|
||||
// 谷を挟んでいる
|
||||
{
|
||||
if( acc_norm[0] - peak_l > 4200 ){
|
||||
// 一歩増えました
|
||||
hosu_increment();
|
||||
}
|
||||
}
|
||||
interval_hh = 0;
|
||||
}
|
||||
if( acc_norm[0] > 18000 )
|
||||
{
|
||||
th_L = acc_norm[0] - 10000;
|
||||
}
|
||||
else
|
||||
{
|
||||
th_L = 11000;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
interval_hh += ( interval_hh != 255 ) ? 1: 0; // 飽和加算って楽に書けたらいいのに
|
||||
}
|
||||
|
||||
// (2) 直近の極小からの時間
|
||||
if( acc_norm[2] >= acc_norm[1] && acc_norm[1] < acc_norm[0]
|
||||
&& acc_norm[0] < th_L )
|
||||
{
|
||||
// 極小を検出
|
||||
time_l = 0;
|
||||
peak_l = acc_norm[0];
|
||||
}
|
||||
else
|
||||
{
|
||||
time_l += ( time_l != 255 ) ? 1: 0;
|
||||
}
|
||||
|
||||
{
|
||||
/*
|
||||
static u8 i = 0;
|
||||
|
||||
vreg_ctr[VREG_C_FREE_0] = i++;
|
||||
|
||||
vreg_ctr[VREG_C_FREE_1] = (u8)( acc_norm[0] / 256 & 0x00FF );
|
||||
vreg_ctr[VREG_C_FREE_2] = (u8)( acc_norm[0] & 0x00FF );
|
||||
|
||||
vreg_ctr[VREG_C_FREE_3] = (u8)( norm_hist[ hist_indx -1 & TAP-1 ] / 256 & 0xFF );
|
||||
vreg_ctr[VREG_C_FREE_4] = (u8)( norm_hist[ hist_indx -1 & TAP-1 ] & 0xFF );
|
||||
|
||||
vreg_ctr[VREG_C_FREE_5] = interval_hh;
|
||||
vreg_ctr[VREG_C_FREE_6] = time_l;
|
||||
|
||||
vreg_ctr[VREG_C_FREE_7] = vreg_ctr[ VREG_C_ACC_HOSU_L ];
|
||||
vreg_ctr[VREG_C_FREE_8] = (u8)( peak_l / 256 & 0x00FF );
|
||||
vreg_ctr[VREG_C_FREE_9] = (u8)( peak_l & 0x00FF );
|
||||
// vreg_ctr[VREG_C_FREE_A] = (u8)( norm_avg[0] / 256 & 0x00FF );
|
||||
// vreg_ctr[VREG_C_FREE_B] = (u8)( norm_avg[0] & 0x00FF );
|
||||
*/
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*=========================================================
|
||||
歩数+1
|
||||
累積をインクリメント
|
||||
履歴を更新
|
||||
========================================================*/
|
||||
u8 p_record;
|
||||
u8 last_hour = 0x23; // 履歴の最新は何時?
|
||||
u8 last_day = 0x30;
|
||||
u8 last_month = 0x12;
|
||||
u8 last_year = 0x99;
|
||||
|
||||
#define HOSU_NODATA 0xFFFF
|
||||
#define HOSU_MAX 0xFFFE
|
||||
|
||||
static void hosu_increment()
|
||||
{
|
||||
static u16 last_hour_fny;
|
||||
|
||||
// 累積の更新 //
|
||||
// いろいろ失敗した...
|
||||
if( ++vreg_ctr[ VREG_C_ACC_HOSU_L ] == 0 )
|
||||
{
|
||||
if( ++vreg_ctr[ VREG_C_ACC_HOSU_M ] == 0 )
|
||||
{
|
||||
if( ++vreg_ctr[ VREG_C_ACC_HOSU_H ] == 0 ){
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_L ] = 255; // カンスト orz
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_M ] = 255;
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_H ] = 255;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
{
|
||||
// 毎時履歴の更新 /////////////////////////////
|
||||
// 空白の時間を考慮する。1時間以上放置されたなど。
|
||||
u16 now_hour;
|
||||
u8 now_year;
|
||||
u8 now_min;
|
||||
|
||||
// 時計を止める必要が有るので↓は一気に行って下さい
|
||||
DI();
|
||||
RWAIT = 1;
|
||||
while( !RWST ){;}
|
||||
now_year = bcdtob( YEAR );
|
||||
last_hour = HOUR; // 履歴読み出し時に使用。BCDのままでよい
|
||||
last_day = DAY;
|
||||
last_month = MONTH;
|
||||
now_min = MIN;
|
||||
now_hour = get_long_hour();
|
||||
// RWAIT = 0; ↑で行っています
|
||||
// EI(); 〃
|
||||
|
||||
// 歩数計が止まっていた時間を考慮して必要なら進める //
|
||||
if( last_year == now_year )
|
||||
{
|
||||
if( now_hour > last_hour_fny )
|
||||
{
|
||||
fill_hosu_hist_hours( now_hour - last_hour_fny );
|
||||
}
|
||||
}
|
||||
else if( last_year == ( now_year -1 ) )
|
||||
{
|
||||
// 年をまたいでいるとき
|
||||
u16 temp_hours = ( ( 365 + (( now_year & 0x03 ) == 1 ? 1: 0 )) * 24 ) - last_hour_fny + now_hour;
|
||||
fill_hosu_hist_hours( temp_hours );
|
||||
}
|
||||
else if( last_year < now_year )
|
||||
{
|
||||
// 数年放置
|
||||
fill_hosu_hist_hours( 0 );
|
||||
}
|
||||
else
|
||||
{
|
||||
// カレンダーが巻き戻るなど
|
||||
// ノーケアでよい
|
||||
}
|
||||
last_year = now_year;
|
||||
last_hour_fny = now_hour;
|
||||
|
||||
// 実際にインクリメント
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
temp = p_record;
|
||||
if( now_min < vreg_ctr[ VREG_C_ACC_HOSU_ORIGIN ] )
|
||||
{
|
||||
temp -= 1;
|
||||
if( PEDOMETER_LOG_SIZE >= temp )
|
||||
{
|
||||
temp = PEDOMETER_LOG_SIZE -1;
|
||||
}
|
||||
}
|
||||
if( pool.vreg_c_ext.pedo_log[ temp ] == HOSU_NODATA )
|
||||
{
|
||||
pool.vreg_c_ext.pedo_log[ temp ] = 1;
|
||||
}
|
||||
else if( pool.vreg_c_ext.pedo_log[ temp ] != HOSU_MAX )
|
||||
{
|
||||
pool.vreg_c_ext.pedo_log[ temp ] += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
空白の時間を適切に0にして、
|
||||
今を含む1時間のデータを書く位置にポインタ?を進める
|
||||
======================================================== */
|
||||
void fill_hosu_hist_hours( u16 hours )
|
||||
{
|
||||
if( hours > PEDOMETER_LOG_SIZE )
|
||||
{
|
||||
hours = PEDOMETER_LOG_SIZE;
|
||||
}
|
||||
|
||||
// 空白の数時間の設定
|
||||
do
|
||||
{
|
||||
p_record += 1;
|
||||
if( PEDOMETER_LOG_SIZE >= p_record )
|
||||
{
|
||||
p_record = 0;
|
||||
}
|
||||
pool.vreg_c_ext.pedo_log[ p_record ] = 0;
|
||||
hours -= 1;
|
||||
}
|
||||
while( hours != 0 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
空白の時間を適切に0にして、
|
||||
今を含む1時間のデータを書く位置にポインタ?を進める
|
||||
======================================================== */
|
||||
void clear_hosu_hist()
|
||||
{
|
||||
u8 hours = PEDOMETER_LOG_SIZE;
|
||||
do
|
||||
{
|
||||
hours -= 1;
|
||||
pool.vreg_c_ext.pedo_log[ hours ] = 0xFFFF;
|
||||
}
|
||||
while( hours != 0 );
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_L ] = 0;
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_M ] = 0;
|
||||
vreg_ctr[ VREG_C_ACC_HOSU_H ] = 0;
|
||||
}
|
||||
|
||||
|
||||
extern u8 iic_burst_state;
|
||||
bit record_read_msb_lsb;
|
||||
|
||||
/* ========================================================
|
||||
歩数計ヒストリ読み出しの後処理(初期化)
|
||||
読み出しポインタのクリア
|
||||
======================================================== */
|
||||
void hosu_read_end( )
|
||||
{
|
||||
record_read_msb_lsb = 0;
|
||||
}
|
||||
|
||||
|
||||
/* ========================================================
|
||||
歩数計のヒストリを返す。
|
||||
1回呼ぶ度に、ヒストリの下位、上位、一時間遡って下位上位...
|
||||
======================================================== */
|
||||
u8 hosu_read( )
|
||||
{
|
||||
u8 dat;
|
||||
u16 temp;
|
||||
static u8 p_record_buffer;
|
||||
|
||||
switch( iic_burst_state ){
|
||||
case( 0 ):
|
||||
p_record_buffer = p_record;
|
||||
iic_burst_state += 1;
|
||||
return( last_hour );
|
||||
|
||||
case( 1 ):
|
||||
iic_burst_state += 1;
|
||||
return( last_day );
|
||||
|
||||
case( 2 ):
|
||||
iic_burst_state += 1;
|
||||
return( last_month );
|
||||
|
||||
case( 3 ):
|
||||
iic_burst_state += 1;
|
||||
return( btobcd(last_year) );
|
||||
|
||||
case( 4 ):
|
||||
iic_burst_state += 1;
|
||||
return( 0x55 ); // reserved dummy
|
||||
|
||||
case( 5 ):
|
||||
iic_burst_state += 1;
|
||||
return( 0xAA ); // reserved. dummy
|
||||
|
||||
default:
|
||||
temp = pool.vreg_c_ext.pedo_log[ p_record_buffer ];
|
||||
if( record_read_msb_lsb == 0 )
|
||||
{
|
||||
dat = (u8)( temp & 0x00FF );
|
||||
}
|
||||
else
|
||||
{
|
||||
dat = (u8)(( temp >> 8 ) & 0x00FF );
|
||||
if( p_record_buffer == 0 )
|
||||
{
|
||||
p_record_buffer = PEDOMETER_LOG_SIZE-1;
|
||||
}
|
||||
else
|
||||
{
|
||||
p_record_buffer -= 1;
|
||||
}
|
||||
}
|
||||
record_read_msb_lsb += 1;
|
||||
return( dat );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
今年の元旦からの経過時間(hour)を返す。
|
||||
引数 無し
|
||||
返値 u16 long_hour
|
||||
======================================================== */
|
||||
const u16 DAYS_FROM_HNY[] = {
|
||||
0,
|
||||
0, 31, 31+28, 59+31, 90+30,
|
||||
120+31, 151+30, 181+31, 212+31, 243+30,
|
||||
273+31, 304+30 };
|
||||
|
||||
u16 get_long_hour()
|
||||
{
|
||||
u16 long_hour;
|
||||
u8 year_hex;
|
||||
u8 month_hex;
|
||||
u8 day_hex;
|
||||
u8 hour_hex;
|
||||
|
||||
year_hex = bcdtob( YEAR );
|
||||
month_hex = bcdtob( MONTH );
|
||||
day_hex = bcdtob( DAY );
|
||||
hour_hex = bcdtob( HOUR );
|
||||
|
||||
RWAIT = 0;
|
||||
EI();
|
||||
|
||||
// まず日数の部分
|
||||
long_hour = DAYS_FROM_HNY[ month_hex ];
|
||||
if(( ( year_hex & 0x03 ) == 0 ) && ( ( 3 <= month_hex )
|
||||
|| (( 2 == month_hex ) && ( day_hex == 29 )) ))
|
||||
{
|
||||
// 閏年で、閏日より後
|
||||
long_hour += 1;
|
||||
}
|
||||
long_hour += day_hex - 1;
|
||||
long_hour *= 24; // 日数→時間
|
||||
|
||||
long_hour += hour_hex;
|
||||
|
||||
return( long_hour );
|
||||
}
|
||||
|
||||
|
||||
# ifdef _use_my_sqrt_
|
||||
// ========================================================
|
||||
// 高速?平方根アルゴリズム
|
||||
// ========================================================
|
||||
#if 0
|
||||
// 拝借もと
|
||||
// ttp://www.finetune.co.jp/~lyuka/technote/fract/sqrt_hypot.html
|
||||
/* NAME
|
||||
* sqrtl - square root function
|
||||
* SYNOPSYS
|
||||
* long
|
||||
* sqrtl(long x)
|
||||
* DISCRIPTIONS
|
||||
* The sqrtl() function compute the non-negative square root of x.
|
||||
* ERROR
|
||||
* Below 1/2 LSB.
|
||||
* SEE ALSO
|
||||
* sqrt(3), http://www.finetune.co.jp/~lyuka/fract/sqrt_hypot.html
|
||||
* COPYRIGHT
|
||||
* Copyright 2002, Takayuki HOSODA. All rights reserved.
|
||||
*/
|
||||
unsigned long my_sqrt( unsigned long a )
|
||||
{
|
||||
unsigned long x;
|
||||
unsigned long t;
|
||||
unsigned long s;
|
||||
unsigned char scale;
|
||||
|
||||
x = a;
|
||||
if (x > 0) {
|
||||
scale = 0;
|
||||
if (x < 0x8000) {
|
||||
x <<= 16;
|
||||
scale = 8;
|
||||
a = x;
|
||||
}
|
||||
x >>= 8;
|
||||
s = 8;
|
||||
for (t = 0x400000L; x < t; t >>= 2)
|
||||
s--;
|
||||
t = 88;
|
||||
t <<= s;
|
||||
x *= 22;
|
||||
s += 5;
|
||||
x >>= s; // -3.1e-2 < err < +2.9e-2
|
||||
/* 打ち切り
|
||||
s = a;
|
||||
t += x;
|
||||
x = s;
|
||||
s /= t;
|
||||
s += t;
|
||||
s >>= 1; // -4.8e-4 < err <= 0
|
||||
t = x;
|
||||
x /= s;
|
||||
x += s;
|
||||
x >>= 1; // -1.2e-7 < err <= 0
|
||||
s = x;
|
||||
s++;
|
||||
s *= x;
|
||||
if (t > s) // adjust LSB
|
||||
x++;
|
||||
*/
|
||||
if (scale) {
|
||||
x += 127;
|
||||
x >>= 8;
|
||||
}
|
||||
}
|
||||
return x;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if 1
|
||||
// 拝借もと
|
||||
// ttp://www001.upp.so-net.ne.jp/y_yutaka/labo/math_algo/math_algo.html
|
||||
unsigned long my_sqrt(unsigned long x)
|
||||
{
|
||||
unsigned long s, t;
|
||||
|
||||
if (x <= 0) return 0;
|
||||
|
||||
s = 1;
|
||||
t = x;
|
||||
while (s < t)
|
||||
{
|
||||
s <<= 1;
|
||||
t >>= 1;
|
||||
}
|
||||
do
|
||||
{
|
||||
t = s;
|
||||
s = (x / s + s) >> 1;
|
||||
} while (s < t);
|
||||
|
||||
return t;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
@ -1,84 +0,0 @@
|
||||
#ifndef _pedo_coeff_h_
|
||||
#define _pedo_coeff_h_
|
||||
|
||||
// =========================================================
|
||||
#define TAP 64
|
||||
#define FIL_COEFF_QUANT 10
|
||||
const s8 lpf_coeff[]={
|
||||
/*
|
||||
Window Function Algorithm LPF
|
||||
Sampling Frequency = 100.0
|
||||
cutoff1 = 6.0000000
|
||||
Tap Count =64
|
||||
Kaiser Constant = 7.000000
|
||||
Quantized by 11 [bits]
|
||||
*/
|
||||
/* 0,// [0]
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
*/
|
||||
1,// 8
|
||||
2,
|
||||
2,
|
||||
3,
|
||||
3,
|
||||
2,
|
||||
0,
|
||||
-2,
|
||||
-5,// 16
|
||||
-9,
|
||||
-13,
|
||||
-16,
|
||||
-16,
|
||||
-13,
|
||||
-6,
|
||||
4,
|
||||
18,// 24
|
||||
37,
|
||||
56,
|
||||
77,
|
||||
95,
|
||||
110,
|
||||
119,
|
||||
122,
|
||||
119,// 32
|
||||
110,
|
||||
95,
|
||||
77,
|
||||
56,
|
||||
37,
|
||||
18,
|
||||
4,
|
||||
-6,// 40
|
||||
-13,
|
||||
-16,
|
||||
-16,
|
||||
-13,
|
||||
-9,
|
||||
-5,
|
||||
-2,
|
||||
0,// 48
|
||||
2,
|
||||
3,
|
||||
3,
|
||||
2,
|
||||
2,
|
||||
1,
|
||||
/*
|
||||
0,
|
||||
0,// 56
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0
|
||||
*/
|
||||
};
|
||||
#endif
|
||||
@ -1,22 +0,0 @@
|
||||
#ifndef _pedo_
|
||||
#define _pedo_
|
||||
|
||||
|
||||
// =========================================================
|
||||
void hosu_read_end( );
|
||||
u8 hosu_read( );
|
||||
void fill_hosu_hist_hours( u16 );
|
||||
void clear_hosu_hist();
|
||||
void pedometer();
|
||||
|
||||
|
||||
|
||||
// =========================================================
|
||||
#define PEDOMETER_LOG_SIZE ( 24 * 7 )
|
||||
|
||||
|
||||
|
||||
// =========================================================
|
||||
|
||||
|
||||
#endif
|
||||
1019
trunk/pm.c
1019
trunk/pm.c
File diff suppressed because it is too large
Load Diff
190
trunk/pm.h
190
trunk/pm.h
@ -1,190 +0,0 @@
|
||||
#ifndef __PM__
|
||||
#define __PM__
|
||||
|
||||
|
||||
|
||||
#define IIC_SLA_PMIC 0x84
|
||||
#define IIC_SLA_BT_GAUGE 0x6C
|
||||
|
||||
|
||||
|
||||
#define BATT_TH_LO 8
|
||||
#define BATT_TH_EMPTY 3
|
||||
|
||||
#define VCOM_DEFAULT_T 92
|
||||
#define VCOM_DEFAULT_B 95
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
enum PMIC_REG_ADRS
|
||||
{
|
||||
PM_REG_ADRS_VER = 0x00, // verinfo など
|
||||
PM_REG_ADRS_VDD_SYS, // システムが使用する電源
|
||||
PM_REG_ADRS_VDD_LCD, // 液晶電源
|
||||
PM_REG_ADRS_CONT, // /RESET1, LoadSwitch
|
||||
PM_REG_ADRS_BL, // バックライト on/off
|
||||
PM_REG_ADRS_POW_SAVE, // 省電力設定
|
||||
PM_REG_ADRS_POW_DAC1,
|
||||
PM_REG_ADRS_POW_DAC2
|
||||
};
|
||||
|
||||
enum BT_GAUGE_REG_ADRS
|
||||
{
|
||||
BT_GAUGE_REG_VCELL = 0x02, // それぞれ16ビットのため
|
||||
BT_GAUGE_REG_SOC = 0x04,
|
||||
BT_GAUGE_REG_MODE = 0x06,
|
||||
BT_GAUGE_REG_VERSION = 0x08,
|
||||
BT_GAUGE_REG_OCV = 0x0E,
|
||||
BT_GAUGE_REG_RCOMP = 0x0C,
|
||||
BT_GAUGE_REG_LOCK = 0x3E,
|
||||
BT_GAUGE_REG_BT_PARAM = 0x40,
|
||||
BT_GAUGE_REG_COMMAND = 0xFE
|
||||
};
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BT_VENDER_MAXELL = 0, // ショート
|
||||
BT_VENDER_1, // 120
|
||||
BT_VENDER_2, // 360
|
||||
BT_VENDER_3, // 750
|
||||
BT_VENDER_4, // 1.3k
|
||||
BT_VENDER_PANA = 5, // 2.7k
|
||||
BT_VENDER_6, // 8.2k
|
||||
BT_VENDER_OPEN = 7, // open
|
||||
BT_VENDER_NOT_CHECKED = 0xFF,
|
||||
}BT_VENDER;
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
// CODEC上のPMIC互換レジスタ
|
||||
#define CODEC_REG_PM 0x10
|
||||
#define CODEC_REG_BL 0x11
|
||||
#define CODEC_REG_BT 0x12
|
||||
//#define CODEC_REG_VOL 0x13 // ...都合により、adc.hで定義
|
||||
|
||||
// TWLがSPIでPMICに投げたコマンド
|
||||
#define REG_BIT_TWL_REQ_OFF_REQ ( 1 << 6 )
|
||||
#define REG_BIT_TWL_REQ_RST_REQ ( 1 << 0 )
|
||||
#define REG_BIT_TWL_REQ_BL ( 3 << 2 )
|
||||
|
||||
|
||||
|
||||
|
||||
// 0x03 pw cnt3
|
||||
#define PM_REG_BIT_LDSW ( 1 << 0 )
|
||||
#define PM_REG_BIT_nRST1 ( 1 << 1 )
|
||||
|
||||
// 0x01 pw cnt1
|
||||
#define PM_REG_BIT_VDD 0x0F
|
||||
#define PM_REG_BIT_VDD50A ( 1 << 4 )
|
||||
|
||||
// 0x02 pw cnt2
|
||||
#define PM_REG_BIT_VDDLCD 0x07
|
||||
#define PM_REG_BIT_LCD_VCS ( 0x01 << 4 )
|
||||
#define PM_REG_BIT_LCD_TCOM ( 0x01 << 3 )
|
||||
|
||||
// 0x04 bl cnt
|
||||
#define PM_REG_BIT_BL_U 0x01
|
||||
#define PM_REG_BIT_BL_L 0x02
|
||||
|
||||
|
||||
// 0x05 pow save
|
||||
#define PM_REG_BIT_VDD1P_1R15 0b00000000
|
||||
#define PM_REG_BIT_VDD1P_1R05 0b00001000
|
||||
#define PM_REG_BIT_VDD1P_0R90 0b00100000
|
||||
#define PM_REG_BIT_VDD_AUTO 0b00000111
|
||||
#define PM_REG_BIT_VDD_PWM 0b00000000
|
||||
|
||||
|
||||
#define DELAY_PM_TW_PWUP 16 + 2
|
||||
#define DELAY_PM_TSS_50B_AND_TCOM 17 + 1
|
||||
#define DELAY_PM_5V_TO_TCOM 17 + 1
|
||||
#define DELAY_PM_TCOM_TO_VCS 3
|
||||
#define DELAY_PM_VCS_TO_BL ( 17 + 5 )
|
||||
#define DELAY_PM_LCD_OFF ( 50 + 1 )
|
||||
|
||||
|
||||
//=========================================================
|
||||
extern u8 raw_adc_temperature;
|
||||
extern BT_VENDER battery_manufacturer;
|
||||
|
||||
|
||||
//=========================================================
|
||||
err PM_sys_pow_on( );
|
||||
err PM_sys_pow_off( );
|
||||
err PM_bt_auth( );
|
||||
err PM_LCD_vcom_set( );
|
||||
|
||||
err PM_LCD_on( );
|
||||
void PM_LCD_off( );
|
||||
err PM_BL_set( u8 );
|
||||
|
||||
|
||||
void BT_init( );
|
||||
void BT_get_left();
|
||||
|
||||
|
||||
task_status_immed BT_temp_update( );
|
||||
task_status_immed tski_vcom_set( );
|
||||
task_status_immed tski_PM_LCD_on();
|
||||
task_status_immed tski_PM_LCD_off();
|
||||
task_status_immed tski_PM_BL_set();
|
||||
|
||||
|
||||
// これを呼ぶ前に、現在温度を教えておく必要があります。
|
||||
#define PM_reset() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, 0x00 ) )
|
||||
|
||||
|
||||
//=========================================================
|
||||
|
||||
|
||||
// 元栓 //
|
||||
#define PM_LDSW_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, PM_REG_BIT_LDSW ))
|
||||
#define PM_LDSW_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, 0 ))
|
||||
|
||||
|
||||
// システム電源 //
|
||||
#define PM_VDD_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, PM_REG_BIT_VDD ))
|
||||
#define PM_VDD50A_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, ( PM_REG_BIT_VDD | PM_REG_BIT_VDD50A )))
|
||||
#define PM_VDD_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, 0 ))
|
||||
#define PM_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_SYS, 0 ))
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
#define PM_VDD_normMode() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_1R15 | PM_REG_BIT_VDD_PWM ))
|
||||
#define PM_VDD_ecoMode() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_0R90 | PM_REG_BIT_VDD_AUTO ))
|
||||
|
||||
#else
|
||||
#define PM_VDD_ecoMode() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_1R05 | PM_REG_BIT_VDD_AUTO ))
|
||||
#define PM_VDD_normMode() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_1R05 | PM_REG_BIT_VDD_PWM ))
|
||||
#endif
|
||||
|
||||
// ほか //
|
||||
#ifdef _PMIC_TWL_
|
||||
#define PM_reset_neg() { PM0.0 = 1; }
|
||||
#define PM_reset_ast() { P0.0 = 0; PM0.0 = 0; }
|
||||
#define PM_chk_LDSW() ( 1 )
|
||||
#else
|
||||
|
||||
#define PM_reset_neg() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW | PM_REG_BIT_nRST1 )))
|
||||
#define PM_reset_ast() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW )))
|
||||
#define PM_chk_LDSW() ( iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_CONT ) & PM_REG_BIT_LDSW )
|
||||
// ↑ 0 だと異常
|
||||
#endif
|
||||
|
||||
|
||||
// 液晶系電源 //
|
||||
#define PM_VDDLCD_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, PM_REG_BIT_VDDLCD ))
|
||||
#define PM_TCOM_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, ( PM_REG_BIT_VDDLCD | PM_REG_BIT_LCD_TCOM )))
|
||||
#define PM_VCS_on() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, ( PM_REG_BIT_VDDLCD | PM_REG_BIT_LCD_VCS | PM_REG_BIT_LCD_TCOM )))
|
||||
#define PM_TCOM_VCS_off() PM_VDDLCD_on()
|
||||
#define PM_VDDLCD_off() ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VDD_LCD, 0 ) )
|
||||
|
||||
#define PM_set_BL( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL, dat ) )
|
||||
#define PM_set_adc1( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DAC1, dat ) )
|
||||
#define PM_set_adc2( dat ) ( iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_POW_DAC2, dat ) )
|
||||
|
||||
|
||||
#endif // __PM__
|
||||
23
trunk/pool.h
23
trunk/pool.h
@ -1,23 +0,0 @@
|
||||
#ifndef _pool_h_
|
||||
#define _pool_h_
|
||||
|
||||
|
||||
#include "pedometer.h"
|
||||
|
||||
#define VREG_C_FREE_SIZE 24
|
||||
|
||||
// 空いてるメモリ
|
||||
typedef struct {
|
||||
unsigned short pedo_log[ PEDOMETER_LOG_SIZE ];
|
||||
unsigned char vreg_c_free[ VREG_C_FREE_SIZE ];
|
||||
}st_vreg_c_ext;
|
||||
|
||||
typedef union{
|
||||
st_vreg_c_ext vreg_c_ext;
|
||||
u8 self_update_work[ 256 ]; // 256以上はまとめ書きできない
|
||||
}uni_pool;
|
||||
|
||||
extern uni_pool pool;
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,24 +0,0 @@
|
||||
/********************************************************//*
|
||||
|
||||
むりやりリブート
|
||||
|
||||
ファイル中にインラインアセンブラがあると、
|
||||
そのモジュール全部最適化が聞かなくなるため追い出した
|
||||
|
||||
**********************************************************/
|
||||
#pragma SFR
|
||||
|
||||
#include "incs_loader.h"
|
||||
|
||||
|
||||
void my_reboot(){
|
||||
#asm
|
||||
|
||||
MOV PSW,#06H ; ダミーのPSWをセット
|
||||
MOVW AX,#000d0h ; リセットのベクタ値を取り込んでいます。
|
||||
PUSH PSW
|
||||
PUSH AX ; これでRETIのためのスタックを準備
|
||||
RETI ; これでリセット・ベクタに分岐
|
||||
|
||||
#endasm
|
||||
}
|
||||
@ -1,6 +0,0 @@
|
||||
#ifndef __MYREBOOT__
|
||||
#define __MYREBOOT__
|
||||
|
||||
void my_reboot();
|
||||
|
||||
#endif
|
||||
180
trunk/rtc.c
180
trunk/rtc.c
@ -1,180 +0,0 @@
|
||||
/* ========================================================
|
||||
RTC
|
||||
======================================================== */
|
||||
#pragma sfr
|
||||
#pragma inline
|
||||
|
||||
|
||||
#include "incs.h"
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
u8 rtc_work[7];
|
||||
bit rtc_lock;
|
||||
bit rtc_dirty;
|
||||
bit rtc_alarm_dirty;
|
||||
|
||||
/* ========================================================
|
||||
ペリフェラルの初期化
|
||||
レジスタの電池交換ビットのセット
|
||||
======================================================== */
|
||||
void RTC_init( void )
|
||||
{
|
||||
|
||||
if( !RTCEN ) // ビットが立っていたらリブート
|
||||
{
|
||||
RTCEN = 1; // モジュールON
|
||||
|
||||
// RTC設定
|
||||
RTCC0 = 0b00001000; /* 動作停止、24時間制、32k出力「まだなし」、定周期割り込みなし */
|
||||
RTCC1 = 0b11000000; /* アラーム割り込み有効&動作開始 */
|
||||
RTCC2 = 0b10000000; /* インターバル:32k/2^6=2ms、RTCDIV出力なし */
|
||||
|
||||
SEC = 0x00;
|
||||
MIN = 0x00;
|
||||
HOUR = 0x15;
|
||||
DAY = 0x01;
|
||||
WEEK = 0x00;
|
||||
MONTH = 0x11;
|
||||
YEAR = 0x09;
|
||||
|
||||
ALARMWW = 0x7F;
|
||||
|
||||
vreg_ctr[VREG_C_MCU_STATUS] |= REG_BIT_RTC_BLACKOUT;
|
||||
}
|
||||
// 割り込み設定
|
||||
RTCIF = 0;
|
||||
RTCIIF = 0;
|
||||
RTCMK = 1; /* 割り込み(定周期)禁止 */
|
||||
RTCIMK = 0; /* 割り込み(アラーム&インターバル)許可 */
|
||||
|
||||
RTCE = 1; /* 動作開始 */
|
||||
|
||||
RWAIT = 1;
|
||||
while( !RWST )
|
||||
{;
|
||||
}
|
||||
RWAIT = 0;
|
||||
|
||||
rtc_lock = 0;
|
||||
rtc_dirty = 0;
|
||||
rtc_alarm_dirty = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
RTC アラーム割り込み
|
||||
2^6/fXT(1.953125 ms)
|
||||
======================================================== */
|
||||
__interrupt void int_rtc( )
|
||||
{
|
||||
// 日付も指定日で
|
||||
if( ( vreg_ctr[VREG_C_RTC_ALARM_DAY] == DAY )
|
||||
&& ( vreg_ctr[VREG_C_RTC_ALARM_MONTH] == MONTH )
|
||||
&& ( vreg_ctr[VREG_C_RTC_ALARM_YEAR] == YEAR ) )
|
||||
{
|
||||
if( ( vreg_ctr[VREG_C_IRQ_MASK1] & REG_BIT_RTC_ALARM ) == 0 )
|
||||
{
|
||||
vreg_ctr[VREG_C_IRQ1] |= REG_BIT_RTC_ALARM;
|
||||
IRQ0_ast;
|
||||
// マスクをしてあったら、電源を入れません
|
||||
if(( system_status.pwr_state == BT_CHARGE ) ||
|
||||
( system_status.pwr_state == OFF ))
|
||||
{
|
||||
system_status.poweron_reason = RTC_ALARM;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
RTC のリード
|
||||
レジスタは、sec,min,hour,week,day,month,year の順
|
||||
======================================================== */
|
||||
void rtc_buf_reflesh( )
|
||||
{
|
||||
if( rtc_lock == 0 )
|
||||
{
|
||||
rtc_lock = 1;
|
||||
RWAIT = 1;
|
||||
while( !RWST )
|
||||
{;
|
||||
}
|
||||
|
||||
memcpy( &vreg_ctr[VREG_C_RTC_SEC], &SEC, 7 );
|
||||
RWAIT = 0;
|
||||
// renge_task_immed_add( tski_rtc_close );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
RTC のライト
|
||||
set_rtc_close と対で使って下さい。
|
||||
こいつはバッファにコピーするだけで、
|
||||
実際にRTCにセットするのはset_rtc_close()です。
|
||||
======================================================== */
|
||||
void set_rtc( u8 adrs, u8 data )
|
||||
{
|
||||
if( rtc_dirty == 0 )
|
||||
{
|
||||
rtc_dirty = 1;
|
||||
memcpy( rtc_work, &SEC, 7 );
|
||||
// renge_task_immed_add( tski_rtc_close ); // I2C終了時に行う
|
||||
}
|
||||
rtc_work[adrs] = data;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
必要ならば、RTCレジスタの更新
|
||||
======================================================== */
|
||||
// task_status_immed tski_rtc_close(){
|
||||
void rtc_unlock( )
|
||||
{
|
||||
// リードロック
|
||||
// if( rtc_lock != 0 ){
|
||||
rtc_lock = 0;
|
||||
// }
|
||||
|
||||
// ライトロック
|
||||
if( rtc_dirty != 0 )
|
||||
{
|
||||
rtc_dirty = 0;
|
||||
RWAIT = 1;
|
||||
while( !RWST )
|
||||
{;
|
||||
}
|
||||
memcpy( &SEC, rtc_work, 7 );
|
||||
RWAIT = 0;
|
||||
}
|
||||
|
||||
// アラームセット
|
||||
if( rtc_alarm_dirty )
|
||||
{
|
||||
WALE = 0;
|
||||
ALARMWM = vreg_ctr[VREG_C_RTC_ALARM_MIN];
|
||||
ALARMWH = vreg_ctr[VREG_C_RTC_ALARM_HOUR];
|
||||
rtc_dirty = 0;
|
||||
WALE = 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
RTC システムチックタイマ割り込みベクタ
|
||||
2^6/fXT(1.953125 ms)
|
||||
======================================================== */
|
||||
__interrupt void int_rtc_int( )
|
||||
{
|
||||
renge_flg_interval = 1;
|
||||
}
|
||||
21
trunk/rtc.h
21
trunk/rtc.h
@ -1,21 +0,0 @@
|
||||
#ifndef __rtc_h__
|
||||
#define __rtc_h__
|
||||
|
||||
|
||||
void RTC_init( void );
|
||||
void rtc_buf_reflesh( );
|
||||
void set_rtc( );
|
||||
|
||||
//task_status_immed tski_rtc_close();
|
||||
void rtc_unlock( );
|
||||
|
||||
// ------------------------------------
|
||||
#define RTC_32k_on() { RCLOE0 = 1; }
|
||||
#define RTC_32k_off() { RCLOE0 = 0; }
|
||||
|
||||
|
||||
// ------------------------------------
|
||||
extern bit rtc_alarm_dirty;
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,405 +0,0 @@
|
||||
/* ========================================================
|
||||
自己アップデータ
|
||||
======================================================== */
|
||||
#pragma SFR
|
||||
#pragma di
|
||||
#pragma ei
|
||||
#pragma nop
|
||||
#pragma stop
|
||||
#pragma halt
|
||||
|
||||
|
||||
#include "incs_loader.h"
|
||||
|
||||
#include <fsl.h>
|
||||
#include "fsl_user.h"
|
||||
#include "i2c_ctr.h"
|
||||
|
||||
#include "pool.h"
|
||||
|
||||
|
||||
// ========================================================
|
||||
const u8 fsl_fx_MHz_u08 = 8;
|
||||
const u8 fsl_low_voltage_u08 = 1;
|
||||
|
||||
|
||||
// 自己フラッシュパラメータ
|
||||
#define SAM_BLOCK_SIZE 1024
|
||||
// ↓256バイト以上はまとめてかけません。
|
||||
#define SELF_UPDATE_BUFF_SIZE 256
|
||||
#define SELF_UPDATE_SPLIT_WRITE_NUM ( SAM_BLOCK_SIZE / SELF_UPDATE_BUFF_SIZE )
|
||||
#define SAM_WORD_SIZE 4
|
||||
|
||||
// ↓ブロック番号(1ブロック=1kB)
|
||||
#define INACTIVE_BOOTSECT_TOP 4
|
||||
#define FIRM_TOP 8
|
||||
#define FIRM_SIZE 12
|
||||
#define UPDATE_BLOCK_LAST ( FIRM_TOP + FIRM_SIZE - 1 )
|
||||
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
#define ACKD ACKD1
|
||||
#define ACKE ACKE1
|
||||
#define COI COI1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICAPR0 IICAPR10
|
||||
#define IICRSV IICRSV1
|
||||
#define IICA IICA1
|
||||
#define IICAIF IICAIF1
|
||||
#define IICAMK IICAMK1
|
||||
#define IICAPR1 IICAPR11
|
||||
#define IICCTL0 IICCTL01
|
||||
#define IICE IICE1
|
||||
#define IICF IICF1
|
||||
#define IICS IICS1
|
||||
#define IICWH IICWH1
|
||||
#define IICWL IICWL1
|
||||
#define LREL LREL1
|
||||
#define SPD SPD1
|
||||
#define SPIE SPIE1
|
||||
#define STCEN STCEN1
|
||||
#define STD STD1
|
||||
#define SVA SVA1
|
||||
#define WREL WREL1
|
||||
#define WTIM WTIM1
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
static void FSL_Open( void );
|
||||
static void FSL_Close( void );
|
||||
void firm_restore( );
|
||||
|
||||
static err my_FSL_Init();
|
||||
static err firm_duplicate( u8 block_src, u8 block_dest );
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
extern uni_pool pool;
|
||||
|
||||
|
||||
// 0.D以降 新アップデータ向け
|
||||
#define N_MGC_L 0x1FF6
|
||||
#define N_MGC_T 0x4FF6
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
I2Cで受信して、
|
||||
書き込み、
|
||||
チェックOK → 新ファームに切り替えて再起動
|
||||
NG → 旧(現)ファームに戻して再起動
|
||||
(この関数からは戻りません)
|
||||
======================================================== */
|
||||
void firm_update( )
|
||||
{
|
||||
u8 target_block;
|
||||
u8 split_write_count; // ブロックへちまちま書き込むカウンタ
|
||||
|
||||
// 書き替え前準備 /////////////////////////////////////
|
||||
my_FSL_Init();
|
||||
|
||||
/* ファームのバックアップ
|
||||
開始アドレス、書き込み先の先頭”ブロック番号” (サイズは FIRM_SIZE)
|
||||
0x2000 - 0x4FFF を
|
||||
0x5000 - 0x7FFF (ブロック 20 - 31) にコピー
|
||||
*/
|
||||
firm_duplicate( FIRM_TOP,
|
||||
UPDATE_BLOCK_LAST +1 );
|
||||
|
||||
// 全ブロック削除 /////////////////////////////////////
|
||||
// 電源断を判定するため、最初に全クラスタ消去する
|
||||
//(新ファームが書かれるところに残ってる、以前のファームのフッタを消したい)
|
||||
for( target_block = INACTIVE_BOOTSECT_TOP;
|
||||
target_block <= UPDATE_BLOCK_LAST;
|
||||
target_block += 1 )
|
||||
{
|
||||
FSL_Erase( target_block );
|
||||
}
|
||||
|
||||
// 書き替え ///////////////////////////////////////////
|
||||
// ●ストップコンディションが来るまで続ける
|
||||
// ●終わったら、スタートアップルーチンに飛ぶ
|
||||
for( target_block = INACTIVE_BOOTSECT_TOP;
|
||||
target_block <= UPDATE_BLOCK_LAST;
|
||||
target_block += 1 )
|
||||
{
|
||||
// 新ファーム領域削除
|
||||
FSL_Erase( target_block );
|
||||
|
||||
// 分割書き込み
|
||||
for( split_write_count = 0;
|
||||
( ( split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM )
|
||||
&& ( !SPD ) );
|
||||
split_write_count += 1 )
|
||||
{
|
||||
u8* p_buffer = &pool.self_update_work[0];
|
||||
u16 buff_written_size = 0;
|
||||
|
||||
|
||||
// I2Cから書き込みデータをバッファにためる
|
||||
do
|
||||
{
|
||||
while( !IICAIF && !SPD )
|
||||
{
|
||||
WDT_Restart( );
|
||||
}
|
||||
IICAIF = 0;
|
||||
*p_buffer = IICA;
|
||||
WREL = 1;
|
||||
p_buffer += 1;
|
||||
buff_written_size += 1;
|
||||
}
|
||||
while( ( buff_written_size != SELF_UPDATE_BUFF_SIZE )
|
||||
&& !SPD );
|
||||
|
||||
// 書き込み
|
||||
// 最後だと、ゴミをパディングするが別にかまわない
|
||||
if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE
|
||||
+ split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) )
|
||||
|
||||
!= FSL_OK )
|
||||
{
|
||||
// 書き込み後のチェックエラー
|
||||
// リストア
|
||||
firm_duplicate( UPDATE_BLOCK_LAST +1,
|
||||
FIRM_TOP );
|
||||
FSL_ForceReset();
|
||||
// 戻ってこない //
|
||||
}
|
||||
|
||||
}
|
||||
// 1ブロック書き込み完了。内部ベリファイを行う
|
||||
if( FSL_IVerify( target_block ) != FSL_OK ){
|
||||
// 再度消去→書き込み ベリファイを繰り返すだけじゃダメでした... todo…?
|
||||
// リストア
|
||||
firm_duplicate( UPDATE_BLOCK_LAST +1,
|
||||
FIRM_TOP );
|
||||
FSL_ForceReset();
|
||||
// 戻ってこない //
|
||||
}
|
||||
|
||||
if( SPD )
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
LREL = 1;
|
||||
|
||||
// 書き込んだファームのチェック //
|
||||
{
|
||||
u8 i;
|
||||
u8 comp = 0;
|
||||
|
||||
// ローダーのマジックと、本文の末尾のマジックは同じか確認
|
||||
for( i = 0; i < sizeof( __TIME__ ); i++ )
|
||||
{
|
||||
comp += ( *( u8 * ) ( N_MGC_L + i ) == *( u8 * ) ( N_MGC_T + i ) ) ? 0 : 1;
|
||||
}
|
||||
if( comp == 0 )
|
||||
{
|
||||
// OK!
|
||||
FSL_InvertBootFlag( );
|
||||
FSL_SwapBootCluster( ); // リセットせずに頭から。FSL_Closeは不要
|
||||
// 戻ってこない //
|
||||
}
|
||||
else
|
||||
{
|
||||
// データ(マジックナンバーしか見てない)エラー
|
||||
// リストア
|
||||
firm_duplicate( UPDATE_BLOCK_LAST,
|
||||
FIRM_TOP );
|
||||
FSL_ForceReset(); // リセット
|
||||
// 戻ってこない //
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
■ファームをバックアップ領域からリストアします。
|
||||
チェック後、最後の最後でブートスワップするので、
|
||||
ここではブートスワップは不要です。
|
||||
|
||||
======================================================== */
|
||||
void firm_restore( )
|
||||
{
|
||||
my_FSL_Init();
|
||||
|
||||
/* ファームのリストア
|
||||
0x4800 - 0x7FFF (ブロック 18 - 27) から
|
||||
0x2000 - 0x47FF (ブロック 8 - 17) へコピー
|
||||
*/
|
||||
firm_duplicate( UPDATE_BLOCK_LAST +1,
|
||||
FIRM_TOP );
|
||||
// todo
|
||||
// リストア失敗したら、LEDちかちかとかさせて、サービス送りにしてもらう
|
||||
|
||||
// リブート
|
||||
FSL_InvertBootFlag( );
|
||||
FSL_SwapBootCluster();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
static void FSL_Open( void )
|
||||
{
|
||||
/* save the configuration of the interrupt controller and set */
|
||||
#ifdef FSL_INT_BACKUP
|
||||
fsl_MK0L_bak_u08 = MK0L; /* if (interrupt backup required) */
|
||||
fsl_MK0H_bak_u08 = MK0H; /* { */
|
||||
fsl_MK1L_bak_u08 = MK1L; /* */
|
||||
fsl_MK1H_bak_u08 = MK1H; /* save interrupt controller */
|
||||
fsl_MK2L_bak_u08 = MK2L; /* configuration */
|
||||
fsl_MK2H_bak_u08 = MK2H; /* */
|
||||
MK0L = FSL_MK0L_MASK; /* */
|
||||
MK0H = FSL_MK0H_MASK; /* */
|
||||
MK1L = FSL_MK1L_MASK; /* prepare interrupt controller */
|
||||
MK1H = FSL_MK1H_MASK; /* for selfprogramming */
|
||||
MK2L = FSL_MK2L_MASK; /* */
|
||||
MK2H = FSL_MK2H_MASK; /* } */
|
||||
#endif
|
||||
|
||||
while( DST1 ){;} // DMA停止
|
||||
DEN1 = 0;
|
||||
|
||||
MK0 = 0xFFFF;
|
||||
MK1 = 0xFFFF;
|
||||
MK2 = 0xFFFF;
|
||||
|
||||
FSL_FLMD0_HIGH; // フラッシュ書き替え許可
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
/* leave the "user room" and restore previous conditions */
|
||||
/*----------------------------------------------------------------------------------------------*/
|
||||
static void FSL_Close( void )
|
||||
{
|
||||
// 何か後始末?
|
||||
|
||||
FSL_FLMD0_LOW; // フラッシュライトプロテクト
|
||||
|
||||
#ifdef FSL_INT_BACKUP
|
||||
MK0L = fsl_MK0L_bak_u08; /* do{ */
|
||||
MK0H = fsl_MK0H_bak_u08; /* restore interrupt controller */
|
||||
MK1L = fsl_MK1L_bak_u08; /* configuration */
|
||||
MK1H = fsl_MK1H_bak_u08; /* */
|
||||
MK2L = fsl_MK2L_bak_u08; /* */
|
||||
MK2H = fsl_MK2H_bak_u08; /* } */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
マイコン内でファームをコピーします。
|
||||
__far u8 * p_rom コピー元の先頭アドレス
|
||||
block_dest コピー先の先頭ブロック
|
||||
|
||||
コピー先に書けるようにmy_FSL_Initをあらかじめ実行する必要があります。
|
||||
======================================================== */
|
||||
//static err firm_duplicate( __far u8 * p_rom,
|
||||
// u8 block_dest )
|
||||
static err firm_duplicate( u8 block_src,
|
||||
u8 block_dest )
|
||||
{
|
||||
u8 target_block;
|
||||
u8 split_write_count; // ブロックへちまちま書き込むカウンタ
|
||||
__far u8* p_src = ( __far u8* )( block_src * 0x400 );
|
||||
|
||||
// 書き込み先ブロックの数だけ繰り返す
|
||||
for( target_block = block_dest;
|
||||
target_block < block_dest + FIRM_SIZE;
|
||||
target_block += 1 )
|
||||
{
|
||||
WDT_Restart( );
|
||||
// ブロック消去
|
||||
while( FSL_BlankCheck( target_block ) != FSL_OK )
|
||||
{
|
||||
FSL_Erase( target_block );
|
||||
}
|
||||
|
||||
// 分割書き込み分繰り返す
|
||||
for( split_write_count = 0;
|
||||
split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM;
|
||||
split_write_count += 1 )
|
||||
{
|
||||
u16 buff_written_size;
|
||||
u8* p_buff;
|
||||
|
||||
// 書き込みデータをバッファにためる
|
||||
buff_written_size = 0;
|
||||
p_buff = &pool.self_update_work[0];
|
||||
do
|
||||
{
|
||||
*p_buff = *p_src;
|
||||
p_src += 1;
|
||||
p_buff += 1;
|
||||
buff_written_size +=1;
|
||||
}
|
||||
while( buff_written_size != SELF_UPDATE_BUFF_SIZE );
|
||||
|
||||
// 書き込み
|
||||
if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE
|
||||
+ split_write_count * SELF_UPDATE_BUFF_SIZE ),
|
||||
( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) )
|
||||
!= FSL_OK )
|
||||
{
|
||||
// todo リカバリ? //
|
||||
FSL_Close( );
|
||||
return ( ERR_ERR );
|
||||
}
|
||||
}
|
||||
|
||||
// 1ブロック書き込み完了。内部電圧チェックを行う
|
||||
while( FSL_IVerify( target_block ) != FSL_OK ){
|
||||
// todo 失敗時?
|
||||
;
|
||||
}
|
||||
}
|
||||
return( ERR_SUCCESS );
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
======================================================== */
|
||||
static err my_FSL_Init()
|
||||
{
|
||||
RTCE = 0;
|
||||
|
||||
// 書き替え前準備 //
|
||||
DI( );
|
||||
FSL_Open( ); // 割り込み禁止など
|
||||
|
||||
FSL_Init( &pool.self_update_work[0] ); // ライブラリ初期化。割り込み中断考慮せず
|
||||
FSL_ModeCheck( ); // ライトプロテクトチェック。失敗することを考慮せず
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
|
||||
|
||||
task_status_immed tski_mcu_reset()
|
||||
{
|
||||
// 普通に再起動
|
||||
my_FSL_Init();
|
||||
FSL_SwapBootCluster();
|
||||
|
||||
FSL_ForceReset(); // リセット
|
||||
FSL_Close( );
|
||||
|
||||
// 保険? //
|
||||
// WDTE = 0xAA; // WDTで再起動(テスト向け)
|
||||
return( ERR_SUCCESS ); // no reach
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#ifndef _self_flash_h_
|
||||
#define _self_flash_h_
|
||||
|
||||
|
||||
void firm_update();
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
165
trunk/sw.c
165
trunk/sw.c
@ -1,165 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma NOP
|
||||
#pragma HALT
|
||||
#pragma STOP
|
||||
|
||||
#include "incs.h"
|
||||
|
||||
#include "i2c_twl.h"
|
||||
#include "i2c_ctr.h"
|
||||
#include "led.h"
|
||||
#include "pm.h"
|
||||
#include "rtc.h"
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
#define INTERVAL_TSK_SW 8
|
||||
#define CLICK_THRESHOLD 2
|
||||
|
||||
#ifdef _FOR_E3_
|
||||
#define HOLD_THREASHOLD (u8)( 800 / INTERVAL_TSK_SW )
|
||||
#else
|
||||
#define HOLD_THREASHOLD (u8)( 2000 / INTERVAL_TSK_SW )
|
||||
#endif
|
||||
|
||||
|
||||
//=========================================================
|
||||
u8 SW_pow_count;
|
||||
bit SW_pow_mask;
|
||||
|
||||
u8 SW_home_count, SW_wifi_count;
|
||||
|
||||
bit SW_HOME_n;
|
||||
|
||||
//=========================================================
|
||||
// 押した時間を数える。押しっぱなしでも0に戻らない
|
||||
// maskが非0の時は、一度離すまで無視する
|
||||
#define count_sw_n( sw, counter, mask ) \
|
||||
{ \
|
||||
if( sw ){ \
|
||||
mask = 0; \
|
||||
counter = 0; \
|
||||
}else{ \
|
||||
if( mask != 0 ){ \
|
||||
counter = 0; \
|
||||
}else{ \
|
||||
counter += 1; \
|
||||
if( counter == 0 ) counter = 255; \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
#define chk_clicked( button, count, irq_bit_name ) \
|
||||
if( !button ) \
|
||||
{ \
|
||||
if( count <= CLICK_THRESHOLD ) \
|
||||
{ \
|
||||
count += 1; \
|
||||
} \
|
||||
if( count == CLICK_THRESHOLD ) \
|
||||
{ \
|
||||
set_irq( VREG_C_IRQ0, irq_bit_name ); \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
count = 0; \
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
スイッチの監視
|
||||
チャタリングをはねたり、長押しや、押したトリガなどの検出など
|
||||
======================================================== */
|
||||
void tsk_sw( )
|
||||
{
|
||||
static u16 cnt_force_off = 0;
|
||||
static u8 task_interval = 0;
|
||||
|
||||
switch ( system_status.pwr_state )
|
||||
{
|
||||
case ( ON_TRIG ):
|
||||
cnt_force_off = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if( task_interval-- != 0 )
|
||||
{
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
task_interval = (u8)( INTERVAL_TSK_SW / SYS_INTERVAL_TICK );
|
||||
}
|
||||
|
||||
switch ( system_status.pwr_state )
|
||||
{
|
||||
case ( ON ):
|
||||
case ( SLEEP ):
|
||||
case ( BT_CHARGE ):
|
||||
case ( OFF ):
|
||||
// 電源スイッチの監視 //
|
||||
count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask ); // ボタン押し時間のカウント
|
||||
if( SW_POW_n )
|
||||
{
|
||||
if( SW_pow_count == CLICK_THRESHOLD )
|
||||
{
|
||||
#ifdef _SW_HOME_ENABLE_
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_CLICK );
|
||||
#else
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SW_HOME_CLICK );
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else if( SW_pow_count == HOLD_THREASHOLD )
|
||||
{
|
||||
#ifdef _SW_HOME_ENABLE_
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_HOLD );
|
||||
#else
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SW_HOME_HOLD );
|
||||
#endif
|
||||
cnt_force_off = 1;
|
||||
}
|
||||
|
||||
if( cnt_force_off != 0 )
|
||||
{
|
||||
#ifdef _FOR_E3_
|
||||
if( ++cnt_force_off == ( 200 / INTERVAL_TSK_SW ) )
|
||||
#else
|
||||
if( ++cnt_force_off == ( 4000 / INTERVAL_TSK_SW ) )
|
||||
#endif
|
||||
{
|
||||
// タイムアウトによる強制OFF
|
||||
cnt_force_off = 0;
|
||||
vreg_ctr[ VREG_C_LED_POW ] = LED_POW_ILM_ONLY_RED;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef _SW_HOME_ENABLE_
|
||||
// HOME スイッチ //
|
||||
switch( system_status.model )
|
||||
{
|
||||
# ifdef _MODEL_CTR_
|
||||
case( MODEL_JIKKI ):
|
||||
SW_HOME_n = SW_HOME_n_JIKKI;
|
||||
break;
|
||||
# endif
|
||||
case( MODEL_TS_BOARD ):
|
||||
case( MODEL_SHIROBAKO ):
|
||||
SW_HOME_n = SW_HOME_n_TSBOARD;
|
||||
break;
|
||||
default:
|
||||
SW_HOME_n = 1; // 放されてる状態
|
||||
}
|
||||
chk_clicked( SW_HOME_n, SW_home_count, REG_BIT_SW_HOME_CLICK );
|
||||
#endif
|
||||
|
||||
// wifi sw //
|
||||
chk_clicked( SW_WIFI_n, SW_wifi_count, REG_BIT_SW_WIFI_CLICK );
|
||||
}
|
||||
}
|
||||
@ -1,7 +0,0 @@
|
||||
#ifndef _sw_
|
||||
#define _sw_
|
||||
|
||||
extern u8 SW_pow_count;
|
||||
extern bit SW_pow_mask;
|
||||
|
||||
#endif
|
||||
@ -1,112 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma NOP
|
||||
#pragma HALT
|
||||
#pragma STOP
|
||||
|
||||
#include "incs.h"
|
||||
#include "renge.h"
|
||||
#include "pm.h"
|
||||
|
||||
|
||||
/* ========================================================
|
||||
======================================================== */
|
||||
void tsk_debug( )
|
||||
{
|
||||
u8 temp;
|
||||
static u8 count = 0;
|
||||
static u8 task_interval;
|
||||
|
||||
if( system_status.pwr_state == ON_TRIG ){
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
P5.0 = 1; // /WL_RST に配線されています
|
||||
#endif
|
||||
#ifndef _MODEL_CTR_
|
||||
iic_mcu_write_a_byte( IIC_SLA_DCP, 0x08, 0x80 ); // ACR←0x80 揮発モードへ
|
||||
#endif
|
||||
|
||||
/*
|
||||
temp = iic_mcu_read_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO );
|
||||
count += 1;
|
||||
iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, count );
|
||||
iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, count );
|
||||
*/
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
// 7セグ 4バイト版
|
||||
# define IIC_SLA_DBG_MONITOR 0x24
|
||||
|
||||
void tsk_debug2( )
|
||||
{
|
||||
u8 str[4];
|
||||
|
||||
|
||||
if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) )
|
||||
{
|
||||
/*
|
||||
str[3] = vreg_ctr[ VREG_C_FREE0 ];
|
||||
str[2] = vreg_ctr[ VREG_C_FREE1 ];
|
||||
str[1] = vreg_ctr[ VREG_C_STATUS ];
|
||||
str[0] = vreg_ctr[ VREG_C_RTC_SEC ];
|
||||
*/
|
||||
str[3] = vreg_ctr[ VREG_C_SND_VOL ];
|
||||
str[2] = vreg_ctr[ VREG_C_TUNE ];
|
||||
str[1] = vreg_ctr[ VREG_C_ACC_CONFIG ];
|
||||
str[0] = SEC;
|
||||
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_IRQ1 ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_SND_VOL ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_TUNE ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_TUNE ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_SND_VOL ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_STATUS ] );
|
||||
// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] );
|
||||
|
||||
iic_mcu_write( IIC_SLA_DBG_MONITOR, 0, 4, &str[0] );
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
/* ========================================================
|
||||
タスクひな形
|
||||
======================================================== */
|
||||
task_interval tsk_hina( )
|
||||
{
|
||||
switch ( system_status.pwr_state )
|
||||
{
|
||||
case OFF:
|
||||
case ON_TRIG:
|
||||
case ON:
|
||||
case SLEEP_TRIG:
|
||||
case SLEEP:
|
||||
case OFF_TRIG:
|
||||
default:
|
||||
}
|
||||
|
||||
return ( 次の起 ・ョまでのシ ・X ・e ・ tick ・・); // 毎 tic 呼ばれることになります
|
||||
}
|
||||
|
||||
|
||||
// ポインタで何かもらうのは危険な気がしてきた
|
||||
/* このように使う
|
||||
renge_task_immed_add( タスク関数へのポインタ );
|
||||
*/
|
||||
task_status_immed tsk_imm_hina( u8 * arg )
|
||||
{
|
||||
return ( ERR_FINISED );
|
||||
// ERR_FINISED タスクを削除
|
||||
// ERR_CONTINUE 次になんか割り込みなり、ユーザー操作なり、システムチックが
|
||||
// 来たときに再度実行
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,287 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma NOP
|
||||
#pragma HALT
|
||||
#pragma STOP
|
||||
|
||||
#include "incs.h"
|
||||
#include "renge.h"
|
||||
#include "pm.h"
|
||||
|
||||
#include "accero.h"
|
||||
#include "adc.h"
|
||||
#include "i2c_mcu.h"
|
||||
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
#define ACKD ACKD1
|
||||
#define ACKE ACKE1
|
||||
#define COI COI1
|
||||
#define IICAEN IICA1EN
|
||||
#define IICRSV IICRSV1
|
||||
#define IICA IICA1
|
||||
#define IICAIF IICAIF1
|
||||
#define IICAMK IICAMK1
|
||||
#define IICAPR0 IICAPR11
|
||||
#define IICAPR1 IICAPR01
|
||||
#define IICCTL0 IICCTL10
|
||||
#define IICE IICE1
|
||||
#define IICF IICF1
|
||||
#define IICS IICS1
|
||||
#define IICWH IICWH1
|
||||
#define IICWL IICWL1
|
||||
#define LREL LREL1
|
||||
#define SPD SPD1
|
||||
#define SPIE SPIE1
|
||||
#define STCEN STCEN1
|
||||
#define STD STD1
|
||||
#define SVA SVA1
|
||||
#define WREL WREL1
|
||||
#define WTIM WTIM1
|
||||
#define TRC TRC1
|
||||
#define SMC SMC1
|
||||
#define DFC DFC1
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
bit twl_ver_read;
|
||||
|
||||
|
||||
// ========================================================
|
||||
#define INTERVAL_TSK_MISC_STAT 4
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
ステータスレジスタなど
|
||||
======================================================== */
|
||||
void tsk_misc_stat( )
|
||||
{
|
||||
static u8 interval_task_misc_stat = 0;
|
||||
static u8 state_old; // ステータス変化検出→割り込み の為
|
||||
#ifdef _BL_INDEPENDENT_
|
||||
static u8 state2_old;
|
||||
#endif
|
||||
u8 diff;
|
||||
|
||||
if( interval_task_misc_stat != 0 )
|
||||
{
|
||||
interval_task_misc_stat -= 1;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
interval_task_misc_stat = ( INTERVAL_TSK_MISC_STAT / SYS_INTERVAL_TICK );
|
||||
}
|
||||
|
||||
set_bit( SHELL_OPEN, vreg_ctr[VREG_C_STATUS], REG_BIT_ST_SHELL_OPEN );
|
||||
|
||||
// ステータスレジスタ関係 → 割り込み //
|
||||
if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) )
|
||||
{
|
||||
// pm.c で、その場で行います。
|
||||
// REG_BIT_LCD_ON/OFF
|
||||
// REG_BIT_BL_ON/OFF
|
||||
// REG_BIT_BT_DC_CONNECT/DISC
|
||||
|
||||
|
||||
diff = vreg_ctr[VREG_C_STATUS] ^ state_old;
|
||||
if( diff != 0 )
|
||||
{
|
||||
state_old = vreg_ctr[VREG_C_STATUS];
|
||||
|
||||
if( diff & REG_BIT_BATT_CHARGE )
|
||||
{
|
||||
// 充電状態に以下略
|
||||
if( vreg_ctr[VREG_C_STATUS] & REG_BIT_BATT_CHARGE )
|
||||
{
|
||||
set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_START );
|
||||
}
|
||||
else
|
||||
{
|
||||
set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_STOP );
|
||||
}
|
||||
}
|
||||
|
||||
if( diff & REG_BIT_ST_SHELL_OPEN )
|
||||
{
|
||||
// 蓋の開け閉め
|
||||
if( vreg_ctr[VREG_C_STATUS] & REG_BIT_ST_SHELL_OPEN )
|
||||
{
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SHELL_OPEN );
|
||||
}
|
||||
else
|
||||
{
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_SHELL_CLOSE );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//#ifdef _MCU_KE3_
|
||||
// KE3では必須です。
|
||||
/* ========================================================
|
||||
加速度センサ割り込みピンがオリジナルマイコンには無いので
|
||||
ポーリングする。
|
||||
歩数計用
|
||||
BSRマイコンはaccero.cで割り込みルーチンからタスク登録します。
|
||||
======================================================== */
|
||||
// 割り込みの取りこぼし?
|
||||
if( ( vreg_ctr[VREG_C_ACC_CONFIG] & 0x03 ) != 0x00 )
|
||||
{
|
||||
if( ACC_VALID == 1 )
|
||||
{
|
||||
if( renge_task_immed_add( tsk_cbk_accero ) == ERR_SUCCESS ){
|
||||
NOP();
|
||||
}
|
||||
}
|
||||
}
|
||||
//#endif
|
||||
|
||||
// 割り込みの取りこぼし?
|
||||
if( !PM_IRQ_n ){
|
||||
renge_task_immed_add( ntr_pmic_comm );
|
||||
NOP();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if( twl_ver_read )
|
||||
{
|
||||
twl_ver_read = 0;
|
||||
set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ );
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
逐一起動タスク
|
||||
======================================================== */
|
||||
|
||||
/* ========================================================
|
||||
COMMANDレジスタへの書き込み
|
||||
0なら呼ばれません。ケア不要
|
||||
======================================================== */
|
||||
task_status_immed do_command0( )
|
||||
{
|
||||
// command0 本体電源など
|
||||
if( ( vreg_ctr[VREG_C_COMMAND0] & ( REG_BIT_OFF_REQ | REG_BIT_RESET1_REQ | REG_BIT_FCRAM_RESET_REQ | REG_BIT_RESET2_REQ )) != 0x00 )
|
||||
{
|
||||
if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_OFF_REQ )
|
||||
{
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_RESET1_REQ )
|
||||
{
|
||||
PM_reset_ast( );
|
||||
RESET2_ast;
|
||||
FCRAM_RST_ast;
|
||||
}
|
||||
if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_FCRAM_RESET_REQ )
|
||||
{
|
||||
FCRAM_RST_ast;
|
||||
}
|
||||
else if( vreg_ctr[VREG_C_COMMAND0] & REG_BIT_RESET2_REQ )
|
||||
{
|
||||
RESET2_ast;
|
||||
}
|
||||
wait_ms( 5 );
|
||||
FCRAM_RST_neg;
|
||||
PM_reset_neg();
|
||||
RESET2_neg;
|
||||
|
||||
// 起動時以外はリセット不要
|
||||
/*
|
||||
// CODEC 不定レジスタ初期化
|
||||
wait_ms( 100 );
|
||||
{
|
||||
u8 codec_reg_init[3] = { 0,0,0 };
|
||||
iic_mcu_write( IIC_SLA_CODEC, CODEC_REG_PM, 3, codec_reg_init );
|
||||
}
|
||||
*/
|
||||
}
|
||||
}
|
||||
|
||||
vreg_ctr[VREG_C_COMMAND0] = 0;
|
||||
return ( ERR_FINISED );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
互換向け、TWLアプリへの割り込み
|
||||
仮想レジスタの書き込み時に行います。
|
||||
======================================================== */
|
||||
// task_status_immed do_command1( )
|
||||
|
||||
|
||||
extern u8 iic_burst_state;
|
||||
/* ========================================================
|
||||
デバッグ用にいろいろ読んできます。
|
||||
返値はデータそのもの
|
||||
======================================================== */
|
||||
task_status_immed tski_mcu_info_read()
|
||||
{
|
||||
if( SPD )
|
||||
{
|
||||
goto end;
|
||||
}
|
||||
|
||||
if( STD )
|
||||
{
|
||||
SPIE = 1;
|
||||
}
|
||||
|
||||
if( IICAIF == 0 )
|
||||
{
|
||||
return( ERR_CONTINUE );
|
||||
}
|
||||
else
|
||||
{
|
||||
IICAIF = 0;
|
||||
}
|
||||
|
||||
switch( iic_burst_state++ ){
|
||||
case( 0 ): // 本体種類識別
|
||||
IICA = (u8)system_status.model;
|
||||
break;
|
||||
|
||||
case( 1 ): // IICがなにかエラーでも知らない。00かFFならエラーの可能性が高い
|
||||
IICA = iic_mcu_read_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_VER );
|
||||
break;
|
||||
|
||||
case( 2 ): // 電池メーカーの識別
|
||||
IICA = battery_manufacturer;
|
||||
break;
|
||||
|
||||
case( 3 ): // ガスゲージバージョン
|
||||
IICA = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_VERSION );
|
||||
break;
|
||||
|
||||
case( 4 ): // LSB
|
||||
IICA = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_VERSION + 1 );
|
||||
break;
|
||||
|
||||
default:
|
||||
goto end;
|
||||
}
|
||||
return( ERR_CONTINUE );
|
||||
|
||||
end:
|
||||
LREL = 1;
|
||||
SPIE = 0;
|
||||
IICAMK = 0;
|
||||
iic_burst_state = 0;
|
||||
return( ERR_FINISED );
|
||||
}
|
||||
|
||||
|
||||
436
trunk/task_sys.c
436
trunk/task_sys.c
@ -1,436 +0,0 @@
|
||||
#pragma SFR
|
||||
#pragma NOP
|
||||
#pragma HALT
|
||||
#pragma STOP
|
||||
|
||||
#include "incs.h"
|
||||
|
||||
#include "i2c_twl.h"
|
||||
#include "i2c_ctr.h"
|
||||
#include "led.h"
|
||||
#include "accero.h"
|
||||
#include "pm.h"
|
||||
#include "rtc.h"
|
||||
#include "sw.h"
|
||||
#include "adc.h"
|
||||
#include "self_flash.h"
|
||||
|
||||
|
||||
//=========================================================
|
||||
static void chk_emergencyExit();
|
||||
|
||||
|
||||
|
||||
//=========================================================
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
マイコン内部で必要なもの
|
||||
・省電力に入れる
|
||||
system_status.pwr_state == OFF_TRIG で、このタスクが呼ばれると、
|
||||
省電力モードに入ります
|
||||
======================================================== */
|
||||
void tsk_sys( )
|
||||
{
|
||||
static u8 timeout = 0;
|
||||
|
||||
switch ( system_status.pwr_state )
|
||||
{
|
||||
case OFF: //-------------------------------------------------------
|
||||
// スイッチ操作などで割り込みが発生し、スリープが解除されるとここに来ます。
|
||||
|
||||
switch ( system_status.poweron_reason )
|
||||
{
|
||||
case( NONE ):
|
||||
// スイッチで電源on
|
||||
|
||||
if( SW_pow_count != 0 )
|
||||
{
|
||||
timeout = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
timeout += 1;
|
||||
}
|
||||
if( timeout > 100 )
|
||||
{
|
||||
system_status.pwr_state = OFF_TRIG; // スイッチはノイズだった。寝る。
|
||||
renge_task_interval_run_force = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
if( SW_pow_count < 10 )
|
||||
{
|
||||
// もう少しスイッチの様子を見る
|
||||
return;
|
||||
}
|
||||
// 電源投入
|
||||
system_status.poweron_reason = PWSW;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
SW_pow_mask = 1;
|
||||
|
||||
timeout = 0;
|
||||
|
||||
BT_DET_P = 1; // チャージに時間が掛かるので先に上げておく
|
||||
BT_TEMP_P = 1;
|
||||
|
||||
// 電源投入 //
|
||||
iic_mcu_start( );
|
||||
|
||||
BT_init( ); // 実機やバッテリの判定、電池残量ICの設定
|
||||
|
||||
if( system_status.model == MODEL_JIKKI_NOBATT )
|
||||
{
|
||||
renge_task_interval_run_force = 1;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
return;
|
||||
}
|
||||
|
||||
// 残量チェック
|
||||
BT_get_left(); // 先に、BT_init()が実行されている必要があります。(大丈夫)
|
||||
if( vreg_ctr[VREG_C_BT_REMAIN] < 5 )
|
||||
{
|
||||
renge_task_interval_run_force = 1;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
return;
|
||||
}
|
||||
|
||||
if( PM_sys_pow_on( ) != ERR_SUCCESS )
|
||||
{ // 電源起動不可エラー
|
||||
renge_task_interval_run_force = 1;
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
return;
|
||||
}
|
||||
|
||||
PM_LCD_vcom_set( ); // LCDの対向電圧値など書き込み
|
||||
#ifdef _PMIC_TWL_
|
||||
PM_TEG_LCD_dis( 0 );
|
||||
#endif
|
||||
|
||||
if( system_status.poweron_reason == PWSW )
|
||||
{
|
||||
// 電源ボタンでのonの時は、LEDを点灯させる
|
||||
vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO;
|
||||
}
|
||||
else
|
||||
{
|
||||
// とりあえず、LED消灯状態で起動させる
|
||||
vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_OFF;
|
||||
}
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
// ここまで来ると、電源投入確定 //
|
||||
break;
|
||||
|
||||
case ON_TRIG: //-------------------------------------------------------
|
||||
|
||||
LED_init( );
|
||||
|
||||
PU5 = 0b00000010; // 1:PM_CHARGE
|
||||
PU7 = 0b00011101; // 4:SW_WIFI 3:SW_PWSW 2:PM_IRQ 0:PM_EXTDC_n
|
||||
#ifdef _MODEL_CTR_
|
||||
# ifdef _SW_HOME_ENABLE_
|
||||
PU20 = 0b00010000; // SW_HOME
|
||||
# else
|
||||
PU20 = 0b00000000;
|
||||
# endif
|
||||
#endif
|
||||
|
||||
IIC_ctr_Init( );
|
||||
if( ( vreg_ctr[ VREG_C_MCU_STATUS ] & REG_BIT_STATUS_WDT_RESET )
|
||||
/*
|
||||
if( vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
*/
|
||||
!= 0 )
|
||||
{
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET );
|
||||
}
|
||||
{
|
||||
// WDTリセット時、I2Cの初期化まで割り込み保留
|
||||
// ほんとはここにべた書きしたくないが...
|
||||
if( ( vreg_ctr[ VREG_C_MCU_STATUS ] & REG_BIT_STATUS_WDT_RESET )
|
||||
/*
|
||||
if( vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
| vreg_ctr[ VREG_C_IRQ0 ]
|
||||
*/
|
||||
!= 0 )
|
||||
{
|
||||
set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET );
|
||||
}
|
||||
}
|
||||
IIC_twl_Init( );
|
||||
RTC_32k_on( );
|
||||
|
||||
KRM = 0b00000000;
|
||||
|
||||
system_status.poweron_reason = NONE;
|
||||
renge_task_interval_run_force = 1;
|
||||
|
||||
MK0 = INT_MSK0_RSV;
|
||||
MK1 = INT_MSK1_RSV;
|
||||
|
||||
iic_mcu_start();
|
||||
|
||||
#ifdef _MCU_BSR_
|
||||
// MK2 = ~( INT_MSK2_IIC_TWL | INT_MSK2_WIFI_TX_BSR | INT_MSK2_CODEC_PMIRQ );
|
||||
// PMK21 = 0; // wifi 使わない
|
||||
PMK6 = 0; // pm_irq
|
||||
#else
|
||||
MK2L = ~INT_MSK2_WIFI_TX_KE3;
|
||||
#endif
|
||||
|
||||
system_status.reboot = 0;
|
||||
system_status.pwr_state = ON;
|
||||
break;
|
||||
|
||||
case ON: //---------------------------------------------
|
||||
// PMICによる強制電源断チェック
|
||||
// デバッガがreset1をアサートすることもある。そのときは全部リセット
|
||||
chk_emergencyExit();
|
||||
|
||||
// SLP監視
|
||||
if( SLP_REQ ){
|
||||
system_status.pwr_state = SLEEP_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case SLEEP_TRIG: //-------------------------------------
|
||||
PM_VDD_ecoMode();
|
||||
system_status.pwr_state = SLEEP;
|
||||
break;
|
||||
|
||||
case SLEEP: //------------------------------------------
|
||||
chk_emergencyExit();
|
||||
// スリープから復帰
|
||||
if( !SLP_REQ ){
|
||||
PM_VDD_normMode();
|
||||
wait_ms( 5 ); // tdly_sw
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
SLP_ACK = 1;
|
||||
NOP(); // 適当ウェイト
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
SLP_ACK = 0;
|
||||
#endif
|
||||
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case OFF_TRIG: //---------------------------------------
|
||||
// LED消灯を待つ
|
||||
vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_OFF;
|
||||
if( LED_duty_pow_blu != 0 )
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
LED_stop( );
|
||||
IIC_ctr_Stop( );
|
||||
IIC_twl_Stop( );
|
||||
RTC_32k_off();
|
||||
|
||||
vreg_ctr[VREG_C_IRQ0] = 0;
|
||||
vreg_ctr[VREG_C_IRQ1] = 0;
|
||||
vreg_ctr[VREG_C_IRQ2] = 0;
|
||||
vreg_ctr[VREG_C_IRQ3] = 0;
|
||||
|
||||
// 電源オン条件の割り込みセット
|
||||
// PWSW KR3 押すとL
|
||||
// BG24 KR4
|
||||
// ふた開け INTP5 閉じるとL
|
||||
// ACアダプタ INTP4 アダプタありでL
|
||||
// RTC
|
||||
|
||||
#ifdef _PMIC_TWL_
|
||||
PM_TEG_LCD_dis( 1 );
|
||||
#endif
|
||||
while( iic_mcu_busy )
|
||||
{;
|
||||
}
|
||||
|
||||
KRM = ( KR_SW_POW ); // Mask ではなく、Modeなのだそうだ。紛らわしい
|
||||
MK0 = ~( INT_MSK0_EXTDC );
|
||||
MK1 = ~( INT_MSK1_KR | INT_MSK1_RTCALARM | INT_MSK1_RTCINTVAL );
|
||||
MK2L = 0b11111111;
|
||||
|
||||
// PU5 そのまま
|
||||
PU7 = 0b00001001; // PWSWI,PM_EXTTDC,( IRQ0_deactive(), PM_IRQ_deactive )
|
||||
PU20 = 0x00; // SW_HOME 停止
|
||||
|
||||
IF0 = 0;
|
||||
IF1 = 0;
|
||||
IF2 = 0;
|
||||
|
||||
PM_sys_pow_off( );
|
||||
|
||||
timeout = 0;
|
||||
|
||||
system_status.pwr_state = BT_CHARGE;
|
||||
SW_pow_mask = 1;
|
||||
SW_pow_count = 0;
|
||||
// no break //
|
||||
|
||||
case BT_CHARGE:
|
||||
system_status.pwr_state = OFF;
|
||||
if( !PM_EXTDC_n )
|
||||
{
|
||||
// アダプタ有り:充電温度監視
|
||||
BT_TEMP_P = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 省電力へ移行
|
||||
LED_CHARGE = 0;
|
||||
BT_TEMP_P = 0;
|
||||
while( RWST )
|
||||
{;}
|
||||
|
||||
iic_mcu_stop( );
|
||||
|
||||
// 割り込み待ちで寝る //
|
||||
RTCIMK = 1;
|
||||
|
||||
# ifdef _MCU_BSR_
|
||||
CKC = 0b00001001;
|
||||
OSMC = 0x00;
|
||||
# endif
|
||||
STOP( );
|
||||
// 起きる //
|
||||
// 起きる条件は
|
||||
// ・KeyReturn割り込み(電源ボたん)
|
||||
// ・RTCアラーム
|
||||
// ・アダプタ挿抜
|
||||
|
||||
if( PM_EXTDC_n )
|
||||
{
|
||||
SW_pow_mask = 0;
|
||||
}
|
||||
# ifdef _MCU_BSR_
|
||||
OSMC = 0x01;
|
||||
CKC = 0b00001000;
|
||||
# endif
|
||||
RTCIMK = 0;
|
||||
}
|
||||
return;
|
||||
|
||||
default:
|
||||
while( 1 )
|
||||
{
|
||||
NOP( );
|
||||
// あり得ないステート
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*******************************************************//**
|
||||
PMICが電源異常で止めたか確認
|
||||
**********************************************************/
|
||||
static void chk_emergencyExit(){
|
||||
static u8 shirobako_power_control_count;
|
||||
|
||||
if( shirobako_power_control_count == 0 ) // PM_chk_LDSW() はI2C_mを使用し、高コスト
|
||||
{
|
||||
if( !RESET1_n )
|
||||
{
|
||||
// リセットが下がってる
|
||||
if( PM_chk_LDSW( ) == 0 )
|
||||
{
|
||||
// PMICが異常終了判断をした
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 白箱の仕業
|
||||
shirobako_power_control_count = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if( shirobako_power_control_count == 240 )
|
||||
// デバッガが何かした。reset1を解除するまでは無視
|
||||
{
|
||||
if( RESET1_n )
|
||||
{
|
||||
shirobako_power_control_count = 0;
|
||||
}
|
||||
}else if( shirobako_power_control_count == 200 )
|
||||
// デバッガが何かしたいらしい
|
||||
{
|
||||
// 白箱は電源を切りたいらしい
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
renge_task_interval_run_force = 1;
|
||||
shirobako_power_control_count = 240;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( !RESET1_n )
|
||||
{
|
||||
shirobako_power_control_count += 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// リセットをかけたらしい
|
||||
iic_mcu_write_a_byte( IIC_SLA_PMIC, PM_REG_ADRS_BL, 0 );
|
||||
vreg_ctr[VREG_C_STATUS] = ( vreg_ctr[VREG_C_STATUS] & 0b10011111 );
|
||||
vreg_ctr[VREG_C_COMMAND0] |= REG_BIT_RESET1_REQ;
|
||||
renge_task_immed_add( do_command0 );
|
||||
shirobako_power_control_count = 240;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* ========================================================
|
||||
CPUからのスリープ要求
|
||||
ポーリングにしました。
|
||||
======================================================== */
|
||||
/*
|
||||
__interrupt void intp0_slp( )
|
||||
{ // SLP
|
||||
if( SLP_REQ ){
|
||||
system_status.pwr_state = SLEEP_TRIG;
|
||||
}else{
|
||||
system_status.pwr_state = ON_TRIG;
|
||||
if( PM_BL_set() != ERR_SUCCESS ){
|
||||
renge_task_interval_run_force = 1;
|
||||
iic_mcu_stop();
|
||||
system_status.pwr_state = OFF_TRIG;
|
||||
}
|
||||
}
|
||||
renge_task_interval_run_force = 1;
|
||||
}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*******************************************************//**
|
||||
全く意味ないですが、気分的な物で...
|
||||
**********************************************************/
|
||||
task_status_immed tski_firm_update(){
|
||||
firm_update();
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
@ -1,286 +0,0 @@
|
||||
#ifndef _USER_DEF_
|
||||
#define _USER_DEF_
|
||||
|
||||
#define IIC_SLV_ADDR_MONITOR 0x6E
|
||||
#define IIC_T_SLAVEADDRESS 0x4A
|
||||
#define IIC_C_SLAVEADDRESS 0x4A
|
||||
|
||||
#define IIC_SLA_DCP 0x50
|
||||
|
||||
#ifdef _debug_
|
||||
|
||||
// 8ドットのLED
|
||||
# define IIC_SLA_8LEDS 0x42
|
||||
# define IIC_8LEDS_REG_DO 1
|
||||
# define IIC_8LEDS_REG_DI 2
|
||||
# define IIC_8LEDS_REG_DIR 3
|
||||
|
||||
// 7セグ 4バイト版
|
||||
# define IIC_SLA_DBG_MONITOR 0x44
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _debug_led_
|
||||
# define DBG_LED_WIFI_2_on { PM2.4 = 0; P2.4 = 1; }
|
||||
# define DBG_LED_WIFI_2_off { PM2.4 = 1; P2.4 = 0; }
|
||||
# define DBG_LED_WIFI_2_toggle ( P2.4 ^= 1 )
|
||||
|
||||
#else
|
||||
# define DBG_LED_WIFI_2_on ;
|
||||
# define DBG_LED_WIFI_2_off ;
|
||||
# define DBG_LED_WIFI_2_toggle ;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _PMIC_TWL_
|
||||
# define PM_TEG_PWSW P7.5 // TEGのみ
|
||||
# define PM_TEG_LCD_dis( val ) ( P7.6 = val ) // TEGのみ
|
||||
|
||||
#else
|
||||
|
||||
# define SLP_ACK P7.7
|
||||
#endif
|
||||
|
||||
|
||||
#define IIC_SLA_CODEC 0xA4
|
||||
#define IIC_SLA_ACCEL 0x30 // ST LIS331DLH
|
||||
|
||||
|
||||
// PMxは0で出力モード
|
||||
|
||||
// SoC
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define IRQ0_ast { P3.0 = 0; PM3.0 = 0; }
|
||||
#define IRQ0_neg { PM3.0 = 1; }
|
||||
#define IRQ0 ( P3.0 )
|
||||
#endif
|
||||
#ifdef _MODEL_WM0_
|
||||
#define IRQ0_ast { P3.0 = 0; PM3.0 = 0; }
|
||||
#define IRQ0_neg { PM3.0 = 1; }
|
||||
#define IRQ0 ( P3.0 )
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_TS0_
|
||||
#define IRQ0_ast { P7.6 = 0; PM7.6 = 0; }
|
||||
#define IRQ0_neg { PM7.6 = 1; }
|
||||
#define IRQ0 ( P7.6 )
|
||||
#endif
|
||||
#ifdef _MODEL_CTR_
|
||||
#define IRQ0_ast { P7.6 = 0; PM7.6 = 0; }
|
||||
#define IRQ0_neg { PM7.6 = 1; }
|
||||
#define IRQ0 ( P7.6 )
|
||||
#endif
|
||||
|
||||
|
||||
// ↓誤代入防止
|
||||
#define RESET1_n ( P0.0 )
|
||||
|
||||
#if 0 // PM_RESET1~を使う
|
||||
#define RESET1_ast { P0.0 = 0; PM0.0 = 0; }
|
||||
#define RESET1_neg { PM0.0 = 1; }
|
||||
#endif
|
||||
|
||||
#define RESET2_ast { P0.1 = 0; PM0.1 = 0; }
|
||||
#define RESET2_neg { PM0.1 = 1; }
|
||||
|
||||
#define SLP_REQ P12.0
|
||||
|
||||
// FCRAM
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define FCRAM_RST P14.0
|
||||
#define FCRAM_RST_ast { P14.0 = 0; }
|
||||
#define FCRAM_RST_neg { P14.0 = 1; }
|
||||
#endif
|
||||
#ifdef _MODEL_WM0_
|
||||
#define FCRAM_RST P14.0
|
||||
#define FCRAM_RST_ast { P14.0 = 0; }
|
||||
#define FCRAM_RST_neg { P14.0 = 1; }
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_TS0_
|
||||
#define FCRAM_RST P3.0
|
||||
#define FCRAM_RST_ast { P3.0 = 0; }
|
||||
#define FCRAM_RST_neg { P3.0 = 1; }
|
||||
#endif
|
||||
#ifdef _MODEL_CTR_
|
||||
#define FCRAM_RST P3.0
|
||||
#define FCRAM_RST_ast { P3.0 = 0; }
|
||||
#define FCRAM_RST_neg { P3.0 = 1; }
|
||||
#endif
|
||||
|
||||
|
||||
// CODEC
|
||||
#define PM_IRQ_n P7.2
|
||||
// INTP6
|
||||
|
||||
#ifndef _MODEL_CTR_
|
||||
#define SND_DEPOP_SND_MUTE P7.7 = 1
|
||||
#define SND_DEPOP_SND_ENABLE P7.7 = 0
|
||||
#else
|
||||
#define SND_DEPOP_SND_MUTE ;
|
||||
#define SND_DEPOP_SND_ENABLE ;
|
||||
#endif
|
||||
|
||||
// PM
|
||||
#define PM_EXTDC_n P7.0
|
||||
// INTP7
|
||||
//#define BT_TEMP P15.0
|
||||
// ANI8
|
||||
//#define BT_DET P15.1
|
||||
// ANI9
|
||||
#define BT_DET_P P1.6
|
||||
#define BT_TEMP_P P1.7
|
||||
|
||||
|
||||
// 充電せよ(out)
|
||||
#ifdef _PMIC_CTR_
|
||||
// 負論理です。注意。
|
||||
#define BT_CHG_ENABLE() ( P4.3 = 0 )
|
||||
#define BT_CHG_DISABLE() ( P4.3 = 1 )
|
||||
#else
|
||||
#define BT_CHG_ENABLE() ( P4.2 = 0 )
|
||||
#define BT_CHG_DISABLE() ( P4.2 = 1 )
|
||||
#endif
|
||||
|
||||
// 充電中(in)
|
||||
#define BT_CHG_n P5.1
|
||||
|
||||
#define SW_WIFI_n P7.4
|
||||
// KR4
|
||||
#define SW_POW_n P7.3
|
||||
// KR3
|
||||
#define SW_SEL_n P2.3
|
||||
//#define VOL P2.7
|
||||
// ANI7
|
||||
|
||||
#define SW_HOME_n_JIKKI P20.4
|
||||
// INTP22
|
||||
#define SW_HOME_n_TSBOARD P2.0
|
||||
|
||||
// WiFi
|
||||
#ifndef _TEG_
|
||||
#define WL_TX P20.3 // INTP21
|
||||
#else
|
||||
#define WL_TX P20.3 // INTP21
|
||||
#endif
|
||||
|
||||
//#define LED_CAM P1.0 // TO02
|
||||
//#define LED_WIFI P1.1 // TO03
|
||||
//#define LED_NOTIFY P1.3 // TO05
|
||||
//#define LED_TUNE P5.2 // SLTO ← TO01
|
||||
//#define LED_POW2 P1.4 // TO06 ( 青 )
|
||||
//#define LED_POW1 P1.5 // TO07 ( 赤 )
|
||||
#define LED_CHARGE P2.4
|
||||
|
||||
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define I2C_PU_on() P5.3 = 1
|
||||
#define I2C_PU_off() P5.3 = 0
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_TS0_
|
||||
#define I2C_PU_on() P5.3 = 1
|
||||
#define I2C_PU_off() P5.3 = 0
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
#define I2C_PU_on() P5.3 = 1
|
||||
#define I2C_PU_off() P5.3 = 0
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
// P5.3 に加え、P5.5, P140 P141
|
||||
// P140が出力専用なので...
|
||||
#define I2C_PU_on() { PM5.3 = 1; PM3.3 = 1; P14 |= 0x03; P5.3 = 1; PM5.3 = 0; P3.3 = 1; PM3.3 = 0; }
|
||||
#define I2C_PU_off() { PM5.3 = 1; PM3.3 = 1; P14 &= ~0x03; P5.3 = 0; PM5.3 = 0; P3.3 = 0; PM3.3 = 0; }
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
#define GYRO_CS_ENABLE() P5.0 = 0
|
||||
#define GYRO_CS_DISABLE() P5.0 = 1
|
||||
#else
|
||||
#define GYRO_CS_ENABLE() ;
|
||||
#define GYRO_CS_DISABLE() ;
|
||||
#endif
|
||||
|
||||
//#define I2C_M_SDA P3.1 // SDA10
|
||||
//#define I2C_M_SCL P3.2 // SCL10
|
||||
|
||||
//#define I2C_0_SCL P6.0 // IIC_TWL SCL0
|
||||
//#define I2C_0_SDA P6.1 // SDA0
|
||||
|
||||
//#define I2C_1_SCL P20.0 // IIC CTR SCL1
|
||||
//#define I2C_1_SDA P20.1 // SDA1
|
||||
|
||||
//#define 32kHz_O P1.2 // RTCCL
|
||||
//#define 32k_I1 P12.3 // XT1
|
||||
//#define 32k_I2 P12.4 // XT2
|
||||
|
||||
#define DIPSW_0 P4.0 // mini cube ソフトウェアディップスイッチ
|
||||
#define DIPSW_1 P4.1 // mini cube ソフトウェアディップスイッチ
|
||||
|
||||
#ifndef _MODEL_WM0_
|
||||
#define SHELL_OPEN P7.1 // INTP5 ふた開閉 (閉じると?)
|
||||
#else
|
||||
#define SHELL_OPEN 1
|
||||
#endif
|
||||
|
||||
//#define DBG_VR P2.6
|
||||
// ANI6
|
||||
|
||||
#define DBG P14.1
|
||||
|
||||
#ifdef _MODEL_TEG2_
|
||||
#define ACC_VALID P15.2
|
||||
#define ACCEL_INT1 P2.5
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_TS0_
|
||||
#define ACC_VALID P20.5
|
||||
#define ACCEL_INT1 P2.5
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_WM0_
|
||||
// テレコになっていたが、センサ側の設定を変えたため、TS0と同じでよい
|
||||
#define ACC_VALID P20.5
|
||||
#define ACCEL_INT1 P2.5
|
||||
#endif
|
||||
|
||||
#ifdef _MODEL_CTR_
|
||||
#define ACC_VALID P20.5
|
||||
#define ACCEL_INT1 P2.5
|
||||
#endif
|
||||
|
||||
|
||||
#define DBG_P_n P2.2
|
||||
|
||||
|
||||
#define KR_SW_POW ( 1 << 3 )
|
||||
#define KR_SW_WIFI ( 1 << 4 )
|
||||
|
||||
|
||||
#define INT_MSK0_IIC_M_DMA 0b0001000000000000
|
||||
#define INT_MSK0_SHELL 0b0000000010000000
|
||||
#define INT_MSK0_EXTDC 0b0000000001000000
|
||||
//#define INT_MSK0_SLP 0b0000000000000100 )
|
||||
//#define INT_MSK0_RSV 0b1110111100111011 )
|
||||
#define INT_MSK0_RSV 0b1110111100111111
|
||||
|
||||
#define INT_MSK1_KR 0b0000100000000000
|
||||
#define INT_MSK1_RTCINTVAL 0b0000010000000000
|
||||
#define INT_MSK1_RTCALARM 0b0000001000000000
|
||||
#define INT_MSK1_ADC 0b0000000100000000
|
||||
#define INT_MSK1_IIC_CTR 0b0000000000001000
|
||||
#define INT_MSK1_IIC_MCU 0b0000000000000001
|
||||
#define INT_MSK1_RSV 0b1111000011110110
|
||||
|
||||
#define INT_MSK2_WIFI_TX_KE3 0b00010000
|
||||
#define INT_MSK2L_RSV 0b11101111
|
||||
|
||||
#define INT_MSK2_IIC_TWL ( 0b0000000100000000 )
|
||||
#define INT_MSK2_WIFI_TX_BSR ( 0b0000010000000000 )
|
||||
#define INT_MSK2_CODEC_PMIRQ ( 0b0000000000001000 )
|
||||
#define INT_MSK2_RSV 0b1111101111110111
|
||||
|
||||
#endif
|
||||
440
trunk/vreg_ctr.c
440
trunk/vreg_ctr.c
@ -1,440 +0,0 @@
|
||||
/* ========================================================
|
||||
|
||||
CTR MCU I2Cレジスタ
|
||||
|
||||
====================================================== */
|
||||
#include "incs.h"
|
||||
#include "vreg_ctr.h"
|
||||
#include "rtc.h"
|
||||
#include "led.h"
|
||||
#include "accero.h"
|
||||
#include "pm.h"
|
||||
#include "pool.h"
|
||||
|
||||
#include <fsl.h>
|
||||
#include "fsl_user.h"
|
||||
|
||||
|
||||
extern u8 mcu_info_read(); // task_misc.c
|
||||
extern u8 iic_burst_state;
|
||||
|
||||
|
||||
// ********************************************************
|
||||
u8 vreg_ctr[VREG_C_ENDMARK_];
|
||||
bit irq_readed; // AAA型のため。
|
||||
|
||||
|
||||
// ********************************************************
|
||||
extern task_status_immed tski_firm_update();
|
||||
extern task_status_immed tski_mcu_info_read();
|
||||
|
||||
// ********************************************************
|
||||
#ifdef _MCU_BSR_
|
||||
#define IICAMK IICAMK1
|
||||
#endif
|
||||
|
||||
|
||||
// ********************************************************
|
||||
// 非ゼロの初期値の指定が必要なアドレス
|
||||
void vreg_ctr_init( )
|
||||
{
|
||||
vreg_ctr[VREG_C_LED_BRIGHT] = 0xFF;
|
||||
|
||||
#ifdef _PMIC_TWL_
|
||||
vreg_ctr[VREG_C_MCU_VER_MAJOR] = MCU_VER_MAJOR;
|
||||
#else
|
||||
vreg_ctr[VREG_C_MCU_VER_MAJOR] = MCU_VER_MAJOR | 0x10;
|
||||
#endif
|
||||
vreg_ctr[VREG_C_MCU_VER_MINOR] = MCU_VER_MINOR;
|
||||
|
||||
vreg_ctr[VREG_C_VCOM_T] = VCOM_DEFAULT_T;
|
||||
vreg_ctr[VREG_C_VCOM_B] = VCOM_DEFAULT_B;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// ********************************************************
|
||||
// I2C仮想レジスタに書きます。
|
||||
// 引数 adrs は内部アドレス
|
||||
// 書けないアドレスにアクセスした場合、何もしません。
|
||||
// ●書き込んだ結果、I2C_mcu通信が発生する場合、renge_task_immed_add()
|
||||
// を使用しないと、I2C_mcu使用中でエラー終了した場合にリトライしません。
|
||||
void vreg_ctr_write( u8 adrs, u8 data )
|
||||
{
|
||||
if( adrs >= VREG_C_ENDMARK_ )
|
||||
return;
|
||||
|
||||
switch ( adrs )
|
||||
{
|
||||
|
||||
case ( VREG_C_MCU_STATUS ):
|
||||
vreg_twl[ REG_TWL_INT_ADRS_MODE ] = ( ( data & 0xC0 ) >> 6 );
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_VCOM_T ):
|
||||
case ( VREG_C_VCOM_B ):
|
||||
renge_task_immed_add( tski_vcom_set );
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_DBG1 ):
|
||||
case ( VREG_C_DBG2 ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
case ( VREG_C_DBG3 ):
|
||||
if( ( vreg_ctr[VREG_C_DBG1] == 'j' )
|
||||
&& ( vreg_ctr[VREG_C_DBG2] == 'h' )
|
||||
&& ( data == 'l' ) )
|
||||
{
|
||||
renge_task_immed_add( tski_firm_update );
|
||||
IICAMK = 1;
|
||||
}
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_IRQ_MASK0 ):
|
||||
case ( VREG_C_IRQ_MASK1 ):
|
||||
case ( VREG_C_IRQ_MASK2 ):
|
||||
case ( VREG_C_IRQ_MASK3 ):
|
||||
case ( VREG_C_IRQ_MASK4 ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_COMMAND0 ):
|
||||
if( data != 0 )
|
||||
{
|
||||
renge_task_immed_add( do_command0 );
|
||||
}
|
||||
vreg_ctr[adrs] |= data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_COMMAND2 ):
|
||||
// こちらからの完了割り込みを待ってくれないそうです。 #-ω-) 何のための割り込みだ
|
||||
// 液晶電源
|
||||
if(( data & REG_BIT_CMD_LCD_ON ) != 0 )
|
||||
{
|
||||
renge_task_immed_add( tski_PM_LCD_on );
|
||||
}
|
||||
else if(( data & REG_BIT_CMD_LCD_OFF ) != 0 )
|
||||
{
|
||||
renge_task_immed_add( tski_PM_LCD_off );
|
||||
}
|
||||
|
||||
// バックライト設定
|
||||
/// 今のところさらに細かくは分けないけど…
|
||||
if(( data & REG_BITS_CMD_BL ) != 0 )
|
||||
{
|
||||
renge_task_immed_add( tski_PM_BL_set );
|
||||
vreg_ctr[adrs] = ( data & REG_BITS_CMD_BL );
|
||||
}
|
||||
break;
|
||||
|
||||
case ( VREG_C_COMMAND1 ):
|
||||
if( data != 0 )
|
||||
{
|
||||
// TWLに割り込みを入れる
|
||||
/// 実際に割り込みを入れるのはSoC
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] = ( ( data & REG_BIT_SEND_TWL_PWSW_DET ) != 0 ) ? REG_BIT_TWL_IRQ_PWSW_DET : 0x00; //pwsw_det
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] |= ( ( data & REG_BIT_SEND_TWL_RESET_DET ) != 0 ) ? REG_BIT_TWL_IRQ_RESET : 0x00; //reset_req
|
||||
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] |= ( ( data & REG_BIT_SEND_TWL_OFF_DET ) != 0 ) ? REG_BIT_TWL_IRQ_OFF : 0x00; //off_req
|
||||
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] |= ( ( data & REG_BIT_SEND_TWL_BATT_LOW ) != 0 ) ? REG_BIT_TWL_IRQ_BT_LOW : 0x00; //batt_low
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] |= ( ( data & REG_BIT_SEND_TWL_BATT_EMPTY ) != 0 ) ? REG_BIT_TWL_IRQ_BT_EMPTY : 0x00; //batt_empty
|
||||
|
||||
vreg_twl[REG_TWL_INT_ADRS_IRQ] |= ( ( data & REG_BIT_SEND_TWL_VOL_CLICK ) != 0 ) ? REG_BIT_TWL_IRQ_VOL_CHANGE : 0x00; //vol_changed
|
||||
}
|
||||
break;
|
||||
|
||||
case ( VREG_C_DBG20 ):
|
||||
case ( VREG_C_DBG21 ):
|
||||
case ( VREG_C_DBG22 ):
|
||||
case ( VREG_C_DBG23 ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_LED_BRIGHT ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_LED_POW ):
|
||||
case ( VREG_C_LED_WIFI ):
|
||||
case ( VREG_C_LED_CAM ):
|
||||
case ( VREG_C_LED_TUNE ):
|
||||
vreg_ctr[adrs] = data & 0x0F;
|
||||
break;
|
||||
|
||||
case ( VREG_C_LED_NOTIFY_DATA ):
|
||||
if( iic_burst_state == 0 )
|
||||
{
|
||||
iic_burst_state += 1;
|
||||
vreg_ctr[adrs] = data;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( iic_burst_state > sizeof( uni_info_LED ) )
|
||||
{
|
||||
iic_burst_state = 1;
|
||||
}
|
||||
info_LED.bindata[ iic_burst_state -1 ] = data;
|
||||
iic_burst_state += 1;
|
||||
}
|
||||
|
||||
case ( VREG_C_LED_NOTIFY_OPTION ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
/// 非同期で動いているためここでは書かない。
|
||||
// 予約するだけでstopで書く
|
||||
case ( VREG_C_RTC_SEC ):
|
||||
case ( VREG_C_RTC_MIN ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data & 0x7F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_HOUR ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data & 0x3F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_YOBI ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data & 0x07 );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_DAY ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data & 0x3F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_MONTH ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data & 0x1F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_YEAR ):
|
||||
set_rtc( adrs - VREG_C_RTC_SEC, data );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_COMP ):
|
||||
SUBCUD = data;
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_ALARM_MIN ):
|
||||
rtc_alarm_dirty = 1;
|
||||
vreg_ctr[adrs] = ( data & 0x7F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_ALARM_HOUR ):
|
||||
rtc_alarm_dirty = 1;
|
||||
vreg_ctr[adrs] = ( data & 0x3F );
|
||||
break;
|
||||
|
||||
// 書くだけでよい
|
||||
case ( VREG_C_RTC_ALARM_DAY ):
|
||||
vreg_ctr[adrs] = ( data & 0x3F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_ALARM_MONTH ):
|
||||
vreg_ctr[adrs] = ( data & 0x1F );
|
||||
break;
|
||||
|
||||
case ( VREG_C_RTC_ALARM_YEAR ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
|
||||
case ( VREG_C_ACC_CONFIG ):
|
||||
renge_task_immed_add( acc_hosu_set );
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_R_ADRS ):
|
||||
renge_task_immed_add( acc_read );
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_W_ADRS ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_W_BUF ):
|
||||
renge_task_immed_add( acc_write );
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_HOSU_L ):
|
||||
case ( VREG_C_ACC_HOSU_M ):
|
||||
case ( VREG_C_ACC_HOSU_H ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_HOSU_SETTING ):
|
||||
if( ( data & 0x01 ) != 0 )
|
||||
{
|
||||
clear_hosu_hist(); // 履歴クリア
|
||||
}
|
||||
break;
|
||||
|
||||
case ( VREG_C_ACC_HOSU_ORIGIN ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_FREE_ADRS ):
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( VREG_C_FREE_DATA ):
|
||||
if( vreg_ctr[ VREG_C_FREE_ADRS ] < VREG_C_FREE_SIZE )
|
||||
{
|
||||
pool.vreg_c_ext.vreg_c_free[ vreg_ctr[ VREG_C_FREE_ADRS ] ] = data;
|
||||
vreg_ctr[ VREG_C_FREE_ADRS ] += 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( VREG_C_COMMAND3 ):
|
||||
switch ( data )
|
||||
{
|
||||
case ( 'r' ):
|
||||
// 割り込みルーチンからFSLライブラリを呼ぶのは禁止のため
|
||||
renge_task_immed_add( tski_mcu_reset );
|
||||
break;
|
||||
|
||||
case ( 'w' ):
|
||||
// WDTで再起動(テスト向け)
|
||||
WDTE = 0xAA;
|
||||
break;
|
||||
}
|
||||
vreg_ctr[adrs] = data;
|
||||
break;
|
||||
|
||||
case( VREG_C_BATT_EMPTY_PATTERN ):
|
||||
{
|
||||
#ifdef _MODEL_CTR_NOTIFY_FULLCOLOR_
|
||||
if( iic_burst_state < 4 )
|
||||
{
|
||||
led_red_batt_empty.dats.dats[ iic_burst_state ] = data;
|
||||
iic_burst_state += 1;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ********************************************************
|
||||
// I2C仮想レジスタから読みます。
|
||||
// 戻り: xx データ
|
||||
// 注意:次のアドレスの準備で呼ばれる ので、
|
||||
// リードされたらクリアなどは気をつける
|
||||
u8 vreg_ctr_read( u8 adrs )
|
||||
{
|
||||
static u16 rsub_temp;
|
||||
|
||||
// RTCは読み出し途中に繰り上がるのを避けるため
|
||||
if( ( VREG_C_RTC_SEC <= adrs ) && ( adrs <= VREG_C_RTC_YEAR ) )
|
||||
{
|
||||
rtc_buf_reflesh( );
|
||||
}
|
||||
else if( adrs == VREG_C_MCU_STATUS )
|
||||
{
|
||||
return( vreg_ctr[ VREG_C_MCU_STATUS ] | ( ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x03 ) << 6 ) );
|
||||
}
|
||||
else if( adrs == VREG_C_ACC_HOSU_HIST )
|
||||
{
|
||||
return( hosu_read() );
|
||||
}
|
||||
else if( adrs == VREG_C_FREE_DATA )
|
||||
{
|
||||
return( pool.vreg_c_ext.vreg_c_free[ vreg_ctr[VREG_C_FREE_ADRS]++ ] );
|
||||
}
|
||||
else if( adrs == VREG_C_RTC_SEC_FINE_L )
|
||||
{
|
||||
rsub_temp = RSUBC;
|
||||
return( (u8)( rsub_temp & 0xFF ) );
|
||||
}
|
||||
else if( adrs == VREG_C_RTC_SEC_FINE_H )
|
||||
{
|
||||
return( (u8)( ( rsub_temp >> 8 ) & 0xFF ) );
|
||||
}
|
||||
else if( adrs == VREG_C_INFO )
|
||||
{
|
||||
// I2C_mを使うので、ここからでは割り込みが使えなくて困る
|
||||
// なのでタスク登録する。
|
||||
// 強制的にI2C_2割り込みをマスクする
|
||||
renge_task_immed_add( tski_mcu_info_read );
|
||||
IICAMK = 1;
|
||||
return( 0x4A );
|
||||
}
|
||||
|
||||
#if 1
|
||||
if( adrs >= VREG_C_ENDMARK_ )
|
||||
{
|
||||
// VREG_C_INFO > VREG_C_ENDMARK_ なので
|
||||
// いじるときは注意
|
||||
return( 0xEE );
|
||||
}
|
||||
#endif
|
||||
return ( vreg_ctr[adrs] );
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ********************************************************
|
||||
// I2C仮想レジスタから読まれて何かするレジスタ
|
||||
void vreg_ctr_after_read( u8 adrs )
|
||||
{
|
||||
// 割り込みフラグはリードでクリア
|
||||
switch( adrs )
|
||||
{
|
||||
case VREG_C_IRQ0:
|
||||
case VREG_C_IRQ1:
|
||||
case VREG_C_IRQ2:
|
||||
case VREG_C_IRQ3:
|
||||
case VREG_C_IRQ4:
|
||||
vreg_ctr[ adrs ] = 0;
|
||||
irq_readed = 1;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
割り込みを入れる
|
||||
割り込みマスクが必要と言うことでこんな事をする羽目になりました
|
||||
*****************************************************************************/
|
||||
#if 0
|
||||
// マスクされてたら、フラグは立てるが、割り込みは入れない。
|
||||
#define set_irq( irqreg, bitpos ) \
|
||||
{ \
|
||||
vreg_ctr[ irqreg ] |= bitpos; \
|
||||
if( ( vreg_ctr[ irqreg+8 ] & bitpos ) == 0 ){ \
|
||||
IRQ0_ast; \
|
||||
} \
|
||||
}
|
||||
#endif
|
||||
|
||||
// マスクされてたら、フラグも立てず、割り込みも入れない。
|
||||
void set_irq( u8 irqreg, u8 irq_flg )
|
||||
{
|
||||
u8 tot;
|
||||
|
||||
DI();
|
||||
if( ( vreg_ctr[ irqreg + 8 ] & irq_flg ) == 0 ){
|
||||
vreg_ctr[ irqreg ] |= irq_flg;
|
||||
IRQ0_neg; // 一瞬上げて落とし直す。
|
||||
// EI();
|
||||
tot = 0;
|
||||
while( !IRQ0 && ( ++tot != 0 ) ){;} // O.D.なのでちゃんとあがるのを待つ & IRQ_mcu がLに縛られてると困る(基板不良)
|
||||
IRQ0_ast;
|
||||
}
|
||||
EI();
|
||||
}
|
||||
258
trunk/vreg_ctr.h
258
trunk/vreg_ctr.h
@ -1,258 +0,0 @@
|
||||
#ifndef __vreg_ctr__
|
||||
#define __vreg_ctr__
|
||||
|
||||
|
||||
#include "config.h"
|
||||
|
||||
// VREG_C_MCU_STATUS
|
||||
#define REG_BIT_STATUS_WDT_RESET ( 1 << 1 )
|
||||
#define REG_BIT_RTC_BLACKOUT ( 1 << 0 )
|
||||
|
||||
|
||||
// VREG_C_STATUS,
|
||||
#define REG_BIT_LCD_POW ( 1 << 7 )
|
||||
#define REG_BIT_BL_U ( 1 << 6 )
|
||||
#define REG_BIT_BL_L ( 1 << 5 )
|
||||
#define REG_BIT_BATT_CHARGE ( 1 << 4 )
|
||||
#define REG_BIT_POW_SUPPLY ( 1 << 3 )
|
||||
// 未使用 ( 1 << 2 )
|
||||
#define REG_BIT_ST_SHELL_OPEN ( 1 << 1 )
|
||||
// 未使用 ( 1 << 0 )
|
||||
|
||||
|
||||
// VREG_C_STATUS_X
|
||||
// 未使用 ( 1 << 6 )
|
||||
// 未使用 ( 1 << 5 )
|
||||
#define REG_BIT_WIFI_TX ( 1 << 4 )
|
||||
// twl bl のミラー[1: ( 1 << 3 )
|
||||
// 0]( 1 << 2 )
|
||||
#define REG_BIT_ACCERO_ERR ( 1 << 1 )
|
||||
#define REG_BIT_GASGAUGE_ERR ( 1 << 0 )
|
||||
|
||||
// VREG_C_IRQ0
|
||||
#define REG_BIT_VR_SNDVOL_CHANGE ( 1 << 7 )
|
||||
#define REG_BIT_IRQ_WDT_RESET ( 1 << 7 )
|
||||
#define REG_BIT_SHELL_OPEN ( 1 << 6 )
|
||||
#define REG_BIT_SHELL_CLOSE ( 1 << 5 )
|
||||
#define REG_BIT_SW_WIFI_CLICK ( 1 << 4 )
|
||||
#define REG_BIT_SW_HOME_HOLD ( 1 << 3 )
|
||||
#define REG_BIT_SW_HOME_CLICK ( 1 << 2 )
|
||||
#define REG_BIT_SW_POW_HOLD ( 1 << 1 )
|
||||
#define REG_BIT_SW_POW_CLICK ( 1 << 0 )
|
||||
|
||||
// VREG_C_IRQ1
|
||||
#define REG_BIT_BT_CHG_START ( 1 << 7 )
|
||||
#define REG_BIT_BT_CHG_STOP ( 1 << 6 )
|
||||
#define REG_BIT_BT_REMAIN ( 1 << 5 )
|
||||
#define REG_BIT_ACC_DAT_RDY ( 1 << 4 )
|
||||
#define REG_BIT_ACC_ACK ( 1 << 3 )
|
||||
#define REG_BIT_RTC_ALARM ( 1 << 2 )
|
||||
#define REG_BIT_BT_DC_CONNECT ( 1 << 1 )
|
||||
#define REG_BIT_BT_DC_DISC ( 1 << 0 )
|
||||
|
||||
// VREG_C_IRQ2
|
||||
#define REG_BIT_TWL_VER_READ ( 1 << 7 )
|
||||
#define REG_BIT_TWL_SNDVOL_CHANGE ( 1 << 6 )
|
||||
#define REG_BIT_TWL_BL_U_ON ( 1 << 5 )
|
||||
#define REG_BIT_TWL_BL_U_OFF ( 1 << 4 )
|
||||
#define REG_BIT_TWL_BL_L_ON ( 1 << 3 )
|
||||
#define REG_BIT_TWL_BL_L_OFF ( 1 << 2 )
|
||||
#define REG_BIT_TWL_OFF_REQ ( 1 << 1 )
|
||||
#define REG_BIT_TWL_RESET_REQ ( 1 << 0 )
|
||||
|
||||
// VREG_C_IRQ3
|
||||
#define REG_BIT_BL_U_ON ( 1 << 5 )
|
||||
#define REG_BIT_BL_U_OFF ( 1 << 4 )
|
||||
#define REG_BIT_BL_L_ON ( 1 << 3 )
|
||||
#define REG_BIT_BL_L_OFF ( 1 << 2 )
|
||||
#define REG_BIT_LCD_ON ( 1 << 1 )
|
||||
#define REG_BIT_LCD_OFF ( 1 << 0 )
|
||||
|
||||
|
||||
// そのうちどこかに...
|
||||
//#define REG_BIT_VR_TUNE_CHANGE ( 1 << 7 )
|
||||
|
||||
|
||||
|
||||
// VREG_C_COMMAND0
|
||||
//#define REG_BIT_CMD_LCD_ON ( 1 << 7 )
|
||||
//#define REG_BIT_CMD_LCD_OFF ( 1 << 6 )
|
||||
//#define REG_BIT_CMD_BL_ON ( 1 << 5 )
|
||||
//#define REG_BIT_CMD_BL_OFF ( 1 << 4 )
|
||||
#define REG_BIT_FCRAM_RESET_REQ ( 1 << 3 )
|
||||
#define REG_BIT_RESET2_REQ ( 1 << 2 )
|
||||
#define REG_BIT_RESET1_REQ ( 1 << 1 )
|
||||
#define REG_BIT_OFF_REQ ( 1 << 0 )
|
||||
|
||||
// VREG_C_COMMAND1 (TWLに割り込みを入れる)
|
||||
// 未使用 ( 1 << 7 )
|
||||
// 未使用 ( 1 << 6 )
|
||||
#define REG_BIT_SEND_TWL_VOL_CLICK ( 1 << 5 )
|
||||
#define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 )
|
||||
#define REG_BIT_SEND_TWL_BATT_LOW ( 1 << 3 )
|
||||
#define REG_BIT_SEND_TWL_OFF_DET ( 1 << 2 )
|
||||
#define REG_BIT_SEND_TWL_RESET_DET ( 1 << 1 )
|
||||
#define REG_BIT_SEND_TWL_PWSW_DET ( 1 << 0 )
|
||||
|
||||
// VREG_C_COMMAND2 液晶関係
|
||||
#define REG_BIT_CMD_BL_U_ON ( 1 << 5 )
|
||||
#define REG_BIT_CMD_BL_U_OFF ( 1 << 4 )
|
||||
#define REG_BIT_CMD_BL_L_ON ( 1 << 3 )
|
||||
#define REG_BIT_CMD_BL_L_OFF ( 1 << 2 )
|
||||
#define REG_BIT_CMD_LCD_ON ( 1 << 1 )
|
||||
#define REG_BIT_CMD_LCD_OFF ( 1 << 0 )
|
||||
#define REG_BITS_CMD_BL ( REG_BIT_CMD_BL_U_ON | REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_ON | REG_BIT_CMD_BL_L_OFF )
|
||||
|
||||
|
||||
// ↑TWLに通知するIRQレジスタ
|
||||
#define REG_BIT_TWL_IRQ_PWSW_DET 0x08
|
||||
#define REG_BIT_TWL_IRQ_RESET 0x01
|
||||
#define REG_BIT_TWL_IRQ_OFF 0x02
|
||||
#define REG_BIT_TWL_IRQ_BT_LOW 0x20
|
||||
#define REG_BIT_TWL_IRQ_BT_EMPTY 0x10
|
||||
#define REG_BIT_TWL_IRQ_VOL_CHANGE 0x40
|
||||
|
||||
|
||||
// CODEC上のPMIC NTR の代理レジスタ
|
||||
#define REG_BIT_TWL_REQ_OFF ( 1 << 6 )
|
||||
#define REG_BIT_TWL_REQ_BL_U ( 1 << 3 )
|
||||
#define REG_BIT_TWL_REQ_BL_L ( 1 << 2 )
|
||||
#define REG_BIT_TWL_REQ_RESET ( 1 << 0 )
|
||||
|
||||
|
||||
/*
|
||||
テンプレ
|
||||
#define REG_BIT_ ( 1 << 7 )
|
||||
#define REG_BIT_ ( 1 << 6 )
|
||||
#define REG_BIT_ ( 1 << 5 )
|
||||
#define REG_BIT_ ( 1 << 4 )
|
||||
#define REG_BIT_ ( 1 << 3 )
|
||||
#define REG_BIT_ ( 1 << 2 )
|
||||
#define REG_BIT_ ( 1 << 1 )
|
||||
#define REG_BIT_ ( 1 << 0 )
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*============================================================================*/
|
||||
extern u8 vreg_ctr[];
|
||||
|
||||
/*============================================================================*/
|
||||
enum VREG_C
|
||||
{ // 未定義アドレスへ書き込んだ際の動作は不定
|
||||
VREG_C_MCU_VER_MAJOR = 0x00,
|
||||
VREG_C_MCU_VER_MINOR,
|
||||
VREG_C_MCU_STATUS,
|
||||
|
||||
VREG_C_VCOM_T = 0x03,
|
||||
VREG_C_VCOM_B,
|
||||
|
||||
VREG_C_DBG1 = 0x05,
|
||||
VREG_C_DBG2,
|
||||
VREG_C_DBG3,
|
||||
|
||||
VREG_C_TUNE = 0x08,
|
||||
VREG_C_SND_VOL,
|
||||
VREG_C_BT_TEMP,
|
||||
VREG_C_BT_REMAIN,
|
||||
VREG_C_BT_REMAIN_FINE,
|
||||
VREG_C_BT_VOLTAGE,
|
||||
|
||||
VREG_C_STATUS_1 = 0x0E,
|
||||
VREG_C_STATUS = 0x0F,
|
||||
|
||||
VREG_C_IRQ0 = 0x10,
|
||||
VREG_C_IRQ1,
|
||||
VREG_C_IRQ2,
|
||||
VREG_C_IRQ3,
|
||||
VREG_C_IRQ4,
|
||||
|
||||
VREG_C_IRQ_MASK0 = 0x18,
|
||||
VREG_C_IRQ_MASK1,
|
||||
VREG_C_IRQ_MASK2,
|
||||
VREG_C_IRQ_MASK3,
|
||||
VREG_C_IRQ_MASK4,
|
||||
|
||||
VREG_C_COMMAND0 = 0x20,
|
||||
VREG_C_COMMAND1,
|
||||
VREG_C_COMMAND2,
|
||||
VREG_C_COMMAND3, // 'r' でマイコンリセット
|
||||
|
||||
VREG_C_DBG20 = 0x24,
|
||||
VREG_C_DBG21,
|
||||
VREG_C_DBG22,
|
||||
VREG_C_DBG23,
|
||||
|
||||
VREG_C_LED_BRIGHT = 0x28,
|
||||
VREG_C_LED_POW,
|
||||
VREG_C_LED_WIFI,
|
||||
VREG_C_LED_CAM,
|
||||
VREG_C_LED_TUNE,
|
||||
VREG_C_LED_NOTIFY_DATA,
|
||||
VREG_C_LED_NOTIFY_OPTION,
|
||||
VREG_C_LED_NOTIFY_FLAG,
|
||||
|
||||
VREG_C_RTC_SEC = 0x30,
|
||||
VREG_C_RTC_MIN,
|
||||
VREG_C_RTC_HOUR,
|
||||
VREG_C_RTC_YOBI,
|
||||
VREG_C_RTC_DAY,
|
||||
VREG_C_RTC_MONTH,
|
||||
VREG_C_RTC_YEAR,
|
||||
|
||||
VREG_C_RTC_COMP,
|
||||
|
||||
VREG_C_RTC_ALARM_MIN = 0x38,
|
||||
VREG_C_RTC_ALARM_HOUR,
|
||||
VREG_C_RTC_ALARM_DAY,
|
||||
VREG_C_RTC_ALARM_MONTH,
|
||||
VREG_C_RTC_ALARM_YEAR,
|
||||
|
||||
VREG_C_RTC_SEC_FINE_L,
|
||||
VREG_C_RTC_SEC_FINE_H,
|
||||
|
||||
VREG_C_ACC_HOSU_ORIGIN,
|
||||
|
||||
VREG_C_ACC_CONFIG = 0x40,
|
||||
VREG_C_ACC_R_ADRS,
|
||||
VREG_C_ACC_RESERVE,
|
||||
VREG_C_ACC_W_ADRS,
|
||||
VREG_C_ACC_W_BUF,
|
||||
|
||||
VREG_C_ACC_XL = 0x45,
|
||||
VREG_C_ACC_XH,
|
||||
VREG_C_ACC_YL,
|
||||
VREG_C_ACC_YH,
|
||||
VREG_C_ACC_ZL,
|
||||
VREG_C_ACC_ZH,
|
||||
|
||||
VREG_C_ACC_HOSU_L = 0x4B,
|
||||
VREG_C_ACC_HOSU_M,
|
||||
VREG_C_ACC_HOSU_H,
|
||||
VREG_C_ACC_HOSU_SETTING,
|
||||
VREG_C_ACC_HOSU_HIST = 0x4F,
|
||||
|
||||
VREG_C_FREE_ADRS = 0x50,
|
||||
VREG_C_FREE_DATA,
|
||||
|
||||
VREG_C_BATT_EMPTY_PATTERN,
|
||||
|
||||
VREG_C_ENDMARK_
|
||||
};
|
||||
#define VREG_C_INFO 0x7F
|
||||
// VREG_C_AMBIENT_BRIGHTNESS = 0xXX,
|
||||
|
||||
|
||||
/*
|
||||
VREG_C_PM_INFO, // 未使用
|
||||
VREG_C_BT_INFO, // 未使用
|
||||
*/
|
||||
|
||||
/*============================================================================*/
|
||||
void vreg_ctr_init( );
|
||||
void vreg_ctr_write( u8 adrs, u8 data );
|
||||
u8 vreg_ctr_read( u8 phy_adrs );
|
||||
void vreg_ctr_after_read( u8 adrs );
|
||||
void set_irq( u8 irqreg, u8 irq_flg );
|
||||
|
||||
#endif
|
||||
153
trunk/vreg_twl.c
153
trunk/vreg_twl.c
@ -1,153 +0,0 @@
|
||||
/* ========================================================
|
||||
|
||||
TWL互換側のI2Cレジスタ
|
||||
|
||||
======================================================== */
|
||||
#include "incs.h"
|
||||
#include "jhl_defs.h"
|
||||
#include "led.h"
|
||||
|
||||
#include "vreg_twl.h"
|
||||
|
||||
#include "vreg_ctr.h"
|
||||
|
||||
// ========================================================
|
||||
#define TWL_REG_VER_INFO 0x35
|
||||
#define NON_EXIST_REG 0xFF
|
||||
|
||||
// ========================================================
|
||||
u8 vreg_twl[_REG_TWL_INT_ADRS_ENDMARK];
|
||||
|
||||
|
||||
extern bit twl_ver_read;
|
||||
|
||||
|
||||
/* ========================================================
|
||||
仮想レジスタの初期化
|
||||
======================================================== */
|
||||
void vreg_twl_init( )
|
||||
{
|
||||
vreg_twl[ REG_TWL_INT_ADRS_MODE ] = 0x03;
|
||||
}
|
||||
|
||||
|
||||
// ========================================================
|
||||
// I2C仮想レジスタに書く・何かアクションする
|
||||
// 引数 adrs は内部アドレス
|
||||
// 存在しないアドレスにアクセスした場合、何もしません。
|
||||
void vreg_twl_write( u8 adrs, u8 data )
|
||||
{
|
||||
switch ( adrs )
|
||||
{
|
||||
case ( REG_TWL_INT_ADRS_VOL ):
|
||||
{
|
||||
set_irq( VREG_C_IRQ2, REG_BIT_TWL_SNDVOL_CHANGE );
|
||||
break;
|
||||
}
|
||||
|
||||
case ( REG_TWL_INT_ADRS_MODE ):
|
||||
vreg_twl[adrs] = ( data & 0x03 );
|
||||
break;
|
||||
|
||||
case ( REG_TWL_INT_ADRS_CAM ):
|
||||
vreg_twl[adrs] = ( data & 0x03 );
|
||||
tsk_led_cam(); // todo 大丈夫?
|
||||
break;
|
||||
|
||||
case ( REG_TWL_INT_ADRS_TEMP0 ):
|
||||
vreg_twl[adrs] = data;
|
||||
break;
|
||||
|
||||
case ( REG_TWL_INT_ADRS_COMMAND ):
|
||||
/*
|
||||
if( data <= 2 ){
|
||||
if( ( data & REG_BIT_TWL_OFF_REQ ) != 0 )
|
||||
{
|
||||
set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ ); // OFFも実装していたらしい。
|
||||
break;
|
||||
}
|
||||
else if( ( data & REG_BIT_TWL_RESET_REQ ) != 0 )
|
||||
{
|
||||
set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ ); //リセットしかない。他のは、SPIから来ます。
|
||||
break;
|
||||
}
|
||||
}
|
||||
*/
|
||||
if( data == REG_BIT_TWL_RESET_REQ )
|
||||
{
|
||||
set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ ); //リセットしかない。他のは、SPIから来ます。
|
||||
break;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
// I2C仮想レジスタから読みます。
|
||||
// 引数 adrs 外から見たときの、アドレス
|
||||
// 戻り xx データ
|
||||
// 存在しないアドレスにアクセスした場合、戻り値は0x5A
|
||||
u8 vreg_twl_read( u8 phy_adrs )
|
||||
{
|
||||
u8 temp;
|
||||
|
||||
switch( phy_adrs ){
|
||||
case( REG_TWL_INT_ADRS_VER_INFO ):
|
||||
// set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ ); // 速度的に無理なので
|
||||
twl_ver_read = 1;
|
||||
|
||||
return( TWL_REG_VER_INFO );
|
||||
|
||||
case( REG_TWL_INT_ADRS_POWER_INFO ):
|
||||
if( vreg_ctr[ VREG_C_BT_REMAIN ] > 90 ){
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x0F;
|
||||
}else if( vreg_ctr[ VREG_C_BT_REMAIN ] > 75 ){
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x0B;
|
||||
}else if( vreg_ctr[ VREG_C_BT_REMAIN ] > 50 ){
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x07;
|
||||
}else if( vreg_ctr[ VREG_C_BT_REMAIN ] > 25 ){
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x03;
|
||||
}else if( vreg_ctr[ VREG_C_BT_REMAIN ] > 5 ){
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x01;
|
||||
}else{
|
||||
vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] = 0x00;
|
||||
}
|
||||
|
||||
return( vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] | ( !BT_CHG_n ? 0x80: 0x00 ) ); // アダプタbit
|
||||
|
||||
case( REG_TWL_INT_ADRS_IRQ ):
|
||||
temp = vreg_twl[ REG_TWL_INT_ADRS_IRQ ];
|
||||
vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0;
|
||||
return( temp );
|
||||
|
||||
default:
|
||||
return( vreg_twl[ phy_adrs ] );
|
||||
|
||||
case( REG_TWL_ADRS_NON_EXIST ):
|
||||
return( 0x00 );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
// ========================================================
|
||||
// 外部から見える虫食いアドレスを、内部の連続アドレスに読み替える
|
||||
// 0xFFは存在しないアドレス。
|
||||
u8 adrs_table_twl_ext2int( u8 img )
|
||||
{
|
||||
switch( img ){
|
||||
case( REG_TWL_ADRS_IRQ ): return( REG_TWL_INT_ADRS_IRQ );
|
||||
case( REG_TWL_ADRS_COMMAND ): return( REG_TWL_INT_ADRS_COMMAND );
|
||||
case( REG_TWL_ADRS_POWER_INFO ): return( REG_TWL_INT_ADRS_POWER_INFO );
|
||||
case( REG_TWL_ADRS_CAM ): return( REG_TWL_INT_ADRS_CAM );
|
||||
case( REG_TWL_ADRS_VOL ): return( REG_TWL_INT_ADRS_VOL );
|
||||
case( REG_TWL_ADRS_TEMP0 ): return( REG_TWL_INT_ADRS_TEMP0 );
|
||||
case( REG_TWL_ADRS_VER_INFO ): return( REG_TWL_INT_ADRS_VER_INFO );
|
||||
case( REG_TWL_ADRS_MODE ): return( REG_TWL_INT_ADRS_MODE );
|
||||
default: return( REG_TWL_ADRS_NON_EXIST );
|
||||
// 0が読めればよい、書けなくて良い
|
||||
// case( REG_TWL_ADRS_WIFI ): return( REG_TWL_INT_ADRS_WIFI );
|
||||
}
|
||||
}
|
||||
129
trunk/vreg_twl.h
129
trunk/vreg_twl.h
@ -1,129 +0,0 @@
|
||||
#ifndef __vreg_twl__
|
||||
#define __vreg_twl__
|
||||
/* ========================================================================= */
|
||||
extern u8 vreg_twl[];
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* 外から見たときのマイコンレジスタアドレス。
|
||||
* 拡張性などを考えて飛び飛びにしてある。
|
||||
*/
|
||||
/*
|
||||
* 割り込み要因フラグは
|
||||
* MSB:外部電源供給有り/なし変化 (未実装)
|
||||
* 6:Volキー操作(変更に限らず。MAX時に+でも。)
|
||||
* 5:電池電圧 少 検出
|
||||
* 4: 僅
|
||||
* 3:電源スイッチ 押され検出
|
||||
* 2:(未設定)
|
||||
* 1:電源スイッチ OFF 時間押され検出
|
||||
* LSB: リセット
|
||||
*/
|
||||
enum REG_TWL_ADRS
|
||||
{ // 未定義アドレスへ書き込んだ際は無視
|
||||
REG_TWL_ADRS_VER_INFO = 0x00,
|
||||
REG_TWL_ADRS_PMIC_INFO,
|
||||
REG_TWL_ADRS_BATT_INFO,
|
||||
REG_TWL_ADRS_IRQ = 0x10,
|
||||
REG_TWL_ADRS_COMMAND,
|
||||
REG_TWL_ADRS_MODE,
|
||||
REG_TWL_ADRS_POWER_INFO = 0x20,
|
||||
REG_TWL_ADRS_POWER_SAVE,
|
||||
REG_TWL_ADRS_WIFI = 0x30,
|
||||
REG_TWL_ADRS_CAM,
|
||||
REG_TWL_ADRS_VOL = 0x40,
|
||||
REG_TWL_ADRS_BL,
|
||||
REG_TWL_ADRS_CODEC_MIC_GAIN = 0x50,
|
||||
REG_TWL_ADRS_ADC_CALIB = 0x60,
|
||||
REG_TWL_ADRS_ADC_CALIB_STATUS,
|
||||
REG_TWL_ADRS_ADC_CALIB_VALUE,
|
||||
REG_TWL_ADRS_POWER_LED,
|
||||
REG_TWL_ADRS_TEMP0 = 0x70,
|
||||
REG_TWL_ADRS_TEMP1,
|
||||
REG_TWL_ADRS_TEMP2,
|
||||
REG_TWL_ADRS_TEMP3,
|
||||
REG_TWL_ADRS_TEMP4,
|
||||
REG_TWL_ADRS_TEMP5,
|
||||
REG_TWL_ADRS_TEMP6,
|
||||
REG_TWL_ADRS_TEMP7,
|
||||
REG_TWL_ADRS_TIME_PWSW_DELAY = 0x80,
|
||||
REG_TWL_ADRS_TIME_PWSW_THRESHOLD
|
||||
};
|
||||
|
||||
#define REG_TWL_ADRS_NON_EXIST 0xFF
|
||||
|
||||
/*
|
||||
* マイコン内部でのレジスタの実装
|
||||
* もちろんつめてある
|
||||
*/
|
||||
enum REG_TWL_ADRS_INT
|
||||
{
|
||||
REG_TWL_INT_ADRS_VER_INFO = 0x00,
|
||||
// REG_TWL_INT_ADRS_PMIC_INFO,
|
||||
// REG_TWL_INT_ADRS_BATT_INFO,
|
||||
REG_TWL_INT_ADRS_IRQ, // 0x10,
|
||||
REG_TWL_INT_ADRS_COMMAND,
|
||||
REG_TWL_INT_ADRS_MODE,
|
||||
REG_TWL_INT_ADRS_POWER_INFO, // 0x20,
|
||||
// REG_TWL_INT_ADRS_POWER_SAVE,
|
||||
// REG_TWL_INT_ADRS_WIFI, // 0x30,
|
||||
REG_TWL_INT_ADRS_CAM,
|
||||
REG_TWL_INT_ADRS_VOL, // 0x40,
|
||||
// REG_TWL_INT_ADRS_BL,
|
||||
// REG_TWL_INT_ADRS_CODEC_MIC_GAIN, // 0x50,
|
||||
// REG_TWL_INT_ADRS_CODEC_MIC_GAIN_RELOAD,
|
||||
// REG_TWL_INT_ADRS_ADC_CALIB, // 0x60,
|
||||
// REG_TWL_INT_ADRS_ADC_CALIB_STATUS,
|
||||
// REG_TWL_INT_ADRS_ADC_CALIB_VALUE,
|
||||
// REG_TWL_INT_ADRS_POWER_LED,
|
||||
REG_TWL_INT_ADRS_TEMP0, // 0x70 - 0x77
|
||||
REG_TWL_INT_ADRS_TEMP1,
|
||||
REG_TWL_INT_ADRS_TEMP2,
|
||||
REG_TWL_INT_ADRS_TEMP3,
|
||||
REG_TWL_INT_ADRS_TEMP4,
|
||||
REG_TWL_INT_ADRS_TEMP5,
|
||||
REG_TWL_INT_ADRS_TEMP6,
|
||||
REG_TWL_INT_ADRS_TEMP7,
|
||||
// REG_TWL_INT_ADRS_TIME_PWSW_DELAY,
|
||||
// REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD
|
||||
_REG_TWL_INT_ADRS_ENDMARK,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* ========================================================================= */
|
||||
#define is_TWL ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x01 )
|
||||
#define with_NAND ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x02 )
|
||||
#define volSteps32 ( vregs[ REG_TWL_INT_ADRS_MODE ] & 0x80 )
|
||||
|
||||
#define reg_wifi_led ( vregs[ REG_TWL_INT_ADRS_WIFI ] & 0x01 )
|
||||
#define reg_wifi_led_blink ( vregs[ REG_TWL_INT_ADRS_WIFI ] & 0x02 )
|
||||
|
||||
|
||||
typedef enum {
|
||||
TWL_CAMLED_OFF,
|
||||
TWL_CAMLED_ON,
|
||||
TWL_CAMLED_BLINK,
|
||||
TWL_CAMLED_DEF_ON
|
||||
}twl_camLed_mode;
|
||||
|
||||
|
||||
/* ========================================================================= */
|
||||
void vreg_twl_init( );
|
||||
void vreg_twl_write( u8 adrs, u8 data );
|
||||
u8 adrs_table_twl_ext2int( u8 img );
|
||||
u8 vreg_twl_read( u8 phy_adrs );
|
||||
|
||||
extern task_status_immed command_from_twl( );
|
||||
|
||||
|
||||
// 読んだらクリアなどの処理
|
||||
#define vreg_twl_after_read( reg_adrs ); \
|
||||
if( reg_adrs == REG_TWL_INT_ADRS_IRQ ) \
|
||||
{ \
|
||||
vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0;\
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -1,16 +0,0 @@
|
||||
C:\WINDOWS\system32\cmd.exe /c touch magic.c
|
||||
"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\bin\cc78k0r.exe" -c9F0104 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -irenge -i"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r" -ms -qvjl3wt -sainter_asm -zp -no magic.c
|
||||
Compilation complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\ra78k0r.exe" -c9F0104 -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff inter_asm\magic.asm
|
||||
Assembly complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\lk78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -obsr.lmf "..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r\s0rm.rel" -go85h,0FC00h,1024 -gi0FFFFFFFFFFFFFFFFFFFFh -pbsr_k0r.map -nkd -gb7EFBFFh -b"C:\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\lib78k0r\fsl.lib" -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i"C:\Program Files\NEC Electronics Tools\CC78K0R\W2.10\lib78k0r" -dbsr_mcu.dr -s -w0 loader.rel pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_twl.rel ini_VECT.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel adc.rel renge.rel accero.rel self_flash.rel reboot.rel sw.rel task_debug.rel task_misc.rel task_sys.rel pedo_alg_thre_det2.rel
|
||||
Link complete, 0 error(s) and 0 warning(s) found.
|
||||
"C:\Program Files\NEC Electronics Tools\RA78K0R\W1.31\bin\oc78k0r.exe" -y"C:\Program Files\NEC Electronics Tools\DEV" -_msgoff -o.\bsr.hex -nu -ki bsr.lmf
|
||||
Object Conversion Complete, 0 error(s) and 0 warning(s) found.
|
||||
C:\WINDOWS\system32\cmd.exe /c ruby nec_s_2_bsrbin2.rb bsr.hex
|
||||
nec_s_2_bsrbin2.rb:2: warning: variable $KCODE is no longer effective; ignored
|
||||
intel-HEX to bsr bin converter
|
||||
file converted!
|
||||
|
||||
|
||||
Build Total error(s) : 0 Total warning(s) : 0
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,27 +0,0 @@
|
||||
[ProjectManager]
|
||||
FrameMax=1
|
||||
FrameX=255
|
||||
FrameY=34
|
||||
FrameCX=1299
|
||||
FrameCY=1044
|
||||
OpenFile1=renge\renge.h,0,502,637,1746,1394,29,16,29,0
|
||||
OpenFile2=jhl_defs.h,0,250,539,1494,1265,0,10,8,0
|
||||
OpenFile3=renge\\renge_defs.h,0,293,307,1537,1033,18,37,18,0
|
||||
OpenFile4=renge\renge_defs.h,0,667,22,1514,748,0,16,0,0
|
||||
OpenFile5=task_sys.c,0,330,330,1574,1056,0,172,37,0
|
||||
OpenFile6=loader.c,0,296,307,1286,923,20,214,20,0
|
||||
OpenFile7=pm.h,0,254,446,1244,1062,0,115,0,0
|
||||
OpenFile8=sw.c,0,574,367,1818,1093,43,36,43,0
|
||||
OpenFile9=vreg_ctr.h,0,632,184,1876,910,8,40,25,0
|
||||
OpenFile10=pedo_alg_thre_det2.c,0,132,132,1376,858,0,12,0,0
|
||||
OpenFile11=adc.c,0,286,286,1530,1012,0,145,0,0
|
||||
OpenFile12=self_flash.c,0,154,154,1398,880,7,365,7,0
|
||||
OpenFile13=ProjectWindow
|
||||
PrjPos=0,2,754,3,253
|
||||
OpenFile14=magic.c,0,323,248,1567,974,0,17,0,0
|
||||
OpenFile15=config.h,0,288,71,1532,797,18,2,21,0
|
||||
OpenFile16=OutputWindow
|
||||
OutputPos=0,572,1038,46,1104
|
||||
ActivePRJ=yav_mcu_bsr.prj
|
||||
[ProjectWindow]
|
||||
ProjectWindowDispType=0
|
||||
@ -1,8 +0,0 @@
|
||||
[System]
|
||||
System1=default
|
||||
[default]
|
||||
Project1=yav_mcu_bsr.prj
|
||||
[BATCH_BUILD]
|
||||
Build1=yav_mcu_bsr.prj,Debug Build,1
|
||||
Build2=yav_mcu_bsr.prj,Release Build,0
|
||||
Build3=yav_mcu_bsr.prj,BSR_WM0,0
|
||||
@ -1,234 +0,0 @@
|
||||
[SdbInfo]
|
||||
Ver=5
|
||||
[loader.c]
|
||||
T=4bb93708
|
||||
1=incs_loader.h
|
||||
2=fsl.h
|
||||
3=fsl_user.h
|
||||
4=i2c_ctr.h
|
||||
5=i2c_mcu.h
|
||||
6=pm.h
|
||||
7=rtc.h
|
||||
8=reboot.h
|
||||
[pm.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=adc.h
|
||||
3=led.h
|
||||
4=pm.h
|
||||
5=renge\renge.h
|
||||
6=batt_params.h
|
||||
7=..\..\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r\fsl.h
|
||||
8=fsl_user.h
|
||||
[i2c_ctr.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=accero.h
|
||||
[main.c]
|
||||
T=4bb92f33
|
||||
1=incs_loader.h
|
||||
2=WDT.h
|
||||
3=rtc.h
|
||||
4=pm.h
|
||||
5=accero.h
|
||||
6=led.h
|
||||
7=adc.h
|
||||
[magic.c]
|
||||
T=4bb94d0f
|
||||
1=config.h
|
||||
[WDT.c]
|
||||
T=4bb92f33
|
||||
1=incs_loader.h
|
||||
[i2c_mcu.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=i2c_mcu.h
|
||||
[i2c_twl.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=i2c_twl_defs.h
|
||||
[ini_VECT.c]
|
||||
T=4bb92f33
|
||||
1=config.h
|
||||
[led.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=led.h
|
||||
[rtc.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
[vreg_ctr.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=vreg_ctr.h
|
||||
3=rtc.h
|
||||
4=led.h
|
||||
5=accero.h
|
||||
6=pm.h
|
||||
7=..\..\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r\fsl.h
|
||||
8=fsl_user.h
|
||||
[vreg_twl.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=jhl_defs.h
|
||||
3=vreg_twl.h
|
||||
4=vreg_ctr.h
|
||||
5=renge\renge_task_intval.h
|
||||
[adc.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=adc.h
|
||||
3=pm.h
|
||||
4=led.h
|
||||
[renge\renge.c]
|
||||
T=4bb92f32
|
||||
1=renge\renge.h
|
||||
2=renge\renge_task_intval.h
|
||||
3=renge\renge_task_immediate.h
|
||||
4=WDT.h
|
||||
5=config.h
|
||||
6=user_define.h
|
||||
7=bsr_system.h
|
||||
[accero.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\inc78k0r\math.h
|
||||
[self_flash.c]
|
||||
T=4bb92f33
|
||||
1=incs_loader.h
|
||||
2=..\..\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r\fsl.h
|
||||
3=fsl_user.h
|
||||
4=i2c_ctr.h
|
||||
[reboot.c]
|
||||
T=4bb92f33
|
||||
1=incs_loader.h
|
||||
[sw.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=i2c_twl.h
|
||||
3=i2c_ctr.h
|
||||
4=led.h
|
||||
5=accero.h
|
||||
6=pm.h
|
||||
7=rtc.h
|
||||
[task_debug.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=renge\renge.h
|
||||
3=pm.h
|
||||
4=accero.h
|
||||
[task_misc.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=renge\renge.h
|
||||
3=pm.h
|
||||
4=accero.h
|
||||
5=adc.h
|
||||
6=i2c_mcu.h
|
||||
[task_sys.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=i2c_twl.h
|
||||
3=i2c_ctr.h
|
||||
4=led.h
|
||||
5=accero.h
|
||||
6=pm.h
|
||||
7=rtc.h
|
||||
8=sw.h
|
||||
9=adc.h
|
||||
[pedo_alg_thre_det2.c]
|
||||
T=4bb92f33
|
||||
1=incs.h
|
||||
2=..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\inc78k0r\math.h
|
||||
3=accero.h
|
||||
4=pedometer.h
|
||||
[incs_loader.h]
|
||||
T=4bb92f33
|
||||
1=jhl_defs.h
|
||||
2=user_define.h
|
||||
3=bsr_system.h
|
||||
4=renge\renge.h
|
||||
5=vreg_ctr.h
|
||||
6=vreg_twl.h
|
||||
7=loader.h
|
||||
8=i2c_mcu.h
|
||||
9=WDT.h
|
||||
[jhl_defs.h]
|
||||
T=4bb92f33
|
||||
1=config.h
|
||||
[config.h]
|
||||
T=4bb9687f
|
||||
[user_define.h]
|
||||
T=4bb92f33
|
||||
[bsr_system.h]
|
||||
T=4bb92f33
|
||||
[renge\renge.h]
|
||||
T=4bb92f32
|
||||
1=renge\renge_defs.h
|
||||
2=renge\renge_task_immediate.h
|
||||
[renge\renge_defs.h]
|
||||
T=4bb92f32
|
||||
[renge\renge_task_immediate.h]
|
||||
T=4bb92f32
|
||||
1=renge\renge_defs.h
|
||||
[vreg_ctr.h]
|
||||
T=4bb92f33
|
||||
1=config.h
|
||||
[vreg_twl.h]
|
||||
T=4bb92f33
|
||||
[loader.h]
|
||||
T=4bb92f33
|
||||
1=jhl_defs.h
|
||||
[i2c_mcu.h]
|
||||
T=4bb92f33
|
||||
[WDT.h]
|
||||
T=4bb92f33
|
||||
[fsl.h]
|
||||
T=4bb92f33
|
||||
[fsl_user.h]
|
||||
T=4bb92f33
|
||||
[i2c_ctr.h]
|
||||
T=4bb92f33
|
||||
[pm.h]
|
||||
T=4bb92f33
|
||||
[rtc.h]
|
||||
T=4bb92f33
|
||||
[reboot.h]
|
||||
T=4bb92f33
|
||||
[incs.h]
|
||||
T=4bb92f33
|
||||
1=jhl_defs.h
|
||||
2=user_define.h
|
||||
3=bsr_system.h
|
||||
4=renge\renge.h
|
||||
5=vreg_ctr.h
|
||||
6=vreg_twl.h
|
||||
7=i2c_mcu.h
|
||||
8=rtc.h
|
||||
9=accero.h
|
||||
[accero.h]
|
||||
T=4bb92f33
|
||||
1=jhl_defs.h
|
||||
2=pedometer.h
|
||||
[pedometer.h]
|
||||
T=4bb92f33
|
||||
[adc.h]
|
||||
T=4bb92f33
|
||||
1=jhl_defs.h
|
||||
[led.h]
|
||||
T=4bb92f33
|
||||
[batt_params.h]
|
||||
T=4bb92f33
|
||||
[..\..\Program Files\NEC Electronics Tools\FSL78K0R_Type02ES\V1.20\inc78k0r\fsl.h]
|
||||
T=49a3bd4e
|
||||
[i2c_twl_defs.h]
|
||||
T=4bb92f33
|
||||
[renge\renge_task_intval.h]
|
||||
T=4bb92f32
|
||||
1=renge\renge_defs.h
|
||||
[..\..\Program Files\NEC Electronics Tools\CC78K0R\W2.10\inc78k0r\math.h]
|
||||
T=45f12258
|
||||
[i2c_twl.h]
|
||||
T=4bb92f33
|
||||
[sw.h]
|
||||
T=4bb92f33
|
||||
Loading…
Reference in New Issue
Block a user