From 332ac5a4424fb99c6eab49215a1ed19f9239cf60 Mon Sep 17 00:00:00 2001 From: n2232 Date: Fri, 6 Sep 2013 04:47:29 +0000 Subject: [PATCH] =?UTF-8?q?IS=E3=81=AE=E3=82=AD=E3=83=A3=E3=83=97=E3=83=81?= =?UTF-8?q?=E3=83=A3=E3=81=AB=E5=AF=BE=E5=BF=9C=E3=81=A7=E3=81=8D=E3=82=8B?= =?UTF-8?q?=E3=81=8B=EF=BC=9F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-05-23%20-%20ctr.7z%20+%20svn_v1.068.zip/ctr/svn/ctr_mcu@560 013db118-44a6-b54f-8bf7-843cb86687b1 --- branches/IS_capture/OMakefile | 159 ++ branches/IS_capture/OMakeroot | 4 + branches/IS_capture/VCProj/Debug/BuildLog.htm | Bin 0 -> 3992 bytes .../VCProj/Debug/bsr_trunk.lastbuildstate | 2 + .../IS_capture/VCProj/Debug/bsr_trunk.log | 61 + .../VCProj/Debug/bsr_trunk.unsuccessfulbuild | 0 .../_UpgradeReport_Files/UpgradeReport.css | 207 +++ .../_UpgradeReport_Files/UpgradeReport.xslt | 232 +++ .../UpgradeReport_Minus.gif | Bin 0 -> 69 bytes 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branches/IS_capture/vreg_twl.c | 169 ++ branches/IS_capture/vreg_twl.h | 127 ++ branches/IS_capture/yav_mcu_bsr.plg | 33 + branches/IS_capture/yav_mcu_bsr.pri | 1031 +++++++++++ branches/IS_capture/yav_mcu_bsr.prj | 1411 +++++++++++++++ branches/IS_capture/yav_mcu_bsr.prk | 16 + branches/IS_capture/yav_mcu_bsr.prw | 8 + branches/IS_capture/yav_mcu_bsr.sdb | 337 ++++ branches/IS_capture/ベースからの変更.xls | Bin 0 -> 26624 bytes branches/IS_capture/覚え書き.txt | 9 + 111 files changed, 19784 insertions(+) create mode 100644 branches/IS_capture/OMakefile create mode 100644 branches/IS_capture/OMakeroot create mode 100644 branches/IS_capture/VCProj/Debug/BuildLog.htm create mode 100644 branches/IS_capture/VCProj/Debug/bsr_trunk.lastbuildstate create mode 100644 branches/IS_capture/VCProj/Debug/bsr_trunk.log create mode 100644 branches/IS_capture/VCProj/Debug/bsr_trunk.unsuccessfulbuild create mode 100644 branches/IS_capture/VCProj/_UpgradeReport_Files/UpgradeReport.css create mode 100644 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100644 branches/IS_capture/vreg_ctr.c create mode 100644 branches/IS_capture/vreg_ctr.h create mode 100644 branches/IS_capture/vreg_twl.c create mode 100644 branches/IS_capture/vreg_twl.h create mode 100644 branches/IS_capture/yav_mcu_bsr.plg create mode 100644 branches/IS_capture/yav_mcu_bsr.pri create mode 100644 branches/IS_capture/yav_mcu_bsr.prj create mode 100644 branches/IS_capture/yav_mcu_bsr.prk create mode 100644 branches/IS_capture/yav_mcu_bsr.prw create mode 100644 branches/IS_capture/yav_mcu_bsr.sdb create mode 100644 branches/IS_capture/ベースからの変更.xls create mode 100644 branches/IS_capture/覚え書き.txt diff --git a/branches/IS_capture/OMakefile b/branches/IS_capture/OMakefile new file mode 100644 index 0000000..42baad6 --- /dev/null +++ b/branches/IS_capture/OMakefile @@ -0,0 +1,159 @@ +############################################################ +# 環境設定 +############################################################ + +# マイコン開発環境のインストール先を環境変数で指定する +NECEL_ROOT = + if $(defined-env NECEL_ROOT) + value $(absname $"$(getenv NECEL_ROOT)") + else + value "C:\Program Files (x86)\NEC Electronics Tools" + +# cygwinのインストール先を環境変数で指定する +CYGWIN_ROOT = + if $(defined-env CYGWIN_ROOT) + value $(absname $"$(getenv CYGWIN_ROOT)") + else + value "C:\cygwin" + +# GCCバージョンを環境変数で指定する +CYGWIN_GCC = + if $(defined-env CYGWIN_GCC) + value $(CYGWIN_ROOT)/bin/$"$(getenv CYGWIN_GCC)" + else + value $(CYGWIN_ROOT)/bin/gcc-4 + +#デバイスファイルは NECEL_ROOT/dev に置くこと +#自己アップデート用ライブラリは CC_LIBS_ROOT/以下に置くこと + +SUBDIR_INTER_ASM = $(dir inter_asm) + +CC_ROOT = $(NECEL_ROOT)/CC78K0R +CC_VER = W2.13 +CC = $(CC_ROOT)/$(CC_VER)/bin/cc78k0r.exe +RA = $(NECEL_ROOT)/RA78K0R/W1.33/bin/ra78k0r.exe +LK = $(NECEL_ROOT)/RA78K0R/W1.33/bin/lk78k0r.exe +OC = $(NECEL_ROOT)/RA78K0R/W1.33/bin/oc78k0r.exe +LCNV = $(NECEL_ROOT)/RA78K0R/W1.33/bin/lc78k0r.exe +DEVFILE_ROOT = $(NECEL_ROOT)/dev + +CC_LIBS_ROOT = $(CC_ROOT)/$(CC_VER)/lib78k0r +CC_INCLUDES_ROOT = $(CC_ROOT)/$(CC_VER)/inc78k0r +S0RM = s0rm.rel + +# セキュリティID +GIVALUE = 1B339499E033F240BFAAh + +# ユーザオプションバイト +GBValue = 7EFBFFh + +DEVICE_NAME = 9F0104 + +FSL_LIB = fsl.lib + +TARGET_NAME = bsr +TARGET_LMF = $(TARGET_NAME).lmf +TARGET_HEX = $(TARGET_NAME).hex + +# ここまで +############################################################ + +############################################################ +# ソースを追加したら編集する箇所 +############################################################ + +SRC_FILES[] = + loader + pm + i2c_ctr + main + magic + WDT + i2c_mcu + i2c_twl + led + rtc + vreg_ctr + vreg_twl + adc + renge\renge + accero + self_flash + sw + task_debug + task_misc + task_sys + pedo_alg_thre_det2 + ini_VECT + task_status + led_cam + led_pow + hal + batt_params + voltable + pedo_lpf_coeff + +INCLUDES[] = + ./ + renge + +# ここまで +############################################################ + +.PHONY: clean BeforeBuild + +AddRel(files) = + file_names = $(addsuffix .rel, $(files)) + return $(file_names) + +# *.cからinter_asm/*.asmを作るための関数 +AsmProgram(files) = + foreach(filename, $(files)) + asm_name = $(addprefix $(SUBDIR_INTER_ASM)/, $(addsuffix .asm, $(basename $(filename)))) + c_name = $(addsuffix .c, $(filename)) + + .SCANNER: $(asm_name): $(c_name) + $(CYGWIN_GCC) -MM -w -I$(CC_INCLUDES_ROOT) $(c_name) | sed 's/$(filename)\.o/$(SUBDIR_INTER_ASM)\/$(filename)\.asm/g' + + $(asm_name): $(c_name) + $(CC) -c$(DEVICE_NAME) -y$(DEVFILE_ROOT) -_msgoff -irenge -i$(CC_INCLUDES_ROOT) -ms -qvjl2w -sa$(SUBDIR_INTER_ASM) -zpb -no $(c_name) + + return $(addsuffix .c, $(files)) + +# inter_asm/*.asm から *.relを作るための関数 +RelProgram(files) = + foreach(filename, $(files)) + rel_name = $(addsuffix .rel, $(basename $(filename))) + asm_name = $(addprefix $(SUBDIR_INTER_ASM)/, $(addsuffix .asm, $(basename $(filename)))) + asm_win_name = $(addprefix $(SUBDIR_INTER_ASM)\\, $(addsuffix .asm, $(basename $(filename)))) + c_name = $(addsuffix .c, $(filename)) + + .SCANNER: $(rel_name): $(asm_win_name) + $(CYGWIN_GCC) -MM -w -I$(CC_INCLUDES_ROOT) $(c_name) | sed 's/\.o/\.rel/g' + + $(rel_name): $(asm_name) + $(RA) -c$(DEVICE_NAME) -y$(DEVFILE_ROOT) -_msgoff $(asm_win_name) + + return $(addsuffix .rel, $(basename $(files))) + +$(TARGET_LMF): $(RelProgram $(SRC_FILES)) $(AsmProgram $(SRC_FILES)) + $(LK) -y$(DEVFILE_ROOT) -_msgoff -o$(TARGET_LMF) $(CC_LIBS_ROOT)/$(S0RM) -gi$(GIVALUE) -pbsr_k0r.map -nkd -gb$(GBValue) -b$(CC_LIBS_ROOT)/$(FSL_LIB) -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i$(CC_LIBS_ROOT) -dbsr_mcu.dr -s -w0 $(AddRel $(basename $(SRC_FILES))) + +$(TARGET_HEX) : $(TARGET_LMF) + $(OC) -y$(DEVFILE_ROOT) -_msgoff -o.\\$(TARGET_HEX) -nu -ki $(TARGET_LMF) + +BeforeBuild: +# ビルド前に必ず実行したい処理 +# OMakeがタイムスタンプではなくMD5でファイルの状態を管理しているので +# 残念ながら cleanしてからビルドしなおす必要がある + C:\Windows\system32\cmd.exe /c $(CYGWIN_ROOT)\bin\touch magic.c + if $(not $(file-exists $(SUBDIR_INTER_ASM))) + mkdir $(SUBDIR_INTER_ASM) + +hoge.bin: BeforeBuild $(TARGET_HEX) + C:\Windows\system32\cmd.exe /c ruby nec_s_2_bsrbin2.rb $(TARGET_HEX) + +clean: + rm -rf *.prn *.rel $(SUBDIR_INTER_ASM)/*.asm *.omc .omakedb .omakedb.lock + +.DEFAULT: hoge.bin diff --git a/branches/IS_capture/OMakeroot b/branches/IS_capture/OMakeroot new file mode 100644 index 0000000..16f4b11 --- /dev/null +++ b/branches/IS_capture/OMakeroot @@ -0,0 +1,4 @@ +# +# Include the OMakefile in this directory. +# +.SUBDIRS: . diff --git a/branches/IS_capture/VCProj/Debug/BuildLog.htm b/branches/IS_capture/VCProj/Debug/BuildLog.htm new file mode 100644 index 0000000000000000000000000000000000000000..826ce7ce8cbd63fbd1c0dfd05436b1b710c41607 GIT binary patch literal 3992 zcmeH~&u>&!6vvM)o0#w?ywm`Sna*ho0xdNH9U{=uANGf2#xygX9~~K(Ix|H}(4C1| z6O$TOni!)&cbKrzy$cCTC9X7aNeC-;#;Bij-n*R{+dzvUVbQ$2_wJ8#&#!yV_n!OD z-^XN0T5?fp@{&9wJ!1Wm~u>=ZAg>Z7F<{OmXXviFR~`+W^1~&E5N^qyg;!G zkJ3i31YI=i#4bG&B!769Aia;f8;IminYp# zRS~T`>r1RO?W=riP&8>>@zED#Fwy2`y{k7hl6(4{#-2`Z@G&`QBn53_xuMss`vLfy z#2QZ%Kb!n2p0A*TcFfsKk*7V^w#KX~Lfh#RTf5mC85w1_NAZbyV;^z~E_FE3*gUd* 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+Debug|Win32|C:\78k_data\yav-mcu-basara\trunk\VCProj\| diff --git a/branches/IS_capture/VCProj/Debug/bsr_trunk.log b/branches/IS_capture/VCProj/Debug/bsr_trunk.log new file mode 100644 index 0000000..fb95820 --- /dev/null +++ b/branches/IS_capture/VCProj/Debug/bsr_trunk.log @@ -0,0 +1,61 @@ +2013/01/28 10:34:28 にビルドを開始しました。 + 1>ノード 2 上のプロジェクト "C:\78k_data\yav-mcu-basara\trunk\VCProj\bsr_trunk.vcxproj" (build ターゲット)。 + 1>InitializeBuildStatus: + "Debug\bsr_trunk.unsuccessfulbuild" のタッチ タスクを実行しています。 + ClCompile: + C:\Program Files (x86)\Microsoft Visual Studio 10.0\VC\bin\CL.exe /c /Zi /nologo /W1 /WX- /O2 /Oy- /D _MBCS /D _MBCS /Gm- /EHsc /MD /GS /fp:precise /Zc:wchar_t /Zc:forScope /Fo"Debug\\" /Fd"Debug\vc100.pdb" /Gd /TC /analyze- /errorReport:prompt ..\accero.c ..\adc.c ..\batt_params.c ..\hal.c ..\i2c_ctr.c "..\i2c_mcu-sub.c" ..\i2c_mcu.c ..\i2c_twl.c ..\ini_VECT.c ..\kanaria_c.c ..\led.c ..\led_cam.c ..\led_pow.c ..\loader.c ..\magic.c ..\main.c ..\pedo_alg_thre_det2.c ..\pedo_lpf_coeff.c ..\pm.c ..\reboot.c ..\renge\renge.c ..\rtc.c ..\self_flash.c ..\sim\simFixture.c ..\sw.c ..\task_debug.c ..\task_misc.c ..\task_status.c ..\task_sys.c ..\util_funcs.c ..\voltable.c ..\vreg_ctr.c ..\vreg_twl.c ..\WDT.c + accero.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + adc.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + batt_params.c + hal.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + i2c_ctr.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + i2c_mcu-sub.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + i2c_mcu.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + i2c_twl.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + 1>..\i2c_twl.c(223): error C2065: 'DFC0' : 定義されていない識別子です。 + ini_VECT.c + kanaria_c.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + led.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + 1>..\led.c(162): warning C4133: '初期化中' : 'uni_info_LED *' と 'char *' の間で型に互換性がありません。 + led_cam.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + led_pow.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + loader.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + 1>..\loader.c(201): error C2059: 構文エラー : 'サフィックスが無効です。' + 1>..\loader.c(201): error C2146: 構文エラー : ')' が、識別子 'b00000110' の前に必要です。 + magic.c + main.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + pedo_alg_thre_det2.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + pedo_lpf_coeff.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + pm.c + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + 1>..\pm.c(1357): warning C4090: '=' : 異なる 'const' 修飾子です。 + reboot.c + 1>..\reboot.c(8): warning C4068: 不明なプラグマがありました。 + 1>c:\78k_data\yav-mcu-basara\trunk\sim/simOnWin.h(14): warning C4391: 'void memcpy(void *,void *,unsigned int)' : 組み込み関数に対して戻り値の型が無効です。'void' であるべきです。 + 1>..\reboot.c(14): fatal error C1021: プリプロセッサ コマンド 'asm' が無効です。 + コードを生成中... + 1>c:\78k_data\yav-mcu-basara\trunk\i2c_mcu.c(300): fatal error C1001: コンパイラで内部エラーが発生しました。 + (コンパイラ ファイル 'f:\dd\vctools\compiler\utc\src\p2\main.c[0x5E74372A:0x00000000]'、行 183) + この問題を回避するには、上記の場所付近のプログラムを単純化するか変更してください。 + 詳細については、Visual C++ ヘルプ メニューのサポート情報コマンドを + 選択してください。またはサポート情報 ヘルプ ファイルを参照してください。 + 1>プロジェクト "C:\78k_data\yav-mcu-basara\trunk\VCProj\bsr_trunk.vcxproj" (build ターゲット) のビルドが終了しました -- 失敗。 + +ビルドに失敗しました。 + +経過時間 00:00:12.85 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GlobalSection(ProjectConfigurationPlatforms) = postSolution + {9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.ActiveCfg = Debug|Win32 + {9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Debug|Win32.Build.0 = Debug|Win32 + {9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.ActiveCfg = Release|Win32 + {9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}.Release|Win32.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/branches/IS_capture/VCProj/bsr_trunk.sln.old b/branches/IS_capture/VCProj/bsr_trunk.sln.old new file mode 100644 index 0000000..2881d87 --- /dev/null +++ b/branches/IS_capture/VCProj/bsr_trunk.sln.old @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 10.00 +# Visual C++ Express 2008 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "bsr_trunk", "bsr_trunk.vcproj", "{9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2}" +EndProject +Global + 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b/branches/IS_capture/VCProj/bsr_trunk.vcproj.NCL.N2232.user @@ -0,0 +1,65 @@ + + + + + + + + + + + diff --git a/branches/IS_capture/VCProj/bsr_trunk.vcxproj b/branches/IS_capture/VCProj/bsr_trunk.vcxproj new file mode 100644 index 0000000..3fe99ad --- /dev/null +++ b/branches/IS_capture/VCProj/bsr_trunk.vcxproj @@ -0,0 +1,161 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + + {9DF31AC3-BD19-4158-BD6F-9CFE64AEE5D2} + bsr_trunk + + + + Application + MultiByte + true + + + Application + MultiByte + + + + + + + + + + + + + <_ProjectFileVersion>10.0.30319.1 + $(SolutionDir)$(Configuration)\ + $(Configuration)\ + nmake -f yav_mcu_bsr.mak + + + + $(NMakePreprocessorDefinitions) + $(NMakeIncludeSearchPath) + $(NMakeForcedIncludes) + $(NMakeAssemblySearchPath) + $(NMakeForcedUsingAssemblies) + $(SolutionDir)$(Configuration)\ + $(Configuration)\ + C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r;$(IncludePath) + + + + MaxSpeed + true + MultiThreadedDLL + true + Level3 + ProgramDatabase + + + true + true + true + MachineX86 + + + + + _MBCS;%(PreprocessorDefinitions); + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/branches/IS_capture/VCProj/bsr_trunk.vcxproj.filters b/branches/IS_capture/VCProj/bsr_trunk.vcxproj.filters new file mode 100644 index 0000000..d168232 --- /dev/null +++ b/branches/IS_capture/VCProj/bsr_trunk.vcxproj.filters @@ -0,0 +1,258 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav + + + {4e2142a2-478d-4e47-ab3f-7ae7d1e531bd} + + + {3bd01c87-17d0-4cf4-93a8-fb6bde3060a4} + + + + + + ソース ファイル\renge + + + ソース ファイル\renge + + + + + ソース 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+ + ヘッダー ファイル + + + ヘッダー ファイル + + + ヘッダー ファイル + + + ヘッダー ファイル + + + ソース ファイル\renge + + + ソース ファイル\renge + + + ソース ファイル\renge + + + ソース ファイル\renge + + + ヘッダー ファイル\sim + + + ヘッダー ファイル\sim + + + \ No newline at end of file diff --git a/branches/IS_capture/VCProj/bsr_trunk.vcxproj.user b/branches/IS_capture/VCProj/bsr_trunk.vcxproj.user new file mode 100644 index 0000000..695b5c7 --- /dev/null +++ b/branches/IS_capture/VCProj/bsr_trunk.vcxproj.user @@ -0,0 +1,3 @@ + + + \ No newline at end of file diff --git a/branches/IS_capture/WDT.c b/branches/IS_capture/WDT.c new file mode 100644 index 0000000..ed3daf3 --- /dev/null +++ b/branches/IS_capture/WDT.c @@ -0,0 +1,12 @@ +/* ======================================================== + wdt + + $Id$ + ======================================================== */ +#include "incs_loader.h" + +/* + + gAwb_Ƀ}N̂݁B + +*/ diff --git a/branches/IS_capture/WDT.h b/branches/IS_capture/WDT.h new file mode 100644 index 0000000..2e28e9d --- /dev/null +++ b/branches/IS_capture/WDT.h @@ -0,0 +1,20 @@ +#ifndef _WDT_ +#define _WDT_ + + + +//========================================================= +#define WDT_RESTART_MAGIC 0xAC + + + +//========================================================= +// EHb`hbO^C}̃X^[g +// void WDT_Restart( void ); +#define WDT_Restart() WDTE = WDT_RESTART_MAGIC + +// KlȊOƗOŃZbg +#define mcu_wdt_reset WDTE = 0x0 + + +#endif diff --git a/branches/IS_capture/accero.c b/branches/IS_capture/accero.c new file mode 100644 index 0000000..aa584ec --- /dev/null +++ b/branches/IS_capture/accero.c @@ -0,0 +1,274 @@ +/* ======================================================== +@xZT֌W +Ef[^XVŃf[^zグ背WX^XVACPUɊ荞 +EtOĂΕJEg +ExZT荞݂^XNo^ĉBiI2C̋Ȃǂ̂Łj + + $Id: accero.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP +#pragma ROT +// rorb, rolb, rorw, rolw +#pragma MUL +#pragma BCD + +#endif + +#ifndef _WIN32 + +#pragma interrupt INTP23 intp23_ACC_ready RB3 // xZTAf[^ + +#endif + +#include "incs.h" +#include "accero.h" +#include "i2c_mcu.h" + + +#ifndef _WIN32 +#include +#endif +// ======================================================== +// WX^ +#define ACC_REG_WHOAMI 0x0F +#define ACC_REG_CTRL1 0x20 +#define ACC_REG_CTRL5 0x24 +#define ACC_REG_X 0x28 + +#define ACC_REG_FLG_BURST_ACCESS 0x80 + +// rbgʒu +#define ACC_bP_PM0 5 +#define ACC_bP_DR0 3 + +// rbgݒl +#define ACC_BITS_PM_PDN 0 +#define ACC_BITS_PM_NORM 1 +#define ACC_BITS_PM_LP0R5 2 +#define ACC_BITS_PM_LP1 3 +#define ACC_BITS_PM_LP2 4 +#define ACC_BITS_PM_LP5 5 +#define ACC_BITS_PM_LP10 6 + +#define ACC_BITS_DR_50Hz 0 +#define ACC_BITS_DR_100Hz 1 +#define ACC_BITS_DR_400Hz 2 +#define ACC_BITS_DR_1000Hz 3 + +#define ACC_BITS_ALL_AXIS_ON 7 + + +#define VREG_BITMASK_ACC_CONF_ACQ ( 1 << 0 ) +#define VREG_BITMASK_ACC_CONF_HOSU ( 1 << 1 ) + + + +// ======================================================== +#define ACC_RAW_DATA_SIZE 6 + + +// ======================================================== +static u8 acc_retry_count; // xZTǂݏoAG[ƂgCB񐔐 + + + +// ======================================================== +task_status tsk_soft_int( ); + + + +/********************************************//** +@E荞݂mFăf[^zグAWX^ɏo܂ + + E{ł΃R[obN֐o^Ă΂ƂȂ̂łA + I2CgpHƂlƎł͂܂łłȂ̂łB + + EvƂł + ***********************************************/ +task_status_immed tski_cbk_accero( ) +{ // i^jisro^܂ + u8 acc_dat_buff[ ACC_RAW_DATA_SIZE ]; + + // xZTf[^WX^ւ̔f + if( iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | ACC_REG_FLG_BURST_ACCESS ), ACC_RAW_DATA_SIZE, acc_dat_buff ) + != ERR_SUCCESS ) + { + // SLA NAK // + if( acc_retry_count < 4 ) + { + acc_retry_count ++; + // gC + return( TSKI_CONTINUE ); + } + else + { + // xZTُɂȂ̂Ŏ~߂ + vreg_stop_acc; + tski_acc_setup(); + vreg_set_acc_error; + return ( TSKI_FINISHED ); // ^XN̍폜͕Kv + } + } + else + { + // 펞pX // + DI_wt_chk(); + memcpy( &vreg_ctr[VREG_C_ACC_XL], acc_dat_buff, ACC_RAW_DATA_SIZE ); + EI(); + + acc_retry_count = 0; + // xXV荞 + if( is_acc_on && ( system_status.pwr_state == ON )) + { + set_irq( VREG_C_IRQ1, REG_BIT_ACC_DAT_RDY ); + // S~f[^̃Jǂ + if( ACC_VALID ) + { + u8 temp[ACC_RAW_DATA_SIZE]; + iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | ACC_REG_FLG_BURST_ACCESS ), ACC_RAW_DATA_SIZE, temp ); + } + } + if( (( system_status.pwr_state == ON )||( system_status.pwr_state == SLEEP )) + &&( is_pedo_on ) + ) + { + pedometer(); // v + } + } + return ( TSKI_FINISHED ); +} + + + + + +/********************************************//** +@xZT߃ANZX@[h + ***********************************************/ +task_status_immed tski_acc_read( ) +{ + vreg_ctr[VREG_C_ACC_W_BUF] = iic_mcu_read_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_R_ADRS] ); + set_irq( VREG_C_IRQ1, REG_BIT_ACC_ACK ); + return ( TSKI_FINISHED ); +} + + + +/********************************************//** +@xZT߃ANZX@Cg + ***********************************************/ +task_status_immed tski_acc_write( ) +{ + iic_mcu_write_a_byte( IIC_SLA_ACCEL, vreg_ctr[VREG_C_ACC_W_ADRS], vreg_ctr[VREG_C_ACC_W_BUF] ); + set_irq( VREG_C_IRQ1, REG_BIT_ACC_ACK ); + return ( TSKI_FINISHED ); +} + + + +/********************************************//** +@xZT̐ݒ + ***********************************************/ +task_status_immed tski_acc_setup( ) +{ + + // x on/offݒ肷 + u8 str_send_buf[4]; + + str_send_buf[1] = 0x00; // ctrl2 HPF:normal, filterd, HPF for IRQ : dis/dis, HPF coeff:norm + + // sŝ߁ATSƂȊOiHႢjʂĐݒ + if( system_status.model == MODEL_TS_BOARD ) + { + str_send_buf[2] = bits8(0,0,0,0, 0,0,1,0); + } + else + { + str_send_buf[2] = bits8(0,0,0,1, 0,0,0,0); + } + str_send_buf[3] = 0x80; // ctrl3 block update:enable, MSB first, scale: +-2G(default), selftest: dis + + { + u8 acc_setting_sent = ( vreg_ctr[VREG_C_ACC_CONFIG] & ( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ )); + + if( acc_setting_sent == 0 ) + { + // S~ + PMK23 = 1; + str_send_buf[0] = + ( ACC_BITS_PM_PDN << ACC_bP_PM0 | 0 << ACC_bP_DR0 | ACC_BITS_ALL_AXIS_ON ); + } + else + { + // on 100Hz 荞 + PMK23 = 0; + str_send_buf[0] = + ( ACC_BITS_PM_NORM << ACC_bP_PM0 + | ACC_BITS_DR_100Hz << ACC_bP_DR0 + | ACC_BITS_ALL_AXIS_ON ); + } + + // ݌AʐMłtOXV + if( iic_mcu_write( IIC_SLA_ACCEL, ( ACC_REG_CTRL1 | ACC_REG_FLG_BURST_ACCESS ), 4, str_send_buf ) == I2C_ERR_NOSLAVE ) + { + // ZTB^XN͍폜ȂĂ͂ȂȂB + vreg_set_acc_error; + return ( TSKI_FINISHED ); + // ܂ + } + // else + + // ZTݒ萬 pX + vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_ACCERO_ERR; + acc_retry_count = 0; + + // ÕS~L΃Jǂ + if( ACC_VALID ) + { + if( system_status.pwr_state == ON ) + { + u8 temp[ACC_RAW_DATA_SIZE]; + iic_mcu_read( IIC_SLA_ACCEL, ( ACC_REG_X | ACC_REG_FLG_BURST_ACCESS ), 6, temp ); + } + } + + // ZTɏɂĂŒSoC܂Ă܂Ȃ + DI_wt_chk(); + if( acc_setting_sent != ( vreg_ctr[VREG_C_ACC_CONFIG] & ( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ ))) + { + // DIԂ̂܂܋A + return ( TSKI_CONTINUE ); // ƊԂčēxɂ // Ƃ悢H + } + } + + // DIԂ̂܂܋A + return ( TSKI_FINISHED ); +} + + + +/********************************************//** + xZT荞 + + I2CgpȂ̂ŁAǂݏo^XN̓o^ŝ + ***********************************************/ +__interrupt void intp23_ACC_ready( ) +{ + EI(); + if( ( vreg_ctr[VREG_C_ACC_CONFIG] & ( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ ) ) != 0x00 ) + { + // xZT on + if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) ) + { +// if( ACC_VALID ) // mFsv + { + renge_task_immed_add( tski_cbk_accero ); + } + } + } +} diff --git a/branches/IS_capture/accero.h b/branches/IS_capture/accero.h new file mode 100644 index 0000000..fbf80d6 --- /dev/null +++ b/branches/IS_capture/accero.h @@ -0,0 +1,14 @@ +#ifndef _accero_ +#define _accero_ + + +#include "jhl_defs.h" +#include "pedometer.h" + + +/////////////////////////////////////////////////////////// +task_status_immed tski_cbk_accero( ); +task_status_immed tski_acc_setup( ); + + +#endif diff --git a/branches/IS_capture/adc.c b/branches/IS_capture/adc.c new file mode 100644 index 0000000..94920c7 --- /dev/null +++ b/branches/IS_capture/adc.c @@ -0,0 +1,475 @@ +/* ======================================================== + adc.c + + cJZ + nintendo + '09 Apr + $Id$ + ======================================================== */ +#include "incs.h" +#include "adc.h" +#include "pm.h" + +#include "led.h" + +#include "vreg_twl.h" +#include "i2c_mcu.h" + + +// ===================================================== // +static bit adc_updated; +static bit vol_changed_by_ctr; +bit vol_changed_by_twl; +static u8 vol_old; + +static u8 adc_raw_vol; +static u8 adc_raw_dep; + +u8 vol_polling; +u8 vol_level_twl; + +extern const u8 slider_to_codec[]; + + + +// ===================================================== // +typedef struct filter_work +{ + u8* value_used; + s8 diffs; // KIKAN̕΂ + s8 kikan; + u8 large_diff_count; +}filter_work; + + +static filter_work work_vr_3d = { + &vreg_ctr[ VREG_C_3D ] + // ͕̂slł悵Bconstɂ_ + }; + + +static u8 vol_data_ctr; +static u8 vol_data_ctr_tmp; +static filter_work work_vr_vol = { + &vol_data_ctr_tmp + // ͕̂slł悵Bconstɂ_ + }; + + +// twl 8iKvol̃jAl̋E +/* + twl32 -> 8 e[u + 0`1,`4,`8,`13,`18,`23,`28,31 + */ +static const u8 TWL_VOL_BOUNDARY[] = { + 1, 4, 8, 13, 18, 23, 28, 31 +}; + +// ===================================================== // +extern void nop8(); +static void adc_filter( u8 new_val, filter_work* work ); +static u8 adc_scaling( u8 ); +static void update_twl_vol( u8 sent_index ); + + + +// ===================================================== // +#define INTERVAL_TSK_ADC 15 + + + +/********************************************//** + ADCݒƁAJn + + ȉ̃s͎ɂőEĎ܂B + - BT_TEMP,_P + - ADIN1 + - VOL + + ***********************************************/ +void tsk_adc( ) +{ + if( adc_updated ) + { + adc_updated = false; + + // 3D ///////////////////////////////////////// + vreg_ctr[ VREG_C_3D ] = adc_raw_dep; // l + + // Volume ///////////////////////////////////// + { + vreg_ctr[ VREG_C_VOL_ADC_RAW ] = adc_raw_vol; + + adc_filter( adc_scaling( adc_raw_vol ), &work_vr_vol ); // ʂ*work_vr_volwvol_data_ctr ǂ݂ɂ... + vol_data_ctr = vol_data_ctr_tmp / 4; + + if( vol_old != vol_data_ctr ) + { + vol_changed_by_ctr = true; + vol_old = vol_data_ctr; + vol_polling = 3; +// renge_task_immed_add( tski_vol_update ); œo^ + } + } + + // obe /////////////////////////// + /* Ă΂܂ */ + } + + // YꂪƂȂ̂Ń|[O orz + if( vol_polling < 5 ) + { + renge_task_immed_add( tski_vol_update ); + vol_polling = (u8)(200 / SYS_INTERVAL_TICK) + 5; // 5/sec + } + vol_polling --; + + + ADCEN = 1; + ADM = bits8(0,0,0,0, 1,0,1,1); // ZNg[hAAfCLK/6 // + + ADPC = 0x06; // ADC|[g̃ZNg + ADS = ADC_SEL_3D; + nop8(); + ADCS = 1; // ADJnB // ܂Ł@@܂ł1us=8clkȏJ + + ADIF = 0; + ADMK = 0; +} + + + +/********************************************//** + vol݂̃XC_̈ʒuɋXV + ***********************************************/ +void vol_reset() +{ + vol_old = vol_data_ctr; + vreg_ctr[ VREG_C_SND_VOL ] = vol_data_ctr; // 64i +} + + +/********************************************//** +@VolXV܂B + + @Ȏɓo^܂B + + - [U[VolXC_𓮂 + - HorizonɋXVwꂽ@icodecZbgj + - TWLAvVol + ***********************************************/ +task_status_immed tski_vol_update() +{ + static u8 sent_index, sent_index_twl; + static bit last_modifyer_is_twl; // false = ctr + + if( !( system_status.pwr_state == ON ) || + ( system_status.pwr_state == SLEEP )){ + return( TSKI_FINISHED ); + } + + // ǂ̉ʂɂ́H // + if( vol_changed_by_ctr ) + { + // XC_ + vol_changed_by_ctr = false; + last_modifyer_is_twl = false; + sent_index = vol_data_ctr; + } + else if( vol_changed_by_twl ) + { + // TWLAv + vol_changed_by_twl = false; + last_modifyer_is_twl = true; + if( vreg_twl[ REG_TWL_INT_ADRS_VOL ] == 0 ) + { + sent_index_twl = 0; + } + else + { + sent_index_twl = vreg_twl[ REG_TWL_INT_ADRS_VOL ] *2 +1; + } + sent_index = sent_index_twl; + } + else + { + // force_slider0ɂƂ & ܂Ƃ + // XC_TWL̍ŌɃZbgZbg + if( last_modifyer_is_twl ) + { + sent_index = sent_index_twl; + } + else + { + sent_index = vol_data_ctr; + } + } + + // WX^̍XV // + vreg_ctr[ VREG_C_SND_VOL ] = sent_index; + + // twlXV + update_twl_vol( sent_index ); + + // codecɓ` + /// lł + iic_mcu_write_a_byte_codec( CODEC_REG_VOL, slider_to_codec[ sent_index ] ); + + // set_irq( VREG_C_IRQ0, REG_BIT_VR_SNDVOL_CHANGE ); // 荞ݔp~ + return( TSKI_FINISHED ); +} + + +/********************************************//** + TWL ։ʂʒmB + + iKႤ̂ŁÃPAs + ***********************************************/ +static void update_twl_vol( u8 sent_index ) +{ + // XP[O + if( sent_index == 0 ) + { + vreg_twl[ REG_TWL_INT_ADRS_VOL ] = 0; + } + else if( sent_index <= 4 ) + { + vreg_twl[ REG_TWL_INT_ADRS_VOL ] = 2; // P̓~bVOŐ + } + else + { + vreg_twl[ REG_TWL_INT_ADRS_VOL ] = sent_index/2 ; + } + + // 8iK̃xB@荞݂̂ɕKv + { + static u8 vol_twl_old; + + if( vol_twl_old != vreg_twl[ REG_TWL_INT_ADRS_VOL ] ) + { + // 8ixɕϊ + u8 new_level = 31; + u8 i; + + vol_twl_old = vreg_twl[ REG_TWL_INT_ADRS_VOL ]; + + for( i=0; i<=7; i++ ) + { + if( vreg_twl[ REG_TWL_INT_ADRS_VOL ] <= TWL_VOL_BOUNDARY[ i ] ) + { + new_level = i; + break; + } + } + vol_level_twl = new_level; + } + } +} + + + +/********************************************//** +@ADC isr + +@}`vNT̏Ԃ`FbNĂׂ֓]A + +@OŎ̃`lN + +@@ʂI~߂ + ***********************************************/ +__interrupt void int_adc( ) +{ + volatile u8 adc_data = ADCRH; + + switch ( ADS ) + { +/* + case ( ADC_SEL_AMB_BRIT ): + // ‹邳 // + vreg_ctr[ VREG_C_AMBIENT_BRIGHTNESS ] = adc_data; + break; +*/ + + case ( ADC_SEL_3D ): + // 3D{[ // + EI(); + adc_raw_dep = adc_data; + break; + + case ( ADC_SEL_VOL ): + // ʃXC_ // + EI(); + if( system_status.model == MODEL_TS_BOARD ) + { + adc_raw_vol = adc_data; + } + else + { + adc_raw_vol = 255 - adc_data; + } + + break; + + case ( ADC_SEL_BATT_TEMP ): + // obex // + EI(); +#ifdef _ENABLE_HAL_ + if( vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ] == 0xFF ) // HAL +#else + if( 1 ) +#endif + { + raw_adc_temperature = adc_data; + } + else + { + raw_adc_temperature = vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ]; + } + + if(// (( vreg_ctr[ VREG_C_STATUS_1 ] & REG_BIT_MGIC_ERR ) == 0 ) && + (( system_status.pwr_state == ON ) || + ( system_status.pwr_state == SLEEP ) + ) + ) + { + renge_task_immed_add( tski_BT_temp_update ); + } + break; + +/* Ă΂܂ + case ( ADC_SEL_BATT_DET ): + // obe[J[ // + break; +*/ + } + +// Ƃ܂Ƃȏ肻 + if( ADS < ADC_SEL_BATT_DET ) + { + ADS += 1; // ̃`l + } + else + { + ADCEN = 0; // ~߂Ă܂ + adc_updated = true; + } + ADIF = 0; // ȂƁAÕ`l̃f[^̊ŒɊ荞މ”\ +} + + + +/********************************************//** + adcWX^ǂݏoÂ܂ܕԒlɂB + + tsk_adcƋ邱ƂlĂ܂B + ***********************************************/ +u8 get_adc( u8 ch ) +{ + u8 temp; + + ADMK = 1; + ADIF = 0; + + ADCEN = 1; + ADM = bits8(0,0,0,0, 1,0,1,1); // ZNg[hAAfCLK/6 ///火 + + ADPC = 0x06; // ADC|[g̃ZNg + ADS = ch; + + nop8(); + + ADCS = 1; // ADJnB /// ܂Ł@ɁA1usȏJ + + ADIF = 0; + while( ADIF == 0 ){;} + temp = ADCRH; + ADCEN = 0; + + ADMK = 0; + return ( temp ); +} + + + + + +/********************************************//** + VR̉“͈͂lăXP[O + + Volp@g񂷂Ȃ炻̂Ƃǂɂ + ***********************************************/ +static u8 adc_scaling( u8 orig_val ) +{ + u16 temp; + + if( orig_val <= vreg_ctr[ VREG_C_VOL_CAL_MIN ] ) + { + return( 0 ); + } + if( orig_val >= vreg_ctr[ VREG_C_VOL_CAL_MAX ] ) + { + return( 255 ); + } + + temp = (u16)(( orig_val - vreg_ctr[ VREG_C_VOL_CAL_MIN ] ) * 256 ) / ( vreg_ctr[ VREG_C_VOL_CAL_MAX ] - vreg_ctr[ VREG_C_VOL_CAL_MIN ] ); + if( temp > 255 ) + { + temp = 255; + } + + return( (u8)( temp & 0xFF ) ); +} + + + + +/********************************************//** + qXeVX V2 + + ľܓIȓ܂ + ***********************************************/ +#define KIKAN 16 +static void adc_filter( u8 new_val, filter_work *work ) +{ + if( abs( new_val - *( work -> value_used )) > 2 ) + { + // 傫ꂽ + work -> large_diff_count ++; + if( work -> large_diff_count > 16 ) + { + *( work -> value_used ) = new_val; + work -> diffs = 0; + work -> kikan = KIKAN; + } + } + else + { + work -> large_diff_count = 0; + // ߏ̒lłAԂłς΂Ă炻Ɋ񂹂 + if( *( work -> value_used ) < new_val ) + { + work -> diffs ++; + } + else if( *( work -> value_used ) > new_val ) + { + work -> diffs --; + } + + if( --( work -> kikan ) == 0 ) + { + if( ( work -> diffs ) == KIKAN ) +// if( ( work -> diffs ) > (s8)( KIKAN * 0.8 ) ) + { + *( work -> value_used ) = *( work -> value_used ) + 1; + } + else if( ( work -> diffs ) == ( -1 * KIKAN ) ) +// else if( ( work -> diffs ) < (s8)( -1 * KIKAN * 0.8 ) ) + { + *( work -> value_used ) = *( work -> value_used ) - 1; + } + work -> diffs = 0; + work -> kikan = KIKAN; + } + } +} + diff --git a/branches/IS_capture/adc.h b/branches/IS_capture/adc.h new file mode 100644 index 0000000..6f4ad04 --- /dev/null +++ b/branches/IS_capture/adc.h @@ -0,0 +1,48 @@ +#ifndef __adc__ +#define __adc__ + +#include "jhl_defs.h" + +/////////////////////////////////////// +// ANI2 P22 +#define ADC_SEL_AMB_BRIT 0x02 + +/* +// ANI3 P23 +#define ADC_SEL_GYRO_YAW 0x03 +// ANI4 P24 +#define ADC_SEL_GYRO_PITCH 0x04 +// ANI5 P25 +#define ADC_SEL_GYRO_ROLL 0x05 +*/ + +// ANI6 P26 +#define ADC_SEL_3D 0x06 +// ANI7 P27 +#define ADC_SEL_VOL 0x07 + +// ANI8 P150 +#define ADC_SEL_BATT_TEMP 0x08 +// ANI9 P151 +#define ADC_SEL_BATT_DET 0x09 + + + +/////////////////////////////////////// +#define CODEC_REG_VOL 0x13 + + + +/////////////////////////////////////// +extern u8 vol_polling; +extern u8 vol_level_twl; + + + +/////////////////////////////////////// +u8 get_adc( u8 ch ); +void vol_reset(); + + + +#endif diff --git a/branches/IS_capture/batt_params.c b/branches/IS_capture/batt_params.c new file mode 100644 index 0000000..b427620 --- /dev/null +++ b/branches/IS_capture/batt_params.c @@ -0,0 +1,130 @@ +/* ======================================================== + eЃobe[p[^ + $Id: asdf$ + ======================================================== */ +#include "jhl_defs.h" + +#include "batt_params.h" + + +const bt_param_ bt_param[ /*_BT_PARAM_NUM_*/ ] = // drg񂷂̂ f~drp[^ +{ + // ctr //////////////////////////////////////////////// + // BT_PARAM_CTR_MAXELL + { + { + 0xAE, 0xF0, 0xB4, 0x30, 0xB7, 0x40, 0xBA, 0x30, + 0xBB, 0x50, 0xBB, 0xB0, 0xBC, 0x50, 0xBD, 0x10, + 0xBD, 0x60, 0xBD, 0xB0, 0xBF, 0xE0, 0xC2, 0xB0, + 0xC4, 0x20, 0xC7, 0xB0, 0xCA, 0xE0, 0xCE, 0x10, + 0x01, 0xF0, 0x14, 0x10, 0x14, 0x20, 0x06, 0x30, + 0x63, 0x90, 0x49, 0x00, 0x6E, 0x00, 0x77, 0x70, + 0x7B, 0x00, 0x19, 0x00, 0x19, 0x00, 0x17, 0xF0, + 0x1C, 0x60, 0x12, 0x00, 0x12, 0x00, 0x12, 0x00 + }, + 2, // 2 = 19 bit mode + { 92, (u8)(-256* 0.79), (u8)(-256* 4.35) }, // @(u8)LXǧp[^̂܂܂̕ + 0xD800, // VXeƂĂ͗ǍDȓ + { 0xEA, 0xE8 } + }, + + // BT_PARAM_CTR_PANA + { + { + 0x8C, 0x30, 0x9C, 0x10, 0xA5, 0xE0, 0xB0, 0x40, + 0xB1, 0xC0, 0xB2, 0x00, 0xB2, 0x50, 0xB3, 0x10, + 0xB4, 0x90, 0xB6, 0x20, 0xB8, 0x60, 0xBA, 0x50, + 0xBF, 0xA0, 0xC6, 0xB0, 0xCE, 0x90, 0xD0, 0x20, + 0x00, 0x20, 0x00, 0x20, 0x00, 0x20, 0x00, 0x20, + 0x7B, 0x30, 0x68, 0x60, 0x20, 0x00, 0x17, 0x00, + 0x17, 0x30, 0x12, 0xF0, 0x0D, 0xE0, 0x07, 0xF0, + 0x07, 0x00, 0x09, 0x30, 0x01, 0xC0, 0x01, 0xC0 + }, + 1, + { 171, (u8)(-256* 1.00), (u8)(-256* 2.60) }, // @(u8)LXǧp[^̂܂܂̕ + 0xDA20, // VXeƂĂ͗ǍDȓ + { 0x69, 0x67 }, + }, + + // SPFL /////////////////////////////////////////////// + // BT_PARAM_SPFL_MAXELL + { + { + 0xA1, 0x20, 0xB7, 0x50, 0xB9, 0xD0, 0xBB, 0x00, + 0xBC, 0x30, 0xBC, 0x60, 0xBC, 0xA0, 0xBD, 0x10, + 0xBD, 0xC0, 0xBE, 0x70, 0xBF, 0xD0, 0xC2, 0xA0, + 0xC4, 0x00, 0xC8, 0x50, 0xCC, 0x80, 0xD0, 0xB0, + 0x01, 0xA0, 0x25, 0x10, 0x18, 0xB0, 0x17, 0xC0, + 0x95, 0x20, 0x6F, 0xE0, 0x7C, 0x60, 0x35, 0x10, + 0x35, 0x00, 0x37, 0xF0, 0x16, 0xF0, 0x1C, 0xA0, + 0x17, 0x30, 0x11, 0xD0, 0x11, 0xF0, 0x11, 0xF0 + }, + 2, + { 94, (-256* 0.35), (-256* 3.85) }, + 0xDAB0, + { 0xF5, 0xF3 } + }, + + // BT_PARAM_SPFL_PANA + { + { + 0x9C, 0xF0, 0xAD, 0x50, 0xAF, 0xB0, 0xB3, 0x00, + 0xB3, 0xE0, 0XB5, 0x60, 0XB6, 0x70, 0xB7, 0xA0, + 0xBA, 0x00, 0xBC, 0x00, 0xBE, 0x90, 0xC1, 0x60, + 0xC4, 0x00, 0xC7, 0x00, 0xCC, 0xA0, 0xD0, 0xA0, + 0x02, 0x00, 0x19, 0x10, 0x12, 0x00, 0x48, 0x10, + 0x25, 0x10, 0x41, 0xF0, 0x2F, 0xA0, 0x13, 0xF0, + 0x1C, 0xD0, 0x10, 0xD0, 0x0F, 0xA0, 0x11, 0x00, + 0x10, 0xE0, 0x0C, 0x10, 0x0C, 0x00, 0x0C, 0x00 + }, + 2, + { 113, (-256* 0.30), (-256* 2.25) }, + 0xDAA0, + { 0xE7, 0xE5 }, + }, + + // SNAKE ///////////////////////////////////////////// + // BT_PARAM_SNAKE_MAXELL + { + { + 0x9D, 0x80, 0xB7, 0xB0, 0xB8, 0xA0, 0xB9, 0xA0, + 0xBB, 0x40, 0xBC, 0x50, 0xBC, 0xA0, 0xBD, 0x00, + 0xBD, 0x90, 0xBF, 0x30, 0xC0, 0xE0, 0xC3, 0x30, + 0xC5, 0x40, 0xC7, 0x50, 0xCD, 0x40, 0xD0, 0xA0, + 0x01, 0x90, 0x35, 0x10, 0x2F, 0x30, 0x11, 0x00, + 0x29, 0x40, 0x88, 0x50, 0x71, 0xA0, 0x5F, 0xE0, + 0x32, 0xD0, 0x1C, 0xF0, 0x14, 0xF0, 0x1A, 0x80, + 0x1A, 0x80, 0x11, 0x10, 0x12, 0x00, 0x12, 0x00 + }, + 2, + { 86, (-256* 0.6), (-256* 3.675) }, // rcomp, r-hot, r-cold + 0xDAA0, // ocv + { 0xF5, 0xF3 } // compare max, min + }, + + // bt_PARAM_SNAKE_PANA '13 0422 Ē + { + { + 0x9D, 0x80, 0xA3, 0x60, 0xA9, 0x50, 0xAD, 0x90, + 0xAF, 0x60, 0xB1, 0x60, 0xB3, 0x70, 0xB4, 0xE0, + 0xB6, 0x20, 0xB7, 0xF0, 0xB9, 0xA0, 0xBC, 0xB0, + 0xBF, 0xB0, 0xC5, 0xB0, 0xCB, 0x90, 0xD1, 0x50, + 0x00, 0xC0, 0x03, 0x40, 0x06, 0x80, 0x18, 0x20, + 0x16, 0xA0, 0x16, 0x20, 0x30, 0x00, 0x34, 0xA0, + 0x27, 0xC0, 0x23, 0x40, 0x11, 0xC0, 0x0F, 0xE0, + 0x0F, 0xE0, 0x0E, 0xE0, 0x0C, 0x20, 0x0C, 0x20 + }, + 2, + { 89, (-256* 0.9), (-256* 2.5) }, + 56144, // 0xDB50 + { 232, 230 }, + } + + + // FLOWER ///////////////////////////////////////////// + // BCTR̃obe[gB + + // CLOSER ///////////////////////////////////////////// + // BSPFL̃obe[gB +}; + diff --git a/branches/IS_capture/batt_params.h b/branches/IS_capture/batt_params.h new file mode 100644 index 0000000..264bcb7 --- /dev/null +++ b/branches/IS_capture/batt_params.h @@ -0,0 +1,56 @@ +#ifndef _bt_params_h_ +#define _bt_params_h_ + +// $Id: asdf$ + +#include "jhl_defs.h" +/* + dr CTR | SPFL | YBS + 0 ID = 0 maxell + 120 1 + 360 2 + 750 @ 3 + 1.3k@ 4 + 2.7k 5 pana + 8.2k@ 6 +*/ + + +typedef enum +{ + BT_PARAM_CTR_MAXELL = 0, + BT_PARAM_CTR_PANA, + BT_PARAM_SPFL_MAXELL, + BT_PARAM_SPFL_PANA, + BT_PARAM_SNAKE_MAXELL, + BT_PARAM_SNAKE_PANA, + BT_PARAM_FLOWER_MAXELL, + BT_PARAM_FLOWER_PANA, + BT_PARAM_CLOSER_MAXELL, + BT_PARAM_CLOSER_PANA, + _BT_PARAM_NUM_ +} BT_TYPE; + +typedef struct +{ + u8 rcomp; + s16 up,down; +} rcomp_; + +typedef struct +{ + u8 hi; + u8 low; +} verify_; + +typedef struct +{ + u8 mg_param[64]; + u8 v_scale; + rcomp_ rcomp; + u16 ocv; + verify_ verify; +} bt_param_; + + +#endif diff --git a/branches/IS_capture/bsr.hex b/branches/IS_capture/bsr.hex new file mode 100644 index 0000000..082a31c --- /dev/null +++ b/branches/IS_capture/bsr.hex @@ -0,0 +1,1013 @@ +:02000000650D8C +:040010003C483E48E2 +:02001C00EA49AF +:02002400914AFF +:02002A00DC4AAE +:08003400094CAC4B054C4A4E8F +:02004A0040482C +:02005A007A48E2 +:02006200084E46 +:060080009D4CD64C204D02 +:0400C0007EFBFF04C0 +:0A00C4001B339499E033F240BFAA09 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zKd}sZEHFnwLh=*K{gWm>p<*t(J%V(UD`Ncz3kuazp_O(w;9-FdrwnC|gl7xYOjjXU z`7XbsMXGzU0n`gAfY~(}IHGeY7grtuDbdxNh8sjb0| sp;*1Bnw=5Qj6oUojuwP2Sc{-9H=^azfoUXMA^tEW*qt=C_{};050Kb+J^%m! literal 0 HcmV?d00001 diff --git a/branches/IS_capture/bsr_k0r.map b/branches/IS_capture/bsr_k0r.map new file mode 100644 index 0000000..2f4695f --- /dev/null +++ b/branches/IS_capture/bsr_k0r.map @@ -0,0 +1,896 @@ + + + +78K0R Linker W1.33 Date:27 Feb 2013 Page: 1 + +Command: -yC:\Program Files (x86)\NEC Electronics Tools\DEV -_msgoff - + obsr.lmf ..\..\..\Program Files (x86)\NEC Electronics Tools\C + C78K0R\W2.13\lib78k0r\s0rm.rel -gi1B339499E033F240BFAAh -pbsr + _k0r.map -nkd -gb7EFBFFh -bC:\Program Files (x86)\NEC Electro + nics Tools\CC78K0R\W2.13\lib78k0r\fsl.lib -bcl0rdm.lib -bcl0r + m.lib -bcl0rmf.lib -iC:\Program Files (x86)\NEC Electronics T + ools\CC78K0R\W2.13\lib78k0r -dbsr_mcu.dr -s -w2 loader.rel pm + .rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_t + wl.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel adc.rel reng + e.rel accero.rel self_flash.rel sw.rel task_debug.rel task_mi + sc.rel task_sys.rel pedo_alg_thre_det2.rel ini_VECT.rel task_ + status.rel led_cam.rel led_pow.rel hal.rel batt_params.rel vo + ltable.rel pedo_lpf_coeff.rel kanaria.rel kanaria_c.rel get_e + i.rel util_funcs.rel i2c_mcu-sub.rel +Para-file: +Out-file: bsr.lmf +Map-file: bsr_k0r.map +Direc-file:bsr_mcu.dr + + +*** Link information *** + + 73 output segment(s) + 3E28H byte(s) real data + 6406 symbol(s) defined + + +*** Memory map *** + + + SPACE=REGULAR + + MEMORY=BCL0 + BASE ADDRESS=00000H SIZE=01000H + OUTPUT INPUT INPUT BASE SIZE + SEGMENT SEGMENT MODULE ADDRESS + @@VECT00 00000H 00002H CSEG AT + @@VECT00 @cstart 00000H 00002H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL loader 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL WDT 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL i2c_mcu 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL i2c_twl 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL self_flash + 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL task_debug + 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL task_status + 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL hal 00002H 00000H + LDR_CNSL 00002H 00000H CSEG PAGE64KP + LDR_CNSL util_funcs + 00002H 00000H +* gap * 00002H 0000EH + @@VECT10 00010H 00004H CSEG AT + @@VECT10 ini_VECT 00010H 00004H +* gap * 00014H 00008H + @@VECT1C 0001CH 00002H CSEG AT + @@VECT1C ini_VECT 0001CH 00002H +* gap * 0001EH 00006H + @@VECT24 00024H 00002H CSEG AT + @@VECT24 ini_VECT 00024H 00002H +* gap * 00026H 00004H + @@VECT2A 0002AH 00002H CSEG AT + @@VECT2A i2c_twl 0002AH 00002H +* gap * 0002CH 00008H + @@VECT34 00034H 00008H CSEG AT + @@VECT34 ini_VECT 00034H 00008H +* gap * 0003CH 0000EH + @@VECT4A 0004AH 00002H CSEG AT + @@VECT4A ini_VECT 0004AH 00002H +* gap * 0004CH 0000EH + @@VECT5A 0005AH 00002H CSEG AT + @@VECT5A i2c_ctr 0005AH 00002H +* gap * 0005CH 00006H + @@VECT62 00062H 00002H CSEG AT + @@VECT62 accero 00062H 00002H +* gap * 00064H 0001CH + @@CALT 00080H 00006H CSEG CALLT0 + @@CALT @cstart 00080H 00000H + @@CALT loader 00080H 00000H + @@CALT pm 00080H 00000H + @@CALT i2c_ctr 00080H 00000H + @@CALT main 00080H 00000H + @@CALT magic 00080H 00000H + @@CALT WDT 00080H 00000H + @@CALT i2c_mcu 00080H 00000H + @@CALT i2c_twl 00080H 00000H + @@CALT led 00080H 00000H + @@CALT rtc 00080H 00000H + @@CALT vreg_ctr 00080H 00000H + @@CALT vreg_twl 00080H 00000H + @@CALT adc 00080H 00000H + @@CALT renge 00080H 00006H + @@CALT accero 00086H 00000H + @@CALT self_flash + 00086H 00000H + @@CALT sw 00086H 00000H + @@CALT task_debug + 00086H 00000H + @@CALT task_misc + 00086H 00000H + @@CALT task_sys 00086H 00000H + @@CALT pedo_alg_thre_det2 + 00086H 00000H + @@CALT ini_VECT 00086H 00000H + @@CALT task_status + 00086H 00000H + @@CALT led_cam 00086H 00000H + @@CALT led_pow 00086H 00000H + @@CALT hal 00086H 00000H + @@CALT batt_params + 00086H 00000H + @@CALT voltable 00086H 00000H + @@CALT pedo_lpf_coeff + 00086H 00000H + @@CALT kanaria_c + 00086H 00000H + @@CALT util_funcs + 00086H 00000H + @@CALT i2c_mcu-sub + 00086H 00000H +* gap * 00086H 0003AH + ?CSEGOB0 000C0H 00004H CSEG OPT_BYTE + @@CODE 000C4H 00000H CSEG BASE + @@CODE magic 000C4H 00000H + @@CODE ini_VECT 000C4H 00000H + @@CODE batt_params + 000C4H 00000H + LDR_CODL 000C4H 00000H CSEG + LDR_CODL loader 000C4H 00000H + LDR_CODL WDT 000C4H 00000H + LDR_CODL i2c_mcu 000C4H 00000H + LDR_CODL i2c_twl 000C4H 00000H + LDR_CODL self_flash + 000C4H 00000H + LDR_CODL task_debug + 000C4H 00000H + LDR_CODL task_status + 000C4H 00000H + LDR_CODL hal 000C4H 00000H + LDR_CODL util_funcs + 000C4H 00000H + ?CSEGSI 000C4H 0000AH CSEG + LDR_CODE 000CEH 00975H CSEG + LDR_CODE loader 000CEH 0019AH + LDR_CODE WDT 00268H 00000H + LDR_CODE i2c_mcu 00268H 0029BH + LDR_CODE i2c_twl 00503H 0005BH + LDR_CODE self_flash + 0055EH 00370H + LDR_CODE task_debug + 008CEH 00000H + LDR_CODE task_status + 008CEH 00075H + LDR_CODE hal 00943H 000DCH + LDR_CODE util_funcs + 00A1FH 00024H + FSL_CODE 00A43H 00322H CSEG + FSL_CODE fsl_block_cmd + 00A43H 0002BH + FSL_CODE fsl_block_check + 00A6EH 00013H + FSL_CODE fsl_common + 00A81H 0014FH + FSL_CODE fsl_reset + 00BD0H 00001H + FSL_CODE fsl_si_ibf + 00BD1H 00064H + FSL_CODE fsl_phySwap + 00C35H 0004DH + FSL_CODE fsl_si_common + 00C82H 00061H + FSL_CODE fsl_swap 00CE3H 00030H + FSL_CODE fsl_write + 00D13H 00052H + @@LCODE 00D65H 00277H CSEG + @@LCODE @cstart 00D65H 0006DH + @@LCODE @imul 00DD2H 00011H + @@LCODE @lumul 00DE3H 0002BH + @@LCODE @isdiv 00E0EH 00022H + @@LCODE @iudiv 00E30H 0002DH + @@LCODE @isrem 00E5DH 00021H + @@LCODE @iurem 00E7EH 0002FH + @@LCODE @lsdiv 00EADH 00039H + @@LCODE @ludiv 00EE6H 0003FH + @@LCODE @divuw 00F25H 00034H + @@LCODE @ladd 00F59H 0000FH + @@LCODE @llsh 00F68H 0001BH + @@LCODE @lursh 00F83H 0001FH + @@LCODE @iscmp 00FA2H 0000CH + @@LCODE @lband 00FAEH 00014H + @@LCODE @bcdtob 00FC2H 0001AH +* gap * 00FDCH 0001AH + MGC_LOAD 00FF6H 0000AH CSEG AT + MGC_LOAD magic 00FF6H 0000AH + + MEMORY=ROM + BASE ADDRESS=02000H SIZE=03000H + OUTPUT INPUT INPUT BASE SIZE + SEGMENT SEGMENT MODULE ADDRESS + MGC_MIMI 02000H 0000AH CSEG AT + MGC_MIMI magic 02000H 0000AH + @@CNST 0200AH 00282H CSEG + @@CNST @cstart 0200AH 00000H + @@CNST loader 0200AH 00000H + @@CNST pm 0200AH 00008H + @@CNST i2c_ctr 02012H 00000H + @@CNST main 02012H 00000H + @@CNST magic 02012H 00000H + @@CNST WDT 02012H 00000H + @@CNST i2c_mcu 02012H 00000H + @@CNST i2c_twl 02012H 00000H + @@CNST led 02012H 00000H + @@CNST rtc 02012H 00000H + @@CNST vreg_ctr 02012H 00000H + @@CNST vreg_twl 02012H 00000H + @@CNST adc 02012H 00008H + @@CNST renge 0201AH 00000H + @@CNST accero 0201AH 00000H + @@CNST self_flash + 0201AH 00002H + @@CNST sw 0201CH 00000H + @@CNST task_debug + 0201CH 00000H + @@CNST task_misc + 0201CH 00000H + @@CNST task_sys 0201CH 00000H + @@CNST pedo_alg_thre_det2 + 0201CH 00018H + @@CNST ini_VECT 02034H 00000H + @@CNST task_status + 02034H 00000H + @@CNST led_cam 02034H 00000H + @@CNST led_pow 02034H 00020H + @@CNST hal 02054H 00000H + @@CNST batt_params + 02054H 001C8H + @@CNST voltable 0221CH 00040H + @@CNST pedo_lpf_coeff + 0225CH 00030H + @@CNST kanaria_c + 0228CH 00000H + @@CNST util_funcs + 0228CH 00000H + @@CNST i2c_mcu-sub + 0228CH 00000H + ROM_CODE 0228CH 025B0H CSEG + ROM_CODE pm 0228CH 00A10H + ROM_CODE i2c_ctr 02C9CH 0005CH + ROM_CODE main 02CF8H 00055H + ROM_CODE led 02D4DH 00274H + ROM_CODE rtc 02FC1H 000E0H + ROM_CODE vreg_ctr 030A1H 00493H + ROM_CODE vreg_twl 03534H 000F9H + ROM_CODE adc 0362DH 00261H + ROM_CODE renge 0388EH 00018H + ROM_CODE accero 038A6H 00155H + ROM_CODE sw 039FBH 00131H + ROM_CODE task_misc + 03B2CH 001C1H + ROM_CODE task_sys 03CEDH 00380H + ROM_CODE pedo_alg_thre_det2 + 0406DH 004D4H + ROM_CODE led_cam 04541H 000C4H + ROM_CODE led_pow 04605H 0016FH + ROM_CODE voltable 04774H 00000H + ROM_CODE pedo_lpf_coeff + 04774H 00000H + ROM_CODE kanaria_c + 04774H 00006H + ROM_CODE get_ei 0477AH 0000DH + ROM_CODE i2c_mcu-sub + 04787H 000B5H + @@BASE 0483CH 00614H CSEG BASE + @@BASE loader 0483CH 00000H + @@BASE pm 0483CH 0003EH + @@BASE i2c_ctr 0487AH 00170H + @@BASE main 049EAH 00000H + @@BASE magic 049EAH 00000H + @@BASE WDT 049EAH 00000H + @@BASE i2c_mcu 049EAH 000F2H + @@BASE i2c_twl 04ADCH 000D0H + @@BASE led 04BACH 00000H + @@BASE rtc 04BACH 0005DH + @@BASE vreg_ctr 04C09H 00000H + @@BASE vreg_twl 04C09H 00000H + @@BASE adc 04C09H 00094H + @@BASE renge 04C9DH 0016BH + @@BASE accero 04E08H 00042H + @@BASE self_flash + 04E4AH 00000H + @@BASE sw 04E4AH 00000H + @@BASE task_debug + 04E4AH 00000H + @@BASE task_misc + 04E4AH 00000H + @@BASE task_sys 04E4AH 00000H + @@BASE pedo_alg_thre_det2 + 04E4AH 00000H + @@BASE ini_VECT 04E4AH 00006H + @@BASE task_status + 04E50H 00000H + @@BASE led_cam 04E50H 00000H + @@BASE led_pow 04E50H 00000H + @@BASE hal 04E50H 00000H + @@BASE batt_params + 04E50H 00000H + @@BASE voltable 04E50H 00000H + @@BASE pedo_lpf_coeff + 04E50H 00000H + @@BASE kanaria_c + 04E50H 00000H + @@BASE util_funcs + 04E50H 00000H + @@BASE i2c_mcu-sub + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL @cstart 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL pm 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL i2c_ctr 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL main 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL led 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL rtc 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL vreg_ctr 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL vreg_twl 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL adc 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL renge 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL accero 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL sw 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL task_misc + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL task_sys 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL pedo_alg_thre_det2 + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL ini_VECT 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL led_cam 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL led_pow 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL batt_params + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL voltable 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL pedo_lpf_coeff + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL kanaria_c + 04E50H 00000H + @@CNSTL 04E50H 00000H CSEG PAGE64KP + @@CNSTL i2c_mcu-sub + 04E50H 00000H + @@CNSTL 04E50H 0000AH CSEG PAGE64KP + @@CNSTL @bcdtob 04E50H 0000AH + @@R_INIT 04E5AH 0004AH CSEG UNIT64KP + @@R_INIT @cstart 04E5AH 00000H + @@R_INIT loader 04E5AH 00000H + @@R_INIT pm 04E5AH 00000H + @@R_INIT i2c_ctr 04E5AH 00000H + @@R_INIT main 04E5AH 00000H + @@R_INIT magic 04E5AH 00000H + @@R_INIT WDT 04E5AH 00000H + @@R_INIT i2c_mcu 04E5AH 00000H + @@R_INIT i2c_twl 04E5AH 00000H + @@R_INIT led 04E5AH 00000H + @@R_INIT rtc 04E5AH 00000H + @@R_INIT vreg_ctr 04E5AH 00000H + @@R_INIT vreg_twl 04E5AH 00000H + @@R_INIT adc 04E5AH 0000CH + @@R_INIT renge 04E66H 00014H + @@R_INIT accero 04E7AH 00000H + @@R_INIT self_flash + 04E7AH 00000H + @@R_INIT sw 04E7AH 00000H + @@R_INIT task_debug + 04E7AH 00000H + @@R_INIT task_misc + 04E7AH 00026H + @@R_INIT task_sys 04EA0H 00000H + @@R_INIT pedo_alg_thre_det2 + 04EA0H 00000H + @@R_INIT ini_VECT 04EA0H 00000H + @@R_INIT task_status + 04EA0H 00000H + @@R_INIT led_cam 04EA0H 00000H + @@R_INIT led_pow 04EA0H 00004H + @@R_INIT hal 04EA4H 00000H + @@R_INIT batt_params + 04EA4H 00000H + @@R_INIT voltable 04EA4H 00000H + @@R_INIT pedo_lpf_coeff + 04EA4H 00000H + @@R_INIT kanaria_c + 04EA4H 00000H + @@R_INIT util_funcs + 04EA4H 00000H + @@R_INIT i2c_mcu-sub + 04EA4H 00000H + @@R_INIT @rom 04EA4H 00000H + @@R_INIS 04EA4H 00010H CSEG UNIT64KP + @@R_INIS @cstart 04EA4H 00000H + @@R_INIS loader 04EA4H 00000H + @@R_INIS pm 04EA4H 00002H + @@R_INIS i2c_ctr 04EA6H 00002H + @@R_INIS main 04EA8H 00000H + @@R_INIS magic 04EA8H 00000H + @@R_INIS WDT 04EA8H 00000H + @@R_INIS i2c_mcu 04EA8H 00000H + @@R_INIS i2c_twl 04EA8H 00000H + @@R_INIS led 04EA8H 00000H + @@R_INIS rtc 04EA8H 00000H + @@R_INIS vreg_ctr 04EA8H 00000H + @@R_INIS vreg_twl 04EA8H 00000H + @@R_INIS adc 04EA8H 00000H + @@R_INIS renge 04EA8H 00000H + @@R_INIS accero 04EA8H 00000H + @@R_INIS self_flash + 04EA8H 00000H + @@R_INIS sw 04EA8H 00000H + @@R_INIS task_debug + 04EA8H 00000H + @@R_INIS task_misc + 04EA8H 00000H + @@R_INIS task_sys 04EA8H 00002H + @@R_INIS pedo_alg_thre_det2 + 04EAAH 00006H + @@R_INIS ini_VECT 04EB0H 00000H + @@R_INIS task_status + 04EB0H 00000H + @@R_INIS led_cam 04EB0H 00002H + @@R_INIS led_pow 04EB2H 00002H + @@R_INIS hal 04EB4H 00000H + @@R_INIS batt_params + 04EB4H 00000H + @@R_INIS voltable 04EB4H 00000H + @@R_INIS pedo_lpf_coeff + 04EB4H 00000H + @@R_INIS kanaria_c + 04EB4H 00000H + @@R_INIS util_funcs + 04EB4H 00000H + @@R_INIS i2c_mcu-sub + 04EB4H 00000H + @@R_INIS @rom 04EB4H 00000H + @@RLINIT 04EB4H 00000H CSEG UNIT64KP + @@RLINIT loader 04EB4H 00000H + @@RLINIT pm 04EB4H 00000H + @@RLINIT i2c_ctr 04EB4H 00000H + @@RLINIT main 04EB4H 00000H + @@RLINIT magic 04EB4H 00000H + @@RLINIT WDT 04EB4H 00000H + @@RLINIT i2c_mcu 04EB4H 00000H + @@RLINIT i2c_twl 04EB4H 00000H + @@RLINIT led 04EB4H 00000H + @@RLINIT rtc 04EB4H 00000H + @@RLINIT vreg_ctr 04EB4H 00000H + @@RLINIT vreg_twl 04EB4H 00000H + @@RLINIT adc 04EB4H 00000H + @@RLINIT renge 04EB4H 00000H + @@RLINIT accero 04EB4H 00000H + @@RLINIT self_flash + 04EB4H 00000H + @@RLINIT sw 04EB4H 00000H + @@RLINIT task_debug + 04EB4H 00000H + @@RLINIT task_misc + 04EB4H 00000H + @@RLINIT task_sys 04EB4H 00000H + @@RLINIT pedo_alg_thre_det2 + 04EB4H 00000H + @@RLINIT ini_VECT 04EB4H 00000H + @@RLINIT task_status + 04EB4H 00000H + @@RLINIT led_cam 04EB4H 00000H + @@RLINIT led_pow 04EB4H 00000H + @@RLINIT hal 04EB4H 00000H + @@RLINIT batt_params + 04EB4H 00000H + @@RLINIT voltable 04EB4H 00000H + @@RLINIT pedo_lpf_coeff + 04EB4H 00000H + @@RLINIT kanaria_c + 04EB4H 00000H + @@RLINIT util_funcs + 04EB4H 00000H + @@RLINIT i2c_mcu-sub + 04EB4H 00000H + @@RLINIT @rom 04EB4H 00000H + @@CODEL 04EB4H 00000H CSEG + @@CODEL pm 04EB4H 00000H + @@CODEL i2c_ctr 04EB4H 00000H + @@CODEL main 04EB4H 00000H + @@CODEL magic 04EB4H 00000H + @@CODEL led 04EB4H 00000H + @@CODEL rtc 04EB4H 00000H + @@CODEL vreg_ctr 04EB4H 00000H + @@CODEL vreg_twl 04EB4H 00000H + @@CODEL adc 04EB4H 00000H + @@CODEL renge 04EB4H 00000H + @@CODEL accero 04EB4H 00000H + @@CODEL sw 04EB4H 00000H + @@CODEL task_misc + 04EB4H 00000H + @@CODEL task_sys 04EB4H 00000H + @@CODEL pedo_alg_thre_det2 + 04EB4H 00000H + @@CODEL ini_VECT 04EB4H 00000H + @@CODEL led_cam 04EB4H 00000H + @@CODEL led_pow 04EB4H 00000H + @@CODEL batt_params + 04EB4H 00000H + @@CODEL voltable 04EB4H 00000H + @@CODEL pedo_lpf_coeff + 04EB4H 00000H + @@CODEL kanaria_c + 04EB4H 00000H + @@CODEL i2c_mcu-sub + 04EB4H 00000H + @@LCODEL 04EB4H 00022H CSEG + @@LCODEL abs 04EB4H 00008H + @@LCODEL memcpy_n 04EBCH 0001AH +* gap * 04ED6H 0011EH + MGC_VER 04FF4H 00002H CSEG AT + MGC_VER magic 04FF4H 00002H + MGC_TAIL 04FF6H 0000AH CSEG AT + MGC_TAIL magic 04FF6H 0000AH + + MEMORY=RAM + BASE ADDRESS=FF900H SIZE=00500H + OUTPUT INPUT INPUT BASE SIZE + SEGMENT SEGMENT MODULE ADDRESS + @@DATA FF900H 003CCH DSEG BASEP + @@DATA @cstart FF900H 00002H + @@DATA loader FF902H 00000H + @@DATA pm FF902H 00002H + @@DATA i2c_ctr FF904H 00000H + @@DATA main FF904H 0021EH + @@DATA magic FFB22H 00000H + @@DATA WDT FFB22H 00000H + @@DATA i2c_mcu FFB22H 00004H + @@DATA i2c_twl FFB26H 00000H + @@DATA led FFB26H 00076H + @@DATA rtc FFB9CH 00008H + @@DATA vreg_ctr FFBA4H 0005CH + @@DATA vreg_twl FFC00H 00010H + @@DATA adc FFC10H 00000H + @@DATA renge FFC10H 00014H + @@DATA accero FFC24H 00000H + @@DATA self_flash + FFC24H 00002H + @@DATA sw FFC26H 00000H + @@DATA task_debug + FFC26H 00000H + @@DATA task_misc + FFC26H 00008H + @@DATA task_sys FFC2EH 00000H + @@DATA pedo_alg_thre_det2 + FFC2EH 00098H + @@DATA ini_VECT FFCC6H 00000H + @@DATA task_status + FFCC6H 00000H + @@DATA led_cam FFCC6H 00000H + @@DATA led_pow FFCC6H 00006H + @@DATA hal FFCCCH 00000H + @@DATA batt_params + FFCCCH 00000H + @@DATA voltable FFCCCH 00000H + @@DATA pedo_lpf_coeff + FFCCCH 00000H + @@DATA kanaria FFCCCH 00000H + @@DATA kanaria_c + FFCCCH 00000H + @@DATA util_funcs + FFCCCH 00000H + @@DATA i2c_mcu-sub + FFCCCH 00000H + @@DATA @rom FFCCCH 00000H + @@INIT FFCCCH 0004AH DSEG BASEP + @@INIT @cstart FFCCCH 00000H + @@INIT loader FFCCCH 00000H + @@INIT pm FFCCCH 00000H + @@INIT i2c_ctr FFCCCH 00000H + @@INIT main FFCCCH 00000H + @@INIT magic FFCCCH 00000H + @@INIT WDT FFCCCH 00000H + @@INIT i2c_mcu FFCCCH 00000H + @@INIT i2c_twl FFCCCH 00000H + @@INIT led FFCCCH 00000H + @@INIT rtc FFCCCH 00000H + @@INIT vreg_ctr FFCCCH 00000H + @@INIT vreg_twl FFCCCH 00000H + @@INIT adc FFCCCH 0000CH + @@INIT renge FFCD8H 00014H + @@INIT accero FFCECH 00000H + @@INIT self_flash + FFCECH 00000H + @@INIT sw FFCECH 00000H + @@INIT task_debug + FFCECH 00000H + @@INIT task_misc + FFCECH 00026H + @@INIT task_sys FFD12H 00000H + @@INIT pedo_alg_thre_det2 + FFD12H 00000H + @@INIT ini_VECT FFD12H 00000H + @@INIT task_status + FFD12H 00000H + @@INIT led_cam FFD12H 00000H + @@INIT led_pow FFD12H 00004H + @@INIT hal FFD16H 00000H + @@INIT batt_params + FFD16H 00000H + @@INIT voltable FFD16H 00000H + @@INIT pedo_lpf_coeff + FFD16H 00000H + @@INIT kanaria FFD16H 00000H + @@INIT kanaria_c + FFD16H 00000H + @@INIT util_funcs + FFD16H 00000H + @@INIT i2c_mcu-sub + FFD16H 00000H + @@INIT @rom FFD16H 00000H + FSL_DATA FFD16H 00010H DSEG UNITP + FSL_DATA fsl_common + FFD16H 00010H + @@INITL FFD26H 00000H DSEG UNIT64KP + @@INITL loader FFD26H 00000H + @@INITL pm FFD26H 00000H + @@INITL i2c_ctr FFD26H 00000H + @@INITL main FFD26H 00000H + @@INITL magic FFD26H 00000H + @@INITL WDT FFD26H 00000H + @@INITL i2c_mcu FFD26H 00000H + @@INITL i2c_twl FFD26H 00000H + @@INITL led FFD26H 00000H + @@INITL rtc FFD26H 00000H + @@INITL vreg_ctr FFD26H 00000H + @@INITL vreg_twl FFD26H 00000H + @@INITL adc FFD26H 00000H + @@INITL renge FFD26H 00000H + @@INITL accero FFD26H 00000H + @@INITL self_flash + FFD26H 00000H + @@INITL sw FFD26H 00000H + @@INITL task_debug + FFD26H 00000H + @@INITL task_misc + FFD26H 00000H + @@INITL task_sys FFD26H 00000H + @@INITL pedo_alg_thre_det2 + FFD26H 00000H + @@INITL ini_VECT FFD26H 00000H + @@INITL task_status + FFD26H 00000H + @@INITL led_cam FFD26H 00000H + @@INITL led_pow FFD26H 00000H + @@INITL hal FFD26H 00000H + @@INITL batt_params + FFD26H 00000H + @@INITL voltable FFD26H 00000H + @@INITL pedo_lpf_coeff + FFD26H 00000H + @@INITL kanaria FFD26H 00000H + @@INITL kanaria_c + FFD26H 00000H + @@INITL util_funcs + FFD26H 00000H + @@INITL i2c_mcu-sub + FFD26H 00000H + @@INITL @rom FFD26H 00000H + @@DATAL FFD26H 00000H DSEG UNIT64KP + @@DATAL loader FFD26H 00000H + @@DATAL pm FFD26H 00000H + @@DATAL i2c_ctr FFD26H 00000H + @@DATAL main FFD26H 00000H + @@DATAL magic FFD26H 00000H + @@DATAL WDT FFD26H 00000H + @@DATAL i2c_mcu FFD26H 00000H + @@DATAL i2c_twl FFD26H 00000H + @@DATAL led FFD26H 00000H + @@DATAL rtc FFD26H 00000H + @@DATAL vreg_ctr FFD26H 00000H + @@DATAL vreg_twl FFD26H 00000H + @@DATAL adc FFD26H 00000H + @@DATAL renge FFD26H 00000H + @@DATAL accero FFD26H 00000H + @@DATAL self_flash + FFD26H 00000H + @@DATAL sw FFD26H 00000H + @@DATAL task_debug + FFD26H 00000H + @@DATAL task_misc + FFD26H 00000H + @@DATAL task_sys FFD26H 00000H + @@DATAL pedo_alg_thre_det2 + FFD26H 00000H + @@DATAL ini_VECT FFD26H 00000H + @@DATAL task_status + FFD26H 00000H + @@DATAL led_cam FFD26H 00000H + @@DATAL led_pow FFD26H 00000H + @@DATAL hal FFD26H 00000H + @@DATAL batt_params + FFD26H 00000H + @@DATAL voltable FFD26H 00000H + @@DATAL pedo_lpf_coeff + FFD26H 00000H + @@DATAL kanaria FFD26H 00000H + @@DATAL kanaria_c + FFD26H 00000H + @@DATAL util_funcs + FFD26H 00000H + @@DATAL i2c_mcu-sub + FFD26H 00000H + @@DATAL @rom FFD26H 00000H +* gap * FFD26H 000DAH + + MEMORY=RAM2 + BASE ADDRESS=FFE20H SIZE=000C0H + OUTPUT INPUT INPUT BASE SIZE + SEGMENT SEGMENT MODULE ADDRESS + @@INIS FFE20H 00010H DSEG SADDRP + @@INIS @cstart FFE20H 00000H + @@INIS loader FFE20H 00000H + @@INIS pm FFE20H 00002H + @@INIS i2c_ctr FFE22H 00002H + @@INIS main FFE24H 00000H + @@INIS magic FFE24H 00000H + @@INIS WDT FFE24H 00000H + @@INIS i2c_mcu FFE24H 00000H + @@INIS i2c_twl FFE24H 00000H + @@INIS led FFE24H 00000H + @@INIS rtc FFE24H 00000H + @@INIS vreg_ctr FFE24H 00000H + @@INIS vreg_twl FFE24H 00000H + @@INIS adc FFE24H 00000H + @@INIS renge FFE24H 00000H + @@INIS accero FFE24H 00000H + @@INIS self_flash + FFE24H 00000H + @@INIS sw FFE24H 00000H + @@INIS task_debug + FFE24H 00000H + @@INIS task_misc + FFE24H 00000H + @@INIS task_sys FFE24H 00002H + @@INIS pedo_alg_thre_det2 + FFE26H 00006H + @@INIS ini_VECT FFE2CH 00000H + @@INIS task_status + FFE2CH 00000H + @@INIS led_cam FFE2CH 00002H + @@INIS led_pow FFE2EH 00002H + @@INIS hal FFE30H 00000H + @@INIS batt_params + FFE30H 00000H + @@INIS voltable FFE30H 00000H + @@INIS pedo_lpf_coeff + FFE30H 00000H + @@INIS kanaria_c + FFE30H 00000H + @@INIS util_funcs + FFE30H 00000H + @@INIS i2c_mcu-sub + FFE30H 00000H + @@INIS @rom FFE30H 00000H + @@DATS FFE30H 00066H DSEG SADDRP + @@DATS @cstart FFE30H 00000H + @@DATS loader FFE30H 00000H + @@DATS pm FFE30H 0001AH + @@DATS i2c_ctr FFE4AH 00004H + @@DATS main FFE4EH 00000H + @@DATS magic FFE4EH 00000H + @@DATS WDT FFE4EH 00000H + @@DATS i2c_mcu FFE4EH 00008H + @@DATS i2c_twl FFE56H 00000H + @@DATS led FFE56H 00006H + @@DATS rtc FFE5CH 00000H + @@DATS vreg_ctr FFE5CH 00004H + @@DATS vreg_twl FFE60H 00000H + @@DATS adc FFE60H 0000AH + @@DATS renge FFE6AH 00002H + @@DATS accero FFE6CH 00002H + @@DATS self_flash + FFE6EH 00000H + @@DATS sw FFE6EH 0000CH + @@DATS task_debug + FFE7AH 00000H + @@DATS task_misc + FFE7AH 00004H + @@DATS task_sys FFE7EH 00002H + @@DATS pedo_alg_thre_det2 + FFE80H 0000EH + @@DATS ini_VECT FFE8EH 00000H + @@DATS task_status + FFE8EH 00002H + @@DATS led_cam FFE90H 00002H + @@DATS led_pow FFE92H 00004H + @@DATS hal FFE96H 00000H + @@DATS batt_params + FFE96H 00000H + @@DATS voltable FFE96H 00000H + @@DATS pedo_lpf_coeff + FFE96H 00000H + @@DATS kanaria_c + FFE96H 00000H + @@DATS util_funcs + FFE96H 00000H + @@DATS i2c_mcu-sub + FFE96H 00000H + @@DATS @rom FFE96H 00000H + @@BITS FFE96H 00006H BSEG + @@BITS @cstart FFE96H.0 00000H.0 + @@BITS loader FFE96H.0 00000H.0 + @@BITS pm FFE96H.0 00001H.1 + @@BITS i2c_ctr FFE97H.1 00000H.0 + @@BITS main FFE97H.1 00000H.1 + @@BITS magic FFE97H.2 00000H.0 + @@BITS WDT FFE97H.2 00000H.0 + @@BITS i2c_mcu FFE97H.2 00000H.4 + @@BITS i2c_twl FFE97H.6 00000H.0 + @@BITS led FFE97H.6 00000H.4 + @@BITS rtc FFE98H.2 00000H.3 + @@BITS vreg_ctr FFE98H.5 00000H.1 + @@BITS vreg_twl FFE98H.6 00000H.0 + @@BITS adc FFE98H.6 00000H.4 + @@BITS renge FFE99H.2 00000H.2 + @@BITS accero FFE99H.4 00000H.0 + @@BITS self_flash + FFE99H.4 00000H.0 + @@BITS sw FFE99H.4 00000H.1 + @@BITS task_debug + FFE99H.5 00000H.0 + @@BITS task_misc + FFE99H.5 00000H.3 + @@BITS task_sys FFE9AH.0 00000H.0 + @@BITS pedo_alg_thre_det2 + FFE9AH.0 00000H.2 + @@BITS ini_VECT FFE9AH.2 00000H.0 + @@BITS task_status + FFE9AH.2 00000H.0 + @@BITS led_cam FFE9AH.2 00000H.1 + @@BITS led_pow FFE9AH.3 00000H.0 + @@BITS hal FFE9AH.3 00000H.6 + @@BITS batt_params + FFE9BH.1 00000H.0 + @@BITS voltable FFE9BH.1 00000H.0 + @@BITS pedo_lpf_coeff + FFE9BH.1 00000H.0 + @@BITS kanaria_c + FFE9BH.1 00000H.0 + @@BITS util_funcs + FFE9BH.1 00000H.0 + @@BITS i2c_mcu-sub + FFE9BH.1 00000H.0 +* gap * FFE9CH 00038H + @@SEGREG FFED4H 00004H DSEG AT + @@SEGREG @SEGREG FFED4H 00004H + @@RTARG0 FFED8H 00008H DSEG AT + @@RTARG0 @RTARG0 FFED8H 00008H + + + Target chip : uPD79F0104 + Device file : E1.00b + \ No newline at end of file diff --git a/branches/IS_capture/bsr_mcu.dr b/branches/IS_capture/bsr_mcu.dr new file mode 100644 index 0000000..81aeecc --- /dev/null +++ b/branches/IS_capture/bsr_mcu.dr @@ -0,0 +1,46 @@ +;;; ̈̒` +;32kB = 0x7FFF +MEMORY BCL0: (00000H, 01000H ) +;MEMORY BCL1: (01000H, 01000H ) ; obNAbv̈ +MEMORY ROM : (02000H, 03000H ) +;MEMORY ROM_BKUP:(05000H, 03000H ) ; obNAbv̈ +;MEMORY OCD :(0FC00H, 00400H ) ; OCDgĂ炵 + + +;;; ZOg̊ݒ +; u[gubN0Ɋ蓖Ă +MERGE LDR_CODE : =BCL0 +MERGE LDR_CODL : =BCL0 +MERGE FSL_CODE : =BCL0 ; =FSL ; ސtbVCu +MERGE @@LCODE : =BCL0 ; X^[gAbv[` +;MERGE @@LCODEL : =BCL0 + +;MERGE LDR_RINT:=BCL0 +;MERGE LDR_CNST:=BCL0 +MERGE LDR_CNSL:=BCL0 + + + +; ʏ̈ɒu +MERGE ROM_CODE:=ROM +MERGE @@CNST: =ROM +MERGE @@R_INIT: =ROM ; ROMȊOɒuȂX^[gAbv[`vC + + + + + + +; }WbNio[ +;; magic.c̒Ŏw + + +;--- RAM̈ ------------------------------------------------------- +; +; RAM1,RAM2̈̓[U[vOŎgpĂǂłAZtvO +; ZtvÕCugp邽߁Al͔j󂳂܂B +; +memory RAM : (0FF900H, 0500H) ; [U[q`l̈ +;memory SLF_RAM : (0FF900H, 0020H) ; Slef Program\̈[gp֎~] +memory RAM2 : (0FFE20H, 00C0H) ; ZtvOAgp֎~̈ +;memory SLF_RAM : (0FFE00H, 0020H) ; Slef Program\̈[gp֎~] diff --git a/branches/IS_capture/bsr_system.h b/branches/IS_capture/bsr_system.h new file mode 100644 index 0000000..ddf0f6c --- /dev/null +++ b/branches/IS_capture/bsr_system.h @@ -0,0 +1,74 @@ +#ifndef __bsr_system__ +#define __bsr_system__ + +// $Id$ + + +// Cxg[ṽXe[g +enum pwr_state_ +{ + OFF_TRIG = 0, + ON_CHECK, + ON_TRIG, + ON, +// SLEEP_TRIG, + SLEEP, +// WAKE, + OFF, + DIRECT_BOOT_CHECK, +}; + +enum poweron_reason_ +{ + NONE = 0, + RSN_PWSW, + RSN_RTC_ALARM, + RSN_TRIAL, // ̌ + RSN_RSV4, + RSN_RSV5 +}; + + +enum model_ +{ + MODEL_JIKKI, + MODEL_TS_BOARD, + MODEL_SHIROBAKO, + MODEL_JIKKI_NOBATT, + MODEL_CAPTURE_BOX, + MODEL_ISBAKO, // Asystem_status.model MODEL_JIKKI ɂĂ̂Ŗgp + MODEL_RESERVED3, +}; + +enum family_ +{ + FAMILY_CTR, + FAMILY_SPFL, // LL + FAMILY_SNAKE, // LAGER + FAMILY_FLOWER, + FAMILY_CLOSER, + FAMILY_RESERVED5, +}; + +// ^XNVXȅԏȂ +typedef struct _system_status_ +{ + enum pwr_state_ pwr_state; + enum poweron_reason_ poweron_reason; + unsigned char reboot:1; + unsigned char captureBox:1; // Lv` SDKɂ͎@ƕԂ + unsigned char taikendai:1; + unsigned char taikendai_nbd:1; + unsigned char is_dev:1; + enum model_ model; + enum family_ family; + unsigned char LCD_is_CGS:1; +}system_status_; + +extern bit force_off; + +extern system_status_ system_status; + + + +#endif diff --git a/branches/IS_capture/config.h b/branches/IS_capture/config.h new file mode 100644 index 0000000..7c0cfa6 --- /dev/null +++ b/branches/IS_capture/config.h @@ -0,0 +1,112 @@ +#ifndef __config__ +#define __config__ +/* + + $Id: config.h 418 2011-09-22 01:35:37Z n2232 $ + +*/ + +#define MCU_VER_MAJOR 0x02 +#define MCU_VER_MINOR 0x40 + +/* +Ǘo[W 2.40 +*/ + +// rhXCb` +//#define _MCU_ARR // snake n + + +// fobOXCb` + +//#define _debug_led_ // LED print fobOƂ +//#define _ALLOW_NOBATT_ // @drȂi=A_v^̂݁jł̋N +//#define _DBG_LED_PRINT_ // LED print fobOƂ(ȃAbvf[gp) +//#define _ENABLE_COMMAND3_ // mcuZbgwdtR}hLɂ +//#define _FORCE_TAIKENDAI_ +//#define _FORCE_TAIKENDAI_NBD_ + +//#define _DBG_CHK_OFF_LEAK_ // OFF[Nd̃`FbN(fobKŊmF) +//#define _DBG_NOP_ // u[N\邽߂NOP()LɂƂ + +//#define _ENABLE_HAL_ // fobOpHALLɂBRgAEgŃX[ɂȂB +//#define _ENABLE_PRESS_SEL_TO_WDT_ // SEL WDT + +//#define _WDT_CHECK_ // WDT炵̂ŒǐՂƂbreakāAR[X^bN +// IvVoCg1oCgځAbit7ZbgKv܂B + +//#define _DI_WITH_CHECK_ // 荞݋֎~dɊ|Ȃ`FbN + +//#define _DBG_BT_FULL_ +//#define _DBG_FORCE_FLOWER + + +#ifdef _DBG_NOP_ // R[hKvNOPƋʂ邽 +# define dbg_nop() NOP() +#else +# define dbg_nop() ; +#endif + + +#define _I2C_ERR_ABORT_ // *Won* I2CŌ돑݂炵ȍ~@ + //. u[NĂSRȂȂ܂... + +// dlt@[ +//#define _TAIKENDAI_ +// homej[ɓĂ܂̂t@[‚BROMȂ̂œdrp[^pX +//#define _TAIKENDAI_SEISAN_SPECIAL_ +// Yɑ̌dlǂƁAA_v^ȂƓd炸ɌɎxႪ̂ňꎞt@[ +//#define _RVD_ +// fobKA^b`Ƀ^[QbgZbgœd؂Ă܂̂ + + +// ̎́C‚ȂƑ̌̐YłȂˁI +#ifdef _TAIKENDAI_SEISAN_SPECIAL_ +#define MCU_VER_MINOR 0x81 +#endif + + +#ifdef _TAIKENDAI_ +#define MCU_VER_MINOR 0x92 +// 0x90 1.31 @HOMEɓĂ܂̂XCb`̃}XNő΍ +// ROMŝ߁Adrp[^폜 + +#endif + + +#define _firm_format_v3_ + +//#define _MODEL_TEG2_ + // TEG2 CPU { Type-T + +//#define _MODEL_WM0_ +//#define _MODEL_WM0_TEG2_CTRC_ + +//#define _MODEL_TS0_ + // TEG2 CPU { Type-C + +#define _MODEL_CTR_ + // TS board, WM1,1 TS-CTRC, @ + + +// ---------------------------------- // +#ifdef _MODEL_TEG2_ +unsupported! +#endif + + +#ifdef _MODEL_WM0_ +unsupported! +#endif + + +#ifdef _MODEL_TS0_ +unsupported! +#endif + +#ifdef _MODEL_CTR_ +#define _PMIC_CTR_ +#define _MCU_BSR_ +#endif + +#endif diff --git a/branches/IS_capture/fsl.h b/branches/IS_capture/fsl.h new file mode 100644 index 0000000..0e806b5 --- /dev/null +++ b/branches/IS_capture/fsl.h @@ -0,0 +1,362 @@ +/*==============================================================================================*/ +/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */ +/* Module = fsl.h */ +/* Version = V1.01 */ +/* Date = 28.03.2008 11:45:42 */ +/*==============================================================================================*/ +/* COPYRIGHT */ +/*==============================================================================================*/ +/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */ +/* a company of the NEC Electronics Corporation */ +/*==============================================================================================*/ +/* Purpose: */ +/* constant, type and function prototype definitions used by the FSL */ +/* */ +/*==============================================================================================*/ +/* */ +/* Warranty Disclaimer */ +/* */ +/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */ +/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */ +/* including but not limited to those for non-infringement of intellectual property, */ +/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */ +/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/ +/* */ +/* Each User is solely responsible for determining the appropriateness of using the Product(s) */ +/* and assumes all risks associated with its exercise of rights under this Agreement, */ +/* including, but not limited to the risks and costs of program errors, compliance with */ +/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */ +/* or punitive damage (including but not limited to lost profits) regardless of whether */ +/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */ +/* failure of essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. NEC shall not be liable for any services or products provided by third party */ +/* vendors, developers or consultants identified or referred to the User by NEC in connection */ +/* with the Product(s) and/or the Application. */ +/* */ +/*==============================================================================================*/ +/* Environment: PM plus (V6.30) */ +/* RA78K0(V1.20) */ +/* CC78K0(V2.00) */ +/*==============================================================================================*/ + +#ifndef __FSL_H_INCLUDED +#define __FSL_H_INCLUDED + + +/*==============================================================================================*/ +/* FSL type definitions */ +/*==============================================================================================*/ +typedef unsigned char fsl_u08; +typedef unsigned int fsl_u16; +typedef unsigned long int fsl_u32; + + +/*==============================================================================================*/ +/* constant definitions */ +/*==============================================================================================*/ + +/*status code definitions returned by the FSL functions */ +#define FSL_OK 0x00 +#define FSL_ERR_FLMD0 0x01 +#define FSL_ERR_PARAMETER 0x05 +#define FSL_ERR_PROTECTION 0x10 +#define FSL_ERR_ERASE 0x1A +#define FSL_ERR_BLANKCHECK 0x1B +#define FSL_ERR_IVERIFY 0x1B +#define FSL_ERR_WRITE 0x1C +#define FSL_ERR_EEP_IVERIFY 0x1D +#define FSL_ERR_EEP_BLANKCHECK 0x1E +#define FSL_ERR_INTERRUPTION 0x1F + + +/*==============================================================================================*/ +/* global function prototypes */ +/*==============================================================================================*/ + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: initialization of selfprogramming environment */ +/* After initialization: */ +/* - the pointer to the data-buffer is stored */ +/* - all timing data are re-calculated according to the used system clock */ +/* */ +/* CAUTION: */ +/* The FSL_Init(&data_buffer) function is interruptible. Please use the */ +/* FSL_Init_cont(&data_buffer) to recall it as long return status is 0x1F. */ +/* */ +/* Input: data_buffer_pu08 - pointer to a data buffer of N...256 bytes */ +/* (used for data exchange between firmware and application) */ +/* Output: - */ +/* Returned: u08, status_code */ +/* = 0x00(FSL_OK), normal and means initialization OK */ +/* = 0x1F(FSL_ERR_INTERRUPTION), initialization interrupted by user interrupt*/ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_Init( fsl_u08 * data_buffer_pu08 ); +extern fsl_u08 FSL_Init_cont( fsl_u08 * data_buffer_pu08 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: checks the voltage level (high or low) at FLMD0 pin */ +/* Input: - */ +/* Output: - */ +/* Returned: fsl_u08, status_code */ +/* = 0x00(FSL_OK), normal and means FLMD0=HIGH */ +/* = 0x01(FSL_ERR_FLMD0), error, FLMD0=LOW */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_ModeCheck( void ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: checks if specified block is blank */ +/* Input: block_u16 - block number has to be checked */ +/* Output: - */ +/* Returned: fsl_u08, status_code */ +/* = 0x00(FSL_OK), normal and means "block is blank" */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x1B(FSL_ERR_BLANKCHECK), blank-check error, means "block not blank" */ +/* = 0x1F(FSL_ERR_INTERRUPTION), blank-check interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_BlankCheck( fsl_u16 block_u16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: erase specified block */ +/* Input: block_u16 - block number has to be erase */ +/* Output: - */ +/* Returned: fsl_u08, status_code */ +/* = 0x00(FSL_OK), normal and means "block erased successfully" */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), tried to erase protected area */ +/* = 0x1A(FSL_ERR_ERASE), erase error, retry up to max. 255 times */ +/* = 0x1F(FSL_ERR_INTERRUPTION), erasing interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_Erase( fsl_u16 block_u16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: performs internal verify on specified block */ +/* Input: block_u16 - block number has to be verified */ +/* Output: - */ +/* Returned: fsl_u08, status_code */ +/* = 0x00(FSL_OK), normal and means "block is verified" */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), verify interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_IVerify( fsl_u16 block_u16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: writes N words from the data buffer into flash */ +/* Input: s_address_u32 - starting flash address the data has to be written */ +/* See Condition 2) please. */ +/* my_wordcount_u08 - number of words (4 bytes) has to be written */ +/* Output: - */ +/* Condition: 1) (s_address_u32 MOD 4 == 0) */ +/* 2) most significant byte (MSB) of s_address_u32 has to be 0x00. */ +/* Means: 0x00abcdef 24 bit flash address allowed */ +/* 3) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY LIBRARY !!!!! */ +/* Changed: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), protection error */ +/* = 0x1C(FSL_ERR_WRITE), write error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_Write( fsl_u32 s_address_u32, fsl_u08 word_count_u08 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: writes N words from the data buffer into flash */ +/* Before "writing" a N-word blankcheck is performed. */ +/* After "writing" a N-Word internal verify is performed. */ +/* Input: s_address_u32 - starting destination address has to be written */ +/* my_wordcount_u08 - number of words (4 bytes) has to be written */ +/* Output: - */ +/* Condition: 1) (s_address_u32 MOD 4 == 0) */ +/* 2) (word_count_u08 <= sizeof(data buffer)) NOT CHECKED BY FIRMWARE !!!!! */ +/* Changed: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), protection error */ +/* = 0x1C(FSL_ERR_WRITE), write error */ +/* = 0x1D(FSL_ERR_EEP_IVERIFY), verify error */ +/* = 0x1E(FSL_ERR_EEP_BLANKCHECK), blankcheck error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_EEPROMWrite( fsl_u32 s_address_u32, + fsl_u08 word_count_u08 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: reads the security information */ +/* Input: destination_pu16 - destination address of the security info */ +/* The format of the security info is: "unsigned short int" */ +/* */ +/* Format of the security info: */ +/* bit_0 = 0 -> chip erase command disabled, otherwise enabled */ +/* bit_1 = 0 -> block erase command disabled, otherwise enabled */ +/* bit_2 = 0 -> write command disabled, otherwise enabled */ +/* bit_4 = 0 -> boot-area re-programming disabled, otherwise enabled */ +/* bit_8...bit_15 = 03H -> last block of the boot-area */ +/* other bits = 1 */ +/* Output: - */ +/* Changed: content of the data_buffer */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_GetSecurityFlags( fsl_u16 * destination_pu16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: read the boot flag i */ +/* Input: destination_pu08 - destination address of the bootflag info */ +/* The format of the boot-flag info is: "unsigned char" */ +/* The value of the boot info is 0x00 for cluster 0 and 0x01 for cluster 1. */ +/* Output: - */ +/* Changed: content of the data_buffer */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_GetActiveBootCluster( fsl_u08 * destination_pu08 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: puts the last address of the specified block into *destination_pu32 */ +/* Input: *destination_pu32 - destination where the last-block-address */ +/* should be stored */ +/* block_u16 - block number of the last address is needed */ +/* Changed: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_GetBlockEndAddr( fsl_u32 * destination_pu32, + fsl_u16 block_u16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: puts the information about the protected flash area into the function parameter */ +/* Input: *start_block_pu16 - destination where the FSW start block should be stored */ +/* *end_block_pu16 - destination where the FSW end block should be stored */ +/* Changed: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_GetFlashShieldWindow( fsl_u16 * start_block_pu16, + fsl_u16 * end_block_pu16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: defines a new Flash-Shield-Window area inside the flash memory */ +/* Input: start_block_u16 - starting block of the Flash-Shield-Window (FSW) */ +/* end_block_u16 - ending block of the flash-Shield-Window (FSW) */ +/* Changed: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), protection error */ +/* = 0x1A(FSL_ERR_ERASE), erase error */ +/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_SetFlashShieldWindow( fsl_u16 start_block_u16, + fsl_u16 end_block_u16 ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: Swapping of bootcluster 0 and 1 */ +/* */ +/* CAUTION !!!! */ +/* After this function the boot cluster are immediately swapped */ +/* Input: - */ +/* Output: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), protection error */ +/* = 0x1A(FSL_ERR_ERASE), erase error */ +/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_SwapBootCluster( void ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL command function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: sets specified security flag by dedicated command-function. */ +/* */ +/* There are following security levels: */ +/* a) chip-erase protection (cannot be reset by programmer !!!) */ +/* b) block-erase protection (can be reset by chip-erase on programmer) */ +/* c) write protection (can be reset by chip-erase on programmer) */ +/* d) boot-cluster protection (cannot be reset by programmer !!!) */ +/* */ +/* CAUTION !!!! */ +/* Each security flag can be written by the application only once */ +/* */ +/* Input: - */ +/* Output: - */ +/* Returned: fsl_u08, status code */ +/* = 0x00(FSL_OK), normal */ +/* = 0x05(FSL_ERR_PARAMETER), parameter error */ +/* = 0x10(FSL_ERR_PROTECTION), protection error */ +/* = 0x1A(FSL_ERR_ERASE), erase error */ +/* = 0x1B(FSL_ERR_IVERIFY), internal verify error */ +/* = 0x1F(FSL_ERR_INTERRUPTION), write interrupted by user interrupt */ +/*----------------------------------------------------------------------------------------------*/ +extern fsl_u08 FSL_SetChipEraseProtectFlag( void ); +extern fsl_u08 FSL_SetBlockEraseProtectFlag( void ); +extern fsl_u08 FSL_SetWriteProtectFlag( void ); +extern fsl_u08 FSL_SetBootClusterProtectFlag( void ); + + +/*----------------------------------------------------------------------------------------------*/ +/* Block type: FSL function */ +/*----------------------------------------------------------------------------------------------*/ +/* Purpose: defines the firmware operation method after interrupt service (ISR) execution. */ +/* Input: mode_u08 = 0x00, after RETI the firmware is continuing the interrupted command.*/ +/* = other, after RETI the firmware is interrupted with status 0x1F. */ +/* Changed: - */ +/* Returned: - */ +/*----------------------------------------------------------------------------------------------*/ +extern void FSL_SetInterruptMode( fsl_u08 mode_u08 ); + +#endif diff --git a/branches/IS_capture/fsl_user.h b/branches/IS_capture/fsl_user.h new file mode 100644 index 0000000..1018689 --- /dev/null +++ b/branches/IS_capture/fsl_user.h @@ -0,0 +1,113 @@ +/*==============================================================================================*/ +/* Project = Selfprogramming library for 78K0R/Ix3/Kx3-L Single Voltage SST (MF2) Flash */ +/* Module = fsl_user.h */ +/* Version = V1.01 */ +/* Date = 28.03.2008 11:45:55 */ +/*==============================================================================================*/ +/* COPYRIGHT */ +/*==============================================================================================*/ +/* Copyright (c) 2007 by NEC Electronics (Europe) GmbH, */ +/* a company of the NEC Electronics Corporation */ +/*==============================================================================================*/ +/* Purpose: */ +/* user configurable constant/macros of the selfprogramming library */ +/* */ +/*==============================================================================================*/ +/* */ +/* Warranty Disclaimer */ +/* */ +/* Because the Product(s) is licensed free of charge, there is no warranty of any kind */ +/* whatsoever and expressly disclaimed and excluded by NEC, either expressed or implied, */ +/* including but not limited to those for non-infringement of intellectual property, */ +/* merchantability and/or fitness for the particular purpose. NEC shall not have any obligation */ +/* to maintain, service or provide bug fixes for the supplied Product(s) and/or the Application.*/ +/* */ +/* Each User is solely responsible for determining the appropriateness of using the Product(s) */ +/* and assumes all risks associated with its exercise of rights under this Agreement, */ +/* including, but not limited to the risks and costs of program errors, compliance with */ +/* applicable laws, damage to or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall NEC be liable to the User for any incidental, consequential, indirect, */ +/* or punitive damage (including but not limited to lost profits) regardless of whether */ +/* such liability is based on breach of contract, tort, strict liability, breach of warranties, */ +/* failure of essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. NEC shall not be liable for any services or products provided by third party */ +/* vendors, developers or consultants identified or referred to the User by NEC in connection */ +/* with the Product(s) and/or the Application. */ +/* */ +/*==============================================================================================*/ +/* Environment: PM plus (V6.30) */ +/* RA78K0(V1.20) */ +/* CC78K0(V2.00) */ +/*==============================================================================================*/ + + +#ifndef __FSL_USER_H_INCLUDED +#define __FSL_USER_H_INCLUDED + + +/*==============================================================================================*/ +/* constant definitions */ +/*==============================================================================================*/ + + +/* specify the CPU frequency in [Hz], only 2MHz....20MHz allowed */ +#define FSL_SYSTEM_FREQUENCY 8000000 + +/* define whether low-voltage mode is used or not */ +/* #define FSL_LOW_VOLTAGE_MODE */ + +/* size of the common data buffer expressed in [bytes] */ +/* the data buffer is used for data-exchange between the firmware and the selflib. */ +//#define FSL_DATA_BUFFER_SIZE 256 +#define FSL_DATA_BUFFER_SIZE 0 + + +/* customizable interrupt controller configuration during selfprogramming period */ +/* Bit --7-------6-------5-------4-------3-------2-------1-------0---------------------- */ +/* MK0L: PMK5 PMK4 PMK3 PMK2 PMK1 PMK0 LVIMK WDTIMK */ +/* MK0H: SREMK0 SRMK0* STMK0* DMAMK1 DMAMK0 SREMK3 SRMK3 STMK3 */ +/* MK1L: TMMK03 TMMK02 TMMK01 TMMK00 IICMK0 SREMK1 SRMK1 STMK1* */ +/* MK1H: TMMK04 SREMK2 SRMK2 STMK2* KRMK RTCIMK RTCMK ADMK */ +/* MK2L: PMK10 PMK9 PMK8 PMK7 PMK6 TMMK07 TMMK06 TMMK05 */ +/* MK2H: 1 1 1 1 1 1 1 PMK11 */ +/*------------------------------------------------------------------------------------------ */ +/* */ +/* Examples: */ +/* ========= */ +/*#define FSL_MK0L_MASK 0xF7 -> allow INTP1 interrupt during selfprogramming */ +/*#define FSL_MK0H_MASK 0xEF -> allow DMA1 interrupt during selfprogramming */ +/*#define FSL_MK1L_MASK 0xBF -> allow TM02 interrupt during selfprogramming */ +/*#define FSL_MK1H_MASK 0xFF -> all interrupts disabled during selfprogramming */ +/*#define FSL_MK2L_MASK 0xF7 -> allow INTP6 interrupt during selfprogramming */ +/*#define FSL_MK2H_MASK 0xFF -> all interrupts disabled during selfprogramming */ +/*------------------------------------------------------------------------------------------ */ +#define FSL_MK0L_MASK 0xFF /* all interrupts disabled during selfprogramming */ +#define FSL_MK0H_MASK 0xFF /* all interrupts disabled during selfprogramming */ +#define FSL_MK1L_MASK 0xFF /* all interrupts disabled during selfprogramming */ +#define FSL_MK1H_MASK 0xFF /* all interrupts disabled during selfprogramming */ +#define FSL_MK2L_MASK 0xFF /* all interrupts disabled during selfprogramming */ +#define FSL_MK2H_MASK 0xFF /* all interrupts disabled during selfprogramming */ + + +/* FLMD0 control bit */ +#ifndef _WIN32 +#define FSL_FLMD0_HIGH {BECTL.7 = 1;} +#define FSL_FLMD0_LOW {BECTL.7 = 0;} +#else +#define FSL_FLMD0_HIGH {BECTL_7 = 1;} +#define FSL_FLMD0_LOW {BECTL_7 = 0;} +#endif + + +/*----------------------------------------------------------------------------------------------*/ +/* switch interrupt backu functionality ON/OFF using #define/#undef */ +/*----------------------------------------------------------------------------------------------*/ +/* #define FSL_INT_BACKUP */ +#undef FSL_INT_BACKUP + + +#endif diff --git a/branches/IS_capture/get_ei.asm b/branches/IS_capture/get_ei.asm new file mode 100644 index 0000000..29f4a6e --- /dev/null +++ b/branches/IS_capture/get_ei.asm @@ -0,0 +1,26 @@ +$PROCESSOR ( 9F0104 ) + +PUBLIC _get_ei +; +; PSWEIǂݏo܂B +; + + + +ROM_CODE CSEG BASE + +_get_ei: + set1 CY + and1 CY,PSW.7 ; check IE bit. if 0, all interrupts are disabled. + bnc $ie_dis + mov C,#01h + ret + +ie_dis: + mov C,#00h + ret + + + end + + diff --git a/branches/IS_capture/hal.c b/branches/IS_capture/hal.c new file mode 100644 index 0000000..9cfa47a --- /dev/null +++ b/branches/IS_capture/hal.c @@ -0,0 +1,187 @@ +/* ======================================================== + ȈՃeXĝ߂HALC + + $Id: asdf$ + ======================================================== */ +#ifndef _WIN32 +#pragma SFR +#endif + +#include "incs_loader.h" + + +#define WIFI_txLatch PIF21 // dgMpX { led.h Œ` + + +// HALłԂ //////////////////////////////////////// +// ȎȂ琳_ɂr...≽łȂ +bit PM_EXTDC_n; +bit BT_IN_CHG_n; +bit SW_POW_n; +bit SW_HOME_n; +bit SW_WIFI_n; +bit SHELL_OPEN; +//bit SW_SEL_n; // Ƃ肠AWX^얢Ή + +/* +#define REG_BIT_HAL0_PM_EXTDC_n ( 1 << 7 ) +#define REG_BIT_HAL0_BT_IN_CHG_n ( 1 << 6 ) +//#define REG_BIT_HAL0_PM_IRQ_n ( 1 << 5 ) // gȂ +#define REG_BIT_HAL0_WL_TX ( 1 << 4 ) +#define REG_BIT_HAL0_SHELL_OPEN ( 1 << 3 ) +#define REG_BIT_HAL0_SW_WIFI_n ( 1 << 2 ) +#define REG_BIT_HAL0_SW_HOME_n ( 1 << 1 ) +#define REG_BIT_HAL0_SW_POW_n ( 1 << 0 ) + +#define REG_BIT_HAL1_DIPSW_1 ( 1 << 3 ) +#define REG_BIT_HAL1_DIPSW_0 ( 1 << 2 ) +#define REG_BIT_HAL1_HW_DET_1 ( 1 << 1 ) +#define REG_BIT_HAL1_HW_DET_0 ( 1 << 0 ) +*/ + + +// ڂւ +// `^OȂ炱ł(ԃJEg͕) +void hal_update() +{ +#ifdef _ENABLE_HAL_ + u8 temp_conf = vreg_ctr[ VREG_C_HAL_OVW_CONT0 ]; + u8 temp_dat = vreg_ctr[ VREG_C_HAL_OVW_DAT0 ]; +#else + u8 temp_conf = 0x00; + u8 temp_dat = 0; // łǂ +#endif + + // A_v^L + if( temp_conf & REG_BIT_HAL0_PM_EXTDC_n ) + { + // O͂Ȃ񂾂傫Ȃ肪 + if(( temp_dat & REG_BIT_HAL0_PM_EXTDC_n ) == 0 ) + { + PM_EXTDC_n = 0; + } + else + { + PM_EXTDC_n = 1; + } + } + else + { + PM_EXTDC_n = PM_EXTDC_n_RAW; + } + + // [dH + if( temp_conf & REG_BIT_HAL0_BT_IN_CHG_n ) + { + if(( temp_dat & REG_BIT_HAL0_BT_IN_CHG_n ) == 0 ) + { + BT_IN_CHG_n = 0; + } + else + { + BT_IN_CHG_n = 1; + } + } + else + { + BT_IN_CHG_n = BT_IN_CHG_n_RAW; + } + + // dt + if( temp_conf & REG_BIT_HAL0_SW_POW_n ) + { + if(( temp_dat & REG_BIT_HAL0_SW_POW_n ) == 0 ) + { + SW_POW_n = 0 ; + } + else + { + SW_POW_n = 1; + } + } + else + { + SW_POW_n = SW_POW_n_RAW; + } + + // Ɩt + if( temp_conf & REG_BIT_HAL0_SW_HOME_n ) + { + if(( temp_dat & REG_BIT_HAL0_SW_HOME_n ) == 0 ) + { + SW_HOME_n = 0; + } + else + { + SW_HOME_n = 1; + } + } + else + { + if( system_status.model == MODEL_TS_BOARD )// ڑ̃|[gႤ + { + SW_HOME_n = SW_HOME_n_TSBOARD_RAW; + } + else + { + SW_HOME_n = SW_HOME_n_JIKKI_RAW; + } + } + + // J + if( temp_conf & REG_BIT_HAL0_SW_WIFI_n ) + { + if(( temp_dat & REG_BIT_HAL0_SW_WIFI_n ) == 0 ) + { + SW_WIFI_n = 0; + } + else + { + SW_WIFI_n = 1; + } + } + else + { + SW_WIFI_n = SW_WIFI_n_RAW; + } + + // + if( temp_conf & REG_BIT_HAL0_SHELL_OPEN ) + { + if(( temp_dat & REG_BIT_HAL0_SHELL_OPEN ) == 0 ) + { + SHELL_OPEN = 0; + } + else + { + SHELL_OPEN = 1; + } + } + else + { + SHELL_OPEN = SHELL_OPEN_RAW; + } + + // sel L[ + /// Ƃ肠AWX^̑삵Ȃ(rbgȂAvWX^ljȂ̂) + + + // dg + if( temp_conf & REG_BIT_HAL0_WL_TX ) + { + WIFI_txLatch = 1; + } + +} + + + +void hal_reset() +{ + vreg_ctr[ VREG_C_HAL_OVW_CONT0 ] = 0; + vreg_ctr[ VREG_C_HAL_OVW_CONT1 ] = 0; + vreg_ctr[ VREG_C_HAL_OVW_TEMPERATURE ] = 0xFF; + vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ] = 0xFF; + vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ] = 0xFF; +} + diff --git a/branches/IS_capture/hal.h b/branches/IS_capture/hal.h new file mode 100644 index 0000000..245be75 --- /dev/null +++ b/branches/IS_capture/hal.h @@ -0,0 +1,16 @@ +#ifndef _hal_h_ +#define _hal_h_ + + +extern bit PM_EXTDC_n; +extern bit BT_IN_CHG_n; +extern bit SW_POW_n; +extern bit SW_HOME_n; +extern bit SW_WIFI_n; +extern bit SHELL_OPEN; + +// ======================================================== +void hal_update(); +void hal_reset(); + +#endif diff --git a/branches/IS_capture/hoge.bin b/branches/IS_capture/hoge.bin new file mode 100644 index 0000000000000000000000000000000000000000..a39a443fb87d0adb1f94d66a67ae90bb9d501e8f GIT binary patch literal 16387 zcmeHuc|a6b)^Dxd)eS<^Am9>Z0MV$?Dn-G)RpQd1w&<9sOr(f`#PKr}X0m89GMT(g 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zxDe2?(0wz{9Kh(kPNV`Q2sR?YKsm!o-a`>BG13@#fO3XdG6Yyc3pE7GAxz^HFlIt^ zekCc@LYPbwj$4Vl6vXG%9Af3_T=!EDq^NhT8Q|{fT=DUrend3C0WPc|%E(M=B~o$c zb;QLZcR$sr(wvBjRYb%BzYIc3J$?GpZj&-5$gxeiIU&U3EVVf9sUpFG7*Uvi) z?FHx$(*zr%hsTX&Cs)IL54afRLr?k9hbLQO=y{7L_$JK$&G_jp%=HZWNY7jmT+{Er`-#+Ztl_^zzW;hm{Qo~C2~TnZ@&Eq^I}A~! literal 0 HcmV?d00001 diff --git a/branches/IS_capture/i2c_ctr.c b/branches/IS_capture/i2c_ctr.c new file mode 100644 index 0000000..4bd238e --- /dev/null +++ b/branches/IS_capture/i2c_ctr.c @@ -0,0 +1,312 @@ +/* ======================================================== + SoC VK`l I2CʐM + cJZ.nintendo + '09 Apr + $Id: i2c_ctr.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 +#pragma interrupt INTIICA1 int_iic_ctr RB1 +#endif + + +#include "incs.h" +#include "rtc.h" +#include "pedometer.h" + + +#ifdef _MCU_BSR_ +// #ifdef _MODEL_TS0_ || _MODEL_WM0_ + +// [LOfI2Ct +// TEG͉H}ŃeR +#define ACKD ACKD1 +#define ACKE ACKE1 +#define COI COI1 +#define IICAEN IICA1EN +#define IICRSV IICRSV1 +#define IICA IICA1 +#define IICAIF IICAIF1 +#define IICAMK IICAMK1 +#define IICAPR0 IICAPR11 +#define IICAPR1 IICAPR01 +#define IICCTL0 IICCTL10 +#define IICE IICE1 +#define IICF IICF1 +#define IICS IICS1 +#define IICWH IICWH1 +#define IICWL IICWL1 +#define LREL LREL1 +#define SPD SPD1 +#define SPIE SPIE1 +#define STCEN STCEN1 +#define STD STD1 +#define SVA SVA1 +#define WREL WREL1 +#define WTIM WTIM1 +#define TRC TRC1 +#define SMC SMC1 +#define DFC DFC1 +#define PortMode PM20 +#define Port P20 + +#endif + + + +// ============================================== +enum en_IIC_STATE +{ + IIC_IDLE = 0, + IIC_RCV_REG_ADRS, + IIC_TX_OR_RX, + IIC_TX, + IIC_RX +}; + + + +// ============================================== +extern bit irq_readed; // ꂩIRQWX^ǂ܂ꂽ + +u8 iic_burst_state; +static enum en_IIC_STATE state = IIC_IDLE; + +#define bit_iics_spd (i2c_stat & (1<<0)) +#define bit_iics_std (i2c_stat & (1<<1)) +#define bit_iics_ackd (i2c_stat & (1<<2)) +#define bit_iics_trc (i2c_stat & (1<<3)) +#define bit_iics_coi (i2c_stat & (1<<4)) + + + +/********************************************//** + isr + + Xe[gɊ荞݂菈i߂ + ***********************************************/ +__interrupt void int_iic_ctr( ) +{ + static u8 reg_adrs; + static u8 tx_buf; + u8 rx_buf; + static u8 adrs_access_from; // o[XgANZX̎Ɏg + + u8 i2c_stat = IICS; // volatilê + + // ǂݏoI + if( !bit_iics_ackd // 荞ݗvNAKif[^M̍Ōj + || bit_iics_spd ) // XgbvRfBV(!ACKD ɗƂ͊荞ݗȂ (SPIE = 0)) + { + /* + I2C̔xẴtOOSTDĂ܂Ƃ + ǁAȂ삷‚ + */ + + // WX^[hŁA荞݃slQ[g + // ܂ǂ܂ĂȂ荞݂΁AēxAT[g + if( irq_readed ) + { + IRQ0_neg; + irq_readed = false; + if( !( (( vreg_ctr[VREG_C_IRQ0] & vreg_ctr[VREG_C_IRQ_MASK0 ] ) == 0 ) + && (( vreg_ctr[VREG_C_IRQ1] & vreg_ctr[VREG_C_IRQ_MASK1 ] ) == 0 ) + && (( vreg_ctr[VREG_C_IRQ2] & vreg_ctr[VREG_C_IRQ_MASK2 ] ) == 0 ) + && (( vreg_ctr[VREG_C_IRQ3] & vreg_ctr[VREG_C_IRQ_MASK3 ] ) == 0 ) )) + { + while( !IRQ0 ){;} // ԉ҂sv + IRQ0_ast; + } + } + + // I2CIɉ镨 // + hosu_read_end( ); // vǂݏoI + rtc_unlock( ); + + state = IIC_IDLE; + SPIE = 0; + LREL = 1; + EI(); + return; + } + + if( bit_iics_std ) // 荞ݗvFX^[gRfBV + { + if( !( state == IIC_IDLE || state == IIC_TX_OR_RX )) + { + // sp/nack 葹˂ +// dbg_nop(); // Ȃ͂... +/* + // pPbg̐擪stƌȂB + // ʂɑs + state = IIC_IDLE; +/*/ + // gCĂ炤 + state = IIC_IDLE; + SPIE = 0; + LREL = 1; + EI(); +//*/ + } + // ʏ + } + + EI(); + + switch ( state ) + { + case ( IIC_IDLE ): + // njĂяoɉB + // Ȃ + iic_burst_state = 0; + SPIE = 1; + WREL = 1; // EFCg + state = IIC_RCV_REG_ADRS; + return; + + case ( IIC_RCV_REG_ADRS ): // QoCgځiWX^AhXjMɗ + // WX^AhXM + reg_adrs = IICA; + + WREL = 1; + adrs_access_from = reg_adrs; + tx_buf = vreg_ctr_read( reg_adrs ); // f[^̏Ă + state = IIC_TX_OR_RX; + return; + + case ( IIC_TX_OR_RX ): // ̎ɗ銄荞݁BSTȂ瑗MAf[^珑܂ + // if( TRC ) // MtO ŋʂ̂́A荞ݒxɕsN肦 + if( bit_iics_std ) + { // X^[gRfBVotO + // [h + if( bit_iics_coi ) + { // AhXvtO + state = IIC_TX; + // no break, no return // + } + else + { + // X^[gňႤfoCXĂ΂ꂽI + SPIE = 0; + LREL = 1; // EFCg? + state = IIC_IDLE; // I + return; + } + } + else + { + state = IIC_RX; // f[^1oCgM̊荞݂ + // no break, no return // + } + /* FALLTHROUGH */ + + default: // o[Xg R/W łĂ΂邱ƂɂȂ + if( state == IIC_TX ) + { // M + IICA = tx_buf; + vreg_ctr_after_read( reg_adrs, tx_buf ); // ǂ񂾂NAȂǂ̏ + } + else + { // M + rx_buf = IICA; + +#ifdef _I2C_ERR_ABORT_ + if( reg_adrs >= 0x80 || reg_adrs <= 1 ) + { + LREL = 1; // Ȃ񂩃f[^̂ŒʐMI nakԂ̂Ȃc + return; + } +#endif + vreg_ctr_write( reg_adrs, rx_buf ); + WREL = 1; + } + + // WX^AhX̃CNg + /// ANZX|C^i߂ȂȃWX^ + switch( adrs_access_from ) + { + case( VREG_C_ACC_HOSU_HIST ): + case( VREG_C_LED_NOTIFY_DATA ): + case( VREG_C_LED_POW ): + case( VREG_CX_INFO ): + case( VREG_CX_FREE_DATA ): + break; + case( VREG_CX_FREE_ADRS ): + if( reg_adrs == VREG_CX_FREE_ADRS ) + { + reg_adrs = VREG_CX_FREE_DATA; + } + break; + default: + reg_adrs ++; + } + + if( state == IIC_TX ) + { // ɂ‚ɑf[^̏VeINBSPĎgȂȂ + tx_buf = vreg_ctr_read( reg_adrs ); + } + break; + } +} + + + +/********************************************//** +@W[ +@ +@todo twl init Ɠ? +@ +@rbg삪̂łĕsoςȂ + ***********************************************/ +void IIC_ctr_Init( void ) +{ + + IICAEN = 1; + + IICE = 0; /* IICA disable */ + + IICAMK = 1; /* INTIICA disable */ + IICAIF = 0; /* clear INTIICA interrupt flag */ + +// IICAPR0 = 1; /* set INTIICA high priority */ +// IICAPR1 = 0; /* set INTIICA high priority */ X^bNs + + Port &= ~0x03; + + SVA = IIC_C_SLAVEADDRESS; + IICF = 0x01; + + STCEN = 1; // X^[g̋ + IICRSV = 1; // ʐM\Ȃ:X[uɓO + + SPIE = 0; // XgbvRfBVł̊荞݂֎~ + WTIM = 1; // ACKԂclkLɌŒ肷 + ACKE = 1; + + IICWH = 9; + IICWL = 11; // LԂ̒ + + SMC = 1; // [h + DFC = 1; // fW^tB^on (@fast mode) + + IICAMK = 0; // 荞݂ + + IICE = 1; + + PortMode &= ~0x03; + + state = IIC_IDLE; +} + + + +/********************************************//** + + ***********************************************/ +void IIC_ctr_Stop( void ) +{ + IICE = 0; /* IICA disable */ + IICAEN = 0; +} + + + diff --git a/branches/IS_capture/i2c_ctr.h b/branches/IS_capture/i2c_ctr.h new file mode 100644 index 0000000..16234ff --- /dev/null +++ b/branches/IS_capture/i2c_ctr.h @@ -0,0 +1,210 @@ +#ifndef _MDSERIAL_A_ +#define _MDSERIAL_A_ + + +/* IIC operation enable (IICE0) */ +#define IIC0_OPERATION 0x80 +#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */ +#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */ + +/* Exit from communications (LREL0) */ +#define IIC0_COMMUNICATION 0x40 +#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */ +#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */ + +/* Wait cancellation (WREL0) */ +#define IIC0_WAITCANCEL 0x20 +#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */ +#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */ + +/* Generation of interrupt when stop condition (SPIE0) */ +#define IIC0_STOPINT 0x10 +#define IIC0_STOPINT_DISABLE 0x00 /* disable */ +#define IIC0_STOPINT_ENABLE 0x10 /* enable */ + +/* Wait and interrupt generation (WTIM0) */ +#define IIC0_WAITINT 0x08 +#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */ +#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */ + +/* Acknowledgement control (ACKE0) */ +#define IIC0_ACK 0x04 +#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */ +#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */ + +/* Start condition trigger (STT0) */ +#define IIC0_STARTCONDITION 0x02 +#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */ +#define IIC0_START_GENERATE 0x02 /* generate start condition */ + +/* Stop condition trigger (SPT0) */ +#define IIC0_STOPCONDITION 0x01 +#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */ +#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */ + +/* + IIC Status Register 0 (IICS0) +*/ +/* Master device status (MSTS0) */ +#define IIC0_MASTERSTATUS 0x80 +#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */ +#define IIC0_STATUS_MASTER 0x80 /* master device communication status */ + +/* Detection of arbitration loss (ALD0) */ +#define IIC0_ARBITRATION 0x40 +#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */ +#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */ + +/* Detection of extension code reception (EXC0) */ +#define IIC0_EXTENSIONCODE 0x20 +#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */ +#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */ + +/* Detection of matching addresses (COI0) */ +#define IIC0_ADDRESSMATCH 0x10 +#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */ +#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */ + +/* Detection of transmit/receive status (TRC0) */ +#define IIC0_STATUS 0x08 +#define IIC0_STATUS_RECEIVE 0x00 /* receive status */ +#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */ + +/* Detection of acknowledge signal (ACKD0) */ +#define IIC0_ACKDETECTION 0x04 +#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */ +#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */ + +/* Detection of start condition (STD0) */ +#define IIC0_STARTDETECTION 0x02 +#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */ +#define IIC0_START_DETECTED 0x02 /* start condition detected */ + +/* Detection of stop condition (SPD0) */ +#define IIC0_STOPDETECTION 0x01 +#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */ +#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */ + +/* + IIC Flag Register 0 (IICF0) +*/ +/* STT0 clear flag (STCF) */ +#define IIC0_STARTFLAG 0x80 +#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */ +#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */ + +/* IIC bus status flag (IICBSY) */ +#define IIC0_BUSSTATUS 0x40 +#define IIC0_BUS_RELEASE 0x00 /* bus release status */ +#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */ + +/* Initial start enable trigger (STCEN) */ +#define IIC0_STARTWITHSTOP 0x02 +#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */ +#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */ + +/* Communication reservation function disable bit (IICRSV) */ +#define IIC0_RESERVATION 0x01 +#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */ +#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */ + +/* + IIC clock selection register 0 (IICCL0) +*/ +#define IICCL0_INITIALVALUE 0x00 +/* Detection of SCL0 pin level (CLD0) */ +#define IIC0_SCLLEVEL 0x20 +#define IIC0_SCL_LOW 0x00 /* clock line at low level */ +#define IIC0_SCL_HIGH 0x20 /* clock line at high level */ + +/* Detection of SDA0 pin level (DAD0) */ +#define IIC0_SDALEVEL 0x10 +#define IIC0_SDA_LOW 0x00 /* data line at low level */ +#define IIC0_SDA_HIGH 0x10 /* data line at high level */ + +/* Operation mode switching (SMC0) */ +#define IIC0_OPERATIONMODE 0x08 +#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */ +#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */ + +/* Digital filter operation control (DFC0) */ +#define IIC0_DIGITALFILTER 0x04 +#define IIC0_FILTER_OFF 0x00 /* digital filter off */ +#define IIC0_FILTER_ON 0x04 /* digital filter on */ + +/* Operation mode switching (CL01, CL00) */ +#define IIC0_CLOCKSELECTION 0x03 + +/* Combine of (SMC0, CL01, CL00)*/ +#define IIC0_CLOCK0 0x00 +#define IIC0_CLOCK1 0x01 +#define IIC0_CLOCK2 0x02 +#define IIC0_CLOCK3 0x03 +#define IIC0_CLOCK4 0x08 +#define IIC0_CLOCK5 0x09 +#define IIC0_CLOCK6 0x0a +#define IIC0_CLOCK7 0x0b + +/* + IIC function expansion register 0 (IICX0) +*/ +/* IIC clock expension (CLX0) */ +#define IIC0_CLOCKEXPENSION 0x01 +#define IIC0_EXPENSION0 0x00 +#define IIC0_EXPENSION1 0x01 + +/* Operation clock (CLX0, SMC0, CL01, CL00) + | IIC0_EXPENSION0 | IIC0_EXPENSION1 | +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw) + | fprs/88 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw) + | fprs/172 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw) + | fprs/344 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw) + | fw/66 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw) + | fprs/48 | fprs/24 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw) + | fprs/48 | fprs/24 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw) + | fprs/96 | fprs/48 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw) + | fw/18 | | transfer clock + | high speed | | mode +------------|-------------------|-------------------|---------------------- +*/ + +#define ADDRESS_COMPLETE 0x80 +#define IIC_MASTER_FLAG_CLEAR 0x00 + +/****************************************************************************** + * Macro define + ******************************************************************************/ + + + +/****************************************************************************** + * Function define + ******************************************************************************/ + +void IIC_ctr_Init( void ); +void IIC_ctr_Stop( void ); + + +#endif diff --git a/branches/IS_capture/i2c_mcu-sub.c b/branches/IS_capture/i2c_mcu-sub.c new file mode 100644 index 0000000..b1b468c --- /dev/null +++ b/branches/IS_capture/i2c_mcu-sub.c @@ -0,0 +1,124 @@ +/* ======================================================== + ȈI2CiytFgpjʐM + de JHL cJZ + '09 Feb - + $Id: $ + ======================================================== */ +#ifndef _WIN32 +#pragma sfr +#pragma di +#pragma ei +#pragma nop +#pragma inline // memcpy()CCWJ(̕I) +#endif + +#include "incs.h" +#include "i2c_mcu.h" +#include "loader.h" +#include "util_funcs.h" + +#include "i2c_mcu_sub.h" +#include "pm.h" /// 肽ȂcCODEC̃WX^Ђ + + +// ======================================================== +// [NAEhp +static void iic_mcu_simple_dummy_write(); +static i2c_err iic_mcu_codec_write_low( u8 adrs, u8 dat ); + +// i2c_mcu.c ɂ +extern void iic_mcu_send_re_st( ); +extern void iic_mcu_send_sp( ); +extern i2c_err iic_mcu_send_a_byte( u8 ); +extern i2c_err iic_mcu_call_slave( u8 slave ); + + +/* + yamaha codecspӂɊ荞݂邱Ƃ邪A^XNo^ + ۂɓǂݏoƂɂ͏߂Ȃ̂ʼnȂ悤ɓ͂ +*/ + +/********************************************//** + R[fbN wPoCgx Cg + + iic_mcu_write_a_byte CODECs[NAEh + ***********************************************/ +#define YAMAHA_CODEC_ERRATA_CHECK_MASK ( 0x7D ) +i2c_err iic_mcu_write_a_byte_codec( u8 adrs, u8 dat ) +{ + u8 pm_reg_original; + i2c_err rv; + + // }ncodec[NAEh SPIƂ̋pWX^̒g擾 + if(( rv = iic_mcu_read( IIC_SLA_CODEC, CODEC_REG_PM, 1, &pm_reg_original )) != I2C_ERR_OK ) + { + return( rv ); + } + // phase1 ܂ + + // ݁I + if( ( rv = iic_mcu_codec_write_low( adrs, dat ) ) != I2C_ERR_OK ) + { + return( rv ); + } + + // }ncodec[NAEh + if( ( pm_reg_original & YAMAHA_CODEC_ERRATA_CHECK_MASK ) == 0 ) // ͂߂狤LWX^0eXgȂ + // (& ZbgvĂǂZbĝ) + { + return( I2C_ERR_OK ); + } + + { + // LWX^ 0x00 ɏĂ(Gb^I)悤Ȃ珑߂ + u8 pm_reg_after; + + if(( rv = iic_mcu_read( IIC_SLA_CODEC, CODEC_REG_PM, 1, &pm_reg_after )) != I2C_ERR_OK ) + { + return( rv ); + } + + if( ( pm_reg_after & YAMAHA_CODEC_ERRATA_CHECK_MASK ) != 0x00 ) + { + // RtNg͂Ȃ or ZbgvȂ + return( I2C_ERR_OK ); + } + + // else { + rv = iic_mcu_codec_write_low( CODEC_REG_PM, pm_reg_original ); // ߂Aă`FbN͂Ȃ + return ( rv ); // G[Ԃ邱Ƃ邩 + // gCȂǂ͖ + } + return( rv ); // no reach // +} + + +static i2c_err iic_mcu_codec_write_low( u8 adrs, u8 dat ) +{ + IICMK10 = 1; // DMApISRɔ΂Ȃ߂Ƀ}XN + if( iic_mcu_call_slave( IIC_SLA_CODEC ) != I2C_ERR_OK ) + { + iic_mcu_busy = false; + return ( I2C_ERR_NOSLAVE ); + } + iic_mcu_send_a_byte( adrs ); + iic_mcu_send_a_byte( dat ); + + // TI[NAEh + codec_dummy_write(); + + iic_mcu_send_sp( ); + iic_mcu_busy = false; + return( I2C_ERR_OK ); +} + + +// re-stŃ_~[Cg +void codec_dummy_write() +{ + iic_mcu_send_re_st( ); + iic_mcu_send_a_byte( IIC_SLA_CODEC ); // _~[Cg + iic_mcu_send_a_byte( 0x20 ); // S~ĂȂAhX + iic_mcu_send_a_byte( 0xAA ); // ł悢 +} + diff --git a/branches/IS_capture/i2c_mcu.c b/branches/IS_capture/i2c_mcu.c new file mode 100644 index 0000000..db007b3 --- /dev/null +++ b/branches/IS_capture/i2c_mcu.c @@ -0,0 +1,657 @@ +/* ======================================================== + ȈI2CiytFgpjʐM + de JHL cJZ + '09 Feb - + $Id$ + ======================================================== */ +#ifndef _WIN32 +#pragma sfr +#pragma di +#pragma ei +#pragma nop +#pragma inline // memcpy()CCWJ(̕I) +#endif + +#include "incs_loader.h" +#include "i2c_mcu.h" +#include "loader.h" +#include "util_funcs.h" + +#include "i2c_mcu_sub.h" + + + +// ======================================================== +// WX^̃rbg +// vtBbNXbAꕔ̃rbgWX^ɂԂ邽... +// SMR0n +#define bCKS0 ( 1 << 15 ) +#define bCCS0 ( 1 << 14 ) +#define bSTS0 ( 1 << 8 ) +#define bSIS0 ( 1 << 6 ) +#define bMD0n2 ( 1 << 2 ) +#define bMD0n1 ( 1 << 1 ) +#define bMD0n0 ( 1 << 0 ) +#define bSMR0n_FIXEDBIT ( 1 << 5 ) + +// SSR0n +#define bit_TSF0 6 +#define PEF0 ( 1 << 1 ) + +// SIR0n +#define PECT0 ( 1 << 1 ) + +// SCR0n +#define TXE0 ( 1 << 15 ) +#define RXE0 ( 1 << 14 ) +#define SLC02 4 +#define DLS02 0 +#define TSF0 ( 1 << 6 ) + +// SOn +#define TAUS_MASK 0x0B0B; + +// DMCn +#define DRS ( 1 << 6 ) + + + + +// ======================================================== +static void iic_mcu_send_st( ); + +// *sub炵Ă΂Ȃ +void iic_mcu_send_re_st( ); +void iic_mcu_send_sp( ); +i2c_err iic_mcu_send_a_byte( u8 ); +i2c_err iic_mcu_call_slave( u8 slave ); + + +// ======================================================== +bit iic_mcu_wo_dma; +volatile bit iic_mcu_busy; +static volatile bit iic_mcu_initialized; + + +static u8 iic_send_work[4]; +static u8 *p_iic_send_wo_dma_dat; +static u8 iic_send_wo_dma_len; + +// f[^G[iROHMxZTjgĈ +/// Ƃ肠ADMAgp}`oCgCg ̎ɂ@\Ȃ +static u8 last_slave, last_reg_adrs, last_size; + +i2c_err iic_mcu_result; // ꕶ[h̎̓f[^ԂB + +#ifdef i2c_timeout_test +extern bit i2c_mcu_time_out_error; +#endif + + + +/********************************************//** + + ***********************************************/ +void nop8() +{ + // ɗ call 3clk, return 6clk +} + + +/********************************************//** + ̒ʐMÎ҂B + + ^CAEgL + ***********************************************/ +static i2c_err iic_mcu_wait_free() +{ + u16 tot = 0; + + iic_mcu_start( ); + while( 1 ) + { + DI_wt_chk(); + if( !iic_mcu_busy ) + { + iic_mcu_busy = true; + EI(); + break; + } + EI(); + if( ++tot == 0 ) + { +#ifdef i2c_timeout_test + i2c_mcu_time_out_error = true; +#endif + return( I2C_ERR_TIMEOUT ); + } + } + return( I2C_ERR_OK ); +} + + + +/********************************************//** + X[u w1x [h + + Ԓlf[^̂̂łB + + G[R[h iic_mcu_result ɓĂ܂ + ***********************************************/ +u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs ) +{ + u8 dat; + + iic_mcu_result = iic_mcu_read( SLA, adrs, 1, &dat ); + + return ( dat ); +} + + + +/********************************************//** + X[ũ[h + + yz + + X[uEFCgRfBVoƂ͋֎~łB + + ̏ꍇłG[oȂǂł܂ + ***********************************************/ +i2c_err iic_mcu_read( u8 slave, u8 adrs, u8 len, u8 * dest ) +{ + +#if 1 + if( iic_mcu_wait_free() != I2C_ERR_OK ) + { + // (^CAEg) + return( I2C_ERR_TIMEOUT ); + } +#else + // gpȂA +#endif + + // X^[gRfBVƃX[ǔĂяoAWX^AhX̑M + if( iic_mcu_call_slave( slave ) != 0 ) + { + iic_mcu_busy = false; + return ( I2C_ERR_NOSLAVE ); + } + + // WX^AhX̑M + iic_mcu_send_a_byte( adrs ); // I܂ŋAĂȂ + + // ΂NAKAĂȂO + + // f[^M // + iic_mcu_send_re_st( ); // X^[gRfBV + iic_mcu_send_a_byte( slave | 0x01 ); // M܂Ŗ߂Ă܂B + + // f[^M + ST0 = 0x0004; // M[hɐݒς̂ŃWbN~ + SCR02 = RXE0 | 1 << SLC02 | 7 << DLS02; // Mݒ + SS0 = 0x0004; // ʐMҋ@ + + do + { + if( len == 1 ) + { + SOE0 = 0x0000; // ŌNAK + } + IICIF10 = 0; + SIO10 = 0xFF; // _~[f[^ƎMJn + while( IICIF10 == 0 ) + {;} // M҂ + + *dest = SIO10; + dest++; + len--; + } + while( len != 0 ); + + if( slave == IIC_SLA_CODEC ) + { + codec_dummy_write(); + } + + iic_mcu_send_sp( ); + + IICIF10 = 0; + iic_mcu_busy = false; + return ( I2C_ERR_OK ); +} + + + + +/********************************************//** + X[u wPoCgx Cg + + O̓]Î҂āACg܂B + + Ԓl@iic_mcu_write@ɓ + ***********************************************/ +i2c_err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat ) +{ + // P̎DMAƂNȂłƏI点 + if( iic_mcu_wait_free() != I2C_ERR_OK ) + { + return( I2C_ERR_TIMEOUT ); + } + + // X^[gRfBVƃX[ǔĂяo... + IICMK10 = 1; + if( iic_mcu_call_slave( SLA ) != I2C_ERR_OK ) + { + iic_mcu_busy = false; + return( I2C_ERR_NOSLAVE ); + } + iic_mcu_send_a_byte( adrs ); + iic_mcu_send_a_byte( dat ); + iic_mcu_send_sp( ); + iic_mcu_busy = false; + return ( I2C_ERR_OK ); +} + + + +/********************************************//** + X[uփCg + + WX^ adrs 擪ɁA + + *str + + len܂B + + yz + + X[uEFCgRfBVoƂ͋֎~łB + + ̏ꍇłG[oȂǂł܂ + + DMA1gp܂B + ***********************************************/ +i2c_err iic_mcu_write( u8 slave, u8 adrs, u8 len, void * src ) +{ + if( iic_mcu_wait_free() != I2C_ERR_OK ) + { + return( I2C_ERR_TIMEOUT ); + } +#if 0 // renge^̃}`^XNɂȂłɂ + // gpȂA +#endif + + // X^[gRfBVƃX[ǔĂяo... + IICMK10 = 1; + IICIF10 = 0; + if( iic_mcu_call_slave( slave ) != I2C_ERR_OK ) + { + iic_mcu_busy = false; + return ( I2C_ERR_NOSLAVE ); + } + + IICIF10 = 0; + if( !iic_mcu_wo_dma ) + { + // DMAgpiʏj// + + // WX^AhX𑗂Af[^̏ + memcpy( iic_send_work, src, 4 ); //obt@Ƃ4oCgpӂĖ߁B + + // gĈ + last_slave = slave; + last_reg_adrs = adrs; + last_size = len; + + // DMAZbg + while( DST1 ) + {;} + + DEN1 = 1; + DSA1 = (u8)( &SIO10 ); + DRA1 = (u16)( &iic_send_work[0] ); + DBC1 = len; + DMC1 = DRS | 8; // RAM -> SFR, 8bit, IRQ, IIC10 + + DMAIF1 = 0; + DMAMK1 = 0; + DST1 = 1; // DEN1 = 12clkȏJ + + SIO10 = adrs; // ςȂI 荞݂DMAX^[g + // c͊荞݃[` + } + else + { + // DMAgpȂ // + + // WX^AhX̑M + IICMK10 = 0; + SIO10 = adrs; + + iic_send_wo_dma_len = len; + p_iic_send_wo_dma_dat = (u8*)src; + // c͊荞݃[` + } + + return ( I2C_ERR_OK ); +} + + + + +/********************************************//** + DMAP]I荞 + + IIC_mcu ̑MR[obN֐̂悤Ȃ + + FDMA]IŁAI2C̓]͏IĂ܂ + +@ 荞ݒȂǂŁADMA1̏xꍇA + IIC10̊荞݂̏łɁA荞݂𔭐ȂȂ + ꂪ܂B܂A@ɂ܂B + + @̂߁ADMAdl̍ق́AŌ̃oCg͑M + tÕ|[OŊmF܂B + ***********************************************/ +__interrupt void int_dma1( ) +{ + static bit in_retry; + + EI(); + + // Ō̃oCg̑M҂ + while( ( SSR02L & TSF0 ) != 0 ) + { + u16 i = 0; + if( ++i == 0 ) // ^CAEgH + { + break; + } + } + + // XgbvRfBVs +// iic_mcu_send_sp(); // ISRŊO̊֐ĂԂ͓̂siėpWX^ҔĵœWJ + { + ST0 = 0x0004; + SOE0 = 0; // M̎͂ƑOɁuvݒ肵ĂB(NACKo) + SO0 = 0x0000 | TAUS_MASK; // SCL + nop8(); //. |ȂBO̊֐Ă +/* + NOP(); NOP(); NOP(); NOP(); + NOP(); NOP(); NOP(); NOP(); +*/ + SO0 = 0x0400 | TAUS_MASK; // SCL + nop8(); +/* + NOP(); NOP(); NOP(); NOP(); + NOP(); NOP(); NOP(); NOP(); +*/ + SO0 = 0x0404 | TAUS_MASK; + } + + IICMK10 = 1; + + // f[^̓r NAK AxgCB + /// 蔲 + if( SIR02 != 0 ) + { + SIR02 = SSR02; + + if( !in_retry ) + { + in_retry = true; + + IICIF10 = 0; + iic_mcu_call_slave( last_slave ); // NAK͍mPA + + while( DST1 ){;} + DRA1 = (u16)( &iic_send_work[0] ); // CNgĂ܂Ă̂ōăZbg + DBC1 = last_size; // fNgĂ܂Ă̂ōăZbg + // ق̐ݒ͑Ô܂ + + DMAIF1 = 0; + DMAMK1 = 0; + DST1 = 1; + + SIO10 = last_reg_adrs; // ςȂI 荞݂DMAX^[g + return; + // ܂ + } + else + { + // G[xځBmȂ + dbg_nop(); + // ̂܂܏I + } + } + + // I + in_retry = false; + DMAMK1 = 1; + DEN1 = 0; + iic_mcu_busy = false; +} + + + +/********************************************//** + IIC MCŨoCgo荞 + + DMAgp͎gp܂B + + @̊荞ݏDMÅ荞݂ɂ΂ȂꍇA + @IIC荞݂̃ZbgԂɍ킸邱Ƃ܂B + ***********************************************/ +__interrupt void int_iic10( ) +{ + EI(); + if( iic_send_wo_dma_len != 0 ) // ܂MĂȂH + { + SIO10 = *p_iic_send_wo_dma_dat; + p_iic_send_wo_dma_dat ++; + iic_send_wo_dma_len --; + return; + // ܂ // + } + + // Ō̃oCgMAXgbvRfBVs + IICMK10 = 1; +// iic_mcu_send_sp(); // ISRŊO̊֐ĂԂ͓̂siėpWX^ҔĵœWJ + { + ST0 = 0x0004; + SOE0 = 0; // M̎͂ƑOɁuvݒ肵ĂB(NACKo) + SO0 = 0x0000 | TAUS_MASK; // clear SCL + NOP(); NOP(); NOP(); NOP(); // NOP8Ăł͂ + NOP(); NOP(); NOP(); NOP(); + SO0 = 0x0400 | TAUS_MASK; // set SCL + NOP(); NOP(); NOP(); NOP(); + NOP(); NOP(); NOP(); NOP(); + SO0 = 0x0404 | TAUS_MASK; // set CSL adn SDA + } + + iic_mcu_wo_dma = false; + iic_mcu_busy = false; +} + + + +/********************************************//** + X[ǔĂяo + +@X[uAhXĂŁAACK̊mFB + + ACK@@@@@@@@@@@@@@@@@@ԁFI2C_ERR_OK + +@NACK @XgbvRfBVoB@ԁFI2C_ERR_NOSLAVE + ***********************************************/ +i2c_err iic_mcu_call_slave( u8 slave ) +{ + iic_mcu_send_st( ); + +/* +// dbg + if( SSR02 != 0 ) + { + P1.5 = P1.0 = P1.3 = 1; + } +*/ + + SIR02 = SSR02; // NAKG[̃tONA + if( iic_mcu_send_a_byte( slave ) != I2C_ERR_OK ) + { + iic_mcu_send_sp( ); + return ( I2C_ERR_NOSLAVE ); // w̃X[uȂ + } + + return ( I2C_ERR_OK ); +} + + + +/********************************************//** + قƂɂPoCĝ + + I܂ŋA܂ + ***********************************************/ +i2c_err iic_mcu_send_a_byte( u8 dat ) +{ + IICMK10 = 1; + IICIF10 = 0; + SIO10 = dat; + while( IICIF10 == 0 ) + { +// NOP( ); + } // ʐM + + if( SSR02 != 0 ) // 炩G[? + { + SIR02 = SSR02; // G[NA + return( I2C_ERR_NAK ); + } + return( I2C_ERR_OK ); +} + + + +/********************************************//** + X^[gRfBV𔭍s + + \tgEFA + ***********************************************/ +static void iic_mcu_send_st( ) +{ + SO0 &= ~0x0004; // SDA + nop8(); + + SO0 &= ~0x0400; // SCL + SOE0 = 0x0004; // n[h + + SCR02 = TXE0 | 1 << SLC02 | 7 << DLS02; // MAf[^͂WrbgP + SS0 = 0x0004; // ʐMҋ@ +} + + + +/********************************************//** + X^[gs + ***********************************************/ +void iic_mcu_send_re_st( ) +{ + ST0 |= 0x0004; + SO0 |= 0x0400 | TAUS_MASK; // ( SDA = H ), SCL -> H + nop8(); + + SOE0 &= ~0x0004; // ( SCL = H ), SDA -> L + nop8(); + + iic_mcu_send_st( ); +} + + + +/********************************************//** + XgbvRfBVs + + ̑OɁAuŌ̃oCg̑Mv̎ɑOKvłB + ***********************************************/ +void iic_mcu_send_sp( ) +{ + ST0 = 0x0004; + SOE0 = 0; // M̎͂ƑOɁuvݒ肵ĂB(NACKo) + SO0 = 0x0000 | TAUS_MASK; // SCL + nop8(); + + SO0 = 0x0400 | TAUS_MASK; // SCL + nop8(); + + SO0 = 0x0404 | TAUS_MASK; +} + + + + +/********************************************//** + ytFW[̏ + ***********************************************/ +void iic_mcu_start( ) +{ + if( iic_mcu_initialized ) + { + return; + } + + iic_mcu_busy = true; +// DST1 = 0; + + I2C_PU_on(); +// DEN1 = 0; // DST1 = 0 2clḱADSTn==0|[OĂ + + wait_ms( 1 ); // オ̂50usʂ + + SAU0EN = 1; + nop8(); + + SPS0 = 0x0000; // VAjbg̃NbNOB(8M/2)/1 + SMR02 = bSMR0n_FIXEDBIT | bMD0n2; // ȈI2Cɐݒ + SDR02 = 10 << 9; // {[[gݒ 8M/1/(x+1)/2 + + SO0 = 0x0404 | TAUS_MASK; // ŏHH + iic_mcu_wo_dma = false; + + + // oX̃Zbg + { + IICIF10 = 0; + IICMK10 = 1; + + iic_mcu_send_st(); + + SIO10 = 0xFF; + while( IICIF10 == 0 ){;} // ʐM + iic_mcu_send_sp(); + + SIR02 = SSR02; + } + + iic_mcu_busy = false; + iic_mcu_initialized = true; +} + + + +/********************************************//** + W[̒~ + + ēxgƂ͏Kv + ***********************************************/ +void iic_mcu_stop( ) +{ + while( iic_mcu_busy ) + {;} // DMA쒆͂҂ + iic_mcu_send_re_st( ); // SCL,SDALLɂ + I2C_PU_off(); + SAU0EN = 0; + iic_mcu_initialized = false; +} + diff --git a/branches/IS_capture/i2c_mcu.h b/branches/IS_capture/i2c_mcu.h new file mode 100644 index 0000000..16eeba8 --- /dev/null +++ b/branches/IS_capture/i2c_mcu.h @@ -0,0 +1,40 @@ +#ifndef __ic2_mcu__ +#define __ic2_mcu__ + + +// ======================================================== +typedef enum{ + I2C_ERR_OK = 0, + I2C_ERR_NAK, + I2C_ERR_NOSLAVE, + I2C_ERR_TIMEOUT, + I2C_ERR_UNDEF = 0xFF +}i2c_err; + + + +// ======================================================== +extern volatile bit iic_mcu_busy; +extern bit iic_mcu_wo_dma; + +extern i2c_err iic_mcu_result; + + +// ======================================================== +i2c_err iic_mcu_read( u8 SLA, u8 adrs, u8 len, u8 * dest ); +u8 iic_mcu_read_a_byte( u8 SLA, u8 adrs ); + +i2c_err iic_mcu_write( u8 SLA, u8 adrs, u8 len, void * src ); +i2c_err iic_mcu_write_a_byte( u8 SLA, u8 adrs, u8 dat ); + +i2c_err iic_mcu_write_a_byte_codec( u8 adrs, u8 dat ); // codecoO@\t + + +// ̒ʐM܂B +#define iic_mcu_set_wo_dma() { while( iic_mcu_busy ){;} iic_mcu_wo_dma = true; } + +void iic_mcu_start( ); +void iic_mcu_stop( ); + + +#endif diff --git a/branches/IS_capture/i2c_mcu_sub.h b/branches/IS_capture/i2c_mcu_sub.h new file mode 100644 index 0000000..a2c192e --- /dev/null +++ b/branches/IS_capture/i2c_mcu_sub.h @@ -0,0 +1,9 @@ +#ifndef __ic2_mcu_sub__ +#define __ic2_mcu_sub__ + +// $Id: asdf$ + +i2c_err iic_mcu_write_a_byte_codec( u8 adrs, u8 dat ); +void codec_dummy_write( void ); + +#endif diff --git a/branches/IS_capture/i2c_twl.c b/branches/IS_capture/i2c_twl.c new file mode 100644 index 0000000..3c91ce8 --- /dev/null +++ b/branches/IS_capture/i2c_twl.c @@ -0,0 +1,246 @@ +/* ======================================================== + TWL ݊I2C + + $Id: i2c_twl.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 + +#pragma sfr /* @\WX^gp */ + +#endif + + +/*============================================================================*/ +#ifndef _WIN32 +# pragma interrupt INTIICA0 int_iic_twl RB2 +#endif + +#include "incs_loader.h" +#include "i2c_twl_defs.h" +#include "i2c_twl.h" +#include "vreg_twl.h" +#include "WDT.h" + + +#ifdef _MCU_BSR_ +//#ifdef _MODEL_TS0_ || _MODEL_WM0_ + +// [LOfI2Ct +#define ACKD ACKD0 +#define ACKE ACKE0 +#define COI COI0 +#define IICAEN IICA0EN +#define IICRSV IICRSV0 +#define IICA IICA0 +#define IICAIF IICAIF0 +#define IICAMK IICAMK0 +#define IICAPR0 IICAPR00 +#define IICAPR1 IICAPR10 +#define IICCTL0 IICCTL00 +#define IICE IICE0 +#define IICF IICF0 +#define IICS IICS0 +#define IICWH IICWH0 +#define IICWL IICWL0 +#define LREL LREL0 +#define SPD SPD0 +#define SPIE SPIE0 +#define STCEN STCEN0 +#define STD STD0 +#define SVA SVA0 +#define WREL WREL0 +#define WTIM WTIM0 +#define SMC SMC0 +#define TRC TRC0 +#define DFC DFC0 +#define PortMode PM6 +#define Port P6 + +#endif // _MCU_BSR_ + +#ifndef _MCU_BSR_ + +// ke3̎̓_~[֐ +void IIC_twl_Stop( void ) +{ +} +void IIC_twl_Init( void ) +{ +} +#else // _MCU_BSR_ + + + +enum IIC_TWL_STATE{ + WAIT_ADRS = 0, + WAIT_DATA, + DATA_READED +}; + + + + +/*============================================================================*/ + +// I@̓}NȂ̂ŁAreturn̓C[vɖ߂܂B +#define wait_next { \ + tot = 0; \ + while( IICAIF != 1 ){ \ + tot ++; \ + if( tot == 0 ){ \ + LREL = 1; \ + return; \ + } \ + } \ +} + + +/********************************************//** + isr + + TWL̓EFCg𗝉ĂꂸA܂Ao[XgR/W + ȂłĂ̂ŁAXgbvRfBV܂ňCɂĂ܂B + ***********************************************/ +__interrupt void int_iic_twl( ) +{ + u8 vreg_adrs; + u8 state; + + // @ + WREL = 1; // EFCgĎ̃oCg҂ + WDT_Restart(); + state = WAIT_ADRS; + + while( 1 ) + { + u8 my_iics; + + { + u16 tot; + wait_next; // PoCgM҂ + } + + my_iics = IICS; + IICAIF = 0; + + if( my_iics & 0x02 ) // ( STD && !SPD ) + { + // X^[gRfBV + if( ( my_iics & 0x08 ) == 0 ) // ( TRC ) MtO 0:}CRM + { + // @f}CRłATWLgCƂƂ + // ɗ̂̓X[uĂяo̎ // + WREL = 1; + state = WAIT_ADRS; + /// WX^AhX̂҂ + } + else + { + // BR Rł̃X[uĂяo(X^[gRfBV) // + IICA = vreg_twl_read( vreg_adrs ); // f[^M + // Xgbv҂ALREL = 1 ɂȂƁAMobt@j󂳂邱Ƃ + state = DATA_READED; + } + } + else if( ( my_iics & 0x03 ) == 0 ) // ( !STD && !SPD ) + { + u8 rcvd; + + // 炩M + rcvd = IICA; + WREL = 1; + + if( state == WAIT_ADRS ) + { + // A + vreg_adrs = adrs_table_twl_ext2int( rcvd ); + /// f[^邩AX^[gœǂݏô҂ + state = WAIT_DATA; + } + else if( state == DATA_READED ) + { + // f[^1oCgM㔭 + LREL = 1; + return; + } + else + { + // BW + // f[^܂ + SVA = 0x5A; // _~[ + LREL = 1; // X^[gRfBV҂(AݖΉ̂) + vreg_twl_write( vreg_adrs, rcvd ); + SVA = IIC_T_SLAVEADDRESS; + return; // M܂ // + } + } + else if( my_iics & 0x01 ) // SPD + { + // I + LREL = 1; + return; + } + else + { + // NOP(); + } + } +} + + + +/********************************************//** + W[ + ***********************************************/ +void IIC_twl_Init( void ) +{ + + IICAEN = 1; + + IICE = 0; /* IICA disable */ + + IICAMK = 1; /* INTIICA disable */ + IICAIF = 0; /* clear INTIICA interrupt flag */ + + IICAPR0 = 0; /* set INTIICA high priority */ + IICAPR1 = 0; /* set INTIICA high priority */ + Port &= ~0x03; + + SVA = IIC_T_SLAVEADDRESS; + IICF = 0x01; + + STCEN = 1; // X^[g̋ + IICRSV = 1; // ʐM\Ȃ:X[uɓO + + SPIE = 0; // XgbvRfBVł̊荞݂֎~ + WTIM = 1; // ACKԂclkLɌŒ肷 + ACKE = 1; // _CPU͖Ď̒ʐM͂߂邩ȂőclkJȂƂȂ + + IICWH = 9; + IICWL = 11; // LԂ̒iHj + + SMC = 1; + DFC = 1; // fW^tB^on (@fast mode) + + IICAMK = 0; // 荞݂ + + IICE = 1; + + PortMode &= ~0x03; + + LREL = 1; +} + + + +/********************************************//** + W[~ + ***********************************************/ +void IIC_twl_Stop( void ) +{ + IICE = 0; /* IICA disable */ + IICAEN = 0; +} + + +#endif diff --git a/branches/IS_capture/i2c_twl.h b/branches/IS_capture/i2c_twl.h new file mode 100644 index 0000000..0f608b0 --- /dev/null +++ b/branches/IS_capture/i2c_twl.h @@ -0,0 +1,7 @@ +#ifndef _iic_twl_ +#define _iic_twl_ + +void IIC_twl_Init( void ); +void IIC_twl_Stop( void ); + +#endif diff --git a/branches/IS_capture/i2c_twl_defs.h b/branches/IS_capture/i2c_twl_defs.h new file mode 100644 index 0000000..be5d566 --- /dev/null +++ b/branches/IS_capture/i2c_twl_defs.h @@ -0,0 +1,196 @@ +#ifndef _MDSERIAL_ +#define _MDSERIAL_ + + +/* IIC operation enable (IICE0) */ +#define IIC0_OPERATION 0x80 +#define IIC0_OPERATION_DISABLE 0x00 /* stop operation */ +#define IIC0_OPERATION_ENABLE 0x80 /* enable operation */ + +/* Exit from communications (LREL0) */ +#define IIC0_COMMUNICATION 0x40 +#define IIC0_COMMUNICATION_NORMAL 0x00 /* normal operation */ +#define IIC0_COMMUNICATION_EXIT 0x40 /* exit from current communication */ + +/* Wait cancellation (WREL0) */ +#define IIC0_WAITCANCEL 0x20 +#define IIC0_WAIT_NOTCANCEL 0x00 /* do not cancel wait */ +#define IIC0_WAIT_CANCEL 0x20 /* cancel wait */ + +/* Generation of interrupt when stop condition (SPIE0) */ +#define IIC0_STOPINT 0x10 +#define IIC0_STOPINT_DISABLE 0x00 /* disable */ +#define IIC0_STOPINT_ENABLE 0x10 /* enable */ + +/* Wait and interrupt generation (WTIM0) */ +#define IIC0_WAITINT 0x08 +#define IIC0_WAITINT_CLK8FALLING 0x00 /* generate at the eighth clocks falling edge */ +#define IIC0_WAITINT_CLK9FALLING 0x08 /* generated at the ninth clocks falling edge */ + +/* Acknowledgement control (ACKE0) */ +#define IIC0_ACK 0x04 +#define IIC0_ACK_DISABLE 0x00 /* enable acknowledgement */ +#define IIC0_ACK_ENABLE 0x04 /* disable acknowledgement */ + +/* Start condition trigger (STT0) */ +#define IIC0_STARTCONDITION 0x02 +#define IIC0_START_NOTGENERATE 0x00 /* do not generate start condition */ +#define IIC0_START_GENERATE 0x02 /* generate start condition */ + +/* Stop condition trigger (SPT0) */ +#define IIC0_STOPCONDITION 0x01 +#define IIC0_STOP_NOTGENERATE 0x00 /* do not generate stop condition */ +#define IIC0_STOP_GENERATE 0x01 /* generate stop condition */ + +/* + IIC Status Register 0 (IICS0) +*/ +/* Master device status (MSTS0) */ +#define IIC0_MASTERSTATUS 0x80 +#define IIC0_STATUS_NOTMASTER 0x00 /* slave device status or communication standby status */ +#define IIC0_STATUS_MASTER 0x80 /* master device communication status */ + +/* Detection of arbitration loss (ALD0) */ +#define IIC0_ARBITRATION 0x40 +#define IIC0_ARBITRATION_NO 0x00 /* arbitration win or no arbitration */ +#define IIC0_ARBITRATION_LOSS 0x40 /* arbitration loss */ + +/* Detection of extension code reception (EXC0) */ +#define IIC0_EXTENSIONCODE 0x20 +#define IIC0_EXTCODE_NOT 0x00 /* extension code not received */ +#define IIC0_EXTCODE_RECEIVED 0x20 /* extension code received */ + +/* Detection of matching addresses (COI0) */ +#define IIC0_ADDRESSMATCH 0x10 +#define IIC0_ADDRESS_NOTMATCH 0x00 /* addresses do not match */ +#define IIC0_ADDRESS_MATCH 0x10 /* addresses match */ + +/* Detection of transmit/receive status (TRC0) */ +#define IIC0_STATUS 0x08 +#define IIC0_STATUS_RECEIVE 0x00 /* receive status */ +#define IIC0_STATUS_TRANSMIT 0x08 /* transmit status */ + +/* Detection of acknowledge signal (ACKD0) */ +#define IIC0_ACKDETECTION 0x04 +#define IIC0_ACK_NOTDETECTED 0x00 /* ACK signal was not detected */ +#define IIC0_ACK_DETECTED 0x04 /* ACK signal was detected */ + +/* Detection of start condition (STD0) */ +#define IIC0_STARTDETECTION 0x02 +#define IIC0_START_NOTDETECTED 0x00 /* start condition not detected */ +#define IIC0_START_DETECTED 0x02 /* start condition detected */ + +/* Detection of stop condition (SPD0) */ +#define IIC0_STOPDETECTION 0x01 +#define IIC0_STOP_NOTDETECTED 0x00 /* stop condition not detected */ +#define IIC0_STOP_DETECTED 0x01 /* stop condition detected */ + +/* + IIC Flag Register 0 (IICF0) +*/ +/* STT0 clear flag (STCF) */ +#define IIC0_STARTFLAG 0x80 +#define IIC0_STARTFLAG_GENERATE 0x00 /* generate start condition */ +#define IIC0_STARTFLAG_UNSUCCESSFUL 0x80 /* start condition generation unsuccessful */ + +/* IIC bus status flag (IICBSY) */ +#define IIC0_BUSSTATUS 0x40 +#define IIC0_BUS_RELEASE 0x00 /* bus release status */ +#define IIC0_BUS_COMMUNICATION 0x40 /* bus communication status */ + +/* Initial start enable trigger (STCEN) */ +#define IIC0_STARTWITHSTOP 0x02 +#define IIC0_START_WITHSTOP 0x00 /* generation of a start condition without detecting a stop condition */ +#define IIC0_START_WITHOUTSTOP 0x02 /* generation of a start condition upon detection of a stop condition */ + +/* Communication reservation function disable bit (IICRSV) */ +#define IIC0_RESERVATION 0x01 +#define IIC0_RESERVATION_ENABLE 0x00 /* enable communication reservation */ +#define IIC0_RESERVATION_DISABLE 0x01 /* disable communication reservation */ + +/* + IIC clock selection register 0 (IICCL0) +*/ +#define IICCL0_INITIALVALUE 0x00 +/* Detection of SCL0 pin level (CLD0) */ +#define IIC0_SCLLEVEL 0x20 +#define IIC0_SCL_LOW 0x00 /* clock line at low level */ +#define IIC0_SCL_HIGH 0x20 /* clock line at high level */ + +/* Detection of SDA0 pin level (DAD0) */ +#define IIC0_SDALEVEL 0x10 +#define IIC0_SDA_LOW 0x00 /* data line at low level */ +#define IIC0_SDA_HIGH 0x10 /* data line at high level */ + +/* Operation mode switching (SMC0) */ +#define IIC0_OPERATIONMODE 0x08 +#define IIC0_MODE_STANDARD 0x00 /* operates in standard mode */ +#define IIC0_MODE_HIGHSPEED 0x08 /* operates in high-speed mode */ + +/* Digital filter operation control (DFC0) */ +#define IIC0_DIGITALFILTER 0x04 +#define IIC0_FILTER_OFF 0x00 /* digital filter off */ +#define IIC0_FILTER_ON 0x04 /* digital filter on */ + +/* Operation mode switching (CL01, CL00) */ +#define IIC0_CLOCKSELECTION 0x03 + +/* Combine of (SMC0, CL01, CL00)*/ +#define IIC0_CLOCK0 0x00 +#define IIC0_CLOCK1 0x01 +#define IIC0_CLOCK2 0x02 +#define IIC0_CLOCK3 0x03 +#define IIC0_CLOCK4 0x08 +#define IIC0_CLOCK5 0x09 +#define IIC0_CLOCK6 0x0a +#define IIC0_CLOCK7 0x0b + +/* + IIC function expansion register 0 (IICX0) +*/ +/* IIC clock expension (CLX0) */ +#define IIC0_CLOCKEXPENSION 0x01 +#define IIC0_EXPENSION0 0x00 +#define IIC0_EXPENSION1 0x01 + +/* Operation clock (CLX0, SMC0, CL01, CL00) + | IIC0_EXPENSION0 | IIC0_EXPENSION1 | +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK0 | fprs/2 | prohibited | selection clock(fw) + | fprs/88 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK1 | fprs/2 | prohibited | selection clock(fw) + | fprs/172 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK2 | fprs/2 | prohibited | selection clock(fw) + | fprs/344 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK3 |prohibited/fexscl0 | prohibited | selection clock(fw) + | fw/66 | | transfer clock + | normal | | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK4 | fprs/2 | fprs/2 | selection clock(fw) + | fprs/48 | fprs/24 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK5 | fprs/2 | fprs/2 | selection clock(fw) + | fprs/48 | fprs/24 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK6 | fprs/4 | fprs/4 | selection clock(fw) + | fprs/96 | fprs/48 | transfer clock + | high speed | high speed | mode +------------|-------------------|-------------------|---------------------- +IIC0_CLOCK7 |prohibited/fexscl0 | prohibited | selection clock(fw) + | fw/18 | | transfer clock + | high speed | | mode +------------|-------------------|-------------------|---------------------- +*/ + +#define ADDRESS_COMPLETE 0x80 +#define IIC_MASTER_FLAG_CLEAR 0x00 + +#endif diff --git a/branches/IS_capture/incs.h b/branches/IS_capture/incs.h new file mode 100644 index 0000000..f9c1c4a --- /dev/null +++ b/branches/IS_capture/incs.h @@ -0,0 +1,44 @@ +#ifndef _WIN32 +#pragma SFR +#pragma di +#pragma ei +#pragma nop +#pragma stop +#pragma halt +#endif + +#ifndef _WIN32 +#pragma section @@CODE ROM_CODE +//#pragma section @@CNST ROM_CNST +#endif + +#ifdef _WIN32 +// VC̐Ԑǂɂ +#include "sim/simOnWin.h" +# endif + + + +//========================================================= +#ifndef _incs_h_ +#define _incs_h_ + +// v_pc_ƂŐ؂ւĂ܂ +#define _mcu_ + +#include "jhl_defs.h" +#include "config.h" +#include "user_define.h" + +#include "hal.h" + +#include "bsr_system.h" +#include "renge\renge.h" + +#include "vreg_ctr.h" + +#include "util_funcs.h" + +//========================================================= + +#endif diff --git a/branches/IS_capture/incs_loader.h b/branches/IS_capture/incs_loader.h new file mode 100644 index 0000000..0569b9f --- /dev/null +++ b/branches/IS_capture/incs_loader.h @@ -0,0 +1,49 @@ +/* ======================================================== + @sԂvolatileȂ̂Ń^C~OˑŊ҂ȂɂȂ̂@ + + Hardware abstruct layer + + $Id: asdf$ + ======================================================== */ +#ifndef _WIN32 +#pragma SFR +#pragma di +#pragma ei +#pragma nop +#pragma stop +#pragma halt + + +#pragma section @@CODE LDR_CODE +#pragma section @@CODEL LDR_CODL + +//#pragma section @@R_INIT FSL_RINT // ƃX^[gAbv[`l +//#pragma section @@CNST FSL_CNST // ZbgĂȂ +#pragma section @@CNSTL LDR_CNSL + +#endif + +# ifdef _WIN32 +// VC̐Ԑǂɂ +#include "sim/simOnWin.h" +# endif + + +//========================================================= +#include "jhl_defs.h" +#include "config.h" + +#include "user_define.h" + +#include "hal.h" + +#include "bsr_system.h" +#include "renge\renge.h" + +#include "vreg_ctr.h" +#include "vreg_twl.h" + + +//========================================================= +void firm_update( ); +void firm_restore( ); diff --git a/branches/IS_capture/ini_VECT.c b/branches/IS_capture/ini_VECT.c new file mode 100644 index 0000000..84da25c --- /dev/null +++ b/branches/IS_capture/ini_VECT.c @@ -0,0 +1,347 @@ +/* ======================================================== + 荞݃xN^e[u + $Id$ + ======================================================== */ + +#ifndef _WIN32 + +#pragma nop + +#endif + +#include "config.h" + +#ifndef _WIN32 + +#ifdef _WDT_CHECK_ +#pragma interrupt INTWDTI fn_intwdti // wdt debug +#endif + +//#pragma interrupt INTLVI fn_intlvi // gp + +//#pragma interrupt INTP0 intp0_slp // SLP (CPUAv) |[O +//#pragma interrupt INTP1 fn_intp1 // (I2C) +//#pragma interrupt INTP2 fn_intp2 // (I2C) +//#pragma interrupt INTP3 fn_intp3 // +#pragma interrupt INTP4 intp4_extdc // EXTDC, doffN̂݁Bʏ̓|[O +#pragma interrupt INTP5 intp5_shell // SHELL_CLOSE, doffN̂݁Bʏ̓|[O +#pragma interrupt INTP6 intp6_PM_irq // CODECoRŋPMICւ̃R}h + +//#ifdef _MCU_BSR_ // 荞݂͎̂̂g܂ +//#pragma interrupt INTP21 intp21_RFTx // dgMpX +//#else +//#pragma interrupt INTP7 intp21_RFTx +//#endif + + +/* + + accero +#ifdef _MCU_BSR_ +#pragma interrupt INTP23 intp23_ACC_ready RB3 // xZTAf[^ +#endif +*/ + +//#pragma interrupt INTCMP0 fn_intcmp0 +//#pragma interrupt INTCMP1 fn_intcmp1 +//#pragma interrupt INTDMA0 fn_intdma0 +#pragma interrupt INTDMA1 int_dma1 + +//#pragma interrupt INTST0 fn_intst0 +/* #pragma interrupt INTCSI00 fn_intcsi00 */ +//#pragma interrupt INTSR0 fn_intsr0 +/* #pragma interrupt INTCSI01 fn_intcsi01 */ +//#pragma interrupt INTSRE0 fn_intsre0 + +//#pragma interrupt INTST1 fn_intst1 +/* #pragma interrupt INTCSI10 fn_intcsi10 */ +#pragma interrupt INTIIC10 int_iic10 +//#pragma interrupt INTSR1 fn_intsr1 +//#pragma interrupt INTSRE1 fn_intsre1 + + +/* +// TS̓}U{ŃeRAWM͉H}eRŌLjvc +#pragma interrupt INTIICA1 int_iic_ctr RB1 + +#pragma interrupt INTIICA0 int_iic_twl RB2 +*/ + +//#pragma interrupt INTTM00 fn_inttm00 +//#pragma interrupt INTTM01 fn_inttm01 +//#pragma interrupt INTTM02 fn_inttm02 +//#pragma interrupt INTTM03 fn_inttm03 + +#pragma interrupt INTAD int_adc +#pragma interrupt INTRTC int_rtc +#pragma interrupt INTRTCI int_rtc_int +#pragma interrupt INTKR int_kr +//#pragma interrupt INTMD fn_intmd + +//#pragma interrupt INTTM04 fn_inttm04 +//#pragma interrupt INTTM05 fn_inttm05 +//#pragma interrupt INTTM06 fn_inttm06 +//#pragma interrupt INTTM07 fn_inttm07 + + +//#define _irq_debug_ +/****************************************************/ +/* gp̃_~[֐` */ +/****************************************************/ +#ifdef _WDT_CHECK_ +__interrupt void fn_intwdti( ) +{ + while( 1 ) + { + NOP(); + } +} +#endif + +#ifdef _irq_debug_ +__interrupt void fn_intlvi( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intp0(){ +while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intp1( ) +{ + while( 1 ) + { + NOP(); + } +} // +__interrupt void fn_intp2( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intp3( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void intp21_RFTx( ) +{ + while( 1 ) + { + NOP(); + } +} + + +//__interrupt void fn_intp4(){ while(1){} } // pm.c +//__interrupt void fn_intp5(){ while(1){} } // pm.c +//__interrupt void fn_intp6(){ while(1){} } // pm.c +//__interrupt void fn_intp7(){ while(1){} } // led.c +//__interrupt void fn_intp21(){ while(1){} } // led.c + +__interrupt void fn_intcmp0( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intcmp1( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intdma0( ) +{ + while( 1 ) + { + NOP(); + } +} + +//__interrupt void fn_intdma1(){} // i2c_mcu.cɂ + +__interrupt void fn_intst0( ) +{ + while( 1 ) + { + NOP(); + } +} + +/* __interrupt void fn_intcsi00(){} */ +__interrupt void fn_intsr0( ) +{ + while( 1 ) + { + NOP(); + } +} + +/* __interrupt void fn_intcsi01(){} */ +__interrupt void fn_intsre0( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intst1( ) +{ + while( 1 ) + { + NOP(); + } +} + +/* __interrupt void fn_intcsi10(){} */ +//__interrupt void fn_intiic10(){ while(1){} } +__interrupt void fn_intsr1( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_intsre1( ) +{ + while( 1 ) + { + NOP(); + } +} + +//__interrupt void fn_intiica(){} // i2c.cɂ +/* __interrupt void fn_inttm00(){} *//* sub.cɂĒ` */ +__interrupt void fn_inttm01( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_inttm02( ) +{ + while( 1 ) + { + NOP(); + } +} +__interrupt void fn_inttm03( ) +{ + while( 1 ) + { + NOP(); + } +} + +//__interrupt void fn_intad(){ while(1){} } // adc.c +__interrupt void fn_intrtc( ) +{ + while( 1 ) + { + NOP(); + } +} + +//__interrupt void int_rtcint(){} // rtc.cɂ +//__interrupt void fn_intkr(){} // main.c +__interrupt void fn_intmd( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_inttm04( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_inttm05( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_inttm06( ) +{ + while( 1 ) + { + NOP(); + } +} + +__interrupt void fn_inttm07( ) +{ + while( 1 ) + { + NOP(); + } +} + +#endif + + + +/* ======================================================== + L[^[荞 + ======================================================== */ +__interrupt void int_kr( ) +{ + // N邾 +} + + + +/* ======================================================== + ext dc + ======================================================== */ +__interrupt void intp4( ) +{ + // N邾 +} + + + +/* ======================================================== + shell close + ======================================================== */ +__interrupt void intp5( ) +{ + // N邾 +} + + +#else + +#include "sim/sim_interrupt_decrare.c" + +#endif + diff --git a/branches/IS_capture/jhl_defs.h b/branches/IS_capture/jhl_defs.h new file mode 100644 index 0000000..9a21ab3 --- /dev/null +++ b/branches/IS_capture/jhl_defs.h @@ -0,0 +1,25 @@ +#ifndef __jhl_defs_h__ +#define __jhl_defs_h__ + +typedef unsigned char u8; +typedef signed char s8; +typedef unsigned short u16; +typedef signed short s16; + +typedef unsigned short ux16; +typedef signed short sx16; + +#define true 1 +#define false 0 + + +#define set_bit( cond, reg, pos ) \ +{ \ + if( cond ){ \ + reg |= pos; \ + }else{ \ + reg &= ~pos; \ + } \ +} + +#endif diff --git a/branches/IS_capture/kanaria.asm b/branches/IS_capture/kanaria.asm new file mode 100644 index 0000000..9deaddb --- /dev/null +++ b/branches/IS_capture/kanaria.asm @@ -0,0 +1,12 @@ +PUBLIC _END_1,_END_2,_END_3,_END_4 + +@@DATA DSEG BASEP +_END_1: +@@INIT DSEG BASEP +_END_2: +@@INITL DSEG UNIT64KP +_END_3: +@@DATAL DSEG UNIT64KP +_END_4: +; +END diff --git a/branches/IS_capture/kanaria_c.c b/branches/IS_capture/kanaria_c.c new file mode 100644 index 0000000..bbb5ec7 --- /dev/null +++ b/branches/IS_capture/kanaria_c.c @@ -0,0 +1,18 @@ +/********************************************//** + X^bN̍Ō̒lǂ + + X^bNj󌟍̂ + + $Id$ + ***********************************************/ +#include "incs.h" + +extern unsigned char END_4; + +void f() +{ + unsigned char *tp; + + tp = &END_4; +} + diff --git a/branches/IS_capture/led.c b/branches/IS_capture/led.c new file mode 100644 index 0000000..bf62e07 --- /dev/null +++ b/branches/IS_capture/led.c @@ -0,0 +1,399 @@ +/* ======================================================== + LED.c + + $Id: LED.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 + +#pragma sfr + +#endif + +#include "incs.h" +#include "led.h" + + +// ======================================================== +static void LED_oshirase_init(); + + + +// ======================================================== +// TPS0 +#define BIT_PRS012 ( 1 << 2 ) +#define BIT_PRS002 ( 1 << 6 ) + +// TMR0 +#define BIT_CKS0 15 +#define BIT_CCS0 12 +#define BIT_MASTER0 11 +#define BIT_STS0 8 +#define BIT_CIS0 6 +#define BIT_MD123 1 +#define BIT_MD0 0 + + + +// ======================================================== +bit ledInitialized; + + +// m点LED +uni_info_LED info_LED; // p^[f[^ +bit info_led_off; // doffȂǁAtO +bit info_led_override; // drcʋ͏_ŏ㏑rbg + +// wifi led Xe[g +static u8 state_wifi_tx; +static u8 flag_wifi_TX; + + +// ======================================================== +#define led_fade_to( now, goal ) now = fade_to( now, goal ) + + +/********************************************//** + now goal ɂȂ܂ inc / dec BxĂԂƃOf[V + + Ƃ肠AXebvŒ + ***********************************************/ +u8 fade_to( u8 now, u8 goal ) +{ + if( now != goal ) + { + if( now > goal ) + { + now --; + } + else + { + now ++; + } + } + return( now ); +} + + + + +/********************************************//** + XlăOf[V + ***********************************************/ +#define led_fade_to2( led, status ) \ + led = fade_to2( status ) + + +u8 fade_to2( st_LED_dim_status* status ) +{ + if( status->now != status->to ) + { + if( abs(( status->to - status->now )) > abs(status->delta) ) + { + status->now += status->delta; + } + else + { + // delta Ƃ to ̒lɂԂ‚Ă܂ + status->now = status->to; + } + } + return( status->now / 128 ); +} + + + + +/********************************************//** + LED̏ + + HW^C}[ĝł̏s + ***********************************************/ +void LED_init( ) +{ +/** + PWM̃ZbgAƂ肠S + + }X^`lFO@(P01:/reset2)@}X^[͋`lłȂ + X[u@@@@P@rksnB(Rc kdcH) + @@@@@@@@Q@J + @@@@@@@@R@WiFi + @@@@@@@@S@(s͂qsb32kHz out Ɏgp) + @@@@@@@@T@[d + @@@@@@@@U@d k + @@@@@@@@V@d g + */ +// LED_oshirase_init(); // m点p^[ + + /// ytF /// + TAU0EN = 1; + TPS0 = BIT_PRS012 | BIT_PRS002; // }X^[NbNCK01,8M/2 /2^4 = 250kHz + + TMR00 = + 1 << BIT_CKS0 | 0 << BIT_CCS0 | 1 << BIT_MASTER0 | 0 << BIT_STS0 | 0 + << BIT_CIS0 | 0 << BIT_MD123 | 1 << BIT_MD0; + TMR01 = TMR02 = TMR03 = TMR04 = TMR05 = TMR06 = TMR07 = + 1 << BIT_CKS0 | 0 << BIT_CCS0 | 0 << BIT_MASTER0 | 4 << BIT_STS0 | 0 + << BIT_CIS0 | 4 << BIT_MD123 | 1 << BIT_MD0; + ISC = 0; + TOM0 = 0x00FE; // o̓[hB4PWMo͂Ȃ1ɂȂTO5ȍ~ɃNbN͂Ȃ + + TOL0 = 0x0000; // o͂𔽓]邩tO + + TO0 = 0x0000; // ^C}[쒆ŁA^C}[o͂ɂĂȂƂ̃s̃b`B^C}[o͂gȂȂO + TOE0 = 0x00EE; // TOx^C}[W[H + + TS0 = 0x00EF; // Jn + + TDR00 = LED_BRIGHT_MAX - 1; // 10bit + + // Abvf[gȂǂŃ}CR̂݃u[gƂ + if( system_status.reboot ) + { + // SoC ̃R}h҂Aœd LED ‚ + vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO; + LED_duty_pow_blu = LED_BRIGHT_MAX; + } + info_led_off = false; // + ledInitialized = true; +} + + +static void LED_oshirase_init() +{ + char* p_tgt = &info_LED; + int i; + + for( i = 0; i < sizeof(info_LED); i++ ) + { + *p_tgt = 0; + p_tgt++; + } +} + + + + + +/********************************************//** + LED̒~B + + HW^C}[̒~ + ***********************************************/ + +void LED_stop( ) +{ + TT0 = 0x00EF; // Ē~iȂƂ߁j + TOE0 = 0x0000; // TOx^C}[W[H(GPIOɂȂ) + TAU0EN = 0; + LED_pow_red = 0; + LED_CAM = 0; + + LED_duty_notify_red = 0; + LED_duty_notify_blu = 0; + LED_duty_notify_grn = 0; + LED_pow_red = 0; + LED_CAM = 0; + + WIFI_txLatch = 0; + flag_wifi_TX = 0; + state_wifi_tx = 0; + + ledInitialized = false; +} + + + + +/********************************************//** + WiFi LED ̍XV + + - WX^̐ݒ on / off + - off łĂW[̑MpX -_-_-_--------_-_-_-------̃p^[_ + ***********************************************/ +void tsk_led_wifi( ) +{ + static u8 task_interval; + + if( task_interval-- != 0 ) + { + return; + } + + // MpX̃b` + if( WIFI_txLatch ) // 荞݃tÔ̂gĂ܂ + { + WIFI_txLatch = 0; + flag_wifi_TX = 1; + } + + if( flag_wifi_TX != 0 ) + { + vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_WIFI_TX; + // Mp^[ + switch ( state_wifi_tx ) + { + case ( 1 ): + case ( 3 ): + case ( 5 ): + LED_duty_WiFi = 0; + break; + default: + LED_duty_WiFi = vreg_ctr[VREG_C_LED_BRIGHT]; + } + state_wifi_tx ++; + if( state_wifi_tx == 32 ) // _ŌA_ĂԂ̒ + { + state_wifi_tx = 0; + flag_wifi_TX = 0; + } + task_interval = 25; + return; + } + else + { + task_interval = 30; + // MtO҂ + vreg_ctr[ VREG_C_STATUS_1 ] &= ~REG_BIT_WIFI_TX; + + if( vreg_ctr[VREG_C_LED_WIFI] == WIFI_LED_OFF ) + { + LED_duty_WiFi = 0; + return; + } + else + { + if( LED_duty_WiFi == vreg_ctr[VREG_C_LED_BRIGHT] ) + { + return; + } + else if( LED_duty_WiFi < vreg_ctr[VREG_C_LED_BRIGHT] ) + { + LED_duty_WiFi ++; + } + else + { + LED_duty_WiFi --; + } + } + task_interval = 3; + return; + } +} + + + + +bit info_led_pattern_updated; +/********************************************//** + m点LED + + tF[hAEgvZ + ***********************************************/ +static void calc_info_led_fade_out( st_LED_dim_status* tgt_led ) +{ + tgt_led -> to = 0; + tgt_led -> delta = ( 0 - tgt_led -> now ) / 64; + // tF[hAEg([ɌĂB̌z肵Ă܂B) + if(( tgt_led -> now != 0 ) && ( tgt_led -> delta == 0 )) + { + tgt_led -> delta = (sx16)-1; + } +} + + +/********************************************//** + m点LED + + Of[VvZ + ***********************************************/ +static void calc_info_led_next_frame( st_LED_dim_status* tgt_led, u8 color ) +{ + tgt_led -> to = color * 128; + // Of[Ṽf^vZ + tgt_led -> delta = (( tgt_led -> to - tgt_led -> now ) ) / info_LED.info_LED.fade_time; +} + + +/********************************************//** + m点LED + ***********************************************/ +void tsk_led_notify( ) +{ + static u8 time_to_next_frame; + static u8 frame; + static u8 loops; + static st_LED_dim_status LED_dim_status_info_R, LED_dim_status_info_G, LED_dim_status_info_B; + + if( info_led_override ) + { + // dr؂ꂪD悷 + return; + } + + if( system_status.pwr_state == ON_TRIG ) + { + LED_duty_notify_blu = 0; + LED_duty_notify_red = 0; + LED_duty_notify_grn = 0; + LED_dim_status_info_R.now = 0; + LED_dim_status_info_G.now = 0; + LED_dim_status_info_B.now = 0; + } + + if( info_led_off ) // doffȂNjoff + { + // tF[hAEg + calc_info_led_fade_out( &LED_dim_status_info_R ); + calc_info_led_fade_out( &LED_dim_status_info_G ); + calc_info_led_fade_out( &LED_dim_status_info_B ); + } + else + { + // ʏ^] + if( info_led_pattern_updated ) + { + info_led_pattern_updated = false; + vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] &= ~REG_BIT_IN_LOOP; + frame = 0; // Ə + time_to_next_frame = 0; + } + else + { + // ̃t[ɐi߂H + if( time_to_next_frame == 0 ) + { + time_to_next_frame = info_LED.info_LED.term; + + if( frame >= NOTIFY_LED_TERM -1 ) + { + vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] |= REG_BIT_IN_LOOP; + if( info_LED.info_LED.last_loop != 255 ) // 255:[v + { + loops ++; + if( loops > info_LED.info_LED.last_loop ) + { + frame = 0; + } + } + } + else + { + frame = (( frame + 1 ) & 0x1F ); // Ń}XNĂȂƍŏIt[`擪Ԃ̃OfȂ + vreg_ctr[ VREG_C_LED_NOTIFY_FLAG ] &= ~REG_BIT_IN_LOOP; + loops = 0; + } + + // Of[VvZ + calc_info_led_next_frame( &LED_dim_status_info_R, info_LED.info_LED.red[frame] ); + calc_info_led_next_frame( &LED_dim_status_info_G, info_LED.info_LED.grn[frame] ); + calc_info_led_next_frame( &LED_dim_status_info_B, info_LED.info_LED.blu[frame] ); + + } + time_to_next_frame --; + } + } + + led_fade_to2( LED_duty_notify_red, &LED_dim_status_info_R ); + led_fade_to2( LED_duty_notify_grn, &LED_dim_status_info_G ); + led_fade_to2( LED_duty_notify_blu, &LED_dim_status_info_B ); +} diff --git a/branches/IS_capture/led.h b/branches/IS_capture/led.h new file mode 100644 index 0000000..ce8541f --- /dev/null +++ b/branches/IS_capture/led.h @@ -0,0 +1,142 @@ +#ifndef __led__ +#define __led__ + + + +// ==================================== + +//#define LED_CHARGE P2.4 // PMŒ` + +// LED_DUTY +#define LED_duty_pow_blu TDR06 +#define LED_duty_WiFi TDR03 + +#define LED_duty_3d TDR01 +#define LED_duty_notify_red TDR07 +#define LED_duty_notify_grn TDR05 +#define LED_duty_notify_blu TDR02 + +// dutyς܂ +#ifndef _WIN32 +#define LED_pow_red P4.2 +#define LED_CAM P7.5 +#else +#define LED_pow_red mcuRegP[ _P4_2 ] +#define LED_CAM mcuRegP[ _P7_5 ] +#endif + +#define NOTIFY_LED_TERM 32 + + +#define LED_BRIGHT_MAX 0x00FF + +// ==================================== +#define WIFI_txLatch PIF21 // dgMpX + + + +// ==================================== +enum LED_ILUM_MODE +{ + LED_POW_ILM_AUTO = 0, + LED_POW_ILM_ON, + LED_POW_ILM_SLEEP, + LED_POW_ILM_OFF, + LED_POW_ILM_ONLY_RED, + LED_POW_ILM_ONLY_BLUE, + LED_POW_ILM_FORCE_BT_EMPTY +}; + + +enum LED_MODE_3D +{ + LED_3D_ILM_OFF = 0, + LED_3D_ILM_ON +}; + + +// VREG_C_WIFI_LED +enum WIFI_LED_MODE +{ + WIFI_LED_OFF = 0, + WIFI_LED_ON +}; + + +// VREG_C_WIFI_NOTIFY +enum NOTIFY_LED_MODE +{ + NOTIFY_LED_OFF = 0, + NOTIFY_LED_ON, + NOTIFY_LED_PTN0, + NOTIFY_LED_PTN1, + NOTIFY_LED_PTN2 +}; + + +// VREG_C_CAM_LED +enum CAM_LED_MODE +{ + CAM_LED_OFF = 0, + CAM_LED_BLINK, + CAM_LED_ON, + CAM_LED_BY_TWL, + CAM_LED_ON_PLUSE, + CAM_LED_OFF_PLUSE +}; + + + +// m点LED֌W // +typedef struct _st_info_LED +{ + u8 term; // 1t[`bNH + u8 fade_time; // `bNŎ̃t[̐FɒB邩 + u8 last_loop; // ŏIt[JԂH + u8 resv1; + u8 red[32]; + u8 grn[32]; + u8 blu[32]; +}st_info_LED; + +typedef union _uni_info_LED +{ + st_info_LED info_LED; + u8 bindata[ sizeof( st_info_LED ) ]; +}uni_info_LED; + +extern uni_info_LED info_LED; + + +// LED _Ō // +typedef struct _st_led_red_batt_empty +{ + u8 dats[4]; +}st_led_red_batt_empty; + +extern st_led_red_batt_empty led_red_batt_empty; + + +/* + m点LED +*/ +typedef struct _st_LED_dim_status +{ + sx16 to; + sx16 delta; + sx16 now; // _ȉoĂȂĂ͂ȂȂ +}st_LED_dim_status; + + + +// ==================================== +void LED_init( ); +void LED_stop( ); + + +// ==================================== +extern bit ledInitialized; +extern bit info_led_override; + + +#endif diff --git a/branches/IS_capture/led_cam.c b/branches/IS_capture/led_cam.c new file mode 100644 index 0000000..7d4a1eb --- /dev/null +++ b/branches/IS_capture/led_cam.c @@ -0,0 +1,156 @@ +/******************************************************//** + LED_Cam TO02 + + BLINK,*_PLUSE ̎́A1͕K̏ԂɂȂ܂B + + ̊Ԃ OFFBLINK ȂǂƁAOFF܂B + + $Id$ + *********************************************************/ +#ifndef _WIN32 + +#pragma sfr + +#endif + +#include "incs.h" +#include "led.h" +#include "vreg_twl.h" + + +// ======================================================== +static u8 state_led_cam = 0; +static u16 task_interval; + +bit cam_led_update; + + + +// ======================================================== +static void cam_led_twl(); + + + + +/********************************************//** + C^[os^XNƁAtwlWX^ւ݂̏̂QJĂ΂܂B + ***********************************************/ +void tsk_led_cam( ) +{ + DI_wt_chk(); // WX^ւ݂̏ŋN邱Ƃ邽 + if( !cam_led_update ) + { + if( task_interval != 0 ) + { + task_interval --; + EI(); + return; + } + } + + cam_led_update = false; // TWL ̃uNݒiꔭ_ĵ + EI(); + + if( system_status.pwr_state == SLEEP ) // sleepA + { + LED_CAM = 0; + state_led_cam = 0; + } + else + { + // uN̂悤ɑ҂ƂȊO͖TN + // (WX^̕ύXɂɔ) + switch ( vreg_ctr[VREG_C_LED_CAM] ) + { + case ( CAM_LED_OFF ): + default: + LED_CAM = 0; + state_led_cam = 0; + break; + + case ( CAM_LED_ON ): + LED_CAM = 1; + state_led_cam = 0; + break; + + case ( CAM_LED_BLINK ): + if( state_led_cam == 0 ) + { + LED_CAM = 1; + state_led_cam = 1; + } + else + { + LED_CAM = 0; + state_led_cam = 0; + } + task_interval = 250; + break; + + case ( CAM_LED_ON_PLUSE ): + if( state_led_cam == 0 ) + { + LED_CAM = 1; + state_led_cam = 1; + task_interval = 250; + } + else + { + vreg_ctr[VREG_C_LED_CAM] = CAM_LED_OFF; + } + break; + + case ( CAM_LED_OFF_PLUSE ): + if( state_led_cam == 0 ) + { + LED_CAM = 0; + state_led_cam = 1; + task_interval = 250; + } + else + { + vreg_ctr[VREG_C_LED_CAM] = CAM_LED_ON; + } + break; + + case( CAM_LED_BY_TWL ): + cam_led_twl(); + } + } // if( system_status.pwr_state == sleep ) ... else ... +} + + +/********************************************//** + TWLJLED𑀍삳 + ***********************************************/ +static void cam_led_twl() +{ + // TWL݊ // + switch ( vreg_twl[ REG_TWL_INT_ADRS_CAM ] ){ + case( TWL_CAMLED_OFF ): + LED_CAM = 0; + state_led_cam = 0; + break; + + case( TWL_CAMLED_BLINK ): + if( state_led_cam == 0 ) + { + LED_CAM = 1; + state_led_cam = 1; + } + else + { + LED_CAM = 0; + state_led_cam = 0; + } + task_interval = (u8)( 600 / SYS_INTERVAL_TICK ) + 250; + break; + + case( TWL_CAMLED_ON ): + case( TWL_CAMLED_DEF_ON ): + default: + LED_CAM = 1; + state_led_cam = 1; + break; + } +} diff --git a/branches/IS_capture/led_pow.c b/branches/IS_capture/led_pow.c new file mode 100644 index 0000000..6773d4e --- /dev/null +++ b/branches/IS_capture/led_pow.c @@ -0,0 +1,296 @@ +/* ======================================================== + dLED + LED_POW_B,R 6,7 + + TDR00@(0x03FFBTPS0250kHzŃJEgAbvB10bitȂ250HzʂɂȂ) + TDR0x@Duty 0ŏATDR00( =0x03FFȏ)œ_łB + + $Id: asdf$ + ======================================================== */ + +/* ======================================================== + enum pwr_state_{ + OFF_TRIG = 0, + ON_CHECK, + ON_TRIG, + ON, + SLEEP +}; + +enum LED_ILUM_MODE{ + LED_POW_ILM_AUTO, + LED_POW_ILM_ON, + LED_POW_ILM_SLEEP, + LED_POW_ILM_CEOFF +}; + ======================================================== */ +#ifndef _WIN32 + +#pragma sfr + +#endif + +#include "incs.h" +#include "led.h" +#include "pm.h" + +// ======================================================== +// X[vł̃e[uB}WB +const u8 LED_PTN_SLEEP[] = { + 25, 38, 52, 68, 83, 98, 110, 119, + 125, 128, 128, 125, 119, 110, 98, 83, + 68, 52, 38, 25, 16, 10, 8, 8, + 8, 8, 8, 8, 8, 8, 10, 16 + }; + + +// LED̓drcLED̓_Ńp^[ +st_led_red_batt_empty led_red_batt_empty = { 0x55, 0x55, 0x55, 0x55 }; +#define LED_SLEEP_FRAME_LEN 71 +#define LED_SLEEP_DIM_LEN 71 +#define LED_SLEEP_FRAME_NUM 32 + + + +// ======================================================== +static void led_pow_normal( ); +static void led_pow_sleep( ); +static void led_pow_bt_empty(); +static u8 led_pow_batt_low(); + +#define led_fade_to( now, goal ) now = fade_to( now, goal ) +extern u8 fade_to( u8 now, u8 goal ); + +#define led_fade_to2( led, status ) led = fade_to2( status ) +extern u8 fade_to2( st_LED_dim_status* status ); + + + +// ======================================================== +// dLED̃X[vp^[̃Xe[^X +static u8 time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN; +static u8 frame_sleep; +static st_LED_dim_status LED_dim_status_sleep; + +extern bit ledInitialized; +extern bit BT_IN_CHG_delayed_n; + + + +/********************************************//** + dLED + + {Iɂ́A + + 쎞A + - drc > 10% “_imaster_brightness̖邳j + - 5% ԓ_ (100%_AHWŒs) + - ȉ ԓ_Am点LEDԂBAA_v^h5%`̓ + + X[v + - drc > 10% “_imaster_brightness̖邳j + - 쎞Ɠ + + X[vɂ͎Ő؂ւȂ̂ŁAWX^삪Kvłi̕s悢ł傤Hj + + ̃p^[͐Ŷ߁B + ***********************************************/ +void tsk_led_pow( ) +{ + if( ! ledInitialized ) + { + return; + // ܂ + } + + info_led_override = false; + + switch ( vreg_ctr[VREG_C_LED_POW] ) + { + case ( LED_POW_ILM_AUTO ): + default: + led_pow_normal( ); + break; + + case ( LED_POW_ILM_SLEEP ): + led_pow_sleep( ); + break; + + case ( LED_POW_ILM_ON ): + led_fade_to( LED_duty_pow_blu, vreg_ctr[VREG_C_LED_BRIGHT] ); + LED_pow_red = 0; + break; + + case ( LED_POW_ILM_OFF ): + led_fade_to( LED_duty_pow_blu, 0 ); + LED_pow_red = 0; + break; + + case ( LED_POW_ILM_ONLY_RED ): + LED_duty_pow_blu = 0; + LED_pow_red = 1; + break; + + case ( LED_POW_ILM_ONLY_BLUE ): + LED_duty_pow_blu = LED_BRIGHT_MAX; + LED_pow_red = 0; + break; + + case ( LED_POW_ILM_FORCE_BT_EMPTY ): + led_pow_bt_empty(); + break; + } + + if( system_status.pwr_state == OFF || system_status.pwr_state == ON_CHECK ) + { + LED_pow_red = 0; + info_led_override = false; + } + + if( info_led_override ) + { + LED_duty_notify_blu = 0; + LED_duty_notify_grn = 0; + LED_duty_notify_red = ( LED_pow_red == 0 )? 0 : 255; + } +} + + + +/********************************************//** + ʏ퓮쎞 + + drcʂŁA@ԁԓ_ + ***********************************************/ +static void led_pow_normal( ) +{ + time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN; + frame_sleep = 0; + LED_dim_status_sleep.now = (sx16)LED_duty_pow_blu * 128; + + if( led_pow_batt_low() != 0 ) // Ԃ̓_łĂ܂ + { + return; + // ܂ + } + + // “_ + led_fade_to( LED_duty_pow_blu, vreg_ctr[VREG_C_LED_BRIGHT] ); +} + + + +/********************************************//** + X[vz^p^[ + + drcʂŐԁԓ_łɂ + ***********************************************/ +static void led_pow_sleep( ) +{ + if( led_pow_batt_low() != 0 ) // Ԃ̓_łĂ܂ + { + time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN; + frame_sleep = 0; + LED_dim_status_sleep.now = (sx16)LED_duty_pow_blu * 128; + return; + // ܂ + } + + LED_dim_status_sleep.to = LED_PTN_SLEEP[frame_sleep] * 128; + + // Of[Ṽf^vZ + LED_dim_status_sleep.delta = (( LED_dim_status_sleep.to - LED_dim_status_sleep.now ) ) / LED_SLEEP_DIM_LEN; + led_fade_to2( LED_duty_pow_blu, &LED_dim_status_sleep ); + + // ̃t[ɐi߂H + time_to_next_frame_sleep --; + if( time_to_next_frame_sleep == 0 ) + { + time_to_next_frame_sleep = LED_SLEEP_FRAME_LEN; + + frame_sleep ++; + if( frame_sleep >= LED_SLEEP_FRAME_NUM -1 ) + { + frame_sleep = 0; + } + } +} + + + +/********************************************//** + drȂƂ̋ + +@ԒlF@0@drȂȂ +@@@@@1@Ȃ̂ŋʃp^[ɂ + ***********************************************/ +static u8 led_pow_batt_low() +{ + if( vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_LO ) + { + LED_pow_red = 0; + return 0; + // ܂ + } + + if(( vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_EMPTY ) || !BT_IN_CHG_delayed_n ) + // drcʂ5%i`10%j@܂́Aꖢł[d + { + // ԓ_ + led_fade_to( LED_duty_pow_blu, 0 ); + { + LED_pow_red = 1; + } + + } + else // dr5%@@A_v^Ȃ + { + led_pow_bt_empty(); + } + return 1; +} + + + + +/********************************************//** +@drȂp^[ + +@@wp^[𗬂 + +@@m点㏑ + ***********************************************/ +static void led_pow_bt_empty() +{ + static u8 delay; + static u8 red_blink_poi; + + info_led_override = true; + + // ԓ_ + led_fade_to( LED_duty_pow_blu, 0 ); + + // Ԃ̓_Ńp^[wł + delay ++; + if( delay < 64 ) // t[̕ێԉ҂ + { + return; + } + delay = 0; + + if( led_red_batt_empty.dats[ red_blink_poi / 8 ] & ( 1 << ( red_blink_poi % 8 )) ) + { + LED_pow_red = 1; + } + else + { + LED_pow_red = 0; + } + red_blink_poi ++; + if( red_blink_poi >= 32 ) + { + red_blink_poi = 0; + } +} + + diff --git a/branches/IS_capture/loader.c b/branches/IS_capture/loader.c new file mode 100644 index 0000000..409ce87 --- /dev/null +++ b/branches/IS_capture/loader.c @@ -0,0 +1,416 @@ +/* ======================================================== + MCU CTR BSR + 2009/03/30 - + JZp c + + u[g[_[ + zXg̒ʐMƁAȏAt@[̃`FbNsB + + $Id: loader.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma di +#pragma ei +#pragma nop +#pragma stop +#pragma halt +#pragma opc + +#endif +#include "incs_loader.h" + +#include +#include "fsl_user.h" + +#include "i2c_ctr.h" +#include "i2c_mcu.h" +#include "pm.h" +#include "rtc.h" + +#include "reboot.h" + +#include "wdt.h" +#include "magic.h" + + + +#define REG_BIT_RESF_WDT 0x10 +#define REG_BIT_RESF_TRAP 0x80 +#define REG_BIT_RESF_LVI 0x01 + + + +// ======================================================== +#if (FSL_DATA_BUFFER_SIZE>0) +fsl_u08 fsl_data_buffer[FSL_DATA_BUFFER_SIZE]; +#endif + + + +#ifdef FSL_INT_BACKUP +static fsl_u08 fsl_MK0L_bak_u08; /* if (interrupt backup required) */ +static fsl_u08 fsl_MK0H_bak_u08; /* { */ +static fsl_u08 fsl_MK1L_bak_u08; /* reserve space for backup information */ +static fsl_u08 fsl_MK1H_bak_u08; /* of interrupt mask flags */ +static fsl_u08 fsl_MK2L_bak_u08; /* */ +static fsl_u08 fsl_MK2H_bak_u08; /* } */ +#endif + + + +// ======================================================== +void hdwinit(); // static ɂcrt0猩ȂȂ܂BӁI +static void hdwinit2(); +static void chk_platform_type(); +static void chk_firm_broke(); + + +extern void main_loop(); + + +/********************************************//** + * - t@[Abvf[gAWDT̃ZbgA + * - t@[̔jA + * - {̎ނ̎ʁA + * - |[gA + * - ჌xȃytF̏A + * + * main_loop()ĂԁB + ***********************************************/ +void main( ) +{ + while( 1 ) + { + WDT_Restart( ); + + if( RTCEN ) // TRAP(update)ɂgȂBWDTł͗Ȃ + { + system_status.reboot = true; + } + + { + volatile u8 my_resf = RESF; // ǂނƏ + if( ( my_resf & REG_BIT_RESF_WDT ) != 0 ) + { + vreg_ctr[ VREG_C_MCU_STATUS ] |= REG_BIT_STATUS_WDT_RESET; + // set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET ); + // I2C̏ɍs + system_status.reboot = true; + } + else if( ( my_resf & REG_BIT_RESF_TRAP ) != 0 ) // ( FSL_ForceReset, 'r' ) + { + system_status.reboot = true; + } +/* LVIgp + else if(( my_resf & REG_BIT_RESF_LVI ) != 0 ) + { + vreg_ctr[ VREG_C_MCU_STATUS ] |= ( 1 << 2 ); + } +*/ + } +//* ROMǂɂȂȂA]̏RgAEg + if( !system_status.reboot ) + { + // ʏ̓d + // drڑAƑ҂Ă݂(`^O΍) + u16 pwup_delay0; + for( pwup_delay0 = 0xFFFF; pwup_delay0 != 0; pwup_delay0 -- ){;}; + } +//*/ + hdwinit2( ); + +#ifndef _WIN32 + // t@[̐`FbN // + chk_firm_broke(); // ĂAĂȂ +#endif + + // @픻 + chk_platform_type(); + + // HALfobOZbg + hal_reset(); + hal_update(); + + // RTC + RTC_init( ); // Ńu[g肵ď邩f܂ + + // ʏ^] + main_loop( ); + } +} + + + +/********************************************//** + * }WbNio[`FbNāA삳悤ƂĂt@[jĂȂ`FbN܂B + * + * Ăꍇ̓XgA݁AMCU̓Zbg܂B + ***********************************************/ +static void chk_firm_broke() +{ + u8 i; + u8 comp = 0; + + // [_[Ɩ{͓̂o[WH + /// ւ̃Abvf[g̓rŏIĂȂH + for( i = 0; i < sizeof( __TIME__ ); i++ ) // sizeof( __TIME__ ) = 8 炵 + { + comp += ( *( __far u8 * )( MGC_LOAD + i ) == *( u8 * )( MGC_FOOT + i ) ) ? 0 : 1; + comp += ( *( u8 * )( MGC_HEAD + i ) == *( u8 * )( MGC_FOOT + i ) ) ? 0 : 1; + } + + if( *( u8 * )( MGC_FOOT +2 ) != ':' ) // ς̂܂ + { + comp ++; + } + + if( comp != 0 ) + { + // t@[XgA݂ + firm_restore( ); + // AĂȂBZbgB + } +} + + +/********************************************//** +vbgtH[̔sAsystem_statusɃZbg܂B + + fobK‚ȂłƏɔłȂƂ܂B + +CTRt@~ + + DEV_DET(P12.[2:1]) + + +CTR̊J@ + + P40,41 !! fobOLP40LMCUN܂I + + - HH @ + - HL NBDV + - LH X^hAV + - LL ISfobK + + ***********************************************/ +void chk_platform_type() +{ + // CTRt@~ // + system_status.family = (enum family_)( DEV_DET >> 1 ); /// ... + +#ifdef _DBG_FORCE_FLOWER + // Iɋ@ݒăfobOƂ + system_status.family = FAMILY_FLOWER; +#endif + +#ifdef _MCU_ARR + if( system_status.family == FAMILY_SPFL ) + { + system_status.family = FAMILY_CLOSER; + } +#endif + + if( system_status.family == FAMILY_CTR ) + { + system_status.LCD_is_CGS = true; + } + else + { + // FAMILY_SPFL or FAMILY_SNAKE or FAMILY_FLOWER // At@XYȂ + system_status.LCD_is_CGS = false; + } + + if( system_status.LCD_is_CGS == true ) + { + pm_reg_bit_vddlcd = PM_REG_BIT_VDDLCD_CGS; + } + else + { + pm_reg_bit_vddlcd = PM_REG_BIT_VDDLCD_AMO; + } + set_vdd_voltages( system_status.family ); + + // CTR̊J@ // + // ꉞ + system_status.is_dev = false; + system_status.taikendai = false; + system_status.taikendai_nbd = false; + + switch( DIPSW ) + { + case DIPSW_TAIKENDAI: + system_status.taikendai = true; + break; + + case DIPSW_TAIKENDAI_NBD: + system_status.taikendai_nbd = true; + break; + + case DIPSW_ISDEV: + system_status.is_dev = true; + break; + } +#ifdef _FORCE_TAIKENDAI_ + system_status.taikendai = true; +#endif + +#ifdef _FORCE_TAIKENDAI_NBD_ + system_status.taikendai_nbd = true; +#endif +} + + + + +/********************************************//** + ŏ̃WX^s܂B + + gݍ݃X^[gAbv[`Ă΂܂B + ***********************************************/ +void hdwinit( void ) +{ // X^[gAbv[`ɌĂт܂ + DI( ); /* }X^荞݋֎~ */ + + CMC = bits8(0,0,0,1, 0,0,0,0); /* X1U(̓|[g)AXT1gpAd͔U͕sɕtʏ */ + CSC = bits8(1,0,0,0, 0,0,0,0); /* X1UȂAXT1UAU */ + OSMC = bits8(0,0,0,0, 0,0,0,1); /* BWX^ */ + NOP();NOP();NOP(); // 3clkJ + CKC = bits8(0,0,0,0, 1,0,0,0); /* CPU/ӃNbN=fMAINAfMAIN=fMXAfCLK=fMX */ + + /*--- doH̐ݒ ---*/ + /* Zbg̃ftHǵAIvVEoCgɂĎw肳 */ + LVIS = 0x00; /* VLVI = 4.22}0.1V */ +// LVIM = 0x00; /* LVI֎~ */ + /* dd(VDD)od(VLVI)Ɋ */ + /* dd(VDD)od tempA[0][1], "offset" => tempA[0][2], "type" => tempA[0][3], "data" => tempA[0][4], "CRC" => tempA[0][5] } + + break if src_in["type"].hex == 01 + break if src_in["len"].hex == 00 + # next if src_in["type"].hex != 00 + if( src_in["type"].hex != 00 ) +# p dat + next + end + + offset = src_in["offset"].hex + next if(( 0x1000 <= offset ) && ( offset < 0x2000 )) + + dataTemp = src_in["data"].scan(/\w\w/) + + ( 0...(src_in["len"].to_s.hex) ).each{|i| + bindata[ offset + i ] = ( dataTemp[ i ] ).to_s.hex + } +end + +### debug enable bit check ############# +# fobO‚ɂȂĂISfobKŋNȂiMCU삵Ȃj +p bindata[0xC3] +if( bindata[0xC3] != 0x04 ) + print( "!E debug enable!!" ) + exit( 1 ) +end + + +### format data and output ############# +4096.times{ + bindata.delete_at(4096) +} +dest.write( bindata[0..(0x4FFF - 0x1000)].pack("c*") ) +dest.close + +printf( "intel-HEX to bsr bin converter\n file converted!\n\n" ) diff --git a/branches/IS_capture/pedo_alg_thre_det2.c b/branches/IS_capture/pedo_alg_thre_det2.c new file mode 100644 index 0000000..4e69a04 --- /dev/null +++ b/branches/IS_capture/pedo_alg_thre_det2.c @@ -0,0 +1,567 @@ +/* ******************************************************** + v + + 3x̃A^Cf[^AxNg̃moA + 臒l𒴂鎞ԁAԊuAm̑傫臒l؂ւȂ + + $Id$ +********************************************************* */ +#ifndef _WIN32 + +#pragma mul +#pragma div +#pragma bcd + +#endif + +#include "incs.h" + +#ifndef _WIN32 +#include +#endif + +#include "accero.h" +#include "pedometer.h" + +#include "pool.h" + +// ======================================================== +// ̍ŏIL^ +// ̏Ԃ̓OǂݏȍԂł̂łȂł +// ԂɃAhX̎Ⴂ̂mۂ̂҂Ă܂... +typedef struct{ + u8 hour_bcd; + u8 day_bcd; + u8 month_bcd; + u8 year_bcd; + u8 min_bcd; + u8 sec_bcd; +}st_calender; + + + +// ======================================================== +static u16 get_long_hour(); +static u16 calc_hours_spend( u8 ); + + + +// ======================================================== +bit pedolog_overflow; // 192ԋL^ς݃tO(i2cœǂ߂) +extern uni_pool pool; // O͂̍\̂̒ +static u8 p_record; // Ȍ݈ʒu +static st_calender cal_log_latest; // ŌɕXV +static u16 last_hour_fny; // fny:from new year +static st_calender cal_temp; +static u16 now_longhour; + + + + + + +// ======================================================== +#define _use_my_sqrt_ +#ifdef _use_my_sqrt_ +static unsigned long my_sqrt( unsigned long ); +#endif + +// N͉[NH +#define is_leapyear( y ) (( y & 0x03 ) == 0 ) +// uNv͉[NH +#define is_firstyear( y ) (( y & 0x03 ) == 1 ) + + +// xZTlFIR-LPFɒʂB̌W +extern const s8 lpf_coeff[]; +#define TAP 64 +#define FIL_COEFF_QUANT 10 + + +/********************************************//** +@v + ***********************************************/ +void pedometer() +{ + static s16 th_H = 15000; // 臒lBIύX܂ + static s16 th_L = 11000; + static u16 acc_norm[3]; // x̑傫̃qXgB傫 + static u16 acc_norm_temp; + static u8 interval_hh = 0xFF; // R-RԂ̎ԁBZ߂͂B + static u8 time_l; // Őɏ̌oߎ + static u16 peak_l; // J̐[ + static u16 norm_hist[TAP]; + + static u8 hist_indx; + + signed long filterd; + + u8 i; + + u16 sx16,sy16,sz16; + + DI_wt_chk(); + sx16 = abs( (u16)vreg_ctr[VREG_C_ACC_XH] * 256 + vreg_ctr[VREG_C_ACC_XL] ); + sy16 = abs( (u16)vreg_ctr[VREG_C_ACC_YH] * 256 + vreg_ctr[VREG_C_ACC_YL] ); + sz16 = abs( (u16)vreg_ctr[VREG_C_ACC_ZH] * 256 + vreg_ctr[VREG_C_ACC_ZL] ); + EI(); + + // xNg̃m +#ifdef _mcu_ +# ifndef _use_my_sqrt_ + norm_hist[ hist_indx & TAP-1 ] = sqrt( (long)sx16 * ( sx16 / 2 ) + + (long)sy16 * ( sy16 / 2 ) + + (long)sz16 * ( sz16 / 2 ) + ); +# else + norm_hist[ hist_indx & TAP-1 ] = my_sqrt( (long)sx16 * ( sx16 / 2 ) + + (long)sy16 * ( sy16 / 2 ) + + (long)sz16 * ( sz16 / 2 ) + ); +# endif +#endif + +#ifdef _pc_ + norm_hist[ hist_indx & TAP-1 ] = normh * 256 + norml; +#endif + + hist_indx ++; + + // qXgɃtB^(fir)|āA̒l߂ // + filterd = 0; +// for( i = 8; i != 55; i++ ) // WO΂̂ + for( i = 0; i != 46; i++ ) // We[u܂Bp[^ + { + filterd += (signed long)norm_hist[ ( hist_indx + i ) & TAP-1 ] * lpf_coeff[ i ]; + } + + filterd += (4096)*512; // DCZ...Ǝv + acc_norm_temp = (s16)( filterd /1024 & 0xFFFF ); // FIL_COEFF_QUANT琳K +/* + if( acc_norm[0] < acc_norm_temp ) + { + t_rise ++; + if( t_rise == 0 ) + t_rise == 254; + } + else + { + t_rise = 0; + } +*/ + if( acc_norm[0] != acc_norm_temp ) + { + acc_norm[2] = acc_norm[1]; // qXg + acc_norm[1] = acc_norm[0]; + acc_norm[0] = acc_norm_temp; + } + + if( acc_norm[2] <= acc_norm[1] && acc_norm[1] > acc_norm[0] + && acc_norm[0] > th_H ) + // ɑŁA臒l𒴂Ă + { + if( 21 < interval_hh ) + // Őɑ傩̊Ԋuقǂ悢 + { + if(( interval_hh < 160 ) && ( time_l < interval_hh )) + // Jł + { + if( acc_norm[0] - peak_l > 4200 ){ + // ܂ + hosu_increment_if_necessary(); + } + } + interval_hh = 0; + } + // Ȃ񂿂臒l̓IύX + if( acc_norm[0] > 18000 ) + { + th_L = acc_norm[0] - 10000; + } + else + { + th_L = 11000; + } + } + else + { + if( interval_hh != 255 ) // OaZĊyɏ炢̂ + { + interval_hh ++; + } + } + + // (2) ߂̋ɏ̎ + if( acc_norm[2] >= acc_norm[1] && acc_norm[1] < acc_norm[0] + && acc_norm[0] < th_L ) + { + // ɏo + time_l = 0; + peak_l = acc_norm[0]; + } + else + { + if( time_l != 255 ) + { + time_l ++; + } + } +} + + +/********************************************//** +@{P + + - ݐςCNg + - XV + + *2011/01/20 + + dlύX@OςɂȂ炻Ŏ~߂ + ***********************************************/ +#define HOSU_NODATA 0xFFFF +#define HOSU_MAX 0xFFFE + +void hosu_increment_if_necessary() +{ + u8 year_compd; // hourE␳ς݌ݔNBcomp(ensation -ed) + + // ݎ擾 + DI_wt_chk(); + RWAIT = 1; + while( !RWST ){;} + + cal_temp.hour_bcd = HOUR; + cal_temp.day_bcd = DAY; + cal_temp.month_bcd = MONTH; + cal_temp.year_bcd = YEAR; + cal_temp.min_bcd = MIN; + cal_temp.sec_bcd = SEC; + + RWAIT = 0; + EI(); + + year_compd = bcdtob( cal_temp.year_bcd ); + + now_longhour = get_long_hour(); + + // ݃|C^̍XV + if( ! ( vreg_ctr[ VREG_C_ACC_HOSU_L ] == 0 && // vonAŏ̈܂ł͑O񂩂̌oߎԂvZȂ + vreg_ctr[ VREG_C_ACC_HOSU_M ] == 0 && + vreg_ctr[ VREG_C_ACC_HOSU_H ] == 0 )) //. SrbgORŃ[肷̂̓fW^H݂̕ + { + // v~܂ĂԂlĕKvȂi߂ + // ␳vZ@U뎞ōɂȂꍇAA23ɏ㏑ + if( now_longhour == (u16)-1 ) // NA23䈵̂ƂAvZʂ -1 ɂȂĂ + { + now_longhour = 365 * 24 -1; + if( is_firstyear(year_compd) ) + { + now_longhour += 24; + } + year_compd --; + } + fill_hosu_hist_hours( calc_hours_spend( year_compd ) ); // ݃|C^̍XVs + + // OӂŋL^~H + if( pedolog_overflow ) + { + return; + // ܂BO̍XVȂB + } + } + + // CNgėǂ + cal_log_latest = cal_temp; // OXV + last_hour_fny = now_longhour; + + // O@CNg + if( pool.vreg_c_ext.pedo_log[ p_record ] == HOSU_MAX ) + { + // Ȃł܂ + //. v̍vƗ݌vȂȂ̂邽߂낤ǁAǂȂ́H + return; + } + else if( pool.vreg_c_ext.pedo_log[ p_record ] == HOSU_NODATA ) // ̎ԑэŏ̃JEg̎ + { // ꂵȂ1Ȃ + pool.vreg_c_ext.pedo_log[ p_record ] = 1; + } + else + { + // ʏpX + pool.vreg_c_ext.pedo_log[ p_record ] ++; + } + + // ݐς̍XV // + DI_wt_chk(); + if( ++vreg_ctr[ VREG_C_ACC_HOSU_L ] == 0 ) // JXg`FbN + { + if( ++vreg_ctr[ VREG_C_ACC_HOSU_M ] == 0 ) + { + if( ++vreg_ctr[ VREG_C_ACC_HOSU_H ] == 0 ){ + vreg_ctr[ VREG_C_ACC_HOSU_L ] = 255; //. 낢뎸s... + vreg_ctr[ VREG_C_ACC_HOSU_M ] = 255; + vreg_ctr[ VREG_C_ACC_HOSU_H ] = 255; + } + } + } + EI(); +} + + +/********************************************//** +󔒂̎ԂK؂0ɂāA +܂ނPԂ̃f[^ʒuɃ|C^Hi߂ + ***********************************************/ +static void fill_hosu_hist_hours( u16 hours ) +{ + // OӂH + if( (u16)p_record + hours >= PEDOMETER_LOG_SIZE ) + { + pedolog_overflow = true; + return; + } + + // 󔒂̐Ԃ̐ݒ + while( hours != 0 ) + { + // Vdl@ςŒ~ + p_record ++; +#if 1 // debug + if( p_record >= PEDOMETER_LOG_SIZE ) + { + pedolog_overflow = true; +// dbg_nop(); // ɗ悤ƃoO + break; + } + else +#endif + { + pool.vreg_c_ext.pedo_log[ p_record ] = 0; + } + hours --; + } + + return; +} + + + +/********************************************//** +NAAuf[^vɏ + ***********************************************/ +void clear_hosu_hist() +{ + u8 hours = PEDOMETER_LOG_SIZE; + do + { + hours --; + pool.vreg_c_ext.pedo_log[ hours ] = 0xFFFF; + } + while( hours != 0 ); + + DI_wt_chk(); + vreg_ctr[ VREG_C_ACC_HOSU_L ] = 0; + vreg_ctr[ VREG_C_ACC_HOSU_M ] = 0; + vreg_ctr[ VREG_C_ACC_HOSU_H ] = 0; + p_record = 0; + pedolog_overflow = false; + EI(); +} + + +extern u8 iic_burst_state; +bit pedolog_read_msb; +/********************************************//** + ṽqXgԂB + + PĂԓxɁAqXg̉ʁAʁAꎞԑkĉʏ... + ***********************************************/ +u8 hosu_read( ) +{ + u8 rv; + static u8 p_record_buffer; + static st_calender cal_buff; // ꉞAAg~bN + + if( iic_burst_state == 0 ) + { + p_record_buffer = p_record; + DI_wt_chk(); + cal_buff = cal_log_latest; + EI(); + } + + if( iic_burst_state <= 5 ) + { + rv = *( (u8*)&cal_buff + iic_burst_state ); // + iic_burst_state ++; + return( rv ); + } + else + { + u16 temp; + // 16rbgŋL^Ă̂ł΂炵đ /// Ɗy@񂶂 + temp = pool.vreg_c_ext.pedo_log[ p_record_buffer ]; + if( !pedolog_read_msb ) + { + rv = (u8)( temp & 0x00FF ); + } + else + { + rv = (u8)(( temp >> 8 ) & 0x00FF ); + if( p_record_buffer == 0 ) + { + p_record_buffer = PEDOMETER_LOG_SIZE-1; + } + else + { + p_record_buffer --; + } + } + pedolog_read_msb ^= 1; + return( rv ); + } + +} + + + +/********************************************//** + ŇǓoߎ(hour)ԂB + + + + Ԓl u16 long_hour + ***********************************************/ +const u16 DAYS_FROM_HNY[] = { + 0, + 31, + 31+28, // =59B@cRO͂PTX + 31+28+31, + 31+28+31+30, + 31+28+31+30+31, + 31+28+31+30+31+30, + 31+28+31+30+31+30+31, + 31+28+31+30+31+30+31+31, + 31+28+31+30+31+30+31+31+30, + 31+28+31+30+31+30+31+31+30+31, + 31+28+31+30+31+30+31+31+30+31+30 + }; + +static u16 get_long_hour() +{ + u8 year = bcdtob( cal_temp.year_bcd ); + u8 month = bcdtob( cal_temp.month_bcd ); + u8 day = bcdtob( cal_temp.day_bcd ); + u8 hour = bcdtob( cal_temp.hour_bcd ); + u8 min_bcd = cal_temp.min_bcd; // 召rȂ̂bcd̂܂܂ł悢 + u8 sec_bcd = cal_temp.sec_bcd; + u16 long_hour; + + // ܂̕ + long_hour = DAYS_FROM_HNY[ month -1 ]; // -1̓CfbNX킹 + if( is_leapyear(year) && ( 3 <= month )) + { + // [NŁA[ + long_hour ++; + } + long_hour += day - 1; + long_hour *= 24; // + + long_hour += hour; + + // EȆOHH + if( ( min_bcd > vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY ] ) + || ( ( min_bcd >= vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY ] ) + && ( sec_bcd >= vreg_ctr[ VREG_C_ACC_HOSU_HOUR_BOUNDARY_SEC ] )) + ) + { + return( long_hour ); + } + else + { + return( long_hour -1 ); // 1ԑOɊ܂߂ ӁFUōNɂƂB-1 ɂȂ + } +} + + + +/********************************************//** +@yʕB + +@Kv\Ȑxőł؂ + + pcŃV~[Vđv + ***********************************************/ +static unsigned long my_sqrt(unsigned long x) +{ + unsigned long s, t; + + if (x <= 0) return 0; + + s = 1; + t = x; + while (s < t) + { + s <<= 1; + t >>= 1; + } + do + { + t = s; + s = (x / s + s) >> 1; + } while (s < t); + + return t; +} + + + + +/********************************************//** +@‚ OĂ΂ꂽƁAݎ̍߂BԂ̂fill_hosu_hist_hours ɂ̂܂ܓn + //. year_bcd Ȃ̂Ƃ₾... + ***********************************************/ +static u16 calc_hours_spend( u8 year ) +{ + u8 cal_log_latest_year = bcdtob( cal_log_latest.year_bcd ); + + // N̓ + if( cal_log_latest_year == year ) + { + if( now_longhour > last_hour_fny ) + { + return( now_longhour - last_hour_fny ); + } + else if( now_longhour == 0 && last_hour_fny != 0 ) + { + // N΂ŁAEzځBȂƍNŌɉZĂ܂B + return( 1 ); + } + else + { + return( 0 ); // ԑ(ƁA߂B@ǂȂĂmȂ) + } + } + else if( cal_log_latest_year == ( year -1 ) ) + { + // N܂łƂ + u16 temp = 365 * 24 - last_hour_fny + now_longhour; + if( is_firstyear(year) ) + { + temp += 24; + } + return( temp ); + } + else if( cal_log_latest_year < year ) + { + // Nu + return( PEDOMETER_LOG_SIZE +1 ); + } + else + { + // J_[߂Ȃ + // m[PAł悢cAslƂ킯ɂȂ + return( 0 ); + } +} diff --git a/branches/IS_capture/pedo_lpf_coeff.c b/branches/IS_capture/pedo_lpf_coeff.c new file mode 100644 index 0000000..877ef98 --- /dev/null +++ b/branches/IS_capture/pedo_lpf_coeff.c @@ -0,0 +1,87 @@ +/********************************************//** + vŎgpALPF̃tB^W + $Id$ + ***********************************************/ + +#include "incs.h" + +// ========================================================= +#define TAP 64 +#define FIL_COEFF_QUANT 10 +const s8 lpf_coeff[]={ +/* +Window Function Algorithm LPF +Sampling Frequency = 100.0 +cutoff1 = 6.0000000 +Tap Count =64 +Kaiser Constant = 7.000000 +Quantized by 11 [bits] + */ +/* 0,// [0] + 0, + 0, + 0, + 0, + 0, + 0, + 0, +*/ + 1,// 8 + 2, + 2, + 3, + 3, + 2, + 0, + -2, + -5,// 16 + -9, + -13, + -16, + -16, + -13, + -6, + 4, + 18,// 24 + 37, + 56, + 77, + 95, + 110, + 119, + 122, + 119,// 32 + 110, + 95, + 77, + 56, + 37, + 18, + 4, + -6,// 40 + -13, + -16, + -16, + -13, + -9, + -5, + -2, + 0,// 48 + 2, + 3, + 3, + 2, + 2, + 1, +/* + 0, + 0,// 56 + 0, + 0, + 0, + 0, + 0, + 0, + 0 +*/ +}; diff --git a/branches/IS_capture/pedo_lpf_coeff.h b/branches/IS_capture/pedo_lpf_coeff.h new file mode 100644 index 0000000..f81d6c2 --- /dev/null +++ b/branches/IS_capture/pedo_lpf_coeff.h @@ -0,0 +1,84 @@ +#ifndef _pedo_coeff_h_ +#define _pedo_coeff_h_ + +// ========================================================= +#define TAP 64 +#define FIL_COEFF_QUANT 10 +const s8 lpf_coeff[]={ +/* +Window Function Algorithm LPF +Sampling Frequency = 100.0 +cutoff1 = 6.0000000 +Tap Count =64 +Kaiser Constant = 7.000000 +Quantized by 11 [bits] + */ +/* 0,// [0] + 0, + 0, + 0, + 0, + 0, + 0, + 0, +*/ + 1,// 8 + 2, + 2, + 3, + 3, + 2, + 0, + -2, + -5,// 16 + -9, + -13, + -16, + -16, + -13, + -6, + 4, + 18,// 24 + 37, + 56, + 77, + 95, + 110, + 119, + 122, + 119,// 32 + 110, + 95, + 77, + 56, + 37, + 18, + 4, + -6,// 40 + -13, + -16, + -16, + -13, + -9, + -5, + -2, + 0,// 48 + 2, + 3, + 3, + 2, + 2, + 1, +/* + 0, + 0,// 56 + 0, + 0, + 0, + 0, + 0, + 0, + 0 +*/ +}; +#endif diff --git a/branches/IS_capture/pedometer.h b/branches/IS_capture/pedometer.h new file mode 100644 index 0000000..8760308 --- /dev/null +++ b/branches/IS_capture/pedometer.h @@ -0,0 +1,36 @@ +#ifndef _pedo_ +#define _pedo_ + +#ifdef WIN32 +typedef unsigned char bit; +typedef unsigned char u8; +typedef unsigned short u16; + + +#endif + + +// ========================================================= +extern bit pedolog_read_msb; + + + +// ========================================================= +//void hosu_read_end( ); }N +#define hosu_read_end() pedolog_read_msb = 0 + +u8 hosu_read( ); +void hosu_increment_if_necessary(); +void fill_hosu_hist_hours( u16 ); +void clear_hosu_hist(); +void pedometer(); + + + +// ========================================================= +#define PEDOMETER_LOG_SIZE ( 24 * 7 ) + + + +// ========================================================= +#endif diff --git a/branches/IS_capture/pm.c b/branches/IS_capture/pm.c new file mode 100644 index 0000000..1ec093d --- /dev/null +++ b/branches/IS_capture/pm.c @@ -0,0 +1,1508 @@ +/* ======================================================== + PMIC + cJZ + nintendo + '08 Dec + + $Id: pm.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ +#ifndef _WIN32 + +#pragma nop + +#endif + +#include "incs.h" +#include "adc.h" +#include "led.h" +#include "pm.h" +#include "renge\renge.h" + +#include "batt_params.h" + +#include +#include "fsl_user.h" + +#include "vreg_twl.h" +#include "i2c_mcu.h" + +// ======================================================== +u8 raw_adc_temperature; +BT_VENDER battery_manufacturer = BT_VENDER_NOT_CHECKED; +static u8 ntr_pm_reg_shadow; // NTR PMIC WX^~[ +bit bt_authorized; // obep[^MρB[dJn +u8 chg_led_override; // A_v^ƂA[d邵ȂɊւ炸΂炭_ + +static u16 bt_volt16; + +static bit ntr_pm_bt_low_old; + +bit BT_IN_CHG_delayed_n; +bit temp_zone_charge_disable; // xŏ[d~鎞ɃqXeVXt邽 + +u8 pmic_version; +u8 mgic_version[2]; + +u8 pm_reg_bit_vddlcd; + +static bt_param_* p_bt_param; +extern const bt_param_ bt_param[]; + +bit pm_extdc_old; // OA_v^`FbNƂhĂH + +u8 pmreg_v_core; // SoC̃RAdݒBSNAKE(LAGER)ŕύX邽߁B + +// [d~x֌W +static u8 raw_temp_lh; +static u8 raw_temp_ll; +#define RAW_TEMP_HL 184 // 1 +#define RAW_TEMP_HH 189 // -1 +#define RAW_TEMP_LH_CTR 75 // 50 [degC] +#define RAW_TEMP_LL_CTR 61 // 59 +#define RAW_TEMP_LH_SNAKE 84 // 45 +#define RAW_TEMP_LL_SNAKE 68 // 54 + + +// ======================================================== +static void BT_model_detect(); +static void BT_mgic_quick_start(); +static void BT_mgic_init(); +static void bt_chk_temparature(); +static void bt_get_charge_status(); +static void bt_param_select(); +static void bt_batt_update_twl(); +static void bt_batt_update_ntr(); +static void update_chg_led(); + + +// bp[ +static err send_cmd_mgic_2B( u8 reg, u16 dat ); +static err read_mgic_2B( u8 reg, u8* dat ); +static err read_BT_SOC( u8* dest ); +static err read_BT_voltage( u8* dest ); +static u8 conv_ctr_bt_to_twl_bt(); + + + +// ======================================================== +#define swap_endian_16( x ) (unsigned int)(( x << 8 ) | ( x >> 8 )) + + + +// ======================================================== +const u8 BT_MANUF_BORDER[] = { + 5, 33, 79, 123, 158, 197, 233 + }; + + + +/********************************************//** + dr̊Ǘ + + ȉ̃s͎ɂőEĎ܂B + - PM_BT_AUTH AGPI in + - PM_CHARGE_n CCIC /CHG in + - PM_EXTDC_n /DOK INTP4 in + - PM_CHARGE_EN_n /CEN out + + ȉ͊̕֌W肻łʂ̂ƂŊĎĂ܂B + - LED Charge tsk_LED + - BT_TEMP,_P tsk_ADC + + PM_EXTDC͊荞݃Cɂ邩 + ***********************************************/ +#define INTERVAL_TSK_BATT 60 +// 100Ə[dG[ɂ܂_łȂ̂ + +/********************************************//** + d̊Ď + - A_v^̊Ď + - [dALEDXV + - cʎ擾ALEDXV + ***********************************************/ +void tsk_batt( ) +{ + static u8 task_interval; + + if( task_interval -- != 0 ) + { + return; + } + else + { + task_interval = (u8)( INTERVAL_TSK_BATT / SYS_INTERVAL_TICK ); + } + + // A_v^Xe[^XXV // + pm_chk_adapter(); + + // [d // + bt_chk_temparature(); // x`FbN + if( !temp_zone_charge_disable && bt_authorized && !PM_EXTDC_n ) + { + BT_CHG_ENABLE(); // x͈OKŏ[dĊJ + } + else + { + BT_CHG_DISABLE(); // x댯I@[d~ + } + + bt_get_charge_status(); // [d󋵃`FbN + update_chg_led(); // chg ledXV + + // drc // + BT_get_left(); +} + + +/********************************************//** + [dLEDXV + + - CCIC[dƂΓ_B + - łȂĂAA_v^h΂Ȃ5b_ + - Aw^drΉʼnR[d̎Aq[Y؂iMGICNAKjȂ + ***********************************************/ +static void update_chg_led() +{ + static bit temp_led_chg; // static ‚ȂƃRpCʂ炸 + + temp_led_chg = false; + + // A_v^‚ȂuԁA[dłb킴Ɠ_BdĂ邱Ƃ킩点邽߁B + if( chg_led_override != 0 ) + { + chg_led_override --; + temp_led_chg = true; + } + + // CCIC ͏[dƌĂ邩H + if( ! BT_IN_CHG_delayed_n // bt_get_charge_status()ōXV܂B + && ! PM_EXTDC_n ) + { + temp_led_chg = true; + } + + LED_CHARGE = temp_led_chg; + + // WX^̏[drbgLEDɓ + set_bit( LED_CHARGE, vreg_ctr[VREG_C_STATUS], REG_BIT_BATT_CHARGE ); // set_bit̂݁B + /// 荞݂task_status()ōs +} + + + +/********************************************//** + x`FbN + xtqXeVXL + ***********************************************/ +#define AVG_COUNT 40 +void bt_chk_temparature() +{ + static u8 heikinka_h,heikinka_l; + + if(( raw_temp_lh <= raw_adc_temperature ) + && ( raw_adc_temperature <= RAW_TEMP_HL )) + { + if( heikinka_h < AVG_COUNT ) + { + heikinka_h++; + } + else + { + temp_zone_charge_disable = false; // [d + } + } + else if(( raw_adc_temperature <= raw_temp_ll ) + || ( RAW_TEMP_HH <= raw_adc_temperature )) + { + if( heikinka_l < AVG_COUNT ) + { + heikinka_l++; + } + else + { + temp_zone_charge_disable = true; // [d֎~ + } + } + else + { + // temp_zone_charge_disable ̂܂ + heikinka_h = 0; + heikinka_l = 0; + } +} + + + +/********************************************//** + [d̃`FbN + + [dIC̃oO΍sB + ***********************************************/ +#define TIME_DENOIZE (u8)( 1000 / INTERVAL_TSK_BATT ) +void bt_get_charge_status() +{ + // CCIC̕s̂߁A/CHG̃lQ[gƒJɒx + static u8 anti_chatter; + + if( !BT_IN_CHG_n ) + { + // Ƀ`^O + if( anti_chatter < 2 ) // drŃA_v^āAdɂ킳 + { // Ə[dLED̂ + anti_chatter++; + } + else + + { + BT_IN_CHG_delayed_n = 0; // [d + } + } + else + { + if( !BT_CHG_Ena_n + && ( vreg_ctr[ VREG_C_BT_REMAIN ] < 60 ) + && !( is_mgic_error ) + ) + { + BT_IN_CHG_delayed_n = 0; // [dƈB[dIĂ͂Ȃ + } + else + { + BT_IN_CHG_delayed_n = 1; + anti_chatter = 0; + } + } +} + + + +/********************************************//** + A_v^̗L`FbN + ***********************************************/ +void pm_chk_adapter() +{ + set_bit( !PM_EXTDC_n, vreg_ctr[VREG_C_STATUS], REG_BIT_POW_SUPPLY ); + + if( pm_extdc_old != PM_EXTDC_n ) // HAL ʂ߁A PM_EXTDC_n volatile ɂSzȂ + { + pm_extdc_old = PM_EXTDC_n; + if( !PM_EXTDC_n ) + { + // h + set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_CONNECT ); + chg_led_override = (u8)( 2500 / INTERVAL_TSK_BATT ); // bt_chckwait_ms(5)̂ŐL΂B + } + else + { + u8 temp_v[2]; + + // + set_irq( VREG_C_IRQ1, REG_BIT_BT_DC_DISC ); + chg_led_override = 0; + + // drcʂ1%ŁAA_v^L̎ɂ͖{̂NAQ[ + // 1%ɉ񕜂OɃA_v^ƂA荞݂ȂƊҒʂ + // łȂBʑΉ̂߂őΉ + if( read_mgic_2B( BT_GAUGE_REG_VCELL, temp_v ) == ERR_SUCCESS ) + { + bt_volt16 = ( temp_v[0] * 256 + temp_v[1] ); + } + + if(( bt_volt16 < V_TH_ZERO ) || ( vreg_ctr[ VREG_C_BT_REMAIN ] == 0 )) + { + set_irq( VREG_C_IRQ1, REG_BIT_BT_REMAIN ); + } + } + } +} + + + +/******************************************************** +dr֌W̏ + +@@@Q[W@@b@L@@@@@b@ +@@[[[[[[[[[[[[[[[[[[[[[[[ +@@@dr@Lb@@@@@@@b@H +@@[[[[[[[[[[[[[[[[[[[[[[[ +@@@@@@b@@@@@@b@sr +@@@@@@@@b@@dr@b +@@[[[[[[[[[[[[[[[[[[[[[[[ + +@@Q[WLAdr@̔^@ʂ́A +@drxŔ肷 + + ԒlF@dr 0xFF + drςĂȂ 0 + drς 1 + +***********************************************************/ +bit bt_force_update; + + + +/********************************************//** + obẽ`FbNAƁA{̎ʎʁisp̂߁j + ***********************************************/ +void BT_chk() +{ + static BT_VENDER battery_manufacturer_old; + + battery_manufacturer_old = battery_manufacturer; + + BT_model_detect(); + bt_param_select(); // obecʕ␳p[^ȂǃZbg @łAƂ肠̒l(pi)wɂĂB + + if( system_status.model != MODEL_JIKKI ) + { + bt_authorized = false; + return; + // ܂ + } + + if(( battery_manufacturer_old != battery_manufacturer ) || + bt_force_update ) + { + bt_force_update = false; + iic_mcu_start( ); // ŏtOĂ̂ŌĂт܂ėǂ@ȂƂɁcorz + if( (( battery_manufacturer_old == BT_VENDER_OPEN ) || + ( battery_manufacturer_old == BT_VENDER_NOT_CHECKED )) && + !system_status.reboot ) + { + BT_mgic_quick_start(); + } + BT_mgic_init(); // @픻s܂ + } + bt_authorized = true; + renge_task_immed_add( tski_BT_temp_update ); // drxĎ +} + + + +/********************************************//** + {̎ʎ + ***********************************************/ +void BT_model_detect() +{ + u8 temp; + + BT_DET_P = 1; + BT_TEMP_P = 1; + wait_ms( 3 ); // dオ̂ɎԂ| + + raw_adc_temperature = get_adc( ADC_SEL_BATT_TEMP ); + temp = get_adc( ADC_SEL_BATT_DET ); + BT_DET_P = 0; + + system_status.captureBox = false; + // vbgtH[ // + if( raw_adc_temperature > 0xF0 ) + { + // TS // + system_status.model = MODEL_TS_BOARD; + system_status.family = FAMILY_CTR; // Hł̌딻㏑ + pm_reg_bit_vddlcd = PM_REG_BIT_VDDLCD_CGS; +// set_voltages( system_status.family ); svH + } + else if( raw_adc_temperature < 4 ) + { + // // + system_status.model = MODEL_SHIROBAKO; + + // āFLv`{[h // + if( iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_VERSION ) == 0x01 ) + { + if( iic_mcu_result == I2C_ERR_OK ) // oɏȂƕ]nˑ + { + system_status.captureBox = true; + } + } + } + else + { + // @AcIC NACK( obe܂͎cIC̏ ) + system_status.model = MODEL_JIKKI; // obe̎́ŏ㏑ + } + + // TShome{^A@͖ڑȂ̂ŗv[q /// gndɂƂ΂悩c + if( system_status.model == MODEL_TS_BOARD ) + { + PM_SW_HOME_n_TSBOARD = 1; + } + else + { + PM_SW_HOME_n_TSBOARD = 0; + SW_HOME_n_TSBOARD_RAW = 0; /// @open ǂł񂾂 + } + + // dr[J[̎ // + { + u8 i; + + battery_manufacturer = BT_VENDER_OPEN; // ftHgl + for(i=0; i<=7; i++) + { + if( temp <= BT_MANUF_BORDER[ i ] ) + { + battery_manufacturer = (BT_VENDER)i; + break; + /* + BT_VENDER_MAXELL; // = 0 + BT_VENDER_1; + BT_VENDER_2; + BT_VENDER_3; + BT_VENDER_4; + BT_VENDER_PANA; + BT_VENDER_6; + + BT_VENDER_OPEN; + */ + } + } + } + + + if( ( battery_manufacturer == BT_VENDER_OPEN ) && + ( system_status.model == MODEL_JIKKI ) ) + { + system_status.model = MODEL_JIKKI_NOBATT; + } +} + + + +#define MGIC_CMD_QUICKSTART 0x4000 +/********************************************//** + MGICNCbNX^[giɃoO΍j + ***********************************************/ +static void BT_mgic_quick_start() +{ + wait_ms( 10 ); // MGIC̋NɊ| + + // 0. obecIC NCbNX^[g + send_cmd_mgic_2B( BT_GAUGE_REG_MODE, swap_endian_16( MGIC_CMD_QUICKSTART ) ); + + wait_ms( 150 ); +} + + +/********************************************//** + drcʑ菉 + + drp[^Ȃǂ] + ***********************************************/ + +#define MGIC_CMD_UNLOCK_KEY 0x4A57 +#define MGIC_CMD_RESET 0x5400 +static void BT_mgic_init() +{ + u8 origParam[4]; + + /* + // -1. ZbgĂ݂ + Ⴞ! + i2c_send_buff_2B._u16 = swap_endian_16( MGIC_CMD_RESET ); + send_cmd_mgic_2B( BT_GAUGE_REG_COMMAND ); // ‚NACKԂ + */ + + if( system_status.model != MODEL_JIKKI ) + { + return; + // ܂ + } + + // 1. bN + if( send_cmd_mgic_2B( BT_GAUGE_REG_LOCK, swap_endian_16( MGIC_CMD_UNLOCK_KEY ) ) != ERR_SUCCESS ) + { + // cIC NACK + vreg_set_mgic_error; + return; + // ܂ + } + + vreg_clear_mgic_error; + + // wait_ms( 5 + 1 ); OɃEFCgĂ̂ŕsv + + // 2. p[^ꎞۑ + iic_mcu_read( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4, origParam ); + + // 3. ꎞIOCVύX + send_cmd_mgic_2B( BT_GAUGE_REG_OCV, swap_endian_16( p_bt_param->ocv )); // }WbNio[IȂ́B[J[w + + // 4. ꎞIRCOMPύX + send_cmd_mgic_2B( BT_GAUGE_REG_RCOMP, swap_endian_16( 0xFF00 ) ); + + // 5.[J[ʃp[^̃[h + { + u8 loop; + + // 16oCgƂɋ؂Ƃ̂Ɓ@imCY΍Ƃ񂾂ǁAӖ񂩁Hj + for( loop = 0; loop < 4; loop ++ ) + { + iic_mcu_set_wo_dma( ); + iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_BT_PARAM + loop*16, 16, p_bt_param->mg_param + loop*16 ); + } + } + + // 6. 150msȏ҂ + wait_ms( 150 + 15 ); + + // 7. OCVɁuƂlv + send_cmd_mgic_2B( BT_GAUGE_REG_OCV, swap_endian_16( p_bt_param->ocv ) ); // }WbNio[IȂ́B[J[w + + // 8. 150`600ms҂B600ms͌ + wait_ms( 150 + 15 ); + + // 9. SOCǂށBxt@Ĉ߁B + { + u8 temp; + temp = iic_mcu_read_a_byte( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_SOC ); + + if(( p_bt_param->verify.low <= temp ) && ( temp <= p_bt_param->verify.hi )) + { + // JX^fOKI + }else{ + // s烊gĈH + // dbg_nop(); + } + } + + // 10.RCOMPOCV߂ + iic_mcu_write( IIC_SLA_BT_GAUGE, BT_GAUGE_REG_RCOMP, 4, origParam ); + + // 11. bN + send_cmd_mgic_2B( BT_GAUGE_REG_LOCK, swap_endian_16( 0x0000 ) ); // lock key +} + + + +extern u16 _dbg_rcomp; +/********************************************//** + raw_adc_temperatureɓĂlɕϊƂƂɁA + - WX^ɃZbg + - cICɃZbg + ***********************************************/ +task_status_immed tski_BT_temp_update( ) +{ + static u8 rawdat_old; + static s8 temperature; + s16 newrcomp; + static u8 heikinka; + +/* + T[~X^ - 10k_̎A + pxł͕̃J[uقڃjAŁA + c T[] = 81.48 - 111.97 x ratio + TDK T = 81.406 - 111.81 x ratio +*/ + + if( rawdat_old != raw_adc_temperature ) + { + if( heikinka < 40 ) + { + heikinka ++; + } + else + { + heikinka = 0; + rawdat_old = raw_adc_temperature; + // temperature = 81.45 - 111.9 * raw_adc_temperature/256.0; + // ꂼ256{Ă + temperature = (u8)(( 20851 - 112 * raw_adc_temperature + (256/2) ) /256); + vreg_ctr[VREG_C_BT_TEMP] = temperature; + + newrcomp = 0; + if( temperature > 20 ) + { + newrcomp = ( ( temperature - 20 ) * p_bt_param->rcomp.up )/256; + } + else + { + newrcomp = ( ( temperature - 20 ) * p_bt_param->rcomp.down )/256; + } + newrcomp = p_bt_param->rcomp.rcomp + newrcomp; + + if( newrcomp > 255 ) + { + newrcomp = 255; + } + if( newrcomp < 0 ) + { + newrcomp = 0; + } + _dbg_rcomp = newrcomp; + + if( send_cmd_mgic_2B( BT_GAUGE_REG_RCOMP, newrcomp ) == ERR_SUCCESS ) // swapsv + { + rawdat_old = raw_adc_temperature; + } + else + { + vreg_set_mgic_error; + } + } + } + return ( TSKI_FINISHED ); +} + + + +/********************************************//** + drcICcʂ擾AWX^ɏށB + + @drcICȄȂǂ̎͂Ƃ肠c99%ƂB + + @@@@@@@@ status_1ŊmF”\BdɃ`FbNĂ܂B + + @BT_chk()sĂKv܂B + ***********************************************/ +void BT_get_left(){ + u8 temp[2]; + u8 reg_volatile_temp_bt_remain,reg_volatile_temp_bt_remain_fine; // I2C̔񓯊ǂݍ݂ł̂‚h~ Lbv̏ + u8 fuel_cap_by_voltage; // dŃLbvɎg + + // drc + if( system_status.model == MODEL_TS_BOARD + || system_status.model == MODEL_SHIROBAKO ) + { + // TS & // + if( read_BT_SOC( temp ) == ERR_SUCCESS ) + { + reg_volatile_temp_bt_remain = temp[0]; + reg_volatile_temp_bt_remain_fine = temp[1]; + } + else + { + // G~[V@\ + // @œdf͕sւ邾낤 + reg_volatile_temp_bt_remain = 99; + reg_volatile_temp_bt_remain_fine = 0; + } + } + else + { + // @ // + // cʃ[h + if( read_BT_SOC( temp ) != ERR_SUCCESS ) + { + // cICNACK cobe͂ꂽ + vreg_set_mgic_error; + bt_authorized = false; + reg_volatile_temp_bt_remain = 0; + force_off = true; + } + else + { + u16 temp_u16; + + vreg_clear_mgic_error; + // obep[^̊֌WŃrbgVtgKv + temp_u16 = temp[0] * 256 + temp[1]; + temp_u16 /= p_bt_param->v_scale; + reg_volatile_temp_bt_remain = (u8)(( temp_u16 >> 8 ) & 0xFF ); + if( reg_volatile_temp_bt_remain == 0 ) + { + // 0%̎1.00%ɏグ + // [dJn΂炭͓drcʂ̂ + // 0%ɓBĂ܂Ƃ̂ + reg_volatile_temp_bt_remain = 1; + reg_volatile_temp_bt_remain_fine = 0; + } + else + { + reg_volatile_temp_bt_remain_fine = (u8)(temp_u16 & 0xFF); + } +#ifdef _DBG_BT_FULL_ + reg_volatile_temp_bt_remain = 100; + reg_volatile_temp_bt_remain_fine = 0; +#endif + } + } + + // drd + { + if( read_BT_voltage( temp ) != ERR_SUCCESS ) // 2byte read + { + temp[0] = (u8)( V_BT_4000MV / 256 ); // drdǂ߂Ȃ4000mVƂɂĂB + temp[1] = 0; + } + vreg_ctr[ VREG_C_BT_VOLTAGE ] = temp[0]; + bt_volt16 = ( temp[0] * 256 + temp[1] ); + } + + + // dŃLbv...̏ + { + static u16 hysteresis; + + if( bt_volt16 > V_TH_30 ) + { + fuel_cap_by_voltage = 100; + hysteresis = 0; + } + else if( bt_volt16 - hysteresis > V_TH_LO ) // lqXeVXĂBǂނƂӁB + { + fuel_cap_by_voltage = 30; + hysteresis = 0; + } + else if( bt_volt16 > V_TH_EMPTY ) + { + fuel_cap_by_voltage = BATT_TH_LO; // + hysteresis = 500; + } + else if( bt_volt16 > V_TH_ZERO ) + { + fuel_cap_by_voltage = BATT_TH_EMPTY; + hysteresis = 500; + } + else if( bt_volt16 > V_TH_FORCE_OFF ) + { + fuel_cap_by_voltage = 0; + hysteresis = 500; + } + else + { + force_off = true; + hysteresis = 500; + } + } + + + // [diA_v^hĂĵɏ[dĂȂ + // AiȂƂjf̓drcʂ60%ȏiCCICoOABT_IN_CHG_delayed_nɐD荞ݍς݁j + // = [dBdrւĂMGIC100%ԂȂ + if( !BT_CHG_Ena_n && BT_IN_CHG_delayed_n ){ + reg_volatile_temp_bt_remain = 100; + reg_volatile_temp_bt_remain_fine = 0; + } + else + { // dł̃Lbv|邩H + if( fuel_cap_by_voltage < reg_volatile_temp_bt_remain ) + { + reg_volatile_temp_bt_remain = fuel_cap_by_voltage; + reg_volatile_temp_bt_remain_fine = 0; + } + } + + /* + \ɖȂdĂ炵̂ŃPAł悵 + if( system_status.taikendai_nbd && system_status.model != MODEL_TS_BOARD ) // dr[qɓd‚ȂĂĒlsȂߏ㏑B + { + reg_volatile_temp_bt_remain = 100; + } + */ + + vreg_ctr[ VREG_C_BT_REMAIN ] = reg_volatile_temp_bt_remain; + vreg_ctr[ VREG_C_BT_REMAIN_FINE ] = reg_volatile_temp_bt_remain_fine; + + // twl̃WX^XV@(CTRɊ荞ݓOɍXVȂƊ荞݂̃^C~O܂Ȃ) + bt_batt_update_twl(); + + // cʂŊ荞݁B}ɌƔԂƂ // + { + static u8 bt_remain_old_ctr; + + if( bt_remain_old_ctr != reg_volatile_temp_bt_remain ) + // CTRɒʒm + { + if( (( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO ) && ( BATT_TH_LO < bt_remain_old_ctr ))|| + (( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_EMPTY ) && ( BATT_TH_EMPTY < bt_remain_old_ctr ))|| + (( vreg_ctr[ VREG_C_BT_REMAIN ] == 0 ) && ( bt_remain_old_ctr != 0 )) ) + { + set_irq( VREG_C_IRQ1, REG_BIT_BT_REMAIN ); + } + } + bt_remain_old_ctr = vreg_ctr[ VREG_C_BT_REMAIN ]; + } + + // PMIC-NTRɓdrcʂĂ + bt_batt_update_ntr(); +} + + + +/********************************************//** + tn̓d + + @Xe[^XtO͂ɗĂĂ܂B + + @sԂ邵A + + NsłΓd + + ʂ̃^XNœd͊ĎĂāAXe[^XNA + ***********************************************/ +err PM_LCD_on( ) +{ + err rv = ERR_ERR; + + PM_VDDLCD_on( ); // CGS AMO ؂ւĂ܂ + + if( system_status.LCD_is_CGS == true ) + { + // CTR + wait_ms( DELAY_PM_TSS_50B_AND_TCOM ); + } + else + { + // SPFL/SNAKE ȂAt@XHV on Ԃɋ + wait_ms( 10 ); + SPFL_LCD_AMOL_HV_CONT = 1; + wait_ms( DELAY_PM_TSS_50B_AND_TCOM - 10 ); + } + + PM_TCOM_on( ); + + wait_ms( DELAY_PM_TCOM_TO_VCS ); + + PM_VCS_on( ); + + wait_ms( DELAY_PM_VCS_TO_BL ); + + if( PM_chk_LDSW() != 0 ) // pX + { + // dNG[Ȃd؂Ă܂Bł̓PAȂ + vreg_ctr[VREG_C_STATUS] |= REG_BIT_LCD_POW; + set_irq( VREG_C_IRQ3, REG_BIT_LCD_ON ); + rv = ERR_SUCCESS; + } + + return rv; +} + + +void PM_LCD_off() +{ + // BL‚ĂB// `FbN̂͊荞݂̊֌W + if( ( read_pmic( PM_REG_ADRS_BL ) & 0x03 ) != 0 ) + { + u8 tot; + + PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF ); + vreg_ctr[VREG_C_STATUS] &= bits8(1,0,0,1, 1,1,1,1); + + if( (( REG_BIT_BL_U_OFF | REG_BIT_BL_L_OFF ) & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ) != 0 ) + { + vreg_ctr[ VREG_C_IRQ3 ] |= ( ( REG_BIT_BL_U_OFF | REG_BIT_BL_L_OFF ) & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ); + IRQ0_neg; + tot = 0; + while( !IRQ0 && ( ++tot != 0 ) ){;} + IRQ0_ast; + } + vreg_ctr[VREG_C_COMMAND2] &= ~( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF ); + } + + + + // 50msƂ҂‚AmF܂傤ˁc + if( read_pmic( PM_REG_ADRS_VDD_LCD ) != 0 ) + { + PM_TCOM_off(); + wait_ms( 1 ); + PM_TCOM_VCS_off( ); + wait_ms( DELAY_PM_LCD_OFF ); + + if( system_status.LCD_is_CGS == false ) + { + // At@XȂ|[g + SPFL_LCD_AMOL_HV_CONT = 0; // ̃t@~łLȂ̂ŕQȂ + wait_ms( 10 ); // At@X15V؂Ƃ̃EFCgB + } + + PM_VDDLCD_off( ); // cĂ̑S~߂܂B + vreg_ctr[VREG_C_STATUS] &= ~REG_BIT_LCD_POW; + } + + set_irq( VREG_C_IRQ3, REG_BIT_LCD_OFF ); // ɔB}XN΁B +} + + + +/********************************************//** +@obNCǧ•on/off + +@󂩂@on/off/ێ@̃tOȂ̂Ŗʓ| + +@BL on/on ̏ԂŁAon/onɂƌĂAon/on荞݂܂B + ***********************************************/ +err PM_BL_set( u8 dat ) +{ + u8 blset; // PMIC WX^ɏޒl + u8 intset = 0; // 荞݃WX^ɔfl + // RMWs + + // Read + blset = read_pmic( PM_REG_ADRS_BL ); + + // Modify + // + if(( dat & REG_BIT_CMD_BL_U_ON ) != 0 ) + { + blset |= PM_REG_BIT_BL_U; + intset |= REG_BIT_BL_U_ON; + } + else if(( dat & REG_BIT_CMD_BL_U_OFF ) != 0 ) + { + blset &= ~PM_REG_BIT_BL_U; + intset |= REG_BIT_BL_U_OFF; + } + + // + if(( dat & REG_BIT_CMD_BL_L_ON ) != 0 ) + { + blset |= PM_REG_BIT_BL_L; + intset |= REG_BIT_BL_L_ON; + } + else if(( dat & REG_BIT_CMD_BL_L_OFF ) != 0 ) + { + blset &= ~PM_REG_BIT_BL_L; + intset |= REG_BIT_BL_L_OFF; + } + + if( system_status.family == FAMILY_FLOWER ) + { + // plꖇȂ̂ŁAoff/off łȂΓ_ALX1iڑj𗧂グȂ + // A荞݂͉R‚ SoC ݒ肵Ǝv񂾒lɂB + // todo: vmB + if( blset != 0 ) + { + blset = PM_REG_BIT_BL_L; + } + } + + // write + if( blset != 0 ) // BLtꍇ̓EFCg܂ȂPWMĂ炸 + // Vbg_E邱Ƃ + { + wait_ms( 16 + 10 ); + } + send_cmd_pmic( PM_REG_ADRS_BL, blset ); + + // SoCPWMo悤WX^ZbgĂxL邽߁AXe[^X + // XVĂ܂BĂقƂ̗vB + + // PMICBL̃rbgƁAMCUSTATUSWX^̃rbgʒutȂߓւ + vreg_ctr[VREG_C_STATUS] = (( vreg_ctr[VREG_C_STATUS] & bits8(1,0,0,1, 1,1,1,1) ) + | ( (( blset << 6 ) | ( blset << 4 )) & bits8(0,1,1,0, 0,0,0,0) )); + + // 荞 + /// rbg܂Ƃ߂čŝŁAset_irq()gȂ + { + u8 tot; + + if( ( intset & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ) != 0 ) + { + vreg_ctr[ VREG_C_IRQ3 ] |= ( intset & ~vreg_ctr[ VREG_C_IRQ_MASK3 ] ); + IRQ0_neg; + tot = 0; + while( !IRQ0 && ( ++tot != 0 ) ){;} + IRQ0_ast; + } + } + + return( ERR_SUCCESS ); // łُ͈`FbNsv +} + + + +/********************************************//** + t̑Όd̐ݒs܂B + + zWX^̓e𑗂邾 + ***********************************************/ +void PM_LCD_vcom_set( ) +{ + send_cmd_pmic( PM_REG_ADRS_POW_DAC1, vreg_ctr[VREG_C_VCOM_T] ); // ȂƂɁAPMIC̓o[Xgݕs + send_cmd_pmic( PM_REG_ADRS_POW_DAC2, vreg_ctr[VREG_C_VCOM_B] ); + return; +} + + + +/********************************************//** + ŁAWX^݂Ăяo鎞̂ + + @I2C̎荇̊֌WłĂ + ***********************************************/ +task_status_immed tski_vcom_set( ) +{ + PM_LCD_vcom_set( ); + return ( TSKI_FINISHED ); +} + + +void set_vdd_voltages( enum family_ family ) +{ + if(( family == FAMILY_SNAKE ) || ( family == FAMILY_CLOSER )) + { + // SNAKE + pmreg_v_core = PM_REG_BIT_VDD1P_1R00; + } + else + { + // NORMAL + pmreg_v_core = PM_REG_BIT_VDD1P_1R15; + } +} + +/********************************************//** + V[PX̒ʂd𗧂グĂ䂫܂B + + - Ԓl 0 Ō܂ŐɊB + - 1 V[gȂǂœd肫Ȃ + ***********************************************/ +err PM_sys_pow_on( ) +{ + // dグ +// PM_reset_ast( ); sv PM_LDSW_on܂ + RESET2_ast; + FCRAM_RST_ast; + GYRO_DISABLE(); + + PM_LDSW_on( ); + + wait_ms( 1 + DELAY_PM_TW_PWUP ); + + PM_VDD_normMode(); + PM_VDD_on( ); +// wait_ms( DELAY_PM_TW_PWUP ); // GYROނ + wait_ms( 10 ); + GYRO_ENABLE(); + wait_ms( DELAY_PM_TW_PWUP - 10 ); + + PM_VDD50A_on( ); // tdł͂ȂAledɎg + + wait_ms( DELAY_PM_TW_PWUP ); + + // dN`FbNB + if( !PM_chk_LDSW() ) + { + return ( ERR_ERR ); // reset1͂قƂėǂ + } + + // dIC + pmic_version = read_pmic( PM_REG_ADRS_VER ); + read_mgic_2B( BT_GAUGE_REG_VERSION, mgic_version ); + + return ( ERR_SUCCESS ); +} + + + +void reset_release() +{ + // ZbgȂǁBVXeNI + PM_reset_neg(); + FCRAM_RST_neg; + RESET2_neg; + + codec_reg_init(); // CODEC s背WX^(reset2̌łȂƂȂ̂) + ntr_pm_reg_shadow = 0; // @V@ȂƂ... +} + + + + +/********************************************//** + dOFFV[PX + ***********************************************/ +void PM_sys_pow_off( ) +{ +// if( RESET1_n ) + if( PM_chk_LDSW() ) + { + // ُIłȂƂ + PM_BL_set( REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_OFF ); + PM_LCD_off(); // TCOM,VCS OFF Ă܂B + wait_ms( 20 ); + + PM_reset_ast(); + } + + RESET2_ast; + FCRAM_RST_ast; + + wait_ms( 20 ); + + PM_off( ); + PM_LDSW_off( ); + +} + + + +/********************************************//** + extDC荞 + + dOFFNi[d̉xĎ̂߁ĵ + + i̓|[O(pm) + ***********************************************/ +__interrupt void intp4_extdc( ) +{ +} + + + +/********************************************//** + t^J‚ߊ荞 + + i̓|[O(misc) + ***********************************************/ +__interrupt void intp5_shell( ) +{ + ; +} + + +/********************************************//** + PMICւ̃R}h + ***********************************************/ +__interrupt void intp6_PM_irq( ) +{ + EI(); + if( system_status.pwr_state == ON ) + { + renge_task_immed_add( tski_ntr_pmic_comm ); + } +} + + +/********************************************//** + CODEC̊荞݂󂯂āANTR PMIC݊WX^烊[h + ***********************************************/ +task_status_immed tski_ntr_pmic_comm( ) +{ + u8 reg1_old; + u8 irq_work = 0; + + reg1_old = ntr_pm_reg_shadow; + ntr_pm_reg_shadow = iic_mcu_read_a_byte( IIC_SLA_CODEC, CODEC_REG_PM ); + if( iic_mcu_result != ERR_SUCCESS ) + { + return ( TSKI_FINISHED ); + } + +// DI( ); + + // obNCg //////////////////////////////////// + if( ( ( reg1_old ^ ntr_pm_reg_shadow ) & REG_BIT_TWL_REQ_BL_U ) != 0 ) + { + if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_BL_U ) == 0 ) // + { + irq_work = REG_BIT_TWL_BL_U_OFF; + } + else + { + irq_work = REG_BIT_TWL_BL_U_ON; + } + } + + // obNCg + if( ( ( reg1_old ^ ntr_pm_reg_shadow ) & REG_BIT_TWL_REQ_BL_L ) != 0 ) + { + if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_BL_L ) == 0 ) // + { + irq_work |= REG_BIT_TWL_BL_L_OFF; + } + else + { + irq_work |= REG_BIT_TWL_BL_L_ON; + } + } + +// EI(); + + vreg_ctr[ VREG_C_STATUS_1 ] = ( vreg_ctr[ VREG_C_STATUS_1 ] & ~REG_BIT_MASK_STATUS1_NTR_PM_REG ) + | ( ntr_pm_reg_shadow & REG_BIT_MASK_STATUS1_NTR_PM_REG ); // TWLobNCg̃~[ + + irq_work &= ~vreg_ctr[ VREG_C_IRQ_MASK2 ]; + // set_irq i + if( irq_work != 0 ) + { + u8 tot; + + vreg_ctr[ VREG_C_IRQ2 ] |= irq_work; + IRQ0_neg; // uグăpX𑗂蒼 + tot = 0; + while( !IRQ0 && ( ++tot != 0 ) ){;} // O.DȂ̂łƂ̂҂ IRQ_mcu LɔĂƍ(•s) + IRQ0_ast; + } + + /// obNCgAC𗘂ď肵܂B + + // offNGXg ////////////////////////////////////// + if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_OFF_REQ ) != 0 ) + { + set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ ); + } + + // ZbgNGXg ///////////////////////////////// + if( ( ntr_pm_reg_shadow & REG_BIT_TWL_REQ_RST_REQ ) != 0 ) + { + set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ ); + } + + // obNCg}XNď߂ + EI( ); + if( ( ntr_pm_reg_shadow & ( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_REQ_RST_REQ )) != 0 ) + { + ntr_pm_reg_shadow &= ~( REG_BIT_TWL_REQ_OFF_REQ | REG_BIT_TWL_REQ_RST_REQ ); + iic_mcu_write_a_byte_codec( CODEC_REG_PM, ntr_pm_reg_shadow ); + } + return ( TSKI_FINISHED ); +} + + + +/********************************************//** + command2 tn + +@ bp[IȕBERR_SUCCESSԂȂc + ***********************************************/ +task_status_immed tski_PM_LCD_on() +{ + PM_LCD_on(); + return( TSKI_FINISHED ); +} + +task_status_immed tski_PM_LCD_off() +{ + PM_LCD_off(); + return( TSKI_FINISHED ); +} + +task_status_immed tski_PM_BL_set() +{ + u8 cmd_BL; // volatileƂtȂĂv݂ + + do + { + cmd_BL = vreg_ctr[VREG_C_COMMAND2]; + PM_BL_set( cmd_BL ); // }XNς + } + while( cmd_BL != vreg_ctr[VREG_C_COMMAND2] ); // <- PM_BL_setXV + vreg_ctr[VREG_C_COMMAND2] = 0; + + return( TSKI_FINISHED ); +} + + + +/********************************************//** +@reset2 CODEC ɃZbgAWX^sɂȂ邽 + ***********************************************/ +void codec_reg_init() +{ + wait_ms( 100 ); + + ntr_pm_bt_low_old = conv_ctr_bt_to_twl_bt(); + + iic_mcu_write_a_byte_codec( CODEC_REG_BT, (u8)ntr_pm_bt_low_old ); // SoC 珑 + + vol_reset(); +// renge_task_immed_add( tski_vol_update ); |[ÔŁB + vol_polling = 3; +} + + +/********************************************//** + wp[Ƃbp[ƂH + + ROMߖ̂ + ***********************************************/ +err send_cmd_mgic_2B( u8 reg, u16 dat ) +{ + u16 temp = dat; // Mobt@ + return iic_mcu_write( IIC_SLA_BT_GAUGE, reg, 2, &temp ); // DMA]̂őMf[^obt@̃|C^ǂKv +} + +err read_mgic_2B( u8 reg, u8* dat ) // Mobt@͌Œ +{ + return iic_mcu_read( IIC_SLA_BT_GAUGE, reg, 2, dat ); +} + +err send_cmd_pmic( u8 reg, u8 dat ) +{ + return iic_mcu_write_a_byte( IIC_SLA_PMIC, reg, dat ); +} + +u8 read_pmic( u8 reg ) +{ + return iic_mcu_read_a_byte( IIC_SLA_PMIC, reg ); +} + + +/********************************************//** + dr[J[ƃfAgdrp[^̌ + ***********************************************/ +void bt_param_select() +{ + BT_TYPE bt_type_temp; + + // obe[J[ + if( battery_manufacturer <= BT_VENDER_3 ) // ]TĒԂ臒lƂ + { + bt_type_temp = BT_PARAM_CTR_MAXELL; + } + else + { + bt_type_temp = BT_PARAM_CTR_PANA; + } + + // f + switch( system_status.family ) + { + case( FAMILY_SPFL ): bt_type_temp += BT_PARAM_SPFL_MAXELL; break; // ItZbg cOȎŁcB + case( FAMILY_SNAKE ): bt_type_temp += BT_PARAM_SNAKE_MAXELL; break; + case( FAMILY_CLOSER ): bt_type_temp += BT_PARAM_SPFL_MAXELL; break; + case( FAMILY_CTR ): + case( FAMILY_FLOWER ): // CTR Ɠ + default: /* bt_type_temp ̂܂ */ break; + } + + p_bt_param = &bt_param[ bt_type_temp ]; + + // [d~x̐ݒ + /// tȂ̂ƁA򂪏Ȃ̂ł + if(( system_status.family == FAMILY_SNAKE ) || + ( system_status.family == FAMILY_CLOSER )) + { + raw_temp_lh = RAW_TEMP_LH_SNAKE; + raw_temp_ll = RAW_TEMP_LL_SNAKE; + } + else + { + raw_temp_lh = RAW_TEMP_LH_CTR; + raw_temp_ll = RAW_TEMP_LL_CTR; + } +} + + + + +#define TWL_BT_LEVEL_THREASH_F 60 +#define TWL_BT_LEVEL_THREASH_B 30 +#define TWL_BT_LEVEL_THREASH_1 0 + +/********************************************//** + TWLɓdrcʂĂ + ***********************************************/ +static void bt_batt_update_twl() +{ + if (vreg_ctr[VREG_C_BT_REMAIN] > TWL_BT_LEVEL_THREASH_F ) + { + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x0F; + } + else if (vreg_ctr[VREG_C_BT_REMAIN] > TWL_BT_LEVEL_THREASH_B ) + { + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x0B; + } + else if (vreg_ctr[VREG_C_BT_REMAIN] > BATT_TH_LO) + { + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x07; + } + else if (( vreg_ctr[ VREG_C_BT_REMAIN ] > BATT_TH_EMPTY )|| + !BT_CHG_Ena_n ) + { // A_v^̗LŒグ + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x03; + } + else if (vreg_ctr[VREG_C_BT_REMAIN] > TWL_BT_LEVEL_THREASH_1 ) + { + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x01; + } + else + { + vreg_twl[REG_TWL_INT_ADRS_POWER_INFO] = 0x00; + } +} + + +/********************************************//** + NTRɓdrcʂĂ + ***********************************************/ +static void bt_batt_update_ntr() +{ + static bit initialized; + static bit flag; // HstaticłȂƃRpCɓ{ + + if( system_status.pwr_state == OFF_TRIG ) + { + initialized = false; + } + else + { + + flag = conv_ctr_bt_to_twl_bt(); + + if(( ntr_pm_bt_low_old != flag ) || !initialized ) + { + initialized = true; + ntr_pm_bt_low_old = flag; + iic_mcu_write_a_byte_codec( CODEC_REG_BT, (u8)flag ); + } + } +} + + +/********************************************//** + drcʂǂł + ***********************************************/ +static err read_BT_SOC( u8* dest ) +{ +#ifdef _ENABLE_HAL_ + if( vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ] != 0xFF ) // trueȂHALL +#else + if( 0 ) +#endif + { + *dest = vreg_ctr[ VREG_C_HAL_OVW_BT_FUEL ]; + *(dest+1) = 0x00; + return ERR_SUCCESS; + } + else + { + return( read_mgic_2B( BT_GAUGE_REG_SOC, dest ) ); + } +} + + +/********************************************//** + drdǂł + ***********************************************/ +static err read_BT_voltage( u8* dest ) +{ +#ifdef _ENABLE_HAL_ + if( vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ] != 0xFF ) // trueȂHALL +#else + if( 0 ) +#endif + { + *dest = vreg_ctr[ VREG_C_HAL_OVW_BT_VOLTAGE ]; +// *(dest+1) = 0x00; // gȂ@ǂQoCg[h֐pӂĂȂ̂ł + return ERR_SUCCESS; + } + else + { + return( read_mgic_2B( BT_GAUGE_REG_VCELL, dest ) ); + } +} + + +/********************************************//** + drcʂtwlɃtOɕϊ + ***********************************************/ +static u8 conv_ctr_bt_to_twl_bt() +{ +// ntr_pm_bt_low_old = ( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO )? NTR_PM_BT_EMPTY: NTR_PM_BT_ENOUGH; // 1œdr؂ + if( vreg_ctr[ VREG_C_BT_REMAIN ] <= BATT_TH_LO ) + { + return NTR_PM_BT_EMPTY; + } + else + { + return NTR_PM_BT_ENOUGH; + } +} diff --git a/branches/IS_capture/pm.h b/branches/IS_capture/pm.h new file mode 100644 index 0000000..4b377d0 --- /dev/null +++ b/branches/IS_capture/pm.h @@ -0,0 +1,219 @@ +#ifndef __PM__ +#define __PM__ + +// $Id: asdf$ + + +#define IIC_SLA_PMIC 0x84 +#define IIC_SLA_BT_GAUGE 0x6C + +#define VCOM_DEFAULT_T 92 +#define VCOM_DEFAULT_B 95 + + + +#define BATT_TH_LO 10 +#define BATT_TH_EMPTY 5 + +// dWX^ƒڔrłpɃItZbg +#define V_BT_4000MV (u16)( 4000 * 12.8 ) // dǂݏosp 4000mVݒ +#define V_TH_30 (u16)( 3300 * 12.8 ) // 30% +#define V_TH_LO (u16)( 3200 * 12.8 ) // 10% +#define V_TH_EMPTY (u16)( 3150 * 12.8 ) // 5% +#define V_TH_ZERO (u16)( 3100 * 12.8 ) // 0% +#define V_TH_FORCE_OFF (u16)( 2900 * 12.8 ) // 2.9V ŏIf + + +//========================================================= +#ifdef _WIN32 +#define LED_CHARGE mcuRegP[ _P2_4 ] +#else +#define LED_CHARGE P2.4 +#endif + + +//========================================================= +enum PMIC_REG_ADRS +{ + PM_REG_ADRS_VER = 0x00, // verinfo Ȃ + PM_REG_ADRS_VDD_SYS, // VXegpd + PM_REG_ADRS_VDD_LCD, // td + PM_REG_ADRS_CONT, // /RESET1, LoadSwitch + PM_REG_ADRS_BL, // obNCg on/off + PM_REG_ADRS_POW_SAVE, // ȓd͐ݒ + PM_REG_ADRS_POW_DAC1, + PM_REG_ADRS_POW_DAC2 +}; + +enum BT_GAUGE_REG_ADRS +{ + BT_GAUGE_REG_VCELL = 0x02, // ꂼ16rbĝ + BT_GAUGE_REG_SOC = 0x04, + BT_GAUGE_REG_MODE = 0x06, + BT_GAUGE_REG_VERSION = 0x08, + BT_GAUGE_REG_OCV = 0x0E, + BT_GAUGE_REG_RCOMP = 0x0C, + BT_GAUGE_REG_LOCK = 0x3E, + BT_GAUGE_REG_BT_PARAM = 0x40, + BT_GAUGE_REG_COMMAND = 0xFE +}; + + +typedef enum BT_VENDER +{ + BT_VENDER_MAXELL = 0, // V[g + BT_VENDER_1, // 120 + BT_VENDER_2, // 360 + BT_VENDER_3, // 750 + BT_VENDER_4, // 1.3k + BT_VENDER_PANA = 5, // 2.7k + BT_VENDER_6, // 8.2k + BT_VENDER_OPEN = 7, // open + BT_VENDER_NOT_CHECKED = 0xFF, +}BT_VENDER; + + + +enum NTR_PM_BT_STATUS{ + NTR_PM_BT_ENOUGH, + NTR_PM_BT_EMPTY, + NTR_PM_BT_NOT_INITIALIZED = 0xFF +}; + + + +//========================================================= +// CODECPMIC݊WX^ +#define CODEC_REG_PM 0x10 +#define CODEC_REG_BL 0x11 +#define CODEC_REG_BT 0x12 +//#define CODEC_REG_VOL 0x13 // ...sɂAadc.hŒ` + +// TWLSPIPMICɓR}h +#define REG_BIT_TWL_REQ_OFF_REQ ( 1 << 6 ) +#define REG_BIT_TWL_REQ_RST_REQ ( 1 << 0 ) +#define REG_BIT_TWL_REQ_BL ( 3 << 2 ) + + + +// 0x03 pw cnt3 +#define PM_REG_BIT_LDSW ( 1 << 0 ) +#define PM_REG_BIT_nRST1 ( 1 << 1 ) + +// 0x01 pw cnt1 +#define PM_REG_BIT_VDD_CTR 0x0F +#define PM_REG_BIT_VDD50A ( 1 << 4 ) + +// 0x02 pw cnt2 +#define PM_REG_BIT_VDDLCD_CGS 0x07 +#define PM_REG_BIT_VDDLCD_AMO 0x05 +#define PM_REG_BIT_LCD_VCS ( 0x01 << 4 ) +#define PM_REG_BIT_LCD_TCOM ( 0x01 << 3 ) + +// 0x04 bl cnt +#define PM_REG_BIT_BL_U 0x01 +#define PM_REG_BIT_BL_L 0x02 + + +// 0x05 pow save +#define PM_REG_BIT_VDD1P_1R15 bits8(0,0,0,0, 0,0,0,0) +#define PM_REG_BIT_VDD1P_1R05 bits8(0,0,0,0, 1,0,0,0) +#define PM_REG_BIT_VDD1P_1R00 bits8(0,0,0,1, 0,0,0,0) +#define PM_REG_BIT_VDD1P_0R90 bits8(0,0,1,0, 0,0,0,0) +#define PM_REG_BIT_VDD_AUTO bits8(0,0,0,0, 0,1,1,1) +#define PM_REG_BIT_VDD_PWM bits8(0,0,0,0, 0,0,0,0) + + +#define DELAY_PM_TW_PWUP 16 + 2 +#define DELAY_PM_TSS_50B_AND_TCOM 17 + 1 +#define DELAY_PM_5V_TO_TCOM 17 + 1 +#define DELAY_PM_TCOM_TO_VCS 3 +#define DELAY_PM_VCS_TO_BL ( 17 + 5 ) +#define DELAY_PM_LCD_OFF ( 50 + 1 ) + + +//========================================================= +extern u8 raw_adc_temperature; +extern BT_VENDER battery_manufacturer; +extern bit bt_force_update; + +extern u8 pmic_version; +extern u8 mgic_version[]; + +extern u8 pm_reg_bit_vddlcd; // At@XΉ(dV[PXႤ) + +extern u8 pmreg_v_core; // SoC̃RAdݒBSNAKE(LAGER)ŕύX邽߁B + +//========================================================= +err PM_sys_pow_on( ); +void PM_sys_pow_off( ); +//err PM_bt_auth( ); +void reset_release( ); +void PM_LCD_vcom_set( ); + +err PM_LCD_on( ); +void PM_LCD_off( ); +err PM_BL_set( u8 ); + +void BT_chk(); +void BT_get_left(); +void pm_chk_adapter(); + +void codec_reg_init(); + +void set_vdd_voltages( enum family_ family ); + +task_status_immed tski_BT_temp_update( ); +task_status_immed tski_vcom_set( ); +task_status_immed tski_PM_LCD_on(); +task_status_immed tski_PM_LCD_off(); +task_status_immed tski_PM_BL_set(); + + +err send_cmd_pmic( u8 reg, u8 dat ); +u8 read_pmic( u8 reg ); + + +#define PM_Chg_Stop() { BT_TEMP_P = 0; BT_CHG_DISABLE(); LED_CHARGE = 0; bt_authorized = false; } +// @ĂԑOɁA݉xĂKv܂B +#define PM_reset() ( send_cmd_pmic( PM_REG_ADRS_CONT, 0x00 ) ) + + +//========================================================= + + +// // +#define PM_LDSW_on() ( send_cmd_pmic( PM_REG_ADRS_CONT, PM_REG_BIT_LDSW )) +#define PM_LDSW_off() ( send_cmd_pmic( PM_REG_ADRS_CONT, 0 )) + + +// VXed // +#define PM_VDD_on() ( send_cmd_pmic( PM_REG_ADRS_VDD_SYS, PM_REG_BIT_VDD_CTR )) +#define PM_VDD50A_on() ( send_cmd_pmic( PM_REG_ADRS_VDD_SYS, ( PM_REG_BIT_VDD_CTR | PM_REG_BIT_VDD50A ))) +#define PM_VDD_off() ( send_cmd_pmic( PM_REG_ADRS_VDD_SYS, 0 )) +#define PM_off() PM_VDD_off() + +// CPUd +#define PM_VDD_normMode() ( send_cmd_pmic( PM_REG_ADRS_POW_SAVE, pmreg_v_core | PM_REG_BIT_VDD_PWM )) +#define PM_VDD_ecoMode() ( send_cmd_pmic( PM_REG_ADRS_POW_SAVE, PM_REG_BIT_VDD1P_0R90 | PM_REG_BIT_VDD_AUTO )) + +// ق // +#define PM_reset_neg() ( send_cmd_pmic( PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW | PM_REG_BIT_nRST1 ))) +#define PM_reset_ast() ( send_cmd_pmic( PM_REG_ADRS_CONT, ( PM_REG_BIT_LDSW ))) +#define PM_chk_LDSW() ( read_pmic( PM_REG_ADRS_CONT ) & PM_REG_BIT_LDSW ) +// 1̂ƂAdon + +// tnd // +#define PM_VDDLCD_on() ( send_cmd_pmic( PM_REG_ADRS_VDD_LCD, pm_reg_bit_vddlcd )) +#define PM_TCOM_on() ( send_cmd_pmic( PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_TCOM ))) +#define PM_VCS_on() ( send_cmd_pmic( PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_VCS | PM_REG_BIT_LCD_TCOM ))) +#define PM_TCOM_off() ( send_cmd_pmic( PM_REG_ADRS_VDD_LCD, ( pm_reg_bit_vddlcd | PM_REG_BIT_LCD_VCS ))) +#define PM_TCOM_VCS_off() PM_VDDLCD_on() +#define PM_VDDLCD_off() ( send_cmd_pmic( PM_REG_ADRS_VDD_LCD, 0 ) ) + +#define PM_set_BL( dat ) ( send_cmd_pmic( PM_REG_ADRS_BL, dat ) ) +#define PM_set_adc1( dat ) ( send_cmd_pmic( PM_REG_ADRS_POW_DAC1, dat ) ) +#define PM_set_adc2( dat ) ( send_cmd_pmic( PM_REG_ADRS_POW_DAC2, dat ) ) + + +#endif // __PM__ diff --git a/branches/IS_capture/pool.h b/branches/IS_capture/pool.h new file mode 100644 index 0000000..81c8091 --- /dev/null +++ b/branches/IS_capture/pool.h @@ -0,0 +1,24 @@ +#ifndef _pool_h_ +#define _pool_h_ + + +#include "pedometer.h" + +#define VREG_C_FREE_SIZE 200 + +// 󂢂Ă郁 +typedef struct _st_vreg_c_ext{ + unsigned short pedo_log[ PEDOMETER_LOG_SIZE ]; + unsigned char vreg_c_free[ VREG_C_FREE_SIZE ]; +}st_vreg_c_ext; + +typedef union _uni_pool +{ + st_vreg_c_ext vreg_c_ext; + u8 self_update_work[ 256 ]; // 256ȏ͂܂ƂߏłȂ +}uni_pool; + +extern uni_pool pool; + + +#endif diff --git a/branches/IS_capture/reboot.c b/branches/IS_capture/reboot.c new file mode 100644 index 0000000..53912a5 --- /dev/null +++ b/branches/IS_capture/reboot.c @@ -0,0 +1,23 @@ +/********************************************************//* + ނ胊u[g + + t@CɃCCAZuƁA + ̃W[SœKȂȂ邽ߒǂo + $Id$ + **********************************************************/ +#pragma SFR + +#include "incs_loader.h" + + +void my_reboot(){ +#asm + + MOV PSW,#06H ; _~[PSWZbg + MOVW AX,#000d0h ; Zbg̃xN^l荞ł܂B + PUSH PSW + PUSH AX ; RETÎ߂̃X^bN + RETI ; ŃZbgExN^ɕ + +#endasm +} diff --git a/branches/IS_capture/reboot.h b/branches/IS_capture/reboot.h new file mode 100644 index 0000000..c20e11e --- /dev/null +++ b/branches/IS_capture/reboot.h @@ -0,0 +1,6 @@ +#ifndef __MYREBOOT__ +#define __MYREBOOT__ + +void my_reboot(); + +#endif diff --git a/branches/IS_capture/renge/renge.c b/branches/IS_capture/renge/renge.c new file mode 100644 index 0000000..19bee20 --- /dev/null +++ b/branches/IS_capture/renge/renge.c @@ -0,0 +1,313 @@ +#ifndef _WIN32 + +#pragma section @@CODE ROM_CODE +#pragma nop +#pragma ei +#pragma di +#pragma sfr + +#endif + + +#ifdef _WIN32 +typedef unsigned char bit; +typedef unsigned char u8; +#endif + +/****************************************************************************** + ^XNVXeH + ȂقǁAiTRONɂ̓RtBM[^͂B + ܂ + ctr_mcu_config.rb QƁB task_config.h쐬܂B + *****************************************************************************/ +#include "renge.h" +#include "renge_task_intval.h" +#include "renge_task_immediate.h" +#include "..\WDT.h" +#include "..\config.h" +#include "..\user_define.h" +#include "..\util_funcs.h" + + +#ifdef _WIN32 +#include "../sim/simOnWin.h" +#endif +//#define _renge_test_ + +#define true 1 +#define false 0 + +//****************************************************************************** +u8 renge_flg_interval; +bit renge_task_interval_run_force; +bit renge_task_immediate_not_empty; + + +#include "..\bsr_system.h" +extern system_status_ system_status; + + +//****************************************************************************** +static void renge_task_immed_init(); +static void renge_task_immed_del(); + + + +//****************************************************************************** +task_status_immed ( *tasks_immed[ TASK_IMMED_RUN_LIST_MAX ] )(); + + + +/****************************************************************************** + +E^XNVXe̓Ȉ +EC^[o^C} + *****************************************************************************/ +void renge_init(){ + renge_task_immed_init(); + /* + Cxg^C}̃ZbgȂ + RTC𗬗pĂ̂ŃRgAEg + #define renge_tick 19xxxxxxx [ms] + renge_interval_init(); RTC_init(); + */ +} + + + +/****************************************************************************** + VXe`bNi߂ + *****************************************************************************/ +/* +void renge_interval(){ +// RTCĂ +__interrupt void int_rtc_int(); +} +*/ + + + +/****************************************************************************** + RpCɌ܂ĂAC^[oÑ^XN + ̂ANƍ邩ȂB + *****************************************************************************/ +__callt err renge_task_interval_run(){ + u8 i; + + // C^[oN + DI_wt_chk(); + if(( renge_flg_interval != 0 ) || + ( renge_task_interval_run_force )) /// ȁc + { + renge_task_interval_run_force = false; // N^XNA荞ރ^XNŃtO‚Ȃ̂ + if( renge_flg_interval != 0 ) + { + renge_flg_interval --; + WDT_Restart( ); + } + EI(); + for( i = 0; i != TSK_LAST; i ++ ) + { + tasks[ i ](); + // N^XNԂɋ + renge_task_immed_run(); + } + } + EI(); + return( ERR_SUCCESS ); +} + + + +/***************************************************************************** + N^XN + + task_immed Ԃ֐B + VXetickA炩̊荞݁iI2CʐMȂǁj + X[v畜A^C~OŎs܂B + +Ԓl@TSKI_FINISHED@^XN폜 +@@@@ȊO ̃^C~Oł܂s + + *****************************************************************************/ + + +/************************************** + **************************************/ +void renge_task_immed_init(){ + u8 i; + + for( i = 0; i < TASK_IMMED_RUN_LIST_MAX; i++ ){ + tasks_immed[ i ] = TSK_IMM_EMPTY_; + } +} + + + +/************************************** + s^XN̓o^ + 荞݋֎~ 36us + **************************************/ +__callt err renge_task_immed_add( task_status_immed (*new_task)() ){ + u8 i; + + // Xg̋󂫂̐擪ɓo^ + // 폜΂̃^XŃA폜}[N(TSK_IMM_DELETED_)ƂȂA󂫂Ƃ͖Iɋʂ + // do^ + for( i = 0; i < TASK_IMMED_RUN_LIST_MAX; i ++ ) + { + DI_wt_chk(); + if( tasks_immed[ i ] == TSK_IMM_EMPTY_ ) + { + // 󂫂‚ + tasks_immed[ i ] = new_task; + EI(); + return( ERR_SUCCESS ); + } + else + { + // do^`FbN + /// ɂȂĂȂAOl߂ĂO + if( tasks_immed[ i ] == new_task ) + { + // do^͂Ȃ + EI(); + return( ERR_ERR ); + } + } + EI(); + } + // ^XNo^(͂ + return( ERR_ERR ); +} + + + +/************************************** + s^XN̎s + **************************************/ +__callt err renge_task_immed_run(){ + u8 list_id; + +// while( tasks_immed[ 0 ] != TSK_IMM_EMPTY_ ) + if( tasks_immed[ 0 ] != TSK_IMM_EMPTY_ ) + { + DI_wt_chk(); + for( list_id = 0; list_id < TASK_IMMED_RUN_LIST_MAX; list_id ++ ){ + if( tasks_immed[ list_id ] == TSK_IMM_EMPTY_ ){ + // Xg + EI(); + break; + } +#ifdef _renge_test_ + else if( tasks_immed[ list_id ] == TSK_IMM_DELETED_ ) + { + EI(); + NOP(); + // ^XNǗ̕s + // ݂Ȃ^XNs悤Ƃ + // ^XN̍폜̏܂ + // \Ȃ^C~O immed_run Ă΂ꂽ + } +#endif + else + { + u8 rv; + + EI(); + rv = tasks_immed[ list_id ](); // ^XNs + if( rv == ERR_SUCCESS ) + { + tasks_immed[ list_id ] = TSK_IMM_DELETED_; + } + // ǂ^C~Oœ^XN̓o^ƍ̂DIԂłė鎖 + } + DI_wt_chk(); + } + // Xg̃^XNʂs + + // ^XN폜 // + { + u8 i = 0; // Xg̕בւ + u8 j = 1; + + // K i < jAj < TASK_IMMED_RUN_LIST_MAX (łȂƃ^XNӂ) + while( 1 ) + { + if( tasks_immed[ i ] == TSK_IMM_EMPTY_ ) + { + // Olߊ && Xg + // break; + goto imm_list_sort_fin; + } + else if( tasks_immed[ i ] == TSK_IMM_DELETED_ ) + { + for( ; j < TASK_IMMED_RUN_LIST_MAX; j++ ) + { + if( tasks_immed[ j ] == TSK_IMM_DELETED_ ) + { + // ׁiHj폜Ώۂ + // next j + } + else + { + DI_wt_chk(); + if( tasks_immed[ j ] == TSK_IMM_EMPTY_ ) + { + do{ + j --; + tasks_immed[ j ] = TSK_IMM_EMPTY_; + // XgOlߊ + }while( i < j ); + EI(); + goto imm_list_sort_fin; + } + else + { + // Ol߂ׂ^XN‚ + tasks_immed[ i ] = tasks_immed[ j ]; + tasks_immed[ j ] = TSK_IMM_DELETED_; + i ++; + EI(); + } + } + } + } + else + { + // ̃^XNAؗ + } + i ++; + } + } + } + +imm_list_sort_fin: + // ܂łŊSɑOl߂Ă +#ifdef _renge_test_ + /// ق? + { + u8 a,b; + + a = 0; + for( b = 0 ; b < TASK_IMMED_RUN_LIST_MAX; b++ ) + { + if( tasks_immed[ b ] == TSK_IMM_EMPTY_ ) + { + a = 1; + } + else + { + if( a != 0 ) + { + NOP(); // EMPTYɃ^XNdeletedL + } + } + } + } +#else + NOP(); // Ȃ񂩖ƃJ{ +#endif +// } + return( ERR_SUCCESS ); +} diff --git a/branches/IS_capture/renge/renge.h b/branches/IS_capture/renge/renge.h new file mode 100644 index 0000000..9c7b2e4 --- /dev/null +++ b/branches/IS_capture/renge/renge.h @@ -0,0 +1,26 @@ +#ifndef __renge__ +#define __renge__ + +//****************************************************************************** + + + +//****************************************************************************** +#include "renge_defs.h" +#include "renge_task_immediate.h" +// #include "renge_task_interval_run.h" // O狭N֎~I + +//****************************************************************************** +void renge_init(); +void renge_task_immed_init(); +__callt err renge_task_immed_run(); +__callt err renge_task_immed_add( task_status_immed (*p_task_func)() ); +// static err renge_task_immed_del( u8 ); + + +//****************************************************************************** +__callt err renge_task_interval_run(); +extern u8 renge_flg_interval; +extern bit renge_task_interval_run_force; // ^XNstO + +#endif diff --git a/branches/IS_capture/renge/renge_defs.h b/branches/IS_capture/renge/renge_defs.h new file mode 100644 index 0000000..03c98a6 --- /dev/null +++ b/branches/IS_capture/renge/renge_defs.h @@ -0,0 +1,55 @@ +#ifndef __renge_defs__ +#define __renge_defs__ +/****************************************************************************** + Renge Ver.0 (2009/04/09) + 2009- 7k4jhl R.Fujita @ RED.nintendo + + OSɂ͂قljAȈՓIȃ^XNVXeB + Range Typo ł͂ȂłBQłB + + Ȃ Q ͑̂œ{ QQ + ǖɗ–𑐂łB + 傫ĂˁI + ******************************************************************************/ + +typedef unsigned char u8; +typedef signed char s8; +typedef unsigned short u16; +typedef signed short s16; + + +// ************************************ +#define SYS_INTERVAL_TICK 1.953 + + + +// ************************************ +typedef enum _ERR +{ + ERR_SUCCESS = 0, + ERR_ERR +}err; + + +typedef enum _IMMED_TASK_ERR +{ + TSKI_FINISHED = 0, + TSKI_CONTINUE +}IMMED_TASK_ERR; + + + +/************************************** + C^[oN + *************************************/ +typedef void task_status; + + +/************************************** + Ñ^XNXg + p~ɂȂ邩Ȃ + *************************************/ +typedef IMMED_TASK_ERR task_status_immed; + + +#endif diff --git a/branches/IS_capture/renge/renge_task_config.rb b/branches/IS_capture/renge/renge_task_config.rb new file mode 100644 index 0000000..c2de509 --- /dev/null +++ b/branches/IS_capture/renge/renge_task_config.rb @@ -0,0 +1,59 @@ +#!/usr/bin/ruby -Ks + +tasklist = Array.new + + +if( ARGV[0] == nil ) + printf( "t@C renge_tasks.txt gp܂" ) + datfile = "renge_tasks.txt" +else + datfile = ARGV[0] +end + +if( !File.exist?( datfile ) ) + printf("ݒt@C‚܂B") + exit( 1 ) +end + + +setting = File.open( datfile ) + +setting.each{|dat| + dat.chomp! + if( dat != nil ) + tasklist << dat + end +} + +tasklist.each{|dat| + printf( "\n%s" , dat ) +} +printf( "\n----------\n^XN %d \n", tasklist.size ) + + +#----- ÓI^XN̗ ------------------------------------------------------- +conf = File.new( "renge_task_intval.h", "w+" ) + +conf << "/*XNvgɂ鎩łB蓮ŏȂ悢ł*/\n\n" +conf << "#ifndef __renge_task__\n#define __renge_task__\n\n" +conf << "#include \"renge_defs.h\"\n\n" + +conf << "enum {\n " +tasklist.each{|dat| + conf << "TSK_" << dat.upcase << ", " +} +conf << "TSK_LAST \n };\n\n" + + +tasklist.each{|dat| + conf << "extern void tsk_" << dat << "();\n" +} +conf << "\n" + +conf << "const void ( *tasks[ TSK_LAST ] )() = {\n" +tasklist.each{|dat| + conf << " tsk_" << dat << ",\n" +} +conf << " };\n" + +conf << "\n#endif\n" diff --git a/branches/IS_capture/renge/renge_task_immediate.h b/branches/IS_capture/renge/renge_task_immediate.h new file mode 100644 index 0000000..9ac3bd2 --- /dev/null +++ b/branches/IS_capture/renge/renge_task_immediate.h @@ -0,0 +1,25 @@ +#ifndef __tasks__ +#define __tasks__ + +#include "renge_defs.h" + +// ************************************* +#define TASK_IMMED_RUN_LIST_MAX 10 + + +extern task_status_immed tski_do_command0( ); +extern task_status_immed tski_ntr_pmic_comm(); +extern task_status_immed tski_acc_read(); +extern task_status_immed tski_acc_write(); +//extern task_status_immed tski_acc_setup(); // accero.h +extern task_status_immed tski_mcu_reset(); +extern task_status_immed tski_vol_update(); + + +// ************************************* +#define TSK_IMM_EMPTY_ ( void * )( 0x0000 ) +#define TSK_IMM_DELETED_ ( void * )( 0x0001 ) + + + +#endif diff --git a/branches/IS_capture/renge/renge_task_intval.h b/branches/IS_capture/renge/renge_task_intval.h new file mode 100644 index 0000000..9b0d9ea --- /dev/null +++ b/branches/IS_capture/renge/renge_task_intval.h @@ -0,0 +1,37 @@ +/*XNvgɂ鎩łB蓮ŏȂ悢ł*/ + +#ifndef __renge_task__ +#define __renge_task__ + +#include "renge_defs.h" + +enum TSK +{ + TSK_SW, TSK_ADC, TSK_BATT, TSK_LED_POW, TSK_LED_WIFI, TSK_LED_NOTIFY, TSK_LED_CAM, TSK_MISC, TSK_STATUS, TSK_SYS, TSK_LAST + }; + +extern void tsk_sw(); +extern void tsk_adc(); +extern void tsk_batt(); +extern void tsk_led_pow(); +extern void tsk_led_wifi(); +extern void tsk_led_notify(); +extern void tsk_led_cam(); +extern void tsk_misc(); +extern void tsk_status(); +extern void tsk_sys(); + +const void ( *tasks[ TSK_LAST ] )() = { + tsk_sw, + tsk_adc, + tsk_batt, + tsk_led_pow, + tsk_led_wifi, + tsk_led_notify, + tsk_led_cam, + tsk_misc, + tsk_status, + tsk_sys, + }; + +#endif diff --git a/branches/IS_capture/renge/renge_tasks.txt b/branches/IS_capture/renge/renge_tasks.txt new file mode 100644 index 0000000..73af545 --- /dev/null +++ b/branches/IS_capture/renge/renge_tasks.txt @@ -0,0 +1,11 @@ +sw +adc +batt +led_pow +led_wifi +led_notify +led_cam +misc +status +debug +sys diff --git a/branches/IS_capture/rtc.c b/branches/IS_capture/rtc.c new file mode 100644 index 0000000..dd2d1a9 --- /dev/null +++ b/branches/IS_capture/rtc.c @@ -0,0 +1,182 @@ +/* ======================================================== + RTC + $Id$ + ======================================================== */ +#ifndef _WIN32 + +#pragma sfr +#pragma inline + +#endif + +#include "incs.h" + + +#define RTC_DATA_SIZE 7 +// ======================================================== +static u8 rtc_work[RTC_DATA_SIZE]; +static bit rtc_lock; +static bit rtc_dirty; +bit rtc_alarm_dirty; + + +/********************************************//** + ytF̏ + + WX^̓drrbg̃Zbg + ***********************************************/ +void RTC_init( void ) +{ + + if( !RTCEN ) // rbgĂ烊u[g + { + RTCEN = 1; // W[ON + + // RTCݒ + RTCC0 = bits8(0,0,0,0, 1,0,0,0); /* ~A24ԐA32kóu܂ȂvA荞݂Ȃ */ + // (RTCE 0 RCLOE1 RCLOE0 AMPM CT2 CT1 CT0) + RTCC1 = bits8(1,1,0,0, 0,0,0,0); /* A[荞ݗLJn */ + // (WALE WALIE 0 WAFG RIFG 0 RWST RWAIT) + RTCC2 = bits8(1,0,0,0, 0,0,0,0); /* C^[o:32k/2^6=2msARTCDIVo͂Ȃ */ + // (RINTE RCLOE2 RCKDIV 0 0 ICT2 ICT1 ICT0) + + HOUR = 0x00; + MIN = 0x00; + SEC = 0x00; + MONTH = 0x01; + DAY = 0x01; + WEEK = 0x01; // Mon + YEAR = 0x01; + + ALARMWW = 0x7F; + + vreg_ctr[VREG_C_MCU_STATUS] |= REG_BIT_RTC_BLACKOUT; + } + // 荞ݐݒ + RTCIF = 0; + RTCIIF = 0; + RTCMK = 1; /* 荞()֎~ */ + RTCIMK = 0; /* 荞(A[&C^[o) */ + + RTCE = 1; /* Jn */ + + RWAIT = 1; + while( !RWST ) + {;} + RWAIT = 0; + + rtc_lock = false; + rtc_dirty = false; + rtc_alarm_dirty = false; +} + + + +/********************************************//** + RTC A[荞 + ***********************************************/ +__interrupt void int_rtc( ) +{ + RWAIT = 1; + while( !RWST ) + {;} + // tw + if( ( vreg_ctr[VREG_C_RTC_ALARM_DAY] == DAY ) + && ( vreg_ctr[VREG_C_RTC_ALARM_MONTH] == MONTH ) + && ( vreg_ctr[VREG_C_RTC_ALARM_YEAR] == YEAR ) ) + { + set_irq( VREG_C_IRQ1, REG_BIT_RTC_ALARM ); + } + RWAIT = 0; +} + + + +/********************************************//** + RTC ̃[h + + WX^́Asec,min,hour,week,day,month,year ̏ + ***********************************************/ +void rtc_buf_refresh( ) +{ + if( !rtc_lock ) + { + rtc_lock = true; + RWAIT = 1; + while( !RWST ) + {;} + + memcpy( &vreg_ctr[VREG_C_RTC_SEC], &SEC, RTC_DATA_SIZE ); + RWAIT = 0; +// renge_task_immed_add( tski_rtc_close ); + } +} + + + +/********************************************//** + RTC ̃Cg + + set_rtc_close Ƒ΂ŎgĉB + + ‚̓obt@ɃRs[邾ŁA + ۂRTCɃZbĝset_rtc_close()łB + ***********************************************/ +void set_rtc( u8 adrs, u8 data ) +{ + if( !rtc_dirty ) + { + rtc_dirty = true; + memcpy( rtc_work, &SEC, RTC_DATA_SIZE ); +// renge_task_immed_add( tski_rtc_close ); // I2CIɍs + } + rtc_work[adrs] = data; +} + + + +/********************************************//** + KvȂ΁ARTCWX^̍XV + ***********************************************/ +// task_status_immed tski_rtc_close(){ +void rtc_unlock( ) +{ + // [hbN + rtc_lock = false; + + // CgbN + if( rtc_dirty ) + { + rtc_dirty = false; + RWAIT = 1; + while( !RWST ) + {;} + memcpy( &SEC, rtc_work, RTC_DATA_SIZE ); + RWAIT = 0; + } + + // A[Zbg + if( rtc_alarm_dirty ) + { + rtc_alarm_dirty = false; + WALE = 0; + ALARMWM = vreg_ctr[VREG_C_RTC_ALARM_MIN]; + ALARMWH = vreg_ctr[VREG_C_RTC_ALARM_HOUR]; + WALE = 1; + } +} + + + + +/********************************************//** + RTC VXe`bN^C}荞݃xN^ + + 2^6/fXTi1.953125 msj + ***********************************************/ +__interrupt void int_rtc_int( ) +{ +// renge_flg_interval ++; // CNg/fNg߂ĝ DI()sv + renge_flg_interval = 1; // set1߂ĝ DI()sv +} + diff --git a/branches/IS_capture/rtc.h b/branches/IS_capture/rtc.h new file mode 100644 index 0000000..a203e83 --- /dev/null +++ b/branches/IS_capture/rtc.h @@ -0,0 +1,24 @@ +#ifndef __rtc_h__ +#define __rtc_h__ + +// $Id: asdf$ + + +void RTC_init( void ); +void rtc_buf_refresh( ); +void set_rtc( u8 adrs, u8 data ); + +//task_status_immed tski_rtc_close(); +void rtc_unlock( ); + +// ------------------------------------ +#define RTC_32k_on() { /*RCLOE2 = 0;*/ RCLOE0 = 1; /*P1.2 = 0;*/ PM1.2 = 0; } +#define RTC_32k_off() { PM1.2 = 0; RCLOE0 = 0; } +#define RTC_32k_HI_Z() { PM1.2 = 1; } + + +// ------------------------------------ +extern bit rtc_alarm_dirty; + + +#endif diff --git a/branches/IS_capture/self_flash.c b/branches/IS_capture/self_flash.c new file mode 100644 index 0000000..a662d07 --- /dev/null +++ b/branches/IS_capture/self_flash.c @@ -0,0 +1,635 @@ +/* ======================================================== + ȃAbvf[^ + $Id$ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma di +#pragma ei +#pragma nop +#pragma stop +#pragma halt + +#endif + +#include "incs_loader.h" + +#include +#include "fsl_user.h" +#include "i2c_ctr.h" +#include "i2c_mcu.h" + +#include "pool.h" +#include "magic.h" + +#include "pm.h" +#include "WDT.h" +#include "util_funcs.h" + + +// ======================================================== +const u8 fsl_fx_MHz_u08 = 8; +const u8 fsl_low_voltage_u08 = 1; + + +// ȃtbVp[^ +#define SAM_BLOCK_SIZE 1024 + // 256oCgȏ͂܂Ƃ߂Ă܂B +#define SELF_UPDATE_BUFF_SIZE 256 +#define SELF_UPDATE_SPLIT_WRITE_NUM ( SAM_BLOCK_SIZE / SELF_UPDATE_BUFF_SIZE ) +#define SAM_WORD_SIZE 4 + +// ubNԍi1ubN1kBj +#define INACTIVE_BOOTSECT_TOP 4 +#define FIRM_TOP 8 +#define FIRM_SIZE 12 +#define ALTERNATE_FIRMTOP 20 + + +#ifdef _MCU_BSR_ +#define ACKD ACKD1 +#define ACKE ACKE1 +#define COI COI1 +#define IICAEN IICA1EN +#define IICAPR0 IICAPR10 +#define IICRSV IICRSV1 +#define IICA IICA1 +#define IICAIF IICAIF1 +#define IICAMK IICAMK1 +#define IICAPR1 IICAPR11 +#define IICCTL0 IICCTL01 +#define IICE IICE1 +#define IICF IICF1 +#define IICS IICS1 +#define IICWH IICWH1 +#define IICWL IICWL1 +#define LREL LREL1 +#define SPD SPD1 +#define SPIE SPIE1 +#define STCEN STCEN1 +#define STD STD1 +#define SVA SVA1 +#define WREL WREL1 +#define WTIM WTIM1 +#endif + +#ifndef _WIN32 +#define LED_POW1 P4.2 +#define LED_PM_POW1 PM4.2 +#else +#define LED_POW1 mcuRegP[ _P4_2 ] +#define LED_PM_POW1 mcuRegPM[ _P4_2 ] +#endif + +// ======================================================== +static void FSL_Open( void ); +static void FSL_Close( void ); +void firm_restore( ); + +static err my_FSL_Init(); +static err firm_duplicate( u8 block_src, u8 block_dest ); + +#ifdef _DBG_LED_PRINT_ +void alert( u8 ); +void led_print( u8 ); +#else +# define alert( x ) ; +# define led_print( x ) ; +#endif + + +// ======================================================== +extern uni_pool pool; + + +// 0.Dȍ~ VAbvf[^ +// Vt@[͑vH +#define N_MGC_L 0x1FF6 +#define N_MGC_T 0x4FF6 + + + +/********************************************//** + I2CŎMāA + + ݁A + + `FbNOK@@Vt@[ɐ؂ւčċN + + @@@@NG@@ijt@[ɖ߂čċN + + i̊֐͖߂܂j + ***********************************************/ +void firm_update( ) +{ + u8 target_block; + u8 split_write_count; // ubNւ܂܏ރJE^ + + // ւO ///////////////////////////////////// + my_FSL_Init(); + + /* t@[̃obNAbv + JnAhXAݐ̐擪hubNԍh (TCY FIRM_SIZE) + 0x2000 - 0x4FFF + 0x5000 - 0x7FFF (ubN 20 - 31) ɃRs[ + */ + firm_duplicate( FIRM_TOP, + ALTERNATE_FIRMTOP ); + + // SubN폜 ///////////////////////////////////// + // df𔻒肷邽߁AŏɑSNX^ + //iVt@[ƂɎcĂAȑÕt@[̃tb^j + for( target_block = INACTIVE_BOOTSECT_TOP; + target_block < ALTERNATE_FIRMTOP; + target_block ++ ) + { + FSL_Erase( target_block ); + } + + + // ւ /////////////////////////////////////////// + // XgbvRfBV܂ő + // IAX^[gAbv[`ɔ + for( target_block = INACTIVE_BOOTSECT_TOP; + target_block < ALTERNATE_FIRMTOP; + target_block ++ ) + { + u8 my_spd; + +/* łɏĂBłȂƒfꂽƂIĂ邩ʏoȂ +// // Vt@[̈폜 +// FSL_Erase( target_block ); +*/ + // + for( split_write_count = 0; + split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM; + split_write_count ++ ) + { + u8* p_buffer = &pool.self_update_work[0]; + u16 buff_written_size = 0; + + WDT_Restart( ); + + // I2C珑݃f[^obt@ɂ߂ + do + { + while( !IICAIF && !SPD ) + {;} + my_spd = SPD; + IICAIF = 0; + *p_buffer = IICA; + WREL = 1; + p_buffer ++; + buff_written_size ++; + } + while( ( buff_written_size != SELF_UPDATE_BUFF_SIZE ) + && !SPD ); + + my_spd += SPD; + + // + // ŌゾƁAS~pfBO邪ʂɂ܂Ȃ + if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE + + split_write_count * SELF_UPDATE_BUFF_SIZE ), + ( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) ) + + != FSL_OK ) + { + alert(1); + // ݌̃`FbNG[ + // XgA + firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP ); + FSL_ForceReset(); // Zbg + // FSL_SwapBootCluster( ); // u[gXbvuɁvċNďoȂ炵 + // ߂ĂȂ // + } + + if( my_spd != 0 ) + { + break; + } + } + + // 1ubN݊Bxt@Cs + if( FSL_IVerify( target_block ) != FSL_OK ){ + alert(2); + // ēx xt@CJԂ_ł... /// ďׂ݂H + // XgA + firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP ); + FSL_ForceReset(); // Zbg + // FSL_SwapBootCluster( ); // u[gXbvuɁvċNďoȂ炵 + // ߂ĂȂ // + } + + if( my_spd != 0 ) + { + break; + } + } + + LREL = 1; + + // 񂾃t@[̃`FbN // + { + u8 i; + u8 comp = 0; + + // [_[̃}WbNƁA{̖̃}WbN͓mF + for( i = 0; i < sizeof( __TIME__ ); i++ ) + { + comp += (u8)(( (*( __far u8 * ) ( N_MGC_L + i )) == (*( u8 * ) ( N_MGC_T + i ) )) ? 0 : 1); + } + if( *( __far u8 * )( N_MGC_L +2 ) != ':' ) // ς̂܂ + { + comp ++; + } + + if( comp == 0 ) + { + // OK! + FSL_InvertBootFlag( ); + FSL_SwapBootCluster( ); // ZbgɓBFSL_Close͕sv + } + else + { + // f[^(}WbNio[ĂȂ)G[ + // XgA + alert(3); + + firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP ); + FSL_ForceReset(); // Zbg + // FSL_SwapBootCluster( ); // u[gXbvuɁvċNďoȂ炵 + } + // ߂ĂȂ // + } +} + + + + +/********************************************//** +t@[obNAbv̈悩烊XgA܂B + +`FbNAŌ̍ŌŃu[gXbv̂ŁA +ł̓u[gXbv͕svłB + ***********************************************/ +void firm_restore( ) +{ + DBG_LED_on; + LED_PM_POW1 = 0; + + // obNAbv͐H // + { + u16 i; + u8 comp = 0; + + for( i = 0; i < sizeof( __TIME__ ); i++ ) // sizeof( __TIME__ ) = 8 炵 + { + comp += ( *( __far u8 * )( MGC_LOAD + i ) == *( u8 * )( MGC_HEAD_BKUP + i ) ) ? 0 : 1; + comp += ( *( u8 * )( MGC_HEAD_BKUP + i ) == *( u8 * )( MGC_FOOT_BKUP + i ) ) ? 0 : 1; + } + if( *( u8 * )( MGC_FOOT_BKUP ) == 0xFF ) + { + comp ++; + } + + if( comp != 0 ) + { + // obNAbv̈ꂽ... + comp = 0; + + // 3.3VオȂƍ + EI( ); + iic_mcu_start( ); + RESET2_ast; + FCRAM_RST_ast; + GYRO_DISABLE(); + PM_LDSW_on(); + wait_ms( 1 + DELAY_PM_TW_PWUP ); + PM_VDD_on( ); + + while(1) + { + WDT_Restart(); + + { + // LED sRsR + comp++; + LED_POW1 = ( comp == 1 || comp == 3 )? 1: 0; + if( comp == 8 ) + { + comp = 0; + } + } + + { + // d{^œdoff + static u8 sw_hold_count; + + if( !SW_POW_n_RAW ) + { + sw_hold_count++; + } + else + { + sw_hold_count = 0; + } + + if( sw_hold_count > 16 ) + { + sw_hold_count = 0; + // doff + PM_LDSW_off( ); + + // pwsw҂ŐQ + KRM = ( KR_SW_POW ); // Mask ł͂ȂAMode + MK0 = 0xFFFF; + MK1 = ~( INT_MSK1_KR ); + MK2L = 0xFF; + + // PU5 ̂܂ + PU7 = bits8(0,0,0,0, 1,0,0,0); // PWSWI + PU20 = bits8(0,0,0,0, 0,0,0,0); // SW_HOME ~ + + STOP( ); + +// mcu_wdt_reset; // [v̂͂悭ȂƎv + +// while(1){ +// NOP(); // Ȃ +// } + } + } + + // EFCg + for( i = 1; i != 0; i++ ) + { + NOP(); + NOP(); + NOP(); + NOP(); + } + } + } + } + + // else{ // obNAbv͐Ă + + while( my_FSL_Init() != ERR_SUCCESS ){ // FSLs悤Ȃ~Ȃ... + // todo gC񐔏H + alert(1); + } + + /* t@[̃XgA + 0x4800 - 0x7FFF (ubN 18 - 27) + 0x2000 - 0x47FF (ubN 8 - 17) փRs[ + */ + if( firm_duplicate( ALTERNATE_FIRMTOP, FIRM_TOP ) != ERR_SUCCESS ) + { + alert(2); + } + DBG_LED_off; + + // todo XgAsALEDƂāAT[rXɂĂ炤H + + FSL_ForceReset(); // ZbgA߂ĂȂ +} + + + +/********************************************//** +tbV̏̂߂̑O + ***********************************************/ +static void FSL_Open( void ) +{ + /* save the configuration of the interrupt controller and set */ +#ifdef FSL_INT_BACKUP + fsl_MK0L_bak_u08 = MK0L; /* if (interrupt backup required) */ + fsl_MK0H_bak_u08 = MK0H; /* { */ + fsl_MK1L_bak_u08 = MK1L; /* */ + fsl_MK1H_bak_u08 = MK1H; /* save interrupt controller */ + fsl_MK2L_bak_u08 = MK2L; /* configuration */ + fsl_MK2H_bak_u08 = MK2H; /* */ + MK0L = FSL_MK0L_MASK; /* */ + MK0H = FSL_MK0H_MASK; /* */ + MK1L = FSL_MK1L_MASK; /* prepare interrupt controller */ + MK1H = FSL_MK1H_MASK; /* for selfprogramming */ + MK2L = FSL_MK2L_MASK; /* */ + MK2H = FSL_MK2H_MASK; /* } */ +#endif + + while( DST1 ){;} // DMA~ + DEN1 = 0; + + MK0 = 0xFFFF; + MK1 = 0xFFFF; + MK2 = 0xFFFF; +/* + LVIM = bits8(0,0,0,0, 0,0,1,0); + LVIS = bits8(0,0,0,0, 1,0,0,0); + LVIM = bits8(1,0,0,0, 0,0,1,0); +*/ + FSL_FLMD0_HIGH; // tbVւ +} + + + +/********************************************//** +tbV̏I + ***********************************************/ +static void FSL_Close( void ) +{ + // nH + + FSL_FLMD0_LOW; // tbVCgveNg + +#ifdef FSL_INT_BACKUP + MK0L = fsl_MK0L_bak_u08; /* do{ */ + MK0H = fsl_MK0H_bak_u08; /* restore interrupt controller */ + MK1L = fsl_MK1L_bak_u08; /* configuration */ + MK1H = fsl_MK1H_bak_u08; /* */ + MK2L = fsl_MK2L_bak_u08; /* */ + MK2H = fsl_MK2H_bak_u08; /* } */ +#endif +} + + + +/********************************************//** +@}CRŃt@[Rs[܂B + + __far u8 * p_rom Rs[̐擪AhX + + block_dest Rs[̐擪ubN + + Rs[ɏ悤my_FSL_Init炩ߎsKv܂B + ***********************************************/ +static err firm_duplicate( u8 block_src, + u8 block_dest ) +{ + u8 target_block; + u8 split_write_count; // ubNւ܂܏ރJE^ + __far u8* p_src = ( __far u8* )( block_src * 0x400 ); + u8 retry_error; + + led_print(1); + + // ݐubN̐JԂ + for( target_block = block_dest; + target_block < ( block_dest + FIRM_SIZE ); + target_block ++ ) + { + led_print(2); + WDT_Restart( ); + // ubN + retry_error = 5 + 1; + while( FSL_BlankCheck( target_block ) != FSL_OK ) + { + led_print(3); + FSL_Erase( target_block ); + if( -- retry_error == 0 ) + { + // tbVH + FSL_Close( ); + return ( ERR_ERR ); // ZbgA݂@ǂȂ邩m + } + } + + led_print(4); + // ݕJԂ + for( split_write_count = 0; + split_write_count < SELF_UPDATE_SPLIT_WRITE_NUM; + split_write_count ++ ) + { + u16 buff_written_size; + u8* p_buff; + + // ݃f[^obt@ɂ߂ + buff_written_size = 0; + p_buff = &pool.self_update_work[0]; + do + { + *p_buff = *p_src; + p_src ++; + p_buff ++; + buff_written_size ++; + } + while( buff_written_size != SELF_UPDATE_BUFF_SIZE ); + + // + if( FSL_Write( ( fsl_u32 ) ( target_block * SAM_BLOCK_SIZE + + split_write_count * SELF_UPDATE_BUFF_SIZE ), + ( fsl_u08 ) ( SELF_UPDATE_BUFF_SIZE / SAM_WORD_SIZE ) ) + != FSL_OK ) + { + // Jo̓u[g // + FSL_Close( ); + led_print(5); +// while(1){} + return ( ERR_ERR ); + } + } + led_print(6); + + // 1ubN݊Bd`FbNs + while( FSL_IVerify( target_block ) != FSL_OK ) + { + // Jo̓u[g // + led_print(7); + return ( ERR_ERR ); + } + } + return( ERR_SUCCESS ); + +} + + + +/********************************************//** +ƔœtbV̏ + ***********************************************/ +static err my_FSL_Init() +{ + u8 rv; + + RTCE = 0; + + // ւO // + DI( ); + FSL_Open( ); // 荞݋֎~Ȃ + + FSL_Init( &pool.self_update_work[0] ); // CuB荞ݒfl + rv = FSL_ModeCheck( ); // CgveNg`FbNBs邱Ƃl + + return( (err)rv ); +} + + +/********************************************//** +MCUZbg + +system_status.reboot ܂B + ***********************************************/ +task_status_immed tski_mcu_reset() +{ + // ʂɍċN + my_FSL_Init(); + + FSL_ForceReset(); // Zbg + FSL_Close( ); + + // یH // + mcu_wdt_reset; + return( ERR_SUCCESS ); // no reach +} + + + +/********************************************//** +ɃG[ۂLED_łăG[ʒm + +l悤ł͂ȂAIVȂǂŃpX`FbN + +fobKgȂԂȂ̂ LEDprintf fobÔ߁B + ***********************************************/ +#ifdef _DBG_LED_PRINT_ +// P1.5 = led_pow_red_old +void alert( u8 num ) +{ + u8 i; + + while(1) + { + WDT_Restart(); + LED_POW1 = 1; + for( i = 0; i < num; i++ ) + { + DBG_LED_on; + DBG_LED_off; + } + LED_POW1 = 0; + } +} + + +/********************************************//** +ɃG[ۂLED_łăG[ʒmiQj + +l悤ł͂ȂAIVȂǂŃpX`FbN + +fobKgȂԂȂ̂ LEDprintf fobÔ߁B + ***********************************************/ +void led_print( u8 num ) +{ + u8 i; + + DBG_LED_on; + for( i = 0; i < num; i++ ) + { + LED_POW1 = 1; + LED_POW1 = 0; + } + DBG_LED_off; +} +#endif diff --git a/branches/IS_capture/self_flash.h b/branches/IS_capture/self_flash.h new file mode 100644 index 0000000..768565e --- /dev/null +++ b/branches/IS_capture/self_flash.h @@ -0,0 +1,9 @@ +#ifndef _self_flash_h_ +#define _self_flash_h_ + + +void firm_update(); + + +#endif + diff --git a/branches/IS_capture/sw.c b/branches/IS_capture/sw.c new file mode 100644 index 0000000..ab9c5a8 --- /dev/null +++ b/branches/IS_capture/sw.c @@ -0,0 +1,246 @@ +/* ======================================================== +XCb` +EHOME +EPOWER +EWiFi +̊Ď^XN + + $Id$ +======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP + +#endif + +#include "incs.h" + +#include "i2c_twl.h" +#include "i2c_ctr.h" +#include "led.h" +#include "pm.h" +#include "rtc.h" +#include "sw.h" + + +//========================================================= +/* + vreg_ctrǂ݂̂Ńwb_ +#define INTERVAL_TSK_SW +#define CLICK_THRESHOLD + +#define HOLD_THREASHOLD +#define FORCEOFF_THREASHOLD +*/ +#define TIME_MUKAN ( u8)( 300 / INTERVAL_TSK_SW ) +#define TIME_MUKAN_PWSW_RED_TRIAL (u16)( 15000 / INTERVAL_TSK_SW ) // VAhome}XN + +//========================================================= +u16 SW_pow_count; +bit SW_pow_mask; + +static u8 SW_home_count, SW_wifi_count, SW_home_count_rel; +static u8 sw_wifi_mukan_time; + +u16 off_timeout_timer; + +static u16 sw_pwsw_mukan_time; + + +//========================================================= +static void chk_pow_sw(); +static void chk_wifi_sw(); + + + +/********************************************//** + Ԃ𐔂BςȂł0ɖ߂Ȃ + + mask0̎́Ax܂Ŗ + ***********************************************/ +#define count_sw_n( sw, counter, mask ) \ + { \ + if( sw ){ \ + mask = 0; \ + counter = 0; \ + }else{ \ + if( mask != 0 ){ \ + counter = 0; \ + }else{ \ + counter ++; \ + if( counter == 0 ) counter = -1; \ + } \ + } \ + } + + +/********************************************//** + NbN(`^O)BKvɉĊ荞 + ***********************************************/ +#define chk_clicked( button, count, irq_bit_name ) \ + if( !button ) \ + { \ + if( count < CLICK_THRESHOLD ) \ + { \ + count ++; \ + if( count == CLICK_THRESHOLD ) \ + { \ + count ++; \ + set_irq( VREG_C_IRQ0, irq_bit_name ); \ + } \ + } \ + } \ + else \ + { \ + count = 0; \ + } + + + +/********************************************//** + XCb`̊Ď + + `^O͂˂AAgKȂǂ̌os + ***********************************************/ +void tsk_sw( ) +{ + static u8 task_interval; + + if( system_status.pwr_state == OFF_TRIG ) + { + SW_pow_count = 0; // dɔăNA +// task_interval = 0; + } + + if( system_status.pwr_state != ON_CHECK ) // 莞(PWSW_POWON_TIME)ẐŃvXP[@łȂƃ`^܂肫Ȃ + { + if( task_interval != 0 ) + { + task_interval--; + return; + // ܂ + } + + task_interval = (u8)( INTERVAL_TSK_SW / SYS_INTERVAL_TICK ) -1; // vXP[ɎgĂ܂ˁc + // -1̓|XgfNĝ߂̒ + } + + // 8ms ɂ܂ + switch( system_status.pwr_state ) + { + case( ON ): + case( SLEEP ): + chk_wifi_sw(); + if( !SHELL_OPEN ) + { + break; + } + // else ߂̎ fall through (W‚Ȃpwsw`FbNXLbv)B + // ǂȂC邪... + + // HOME sw // + chk_clicked( SW_HOME_n, SW_home_count, REG_BIT_SW_HOME_CLICK ); + chk_clicked( !SW_HOME_n, SW_home_count_rel, REG_BIT_SW_HOME_RELEASE ); + /* fall through */ + + case( OFF ): + case( ON_CHECK ): + chk_pow_sw(); + + break; + + default: + break; + } +} + + + +/********************************************//** + dXCb`̊Ď + VAz[j[ɂ͓Ȃ悤ɂāANɂĂ邻 + mmen ̕sŃz[j[ɂĂ܂isN[Lj + Ȃ̂Ń}CRł̑}XNB + ***********************************************/ +static void chk_pow_sw() +{ + // @̏ꍇ + if( ! system_status.taikendai ) + { + if( SW_pow_count == ( TIME_PWSW_CLICK ) ) // NbNԂɓB + { + if( is_wifi_calib_resets_ast ) // wifi Lu[VȂASoCɒʒmoffɑJ + { + system_status.pwr_state = OFF_TRIG; + } + set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_CLICK ); + } + else if( SW_pow_count == ( HOLD_THREASHOLD ) ) // ɓB + { + set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_HOLD ); + if( off_timeout_timer == 0 ) // dfJEg_EJnAxȂ悤ɁB + { + off_timeout_timer = vreg_ctr[ VREG_C_OFF_DELAY ] * 16; + } + } + + if( off_timeout_timer != 0 ) // 荞݌A^CAEgŋItB + { + off_timeout_timer --; + if( off_timeout_timer == 0 ) + { + force_off = true; + } + } + + }else{ + // X^hAV + if( SW_pow_count == ( TIME_PWSW_CLICK ) ) + { + if( sw_pwsw_mukan_time == 0 ) + { + set_irq( VREG_C_IRQ0, REG_BIT_SW_POW_CLICK ); + // ȃ^C~OPWSWHOMEj[ɓĂ܂̂邽߂̃}XN^C}[ + sw_pwsw_mukan_time = TIME_MUKAN_PWSW_RED_TRIAL; + } + } + else if( SW_pow_count == ( HOLD_THREASHOLD ) ) + { + force_off = true; + } + + if( sw_pwsw_mukan_time != 0 ) + { + sw_pwsw_mukan_time--; + } + } + count_sw_n( SW_POW_n, SW_pow_count, SW_pow_mask ); // {^Ԃ̃JEg +} + + + +/********************************************//** + wifi XCb`̊Ď + ňȎȂ̂͂킩Ă邪AsɏoĂ܂sǃXCb`~ + c̃XCb`Ŝ񂾂낤 + ***********************************************/ +static void chk_wifi_sw() +{ + // wifi sw // + if( sw_wifi_mukan_time != 0 ) + { + sw_wifi_mukan_time--; + } + else + { + chk_clicked( SW_WIFI_n, SW_wifi_count, REG_BIT_SW_WIFI_CLICK ); + if( SW_wifi_count == CLICK_THRESHOLD +1 ) // 蔭I + { + sw_wifi_mukan_time = TIME_MUKAN; + } + } +} + diff --git a/branches/IS_capture/sw.h b/branches/IS_capture/sw.h new file mode 100644 index 0000000..abe9715 --- /dev/null +++ b/branches/IS_capture/sw.h @@ -0,0 +1,20 @@ +#ifndef _sw_ +#define _sw_ + +#include "config.h" + +extern u16 SW_pow_count; +extern bit SW_pow_mask; + +#define INTERVAL_TSK_SW 8 +#define CLICK_THRESHOLD 5 + +#define HOLD_THREASHOLD (u16)( 3000 /INTERVAL_TSK_SW ) +#define TIME_PWSW_CLICK (u8)( 220 /INTERVAL_TSK_SW ) +#define FORCEOFF_THREASHOLD (u8)( 12000 /INTERVAL_TSK_SW /16 ) + + +extern u16 off_timeout_timer; +#define clear_pow_off_countdown(){ off_timeout_timer = 0; force_off = false; } + +#endif diff --git a/branches/IS_capture/task_debug.c b/branches/IS_capture/task_debug.c new file mode 100644 index 0000000..e5b502c --- /dev/null +++ b/branches/IS_capture/task_debug.c @@ -0,0 +1,122 @@ +/* ======================================================== + fobO^XN + $Id$ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP + +#endif + +#include "incs_loader.h" +//#include "incs.h" +#include "renge\renge.h" +#include "pm.h" +#include "accero.h" + + +// ======================================================== +// 7ZO 4oCg +#define IIC_SLA_DBG_MONITOR 0x44 + + + +#if 0 // fobOj^p^XN + +ӁI@^XNXgOĂ܂̂ŁAgȂ畜ĉI + +/********************************************//** + fobOp^XN + ***********************************************/ +void tsk_debug( ) +{ +// u8 temp; + + /* + if( system_status.pwr_state == ON_TRIG ){ + { + static u8 count = 0; + // fobOLEDi8bitj̏ + temp = iic_mcu_read_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO ); + count ++; + iic_mcu_write_a_byte( IIC_SLA_8LEDS, IIC_8LEDS_REG_DO, count ); + iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, count ); + } + } + */ + +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_IRQ1 ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, boot_ura ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_SND_VOL ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_3D ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 3, vreg_ctr[ VREG_C_3D ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 2, vreg_ctr[ VREG_C_SND_VOL ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 1, vreg_ctr[ VREG_C_STATUS ] ); +// iic_mcu_write_a_byte( IIC_SLA_DBG_MONITOR, 0, vreg_ctr[ VREG_C_ACC_ZH ] ); + + /* + { + u8 str[4]; + + if( ( system_status.pwr_state == ON ) || ( system_status.pwr_state == SLEEP ) ) + { + str[3] = vreg_ctr[ VREG_C_FREE0 ]; + str[2] = vreg_ctr[ VREG_C_FREE1 ]; + str[1] = vreg_ctr[ VREG_C_STATUS ]; + str[0] = vreg_ctr[ VREG_C_RTC_SEC ]; + + str[3] = vreg_ctr[ VREG_C_SND_VOL ]; + str[2] = vreg_ctr[ VREG_C_3D ]; + str[1] = vreg_ctr[ VREG_C_ACC_CONFIG ]; + str[0] = SEC; + iic_mcu_write( IIC_SLA_DBG_MONITOR, 0x03, 4, &str ); + } + } + */ +} + +#endif + + +#if 0 // ^XNЂȌ` +/********************************************//** +^XNЂȌ` + ***********************************************/ +task_interval tsk_hina( ) +{ + switch ( system_status.pwr_state ) + { + case ON_CHECK: + case ON_TRIG: + case ON: + case SLEEP: + case OFF_TRIG: + default: + } + + return; // tic Ă΂邱ƂɂȂ܂ +} + + +// |C^ʼn炤̂͊댯ȋCĂ +/* ̂悤Ɏg + renge_task_immed_add( ^XN֐ւ̃|C^ ); +*/ + +/********************************************//** +^XNЂȌ`(s) + ***********************************************/ +task_status_immed tski_hina( u8 * arg ) +{ + return ( TSKI_FINISHED ); + // TSKI_FINISHED ^XN폜 + // TSKI_CONTINUE ɂȂ񂩊荞݂ȂA[U[ȂAVXe`bN + // Ƃɍēxs +} + + +#endif diff --git a/branches/IS_capture/task_misc.c b/branches/IS_capture/task_misc.c new file mode 100644 index 0000000..4776366 --- /dev/null +++ b/branches/IS_capture/task_misc.c @@ -0,0 +1,420 @@ +/* ======================================================== + ̑Gȃ^XN + ^XN𕪂₷ȂC邪A\[X̖ŕȂ + + $Id: task_misc.c 418 2011-09-22 01:35:37Z n2232 $ + ======================================================== */ + +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP + +#endif + +#include "incs.h" +#include "renge\renge.h" +#include "pm.h" + +#include "accero.h" +#include "adc.h" +#include "i2c_mcu.h" +#include "led.h" +#include "vreg_twl.h" + + + +#ifdef _MCU_BSR_ +#define ACKD ACKD1 +#define ACKE ACKE1 +#define COI COI1 +#define IICAEN IICA1EN +#define IICRSV IICRSV1 +#define IICA IICA1 +#define IICAIF IICAIF1 +#define IICAMK IICAMK1 +#define IICAPR0 IICAPR11 +#define IICAPR1 IICAPR01 +#define IICCTL0 IICCTL10 +#define IICE IICE1 +#define IICF IICF1 +#define IICS IICS1 +#define IICWH IICWH1 +#define IICWL IICWL1 +#define LREL LREL1 +#define SPD SPD1 +#define SPIE SPIE1 +#define STCEN STCEN1 +#define STD STD1 +#define SVA SVA1 +#define WREL WREL1 +#define WTIM WTIM1 +#define TRC TRC1 +#define SMC SMC1 +#define DFC DFC1 +#endif + +// ======================================================== +extern void f(); // X^bN̍Ō𓾂 + + +// ======================================================== +bit twl_ver_read; // twl home menuverǂ񂾂݊J[lɊ荞݂邽 +bit going_to_sleep; // SoCAsleepɓʒm炤Bslp_i HԂ0ɂȂ + // X[v畜AłȂȂ̂h + + +// eXgp +bit reserve_pedo_increnent; + + +// ======================================================== +static void update_LED_3D(); +static void check_twl_vol_irq(); + + + +/********************************************//** + PiŃ^XNɂȂGȏ + - xZT荞݂̎肱ڂmF(Ö) + - TWL PM݊WX^ւ݂̏Γǂ݂ɍs + - ݊J[lTWL`[̋Nʒm + - TWL̉ʕω荞݂`FbN + - 3Dv̍XV + - (HAL) vA₷ + - (fobO) SELWDTZbg𔭐 + ***********************************************/ +void tsk_misc( ) +{ + // 荞݂̎肱ڂH + if( ACC_VALID && ( ( vreg_ctr[ VREG_C_STATUS_1 ] & REG_BIT_ACCERO_ERR ) == 0 )) + { + if( renge_task_immed_add( tski_cbk_accero ) == ERR_SUCCESS ){ + // dbg_nop(); + } + } + + if( system_status.pwr_state == ON ) + { + /* ======================================================== + PM݊WX^ւ̏ + |[OőΉ + ======================================================== */ + if( !PM_IRQ_n ) + { + renge_task_immed_add( tski_ntr_pmic_comm ); + // dbg_nop(); + } + + /* ======================================================== + TWL`[NƂCTRm肽炵 + ======================================================== */ + if( twl_ver_read ) + { + twl_ver_read = false; + set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ ); + } + + // TWL ̉ʕω荞݃`FbN // + check_twl_vol_irq(); + } + + // 3D vXV // + update_LED_3D(); + +#ifdef _ENABLE_HAL_ + // fobOHAL ₷ // + if( reserve_pedo_increnent ) + { + reserve_pedo_increnent = 0; + hosu_increment_if_necessary(); + } +#endif + +#ifdef _ENABLE_PRESS_SEL_TO_WDT_ + if(( system_status.pwr_state == ON ) + || ( system_status.pwr_state == SLEEP )) + { + static u16 timer; + if( !SW_SEL_n ) + { + timer += 1; + if( timer == 2000 ) + { + DI(); + timer = 0; + while(1) + { + NOP(); // ̂WDT + } + } + } + } +#endif + + //. X^bNeXg +// f(); +} + + + +/********************************************//** +TWLVol̂ƁAXC_̑삪obeBO +sN鎖Ah + + TWLł͒ʏ펞A{^8iKBɍ킹Ċ荞݂B + ***********************************************/ +void check_twl_vol_irq() +{ + static u8 vol_level_twl_sent; + static u8 mabiki; + + if( !is_TWL ) + { + return; + // ܂ + } + + if( mabiki != 0 ) + { + mabiki--; + return; + // ܂ + } + + mabiki = 9; // 1t[͊J + if( vol_level_twl != vol_level_twl_sent ) + { + vol_level_twl_sent = vol_level_twl; + set_irq( VREG_C_IRQ2, REG_BIT_SLIDE_VOL_ACROSS_TWL_BOUNDARY ); + } +} + + +/********************************************//** +3DvXV + ***********************************************/ +void update_LED_3D() +{ + if( system_status.pwr_state != ON ) + { + LED_duty_3d = 0; + return; + // ܂ // + } + + if( vreg_ctr[VREG_C_LED_3D] == LED_3D_ILM_OFF ) + { + if( LED_duty_3d != 0 ) + { + LED_duty_3d --; + } + } + else + { + if( LED_duty_3d != vreg_ctr[VREG_C_LED_BRIGHT] ) + { + if( LED_duty_3d < vreg_ctr[VREG_C_LED_BRIGHT] ) + { + LED_duty_3d ++; + } + else + { + LED_duty_3d --; + } + } + } +} + + + + +/********************************************//** + COMMANDWX^ւ̏ + + 0ȂĂ΂܂BPAsv + + - sleep ʒm() + - ZbgnR}h + ***********************************************/ +task_status_immed tski_do_command0( ) +{ + u8 temp_command; + + // command0 {̓dȂ + DI_wt_chk(); + temp_command = vreg_ctr[VREG_C_COMMAND0]; + vreg_ctr[VREG_C_COMMAND0] = 0; + EI(); + + // SLPO(SoC->mcu) 񓯊̂߁ApX[ɂȂĂ܂Amcu SoC̈u + // X[vooASLPIgOoȂB炩ߒʒmĂ炢A + // ^CAEgsB + if( temp_command & REG_BIT_GOING_TO_SLEEP ) + { + going_to_sleep = true; + } + + // ZbgñR}h // + if( ( temp_command & ( REG_BIT_OFF_REQ | REG_BIT_RESET1_REQ | REG_BIT_FCRAM_RESET_REQ | REG_BIT_RESET2_REQ )) != 0x00 ) + { + if( temp_command & REG_BIT_OFF_REQ ) + { + system_status.pwr_state = OFF_TRIG; + } + else + { + if( temp_command & REG_BIT_RESET1_REQ ) + { + PM_reset_ast( ); + RESET2_ast; + FCRAM_RST_ast; + } + if( temp_command & REG_BIT_RESET2_REQ ) + { + RESET2_ast; + if( vreg_twl[ REG_TWL_INT_ADRS_MODE ] == 0 ) + { + FCRAM_RST_ast; // twlntr[hœ삵Ă + } + // TWL[hDS[hւ̐؂ւɃZbg + // IRQǂ܂Ȃꍇ̂TWLWX^ + vreg_twl_init(); + } + if( temp_command & REG_BIT_FCRAM_RESET_REQ ) + { + FCRAM_RST_ast; + } + wait_ms( 5 ); // ԉ҂ + FCRAM_RST_neg; + PM_reset_neg(); + RESET2_neg; + + // CODEC s背WX^ // + codec_reg_init(); + } + } +/* + X[vvɓdOFFEZbgR}h͗܂ + if( vreg_ctr[VREG_C_COMMAND0] != 0 ) + { + return ( TSKI_CONTINUE ); + } +*/ + return ( TSKI_FINISHED ); +} + + + +/* fobOEeXgp ============================== */ +u16 _dbg_rcomp; +extern u8 raw_adc_temperature; + +extern u8 iic_burst_state; +extern bit temp_zone_charge_disable; +extern bit bt_authorized; + + + + +#define KOUMOKU 19 + +static u8 infos_bits[2]; +static u8 infos_temp[5]; + +static const u8 *infos_table[ KOUMOKU ] = { + &infos_temp[0], /* 0 */ + &pmic_version, + (u8*)&battery_manufacturer, + &mgic_version[0], + &mgic_version[1], + &infos_temp[1], /* 5 */ + &raw_adc_temperature, + &infos_temp[2], + &infos_temp[3], + (u8*)&system_status.family, /* 9 */ + &infos_bits[0], /* 10 */ + (u8*)&LED_duty_pow_blu, + (u8*)&LED_duty_3d, + (u8*)&LED_duty_notify_red, + (u8*)&LED_duty_notify_grn, + (u8*)&LED_duty_notify_blu, /* 15 */ + &infos_bits[1], + (u8*)&LED_duty_WiFi, + &infos_temp[4] /* 18 */ + /* ڑƂ KOUMOKU ɒ */ +}; + +/********************************************//** +@fobOpɃXe[^XԂBigXe[^X 0x7Fj + +@Ԓl̓f[^̂ + + oĂ鏇́A + + - 1) vbgtH[ + - 2) PMIC o[W + - 3) dr[J[ + - 4) KXQ[Wo[W + - 5) V + - 6) ( rcomp & 0xFF ) + - 7) raw_adc_temperature + - 8) ( !temp_zone_charge_disable | ( bt_authorized << 1 ) ) + - 9) m点LED̓tJ[H + - 10) system_status.family + ***********************************************/ +u8 extinfo_read(void) +{ + u8 ret = 0xFF; + + /* + * temp͌vZKvȃf[^Bɗ]TȂ̂ŌvZKv + * ϐ́Av/svɊւ炸vZ|V[ + */ + + if( iic_burst_state < KOUMOKU ) + { + infos_temp[0] = system_status.captureBox? MODEL_CAPTURE_BOX + : ( system_status.is_dev? MODEL_ISBAKO: (u8)system_status.model ); + infos_temp[1] = (u8)( _dbg_rcomp & 0xFF ); + infos_temp[2] = ( !temp_zone_charge_disable | ( bt_authorized << 1 ) ); + infos_temp[3] = 1; /* dlύXɂ1ŒɂȂ */ + infos_temp[4] = 0 +// | ( PM_EXTDC_n ? REG_BIT_HAL0_PM_EXTDC_n : 0 ) // status0ɂ + | ( BT_IN_CHG_n ? REG_BIT_HAL0_BT_IN_CHG_n : 0 ) + | ( BT_CHG_Ena_n ? REG_BIT_HAL0_RSV_5 : 0 ) // 󂫃rbggp,out pin + | 0 // WL_TX gȂ +// | ( SHELL_OPEN ? REG_BIT_HAL0_SHELL_OPEN : 0 ) // status0ɂ + | ( SW_WIFI_n ? REG_BIT_HAL0_SW_WIFI_n : 0 ) + | ( SW_HOME_n ? REG_BIT_HAL0_SW_HOME_n : 0 ) + | ( SW_POW_n ? REG_BIT_HAL0_SW_POW_n : 0 ); + + infos_bits[0] = (u8)LED_pow_red; + infos_bits[1] = (u8)LED_CAM; + + ret = *infos_table[iic_burst_state]; + iic_burst_state ++; + } + + return ret; +} + + +#ifdef i2c_timeout_test +/********************************************//** +ifobOpjI2C_mcu ɃvgRᔽ(g`)oꂽSLED_Ēʒm + ***********************************************/ +void i2c_mcu_error_monitor() +{ + LED_duty_pow_blu = 0xff; + LED_duty_3d = 0xff; + LED_duty_notify_red = 0xff; + LED_duty_notify_grn = 0xff; + LED_duty_notify_blu = 0xff; + LED_pow_red = 1; + LED_CAM = 1; +} +#endif + diff --git a/branches/IS_capture/task_status.c b/branches/IS_capture/task_status.c new file mode 100644 index 0000000..361497b --- /dev/null +++ b/branches/IS_capture/task_status.c @@ -0,0 +1,89 @@ +/* ******************************************************** + ꕔ̃Xe[^XWX^XVAKvɉĊ荞݂܂B + + $Id$ +********************************************************* */ + +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP + +#endif + +#include "incs_loader.h" +#include "renge\renge.h" + +#include "pm.h" + +#include "accero.h" +#include "adc.h" +#include "i2c_mcu.h" +#include "led.h" + + +/********************************************//** + Xe[^XWX^́A + - WJ + + Ŋ荞݂KvłΔ܂B + todo: H + ***********************************************/ +void tsk_status( ) +{ + static u8 state_old; // Xe[^Xωo荞 ̈ + u8 diff; + + // WJ`FbN + set_bit( SHELL_OPEN, vreg_ctr[VREG_C_STATUS], REG_BIT_ST_SHELL_OPEN ); + + // Xe[^XWX^֌W 荞 // + // pm.c ŁȀōs܂B + // REG_BIT_LCD_ON/OFF + // REG_BIT_BL_ON/OFF + // REG_BIT_BT_DC_CONNECT/DISC + // REG_BIT_BT_CHG_START/STOP + + diff = (u8)( vreg_ctr[VREG_C_STATUS] ^ state_old ); + if( diff != 0 ) + { + state_old = vreg_ctr[VREG_C_STATUS]; + + if( system_status.pwr_state == ON ) + { + if( diff & REG_BIT_BATT_CHARGE ) + { + // [dԔf + if( is_bt_charging ) // set_irqʁXɌĂԕRpNg + { + set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_START ); + } + else + { + set_irq( VREG_C_IRQ1, REG_BIT_BT_CHG_STOP ); + } + } + } + + if(( system_status.pwr_state == ON ) || + ( system_status.pwr_state == SLEEP ) + ) + { + if( diff & REG_BIT_ST_SHELL_OPEN ) + { + // W̊J‚ + if( is_shell_open ) + { + set_irq( VREG_C_IRQ0, REG_BIT_SHELL_OPEN ); + } + else + { + set_irq( VREG_C_IRQ0, REG_BIT_SHELL_CLOSE ); + } + } + } + } +} + diff --git a/branches/IS_capture/task_sys.c b/branches/IS_capture/task_sys.c new file mode 100644 index 0000000..b3621ad --- /dev/null +++ b/branches/IS_capture/task_sys.c @@ -0,0 +1,830 @@ +/* ======================================================== + task_sys + dĩ^XN + + $Id$ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma NOP +#pragma HALT +#pragma STOP + +#endif + +#include "incs.h" + +#include "i2c_twl.h" +#include "i2c_ctr.h" +#include "led.h" +#include "accero.h" +#include "pm.h" +#include "rtc.h" +#include "sw.h" +#include "adc.h" +#include "self_flash.h" +#include "i2c_mcu.h" +#include "vreg_twl.h" + + +//========================================================= +#define WAIT_SHIROBAKO_POW_CONTROL 240 + + +//========================================================= +extern void nop8(); + + +static err chk_emergencyExit(); +static void force_off_check(); +static void send_getup_to_soc(); +static void chk_sleep(); +static void chk_awake(); +static err direct_boot_sleep_check(); +static err chk_pwsw_timeout(); +static void go_stop(); +static void ports_finalize(); +static void irqs_finalize(); +static void restore_status_regs(); +static err leds_closed(); +#ifdef _DBG_CHK_OFF_LEAK_ +static void leak_check(); +#endif + + + +//========================================================= +extern bit info_led_off; +extern bit going_to_sleep; +extern bit bt_authorized; + +static u8 timeout_sleep; +extern u8 chg_led_override; + +#ifdef i2c_timeout_test +extern bit i2c_mcu_time_out_error; +#endif + + +//========================================================= +#define PWSW_POWON_TIME (u8)( 20 / SYS_INTERVAL_TICK ) // [ms] // INTERVAL_TSK_SW ŊȂBl珬̂ +#define PWSW_ON_CHECK_TIMEOUT 100 // K donׂ̈ɓdXCb`삳ꂽƂA̎Ԍo߂mcuȓd͂ɖ߂ + +#define SELSW_DIRECT_BOOT_DELAY (u16)( 1000 / SYS_INTERVAL_TICK ) + + +/********************************************//** + d̗グX[vȂǂǗ + ***********************************************/ +void tsk_sys( ) +{ + + hal_update(); + + switch ( system_status.pwr_state ) + { + case ON_CHECK: //------------------------------------------------------- + // dfJEg_E^C}NA + clear_pow_off_countdown(); + + // ̊荞݂HALT(X[v) ^@A_v^L + + // dXCb`HALT // + if( system_status.poweron_reason == RSN_PWSW ) + { + if( PM_EXTDC_n ) + { + // A_v^Ȃ + if( chk_pwsw_timeout() == ERR_ERR ) + { + // ^CAEgBX[vɓ + return; + } + } + else + { + BT_chk(); // obeOꂽ[d~Ȃǂ邽 + } + + + if( SW_pow_count < PWSW_POWON_TIME ) + { + // ԂZēdonɓBĂȂ + return; + } + } + // else { if( system_status.poweron_reason == RSN_TRIALAc ) d } + + SW_pow_mask = true; // pwswςȂœd/ JԂȂ悤 + + // d // + iic_mcu_start( ); + + bt_force_update = false; + BT_chk(); // @obe̔AdrcIC̐ݒ + +#ifndef _ALLOW_NOBATT_ + if( system_status.model == MODEL_JIKKI_NOBATT ) + { + renge_task_interval_run_force = true; + system_status.pwr_state = OFF_TRIG; + return; + } +#endif + + // cʃ`FbN + BT_get_left(); // ɁABT_chk()sĂKv܂B + if( +// ( vreg_ctr[VREG_C_BT_REMAIN] < 1 ) // Ŕ肷ƓdrقƂǖƂ +// // A_v^ĂNłȂȂႤ + ( vreg_ctr[VREG_C_BT_VOLTAGE] < ( V_TH_ZERO / 256 ) ) // dr + ) + { + // drȂ̂ŋNȂ(d`FbNĂ) + renge_task_interval_run_force = true; + system_status.pwr_state = OFF_TRIG; + return; + } + + // |[g̕ݒ@dOɁB + PM_SW_WIFI_n = 1; + PM_SW_HOME_n_JIKKI = 1; + PM_WL_TX = 1; + PM_SW_SEL_n = 1; + PM_ACCEL_INT1 = 1; + PM_ACC_VALID = 1; + + if( PM_sys_pow_on( ) != ERR_SUCCESS ) + { // dNsƒG[ + renge_task_interval_run_force = true; + system_status.pwr_state = OFF_TRIG; + return; + } + + // ܂ŗƁAdm // + // vAbvon // + PU_BT_IN_CHG_n = 1; + PU7 = bits8(0,0,0,1, 1,1,0,1); // 4:SW_WIFI 3:SW_PWSW 2:PM_IRQ 0:PM_EXTDC_n + PU_SW_HOME_n_JIKKI = 1; // SW_HOME + wait_ms( 50 ); // vAbvdƏオ̂܂hal_update() ȂƊ҂̂Ȃ + /// 50ms ͎bl + + // W‚ȂAHOMEĂȂƓdȂBb + // (resetɓdfĂ܂B[U[ɂ͋CÂ܂B) + system_status.pwr_state = DIRECT_BOOT_CHECK; + +// system_status.pwr_state = ON_TRIG; + break; + + case DIRECT_BOOT_CHECK: //------------------------------------------------------- + switch( direct_boot_sleep_check() ) + { + case ERR_ERR: // X[vĂāAKvȃL[Ȃ̂ŋNȂ + system_status.pwr_state = OFF_TRIG; + return; + break; + + default: + dbg_nop(); + /* fall through */ + + case ERR_RET1: // 1b sel ȂĂ͂ȂȂBJEg̓r... + return; + break; + + case ERR_SUCCESS: // NB_CNgu[g͂B + system_status.pwr_state = ON_TRIG; + break; + } + + case ON_TRIG: //------------------------------------------------------- + reset_release(); + + if( system_status.poweron_reason == RSN_PWSW || + system_status.poweron_reason == RSN_TRIAL ) + { + // d{^łon̎́ALED_ + vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_AUTO; + } + else + { + // Ƃ肠ALEDԂŋN + vreg_ctr[VREG_C_LED_POW] = LED_POW_ILM_OFF; + } + + system_status.pwr_state = ON_TRIG; + + PM_LCD_vcom_set( ); // LCD̑ΌdlȂǏ + + IIC_ctr_Init( ); + IIC_twl_Init( ); + + vreg_twl_init( ); + vreg_ctr_reset( ); + + system_status.poweron_reason = NONE; + renge_task_interval_run_force = true; + + // 荞݊֌W + KRM = bits8(0,0,0,0, 0,0,0,0); + PIF0 = 0; + + MK0 = INT_MSK0_RSV; + MK1 = INT_MSK1_RSV; + + iic_mcu_start(); + +// MK2 = ~( INT_MSK2_IIC_TWL | INT_MSK2_WIFI_TX_BSR | INT_MSK2_CODEC_PMIRQ ); +// PMK21 = 0; // wifi gȂ + PMK6 = 0; // pm_irq + + // u[gAXe[^XƂȂXV + if( system_status.reboot ) + { + restore_status_regs(); + } + + LED_init( ); // reboot́BT_Chk,BT_chkɍs + + system_status.reboot = 0; + system_status.pwr_state = ON; + + // WDTZbgAI2C̏܂Ŋ荞ݕۗ + // قƂ͂ɂׂȂ... + if( ( vreg_ctr[ VREG_C_MCU_STATUS ] & REG_BIT_STATUS_WDT_RESET ) != 0 ) + { + set_irq( VREG_C_IRQ0, REG_BIT_IRQ_WDT_RESET ); + } + + break; + + case ON: //--------------------------------------------- + if( chk_emergencyExit() == ERR_ERR ) + { + // PMICɂ鋭df`FbN + // fobKreset1AT[g邱ƂB̂Ƃ͑SZbg + system_status.pwr_state = OFF_TRIG; + renge_task_interval_run_force = true; + } + + chk_sleep(); // SLPĎBsystem_status.pwr_state ܂BsV + + force_off_check(); // offJEg + +#ifndef _TAIKENDAI_SEISAN_SPECIAL_ + if( system_status.taikendai ) // A_v^玩œdoff + { + if( PM_EXTDC_n ) + { + system_status.pwr_state = OFF_TRIG; + } + } +#endif + + break; + + case SLEEP: //------------------------------------------ + if( chk_emergencyExit() == ERR_ERR ) + { + system_status.pwr_state = OFF_TRIG; + renge_task_interval_run_force = true; + } + + chk_awake(); // X[v畜A + + force_off_check(); +// leak_check(); + +#ifndef _TAIKENDAI_SEISAN_SPECIAL_ + if( system_status.taikendai ) // A_v^玩œdoff + { + if( PM_EXTDC_n ) + { + system_status.pwr_state = OFF_TRIG; + } + } + break; // ł悢B +#else + /* FALLTHROUGH */ +#endif + + default: //--------------------------------------- + system_status.pwr_state = OFF_TRIG; // 蓾ȂXe[gBfobOp +// dbg_nop(); + /* FALLTHROUGH */ + + case OFF_TRIG: //--------------------------------------- + // LED҂ + if( leds_closed() != ERR_SUCCESS ) + { + return; + } + + // dfJEg_E^C}NA + clear_pow_off_countdown(); + + // xZT~ + vreg_ctr[ VREG_C_ACC_CONFIG ] = 0x00; + tski_acc_setup(); + EI(); // DIԂłė̂ŁAI2C_mcu ̂ɕKv + + // ̑ytF~ + LED_stop( ); + IIC_ctr_Stop( ); + IIC_twl_Stop( ); + RTC_32k_off(); + +// dI̊荞݃Zbg +// PWSW KR3 L +// BG24 KR4 +// ӂJ INTP5 ‚L +// ACA_v^ INTP4 A_v^L +// RTC + while( iic_mcu_busy ) + {;} + + irqs_finalize(); + IRQ0_disable; // SoC ̃s + + PM_sys_pow_off( ); // dJbgIt + + ports_finalize(); + + system_status.pwr_state = OFF; + SW_pow_mask = true; + SW_pow_count = 0; + + // HALfobOZbg@YƓdonoȂȂ邱Ƃc + hal_reset(); + /* FALLTHROUGH */ + + case OFF: + // Fł͓d{^d͂܂B + + system_status.poweron_reason = NONE; + + if( !PM_EXTDC_n + || chg_led_override != 0 ) // ꂪ[ɂȂ܂ő҂ + { + // A_v^L /////////////////////////////// ܂́AA_v^ĂRb͏[dLED_Ă + + // d{^`FbN + system_status.poweron_reason = RSN_PWSW; + system_status.pwr_state = ON_CHECK; + +#ifndef _TAIKENDAI_SEISAN_SPECIAL_ + // VȂ玩œdē + if( system_status.taikendai ) + { + vreg_ctr[ VREG_C_HAL_OVW_CONT0 ] = vreg_ctr[ VREG_C_HAL_OVW_CONT1 ] = 0; + wait_ms(46); // pmic̓dēdl̂ + system_status.poweron_reason = RSN_TRIAL; + system_status.pwr_state = ON_CHECK; + } +#endif + } + else + { + // A_v^Ȃ /////////////////////////////// + + // ȓd͂ֈڍs + iic_mcu_stop( ); + pm_chk_adapter(); + PM_Chg_Stop(); + + + go_stop(); // 荞ݑ҂ stop [hցB + + hal_update(); + renge_flg_interval = 0; + bt_force_update = true; + + // NŔH + if( !PM_EXTDC_n ){ + system_status.pwr_state = OFF; // ĂāAON_CHECKɍs + } +/* + // RTCA[B + else if( vreg_ctr[ VREG_C_IRQ1 ] & REG_BIT_RTC_ALARM ) + { + system_status.poweron_reason = RSN_RTC_ALARM; + system_status.pwr_state = ON_CHECK; + } + // else if( ̊荞݂œdon ){ + // 󑼂̗vł͋NȂ + // } +*/ + else // if( !SW_POW_n ) // iȊOȂjd{^ŋN + { + SW_pow_mask = false; + system_status.poweron_reason = RSN_PWSW; + system_status.pwr_state = ON_CHECK; + } + + RTCIMK = 0; // sys tick ^C}[L + +#ifndef _TAIKENDAI_SEISAN_SPECIAL_ + if( system_status.taikendai ) + { + system_status.pwr_state = OFF_TRIG; + } +#endif + } + } +} + + + +/********************************************//** + d{^`^OB + ^CAEg܂łɓdm肵Ȃoffɖ߂ + ***********************************************/ +static err chk_pwsw_timeout() +{ + static u8 pwsw_timeout = 0; + + if( SW_pow_count != 0 ) + { + pwsw_timeout = 0; + } + else + { + pwsw_timeout ++; + } + + if( pwsw_timeout > PWSW_ON_CHECK_TIMEOUT ) + { + SW_pow_count = 0; + system_status.pwr_state = OFF_TRIG; // XCb`̓mCYBQB + renge_task_interval_run_force = true; + return ERR_ERR; + } + + return ERR_SUCCESS; +} + + + +/********************************************//** + X[vɓ邩H + SoC ʒm + ***********************************************/ +static void chk_sleep() +{ + if( going_to_sleep ) // ΂ SLP_REQ ̑Oɗ\ + { + timeout_sleep ++; + if( timeout_sleep == 0 || // I[o[t[ҁBsleepČLjuŋNċC‚Ȃ + ( PIF0 && !SLP_REQ )) // slp荞݂CANĂ܂ + { + PIF0 = 0; + send_getup_to_soc(); + } + if( PIF0 && SLP_REQ ){ + PIF0 = 0; + PM_VDD_ecoMode(); + system_status.pwr_state = SLEEP; + renge_task_interval_run_force = true; + } + } +} + + +/********************************************//** + N邩H + ***********************************************/ +static void chk_awake() +{ + if( !SLP_REQ ){ + PM_VDD_normMode(); + wait_ms( 5 ); // tdly_sw + send_getup_to_soc(); + system_status.pwr_state = ON; + } +} + + + +/********************************************//** + STOP [hֈڍs + X̃WX^ݒ肪܂ + ***********************************************/ +static void go_stop() +{ + while( RWST ) + {;} + + // 荞ݑ҂ŐQ // + RTCIMK = 1; // systickpC^[o^C}[荞݃}XN + +#ifdef _DBG_CHK_OFF_LEAK_ + leak_check(); +#endif + CKC = bits8(0,0,0,0, 1,0,0,1); // 4MHzɗƂ(bit0)STOPȂĂ͂ȂȂ + OSMC = bits8(0,0,0,0, 0,0,0,0); // 5MHzȉ[hցB + + if( PM_EXTDC_n_RAW ) // ǂ^C~Oő}N邱ƂBHALʂȂׂioffłj + { + STOP(); + } + + // N // + // N + // EKeyReturn荞݁id{^j + // ERTCA[iݕj + + // NbNA + OSMC = bits8(0,0,0,0, 0,0,0,1); // 8MHz쏀 + nop8(); + CKC = bits8(0,0,0,0, 1,0,0,0); // OSMC.FSEL = 1 3clkȏJ +} + +/********************************************//** + FLOWER direct boot `FbN + sleep XChXCb`ɂȂsŃ`FbN(ȂĂ̂Ȃ) + MCU ł邱ƁB + Esleep ɂȂĂNȂ + EAhome ĂN + ***********************************************/ +static err direct_boot_sleep_check() +{ + static u16 sel_sw_count; + + // W󂫁H + if( SHELL_OPEN ) + { + // ʏN + sel_sw_count = 0; + return ERR_SUCCESS; + } + + // else W‚/X[vXCb`on + /// _CNgu[g`FbN + if( SW_SEL_n || SW_POW_n ) + { + // sel ĂȂ + sel_sw_count = 0; + return ERR_ERR; + } + + // else sel ĂBԑ肷B + sel_sw_count++; + if( sel_sw_count < SELSW_DIRECT_BOOT_DELAY ) + { + return ERR_RET1; // Ă邪܂Ȃ + } + + // else _CNgu[g + sel_sw_count = 0; + return ERR_SUCCESS; +} + + + + +/********************************************//** + |[gނ~[hɁB + HłALo͂ɂȂႾ߂ȁB + ***********************************************/ +static void ports_finalize() +{ + SW_WIFI_n_RAW = 0; + PM_SW_WIFI_n = 0; + + SW_HOME_n_JIKKI_RAW = 0; + PM_SW_HOME_n_JIKKI = 0; + + WL_TX = 0; + PM_WL_TX = 0; + + SW_SEL_n = 0; + PM_SW_SEL_n = 0; + + ACCEL_INT1 = 0; + PM_ACCEL_INT1 = 0; + ACC_VALID = 0; + PM_ACC_VALID = 0; + + // PU5 ̂܂ + PU7 = bits8(0,0,0,0, 1,0,0,1); // PWSWI,PM_EXTTDC,( IRQ0_deactive(), PM_IRQ_deactive ) + PU_SW_HOME_n_JIKKI = 0; // SW_HOME ~ +} + +/********************************************//** + MCU IRQ ̒~ + ***********************************************/ +static void irqs_finalize() +{ + // irq}XNݒ + KRM = ( KR_SW_POW ); // Mask ł͂ȂAModeȂ̂B킵 + MK0 = ~( INT_MSK0_EXTDC | INT_MSK0_WDTI ); + MK1 = ~( INT_MSK1_KR | INT_MSK1_RTCINTVAL ); // INT_MSK1_RTCALARM | RTCA[ + MK2L = 0xFF; + + // irqtONA + vreg_ctr[VREG_C_IRQ0] = 0; + vreg_ctr[VREG_C_IRQ1] = 0; + vreg_ctr[VREG_C_IRQ2] = 0; + vreg_ctr[VREG_C_IRQ3] = 0; + + IF0 = 0; + IF1 = 0; + IF2 = 0; +} + + +static err leds_closed() +{ + vreg_ctr[ VREG_C_LED_POW ] = LED_POW_ILM_OFF; + vreg_ctr[ VREG_C_LED_WIFI ] = WIFI_LED_OFF; + vreg_ctr[ VREG_C_LED_3D ] = LED_3D_ILM_OFF; + info_led_off = true; + + if( LED_duty_pow_blu != 0 || + LED_duty_WiFi != 0 || + LED_duty_3d != 0 || + LED_duty_notify_red != 0 || + LED_duty_notify_grn != 0 || + LED_duty_notify_blu != 0 ) + { + return ERR_ERR; + } + return ERR_SUCCESS; +} +/********************************************//** + PMICdُŎ~߂mF + + ***********************************************/ +static err chk_emergencyExit(){ + static u8 shirobako_power_control_count; + + // wifi W[Lu[V[hreset1牺ĂƂ̓`FbNpX + if( is_wifi_calib_resets_ast ) + { + return ERR_SUCCESS; + } + + if( shirobako_power_control_count == 0 ) + { + if( !RESET1_n ) // PM_chk_LDSW() I2C_mgpARXg + { + if( !PM_chk_LDSW() ) + { + // ZbgĂ + /// PMICُIf + return ERR_ERR; + } + else + { + // ̎d + shirobako_power_control_count = 1; + } + } + } + else + { + if( shirobako_power_control_count == WAIT_SHIROBAKO_POW_CONTROL ) // }WbNio[ + // fobKBreset1܂ł͖ + { + if( RESET1_n ) // ZbglQ[g҂ + { + shirobako_power_control_count = 0; + } + else + { + // nothing to do + } + } + else if( shirobako_power_control_count == 200 ) // * (sys_tick)[ms] + // fobK炵 + { +#ifndef _RVD_ + // ͓d؂肽炵 + shirobako_power_control_count = WAIT_SHIROBAKO_POW_CONTROL; + return ERR_ERR; +#endif + } + else + { + if( !RESET1_n ) + { + if( shirobako_power_control_count != 255 ) + shirobako_power_control_count ++; + } + else + { + // (TS{[hŎ蓮/fobK)Zbg炵 + send_cmd_pmic( PM_REG_ADRS_BL, 0 ); + vreg_ctr[VREG_C_STATUS] = ( vreg_ctr[VREG_C_STATUS] & bits8(1,0,0,1, 1,1,1,1) ); + vreg_ctr[VREG_C_COMMAND0] |= REG_BIT_RESET1_REQ; + renge_task_immed_add( tski_do_command0 ); + shirobako_power_control_count = WAIT_SHIROBAKO_POW_CONTROL; + } + } + } + return ERR_SUCCESS; +} + + +/********************************************//** +u[gAXe[^XƂȂXV + ***********************************************/ +static void restore_status_regs() +{ + u8 bl_status_temp; + + bl_status_temp = read_pmic( PM_REG_ADRS_BL ); + vreg_ctr[ VREG_C_STATUS ] |= (( bl_status_temp & 0x03 ) << 5 ); + set_bit( ( read_pmic( PM_REG_ADRS_VDD_LCD ) != 0 ), + vreg_ctr[ VREG_C_STATUS ], REG_BIT_LCD_POW ); + BT_chk(); +} +/********************************************//** + - d{^ + - dr؂ + - dr + + ł̋OFFBƉs\ + ***********************************************/ +static void force_off_check() +{ + if( force_off ) + { + system_status.pwr_state = OFF_TRIG; + renge_task_interval_run_force = true; + } +} + + + +/********************************************//** + SoCN + +@@dʏɖ߂ĂĂʼnB + ***********************************************/ +void send_getup_to_soc() +{ + going_to_sleep = false; + timeout_sleep = 0; +#ifdef _MODEL_CTR_ + SLP_ACK = 1; + nop8(); + SLP_ACK = 0; +#endif +} + + + + +/********************************************//** + ȃAbvf[g firm_update() ĂԁiisrsłȂ̂Łj + + task_status_immed^ Ԃ悤ɂ΂̂ł... + ***********************************************/ +task_status_immed tski_firm_update(){ + firm_update(); + return( ERR_SUCCESS ); +} + + + +#ifdef _DBG_CHK_OFF_LEAK_ +/********************************************//** + pinݒ~X`FbN + ***********************************************/ +static void leak_check() +{ + volatile u8 ports_i[12]; + volatile u8 ports_o[12]; + + // vAbv؂YH + ports_i[0] = ( PM0 & PU0 & ~P0 ); + ports_i[1] = ( PM1 & PU1 & ~P1 ); + ports_i[2] = 0; + ports_i[3] = ( PM3 & PU3 & ~P3 ); + ports_i[4] = ( PM4 & PU4 & ~P4 ); + ports_i[5] = ( PM5 & PU5 & ~P5 ); + ports_i[6] = 0; + ports_i[7] = ( PM7 & PU7 & ~P7 ); + ports_i[8] = ( PM12 & PU12 & ~P12 ); + ports_i[9] = ( PM14 & PU14 & ~P14 ); + ports_i[10] = 0; + ports_i[11] = ( PM20 & PU20 & ~P20 ); + + // H o͂Ă邩 + ports_o[0] = ( ~PM0 & P0 ); + ports_o[1] = ( ~PM1 & P1 ); + ports_o[2] = ( ~PM2 & P2 ); + ports_o[3] = ( ~PM3 & P3 & ~POM3 ); + ports_o[4] = ( ~PM4 & P4 ); // bit3chg_enȂ̂1ł悢 + ports_o[5] = ( ~PM5 & P5 ); + ports_o[6] = ( ~PM6 & P6 ); + ports_o[7] = ( ~PM7 & P7 ); + ports_o[8] = ( ~PM12 & P12 ); + ports_o[9] = ( ~PM14 & P14 ); + ports_o[10] = ( ~PM15 & P15 ); + ports_o[11] = ( ~PM20 & P20 ); + NOP(); // u[Nu +} +#endif _DBG_CHK_OFF_LEAK_ diff --git a/branches/IS_capture/user_define.h b/branches/IS_capture/user_define.h new file mode 100644 index 0000000..48e334c --- /dev/null +++ b/branches/IS_capture/user_define.h @@ -0,0 +1,214 @@ +#ifndef _USER_DEF_ +#define _USER_DEF_ + +// $Id: asdf$ + +#define IIC_T_SLAVEADDRESS 0x4A +#define IIC_C_SLAVEADDRESS 0x4A +#define IIC_C_SLAVEADDRESS_DMY 0x4C + +//#define IIC_SLA_DCP 0x50 + +#define bits8(a,b,c,d,e,f,g,h) ( a<<7 | b<<6 | c<<5 | d<<4 | e<<3 | f<<2 | g<<1 | h ) + +#ifndef _WIN32 +// @‹ + +#ifdef _debug_led_ +/*spflΉȍ~AncłȂȂ̂Ŏg܂ +# define DBG_LED_on { PM2.1 = 0; P2.1 = 1; } +# define DBG_LED_off { P2.1 = 0; } +# define DBG_LED_toggle ( P2.1 ^= 1 ) +# define DBG_LED2_on { PM2.2 = 0; P2.2 = 1; } +# define DBG_LED2_off { P2.2 = 0; } +# define DBG_LED2_toggle ( P2.2 ^= 1 ) +*/ +#else +# define DBG_LED_on ; +# define DBG_LED_off ; +# define DBG_LED_toggle ; +# define DBG_LED2_on ; +# define DBG_LED2_off ; +# define DBG_LED2_toggle ; +#endif // _debug_led_ + +#define IIC_SLA_CODEC 0xA4 +#define IIC_SLA_ACCEL 0x30 // ST LIS331DLH + + +#define SLP_ACK P7.7 + + +// PMx0ŏo̓[h + +// SoC +#define IRQ0_ast { P7.6 = 0; PM7.6 = 0; } // B4 +#define IRQ0_neg { P7.6 = 1; } +#define IRQ0_enable { PM7.6 = 0; } +#define IRQ0_disable { PM7.6 = 1; } +#define IRQ0 ( P7.6 ) + + +// h~ +#define RESET1_n ( P0.0 ) // G7 + +#if 1 // iPM_RESET1gAWiFiW[̃eXg̎͒ +# define RESET1_ast { P0.0 = 0; PM0.0 = 0; } +# define RESET1_neg { PM0.0 = 1; } +#endif + +#define RESET2_ast { P0.1 = 0; PM0.1 = 0; } // F7 +#define RESET2_neg { PM0.1 = 1; } + +#define SLP_REQ P12.0 // H8 + +// CTR,SPFL,SNAKE,܂ʔh@ +#define DEV_DET ( P12 & 0b00000110 ) // [2:1] = D8,C8 +#define DEV_CTR ( 0b00 << 1 ) +#define DEV_SPFL ( 0b01 << 1 ) +#define DEV_SNAKE ( 0b10 << 1 ) +#define DEV_RSV2 ( 0b11 << 1 ) + +// FCRAM +#define FCRAM_RST P3.0 // B6 +#define FCRAM_RST_ast { P3.0 = 0; } +#define FCRAM_RST_neg { P3.0 = 1; } + +// CODEC +#define PM_IRQ_n P7.2 // A3 +// INTP6 + +// PM +#define PM_EXTDC_n_RAW P7.0 // B2 +// INTP7 +//#define BT_TEMP P15.0 // G3(a) +// ANI8 +//#define BT_DET P15.1 // H2(a) +// ANI9 +#define BT_DET_P P1.6 // D4 +#define BT_TEMP_P P1.7 // C4 + + +// SPFL̃At@XLCDŕKvȁ}15V̓dB +#define SPFL_LCD_AMOL_HV_CONT P20.2 // F2 + + +// [d(out) +// _łBӁB +#define BT_CHG_ENABLE() ( P4.3 = 0 ) // F6 +#define BT_CHG_DISABLE() ( P4.3 = 1 ) +#define BT_CHG_Ena_n ( P4.3 ) + +// [d(in) +#define BT_IN_CHG_n_RAW P5.1 // B1 +#define PM_BT_IN_CHG_n PM5.1 +#define PU_BT_IN_CHG_n PU5.1 + +#define SW_WIFI_n_RAW P7.4 // C3 +#define PM_SW_WIFI_n PM7.4 +// KR4 +#define SW_POW_n_RAW P7.3 // B3 +// KR3 +#define SW_SEL_n P2.3 // G5 +#define PM_SW_SEL_n PM2.3 +//#define VOL P2.7 // H4(a) +// ANI7 + +#define SW_HOME_n_JIKKI_RAW P20.4 // G2 +#define PM_SW_HOME_n_JIKKI PM20.4 +#define PU_SW_HOME_n_JIKKI PU20.4 + +// INTP22 +#define SW_HOME_n_TSBOARD_RAW P2.0 // TS}U[pull up(P2͓p.u.) // G6 +#define PM_SW_HOME_n_TSBOARD PM2.0 + +// WiFi +#define WL_TX P20.3 // INTP21 // F3 +#define PM_WL_TX PM20.3 // INTP21 + +//#define VOL_P P2.1 // E5 open +//#define VOL_N P2.2 // F5 V + +//#define LED_CAM P1.0 // TO02 // E4 +//#define LED_WIFI P1.1 // TO03 // E3 +//#define LED_NOTIFY P1.3 // TO05 // D3 +//#define LED_3D P5.2 // SLTO TO01 // A2 +//#define LED_POW2 P1.4 // TO06 ( ) // D2 +//#define LED_POW1 P1.5 // TO07 ( ) // D1 +//#define LED_CHARGE P2.4 // H5 + +// P5.3 ɉAP5.5, P140 P141 +// P140o͐pȂ̂... +#define I2C_PU_on() { P14 |= 0x03; PM5.3 = 0; PM3.3 = 0; } // P14[1:0] H6,H7 P5.3,3.3 A1,C5 +#define I2C_PU_off() { PM5.3 = 1; PM3.3 = 1; P14 &= ~0x03; } + +#define GYRO_ENABLE() P5.0 = 0 // C1 +#define GYRO_DISABLE() P5.0 = 1 + +//#define I2C_M_SDA P3.1 // SDA10 // C6 +//#define I2C_M_SCL P3.2 // SCL10 // B5 + +//#define I2C_0_SCL P6.0 // IIC_TWL SCL0 // A7 +//#define I2C_0_SDA P6.1 // SDA0 // A6 + +//#define I2C_1_SCL P20.0 // IIC CTR SCL1 // E1 +//#define I2C_1_SDA P20.1 // SDA1 // F1 + +//#define 32kHz_O P1.2 // RTCCL // E2 +//#define 32k_I1 P12.3 // XT1 // F8 +//#define 32k_I2 P12.4 // XT2 // G8 + +// @AJ@AV䔻ʁB +#define DIPSW ( P4 & 0b00000011 ) // mini cube & \tgEFAfBbvXCb` TOOL0,1B P4.0 L ӁI +#define DIPSW_CTR 0b11 // gp +#define DIPSW_ISDEV 0b00 // KuCBattGaugeŔ +#define DIPSW_TAIKENDAI 0b10 +#define DIPSW_TAIKENDAI_NBD 0b01 + + +#define SHELL_OPEN_RAW P7.1 // INTP5 ӂJ (‚L) // C2 + +#define ACC_VALID P20.5 // H3 +#define PM_ACC_VALID PM20.5 +#define ACCEL_INT1 P2.5 // F4 +#define PM_ACCEL_INT1 PM2.5 + + +#endif // _WIN32 + +// win32 sim‹Ƌ + +#define KR_SW_POW ( 1 << 3 ) +#define KR_SW_WIFI ( 1 << 4 ) + +/////////////////////////////////////////////////////////// +#ifdef _WDT_CHECK_ +# define INT_MSK0_WDTI 1<<15 +#else +# define INT_MSK0_WDTI 0 +#endif + +#define INT_MSK0_IIC_M_DMA 1<<12 +#define INT_MSK0_SHELL 1<<7 +#define INT_MSK0_EXTDC 1<<6 +//#define INT_MSK0_SLP 1<<2 +#define INT_MSK0_RSV ~( INT_MSK0_IIC_M_DMA | INT_MSK0_SHELL | INT_MSK0_EXTDC | INT_MSK0_WDTI ) + +#define INT_MSK1_KR 1<<11 +#define INT_MSK1_RTCINTVAL 1<<10 +#define INT_MSK1_RTCALARM 1<<9 +#define INT_MSK1_ADC 1<<8 +#define INT_MSK1_IIC_CTR 1<<3 +#define INT_MSK1_IIC_MCU 1<<0 +#define INT_MSK1_RSV ~( INT_MSK1_KR | INT_MSK1_RTCINTVAL | INT_MSK1_RTCALARM | INT_MSK1_ADC \ + | INT_MSK1_IIC_CTR | INT_MSK1_IIC_MCU ) + +#define INT_MSK2_WIFI_TX_KE3 1<<4 +#define INT_MSK2L_RSV ~( INT_MSK2_WIFI_TX_KE3 ) + +#define INT_MSK2_IIC_TWL 1<<8 +#define INT_MSK2_WIFI_TX_BSR 1<<10 +#define INT_MSK2_CODEC_PMIRQ 1<<3 +#define INT_MSK2_RSV ~( INT_MSK2_IIC_TWL | INT_MSK2_WIFI_TX_BSR | INT_MSK2_CODEC_PMIRQ ) + +#endif // dupe include guard diff --git a/branches/IS_capture/util_funcs.c b/branches/IS_capture/util_funcs.c new file mode 100644 index 0000000..2edea63 --- /dev/null +++ b/branches/IS_capture/util_funcs.c @@ -0,0 +1,65 @@ +/* ======================================================== + util_funcs + + Gȃ[eBeB֐ + + $Id$ + ======================================================== */ +#ifndef _WIN32 + +#pragma SFR +#pragma di +#pragma ei +#pragma nop +#pragma stop +#pragma halt +#pragma opc + +#endif +#include "incs_loader.h" +#include "wdt.h" + + + +/********************************************//** + Pʂ ms + + NOP񂷂Aw莞CPU *L܂* B + + 荞݂ƂƂ̕x܂B + + 덷܂B + ***********************************************/ +void wait_ms( u8 ms ){ + u16 fine; + + WDT_Restart(); + while( ms != 0 ){ + ms--; + fine = 860; + while( fine != 0 ){ + fine --; + } + } +} + + + + +extern unsigned char get_ei(); + +#ifdef _DI_WITH_CHECK_ +/********************************************//** + ł 荞݋֎~ԉ`FbNĂ犄荞݋֎~ɂ + + ]̌ʁAA#ifdef Ń`FbN DI + ***********************************************/ +void DI_wt_chk() +{ + if( !get_ei() ) + { + dbg_nop(); + } + DI(); +} +#endif // _DI_WITH_CHECK_ diff --git a/branches/IS_capture/util_funcs.h b/branches/IS_capture/util_funcs.h new file mode 100644 index 0000000..4229413 --- /dev/null +++ b/branches/IS_capture/util_funcs.h @@ -0,0 +1,16 @@ +#ifndef _util_funcs_h_ +#define _util_funcs_h_ + + +void wait_ms( u8 ); + + +# ifdef _DI_WITH_CHECK_ +void DI_wt_chk(); +# else +# define DI_wt_chk() DI() +# endif /* _DI_WITH_CHECK_ */ + + +#endif + diff --git a/branches/IS_capture/voltable.c b/branches/IS_capture/voltable.c new file mode 100644 index 0000000..4d2e14a --- /dev/null +++ b/branches/IS_capture/voltable.c @@ -0,0 +1,64 @@ +/* ======================================================== + voltable.c + + $Id$ + ======================================================== */ +#include "incs.h" + +#define _10db_ + + + +/********************************************//** + XC_l CODEC ɃZbgہAőVol̊֌W + KɃXP[OKv + + yȂ̂Ńe[u + ***********************************************/ + + + +#ifdef _10db_ +// max -10db +const u8 slider_to_codec[64] = +{ + 127, 126, 125, 124, 122, 121, 120, 119, + 118, 117, 116, 114, 113, 112, 111, 110, + 109, 108, 106, 105, 104, 103, 102, 101, + 100, 98, 97, 96, 95, 94, 93, 92, + 90, 89, 88, 87, 86, 85, 83, 82, + 81, 80, 79, 78, 77, 75, 74, 73, + 73, 72, 71, 70, 69, 67, 66, 65, + 64, 63, 62, 61, 59, 58, 57, 56 + }; +#endif + +#ifdef _15db_ +// max -15db +const u8 slider_to_codec[64] = +{ + 127, 127, 127, 127, 127, 126, 125, 123, + 122, 121, 120, 119, 118, 117, 116, 115, + 114, 113, 112, 110, 109, 108, 107, 106, + 105, 104, 103, 102, 101, 100, 99, 97, + 96, 95, 94, 93, 92, 91, 90, 89, + 88, 87, 86, 85, 84, 83, 82, 81, + 80, 79, 78, 77, 76, 75, 74, 73, + 71, 70, 69, 68, 67, 66, 66, 66 +}; +#endif + +#ifdef _4db_ +// max -4db +const u8 slider_to_codec[64] = +{ + 127, 127, 126, 125, 123, 122, 121, 119, + 118, 117, 115, 114, 112, 111, 110, 108, + 107, 106, 104, 103, 101, 100, 99, 97, + 96, 94, 93, 92, 90, 89, 88, 86, + 85, 83, 82, 81, 79, 78, 77, 75, + 74, 72, 71, 70, 68, 67, 66, 64, + 64, 63, 61, 60, 59, 57, 56, 54, + 53, 52, 50, 49, 48, 46, 44, 44 +}; +#endif diff --git a/branches/IS_capture/voltable.h b/branches/IS_capture/voltable.h new file mode 100644 index 0000000..6ff34ab --- /dev/null +++ b/branches/IS_capture/voltable.h @@ -0,0 +1,57 @@ +#ifdef _10db_ +// max -10db +/* +const u8 slider_to_codec[64] = +{ + 127, 127, 127, 127, 126, 125, 123, 122, + 121, 120, 118, 117, 116, 115, 113, 112, + 111, 110, 108, 107, 106, 105, 103, 102, + 101, 100, 98, 97, 96, 95, 93, 92, + 91, 90, 88, 87, 86, 85, 83, 82, + 81, 80, 78, 77, 76, 75, 73, 72, + 72, 71, 70, 68, 67, 66, 64, 63, + 62, 61, 59, 58, 57, 56, 55, 55 + }; +*/ +const u8 slider_to_codec[64] = +{ + 127, 126, 125, 124, 122, 121, 120, 119, + 118, 117, 116, 114, 113, 112, 111, 110, + 109, 108, 106, 105, 104, 103, 102, 101, + 100, 98, 97, 96, 95, 94, 93, 92, + 90, 89, 88, 87, 86, 85, 83, 82, + 81, 80, 79, 78, 77, 75, 74, 73, + 73, 72, 71, 70, 69, 67, 66, 65, + 64, 63, 62, 61, 59, 58, 57, 56 + }; +#endif + +#ifdef _15db_ +// max -15db +const u8 slider_to_codec[64] = +{ + 127, 127, 127, 127, 127, 126, 125, 123, + 122, 121, 120, 119, 118, 117, 116, 115, + 114, 113, 112, 110, 109, 108, 107, 106, + 105, 104, 103, 102, 101, 100, 99, 97, + 96, 95, 94, 93, 92, 91, 90, 89, + 88, 87, 86, 85, 84, 83, 82, 81, + 80, 79, 78, 77, 76, 75, 74, 73, + 71, 70, 69, 68, 67, 66, 66, 66 +}; +#endif + +#ifdef _4db_ +// max -4db +const u8 slider_to_codec[64] = +{ + 127, 127, 126, 125, 123, 122, 121, 119, + 118, 117, 115, 114, 112, 111, 110, 108, + 107, 106, 104, 103, 101, 100, 99, 97, + 96, 94, 93, 92, 90, 89, 88, 86, + 85, 83, 82, 81, 79, 78, 77, 75, + 74, 72, 71, 70, 68, 67, 66, 64, + 64, 63, 61, 60, 59, 57, 56, 54, + 53, 52, 50, 49, 48, 46, 44, 44 +}; +#endif diff --git a/branches/IS_capture/vreg_ctr.c b/branches/IS_capture/vreg_ctr.c new file mode 100644 index 0000000..7cffd4a --- /dev/null +++ b/branches/IS_capture/vreg_ctr.c @@ -0,0 +1,638 @@ +/* ======================================================== + + CTR MCU I2CWX^ + + $Id$ + ====================================================== */ +#include "incs.h" +#include "vreg_ctr.h" +#include "rtc.h" +#include "led.h" +#include "accero.h" +#include "pm.h" +#include "pool.h" +#include "vreg_twl.h" +#include "sw.h" +#include "WDT.h" + +#include +#include "fsl_user.h" + + + + +extern u8 extinfo_read(); // task_misc.c + +extern u8 iic_burst_state; // o[XgANZX鎞̃JE^ +extern bit info_led_pattern_updated; // m点LED̃p^[擪ɖ߂ + +extern bit pedolog_overflow; +extern bit reserve_pedo_increnent; + + + +// ******************************************************** +u8 vreg_ctr[VREG_C_ENDMARK_]; + +static u8 vreg_free_adrs; // AhXł̂ł΂炭͂ +bit irq_readed; // AAA^̂߁B + + + +// ******************************************************** +extern task_status_immed tski_firm_update(); +extern task_status_immed tski_mcu_reset(); +extern unsigned char get_ei(); + + + +// ******************************************************** +#ifdef _MCU_BSR_ +#define IICAMK IICAMK1 +#endif + + +/********************************************//** + + + [̏l̎w肪KvȃAhX + + }CRZbgɌĂ΂܂ + ***********************************************/ +void vreg_ctr_init( ) +{ + vreg_ctr[ VREG_C_VCOM_T ] = VCOM_DEFAULT_T; + vreg_ctr[ VREG_C_VCOM_B ] = VCOM_DEFAULT_B; + + vreg_ctr[ VREG_C_OFF_DELAY ] = FORCEOFF_THREASHOLD; + + vreg_ctr[ VREG_C_VOL_CAL_MIN ] = 0x36; + vreg_ctr[ VREG_C_VOL_CAL_MAX ] = 0xFF - 0x36; +} + + +/********************************************//** + lZbg + + VXeZbgɌĂ΂܂ + ***********************************************/ +void vreg_ctr_reset( ) +{ + vreg_ctr[ VREG_C_MCU_VER_MAJOR ] = MCU_VER_MAJOR | 0x10; + vreg_ctr[ VREG_C_MCU_VER_MINOR ] = MCU_VER_MINOR; + +// vreg_ctr[ VREG_C_STATUS ] &= bits8(0,0,0,1, 1,1,1,1); + vreg_ctr[ VREG_C_LED_BRIGHT ] = 0xFF; + vreg_ctr[ VREG_C_LED_POW ] = 0; + vreg_ctr[ VREG_C_LED_WIFI ] = 0; + vreg_ctr[ VREG_C_LED_CAM ] = 0; + vreg_ctr[ VREG_C_LED_3D ] = 0; + { + u8 i; + for( i = 0; i < sizeof( uni_info_LED ); i++ ) + { + info_LED.bindata[ i ] = 0; + } + } + + vreg_ctr[ VREG_C_WIFI_CALIB ] = 0; + // ł̂͋Cc + RTC_32k_on(); + RESET1_neg; + RESET2_neg; + FCRAM_RST_neg; +} + + + +/********************************************//** + I2CzWX^ɏ܂B + + @ adrs ͓AhX + + @ȂAhXɃANZXꍇA܂B + + 񂾌ʁAI2C_mcuʐMꍇArenge_task_immed_add() + gpȂƁAI2C_mcugpŃG[IꍇɃgC܂B + ***********************************************/ +void vreg_ctr_write( u8 adrs, u8 data ) +{ + switch ( adrs ) + { + + case VREG_C_COMMAND0: + if( data != 0 ) + { + renge_task_immed_add( tski_do_command0 ); + vreg_ctr[ VREG_C_COMMAND0 ] |= data; + } + break; + + case VREG_C_COMMAND2: + // 炩̊荞݂҂ĂȂłB #--) ̂߂̊荞݂ + // td + if(( data & REG_BIT_CMD_LCD_ON ) != 0 ) + { + renge_task_immed_add( tski_PM_LCD_on ); + } + else if(( data & REG_BIT_CMD_LCD_OFF ) != 0 ) + { + renge_task_immed_add( tski_PM_LCD_off ); + } + + // obNCgݒ + /// ̂Ƃ낳ɍׂ͕Ȃǁc + if(( data & REG_BITS_CMD_BL ) != 0 ) + { + renge_task_immed_add( tski_PM_BL_set ); + vreg_ctr[adrs] = (u8)( data & REG_BITS_CMD_BL ); + } + break; + + case VREG_C_COMMAND1: + if( data != 0 ) + { + // u8 temp; ԕϐg΂łȂ... + // TWLɊ荞݂ + /// ۂɊ荞݂̂SoC + /// rbg̕тႤʓ| + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] = ( ( data & REG_BIT_SEND_TWL_PWSW_DET ) != 0 ) ? REG_BIT_TWL_IRQ_PWSW_DET : 0x00; //pwsw_det + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_RESET_DET ) != 0 ) ? REG_BIT_TWL_IRQ_RESET : 0x00; //reset_req + + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_OFF_DET ) != 0 ) ? REG_BIT_TWL_IRQ_OFF : 0x00; //off_req + + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_BATT_LOW ) != 0 ) ? REG_BIT_TWL_IRQ_BT_LOW : 0x00; //batt_low + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= ( ( data & REG_BIT_SEND_TWL_BATT_EMPTY ) != 0 ) ? REG_BIT_TWL_IRQ_BT_EMPTY : 0x00; //batt_empty + + if(( data & REG_BIT_SEND_TWL_VOL_CLICK ) != 0 ) + { + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] |= REG_BIT_TWL_IRQ_VOL_CHANGE; //vol_changed + } + } + break; + + case VREG_CX_FREE_DATA: + if( vreg_free_adrs < VREG_C_FREE_SIZE ) + { + pool.vreg_c_ext.vreg_c_free[ vreg_free_adrs ] = data; + vreg_free_adrs ++; + } + else + { + dbg_NOP(); + } + break; + + case VREG_CX_FREE_ADRS: + vreg_free_adrs = data; + break; + + case VREG_C_LED_POW: + if( iic_burst_state == 0 ) + { + vreg_ctr[ VREG_C_LED_POW ] = data; + iic_burst_state ++; + } + else if( iic_burst_state < 5 ) + { + led_red_batt_empty.dats[ iic_burst_state -1 ] = data; + iic_burst_state ++; + } + break; + + case VREG_C_LED_WIFI: + case VREG_C_LED_CAM: + case VREG_C_LED_3D: + vreg_ctr[adrs] = (u8)( data & 0x0F ); + break; + + case VREG_C_LED_NOTIFY_DATA: + if( iic_burst_state < sizeof( uni_info_LED ) ) + { + if(( iic_burst_state == 1 ) && ( data == 0 )) // fade_time == 0 ֎~ + { + data = 1; + } + info_LED.bindata[ iic_burst_state ] = data; + iic_burst_state ++; + if( iic_burst_state > 4 ) // p^[1ł + { + info_led_pattern_updated = true; + } + } + break; + + case VREG_C_MCU_STATUS: +// vreg_twl[ REG_TWL_INT_ADRS_MODE ] = (u8)( ( data >> 6 ) & 0x03 ); Rł悢B̑胊ZbgŃNA + vreg_ctr[ VREG_C_MCU_STATUS ] &= data; // bitNA͂邪Zbg͂ȂB + // ̕twlWX^~[͓ǂݏoꎞɍ + break; + + case VREG_C_VCOM_T: + case VREG_C_VCOM_B: + renge_task_immed_add( tski_vcom_set ); + vreg_ctr[adrs] = data; + break; + + case VREG_C_DBG03: + if( ( vreg_ctr[VREG_C_DBG01] == 'j' ) + && ( vreg_ctr[VREG_C_DBG02] == 'h' ) + && ( data == 'l' ) ) + { + renge_task_immed_add( tski_firm_update ); + IICAMK = 1; + } + vreg_ctr[ VREG_C_DBG03 ] = data; + break; + + /// 񓯊œĂ邽߂ł͏ȂB + // \񂷂邾stopŏ + case VREG_C_RTC_SEC: + case VREG_C_RTC_MIN: + set_rtc( adrs - VREG_C_RTC_SEC, data & 0x7F ); + break; + + case VREG_C_RTC_DAY: + case VREG_C_RTC_HOUR: + set_rtc( adrs - VREG_C_RTC_SEC, data & 0x3F ); + break; + + case VREG_C_RTC_YOBI: + set_rtc( adrs - VREG_C_RTC_SEC, data & 0x07 ); + break; + + case VREG_C_RTC_MONTH: + set_rtc( adrs - VREG_C_RTC_SEC, data & 0x1F ); + break; + + case VREG_C_RTC_YEAR: + set_rtc( adrs - VREG_C_RTC_SEC, data ); + break; + + case VREG_C_RTC_COMP: + WDT_Restart(); + while(1) + { + RWAIT = 1; + while( !RWST ){} + if( SEC != 0 ) + { + break; + } + RWAIT = 0; + } + SUBCUD = data; + RWAIT = 0; + vreg_ctr[ VREG_C_RTC_COMP ] = data; + break; + + case VREG_C_RTC_ALARM_MIN: + rtc_alarm_dirty = true; + vreg_ctr[ VREG_C_RTC_ALARM_MIN ] = (u8)( data & 0x7F ); + break; + + case VREG_C_RTC_ALARM_HOUR: + rtc_alarm_dirty = true; + vreg_ctr[ VREG_C_RTC_ALARM_HOUR ] = (u8)( data & 0x3F ); + break; + + // ł悢 + case VREG_C_RTC_ALARM_DAY: + vreg_ctr[ VREG_C_RTC_ALARM_DAY ] = (u8)( data & 0x3F ); + break; + + case VREG_C_RTC_ALARM_MONTH: + vreg_ctr[ VREG_C_RTC_ALARM_MONTH ] = (u8)( data & 0x1F ); + break; + + case VREG_C_ACC_CONFIG: + renge_task_immed_add( tski_acc_setup ); + vreg_ctr[ VREG_C_ACC_CONFIG ] = data; + break; + + case VREG_C_ACC_R_ADRS: + renge_task_immed_add( tski_acc_read ); + vreg_ctr[ VREG_C_ACC_R_ADRS ] = data; + break; + + case VREG_C_ACC_W_BUF: + renge_task_immed_add( tski_acc_write ); + vreg_ctr[ VREG_C_ACC_W_BUF ] = data; + break; + + case VREG_C_ACC_HOSU_SETTING: + if( ( data & 0x01 ) != 0 ) + { + clear_hosu_hist(); // NA + } + break; + + case VREG_C_WIFI_CALIB: + if( data & REG_BIT_WIFI_CALIB_32K_HI_Z ) + { + RTC_32k_HI_Z(); + } + else{ + RTC_32k_on(); + } + if( data & REG_BIT_WIFI_CALIB_RSTS_AST ) + { + RESET1_ast; + // RESET2_ast; RESET1̂݁B + // FCRAM_RST_ast; + } + else{ +/* + SoC ~܂Ă܂̂łɗȂ + RESET1_neg; + RESET2_neg; + FCRAM_RST_neg; +*/ + } + vreg_ctr[ VREG_C_WIFI_CALIB ] = data; + break; + + case VREG_C_COMMAND3: + switch ( data ) + { +#ifdef _ENABLE_COMMAND3_ + case 'r': + // 荞݃[`FSLCuĂԂ̂͋֎~ + // }CRċNB@WX^ނB + renge_task_immed_add( tski_mcu_reset ); + break; + + case 'w': + // WDTōċNieXgj +// mcu_wdt_reset; // ̃R}hgӖȂłI + while(1) + { + dbg_NOP(); + } + break; +#endif //_ENABLE_COMMAND3_ + +#ifdef _ENABLE_HAL_ + case 'p': + reserve_pedo_increnent = 1; + // ő₷ɂ̓X^bNȂBŗ\̂݁Atask_miscŏ +// hosu_increment_if_necessary(); // A + break; +#endif //_ENABLE_HAL_ + + } +// vreg_ctr[ VREG_C_COMMAND3 ] = data; // KvȂ + break; + + case VREG_C_RBR_CONTROL: +// vreg_ctr[ VREG_C_RBR_CONTROL ] = data; // todo debug u[N|Cgu߁BAt[WX^ + break; + + + // read only ////////////////////////////////////////// + case VREG_C_MCU_VER_MAJOR: + case VREG_C_MCU_VER_MINOR: + case VREG_C_3D: // ɃtbV + case VREG_C_SND_VOL: // ɃtbV + case VREG_C_BT_TEMP: // ɃtbV + case VREG_C_BT_REMAIN: // ɃtbV + case VREG_C_BT_REMAIN_FINE: // ɃtbV + case VREG_C_BT_VOLTAGE: // ɃtbV + case VREG_C_STATUS_1: // KɃtbV + case VREG_C_STATUS: // KɃtbV + case VREG_C_IRQ0: // ̂‚łɊ荞݋NĂقȂ... + case VREG_C_IRQ1: + case VREG_C_IRQ2: + case VREG_C_IRQ3: + case VREG_C_IRQ4: + case VREG_C_LED_NOTIFY_FLAG: // tbV + case VREG_C_RTC_SEC_FINE_L: // tbV + case VREG_C_RTC_SEC_FINE_H: // tbV + // VREG_C_ACC_RESERVE, // NȂ + // VREG_C_ACC_HOSU_HIST = 0x4F, + case VREG_C_ACC_XH: // tbV + case VREG_C_ACC_XL: + case VREG_C_ACC_YH: + case VREG_C_ACC_YL: + case VREG_C_ACC_ZH: + case VREG_C_ACC_ZL: +// dbg_nop(); + // return( ERROR ) + break; + + case VREG_C_ACC_HOSU_L: // ĂǁAfobOpB(AhX0x4B == mcu sla(r)) +// dbg_nop(); + /* FALLTHROUGH */ + + // ʂɏ邾 ///////////////////////////////// + default: + /* + case VREG_C_IRQ_MASK0: + case VREG_C_IRQ_MASK1: + case VREG_C_IRQ_MASK2: + case VREG_C_IRQ_MASK3: + case VREG_C_IRQ_MASK4: + case VREG_C_DBG01: + case VREG_C_DBG02: + case VREG_C_LED_BRIGHT: + case VREG_C_ACC_HOSU_L: + case VREG_C_ACC_HOSU_M: + case VREG_C_ACC_HOSU_H: + case VREG_C_ACC_HOSU_HOUR_BOUNDARY: + case VREG_C_FREE_ADRS: + case VREG_C_RTC_ALARM_YEAR: + case VREG_C_ACC_W_ADRS: + case VREG_C_OFF_DELAY: + case VREG_C_HAL_OVW_CONT0: + case VREG_C_HAL_OVW_DAT0: + case VREG_C_HAL_OVW_CONT1: + case VREG_C_HAL_OVW_DAT1: + */ + if( adrs < VREG_C_ENDMARK_ ) + { + vreg_ctr[adrs] = data; + break; + } + else + { +// dbg_nop(); // `AhXɏ@Ȃ񂩃oOĂȂH + // return( ERROR ) + break; + } + } +// return( SUCCESS ) + return; +} + + + +/********************************************//** + I2CzWX^ǂ݂܂B + + ߂F xx f[^ + + ӁF̃AhX̏ŌĂ΂ ̂ŁA + [hꂽNAȂǂ͋C‚ + + ( vreg_ctr_after_read( u8 adrs ) ) + ***********************************************/ +u8 vreg_ctr_read( u8 adrs ) +{ + static u16 rsub_temp; + u8 temp; + + // RTC͓ǂݏorɌJオ̂邽 + if( ( VREG_C_RTC_SEC <= adrs ) && ( adrs <= VREG_C_RTC_YEAR ) ) + { + rtc_buf_refresh( ); + } + else if( adrs == VREG_C_MCU_STATUS ) + { + return( ( vreg_ctr[ VREG_C_MCU_STATUS ] & 0x03 ) | + ( ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x03 ) << 6 ) | // sys_mode + ( ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x80 ) >> 2 )); // vol32 + } + else if( adrs == VREG_C_RTC_SEC_FINE_L ) + { + rsub_temp = RSUBC; + return( (u8)( rsub_temp & 0xFF ) ); + } + else if( adrs == VREG_C_RTC_SEC_FINE_H ) + { + return( (u8)( ( rsub_temp >> 8 ) & 0xFF ) ); + } +/* + // debug I + else if( adrs == VREG_C_IRQ_MASK0 ) + { + return( vreg_ctr[ VREG_C_IRQ_MASK0 ] & 0x7F ); // `MSB0B1ȂʐMG[ + } +*/ + else if( adrs == VREG_C_ACC_HOSU_HIST ) + { + return( hosu_read() ); + } + else if( adrs == VREG_CX_FREE_DATA ) + { + if( vreg_free_adrs >= VREG_C_FREE_SIZE ) + { + temp = 0x00; + } + else + { + temp = pool.vreg_c_ext.vreg_c_free[ vreg_free_adrs ]; + // vreg_free_adrs ++; // ʼnZĂ܂ƃCfbNX + } + return( temp ); + } + else if( adrs == VREG_CX_INFO ) + { + return( extinfo_read() ); + } + else if( adrs == VREG_C_ACC_HOSU_SETTING ) + { + if( pedolog_overflow ) + { + return( 0x10 ); + } + else + { + return( 0 ); + } + } + + if( adrs >= VREG_C_ENDMARK_ ) + { + // VREG_C_INFO > VREG_C_ENDMARK_ Ȃ̂łƂ + return( 0xFF ); + } + return ( vreg_ctr[adrs] ); +} + + +/********************************************//** + I2CzWX^ǂ܂ĉ郌WX^ + ***********************************************/ +void vreg_ctr_after_read( u8 adrs, u8 data ) +{ + // 荞݃tO̓[hŃNA + switch( adrs ) + { + case VREG_C_IRQ0: + case VREG_C_IRQ1: + case VREG_C_IRQ2: + case VREG_C_IRQ3: + case VREG_C_IRQ4: + DI_wt_chk(); + vreg_ctr[ adrs ] ^= data; + EI(); + irq_readed = true; + break; + + case VREG_CX_FREE_DATA: + vreg_free_adrs ++; + break; + + default: + break; + } +} + + + + + + +/********************************************//** + 荞݂ + + - @}XNĂAtOuĂȂvA荞ݓȂB + + - @荞݂AǂݏoOɃ}XNƂ́ASoC̏L[ɂ + IRQǂރ^XNςł̂ŁAǂ݂ɂ͗B + + @ƁAÔ߁A}XNƂ͋ǂ݂Ă炤B + + łDĨ`FbNsvB + + @DIɗ̂I2C_twlARTC_A[B̒ŖڒEIĎgpȂ + ***********************************************/ +void set_irq( u8 irqreg, u8 irq_flg ) +{ + u8 tot; +//0 u8 ei_orig; // EItOۑ + + if(( system_status.pwr_state == ON ) || + ( system_status.pwr_state == SLEEP )) + { +/*0 łDIԂȂPAKvȂ + ei_orig = get_ei(); + + //. debug + if( !ei_orig ) + { + dbg_nop(); + } + + DI_wt_chk(); +*/ + DI(); + if( ( vreg_ctr[ irqreg + 8 ] & irq_flg ) == 0 ) + { + vreg_ctr[ irqreg ] |= irq_flg; + IRQ0_neg; // uグ... +//0 if( ei_orig ) + { + EI(); + } + tot = 0; + while( !IRQ0 && ( ++tot != 0 ) ){;} // O.D.Ȃ̂łƂ̂҂ IRQ_mcu LɔĂƍ(•s) + IRQ0_ast; // ƂBiGbW荞ׁ݂̈j + } +//0 if( ei_orig ) + { + EI(); + } + } +} + diff --git a/branches/IS_capture/vreg_ctr.h b/branches/IS_capture/vreg_ctr.h new file mode 100644 index 0000000..b0629e2 --- /dev/null +++ b/branches/IS_capture/vreg_ctr.h @@ -0,0 +1,322 @@ +#ifndef __vreg_ctr__ +#define __vreg_ctr__ +/* + + + $Id$ +*/ + +#include "config.h" + +// VREG_C_MCU_STATUS +// bit[7.6] twl.sys_mode[1.0] ctr珑ȂAfcr_resetɓKɃZbg +// bit[5] V [7] ctr珑ȂAfcr_resetɓKɃZbg +#define REG_BIT_STATUS_WDT_RESET ( 1 << 1 ) +#define REG_BIT_RTC_BLACKOUT ( 1 << 0 ) + + +// VREG_C_STATUS, +#define REG_BIT_LCD_POW ( 1 << 7 ) +#define REG_BIT_BL_U ( 1 << 6 ) +#define REG_BIT_BL_L ( 1 << 5 ) +#define REG_BIT_BATT_CHARGE ( 1 << 4 ) +#define REG_BIT_POW_SUPPLY ( 1 << 3 ) +// gp ( 1 << 2 ) +#define REG_BIT_ST_SHELL_OPEN ( 1 << 1 ) +// gp ( 1 << 0 ) + + +// VREG_C_STATUS_X +// gp ( 1 << 6 ) +// gp ( 1 << 5 ) +#define REG_BIT_WIFI_TX ( 1 << 4 ) +// twl bl ̃~[[1: ( 1 << 3 ) +// 0]( 1 << 2 ) +#define REG_BIT_ACCERO_ERR ( 1 << 1 ) +#define REG_BIT_MGIC_ERR ( 1 << 0 ) + +#define REG_BIT_MASK_STATUS1_NTR_PM_REG 0x0C + + +// VREG_C_IRQ0 +#define REG_BIT_IRQ_WDT_RESET ( 1 << 7 ) +#define REG_BIT_SHELL_OPEN ( 1 << 6 ) +#define REG_BIT_SHELL_CLOSE ( 1 << 5 ) +#define REG_BIT_SW_WIFI_CLICK ( 1 << 4 ) +#define REG_BIT_SW_HOME_RELEASE ( 1 << 3 ) +#define REG_BIT_SW_HOME_CLICK ( 1 << 2 ) +#define REG_BIT_SW_POW_HOLD ( 1 << 1 ) +#define REG_BIT_SW_POW_CLICK ( 1 << 0 ) + +// VREG_C_IRQ1 +#define REG_BIT_BT_CHG_START ( 1 << 7 ) +#define REG_BIT_BT_CHG_STOP ( 1 << 6 ) +#define REG_BIT_BT_REMAIN ( 1 << 5 ) +#define REG_BIT_ACC_DAT_RDY ( 1 << 4 ) +#define REG_BIT_ACC_ACK ( 1 << 3 ) +#define REG_BIT_RTC_ALARM ( 1 << 2 ) +#define REG_BIT_BT_DC_CONNECT ( 1 << 1 ) +#define REG_BIT_BT_DC_DISC ( 1 << 0 ) + +// VREG_C_IRQ2 +#define REG_BIT_TWL_VER_READ ( 1 << 7 ) +//#define REG_BIT_TWL_SNDVOL_CHANGE ( 1 << 6 ) p~ +#define REG_BIT_SLIDE_VOL_ACROSS_TWL_BOUNDARY ( 1 << 6 ) +#define REG_BIT_TWL_BL_U_ON ( 1 << 5 ) +#define REG_BIT_TWL_BL_U_OFF ( 1 << 4 ) +#define REG_BIT_TWL_BL_L_ON ( 1 << 3 ) +#define REG_BIT_TWL_BL_L_OFF ( 1 << 2 ) +#define REG_BIT_TWL_OFF_REQ ( 1 << 1 ) +#define REG_BIT_TWL_RESET_REQ ( 1 << 0 ) + +// VREG_C_IRQ3 +#define REG_BIT_BL_U_ON ( 1 << 5 ) +#define REG_BIT_BL_U_OFF ( 1 << 4 ) +#define REG_BIT_BL_L_ON ( 1 << 3 ) +#define REG_BIT_BL_L_OFF ( 1 << 2 ) +#define REG_BIT_LCD_ON ( 1 << 1 ) +#define REG_BIT_LCD_OFF ( 1 << 0 ) + + +// ̂ǂ... +//#define REG_BIT_VR_3D_CHANGE ( 1 << 7 ) + + + +// VREG_C_COMMAND0 +//#define REG_BIT_CMD_LCD_ON ( 1 << 7 ) +//#define REG_BIT_CMD_LCD_OFF ( 1 << 6 ) +//#define REG_BIT_CMD_BL_ON ( 1 << 5 ) +//#define REG_BIT_CMD_BL_OFF ( 1 << 4 ) +#define REG_BIT_GOING_TO_SLEEP ( 1 << 4 ) +#define REG_BIT_FCRAM_RESET_REQ ( 1 << 3 ) +#define REG_BIT_RESET2_REQ ( 1 << 2 ) +#define REG_BIT_RESET1_REQ ( 1 << 1 ) +#define REG_BIT_OFF_REQ ( 1 << 0 ) + +// VREG_C_COMMAND1 (TWLɊ荞݂) +// gp ( 1 << 7 ) +// gp ( 1 << 6 ) +#define REG_BIT_SEND_TWL_VOL_CLICK ( 1 << 5 ) +#define REG_BIT_SEND_TWL_BATT_EMPTY ( 1 << 4 ) +#define REG_BIT_SEND_TWL_BATT_LOW ( 1 << 3 ) +#define REG_BIT_SEND_TWL_OFF_DET ( 1 << 2 ) +#define REG_BIT_SEND_TWL_RESET_DET ( 1 << 1 ) +#define REG_BIT_SEND_TWL_PWSW_DET ( 1 << 0 ) + +// VREG_C_COMMAND2 t֌W +#define REG_BIT_CMD_BL_U_ON ( 1 << 5 ) +#define REG_BIT_CMD_BL_U_OFF ( 1 << 4 ) +#define REG_BIT_CMD_BL_L_ON ( 1 << 3 ) +#define REG_BIT_CMD_BL_L_OFF ( 1 << 2 ) +#define REG_BIT_CMD_LCD_ON ( 1 << 1 ) +#define REG_BIT_CMD_LCD_OFF ( 1 << 0 ) +#define REG_BITS_CMD_BL ( REG_BIT_CMD_BL_U_ON | REG_BIT_CMD_BL_U_OFF | REG_BIT_CMD_BL_L_ON | REG_BIT_CMD_BL_L_OFF ) + + +// TWLɒʒmIRQWX^ +#define REG_BIT_TWL_IRQ_PWSW_DET 0x08 +#define REG_BIT_TWL_IRQ_RESET 0x01 +#define REG_BIT_TWL_IRQ_OFF 0x02 +#define REG_BIT_TWL_IRQ_BT_LOW 0x20 +#define REG_BIT_TWL_IRQ_BT_EMPTY 0x10 +#define REG_BIT_TWL_IRQ_VOL_CHANGE 0x40 + + +// CODECPMIC NTR ̑㗝WX^ +#define REG_BIT_TWL_REQ_OFF ( 1 << 6 ) +#define REG_BIT_TWL_REQ_BL_U ( 1 << 3 ) +#define REG_BIT_TWL_REQ_BL_L ( 1 << 2 ) +#define REG_BIT_TWL_REQ_RESET ( 1 << 0 ) + + +// VREG_C_LED_NOTIFY_FLAG +#define REG_BIT_IN_LOOP ( 1 << 0 ) + +// HAL bitfields 0 +#define REG_BIT_HAL0_PM_EXTDC_n ( 1 << 7 ) +#define REG_BIT_HAL0_BT_IN_CHG_n ( 1 << 6 ) +//#define REG_BIT_HAL0_PM_IRQ_n // gȂ +#define REG_BIT_HAL0_RSV_5 ( 1 << 5 ) +#define REG_BIT_HAL0_WL_TX ( 1 << 4 ) +#define REG_BIT_HAL0_SHELL_OPEN ( 1 << 3 ) // statusɂ܂ +#define REG_BIT_HAL0_SW_WIFI_n ( 1 << 2 ) +#define REG_BIT_HAL0_SW_HOME_n ( 1 << 1 ) +#define REG_BIT_HAL0_SW_POW_n ( 1 << 0 ) + + +// HAL bitfields 1 +#define REG_BIT_HAL1_DIPSW_1 ( 1 << 3 ) +#define REG_BIT_HAL1_DIPSW_0 ( 1 << 2 ) +#define REG_BIT_HAL1_HW_DET_1 ( 1 << 1 ) +#define REG_BIT_HAL1_HW_DET_0 ( 1 << 0 ) + + +// VREG_C_WIFI_CALIB +#define REG_BIT_WIFI_CALIB_32K_HI_Z ( 1 << 1 ) +#define REG_BIT_WIFI_CALIB_RSTS_AST ( 1 << 0 ) + + +/* + ev +#define REG_BIT_ ( 1 << 7 ) +#define REG_BIT_ ( 1 << 6 ) +#define REG_BIT_ ( 1 << 5 ) +#define REG_BIT_ ( 1 << 4 ) +#define REG_BIT_ ( 1 << 3 ) +#define REG_BIT_ ( 1 << 2 ) +#define REG_BIT_ ( 1 << 1 ) +#define REG_BIT_ ( 1 << 0 ) +*/ + + + +/*============================================================================*/ +extern u8 vreg_ctr[]; + +/*============================================================================*/ +enum VREG_C_ADRS +{ // `AhX֏񂾍ۂ͕̓s + VREG_C_MCU_VER_MAJOR = 0x00, + VREG_C_MCU_VER_MINOR, + VREG_C_MCU_STATUS, + + VREG_C_VCOM_T = 0x03, + VREG_C_VCOM_B, + + VREG_C_DBG01 = 0x05, + VREG_C_DBG02, + VREG_C_DBG03, + + VREG_C_3D = 0x08, + VREG_C_SND_VOL, + VREG_C_BT_TEMP, + VREG_C_BT_REMAIN, + VREG_C_BT_REMAIN_FINE, + VREG_C_BT_VOLTAGE, + + VREG_C_STATUS_1 = 0x0E, + VREG_C_STATUS = 0x0F, + + VREG_C_IRQ0 = 0x10, + VREG_C_IRQ1, + VREG_C_IRQ2, + VREG_C_IRQ3, + VREG_C_IRQ4, + + VREG_C_IRQ_MASK0 = 0x18, + VREG_C_IRQ_MASK1, + VREG_C_IRQ_MASK2, + VREG_C_IRQ_MASK3, + VREG_C_IRQ_MASK4, + + VREG_C_COMMAND0 = 0x20, + VREG_C_COMMAND1, + VREG_C_COMMAND2, + VREG_C_COMMAND3, // 'r' Ń}CRZbgA 'w' WDTZbg + + VREG_C_OFF_DELAY = 0x24, +// VREG_C_VOL_DIGITAL = 0x25, // todo +// VREG_C_VOL_OPTION, + VREG_C_VOL_ADC_RAW = 0x27, + + VREG_C_LED_BRIGHT = 0x28, + VREG_C_LED_POW, + VREG_C_LED_WIFI, + VREG_C_LED_CAM, + VREG_C_LED_3D, + VREG_C_LED_NOTIFY_DATA, + VREG_C_LED_NOTIFY_FLAG, + + VREG_C_RBR_CONTROL = 0x2F, // p~ + + VREG_C_RTC_SEC = 0x30, + VREG_C_RTC_MIN, + VREG_C_RTC_HOUR, + VREG_C_RTC_YOBI, + VREG_C_RTC_DAY, + VREG_C_RTC_MONTH, + VREG_C_RTC_YEAR, + + VREG_C_RTC_COMP, + + VREG_C_RTC_ALARM_MIN = 0x38, + VREG_C_RTC_ALARM_HOUR, + VREG_C_RTC_ALARM_DAY, + VREG_C_RTC_ALARM_MONTH, + VREG_C_RTC_ALARM_YEAR, + + VREG_C_RTC_SEC_FINE_L, + VREG_C_RTC_SEC_FINE_H, + + VREG_C_WIFI_CALIB = 0x3F, + + VREG_C_ACC_CONFIG = 0x40, + VREG_C_ACC_R_ADRS, + VREG_C_ACC_RESERVE, + VREG_C_ACC_W_ADRS, + VREG_C_ACC_W_BUF, // r,w p + + VREG_C_ACC_XL = 0x45, + VREG_C_ACC_XH, + VREG_C_ACC_YL, + VREG_C_ACC_YH, + VREG_C_ACC_ZL, + VREG_C_ACC_ZH, + + VREG_C_ACC_HOSU_L = 0x4B, + VREG_C_ACC_HOSU_M, + VREG_C_ACC_HOSU_H, + VREG_C_ACC_HOSU_SETTING, + VREG_C_ACC_HOSU_HIST = 0x4F, + + VREG_C_ACC_HOSU_HOUR_BOUNDARY = 0x50, + VREG_C_ACC_HOSU_HOUR_BOUNDARY_SEC, + + VREG_C_HAL_OVW_CONT0 = 0x52, + VREG_C_HAL_OVW_DAT0, + VREG_C_HAL_OVW_CONT1, // reserved + VREG_C_HAL_OVW_DAT1, // reserved + + VREG_C_HAL_OVW_BT_FUEL = 0x56, + VREG_C_HAL_OVW_BT_VOLTAGE, + + VREG_C_VOL_CAL_MIN = 0x58, + VREG_C_VOL_CAL_MAX, + + VREG_C_HAL_OVW_TEMPERATURE = 0x5A, + + VREG_C_ENDMARK_ +}; + +// Ԃ͔ɂāAmۂȂ߂ ʂ define Ă +#define VREG_CX_INFO 0x7F +#define VREG_CX_FREE_ADRS 0x60 +#define VREG_CX_FREE_DATA 0x61 +// VREG_C_AMBIENT_BRIGHTNESS = 0xXX, + + + + +/*============================================================================*/ +void vreg_ctr_init( ); +void vreg_ctr_reset( ); +void vreg_ctr_write( u8 adrs, u8 data ); +u8 vreg_ctr_read( u8 phy_adrs ); +void vreg_ctr_after_read( u8 adrs, u8 data ); +void set_irq( u8 irqreg, u8 irq_flg ); + + +#define is_wifi_calib_resets_ast ( vreg_ctr[ VREG_C_WIFI_CALIB ] & REG_BIT_WIFI_CALIB_RSTS_AST ) +#define vreg_stop_acc ( vreg_ctr[ VREG_C_ACC_CONFIG ] &= ~( VREG_BITMASK_ACC_CONF_HOSU | VREG_BITMASK_ACC_CONF_ACQ ) ) +#define vreg_set_acc_error ( vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_ACCERO_ERR ) +#define is_acc_on ( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_ACQ ) +#define is_pedo_on ( vreg_ctr[VREG_C_ACC_CONFIG] & VREG_BITMASK_ACC_CONF_HOSU ) +#define is_mgic_error ( vreg_ctr[ VREG_C_STATUS_1 ] & REG_BIT_MGIC_ERR ) +#define vreg_set_mgic_error ( vreg_ctr[ VREG_C_STATUS_1 ] |= REG_BIT_MGIC_ERR ) +#define vreg_clear_mgic_error ( vreg_ctr[ VREG_C_STATUS_1 ] &= ~(REG_BIT_MGIC_ERR) ) +#define is_bt_charging ( vreg_ctr[VREG_C_STATUS] & REG_BIT_BATT_CHARGE ) +#define is_shell_open ( vreg_ctr[VREG_C_STATUS] & REG_BIT_ST_SHELL_OPEN ) + + +#endif diff --git a/branches/IS_capture/vreg_twl.c b/branches/IS_capture/vreg_twl.c new file mode 100644 index 0000000..1cb1225 --- /dev/null +++ b/branches/IS_capture/vreg_twl.c @@ -0,0 +1,169 @@ +/* ======================================================== + TWL݊I2CWX^ + + $Id$ + ======================================================== */ +#include "incs.h" +#include "jhl_defs.h" +#include "led.h" + +#include "vreg_twl.h" +//#include "vreg_ctr.h" +#include "adc.h" + + +// ======================================================== +#define TWL_REG_VER_INFO 0x35 +#define NON_EXIST_REG 0xFF + +// ======================================================== +u8 vreg_twl[_REG_TWL_INT_ADRS_ENDMARK]; + + +extern bit twl_ver_read; +extern bit cam_led_update; +extern bit vol_changed_by_twl; + + +// ======================================================== +extern void tsk_led_cam(); + + + + +/********************************************//** + zWX^̏ + ***********************************************/ +void vreg_twl_init( ) +{ + vreg_twl[ REG_TWL_INT_ADRS_MODE ] = 0x03; + vreg_twl[ REG_TWL_INT_ADRS_IRQ ] = 0; + vreg_twl[ REG_TWL_INT_ADRS_CAM ] = 0; + vreg_twl[ REG_TWL_INT_ADRS_TEMP0 ] = 0; +} + + + +/********************************************//** + I2CzWX^ɏEANV + + @ adrs ͓AhX + + @݂ȂAhXɃANZXꍇA܂B + ***********************************************/ +void vreg_twl_write( u8 adrs, u8 data ) +{ + switch ( adrs ) + { + case ( REG_TWL_INT_ADRS_VOL ): + { + vol_changed_by_twl = true; + vreg_twl[ REG_TWL_INT_ADRS_VOL ] = data; + //renge_task_immed_add( tski_vol_update ); + vol_polling = 3; + break; + } + + case ( REG_TWL_INT_ADRS_MODE ): + vreg_twl[ REG_TWL_INT_ADRS_MODE ] = ( data & 0x83 ); // [8]vol32 [1:0]nand + break; + + case ( REG_TWL_INT_ADRS_CAM ): + vreg_twl[ REG_TWL_INT_ADRS_CAM ] = ( data & 0x03 ); + if( ( data & 0x03 ) == TWL_CAMLED_BLINK ) + { + cam_led_update = true; // łȂƈꔭɕs邽 + } + tsk_led_cam(); // uN̓sŋN + break; + + case ( REG_TWL_INT_ADRS_TEMP0 ): + vreg_twl[ REG_TWL_INT_ADRS_TEMP0 ] = data; + break; + + case ( REG_TWL_INT_ADRS_COMMAND ): +/* + if( data <= 2 ){ + if( ( data & REG_BIT_TWL_OFF_REQ ) != 0 ) + { + set_irq( VREG_C_IRQ2, REG_BIT_TWL_OFF_REQ ); // OFFĂ炵B + break; + } + else if( ( data & REG_BIT_TWL_RESET_REQ ) != 0 ) + { + set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ ); //ZbgȂB̂́ASPI痈܂B + break; + } + } +*/ + if( data == REG_BIT_TWL_RESET_REQ ) + { + set_irq( VREG_C_IRQ2, REG_BIT_TWL_RESET_REQ ); //ZbgȂB̂́ASPI痈܂B + break; + } + } + return; +} + + + +/********************************************//** + I2CzWX^ǂ݂܂B + + @ adrs O猩Ƃ́AAhX + + @߂ xx f[^ + + @݂ȂAhXɃANZXꍇA߂l0x5A + ***********************************************/ +u8 vreg_twl_read( u8 phy_adrs ) +{ + u8 temp; + + switch( phy_adrs ){ + // 10%ȉŐԂɂȂ + case( REG_TWL_INT_ADRS_POWER_INFO ): + // x̃Zbg get_batt_left()ixĖłj + return( vreg_twl[ REG_TWL_INT_ADRS_POWER_INFO ] | ( !PM_EXTDC_n ? 0x80: 0x00 ) ); // A_v^bit(A_v^L) + + case( REG_TWL_INT_ADRS_IRQ ): + temp = vreg_twl[ REG_TWL_INT_ADRS_IRQ ]; + vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0; + return( temp ); + + case( REG_TWL_INT_ADRS_VER_INFO ): +// set_irq( VREG_C_IRQ2, REG_BIT_TWL_VER_READ ); // xIɖȂ̂ + twl_ver_read = true; + return( TWL_REG_VER_INFO ); + + case( REG_TWL_ADRS_NON_EXIST ): + return( 0x00 ); + + default: + return( vreg_twl[ phy_adrs ] ); + } +} + + + +/********************************************//** + O猩钎HAhXA̘AAhXɓǂݑւ + + 0xFF݂͑ȂAhXB + ***********************************************/ +u8 adrs_table_twl_ext2int( u8 img ) +{ + switch( img ){ + case( REG_TWL_ADRS_IRQ ): return( REG_TWL_INT_ADRS_IRQ ); + case( REG_TWL_ADRS_COMMAND ): return( REG_TWL_INT_ADRS_COMMAND ); + case( REG_TWL_ADRS_POWER_INFO ): return( REG_TWL_INT_ADRS_POWER_INFO ); + case( REG_TWL_ADRS_VOL ): return( REG_TWL_INT_ADRS_VOL ); + case( REG_TWL_ADRS_CAM ): return( REG_TWL_INT_ADRS_CAM ); + case( REG_TWL_ADRS_TEMP0 ): return( REG_TWL_INT_ADRS_TEMP0 ); + case( REG_TWL_ADRS_VER_INFO ): return( REG_TWL_INT_ADRS_VER_INFO ); + case( REG_TWL_ADRS_MODE ): return( REG_TWL_INT_ADRS_MODE ); + default: return( REG_TWL_ADRS_NON_EXIST ); +// 0ǂ߂΂悢AȂėǂ +// case( REG_TWL_ADRS_WIFI ): return( REG_TWL_INT_ADRS_WIFI ); + } +} diff --git a/branches/IS_capture/vreg_twl.h b/branches/IS_capture/vreg_twl.h new file mode 100644 index 0000000..63cdd94 --- /dev/null +++ b/branches/IS_capture/vreg_twl.h @@ -0,0 +1,127 @@ +#ifndef __vreg_twl__ +#define __vreg_twl__ +/* ========================================================================= */ +extern u8 vreg_twl[]; + + +/* + * O猩Ƃ̃}CRWX^AhXB + * gȂǂlĔєтɂĂB + */ +/* + * 荞ݗvtO + * MSB:OdL/Ȃω ij + * 6:VolL[iύXɌ炸BMAXɁ{łBj + * 5:drd o + * 4: + * 3:dXCb` ꌟo + * 2:iݒj + * 1:dXCb` OFF ԉꌟo + * LSB: Zbg + */ +enum REG_TWL_ADRS +{ // `AhX֏񂾍ۂ͖ + REG_TWL_ADRS_VER_INFO = 0x00, + REG_TWL_ADRS_PMIC_INFO, + REG_TWL_ADRS_BATT_INFO, + REG_TWL_ADRS_IRQ = 0x10, + REG_TWL_ADRS_COMMAND, + REG_TWL_ADRS_MODE, + REG_TWL_ADRS_POWER_INFO = 0x20, + REG_TWL_ADRS_POWER_SAVE, + REG_TWL_ADRS_WIFI = 0x30, + REG_TWL_ADRS_CAM, + REG_TWL_ADRS_VOL = 0x40, + REG_TWL_ADRS_BL, + REG_TWL_ADRS_CODEC_MIC_GAIN = 0x50, + REG_TWL_ADRS_ADC_CALIB = 0x60, + REG_TWL_ADRS_ADC_CALIB_STATUS, + REG_TWL_ADRS_ADC_CALIB_VALUE, + REG_TWL_ADRS_POWER_LED, + REG_TWL_ADRS_TEMP0 = 0x70, + REG_TWL_ADRS_TEMP1, + REG_TWL_ADRS_TEMP2, + REG_TWL_ADRS_TEMP3, + REG_TWL_ADRS_TEMP4, + REG_TWL_ADRS_TEMP5, + REG_TWL_ADRS_TEMP6, + REG_TWL_ADRS_TEMP7, + REG_TWL_ADRS_TIME_PWSW_DELAY = 0x80, + REG_TWL_ADRS_TIME_PWSW_THRESHOLD +}; + +#define REG_TWL_ADRS_NON_EXIST 0xFF + +/* + * }CRł̃WX^̎ + * ‚߂Ă + */ +enum REG_TWL_ADRS_INT +{ + REG_TWL_INT_ADRS_VER_INFO = 0x00, +// REG_TWL_INT_ADRS_PMIC_INFO, +// REG_TWL_INT_ADRS_BATT_INFO, + REG_TWL_INT_ADRS_IRQ, // 0x10, + REG_TWL_INT_ADRS_COMMAND, + REG_TWL_INT_ADRS_MODE, + REG_TWL_INT_ADRS_POWER_INFO, // 0x20, +// REG_TWL_INT_ADRS_POWER_SAVE, +// REG_TWL_INT_ADRS_WIFI, // 0x30, + REG_TWL_INT_ADRS_CAM, + REG_TWL_INT_ADRS_VOL, // 0x40, +// REG_TWL_INT_ADRS_BL, +// REG_TWL_INT_ADRS_CODEC_MIC_GAIN, // 0x50, +// REG_TWL_INT_ADRS_CODEC_MIC_GAIN_RELOAD, +// REG_TWL_INT_ADRS_ADC_CALIB, // 0x60, +// REG_TWL_INT_ADRS_ADC_CALIB_STATUS, +// REG_TWL_INT_ADRS_ADC_CALIB_VALUE, +// REG_TWL_INT_ADRS_POWER_LED, + REG_TWL_INT_ADRS_TEMP0, // 0x70 - 0x77 + REG_TWL_INT_ADRS_TEMP1, + REG_TWL_INT_ADRS_TEMP2, + REG_TWL_INT_ADRS_TEMP3, + REG_TWL_INT_ADRS_TEMP4, + REG_TWL_INT_ADRS_TEMP5, + REG_TWL_INT_ADRS_TEMP6, + REG_TWL_INT_ADRS_TEMP7, +// REG_TWL_INT_ADRS_TIME_PWSW_DELAY, +// REG_TWL_INT_ADRS_TIME_PWSW_THRESHOLD + _REG_TWL_INT_ADRS_ENDMARK, +}; + + + +/* ========================================================================= */ +#define is_TWL ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x01 ) +#define with_NAND ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x02 ) +#define volSteps32 ( vreg_twl[ REG_TWL_INT_ADRS_MODE ] & 0x80 ) + +#define reg_wifi_led ( vreg_twl[ REG_TWL_INT_ADRS_WIFI ] & 0x01 ) +#define reg_wifi_led_blink ( vreg_twl[ REG_TWL_INT_ADRS_WIFI ] & 0x02 ) + +#define REG_TWL_ADRS_MODE__VOL32 ( 1 << 7 ) + +typedef enum CAM_LED_TWL_MODE +{ + TWL_CAMLED_OFF, + TWL_CAMLED_ON, + TWL_CAMLED_BLINK, + TWL_CAMLED_DEF_ON +}twl_camLed_mode; + + +/* ========================================================================= */ +void vreg_twl_init( ); +void vreg_twl_write( u8 adrs, u8 data ); +u8 adrs_table_twl_ext2int( u8 img ); +u8 vreg_twl_read( u8 phy_adrs ); + + +// ǂ񂾂NAȂǂ̏ +#define vreg_twl_after_read( reg_adrs ); \ + if( reg_adrs == REG_TWL_INT_ADRS_IRQ ) \ + { \ + vreg_twl[ REG_TWL_INT_ADRS_IRQ ]= 0;\ + } + +#endif diff --git a/branches/IS_capture/yav_mcu_bsr.plg b/branches/IS_capture/yav_mcu_bsr.plg new file mode 100644 index 0000000..160064e --- /dev/null +++ b/branches/IS_capture/yav_mcu_bsr.plg @@ -0,0 +1,33 @@ +C:\Windows\system32\cmd.exe /c c:\cygwin\bin\touch magic.c +"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\bin\cc78k0r.exe" -c9F0104 -y"C:\Program Files (x86)\NEC Electronics Tools\DEV" -_msgoff -irenge -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\inc78k0r" -ms -rd2s2 -qvjl2w -sainter_asm -zpb -no magic.c +Compilation complete, 0 error(s) and 0 warning(s) found. +"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\ra78k0r.exe" -c9F0104 -y"C:\Program Files (x86)\NEC Electronics Tools\DEV" -_msgoff -pinter_asm -ks -kx inter_asm\magic.asm +Assembly complete, 0 error(s) and 0 warning(s) found. +"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\lk78k0r.exe" -y"C:\Program Files (x86)\NEC Electronics Tools\DEV" -_msgoff -obsr.lmf "..\..\..\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r\s0rm.rel" -gi1B339499E033F240BFAAh -pbsr_k0r.map -nkd -gb7EFBFFh -b"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r\fsl.lib" -bcl0rdm.lib -bcl0rm.lib -bcl0rmf.lib -i"C:\Program Files (x86)\NEC Electronics Tools\CC78K0R\W2.13\lib78k0r" -dbsr_mcu.dr -s -w2 loader.rel pm.rel i2c_ctr.rel main.rel magic.rel WDT.rel i2c_mcu.rel i2c_twl.rel led.rel rtc.rel vreg_ctr.rel vreg_twl.rel adc.rel renge.rel accero.rel self_flash.rel sw.rel task_debug.rel task_misc.rel task_sys.rel pedo_alg_thre_det2.rel ini_VECT.rel task_status.rel led_cam.rel led_pow.rel hal.rel batt_params.rel voltable.rel pedo_lpf_coeff.rel kanaria.rel kanaria_c.rel get_ei.rel util_funcs.rel i2c_mcu-sub.rel +RA78K0R warning W3420: File 'loader.rel' already has had error(s)/warning(s) by 'CC78K' + Read Device File Directory : C:\PROGRAM FILES (X86)\NEC ELECTRONICS TOOLS\DEV\ +RA78K0R warning W3420: File 'pm.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'i2c_mcu.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'led.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'vreg_ctr.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'vreg_twl.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'adc.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'accero.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'self_flash.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'task_misc.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'task_sys.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'pedo_alg_thre_det2.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'led_pow.rel' already has had error(s)/warning(s) by 'CC78K' +RA78K0R warning W3420: File 'batt_params.rel' already has had error(s)/warning(s) by 'CC78K' + +Link complete, 0 error(s) and 14 warning(s) found. +"C:\Program Files (x86)\NEC Electronics Tools\RA78K0R\W1.33\bin\oc78k0r.exe" -y"C:\Program Files (x86)\NEC Electronics Tools\DEV" -_msgoff -o.\bsr.hex -nu -ki bsr.lmf +Object Conversion Complete, 0 error(s) and 0 warning(s) found. +C:\Windows\system32\cmd.exe /c ruby nec_s_2_bsrbin2.rb bsr.hex +nec_s_2_bsrbin2.rb:2: warning: variable $KCODE is no longer effective; ignored +4 +intel-HEX to bsr bin converter + file converted! + + +Build Total error(s) : 0 Total warning(s) : 14 diff --git a/branches/IS_capture/yav_mcu_bsr.pri b/branches/IS_capture/yav_mcu_bsr.pri new file mode 100644 index 0000000..b018509 --- /dev/null +++ b/branches/IS_capture/yav_mcu_bsr.pri @@ -0,0 +1,1031 @@ +[Project.ID] +Ver=200 +Target=IDK0R32G +[Configuration] +Chip=uPD79F0104 +Internal Rom=32KB +Internal Ram=1536B +Clock=Target +Sub Clock=Target +Peripheral Break=0x3 +Firm Clock=System +Flash Programming=Permit +Low-voltage Flash Rewriting=On +Fail Safe Break=0x2000 +Port=1 +NMI=OFF +TRESET=OFF +IRESET=OFF +WAIT=OFF +SysClock=None +SubClock=None +[Mapping] +Count=0 +[Main] +Geometry=154, 154, 1188, 812 +Window=Max +MDI_MAX=OFF +Button=ON +Mode=Auto +Trace=Uncond ON +Trace2=Non Stop +Coverage=OFF +Timer=OFF +Tracer=OFF +[Load File] +Dir=\\tsclient\C\78k_data\yav-mcu-basara\trunk\ +SaveFilter=0 +Start=0 +End=0 +LoadFilter=5 +Offset=0 +Object=ON +Symbol=ON +Erase=OFF +HighSpeed=OFF +Symbol Reset=ON +CPU Reset=ON +File1=\\tsclient\C\78k_data\yav-mcu-basara\trunk\bsr.lmf +LoadFilter1=5 +Offset1=0 +Object1=ON +Symbol1=ON +Erase1=OFF +HighSpeed1=OFF +CPU Reset1=ON +Symbol Reset1=ON +[View File] +Dir=\\tsclient\C\78k_data\yav-mcu-basara\trunk\ +Filter=Source +[Debugger Option] +Source Path="\\tsclient\C\78k_data\yav-mcu-basara\trunk\renge" +Symbol Size=Byte +Symbol Format=Hex +Register Name=Func +Offset Label=OFF +Offset Mnemonic=ON +Tab Count=4 +Tab Size1=*.*, 8 +Tab Size2=*.c, 8 +Tab Size3=*.s, 8 +Tab Size4=*.asm, 8 +Default Source=*.c;*.s;*.asm +Default Module=*.lnk;*.lmf +Startup Start=_@cstart +Startup End=_@cend +Main Symbol=_main +Symbol Type=OFF +Language=C +Kanji=SJIS +[Source] +Geometry=762, 184, 689, 822 +Window=Normal +DispStart=82 +CaretPos=83,0 +Mode=Normal +DispFile= +Address1= +Address2= +Address3= +Address4= +Address5= +Address6= +Address7= +Address8= +Address9= +Address10= +Address11= +Address12= +Address13= +Address14= +Address15= +Address16= +Data1= +Data2= +Data3= +Data4= +Data5= +Data6= +Data7= +Data8= +Data9= +Data10= +Data11= +Data12= +Data13= +Data14= +Data15= +Data16= +Option=0 +Case=ON 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+L509=IICF1 +L510=IICRSV1 +L511=STCEN1 +L512=IICBSY1 +L513=STCF1 +L514=IICCTL01 +L515=SPT1 +L516=STT1 +L517=ACKE1 +L518=WTIM1 +L519=SPIE1 +L520=WREL1 +L521=LREL1 +L522=IICE1 +L523=IICCTL11 +L524=DFC1 +L525=SMC1 +L526=DAD1 +L527=CLD1 +L528=WUP1 +L529=IICWL1 +L530=IICWH1 +L531=SVA1 +[Local Variable] +Geometry=0, 0, 0, 0 +Window=Hide +Boundary=0 +Mode=Proper +[Trace View] +Geometry=0, 0, 0, 0 +Window=Hide +Mode=Normal +Frame=Show +Timetag=Clock +Address=Show +Data=Hex +Status=Show +Address2=Show +Data2=Hex +Status2=Show +Disasm=Show +Pick Up=Off +Synchronize=0 0 0 0 +Frameno= +Frameno1= +Frameno2= +Frameno3= +Frameno4= +Frameno5= +Frameno6= +Frameno7= +Frameno8= +Frameno9= +Frameno10= +Frameno11= +Frameno12= +Frameno13= +Frameno14= +Frameno15= +Frameno16= +ScanStatus=ALL +Access Size=B +ScanAddress=<>-<> +Mask Address= +ScanData= +Mask Data= +ScanExternal= +Mask External= +Scan=OFF +Direction=Down +FindStart= +FindEnd= +SaveRange=Screen +SaveStart= +SaveEnd= +[Register] +Geometry=0, 0, 0, 0 +Window=Hide +Mode=Hex +Boundary=0 +Pickup=OFF +Name=Functional +Register Bank=0 +RP0=3 +RP1=3 +RP2=3 +RP3=3 +PC=3 +SP=3 +PSW=3 +ES=3 +CS=3 +[Event Manager] +Geometry=0, 0, 0, 0 +Window=Hide +Sort by=Unsort +Detail=OFF +[Event Set] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Event Link] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Break] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Trace] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Delay Count0=2 +Count=0 +[Snap] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Stub] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Timer] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +TimerRateRunBreak=0011 +TimerBreakOutRunBreak=OFF +Count=0 +[Timer Monitor] +Count=0 +[Dmm] +Geometry=0, 0, 0, 0 +Window=Hide +Manager=ON +Sort by=Unsort +Detail=OFF +Last Name= +Count=0 +[Variable] +Geometry=1153, 8, 440, 300 +Window=Normal +Boundary=13762700 +0=.BT_IN_CHG_n,P,N,A,+,1 +Line=1 +[Quick Watch] +0=BT_IN_CHG_n,P,A,1 +1= +2= +3= +4= +5= +6= +7= +8= +9= +10= +11= +12= +13= +14= +15= +[Software Break] +Geometry=0, 0, 0, 0 +Window=Hide +Width=150 30 200 100 +Name0=Swb00002 +Address0=pm.c#_tsk_batt+0x27 +Window0=ASM +Status0=ON +Name1=Swb00001 +Address1=pm.c#_tsk_batt+0x24 +Window1=ASM +Status1=ON +Count=2 +[Reset] +Debugger=ON +Symbol=OFF +Target CPU=OFF +[Extended Option] +OnClick Software Break=ON +TraceTimetag=x1 +Redraw=500 +Break When Access Function=OFF +Break When Access Whole=Select +Verify=ON +Break Sound=ON +TraceAutoClear=OFF +RRM Clock=Internal +CKC Register Value=0x09 +RRM Internal Clock Frequency=8.000 +[About] +Version=Program +[Pseudo Emulation] +Geometry=0, 0, 0, 0 +Window=Hide +[Data Flash Option] +Data Flash Emulation=OFF +[List] +Geometry=0, 0, 0, 0 +Window=Hide +[Console] +Geometry=0, 0, 0, 0 +Window=Hide diff --git a/branches/IS_capture/yav_mcu_bsr.prj b/branches/IS_capture/yav_mcu_bsr.prj new file mode 100644 index 0000000..0b5a084 --- /dev/null +++ b/branches/IS_capture/yav_mcu_bsr.prj @@ -0,0 +1,1411 @@ +[ProjectManager] +Version=6.00 +Path=C:\78k_data\yav-mcu-basara\trunk\ +Title=yav-mcu +Series=78K0R.PM +Device=uPD79F0104 +DeviceVer=E1.00b +DebugMode=1 +Target=bsr.lmf +[BuildMode0] +BuildModeName=Debug Build +TargetFile=0 +[BuildMode1] +BuildModeName=Release Build +TargetFile=0 +[Tools] +MakeFile=yav_mcu_bsr.mak +Debugger=C:\Program Files (x86)\NEC Electronics Tools\ID78K0R-QB\V3.61\BIN\IDK0R32G.EXE +DebOption= +DebCpuReset=1 +DebSymReset=1 +MuitiLoad=0 +LoadPrjNum=0 +CheckVersion=CC78K0R|W2.13;RA78K0R|W1.33 +[Option.IDK0R32G] +File=\\tsclient\C\78k_data\yav-mcu-basara\trunk\yav_mcu_bsr.pri +[BuildMode2] +BuildModeName=K0R_dbg +TargetFile=0 +[BuildMode3] +BuildModeName=BSR_dbg +TargetFile=0 +[BuildMode4] +BuildModeName=BSR_rel +TargetFile=0 +[BuildMode5] +BuildModeName=BSR_WM0 +TargetFile=0 +[Options.OC78K0R 0] +Version=100 +O0=.\bsr.hex +O1=bsr.hex +UC=1 +UN=FF +UST= +USZ= +K=1 +ZF=0 +S=1 +E=0 +CommandFile=0 +[Options.OC78K0R 1] +Version=100 +UC=1 +UN=FF +UST= +USZ= +K=1 +ZF=0 +S=1 +E=0 +CommandFile=0 +[Options.OC78K0R 2] +Version=100 +O0=.\bsr.hex +O1=bsr.hex +UC=0 +UN=FF +UST= +USZ= +K=0 +ZF=0 +S=1 +E=0 +CommandFile=0 +[Options.OC78K0R 3] +Version=100 +O0=.\bsr.hex +O1=bsr.hex +UC=1 +UN=FF +UST= +USZ= +K=1 +ZF=0 +S=1 +E=0 +CommandFile=0 +[Options.OC78K0R 4] +Version=100 +O0=.\bsr.hex +O1=bsr.hex +UC=1 +UN=FF +UST= +USZ= +K=1 +ZF=0 +S=1 +E=0 +CommandFile=0 +[Options.OC78K0R 5] +Version=100 +O0=.\bsr.hex +O1=bsr.hex +UC=1 +UN=FF +UST= +USZ= +K=1 +ZF=0 +S=1 +E=0 +CommandFile=0 +[BuildBefore-AfterCmd] +Before1=c:\cygwin\bin\touch magic.c +After1=ruby nec_s_2_bsrbin2.rb bsr.hex +[ToolSet] +ToolSetName=(ύX)78K0R Software Package V1.10 +Tool1=CC78K0R|W2.13 +Tool2=RA78K0R|W1.33 +Tool3=SK78K0R|V3.10 +Tool4=ID78K0R-QB|V3.61 +[Options.RA78K0R 0] +Version=100 +G=1 +GA=1 +E=0 +COMMON=0 +COMPATI=0 +P=1 +KA=1 +KS=0 +KX=0 +LF=0 +LW=132 +LL=0 +LT=8 +Z=0 +CommandFile=0 +RA_OPT= +[Options.RA78K0R 1] +Version=100 +G=0 +GA=0 +E=0 +COMMON=0 +COMPATI=0 +P=1 +KA=1 +KS=0 +KX=0 +LF=0 +LW=132 +LL=0 +LT=8 +Z=0 +CommandFile=0 +RA_OPT= +[Options.RA78K0R 2] +Version=100 +O0= +O1=obj +G=1 +GA=1 +E=0 +COMMON=0 +COMPATI=0 +P=1 +P0=inter_asm +KA=1 +KS=1 +KX=1 +LF=0 +LW=132 +LL=0 +LT=8 +Z=0 +CommandFile=0 +RA_OPT=-pinter_asm -ks -kx +[Options.RA78K0R 3] +Version=100 +G=1 +GA=1 +E=0 +COMMON=0 +COMPATI=0 +P=1 +KA=1 +KS=0 +KX=0 +LF=0 +LW=132 +LL=0 +LT=8 +Z=0 +CommandFile=0 +RA_OPT= +[Options.RA78K0R 4] +Version=100 +G=1 +GA=1 +E=0 +COMMON=0 +COMPATI=0 +P=1 +KA=1 +KS=0 +KX=0 +LF=0 +LW=132 +LL=0 +LT=8 +Z=0 +CommandFile=0 +RA_OPT= +[Options.RA78K0R 5] +Version=100 +G=1 +GA=1 +E=0 +COMMON=0 +COMPATI=0 +P=1 +KA=1 +KS=0 +KX=0 +LF=0 +LW=132 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