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https://github.com/rvtr/ctr_firmware.git
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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@144 b871894f-2f95-9b40-918c-086798483c85
166 lines
5.3 KiB
C
166 lines
5.3 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrBrom - library - os
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File: os_exception.c
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <brom/os.h>
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#include <brom/swi.h>
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void i_osUndefInstHandler( void );
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/*---------------------------------------------------------------------------*
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Name: osInitException
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Description: Initialize Exceptions for Application
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void osInitException( void )
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{
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#ifdef SDK_ARM11
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static BOOL isInit;
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if ( isInit == FALSE )
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{
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isInit = TRUE;
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*(OSExcpHandler*)HW_UDEF_VECTOR_BUF = i_osUndefInstHandler;
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}
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#endif // SDK_ARM11
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}
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#ifdef SDK_ARM11
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#include <brom/code32.h>
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/*---------------------------------------------------------------------------*
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Name: i_osUndefInstHandler
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Description: Undefine Instruction handler
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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ASM void i_osUndefInstHandler( void )
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{
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// change into system mode
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msr cpsr_fsxc, #HW_PSR_SYS_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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stmfd sp!, {r0, r12, lr, pc} // push to previous mode stack (8byte alignment)
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// get LR and SPSR of UNDEF mode
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msr cpsr_fsxc, #HW_PSR_UNDEF_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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mov r12, lr
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mrs r0, spsr
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tst r0, #HW_PSR_THUMB_STATE
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bne i_osUndefInstTerminate
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tst r0, #HW_PSR_JAVA_STATE
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bne i_osUndefInstTerminate
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// permit for only system and user mode to use VFP
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and lr, r0, #HW_PSR_CPU_MODE_MASK
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cmp lr, #HW_PSR_SYS_MODE
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cmpne lr, #HW_PSR_USR_MODE
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bne i_osUndefInstTerminate
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// change into system mode
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msr cpsr_fsxc, #HW_PSR_SYS_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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tst r0, #HW_PSR_THUMB_STATE
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subne r12, r12, #2 // Thumb code return address
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subeq r12, r12, #4 // ARM code return address
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str r12, [sp, #4*3] // store LR_svc to return PC
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stmfd sp!, {r0-r3} // push spsr (8byte alignment)
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adr lr, i_return
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ldr r0, [r12, #0] // called from ARM
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mov r12, r0, lsl #4
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sub r12, r12, #0xC0000000
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cmp r12, #0x30000000
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bhs i_osUndefInstTerminate
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adr r12, i_osUndefCPHandlerTable
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and r0, r0, #0x00000F00
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ldr pc, [r12, r0, lsr #8-2]
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i_return
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ldmfd sp!, {r0-r3} // pop spsr
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// restore into previous mode
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msr cpsr_fsxc, r0
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ldmfd sp!, {r0, r12, lr, pc} // pop from USR stack
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INASM_EXTERN( _VFP_Computation_Engine )
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i_osUndefCPHandlerTable
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DCD i_osUndefInstTerminate // CP 0
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DCD i_osUndefInstTerminate // CP 1
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DCD i_osUndefInstTerminate // CP 2
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DCD i_osUndefInstTerminate // CP 3
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DCD i_osUndefInstTerminate // CP 4
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DCD i_osUndefInstTerminate // CP 5
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DCD i_osUndefInstTerminate // CP 6
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DCD i_osUndefInstTerminate // CP 7
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DCD i_osUndefInstTerminate // CP 8
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DCD i_osUndefInstTerminate // CP 9
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DCD i_osUndefInstHandlerVFP // CP 10
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DCD i_osUndefInstHandlerVFP // CP 11
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DCD i_osUndefInstTerminate // CP 12
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DCD i_osUndefInstTerminate // CP 13
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DCD i_osUndefInstTerminate // CP 14
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DCD i_osUndefInstTerminate // CP 15
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}
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ASM void i_osUndefInstHandlerVFP( void )
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{
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// VFP enable
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fmrx r12, fpexc
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tst r12, #HW_FPEXC_VFP_ENABLE
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LSYM(1)
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bne BSYM(1) // Error
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mov r0, #(HW_FPEXC_EXCEPTION_STATE | HW_FPEXC_FPINST2_VALID)
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bic r12, r12, r0
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orr r12, r12, #HW_FPEXC_VFP_ENABLE
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fmxr fpexc, r12
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ldr r12, =(HW_FPSCR_ROUND_NEAR_MODE << HW_FPSCR_ROUND_MODE_SFT \
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| HW_FPSCR_VEC_LENGTH_1 << HW_FPSCR_VEC_LENGTH_SFT \
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| HW_FPSCR_VEC_STRIDE_1 << HW_FPSCR_VEC_STRIDE_SFT \
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| HW_FPSCR_DZE_ENABLE \
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| HW_FPSCR_DEFAULT_NAN_MODE \
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| HW_FPSCR_FLASH_TO_ZERO_MODE \
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)
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fmxr fpscr, r12
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bx lr
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}
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ASM void i_osUndefInstTerminate( void )
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{
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LSYM(1)
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b BSYM(1)
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bx lr
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}
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#include <brom/codereset.h>
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#endif // SDK_ARM11
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