mirror of
https://github.com/rvtr/ctr_firmware.git
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9e05e4214f
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@211 b871894f-2f95-9b40-918c-086798483c85
99 lines
3.0 KiB
C
99 lines
3.0 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrBrom - library - init
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File: crt0_app.c
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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#undef BROM_TARGET_BROM
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#define BROM_TARGET_APP
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#define STUPi_HW_DTCM |Image$$DTCM$$Base|
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void _start(void);
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/*---------------------------------------------------------------------------*
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Name: _start
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Description: Start up
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Arguments: None
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Returns: None.
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*---------------------------------------------------------------------------*/
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asm void _start( void )
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{
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PRESERVE8
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INASM_EXTERN( STUPi_HW_DTCM )
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INASM_EXTERN( BromSpMain )
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INASM_EXTERN( main )
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//---- initialize stack pointer
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// SVC mode
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mov r0, #HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr sp, =HW_BROM_SVC_STACK_END
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// IRQ mode
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mov r0, #HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_IRQ_STACK_END
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mov sp, r0
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// System mode
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mov r0, #HW_PSR_SYS_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_SYS_STACK_END
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mov sp, r0
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//---- initialize cp15
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bl i_stupInitCP15
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//---- clear wram
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// DTCM (16KB)
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mov r0, #0
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ldr r1, =STUPi_HW_DTCM
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mov r2, #HW_DTCM_SIZE
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bl i_stupCpuClear32
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// 64B
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mov r0, #0
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ldr r1, =HW_PRV_WRAM_SYSRV
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ldr r2, =HW_EXCP_VENEER_BUF
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sub r2, r2, r1
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bl i_stupCpuClear32
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ldr r1, =HW_EXCP_VENEER_BUF_END
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ldr r2, =HW_PRV_WRAM_SYSRV_END
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sub r2, r2, r1
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bl i_stupCpuClear32
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//---- lnitialize sections
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bl stupInitSections
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//---- start (to 16bit code)
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ldr r1, =BromSpMain
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adr lr, terminate
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bx r1
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terminate
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b terminate
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}
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#include <./crt0_pu.c>
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#include <./crt0_misc_sp.c>
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