mirror of
https://github.com/rvtr/ctr_firmware.git
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7700a72a36
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@127 b871894f-2f95-9b40-918c-086798483c85
261 lines
9.2 KiB
C
261 lines
9.2 KiB
C
/*---------------------------------------------------------------------------*
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Project: CtrBrom - libraries - OS
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File: os_irqHandler.c
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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//#define BROM_ENABLE_THREAD
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#ifdef SDK_ARM9
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#include <brom/dtcm_begin.h>
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#endif
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//---- thread queue for interrupt
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OSThreadQueue i_osIrqThreadQueue;
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#ifdef SDK_ARM9
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#include <brom/dtcm_end.h>
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#include <brom/itcm_begin.h>
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#endif
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extern OSIntrFunction osIntrTable[OS_INTR_ID_NUM];
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/*---------------------------------------------------------------------------*
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Name: osIrqHandler
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Description: IRQ handler. call handler according to OS_InterruptTable
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void osIrqHandler( void )
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{
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PRESERVE8
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INASM_EXTERN( osIntrTable )
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sub lr, lr, #4 // •œ‹AƒAƒhƒŒƒX’²<E28099>®
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stmfd sp!, { r0-r3,r12,lr }
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stmfd sp!, { lr } // save LR
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// get IE address
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mov r12, #HW_REG_BASE
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add r12, r12, #REG_IE_OFFSET // r12: REG_IE address
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// get IE&IF
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ldmia r12, { r1-r2 } // r1: IE, r2: IF
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ands r1, r1, r2 // r1: IE & IF
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// if IE&IF==0 then return (without changing IF)
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ldmeqfd sp!, { lr }
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ldmeqfd sp!, { r0-r3,r12,pc }
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//--------------------------------------------------
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// IRQ HANDLING CODE for ARCHITECTURE VERSION 5
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//--------------------------------------------------
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// get lowest 1 bit
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mov r3, #1<<31
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LSYM(1) clz r0, r1 // count zero of high bit
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bics r1, r1, r3, LSR r0
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bne BSYM(1)
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// clear IF
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mov r1, r3, LSR r0
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str r1, [ r12, #REG_IF_ADDR - REG_IE_ADDR ]
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rsbs r0, r0, #31
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// get jump vector
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ldr r1, =osIntrTable
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ldr r0, [ r1, r0, LSL #2 ]
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blx r0 // set return address for thread rescheduling
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#ifdef BROM_ENABLE_THREAD
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bl osIrqHandler_ThreadSwitch
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#endif // BROM_ENABLE_THREAD
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ldmfd sp!, { lr }
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ldmfd sp!, { r0-r3,r12,pc } // return to interrupted address
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}
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#ifdef BROM_ENABLE_THREAD
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/*---------------------------------------------------------------------------*
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Name: OS_IRQHandler_ThreadSwitch
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Description: Š„‚è<E2809A>ž‚Ý•ªŠò<C5A0>ˆ—<CB86><E28094>iƒe<C692>[ƒuƒ‹ OS_InterruptTable ˆø‚«<E2809A>j
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Arguments: ‚È‚µ
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Returns: ‚È‚µ
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*---------------------------------------------------------------------------*/
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asm void osIrqHandler_ThreadSwitch(void)
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{
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INASM_EXTERN( i_osIrqThreadQueue )
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INASM_EXTERN( i_osThreadInfo )
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//--------------------------------------------------
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// wakeup threads in i_osIrqThreadQueue
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//--------------------------------------------------
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ldr r12, =i_osIrqThreadQueue
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mov r3, #0 // avoid stall
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ldr r12, [r12, #__cpp(offsetof(OSThreadQueue,head))] // r12 = i_osIrqThreadQueue.head
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mov r2, #__cpp(OS_THREAD_STATE_READY) // avoid stall
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cmp r12, #0
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beq thread_switch // if r12 == 0 exit
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LSYM(1) str r2, [r12, #__cpp(offsetof(OSThread,state))]
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str r3, [r12, #__cpp(offsetof(OSThread,queue))]
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str r3, [r12, #__cpp(offsetof(OSThread,link.prev))]
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ldr r0, [r12, #__cpp(offsetof(OSThread,link.next))]
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str r3, [r12, #__cpp(offsetof(OSThread,link.next))]
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mov r12, r0
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cmp r12, #0
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bne BSYM(1)
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ldr r12, =i_osIrqThreadQueue
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str r3, [r12, #__cpp(offsetof(OSThreadQueue,head))] // clear i_osIrqThreadQueue.head
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str r3, [r12, #__cpp(offsetof(OSThreadQueue,tail))] // clear i_osIrqThreadQueue.tail
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ldr r12, =i_osThreadInfo // need to do scheduling
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mov r1, #1
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strh r1, [ r12, #OS_THREADINFO_OFFSET_ISNEEDRESCHEDULING ]
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thread_switch
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//--------------------------------------------------
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// THREAD SWITCH
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//--------------------------------------------------
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// pseudo code
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//
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// if ( isNeedRescheduling == FALSE ) return;
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// isNeedRescheduling = FALSE;
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//
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// // OS_SelectThread
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// OSThread* t = i_osThreadInfo.list;
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// while( t && ! OS_IsThreadRunnable( t ) ){ t = t->next; }
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// return t;
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//
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// select:
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// current = CurrentThread;
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// if ( next == current ) return;
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// CurrentThread = next;
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// OS_SaveContext( current );
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// OS_LoadContext( next );
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//
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// [[[ new OS_SelectThread ]]]
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ldr r12, =i_osThreadInfo
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ldrh r1, [ r12, #OS_THREADINFO_OFFSET_ISNEEDRESCHEDULING ]
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cmp r1, #0
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beq _dont_switched_ // return if i_osIsNeedResceduling == 0
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mov r1, #0
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strh r1, [ r12, #OS_THREADINFO_OFFSET_ISNEEDRESCHEDULING ]
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// ---- OS_SelectThread (disable FIQ to support IS-Debugger snooping thread information)
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mov r3, #HW_PSR_IRQ_MODE|HW_PSR_FIQ_DISABLE|HW_PSR_IRQ_DISABLE|HW_PSR_ARM_STATE
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msr cpsr_c, r3
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add r2, r12, #OS_THREADINFO_OFFSET_LIST // r2 = &i_osThreadInfo.list
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ldr r1, [r2] // r1 = *r2 = TopOfList
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LSYM(11)
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cmp r1, #0
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ldrneh r0, [ r1, #__cpp(OS_THREAD_OFFSET_STATE) ] // r0 = t->state
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cmpne r0, #__cpp(OS_THREAD_STATE_READY)
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ldrne r1, [ r1, #__cpp(OS_THREAD_OFFSET_NEXT) ]
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bne BSYM(11)
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cmp r1, #0
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bne FSYM(12)
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_dont_switched_
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mov r3, #HW_PSR_IRQ_MODE|HW_PSR_IRQ_DISABLE|HW_PSR_ARM_STATE
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msr cpsr_c, r3
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ldmfd sp!, { lr }
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ldmfd sp!, { r0-r3,r12,lr } // return to interrupted address
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bx lr
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// not reach here
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LSYM(12)
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// ---- OS_GetCurrentThread
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ldr r0, [ r12, #OS_THREADINFO_OFFSET_CURRENT ]
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cmp r1, r0
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beq _dont_switched_ // return if no thread switching
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// call thread switch callback (need to save register r0, r1, r12)
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ldr r3, [ r12, #OS_THREADINFO_OFFSET_SWITCHCALLBACK ]
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cmp r3, #0
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beq FSYM(13) // skip calling callback when callback == 0
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stmfd sp!, { r0, r1, r12 }
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mov lr, pc
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bx r3
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ldmfd sp!, { r0, r1, r12 }
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LSYM(13)
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// ---- OS_SetCurrentThread
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str r1, [ r12, #OS_THREADINFO_OFFSET_CURRENT ]
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// ---- OS_SaveContext
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// r0=currentThread r1=nextThread
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// stack=Lo[LR,R0,R1,R2,R3,R12,LR]Hi
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mrs r2, SPSR
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str r2, [ r0, #OS_THREAD_OFFSET_CONTEXT ]! // *r0=context:CPSR
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ldmib sp!, { r2,r3 } // Get R0,R1 // *sp=stack:R1
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stmib r0!, { r2,r3 } // Put R0,R1 // *r0=context:R1
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ldmib sp!, { r2,r3,r12,r14 } // Get R2,R3,R12,LR / *sp=stack:LR
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stmib r0!, { r2-r14 }^ // Put R2-R14^ // *r0=context:R14
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stmib r0!, { r14 } // Put R14_irq // *r0=context:R15+4
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#ifdef SDK_CONTEXT_HAS_SP_SVC
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mov r3, #HW_PSR_SVC_MODE|HW_PSR_FIQ_DISABLE|HW_PSR_IRQ_DISABLE|HW_PSR_ARM_STATE
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msr cpsr_c, r3
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stmib r0!, { sp }
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#endif
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// ---- OS_LoadContext
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#ifdef SDK_CONTEXT_HAS_SP_SVC
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ldr sp, [ r1, #OS_THREAD_OFFSET_CONTEXT+OS_CONTEXT_SP_SVC ]
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mov r3, #HW_PSR_IRQ_MODE|HW_PSR_FIQ_DISABLE|HW_PSR_IRQ_DISABLE|HW_PSR_ARM_STATE
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msr cpsr_c, r3
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#endif
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ldr r2, [ r1, #OS_THREAD_OFFSET_CONTEXT ]! // *r1=context:CPSR
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msr SPSR_cxsf, r2 // Put SPSR
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ldr r14, [ r1, #OS_CONTEXT_PC_PLUS4 - OS_CONTEXT_CPSR ] // Get R15
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ldmib r1, { r0-r14 }^ // Get R0-R14^ // *r1=over written
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nop
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stmda sp!, { r0-r3,r12,r14 } // Put R0-R3,R12,LR / *sp=stack:LR
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ldmfd sp!, { pc } // return to irq master handler
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}
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#endif // BROM_ENABLE_THREAD
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#ifdef SDK_ARM9
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#include <brom/itcm_end.h>
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#endif
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