ctr_firmware/trunk/bootrom/include/brom/hw/ARM9/mmap_brom.h
nakasima 3092e655b1 ブートROM用ワークをDTCMへ移動。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@180 b871894f-2f95-9b40-918c-086798483c85
2009-01-19 01:29:46 +00:00

71 lines
2.6 KiB
C

/*---------------------------------------------------------------------------*
Project: CtrBrom - HW - include
File: mmap_brom.h
Copyright 2008 Nintendo. All rights reserved.
These coded instructions, statements, and computer programs contain
proprietary information of Nintendo of America Inc. and/or Nintendo
Company Ltd., and are protected by Federal copyright law. They may
not be disclosed to third parties or copied or duplicated in any form,
in whole or in part, without the prior written consent of Nintendo.
$Date:: $
$Rev$
$Author$
*---------------------------------------------------------------------------*/
#ifndef BROM_HW_ARM9_MMAP_BROM_H_
#define BROM_HW_ARM9_MMAP_BROM_H_
#include <brom/brom_defs.h>
#include <ctr/hw/ARM9/mmap_global.h>
#include <firm/hw/ARM9/mmap_firm.h>
#include <brom/hw/ARM9/mmap_tcm.h>
#include <brom/hw/common/mmap_shared.h>
#ifdef __cplusplus
extern "C" {
#endif
//------------------------------------- BROM
#ifdef BROM_ENABLE_WRAMEMU
#define HW_BROM HW_WRAM
#else // BROM_ENABLE_WRAMEMU
#define HW_BROM HW_BIOS
#endif
#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
#ifdef SDK_MG20EMU
#define HW_BROM_SIZE 0x8000 // 32KB
#else // SDK_MG20EMU
#define HW_BROM_SIZE 0x10000 // 64KB
#endif // SDK_MG20EMU
#define HW_BROM_NML HW_BROM
#define HW_BROM_NML_END (HW_BROM_NML + HW_BROM_NML_SIZE)
#ifdef SDK_MG20EMU
#define HW_BROM_NML_SIZE 0x4000 // 16KB
#else // SDK_MG20EMU
#define HW_BROM_NML_SIZE 0x8000 // 32KB
#endif // SDK_MG20EMU
#define HW_BROM_SEC HW_BROM_NML_END
#define HW_BROM_SEC_END (HW_BROM_SEC + HW_BROM_SEC_SIZE)
#define HW_BROM_SEC_SIZE HW_BROM_NML_SIZE
//------------------------------------- BROM_WRAM
#define HW_BROM_WRAM HW_DTCM
#define HW_BROM_WRAM_END (HW_BROM_WRAM + HW_BROM_WRAM_SIZE)
#define HW_BROM_WRAM_SIZE (HW_DTCM_SIZE - HW_BROM_STACK_SIZE)
//------------------------------------- HW_BROM_CACHE_DEBUG_BUF
#define HW_BROM_CACHE_DEBUG_BUF HW_ITCM
#define HW_BROM_CACHE_DEBUG_BUF_END (HW_BROM_CACHE_DEBUG_BUF + HW_BROM_CACHE_DEBUG_BUF_SIZE)
#define HW_BROM_CACHE_DEBUG_BUF_SIZE (HW_ICACHE_SIZE + HW_DCACHE_SIZE + HW_ICACHE_TAG_SIZE + HW_DCACHE_TAG_SIZE) // 13.5KB
#ifdef __cplusplus
} /* extern "C" */
#endif
/* BROM_HW_ARM9_MMAP_BROM_H_ */
#endif