/*---------------------------------------------------------------------------*
  Project:  CtrBrom - library - init
  File:     crt0.c

  Copyright 2008 Nintendo.  All rights reserved.

  These coded instructions, statements, and computer programs contain
  proprietary information of Nintendo of America Inc. and/or Nintendo
  Company Ltd., and are protected by Federal copyright law.  They may
  not be disclosed to third parties or copied or duplicated in any form,
  in whole or in part, without the prior written consent of Nintendo.

  $Date::            $
  $Rev$
  $Author$
 *---------------------------------------------------------------------------*/
#include <brom/code32.h>
#include <brom/os.h>

void    _start(void);

/*---------------------------------------------------------------------------*
  Name:         _start

  Description:  Start up

  Arguments:    None

  Returns:      None.
 *---------------------------------------------------------------------------*/
asm void _start( void )
{
        PRESERVE8

        CODE32  // for _start reference

        INASM_EXTERN( STUPi_IrqVeneer )
        INASM_EXTERN( STUPi_FiqVeneer )
        INASM_EXTERN( STUPi_SwiVeneer )
        INASM_EXTERN( STUPi_UndefInstVeneer )
        INASM_EXTERN( STUPi_PrefetchAbortVeneer )
        INASM_EXTERN( STUPi_DataAbortVeneer )

        b       stupStartHandlerVeneer  // don't change for NULL access compatibility
undef   b       STUPi_UndefInstVeneer
swi     b       STUPi_SwiVeneer
iabt    b       STUPi_PrefetchAbortVeneer
dabt    b       STUPi_DataAbortVeneer
reserve b       reserve
irq     b       STUPi_IrqVeneer
fiq     b       STUPi_FiqVeneer

#ifdef SDK_MG20EMU
        // MG20_CONFIG
        DCD     0x3105
#endif // SDK_MG20EMU

        INASM_EXTERN( STUPi_SwiHandler )

        DCD     STUPi_SwiHandler

#ifdef SDK_MG20EMU
        SPACE   0x20 - 8
#endif // SDK_MG20EMU

stupStartHandlerVeneer

#ifndef SDK_MG20EMU
        // NULLジャンプ時のデータアボート有効時はここで発生
        mov     r12, #0
        ldr     r12, [r12]
#endif // SDK_MG20EMU

        //---- check CPU ID
        mrc     p15,0, r0, c0, c0, 5
        tst     r0, #HW_C0_AP_CPU_ID_MASK
        beq     core0_start

        //----  Wait for IPI
#ifdef BROM_USE_MPCORE_EXTEND_OP
        cpsid   i
#else
        mrs     r0, cpsr
        orr     r1, r0, #HW_PSR_IRQ_DISABLE
        msr     cpsr_c, r1
#endif
        ldr     r3, =REG_IDR_CNT_ADDR
        mov     r0, #REG_OS_IDR_CNT_E_MASK
        str     r0, [r3]
        ldr     r3, =REG_IDR_CLR_PND0_ADDR
        ldr     r1, =REG_OS_IDR_CLR_PND0_IPI_ALL_MASK
        mov     r0, #~0
        str     r0, [r3]
LSYM(10)
        ldr     r0, [r3]
        tst     r0, r1
        wfieq
        nop
        beq     BSYM(10)
        ldr     lr, =HW_START_VECTOR1_BUF
        ldr     lr, [lr]
        bx      lr

core0_start

        INASM_EXTERN( STUPi_StartHandler )

        b       STUPi_StartHandler

        LTORG
}