/*---------------------------------------------------------------------------*
  Project:  CtrBrom - library - init
  File:     crt0.c

  Copyright 2008 Nintendo.  All rights reserved.

  These coded instructions, statements, and computer programs contain
  proprietary information of Nintendo of America Inc. and/or Nintendo
  Company Ltd., and are protected by Federal copyright law.  They may
  not be disclosed to third parties or copied or duplicated in any form,
  in whole or in part, without the prior written consent of Nintendo.

  $Date::            $
  $Rev$
  $Author$
 *---------------------------------------------------------------------------*/
#include <brom/code32.h>
#include <brom/os.h>

void    _start(void);

/*---------------------------------------------------------------------------*
  Name:         _start

  Description:  Start up

  Arguments:    None

  Returns:      None.
 *---------------------------------------------------------------------------*/
asm void _start( void )
{
        PRESERVE8

        CODE32  // for _start reference

        INASM_EXTERN( i_stupIrqVeneer )
        INASM_EXTERN( i_stupFiqVeneer )
        INASM_EXTERN( i_stupSwiVeneer )
        INASM_EXTERN( i_stupUndefVeneer )
        INASM_EXTERN( i_stupIAbtVeneer )
        INASM_EXTERN( i_stupDAbtVeneer )

        b       stupStartHandlerVeneer  // don't change for NULL access compatibility
undef   b       i_stupUndefVeneer
swi     b       i_stupSwiVeneer
iabt    b       i_stupIAbtVeneer
dabt    b       i_stupDAbtVeneer
reserve b       reserve
irq     b       i_stupIrqVeneer
fiq     b       i_stupFiqVeneer

#ifdef SDK_MG20EMU
        // MG20_CONFIG
        DCD     0x3105
#endif // SDK_MG20EMU

        INASM_EXTERN( i_stupSwiHandler )

        DCD     i_stupSwiHandler

#ifdef SDK_MG20EMU
        SPACE   0x20 - 8
#endif // SDK_MG20EMU

stupStartHandlerVeneer
        // NULLジャンプ時のデータアボート有効時はリテラルプールアクセスにてアボート
        ldr     r12, =HW_BROM_SEC
        // NULLデータアボート無効時はセキュアROM切り離しチェック
        ldr     r12, [r12]
        cmp     r12, #0
        cmpne   r12, #~0
LSYM(1) beq     BSYM(1)

        //---- enable performance monitor
        // カウンタ0/1は乱数の要素として使えるかもしれないのでリセットしない
        mrc     p15, 0, r0, c15, c12, 0
        ldr     r1, =HW_C15_PMN_ENABLE | HW_C15_CYCLE_COUNT_RESET | \
                    (HW_C15_EVT_INC_EACH_CYCLE << HW_C15_COUNT0_EVT_SFT) | \
                    (HW_C15_EVT_INC_EACH_CYCLE << HW_C15_COUNT1_EVT_SFT) | \
                     HW_C15_CYCLE_COUNT_D64
        orr     r0, r0, r1
        mcr     p15, 0, r0, c15, c12, 0

        //---- check CPU-ID
        mrc     p15,0, r2, c0, c0, 5
        tst     r2, #HW_C0_AP_CPU_ID_MASK
        beq     core0_start

        cmp     r2, #1
        beq     core1_start
LSYM(1)
        wfi
        nop
        b       BSYM(1)

core1_start
        //----  Wait for IPI
#ifdef BROM_USE_MPCORE_EXTEND_OP
        cpsid   i
#else
        mrs     r0, cpsr
        orr     r0, r0, #HW_PSR_IRQ_DISABLE
        msr     cpsr_c, r0
#endif
        //----  Enable CPU Interface
        ldr     r3, =REG_CPUI_CNT_ADDR
        mov     r0, #REG_OS_CPUI_CNT_E_MASK
        str     r0, [r3]
        //----  Enable Interrupt Distributor
        ldr     r3, =REG_IDR_CNT_ADDR
        mov     r0, #REG_OS_IDR_CNT_E_MASK
        str     r0, [r3]
        ldr     r3, =REG_IDR_CLR_PND0_ADDR
        mov     r1, #REG_OS_IDR_CLR_PND0_IPI0_MASK
        mov     r1, r1, lsl r2
        mov     r0, #~0
        str     r0, [r3]
        ldr     lr, =HW_START_VECTOR1_BUF

        // これ以降は0ページプロテクション領域を参照しないこと
LSYM(10)
        wfi
        nop
        ldr     r0, [r3]
        tst     r0, r1
        beq     BSYM(10)
        ldr     lr, [lr]
        bx      lr

core0_start

        INASM_EXTERN( i_stupStartHandler )

        b       i_stupStartHandler

        LTORG
}