ARM9のMG20EMU暫定対応。

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@167 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2009-01-13 10:38:41 +00:00
parent ec8097d404
commit ffbf2be986
4 changed files with 40 additions and 13 deletions

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@ -21,10 +21,15 @@ void BromSpMain( void )
osInitException();
osInitBROM();
osPrintf( "ARM9: start\n" );
osInitThread();
while (1)
{
osSleep(1);
OSTick tick = osGetTick();
osSleep(1000);
tick = osGetTick() - tick;
osTPrintf( "sleep tick = %llu msec\n", OS_TICK_TO_MSEC(tick) );
}
}

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@ -66,12 +66,12 @@ asm void i_stupStartHandler( void )
ldr r0, =HW_BROM_SYS_STACK_END
mov sp, r0
//---- initialize exceptions
bl stupInitExceptions
//---- initialize cp15
bl i_stupInitCP15
//---- initialize exceptions
bl stupInitExceptions
//---- clear wram
// DTCM (16KB)
mov r0, #0
@ -117,6 +117,9 @@ asm void i_stupInitCP15(void)
| HW_C1_ITCM_LOAD_MODE | HW_C1_DTCM_LOAD_MODE \
| HW_C1_LD_INTERWORK_DISABLE \
| HW_C1_PROTECT_UNIT_ENABLE
#ifdef SDK_MG20EMU
bic r1, r1, #HW_C1_ITCM_ENABLE
#endif // SDK_MG20EMU
bic r0, r0, r1
mcr p15, 0, r0, c1, c0, 0
@ -133,7 +136,7 @@ asm void i_stupInitCP15(void)
; Region 0: MAIN_MEM: Base = 0x20000000, Size = 128MB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 1: IO_AXIRAM: Base = 0x10000000, Size = 256MB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 2: PRV_WRAM: Base = 0x08000000, Size = 1MB, I:Cach Buf / D:Cach Buf, I:NA / D:RW
; Region 3: RESERVED: Base = 0x20000000, Size = 128MB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 3: PRV_WRAM_SYSRV:Base = 0x08000000, Size = 4MB, I:Cach Buf / D:Cach Buf, I:RO / D:RW
; Region 4: DTCM: Base = 0xfffe0000, Size = 16KB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 5: ITCM: Base = 0x07ff8000, Size = 32KB, I:Cach Buf / D:NC NB, I:RO / D:RW
; Region 6: BIOS: Base = 0xffff0000, Size = 64KB, I:Cach NB / D:Cach NB, I:RO / D:RO
@ -163,9 +166,9 @@ asm void i_stupInitCP15(void)
SET_PROTECTION_A( c2, HW_PRV_WRAM, 1MB )
SET_PROTECTION_B( c2, HW_PRV_WRAM, 1MB )
//---- —\–ń
SET_PROTECTION_A( c3, HW_MAIN_MEM_END, 4KB )
SET_PROTECTION_B( c3, HW_MAIN_MEM_END, 4KB )
//---- PRV_WRAM_SYSRV
SET_PROTECTION_A( c3, HW_PRV_WRAM_SYSRV, 4KB )
SET_PROTECTION_B( c3, HW_PRV_WRAM_SYSRV, 4KB )
//---- データ TCM
ldr r0, =STUPi_HW_DTCM
@ -229,28 +232,30 @@ asm void i_stupInitCP15(void)
// MAIN_MEM : NA
// IO_AXIRAM : NA
// PRV_WRAM : NA
// PRV_WRAM_SYSRV: RO
// DTCM : NA
// ITCM : RO
// BIOS : RO
// SHARED : NA
//
ldr r0, =REGION_ACC(NA,NA,NA,NA,NA,RO,RO,NA)
ldr r0, =REGION_ACC(NA,NA,NA,RO,NA,RO,RO,NA)
mcr p15, 0, r0, c5, c0, 3
//
// データアクセス許可(リージョン設定)
// MAIN_MEM : RW
// IO_AXIRAM : RW
// PRV_WRAM : NA
// PRV_WRAM : RW
// PRV_WRAM_SYSRV: RW
// DTCM : RW
// ITCM : RW
// BIOS : RO
// SHARED : NA
//
#ifdef BROM_ENABLE_BOOTROM_WRITE
ldr r0, =REGION_ACC(RW,RW,NA,NA,RW,RW,RW,NA)
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RW,NA)
#else // BROM_ENABLE_BOOTROM_WRITE
ldr r0, =REGION_ACC(RW,RW,NA,NA,RW,RW,RO,NA)
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RO,NA)
#endif // BROM_ENABLE_BOOTROM_WRITE
mcr p15, 0, r0, c5, c0, 2
@ -263,6 +268,9 @@ asm void i_stupInitCP15(void)
| HW_C1_SB1_BITSET | HW_C1_EXCEPT_VEC_UPPER \
| HW_C1_PROTECT_UNIT_ENABLE
orr r0, r0, r1
#ifdef SDK_MG20EMU
bic r0, r0, #HW_C1_EXCEPT_VEC_UPPER
#endif // SDK_MG20EMU
mcr p15, 0, r0, c1, c0, 0
bx lr

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@ -34,14 +34,22 @@ extern "C" {
#define HW_BROM HW_BIOS
#endif
#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
#ifdef SDK_MG20EMU
#define HW_BROM_SIZE 0x8000 // 32KB
#else // SDK_MG20EMU
#define HW_BROM_SIZE 0x10000 // 64KB
#endif // SDK_MG20EMU
#define HW_BROM_NML HW_BROM
#define HW_BROM_NML_END (HW_BROM_NML + HW_BROM_NML_SIZE)
#ifdef SDK_MG20EMU
#define HW_BROM_NML_SIZE 0x4000 // 16KB
#else // SDK_MG20EMU
#define HW_BROM_NML_SIZE 0x8000 // 32KB
#endif // SDK_MG20EMU
#define HW_BROM_SEC HW_BROM_NML_END
#define HW_BROM_SEC_END (HW_BROM_SEC + HW_BROM_SEC_SIZE)
#define HW_BROM_SEC_SIZE 0x8000 // 32KB
#define HW_BROM_SEC_SIZE HW_BROM_NML_SIZE
//------------------------------------- BROM_TEMP
#define HW_BROM_TEMP (HW_BROM_TEMP_END - HW_BROM_TEMP_SIZE)

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@ -110,7 +110,13 @@ extern "C" {
#define HW_AHBP_REG_SIZE 0x80000 // 512MB
//----------------------------- System ROM
#ifdef SDK_MG20EMU
#define HW_BIOS_IMG 0x00000000
#define HW_BIOS 0x00000000
#else // SDK_MG20EMU
#define HW_BIOS_IMG 0xfffe0000
#define HW_BIOS 0xffff0000
#endif // SDK_MG20EMU
#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
#define HW_BIOS_SIZE 0x8000 // 32KB